nir: Add GLSL_TYPE_[U]INT64 to some switch statements
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include <assert.h>
31
32 nir_shader *
33 nir_shader_create(void *mem_ctx,
34 gl_shader_stage stage,
35 const nir_shader_compiler_options *options,
36 shader_info *si)
37 {
38 nir_shader *shader = rzalloc(mem_ctx, nir_shader);
39
40 exec_list_make_empty(&shader->uniforms);
41 exec_list_make_empty(&shader->inputs);
42 exec_list_make_empty(&shader->outputs);
43 exec_list_make_empty(&shader->shared);
44
45 shader->options = options;
46
47 shader->info = si ? si : rzalloc(shader, shader_info);
48
49 exec_list_make_empty(&shader->functions);
50 exec_list_make_empty(&shader->registers);
51 exec_list_make_empty(&shader->globals);
52 exec_list_make_empty(&shader->system_values);
53 shader->reg_alloc = 0;
54
55 shader->num_inputs = 0;
56 shader->num_outputs = 0;
57 shader->num_uniforms = 0;
58 shader->num_shared = 0;
59
60 shader->stage = stage;
61
62 return shader;
63 }
64
65 static nir_register *
66 reg_create(void *mem_ctx, struct exec_list *list)
67 {
68 nir_register *reg = ralloc(mem_ctx, nir_register);
69
70 list_inithead(&reg->uses);
71 list_inithead(&reg->defs);
72 list_inithead(&reg->if_uses);
73
74 reg->num_components = 0;
75 reg->bit_size = 32;
76 reg->num_array_elems = 0;
77 reg->is_packed = false;
78 reg->name = NULL;
79
80 exec_list_push_tail(list, &reg->node);
81
82 return reg;
83 }
84
85 nir_register *
86 nir_global_reg_create(nir_shader *shader)
87 {
88 nir_register *reg = reg_create(shader, &shader->registers);
89 reg->index = shader->reg_alloc++;
90 reg->is_global = true;
91
92 return reg;
93 }
94
95 nir_register *
96 nir_local_reg_create(nir_function_impl *impl)
97 {
98 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
99 reg->index = impl->reg_alloc++;
100 reg->is_global = false;
101
102 return reg;
103 }
104
105 void
106 nir_reg_remove(nir_register *reg)
107 {
108 exec_node_remove(&reg->node);
109 }
110
111 void
112 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
113 {
114 switch (var->data.mode) {
115 case nir_var_all:
116 assert(!"invalid mode");
117 break;
118
119 case nir_var_local:
120 assert(!"nir_shader_add_variable cannot be used for local variables");
121 break;
122
123 case nir_var_param:
124 assert(!"nir_shader_add_variable cannot be used for function parameters");
125 break;
126
127 case nir_var_global:
128 exec_list_push_tail(&shader->globals, &var->node);
129 break;
130
131 case nir_var_shader_in:
132 exec_list_push_tail(&shader->inputs, &var->node);
133 break;
134
135 case nir_var_shader_out:
136 exec_list_push_tail(&shader->outputs, &var->node);
137 break;
138
139 case nir_var_uniform:
140 case nir_var_shader_storage:
141 exec_list_push_tail(&shader->uniforms, &var->node);
142 break;
143
144 case nir_var_shared:
145 assert(shader->stage == MESA_SHADER_COMPUTE);
146 exec_list_push_tail(&shader->shared, &var->node);
147 break;
148
149 case nir_var_system_value:
150 exec_list_push_tail(&shader->system_values, &var->node);
151 break;
152 }
153 }
154
155 nir_variable *
156 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
157 const struct glsl_type *type, const char *name)
158 {
159 nir_variable *var = rzalloc(shader, nir_variable);
160 var->name = ralloc_strdup(var, name);
161 var->type = type;
162 var->data.mode = mode;
163
164 if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
165 (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
166 var->data.interpolation = INTERP_MODE_SMOOTH;
167
168 if (mode == nir_var_shader_in || mode == nir_var_uniform)
169 var->data.read_only = true;
170
171 nir_shader_add_variable(shader, var);
172
173 return var;
174 }
175
176 nir_variable *
177 nir_local_variable_create(nir_function_impl *impl,
178 const struct glsl_type *type, const char *name)
179 {
180 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
181 var->name = ralloc_strdup(var, name);
182 var->type = type;
183 var->data.mode = nir_var_local;
184
185 nir_function_impl_add_variable(impl, var);
186
187 return var;
188 }
189
190 nir_function *
191 nir_function_create(nir_shader *shader, const char *name)
192 {
193 nir_function *func = ralloc(shader, nir_function);
194
195 exec_list_push_tail(&shader->functions, &func->node);
196
197 func->name = ralloc_strdup(func, name);
198 func->shader = shader;
199 func->num_params = 0;
200 func->params = NULL;
201 func->return_type = glsl_void_type();
202 func->impl = NULL;
203
204 return func;
205 }
206
207 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
208 {
209 dest->is_ssa = src->is_ssa;
210 if (src->is_ssa) {
211 dest->ssa = src->ssa;
212 } else {
213 dest->reg.base_offset = src->reg.base_offset;
214 dest->reg.reg = src->reg.reg;
215 if (src->reg.indirect) {
216 dest->reg.indirect = ralloc(mem_ctx, nir_src);
217 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
218 } else {
219 dest->reg.indirect = NULL;
220 }
221 }
222 }
223
224 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
225 {
226 /* Copying an SSA definition makes no sense whatsoever. */
227 assert(!src->is_ssa);
228
229 dest->is_ssa = false;
230
231 dest->reg.base_offset = src->reg.base_offset;
232 dest->reg.reg = src->reg.reg;
233 if (src->reg.indirect) {
234 dest->reg.indirect = ralloc(instr, nir_src);
235 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
236 } else {
237 dest->reg.indirect = NULL;
238 }
239 }
240
241 void
242 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
243 nir_alu_instr *instr)
244 {
245 nir_src_copy(&dest->src, &src->src, &instr->instr);
246 dest->abs = src->abs;
247 dest->negate = src->negate;
248 for (unsigned i = 0; i < 4; i++)
249 dest->swizzle[i] = src->swizzle[i];
250 }
251
252 void
253 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
254 nir_alu_instr *instr)
255 {
256 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
257 dest->write_mask = src->write_mask;
258 dest->saturate = src->saturate;
259 }
260
261
262 static void
263 cf_init(nir_cf_node *node, nir_cf_node_type type)
264 {
265 exec_node_init(&node->node);
266 node->parent = NULL;
267 node->type = type;
268 }
269
270 nir_function_impl *
271 nir_function_impl_create_bare(nir_shader *shader)
272 {
273 nir_function_impl *impl = ralloc(shader, nir_function_impl);
274
275 impl->function = NULL;
276
277 cf_init(&impl->cf_node, nir_cf_node_function);
278
279 exec_list_make_empty(&impl->body);
280 exec_list_make_empty(&impl->registers);
281 exec_list_make_empty(&impl->locals);
282 impl->num_params = 0;
283 impl->params = NULL;
284 impl->return_var = NULL;
285 impl->reg_alloc = 0;
286 impl->ssa_alloc = 0;
287 impl->valid_metadata = nir_metadata_none;
288
289 /* create start & end blocks */
290 nir_block *start_block = nir_block_create(shader);
291 nir_block *end_block = nir_block_create(shader);
292 start_block->cf_node.parent = &impl->cf_node;
293 end_block->cf_node.parent = &impl->cf_node;
294 impl->end_block = end_block;
295
296 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
297
298 start_block->successors[0] = end_block;
299 _mesa_set_add(end_block->predecessors, start_block);
300 return impl;
301 }
302
303 nir_function_impl *
304 nir_function_impl_create(nir_function *function)
305 {
306 assert(function->impl == NULL);
307
308 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
309
310 function->impl = impl;
311 impl->function = function;
312
313 impl->num_params = function->num_params;
314 impl->params = ralloc_array(function->shader,
315 nir_variable *, impl->num_params);
316
317 for (unsigned i = 0; i < impl->num_params; i++) {
318 impl->params[i] = rzalloc(function->shader, nir_variable);
319 impl->params[i]->type = function->params[i].type;
320 impl->params[i]->data.mode = nir_var_param;
321 impl->params[i]->data.location = i;
322 }
323
324 if (!glsl_type_is_void(function->return_type)) {
325 impl->return_var = rzalloc(function->shader, nir_variable);
326 impl->return_var->type = function->return_type;
327 impl->return_var->data.mode = nir_var_param;
328 impl->return_var->data.location = -1;
329 } else {
330 impl->return_var = NULL;
331 }
332
333 return impl;
334 }
335
336 nir_block *
337 nir_block_create(nir_shader *shader)
338 {
339 nir_block *block = rzalloc(shader, nir_block);
340
341 cf_init(&block->cf_node, nir_cf_node_block);
342
343 block->successors[0] = block->successors[1] = NULL;
344 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
345 _mesa_key_pointer_equal);
346 block->imm_dom = NULL;
347 /* XXX maybe it would be worth it to defer allocation? This
348 * way it doesn't get allocated for shader refs that never run
349 * nir_calc_dominance? For example, state-tracker creates an
350 * initial IR, clones that, runs appropriate lowering pass, passes
351 * to driver which does common lowering/opt, and then stores ref
352 * which is later used to do state specific lowering and futher
353 * opt. Do any of the references not need dominance metadata?
354 */
355 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
356 _mesa_key_pointer_equal);
357
358 exec_list_make_empty(&block->instr_list);
359
360 return block;
361 }
362
363 static inline void
364 src_init(nir_src *src)
365 {
366 src->is_ssa = false;
367 src->reg.reg = NULL;
368 src->reg.indirect = NULL;
369 src->reg.base_offset = 0;
370 }
371
372 nir_if *
373 nir_if_create(nir_shader *shader)
374 {
375 nir_if *if_stmt = ralloc(shader, nir_if);
376
377 cf_init(&if_stmt->cf_node, nir_cf_node_if);
378 src_init(&if_stmt->condition);
379
380 nir_block *then = nir_block_create(shader);
381 exec_list_make_empty(&if_stmt->then_list);
382 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
383 then->cf_node.parent = &if_stmt->cf_node;
384
385 nir_block *else_stmt = nir_block_create(shader);
386 exec_list_make_empty(&if_stmt->else_list);
387 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
388 else_stmt->cf_node.parent = &if_stmt->cf_node;
389
390 return if_stmt;
391 }
392
393 nir_loop *
394 nir_loop_create(nir_shader *shader)
395 {
396 nir_loop *loop = rzalloc(shader, nir_loop);
397
398 cf_init(&loop->cf_node, nir_cf_node_loop);
399
400 nir_block *body = nir_block_create(shader);
401 exec_list_make_empty(&loop->body);
402 exec_list_push_tail(&loop->body, &body->cf_node.node);
403 body->cf_node.parent = &loop->cf_node;
404
405 body->successors[0] = body;
406 _mesa_set_add(body->predecessors, body);
407
408 return loop;
409 }
410
411 static void
412 instr_init(nir_instr *instr, nir_instr_type type)
413 {
414 instr->type = type;
415 instr->block = NULL;
416 exec_node_init(&instr->node);
417 }
418
419 static void
420 dest_init(nir_dest *dest)
421 {
422 dest->is_ssa = false;
423 dest->reg.reg = NULL;
424 dest->reg.indirect = NULL;
425 dest->reg.base_offset = 0;
426 }
427
428 static void
429 alu_dest_init(nir_alu_dest *dest)
430 {
431 dest_init(&dest->dest);
432 dest->saturate = false;
433 dest->write_mask = 0xf;
434 }
435
436 static void
437 alu_src_init(nir_alu_src *src)
438 {
439 src_init(&src->src);
440 src->abs = src->negate = false;
441 src->swizzle[0] = 0;
442 src->swizzle[1] = 1;
443 src->swizzle[2] = 2;
444 src->swizzle[3] = 3;
445 }
446
447 nir_alu_instr *
448 nir_alu_instr_create(nir_shader *shader, nir_op op)
449 {
450 unsigned num_srcs = nir_op_infos[op].num_inputs;
451 /* TODO: don't use rzalloc */
452 nir_alu_instr *instr =
453 rzalloc_size(shader,
454 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
455
456 instr_init(&instr->instr, nir_instr_type_alu);
457 instr->op = op;
458 alu_dest_init(&instr->dest);
459 for (unsigned i = 0; i < num_srcs; i++)
460 alu_src_init(&instr->src[i]);
461
462 return instr;
463 }
464
465 nir_jump_instr *
466 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
467 {
468 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
469 instr_init(&instr->instr, nir_instr_type_jump);
470 instr->type = type;
471 return instr;
472 }
473
474 nir_load_const_instr *
475 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
476 unsigned bit_size)
477 {
478 nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
479 instr_init(&instr->instr, nir_instr_type_load_const);
480
481 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
482
483 return instr;
484 }
485
486 nir_intrinsic_instr *
487 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
488 {
489 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
490 /* TODO: don't use rzalloc */
491 nir_intrinsic_instr *instr =
492 rzalloc_size(shader,
493 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
494
495 instr_init(&instr->instr, nir_instr_type_intrinsic);
496 instr->intrinsic = op;
497
498 if (nir_intrinsic_infos[op].has_dest)
499 dest_init(&instr->dest);
500
501 for (unsigned i = 0; i < num_srcs; i++)
502 src_init(&instr->src[i]);
503
504 return instr;
505 }
506
507 nir_call_instr *
508 nir_call_instr_create(nir_shader *shader, nir_function *callee)
509 {
510 nir_call_instr *instr = ralloc(shader, nir_call_instr);
511 instr_init(&instr->instr, nir_instr_type_call);
512
513 instr->callee = callee;
514 instr->num_params = callee->num_params;
515 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
516 instr->return_deref = NULL;
517
518 return instr;
519 }
520
521 nir_tex_instr *
522 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
523 {
524 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
525 instr_init(&instr->instr, nir_instr_type_tex);
526
527 dest_init(&instr->dest);
528
529 instr->num_srcs = num_srcs;
530 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
531 for (unsigned i = 0; i < num_srcs; i++)
532 src_init(&instr->src[i].src);
533
534 instr->texture_index = 0;
535 instr->texture_array_size = 0;
536 instr->texture = NULL;
537 instr->sampler_index = 0;
538 instr->sampler = NULL;
539
540 return instr;
541 }
542
543 void
544 nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
545 {
546 assert(src_idx < tex->num_srcs);
547
548 /* First rewrite the source to NIR_SRC_INIT */
549 nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT);
550
551 /* Now, move all of the other sources down */
552 for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
553 tex->src[i-1].src_type = tex->src[i].src_type;
554 nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
555 }
556 tex->num_srcs--;
557 }
558
559 nir_phi_instr *
560 nir_phi_instr_create(nir_shader *shader)
561 {
562 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
563 instr_init(&instr->instr, nir_instr_type_phi);
564
565 dest_init(&instr->dest);
566 exec_list_make_empty(&instr->srcs);
567 return instr;
568 }
569
570 nir_parallel_copy_instr *
571 nir_parallel_copy_instr_create(nir_shader *shader)
572 {
573 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
574 instr_init(&instr->instr, nir_instr_type_parallel_copy);
575
576 exec_list_make_empty(&instr->entries);
577
578 return instr;
579 }
580
581 nir_ssa_undef_instr *
582 nir_ssa_undef_instr_create(nir_shader *shader,
583 unsigned num_components,
584 unsigned bit_size)
585 {
586 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
587 instr_init(&instr->instr, nir_instr_type_ssa_undef);
588
589 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
590
591 return instr;
592 }
593
594 nir_deref_var *
595 nir_deref_var_create(void *mem_ctx, nir_variable *var)
596 {
597 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
598 deref->deref.deref_type = nir_deref_type_var;
599 deref->deref.child = NULL;
600 deref->deref.type = var->type;
601 deref->var = var;
602 return deref;
603 }
604
605 nir_deref_array *
606 nir_deref_array_create(void *mem_ctx)
607 {
608 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
609 deref->deref.deref_type = nir_deref_type_array;
610 deref->deref.child = NULL;
611 deref->deref_array_type = nir_deref_array_type_direct;
612 src_init(&deref->indirect);
613 deref->base_offset = 0;
614 return deref;
615 }
616
617 nir_deref_struct *
618 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
619 {
620 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
621 deref->deref.deref_type = nir_deref_type_struct;
622 deref->deref.child = NULL;
623 deref->index = field_index;
624 return deref;
625 }
626
627 nir_deref_var *
628 nir_deref_var_clone(const nir_deref_var *deref, void *mem_ctx)
629 {
630 if (deref == NULL)
631 return NULL;
632
633 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
634 ret->deref.type = deref->deref.type;
635 if (deref->deref.child)
636 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
637 return ret;
638 }
639
640 static nir_deref_array *
641 deref_array_clone(const nir_deref_array *deref, void *mem_ctx)
642 {
643 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
644 ret->base_offset = deref->base_offset;
645 ret->deref_array_type = deref->deref_array_type;
646 if (deref->deref_array_type == nir_deref_array_type_indirect) {
647 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
648 }
649 ret->deref.type = deref->deref.type;
650 if (deref->deref.child)
651 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
652 return ret;
653 }
654
655 static nir_deref_struct *
656 deref_struct_clone(const nir_deref_struct *deref, void *mem_ctx)
657 {
658 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
659 ret->deref.type = deref->deref.type;
660 if (deref->deref.child)
661 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
662 return ret;
663 }
664
665 nir_deref *
666 nir_deref_clone(const nir_deref *deref, void *mem_ctx)
667 {
668 if (deref == NULL)
669 return NULL;
670
671 switch (deref->deref_type) {
672 case nir_deref_type_var:
673 return &nir_deref_var_clone(nir_deref_as_var(deref), mem_ctx)->deref;
674 case nir_deref_type_array:
675 return &deref_array_clone(nir_deref_as_array(deref), mem_ctx)->deref;
676 case nir_deref_type_struct:
677 return &deref_struct_clone(nir_deref_as_struct(deref), mem_ctx)->deref;
678 default:
679 unreachable("Invalid dereference type");
680 }
681
682 return NULL;
683 }
684
685 /* This is the second step in the recursion. We've found the tail and made a
686 * copy. Now we need to iterate over all possible leaves and call the
687 * callback on each one.
688 */
689 static bool
690 deref_foreach_leaf_build_recur(nir_deref_var *deref, nir_deref *tail,
691 nir_deref_foreach_leaf_cb cb, void *state)
692 {
693 unsigned length;
694 union {
695 nir_deref_array arr;
696 nir_deref_struct str;
697 } tmp;
698
699 assert(tail->child == NULL);
700 switch (glsl_get_base_type(tail->type)) {
701 case GLSL_TYPE_UINT:
702 case GLSL_TYPE_UINT64:
703 case GLSL_TYPE_INT:
704 case GLSL_TYPE_INT64:
705 case GLSL_TYPE_FLOAT:
706 case GLSL_TYPE_DOUBLE:
707 case GLSL_TYPE_BOOL:
708 if (glsl_type_is_vector_or_scalar(tail->type))
709 return cb(deref, state);
710 /* Fall Through */
711
712 case GLSL_TYPE_ARRAY:
713 tmp.arr.deref.deref_type = nir_deref_type_array;
714 tmp.arr.deref.type = glsl_get_array_element(tail->type);
715 tmp.arr.deref_array_type = nir_deref_array_type_direct;
716 tmp.arr.indirect = NIR_SRC_INIT;
717 tail->child = &tmp.arr.deref;
718
719 length = glsl_get_length(tail->type);
720 for (unsigned i = 0; i < length; i++) {
721 tmp.arr.deref.child = NULL;
722 tmp.arr.base_offset = i;
723 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
724 return false;
725 }
726 return true;
727
728 case GLSL_TYPE_STRUCT:
729 tmp.str.deref.deref_type = nir_deref_type_struct;
730 tail->child = &tmp.str.deref;
731
732 length = glsl_get_length(tail->type);
733 for (unsigned i = 0; i < length; i++) {
734 tmp.arr.deref.child = NULL;
735 tmp.str.deref.type = glsl_get_struct_field(tail->type, i);
736 tmp.str.index = i;
737 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
738 return false;
739 }
740 return true;
741
742 default:
743 unreachable("Invalid type for dereference");
744 }
745 }
746
747 /* This is the first step of the foreach_leaf recursion. In this step we are
748 * walking to the end of the deref chain and making a copy in the stack as we
749 * go. This is because we don't want to mutate the deref chain that was
750 * passed in by the caller. The downside is that this deref chain is on the
751 * stack and , if the caller wants to do anything with it, they will have to
752 * make their own copy because this one will go away.
753 */
754 static bool
755 deref_foreach_leaf_copy_recur(nir_deref_var *deref, nir_deref *tail,
756 nir_deref_foreach_leaf_cb cb, void *state)
757 {
758 union {
759 nir_deref_array arr;
760 nir_deref_struct str;
761 } c;
762
763 if (tail->child) {
764 switch (tail->child->deref_type) {
765 case nir_deref_type_array:
766 c.arr = *nir_deref_as_array(tail->child);
767 tail->child = &c.arr.deref;
768 return deref_foreach_leaf_copy_recur(deref, &c.arr.deref, cb, state);
769
770 case nir_deref_type_struct:
771 c.str = *nir_deref_as_struct(tail->child);
772 tail->child = &c.str.deref;
773 return deref_foreach_leaf_copy_recur(deref, &c.str.deref, cb, state);
774
775 case nir_deref_type_var:
776 default:
777 unreachable("Invalid deref type for a child");
778 }
779 } else {
780 /* We've gotten to the end of the original deref. Time to start
781 * building our own derefs.
782 */
783 return deref_foreach_leaf_build_recur(deref, tail, cb, state);
784 }
785 }
786
787 /**
788 * This function iterates over all of the possible derefs that can be created
789 * with the given deref as the head. It then calls the provided callback with
790 * a full deref for each one.
791 *
792 * The deref passed to the callback will be allocated on the stack. You will
793 * need to make a copy if you want it to hang around.
794 */
795 bool
796 nir_deref_foreach_leaf(nir_deref_var *deref,
797 nir_deref_foreach_leaf_cb cb, void *state)
798 {
799 nir_deref_var copy = *deref;
800 return deref_foreach_leaf_copy_recur(&copy, &copy.deref, cb, state);
801 }
802
803 /* Returns a load_const instruction that represents the constant
804 * initializer for the given deref chain. The caller is responsible for
805 * ensuring that there actually is a constant initializer.
806 */
807 nir_load_const_instr *
808 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
809 {
810 nir_constant *constant = deref->var->constant_initializer;
811 assert(constant);
812
813 const nir_deref *tail = &deref->deref;
814 unsigned matrix_col = 0;
815 while (tail->child) {
816 switch (tail->child->deref_type) {
817 case nir_deref_type_array: {
818 nir_deref_array *arr = nir_deref_as_array(tail->child);
819 assert(arr->deref_array_type == nir_deref_array_type_direct);
820 if (glsl_type_is_matrix(tail->type)) {
821 assert(arr->deref.child == NULL);
822 matrix_col = arr->base_offset;
823 } else {
824 constant = constant->elements[arr->base_offset];
825 }
826 break;
827 }
828
829 case nir_deref_type_struct: {
830 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
831 break;
832 }
833
834 default:
835 unreachable("Invalid deref child type");
836 }
837
838 tail = tail->child;
839 }
840
841 unsigned bit_size = glsl_get_bit_size(tail->type);
842 nir_load_const_instr *load =
843 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
844 bit_size);
845
846 switch (glsl_get_base_type(tail->type)) {
847 case GLSL_TYPE_FLOAT:
848 case GLSL_TYPE_INT:
849 case GLSL_TYPE_UINT:
850 case GLSL_TYPE_DOUBLE:
851 case GLSL_TYPE_UINT64:
852 case GLSL_TYPE_INT64:
853 case GLSL_TYPE_BOOL:
854 load->value = constant->values[matrix_col];
855 break;
856 default:
857 unreachable("Invalid immediate type");
858 }
859
860 return load;
861 }
862
863 nir_function_impl *
864 nir_cf_node_get_function(nir_cf_node *node)
865 {
866 while (node->type != nir_cf_node_function) {
867 node = node->parent;
868 }
869
870 return nir_cf_node_as_function(node);
871 }
872
873 /* Reduces a cursor by trying to convert everything to after and trying to
874 * go up to block granularity when possible.
875 */
876 static nir_cursor
877 reduce_cursor(nir_cursor cursor)
878 {
879 switch (cursor.option) {
880 case nir_cursor_before_block:
881 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
882 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
883 if (exec_list_is_empty(&cursor.block->instr_list)) {
884 /* Empty block. After is as good as before. */
885 cursor.option = nir_cursor_after_block;
886 }
887 return cursor;
888
889 case nir_cursor_after_block:
890 return cursor;
891
892 case nir_cursor_before_instr: {
893 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
894 if (prev_instr) {
895 /* Before this instruction is after the previous */
896 cursor.instr = prev_instr;
897 cursor.option = nir_cursor_after_instr;
898 } else {
899 /* No previous instruction. Switch to before block */
900 cursor.block = cursor.instr->block;
901 cursor.option = nir_cursor_before_block;
902 }
903 return reduce_cursor(cursor);
904 }
905
906 case nir_cursor_after_instr:
907 if (nir_instr_next(cursor.instr) == NULL) {
908 /* This is the last instruction, switch to after block */
909 cursor.option = nir_cursor_after_block;
910 cursor.block = cursor.instr->block;
911 }
912 return cursor;
913
914 default:
915 unreachable("Inavlid cursor option");
916 }
917 }
918
919 bool
920 nir_cursors_equal(nir_cursor a, nir_cursor b)
921 {
922 /* Reduced cursors should be unique */
923 a = reduce_cursor(a);
924 b = reduce_cursor(b);
925
926 return a.block == b.block && a.option == b.option;
927 }
928
929 static bool
930 add_use_cb(nir_src *src, void *state)
931 {
932 nir_instr *instr = state;
933
934 src->parent_instr = instr;
935 list_addtail(&src->use_link,
936 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
937
938 return true;
939 }
940
941 static bool
942 add_ssa_def_cb(nir_ssa_def *def, void *state)
943 {
944 nir_instr *instr = state;
945
946 if (instr->block && def->index == UINT_MAX) {
947 nir_function_impl *impl =
948 nir_cf_node_get_function(&instr->block->cf_node);
949
950 def->index = impl->ssa_alloc++;
951 }
952
953 return true;
954 }
955
956 static bool
957 add_reg_def_cb(nir_dest *dest, void *state)
958 {
959 nir_instr *instr = state;
960
961 if (!dest->is_ssa) {
962 dest->reg.parent_instr = instr;
963 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
964 }
965
966 return true;
967 }
968
969 static void
970 add_defs_uses(nir_instr *instr)
971 {
972 nir_foreach_src(instr, add_use_cb, instr);
973 nir_foreach_dest(instr, add_reg_def_cb, instr);
974 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
975 }
976
977 void
978 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
979 {
980 switch (cursor.option) {
981 case nir_cursor_before_block:
982 /* Only allow inserting jumps into empty blocks. */
983 if (instr->type == nir_instr_type_jump)
984 assert(exec_list_is_empty(&cursor.block->instr_list));
985
986 instr->block = cursor.block;
987 add_defs_uses(instr);
988 exec_list_push_head(&cursor.block->instr_list, &instr->node);
989 break;
990 case nir_cursor_after_block: {
991 /* Inserting instructions after a jump is illegal. */
992 nir_instr *last = nir_block_last_instr(cursor.block);
993 assert(last == NULL || last->type != nir_instr_type_jump);
994 (void) last;
995
996 instr->block = cursor.block;
997 add_defs_uses(instr);
998 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
999 break;
1000 }
1001 case nir_cursor_before_instr:
1002 assert(instr->type != nir_instr_type_jump);
1003 instr->block = cursor.instr->block;
1004 add_defs_uses(instr);
1005 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
1006 break;
1007 case nir_cursor_after_instr:
1008 /* Inserting instructions after a jump is illegal. */
1009 assert(cursor.instr->type != nir_instr_type_jump);
1010
1011 /* Only allow inserting jumps at the end of the block. */
1012 if (instr->type == nir_instr_type_jump)
1013 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
1014
1015 instr->block = cursor.instr->block;
1016 add_defs_uses(instr);
1017 exec_node_insert_after(&cursor.instr->node, &instr->node);
1018 break;
1019 }
1020
1021 if (instr->type == nir_instr_type_jump)
1022 nir_handle_add_jump(instr->block);
1023 }
1024
1025 static bool
1026 src_is_valid(const nir_src *src)
1027 {
1028 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
1029 }
1030
1031 static bool
1032 remove_use_cb(nir_src *src, void *state)
1033 {
1034 (void) state;
1035
1036 if (src_is_valid(src))
1037 list_del(&src->use_link);
1038
1039 return true;
1040 }
1041
1042 static bool
1043 remove_def_cb(nir_dest *dest, void *state)
1044 {
1045 (void) state;
1046
1047 if (!dest->is_ssa)
1048 list_del(&dest->reg.def_link);
1049
1050 return true;
1051 }
1052
1053 static void
1054 remove_defs_uses(nir_instr *instr)
1055 {
1056 nir_foreach_dest(instr, remove_def_cb, instr);
1057 nir_foreach_src(instr, remove_use_cb, instr);
1058 }
1059
1060 void nir_instr_remove(nir_instr *instr)
1061 {
1062 remove_defs_uses(instr);
1063 exec_node_remove(&instr->node);
1064
1065 if (instr->type == nir_instr_type_jump) {
1066 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
1067 nir_handle_remove_jump(instr->block, jump_instr->type);
1068 }
1069 }
1070
1071 /*@}*/
1072
1073 void
1074 nir_index_local_regs(nir_function_impl *impl)
1075 {
1076 unsigned index = 0;
1077 foreach_list_typed(nir_register, reg, node, &impl->registers) {
1078 reg->index = index++;
1079 }
1080 impl->reg_alloc = index;
1081 }
1082
1083 void
1084 nir_index_global_regs(nir_shader *shader)
1085 {
1086 unsigned index = 0;
1087 foreach_list_typed(nir_register, reg, node, &shader->registers) {
1088 reg->index = index++;
1089 }
1090 shader->reg_alloc = index;
1091 }
1092
1093 static bool
1094 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
1095 {
1096 return cb(&instr->dest.dest, state);
1097 }
1098
1099 static bool
1100 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
1101 void *state)
1102 {
1103 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
1104 return cb(&instr->dest, state);
1105
1106 return true;
1107 }
1108
1109 static bool
1110 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
1111 void *state)
1112 {
1113 return cb(&instr->dest, state);
1114 }
1115
1116 static bool
1117 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
1118 {
1119 return cb(&instr->dest, state);
1120 }
1121
1122 static bool
1123 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
1124 nir_foreach_dest_cb cb, void *state)
1125 {
1126 nir_foreach_parallel_copy_entry(entry, instr) {
1127 if (!cb(&entry->dest, state))
1128 return false;
1129 }
1130
1131 return true;
1132 }
1133
1134 bool
1135 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
1136 {
1137 switch (instr->type) {
1138 case nir_instr_type_alu:
1139 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
1140 case nir_instr_type_intrinsic:
1141 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1142 case nir_instr_type_tex:
1143 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1144 case nir_instr_type_phi:
1145 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1146 case nir_instr_type_parallel_copy:
1147 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1148 cb, state);
1149
1150 case nir_instr_type_load_const:
1151 case nir_instr_type_ssa_undef:
1152 case nir_instr_type_call:
1153 case nir_instr_type_jump:
1154 break;
1155
1156 default:
1157 unreachable("Invalid instruction type");
1158 break;
1159 }
1160
1161 return true;
1162 }
1163
1164 struct foreach_ssa_def_state {
1165 nir_foreach_ssa_def_cb cb;
1166 void *client_state;
1167 };
1168
1169 static inline bool
1170 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1171 {
1172 struct foreach_ssa_def_state *state = void_state;
1173
1174 if (dest->is_ssa)
1175 return state->cb(&dest->ssa, state->client_state);
1176 else
1177 return true;
1178 }
1179
1180 bool
1181 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1182 {
1183 switch (instr->type) {
1184 case nir_instr_type_alu:
1185 case nir_instr_type_tex:
1186 case nir_instr_type_intrinsic:
1187 case nir_instr_type_phi:
1188 case nir_instr_type_parallel_copy: {
1189 struct foreach_ssa_def_state foreach_state = {cb, state};
1190 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1191 }
1192
1193 case nir_instr_type_load_const:
1194 return cb(&nir_instr_as_load_const(instr)->def, state);
1195 case nir_instr_type_ssa_undef:
1196 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1197 case nir_instr_type_call:
1198 case nir_instr_type_jump:
1199 return true;
1200 default:
1201 unreachable("Invalid instruction type");
1202 }
1203 }
1204
1205 static bool
1206 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1207 {
1208 if (!cb(src, state))
1209 return false;
1210 if (!src->is_ssa && src->reg.indirect)
1211 return cb(src->reg.indirect, state);
1212 return true;
1213 }
1214
1215 static bool
1216 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1217 void *state)
1218 {
1219 if (deref->deref_array_type == nir_deref_array_type_indirect)
1220 return visit_src(&deref->indirect, cb, state);
1221 return true;
1222 }
1223
1224 static bool
1225 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1226 {
1227 nir_deref *cur = &deref->deref;
1228 while (cur != NULL) {
1229 if (cur->deref_type == nir_deref_type_array) {
1230 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1231 return false;
1232 }
1233
1234 cur = cur->child;
1235 }
1236
1237 return true;
1238 }
1239
1240 static bool
1241 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1242 {
1243 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1244 if (!visit_src(&instr->src[i].src, cb, state))
1245 return false;
1246
1247 return true;
1248 }
1249
1250 static bool
1251 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1252 {
1253 for (unsigned i = 0; i < instr->num_srcs; i++) {
1254 if (!visit_src(&instr->src[i].src, cb, state))
1255 return false;
1256 }
1257
1258 if (instr->texture != NULL) {
1259 if (!visit_deref_src(instr->texture, cb, state))
1260 return false;
1261 }
1262
1263 if (instr->sampler != NULL) {
1264 if (!visit_deref_src(instr->sampler, cb, state))
1265 return false;
1266 }
1267
1268 return true;
1269 }
1270
1271 static bool
1272 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1273 void *state)
1274 {
1275 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1276 for (unsigned i = 0; i < num_srcs; i++) {
1277 if (!visit_src(&instr->src[i], cb, state))
1278 return false;
1279 }
1280
1281 unsigned num_vars =
1282 nir_intrinsic_infos[instr->intrinsic].num_variables;
1283 for (unsigned i = 0; i < num_vars; i++) {
1284 if (!visit_deref_src(instr->variables[i], cb, state))
1285 return false;
1286 }
1287
1288 return true;
1289 }
1290
1291 static bool
1292 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1293 {
1294 nir_foreach_phi_src(src, instr) {
1295 if (!visit_src(&src->src, cb, state))
1296 return false;
1297 }
1298
1299 return true;
1300 }
1301
1302 static bool
1303 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1304 nir_foreach_src_cb cb, void *state)
1305 {
1306 nir_foreach_parallel_copy_entry(entry, instr) {
1307 if (!visit_src(&entry->src, cb, state))
1308 return false;
1309 }
1310
1311 return true;
1312 }
1313
1314 typedef struct {
1315 void *state;
1316 nir_foreach_src_cb cb;
1317 } visit_dest_indirect_state;
1318
1319 static bool
1320 visit_dest_indirect(nir_dest *dest, void *_state)
1321 {
1322 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1323
1324 if (!dest->is_ssa && dest->reg.indirect)
1325 return state->cb(dest->reg.indirect, state->state);
1326
1327 return true;
1328 }
1329
1330 bool
1331 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1332 {
1333 switch (instr->type) {
1334 case nir_instr_type_alu:
1335 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1336 return false;
1337 break;
1338 case nir_instr_type_intrinsic:
1339 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1340 return false;
1341 break;
1342 case nir_instr_type_tex:
1343 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1344 return false;
1345 break;
1346 case nir_instr_type_call:
1347 /* Call instructions have no regular sources */
1348 break;
1349 case nir_instr_type_load_const:
1350 /* Constant load instructions have no regular sources */
1351 break;
1352 case nir_instr_type_phi:
1353 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1354 return false;
1355 break;
1356 case nir_instr_type_parallel_copy:
1357 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1358 cb, state))
1359 return false;
1360 break;
1361 case nir_instr_type_jump:
1362 case nir_instr_type_ssa_undef:
1363 return true;
1364
1365 default:
1366 unreachable("Invalid instruction type");
1367 break;
1368 }
1369
1370 visit_dest_indirect_state dest_state;
1371 dest_state.state = state;
1372 dest_state.cb = cb;
1373 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1374 }
1375
1376 nir_const_value *
1377 nir_src_as_const_value(nir_src src)
1378 {
1379 if (!src.is_ssa)
1380 return NULL;
1381
1382 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1383 return NULL;
1384
1385 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1386
1387 return &load->value;
1388 }
1389
1390 /**
1391 * Returns true if the source is known to be dynamically uniform. Otherwise it
1392 * returns false which means it may or may not be dynamically uniform but it
1393 * can't be determined.
1394 */
1395 bool
1396 nir_src_is_dynamically_uniform(nir_src src)
1397 {
1398 if (!src.is_ssa)
1399 return false;
1400
1401 /* Constants are trivially dynamically uniform */
1402 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1403 return true;
1404
1405 /* As are uniform variables */
1406 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1407 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1408
1409 if (intr->intrinsic == nir_intrinsic_load_uniform)
1410 return true;
1411 }
1412
1413 /* XXX: this could have many more tests, such as when a sampler function is
1414 * called with dynamically uniform arguments.
1415 */
1416 return false;
1417 }
1418
1419 static void
1420 src_remove_all_uses(nir_src *src)
1421 {
1422 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1423 if (!src_is_valid(src))
1424 continue;
1425
1426 list_del(&src->use_link);
1427 }
1428 }
1429
1430 static void
1431 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1432 {
1433 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1434 if (!src_is_valid(src))
1435 continue;
1436
1437 if (parent_instr) {
1438 src->parent_instr = parent_instr;
1439 if (src->is_ssa)
1440 list_addtail(&src->use_link, &src->ssa->uses);
1441 else
1442 list_addtail(&src->use_link, &src->reg.reg->uses);
1443 } else {
1444 assert(parent_if);
1445 src->parent_if = parent_if;
1446 if (src->is_ssa)
1447 list_addtail(&src->use_link, &src->ssa->if_uses);
1448 else
1449 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1450 }
1451 }
1452 }
1453
1454 void
1455 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1456 {
1457 assert(!src_is_valid(src) || src->parent_instr == instr);
1458
1459 src_remove_all_uses(src);
1460 *src = new_src;
1461 src_add_all_uses(src, instr, NULL);
1462 }
1463
1464 void
1465 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1466 {
1467 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1468
1469 src_remove_all_uses(dest);
1470 src_remove_all_uses(src);
1471 *dest = *src;
1472 *src = NIR_SRC_INIT;
1473 src_add_all_uses(dest, dest_instr, NULL);
1474 }
1475
1476 void
1477 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1478 {
1479 nir_src *src = &if_stmt->condition;
1480 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1481
1482 src_remove_all_uses(src);
1483 *src = new_src;
1484 src_add_all_uses(src, NULL, if_stmt);
1485 }
1486
1487 void
1488 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1489 {
1490 if (dest->is_ssa) {
1491 /* We can only overwrite an SSA destination if it has no uses. */
1492 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1493 } else {
1494 list_del(&dest->reg.def_link);
1495 if (dest->reg.indirect)
1496 src_remove_all_uses(dest->reg.indirect);
1497 }
1498
1499 /* We can't re-write with an SSA def */
1500 assert(!new_dest.is_ssa);
1501
1502 nir_dest_copy(dest, &new_dest, instr);
1503
1504 dest->reg.parent_instr = instr;
1505 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1506
1507 if (dest->reg.indirect)
1508 src_add_all_uses(dest->reg.indirect, instr, NULL);
1509 }
1510
1511 /* note: does *not* take ownership of 'name' */
1512 void
1513 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1514 unsigned num_components,
1515 unsigned bit_size, const char *name)
1516 {
1517 def->name = ralloc_strdup(instr, name);
1518 def->parent_instr = instr;
1519 list_inithead(&def->uses);
1520 list_inithead(&def->if_uses);
1521 def->num_components = num_components;
1522 def->bit_size = bit_size;
1523
1524 if (instr->block) {
1525 nir_function_impl *impl =
1526 nir_cf_node_get_function(&instr->block->cf_node);
1527
1528 def->index = impl->ssa_alloc++;
1529 } else {
1530 def->index = UINT_MAX;
1531 }
1532 }
1533
1534 /* note: does *not* take ownership of 'name' */
1535 void
1536 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1537 unsigned num_components, unsigned bit_size,
1538 const char *name)
1539 {
1540 dest->is_ssa = true;
1541 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1542 }
1543
1544 void
1545 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1546 {
1547 assert(!new_src.is_ssa || def != new_src.ssa);
1548
1549 nir_foreach_use_safe(use_src, def)
1550 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1551
1552 nir_foreach_if_use_safe(use_src, def)
1553 nir_if_rewrite_condition(use_src->parent_if, new_src);
1554 }
1555
1556 static bool
1557 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1558 {
1559 assert(start->block == end->block);
1560
1561 if (between->block != start->block)
1562 return false;
1563
1564 /* Search backwards looking for "between" */
1565 while (start != end) {
1566 if (between == end)
1567 return true;
1568
1569 end = nir_instr_prev(end);
1570 assert(end);
1571 }
1572
1573 return false;
1574 }
1575
1576 /* Replaces all uses of the given SSA def with the given source but only if
1577 * the use comes after the after_me instruction. This can be useful if you
1578 * are emitting code to fix up the result of some instruction: you can freely
1579 * use the result in that code and then call rewrite_uses_after and pass the
1580 * last fixup instruction as after_me and it will replace all of the uses you
1581 * want without touching the fixup code.
1582 *
1583 * This function assumes that after_me is in the same block as
1584 * def->parent_instr and that after_me comes after def->parent_instr.
1585 */
1586 void
1587 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1588 nir_instr *after_me)
1589 {
1590 assert(!new_src.is_ssa || def != new_src.ssa);
1591
1592 nir_foreach_use_safe(use_src, def) {
1593 assert(use_src->parent_instr != def->parent_instr);
1594 /* Since def already dominates all of its uses, the only way a use can
1595 * not be dominated by after_me is if it is between def and after_me in
1596 * the instruction list.
1597 */
1598 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1599 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1600 }
1601
1602 nir_foreach_if_use_safe(use_src, def)
1603 nir_if_rewrite_condition(use_src->parent_if, new_src);
1604 }
1605
1606 uint8_t
1607 nir_ssa_def_components_read(nir_ssa_def *def)
1608 {
1609 uint8_t read_mask = 0;
1610 nir_foreach_use(use, def) {
1611 if (use->parent_instr->type == nir_instr_type_alu) {
1612 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1613 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1614 int src_idx = alu_src - &alu->src[0];
1615 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1616
1617 for (unsigned c = 0; c < 4; c++) {
1618 if (!nir_alu_instr_channel_used(alu, src_idx, c))
1619 continue;
1620
1621 read_mask |= (1 << alu_src->swizzle[c]);
1622 }
1623 } else {
1624 return (1 << def->num_components) - 1;
1625 }
1626 }
1627
1628 return read_mask;
1629 }
1630
1631 nir_block *
1632 nir_block_cf_tree_next(nir_block *block)
1633 {
1634 if (block == NULL) {
1635 /* nir_foreach_block_safe() will call this function on a NULL block
1636 * after the last iteration, but it won't use the result so just return
1637 * NULL here.
1638 */
1639 return NULL;
1640 }
1641
1642 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1643 if (cf_next)
1644 return nir_cf_node_cf_tree_first(cf_next);
1645
1646 nir_cf_node *parent = block->cf_node.parent;
1647
1648 switch (parent->type) {
1649 case nir_cf_node_if: {
1650 /* Are we at the end of the if? Go to the beginning of the else */
1651 nir_if *if_stmt = nir_cf_node_as_if(parent);
1652 if (block == nir_if_last_then_block(if_stmt))
1653 return nir_if_first_else_block(if_stmt);
1654
1655 assert(block == nir_if_last_else_block(if_stmt));
1656 /* fall through */
1657 }
1658
1659 case nir_cf_node_loop:
1660 return nir_cf_node_as_block(nir_cf_node_next(parent));
1661
1662 case nir_cf_node_function:
1663 return NULL;
1664
1665 default:
1666 unreachable("unknown cf node type");
1667 }
1668 }
1669
1670 nir_block *
1671 nir_block_cf_tree_prev(nir_block *block)
1672 {
1673 if (block == NULL) {
1674 /* do this for consistency with nir_block_cf_tree_next() */
1675 return NULL;
1676 }
1677
1678 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1679 if (cf_prev)
1680 return nir_cf_node_cf_tree_last(cf_prev);
1681
1682 nir_cf_node *parent = block->cf_node.parent;
1683
1684 switch (parent->type) {
1685 case nir_cf_node_if: {
1686 /* Are we at the beginning of the else? Go to the end of the if */
1687 nir_if *if_stmt = nir_cf_node_as_if(parent);
1688 if (block == nir_if_first_else_block(if_stmt))
1689 return nir_if_last_then_block(if_stmt);
1690
1691 assert(block == nir_if_first_then_block(if_stmt));
1692 /* fall through */
1693 }
1694
1695 case nir_cf_node_loop:
1696 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1697
1698 case nir_cf_node_function:
1699 return NULL;
1700
1701 default:
1702 unreachable("unknown cf node type");
1703 }
1704 }
1705
1706 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1707 {
1708 switch (node->type) {
1709 case nir_cf_node_function: {
1710 nir_function_impl *impl = nir_cf_node_as_function(node);
1711 return nir_start_block(impl);
1712 }
1713
1714 case nir_cf_node_if: {
1715 nir_if *if_stmt = nir_cf_node_as_if(node);
1716 return nir_if_first_then_block(if_stmt);
1717 }
1718
1719 case nir_cf_node_loop: {
1720 nir_loop *loop = nir_cf_node_as_loop(node);
1721 return nir_loop_first_block(loop);
1722 }
1723
1724 case nir_cf_node_block: {
1725 return nir_cf_node_as_block(node);
1726 }
1727
1728 default:
1729 unreachable("unknown node type");
1730 }
1731 }
1732
1733 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1734 {
1735 switch (node->type) {
1736 case nir_cf_node_function: {
1737 nir_function_impl *impl = nir_cf_node_as_function(node);
1738 return nir_impl_last_block(impl);
1739 }
1740
1741 case nir_cf_node_if: {
1742 nir_if *if_stmt = nir_cf_node_as_if(node);
1743 return nir_if_last_else_block(if_stmt);
1744 }
1745
1746 case nir_cf_node_loop: {
1747 nir_loop *loop = nir_cf_node_as_loop(node);
1748 return nir_loop_last_block(loop);
1749 }
1750
1751 case nir_cf_node_block: {
1752 return nir_cf_node_as_block(node);
1753 }
1754
1755 default:
1756 unreachable("unknown node type");
1757 }
1758 }
1759
1760 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1761 {
1762 if (node->type == nir_cf_node_block)
1763 return nir_block_cf_tree_next(nir_cf_node_as_block(node));
1764 else if (node->type == nir_cf_node_function)
1765 return NULL;
1766 else
1767 return nir_cf_node_as_block(nir_cf_node_next(node));
1768 }
1769
1770 nir_if *
1771 nir_block_get_following_if(nir_block *block)
1772 {
1773 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1774 return NULL;
1775
1776 if (nir_cf_node_is_last(&block->cf_node))
1777 return NULL;
1778
1779 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1780
1781 if (next_node->type != nir_cf_node_if)
1782 return NULL;
1783
1784 return nir_cf_node_as_if(next_node);
1785 }
1786
1787 nir_loop *
1788 nir_block_get_following_loop(nir_block *block)
1789 {
1790 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1791 return NULL;
1792
1793 if (nir_cf_node_is_last(&block->cf_node))
1794 return NULL;
1795
1796 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1797
1798 if (next_node->type != nir_cf_node_loop)
1799 return NULL;
1800
1801 return nir_cf_node_as_loop(next_node);
1802 }
1803
1804 void
1805 nir_index_blocks(nir_function_impl *impl)
1806 {
1807 unsigned index = 0;
1808
1809 if (impl->valid_metadata & nir_metadata_block_index)
1810 return;
1811
1812 nir_foreach_block(block, impl) {
1813 block->index = index++;
1814 }
1815
1816 impl->num_blocks = index;
1817 }
1818
1819 static bool
1820 index_ssa_def_cb(nir_ssa_def *def, void *state)
1821 {
1822 unsigned *index = (unsigned *) state;
1823 def->index = (*index)++;
1824
1825 return true;
1826 }
1827
1828 /**
1829 * The indices are applied top-to-bottom which has the very nice property
1830 * that, if A dominates B, then A->index <= B->index.
1831 */
1832 void
1833 nir_index_ssa_defs(nir_function_impl *impl)
1834 {
1835 unsigned index = 0;
1836
1837 nir_foreach_block(block, impl) {
1838 nir_foreach_instr(instr, block)
1839 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1840 }
1841
1842 impl->ssa_alloc = index;
1843 }
1844
1845 /**
1846 * The indices are applied top-to-bottom which has the very nice property
1847 * that, if A dominates B, then A->index <= B->index.
1848 */
1849 unsigned
1850 nir_index_instrs(nir_function_impl *impl)
1851 {
1852 unsigned index = 0;
1853
1854 nir_foreach_block(block, impl) {
1855 nir_foreach_instr(instr, block)
1856 instr->index = index++;
1857 }
1858
1859 return index;
1860 }
1861
1862 nir_intrinsic_op
1863 nir_intrinsic_from_system_value(gl_system_value val)
1864 {
1865 switch (val) {
1866 case SYSTEM_VALUE_VERTEX_ID:
1867 return nir_intrinsic_load_vertex_id;
1868 case SYSTEM_VALUE_INSTANCE_ID:
1869 return nir_intrinsic_load_instance_id;
1870 case SYSTEM_VALUE_DRAW_ID:
1871 return nir_intrinsic_load_draw_id;
1872 case SYSTEM_VALUE_BASE_INSTANCE:
1873 return nir_intrinsic_load_base_instance;
1874 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1875 return nir_intrinsic_load_vertex_id_zero_base;
1876 case SYSTEM_VALUE_BASE_VERTEX:
1877 return nir_intrinsic_load_base_vertex;
1878 case SYSTEM_VALUE_INVOCATION_ID:
1879 return nir_intrinsic_load_invocation_id;
1880 case SYSTEM_VALUE_FRONT_FACE:
1881 return nir_intrinsic_load_front_face;
1882 case SYSTEM_VALUE_SAMPLE_ID:
1883 return nir_intrinsic_load_sample_id;
1884 case SYSTEM_VALUE_SAMPLE_POS:
1885 return nir_intrinsic_load_sample_pos;
1886 case SYSTEM_VALUE_SAMPLE_MASK_IN:
1887 return nir_intrinsic_load_sample_mask_in;
1888 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1889 return nir_intrinsic_load_local_invocation_id;
1890 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
1891 return nir_intrinsic_load_local_invocation_index;
1892 case SYSTEM_VALUE_WORK_GROUP_ID:
1893 return nir_intrinsic_load_work_group_id;
1894 case SYSTEM_VALUE_NUM_WORK_GROUPS:
1895 return nir_intrinsic_load_num_work_groups;
1896 case SYSTEM_VALUE_PRIMITIVE_ID:
1897 return nir_intrinsic_load_primitive_id;
1898 case SYSTEM_VALUE_TESS_COORD:
1899 return nir_intrinsic_load_tess_coord;
1900 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1901 return nir_intrinsic_load_tess_level_outer;
1902 case SYSTEM_VALUE_TESS_LEVEL_INNER:
1903 return nir_intrinsic_load_tess_level_inner;
1904 case SYSTEM_VALUE_VERTICES_IN:
1905 return nir_intrinsic_load_patch_vertices_in;
1906 case SYSTEM_VALUE_HELPER_INVOCATION:
1907 return nir_intrinsic_load_helper_invocation;
1908 default:
1909 unreachable("system value does not directly correspond to intrinsic");
1910 }
1911 }
1912
1913 gl_system_value
1914 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1915 {
1916 switch (intrin) {
1917 case nir_intrinsic_load_vertex_id:
1918 return SYSTEM_VALUE_VERTEX_ID;
1919 case nir_intrinsic_load_instance_id:
1920 return SYSTEM_VALUE_INSTANCE_ID;
1921 case nir_intrinsic_load_draw_id:
1922 return SYSTEM_VALUE_DRAW_ID;
1923 case nir_intrinsic_load_base_instance:
1924 return SYSTEM_VALUE_BASE_INSTANCE;
1925 case nir_intrinsic_load_vertex_id_zero_base:
1926 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1927 case nir_intrinsic_load_base_vertex:
1928 return SYSTEM_VALUE_BASE_VERTEX;
1929 case nir_intrinsic_load_invocation_id:
1930 return SYSTEM_VALUE_INVOCATION_ID;
1931 case nir_intrinsic_load_front_face:
1932 return SYSTEM_VALUE_FRONT_FACE;
1933 case nir_intrinsic_load_sample_id:
1934 return SYSTEM_VALUE_SAMPLE_ID;
1935 case nir_intrinsic_load_sample_pos:
1936 return SYSTEM_VALUE_SAMPLE_POS;
1937 case nir_intrinsic_load_sample_mask_in:
1938 return SYSTEM_VALUE_SAMPLE_MASK_IN;
1939 case nir_intrinsic_load_local_invocation_id:
1940 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1941 case nir_intrinsic_load_local_invocation_index:
1942 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
1943 case nir_intrinsic_load_num_work_groups:
1944 return SYSTEM_VALUE_NUM_WORK_GROUPS;
1945 case nir_intrinsic_load_work_group_id:
1946 return SYSTEM_VALUE_WORK_GROUP_ID;
1947 case nir_intrinsic_load_primitive_id:
1948 return SYSTEM_VALUE_PRIMITIVE_ID;
1949 case nir_intrinsic_load_tess_coord:
1950 return SYSTEM_VALUE_TESS_COORD;
1951 case nir_intrinsic_load_tess_level_outer:
1952 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1953 case nir_intrinsic_load_tess_level_inner:
1954 return SYSTEM_VALUE_TESS_LEVEL_INNER;
1955 case nir_intrinsic_load_patch_vertices_in:
1956 return SYSTEM_VALUE_VERTICES_IN;
1957 case nir_intrinsic_load_helper_invocation:
1958 return SYSTEM_VALUE_HELPER_INVOCATION;
1959 default:
1960 unreachable("intrinsic doesn't produce a system value");
1961 }
1962 }