nir: Add gl_PointCoord system value
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_builder.h"
30 #include "nir_control_flow_private.h"
31 #include "util/half_float.h"
32 #include <limits.h>
33 #include <assert.h>
34 #include <math.h>
35 #include "util/u_math.h"
36
37 #include "main/menums.h" /* BITFIELD64_MASK */
38
39 nir_shader *
40 nir_shader_create(void *mem_ctx,
41 gl_shader_stage stage,
42 const nir_shader_compiler_options *options,
43 shader_info *si)
44 {
45 nir_shader *shader = rzalloc(mem_ctx, nir_shader);
46
47 exec_list_make_empty(&shader->uniforms);
48 exec_list_make_empty(&shader->inputs);
49 exec_list_make_empty(&shader->outputs);
50 exec_list_make_empty(&shader->shared);
51
52 shader->options = options;
53
54 if (si) {
55 assert(si->stage == stage);
56 shader->info = *si;
57 } else {
58 shader->info.stage = stage;
59 }
60
61 exec_list_make_empty(&shader->functions);
62 exec_list_make_empty(&shader->globals);
63 exec_list_make_empty(&shader->system_values);
64
65 shader->num_inputs = 0;
66 shader->num_outputs = 0;
67 shader->num_uniforms = 0;
68 shader->num_shared = 0;
69
70 return shader;
71 }
72
73 static nir_register *
74 reg_create(void *mem_ctx, struct exec_list *list)
75 {
76 nir_register *reg = ralloc(mem_ctx, nir_register);
77
78 list_inithead(&reg->uses);
79 list_inithead(&reg->defs);
80 list_inithead(&reg->if_uses);
81
82 reg->num_components = 0;
83 reg->bit_size = 32;
84 reg->num_array_elems = 0;
85 reg->name = NULL;
86
87 exec_list_push_tail(list, &reg->node);
88
89 return reg;
90 }
91
92 nir_register *
93 nir_local_reg_create(nir_function_impl *impl)
94 {
95 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
96 reg->index = impl->reg_alloc++;
97
98 return reg;
99 }
100
101 void
102 nir_reg_remove(nir_register *reg)
103 {
104 exec_node_remove(&reg->node);
105 }
106
107 void
108 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
109 {
110 switch (var->data.mode) {
111 case nir_var_all:
112 assert(!"invalid mode");
113 break;
114
115 case nir_var_function_temp:
116 assert(!"nir_shader_add_variable cannot be used for local variables");
117 break;
118
119 case nir_var_shader_temp:
120 exec_list_push_tail(&shader->globals, &var->node);
121 break;
122
123 case nir_var_shader_in:
124 exec_list_push_tail(&shader->inputs, &var->node);
125 break;
126
127 case nir_var_shader_out:
128 exec_list_push_tail(&shader->outputs, &var->node);
129 break;
130
131 case nir_var_uniform:
132 case nir_var_mem_ubo:
133 case nir_var_mem_ssbo:
134 exec_list_push_tail(&shader->uniforms, &var->node);
135 break;
136
137 case nir_var_mem_shared:
138 assert(gl_shader_stage_is_compute(shader->info.stage));
139 exec_list_push_tail(&shader->shared, &var->node);
140 break;
141
142 case nir_var_mem_global:
143 assert(!"nir_shader_add_variable cannot be used for global memory");
144 break;
145
146 case nir_var_system_value:
147 exec_list_push_tail(&shader->system_values, &var->node);
148 break;
149 }
150 }
151
152 nir_variable *
153 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
154 const struct glsl_type *type, const char *name)
155 {
156 nir_variable *var = rzalloc(shader, nir_variable);
157 var->name = ralloc_strdup(var, name);
158 var->type = type;
159 var->data.mode = mode;
160 var->data.how_declared = nir_var_declared_normally;
161
162 if ((mode == nir_var_shader_in &&
163 shader->info.stage != MESA_SHADER_VERTEX) ||
164 (mode == nir_var_shader_out &&
165 shader->info.stage != MESA_SHADER_FRAGMENT))
166 var->data.interpolation = INTERP_MODE_SMOOTH;
167
168 if (mode == nir_var_shader_in || mode == nir_var_uniform)
169 var->data.read_only = true;
170
171 nir_shader_add_variable(shader, var);
172
173 return var;
174 }
175
176 nir_variable *
177 nir_local_variable_create(nir_function_impl *impl,
178 const struct glsl_type *type, const char *name)
179 {
180 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
181 var->name = ralloc_strdup(var, name);
182 var->type = type;
183 var->data.mode = nir_var_function_temp;
184
185 nir_function_impl_add_variable(impl, var);
186
187 return var;
188 }
189
190 nir_function *
191 nir_function_create(nir_shader *shader, const char *name)
192 {
193 nir_function *func = ralloc(shader, nir_function);
194
195 exec_list_push_tail(&shader->functions, &func->node);
196
197 func->name = ralloc_strdup(func, name);
198 func->shader = shader;
199 func->num_params = 0;
200 func->params = NULL;
201 func->impl = NULL;
202 func->is_entrypoint = false;
203
204 return func;
205 }
206
207 /* NOTE: if the instruction you are copying a src to is already added
208 * to the IR, use nir_instr_rewrite_src() instead.
209 */
210 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
211 {
212 dest->is_ssa = src->is_ssa;
213 if (src->is_ssa) {
214 dest->ssa = src->ssa;
215 } else {
216 dest->reg.base_offset = src->reg.base_offset;
217 dest->reg.reg = src->reg.reg;
218 if (src->reg.indirect) {
219 dest->reg.indirect = ralloc(mem_ctx, nir_src);
220 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
221 } else {
222 dest->reg.indirect = NULL;
223 }
224 }
225 }
226
227 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
228 {
229 /* Copying an SSA definition makes no sense whatsoever. */
230 assert(!src->is_ssa);
231
232 dest->is_ssa = false;
233
234 dest->reg.base_offset = src->reg.base_offset;
235 dest->reg.reg = src->reg.reg;
236 if (src->reg.indirect) {
237 dest->reg.indirect = ralloc(instr, nir_src);
238 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
239 } else {
240 dest->reg.indirect = NULL;
241 }
242 }
243
244 void
245 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
246 nir_alu_instr *instr)
247 {
248 nir_src_copy(&dest->src, &src->src, &instr->instr);
249 dest->abs = src->abs;
250 dest->negate = src->negate;
251 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
252 dest->swizzle[i] = src->swizzle[i];
253 }
254
255 void
256 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
257 nir_alu_instr *instr)
258 {
259 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
260 dest->write_mask = src->write_mask;
261 dest->saturate = src->saturate;
262 }
263
264
265 static void
266 cf_init(nir_cf_node *node, nir_cf_node_type type)
267 {
268 exec_node_init(&node->node);
269 node->parent = NULL;
270 node->type = type;
271 }
272
273 nir_function_impl *
274 nir_function_impl_create_bare(nir_shader *shader)
275 {
276 nir_function_impl *impl = ralloc(shader, nir_function_impl);
277
278 impl->function = NULL;
279
280 cf_init(&impl->cf_node, nir_cf_node_function);
281
282 exec_list_make_empty(&impl->body);
283 exec_list_make_empty(&impl->registers);
284 exec_list_make_empty(&impl->locals);
285 impl->reg_alloc = 0;
286 impl->ssa_alloc = 0;
287 impl->valid_metadata = nir_metadata_none;
288
289 /* create start & end blocks */
290 nir_block *start_block = nir_block_create(shader);
291 nir_block *end_block = nir_block_create(shader);
292 start_block->cf_node.parent = &impl->cf_node;
293 end_block->cf_node.parent = &impl->cf_node;
294 impl->end_block = end_block;
295
296 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
297
298 start_block->successors[0] = end_block;
299 _mesa_set_add(end_block->predecessors, start_block);
300 return impl;
301 }
302
303 nir_function_impl *
304 nir_function_impl_create(nir_function *function)
305 {
306 assert(function->impl == NULL);
307
308 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
309
310 function->impl = impl;
311 impl->function = function;
312
313 return impl;
314 }
315
316 nir_block *
317 nir_block_create(nir_shader *shader)
318 {
319 nir_block *block = rzalloc(shader, nir_block);
320
321 cf_init(&block->cf_node, nir_cf_node_block);
322
323 block->successors[0] = block->successors[1] = NULL;
324 block->predecessors = _mesa_pointer_set_create(block);
325 block->imm_dom = NULL;
326 /* XXX maybe it would be worth it to defer allocation? This
327 * way it doesn't get allocated for shader refs that never run
328 * nir_calc_dominance? For example, state-tracker creates an
329 * initial IR, clones that, runs appropriate lowering pass, passes
330 * to driver which does common lowering/opt, and then stores ref
331 * which is later used to do state specific lowering and futher
332 * opt. Do any of the references not need dominance metadata?
333 */
334 block->dom_frontier = _mesa_pointer_set_create(block);
335
336 exec_list_make_empty(&block->instr_list);
337
338 return block;
339 }
340
341 static inline void
342 src_init(nir_src *src)
343 {
344 src->is_ssa = false;
345 src->reg.reg = NULL;
346 src->reg.indirect = NULL;
347 src->reg.base_offset = 0;
348 }
349
350 nir_if *
351 nir_if_create(nir_shader *shader)
352 {
353 nir_if *if_stmt = ralloc(shader, nir_if);
354
355 if_stmt->control = nir_selection_control_none;
356
357 cf_init(&if_stmt->cf_node, nir_cf_node_if);
358 src_init(&if_stmt->condition);
359
360 nir_block *then = nir_block_create(shader);
361 exec_list_make_empty(&if_stmt->then_list);
362 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
363 then->cf_node.parent = &if_stmt->cf_node;
364
365 nir_block *else_stmt = nir_block_create(shader);
366 exec_list_make_empty(&if_stmt->else_list);
367 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
368 else_stmt->cf_node.parent = &if_stmt->cf_node;
369
370 return if_stmt;
371 }
372
373 nir_loop *
374 nir_loop_create(nir_shader *shader)
375 {
376 nir_loop *loop = rzalloc(shader, nir_loop);
377
378 cf_init(&loop->cf_node, nir_cf_node_loop);
379
380 nir_block *body = nir_block_create(shader);
381 exec_list_make_empty(&loop->body);
382 exec_list_push_tail(&loop->body, &body->cf_node.node);
383 body->cf_node.parent = &loop->cf_node;
384
385 body->successors[0] = body;
386 _mesa_set_add(body->predecessors, body);
387
388 return loop;
389 }
390
391 static void
392 instr_init(nir_instr *instr, nir_instr_type type)
393 {
394 instr->type = type;
395 instr->block = NULL;
396 exec_node_init(&instr->node);
397 }
398
399 static void
400 dest_init(nir_dest *dest)
401 {
402 dest->is_ssa = false;
403 dest->reg.reg = NULL;
404 dest->reg.indirect = NULL;
405 dest->reg.base_offset = 0;
406 }
407
408 static void
409 alu_dest_init(nir_alu_dest *dest)
410 {
411 dest_init(&dest->dest);
412 dest->saturate = false;
413 dest->write_mask = 0xf;
414 }
415
416 static void
417 alu_src_init(nir_alu_src *src)
418 {
419 src_init(&src->src);
420 src->abs = src->negate = false;
421 for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
422 src->swizzle[i] = i;
423 }
424
425 nir_alu_instr *
426 nir_alu_instr_create(nir_shader *shader, nir_op op)
427 {
428 unsigned num_srcs = nir_op_infos[op].num_inputs;
429 /* TODO: don't use rzalloc */
430 nir_alu_instr *instr =
431 rzalloc_size(shader,
432 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
433
434 instr_init(&instr->instr, nir_instr_type_alu);
435 instr->op = op;
436 alu_dest_init(&instr->dest);
437 for (unsigned i = 0; i < num_srcs; i++)
438 alu_src_init(&instr->src[i]);
439
440 return instr;
441 }
442
443 nir_deref_instr *
444 nir_deref_instr_create(nir_shader *shader, nir_deref_type deref_type)
445 {
446 nir_deref_instr *instr =
447 rzalloc_size(shader, sizeof(nir_deref_instr));
448
449 instr_init(&instr->instr, nir_instr_type_deref);
450
451 instr->deref_type = deref_type;
452 if (deref_type != nir_deref_type_var)
453 src_init(&instr->parent);
454
455 if (deref_type == nir_deref_type_array ||
456 deref_type == nir_deref_type_ptr_as_array)
457 src_init(&instr->arr.index);
458
459 dest_init(&instr->dest);
460
461 return instr;
462 }
463
464 nir_jump_instr *
465 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
466 {
467 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
468 instr_init(&instr->instr, nir_instr_type_jump);
469 instr->type = type;
470 return instr;
471 }
472
473 nir_load_const_instr *
474 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
475 unsigned bit_size)
476 {
477 nir_load_const_instr *instr =
478 rzalloc_size(shader, sizeof(*instr) + num_components * sizeof(*instr->value));
479 instr_init(&instr->instr, nir_instr_type_load_const);
480
481 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
482
483 return instr;
484 }
485
486 nir_intrinsic_instr *
487 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
488 {
489 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
490 /* TODO: don't use rzalloc */
491 nir_intrinsic_instr *instr =
492 rzalloc_size(shader,
493 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
494
495 instr_init(&instr->instr, nir_instr_type_intrinsic);
496 instr->intrinsic = op;
497
498 if (nir_intrinsic_infos[op].has_dest)
499 dest_init(&instr->dest);
500
501 for (unsigned i = 0; i < num_srcs; i++)
502 src_init(&instr->src[i]);
503
504 return instr;
505 }
506
507 nir_call_instr *
508 nir_call_instr_create(nir_shader *shader, nir_function *callee)
509 {
510 const unsigned num_params = callee->num_params;
511 nir_call_instr *instr =
512 rzalloc_size(shader, sizeof(*instr) +
513 num_params * sizeof(instr->params[0]));
514
515 instr_init(&instr->instr, nir_instr_type_call);
516 instr->callee = callee;
517 instr->num_params = num_params;
518 for (unsigned i = 0; i < num_params; i++)
519 src_init(&instr->params[i]);
520
521 return instr;
522 }
523
524 static int8_t default_tg4_offsets[4][2] =
525 {
526 { 0, 1 },
527 { 1, 1 },
528 { 1, 0 },
529 { 0, 0 },
530 };
531
532 nir_tex_instr *
533 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
534 {
535 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
536 instr_init(&instr->instr, nir_instr_type_tex);
537
538 dest_init(&instr->dest);
539
540 instr->num_srcs = num_srcs;
541 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
542 for (unsigned i = 0; i < num_srcs; i++)
543 src_init(&instr->src[i].src);
544
545 instr->texture_index = 0;
546 instr->texture_array_size = 0;
547 instr->sampler_index = 0;
548 memcpy(instr->tg4_offsets, default_tg4_offsets, sizeof(instr->tg4_offsets));
549
550 return instr;
551 }
552
553 void
554 nir_tex_instr_add_src(nir_tex_instr *tex,
555 nir_tex_src_type src_type,
556 nir_src src)
557 {
558 nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
559 tex->num_srcs + 1);
560
561 for (unsigned i = 0; i < tex->num_srcs; i++) {
562 new_srcs[i].src_type = tex->src[i].src_type;
563 nir_instr_move_src(&tex->instr, &new_srcs[i].src,
564 &tex->src[i].src);
565 }
566
567 ralloc_free(tex->src);
568 tex->src = new_srcs;
569
570 tex->src[tex->num_srcs].src_type = src_type;
571 nir_instr_rewrite_src(&tex->instr, &tex->src[tex->num_srcs].src, src);
572 tex->num_srcs++;
573 }
574
575 void
576 nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
577 {
578 assert(src_idx < tex->num_srcs);
579
580 /* First rewrite the source to NIR_SRC_INIT */
581 nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT);
582
583 /* Now, move all of the other sources down */
584 for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
585 tex->src[i-1].src_type = tex->src[i].src_type;
586 nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
587 }
588 tex->num_srcs--;
589 }
590
591 bool
592 nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex)
593 {
594 if (tex->op != nir_texop_tg4)
595 return false;
596 return memcmp(tex->tg4_offsets, default_tg4_offsets,
597 sizeof(tex->tg4_offsets)) != 0;
598 }
599
600 nir_phi_instr *
601 nir_phi_instr_create(nir_shader *shader)
602 {
603 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
604 instr_init(&instr->instr, nir_instr_type_phi);
605
606 dest_init(&instr->dest);
607 exec_list_make_empty(&instr->srcs);
608 return instr;
609 }
610
611 nir_parallel_copy_instr *
612 nir_parallel_copy_instr_create(nir_shader *shader)
613 {
614 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
615 instr_init(&instr->instr, nir_instr_type_parallel_copy);
616
617 exec_list_make_empty(&instr->entries);
618
619 return instr;
620 }
621
622 nir_ssa_undef_instr *
623 nir_ssa_undef_instr_create(nir_shader *shader,
624 unsigned num_components,
625 unsigned bit_size)
626 {
627 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
628 instr_init(&instr->instr, nir_instr_type_ssa_undef);
629
630 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
631
632 return instr;
633 }
634
635 static nir_const_value
636 const_value_float(double d, unsigned bit_size)
637 {
638 nir_const_value v;
639 memset(&v, 0, sizeof(v));
640 switch (bit_size) {
641 case 16: v.u16 = _mesa_float_to_half(d); break;
642 case 32: v.f32 = d; break;
643 case 64: v.f64 = d; break;
644 default:
645 unreachable("Invalid bit size");
646 }
647 return v;
648 }
649
650 static nir_const_value
651 const_value_int(int64_t i, unsigned bit_size)
652 {
653 nir_const_value v;
654 memset(&v, 0, sizeof(v));
655 switch (bit_size) {
656 case 1: v.b = i & 1; break;
657 case 8: v.i8 = i; break;
658 case 16: v.i16 = i; break;
659 case 32: v.i32 = i; break;
660 case 64: v.i64 = i; break;
661 default:
662 unreachable("Invalid bit size");
663 }
664 return v;
665 }
666
667 nir_const_value
668 nir_alu_binop_identity(nir_op binop, unsigned bit_size)
669 {
670 const int64_t max_int = (1ull << (bit_size - 1)) - 1;
671 const int64_t min_int = -max_int - 1;
672 switch (binop) {
673 case nir_op_iadd:
674 return const_value_int(0, bit_size);
675 case nir_op_fadd:
676 return const_value_float(0, bit_size);
677 case nir_op_imul:
678 return const_value_int(1, bit_size);
679 case nir_op_fmul:
680 return const_value_float(1, bit_size);
681 case nir_op_imin:
682 return const_value_int(max_int, bit_size);
683 case nir_op_umin:
684 return const_value_int(~0ull, bit_size);
685 case nir_op_fmin:
686 return const_value_float(INFINITY, bit_size);
687 case nir_op_imax:
688 return const_value_int(min_int, bit_size);
689 case nir_op_umax:
690 return const_value_int(0, bit_size);
691 case nir_op_fmax:
692 return const_value_float(-INFINITY, bit_size);
693 case nir_op_iand:
694 return const_value_int(~0ull, bit_size);
695 case nir_op_ior:
696 return const_value_int(0, bit_size);
697 case nir_op_ixor:
698 return const_value_int(0, bit_size);
699 default:
700 unreachable("Invalid reduction operation");
701 }
702 }
703
704 nir_function_impl *
705 nir_cf_node_get_function(nir_cf_node *node)
706 {
707 while (node->type != nir_cf_node_function) {
708 node = node->parent;
709 }
710
711 return nir_cf_node_as_function(node);
712 }
713
714 /* Reduces a cursor by trying to convert everything to after and trying to
715 * go up to block granularity when possible.
716 */
717 static nir_cursor
718 reduce_cursor(nir_cursor cursor)
719 {
720 switch (cursor.option) {
721 case nir_cursor_before_block:
722 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
723 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
724 if (exec_list_is_empty(&cursor.block->instr_list)) {
725 /* Empty block. After is as good as before. */
726 cursor.option = nir_cursor_after_block;
727 }
728 return cursor;
729
730 case nir_cursor_after_block:
731 return cursor;
732
733 case nir_cursor_before_instr: {
734 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
735 if (prev_instr) {
736 /* Before this instruction is after the previous */
737 cursor.instr = prev_instr;
738 cursor.option = nir_cursor_after_instr;
739 } else {
740 /* No previous instruction. Switch to before block */
741 cursor.block = cursor.instr->block;
742 cursor.option = nir_cursor_before_block;
743 }
744 return reduce_cursor(cursor);
745 }
746
747 case nir_cursor_after_instr:
748 if (nir_instr_next(cursor.instr) == NULL) {
749 /* This is the last instruction, switch to after block */
750 cursor.option = nir_cursor_after_block;
751 cursor.block = cursor.instr->block;
752 }
753 return cursor;
754
755 default:
756 unreachable("Inavlid cursor option");
757 }
758 }
759
760 bool
761 nir_cursors_equal(nir_cursor a, nir_cursor b)
762 {
763 /* Reduced cursors should be unique */
764 a = reduce_cursor(a);
765 b = reduce_cursor(b);
766
767 return a.block == b.block && a.option == b.option;
768 }
769
770 static bool
771 add_use_cb(nir_src *src, void *state)
772 {
773 nir_instr *instr = state;
774
775 src->parent_instr = instr;
776 list_addtail(&src->use_link,
777 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
778
779 return true;
780 }
781
782 static bool
783 add_ssa_def_cb(nir_ssa_def *def, void *state)
784 {
785 nir_instr *instr = state;
786
787 if (instr->block && def->index == UINT_MAX) {
788 nir_function_impl *impl =
789 nir_cf_node_get_function(&instr->block->cf_node);
790
791 def->index = impl->ssa_alloc++;
792 }
793
794 return true;
795 }
796
797 static bool
798 add_reg_def_cb(nir_dest *dest, void *state)
799 {
800 nir_instr *instr = state;
801
802 if (!dest->is_ssa) {
803 dest->reg.parent_instr = instr;
804 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
805 }
806
807 return true;
808 }
809
810 static void
811 add_defs_uses(nir_instr *instr)
812 {
813 nir_foreach_src(instr, add_use_cb, instr);
814 nir_foreach_dest(instr, add_reg_def_cb, instr);
815 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
816 }
817
818 void
819 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
820 {
821 switch (cursor.option) {
822 case nir_cursor_before_block:
823 /* Only allow inserting jumps into empty blocks. */
824 if (instr->type == nir_instr_type_jump)
825 assert(exec_list_is_empty(&cursor.block->instr_list));
826
827 instr->block = cursor.block;
828 add_defs_uses(instr);
829 exec_list_push_head(&cursor.block->instr_list, &instr->node);
830 break;
831 case nir_cursor_after_block: {
832 /* Inserting instructions after a jump is illegal. */
833 nir_instr *last = nir_block_last_instr(cursor.block);
834 assert(last == NULL || last->type != nir_instr_type_jump);
835 (void) last;
836
837 instr->block = cursor.block;
838 add_defs_uses(instr);
839 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
840 break;
841 }
842 case nir_cursor_before_instr:
843 assert(instr->type != nir_instr_type_jump);
844 instr->block = cursor.instr->block;
845 add_defs_uses(instr);
846 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
847 break;
848 case nir_cursor_after_instr:
849 /* Inserting instructions after a jump is illegal. */
850 assert(cursor.instr->type != nir_instr_type_jump);
851
852 /* Only allow inserting jumps at the end of the block. */
853 if (instr->type == nir_instr_type_jump)
854 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
855
856 instr->block = cursor.instr->block;
857 add_defs_uses(instr);
858 exec_node_insert_after(&cursor.instr->node, &instr->node);
859 break;
860 }
861
862 if (instr->type == nir_instr_type_jump)
863 nir_handle_add_jump(instr->block);
864 }
865
866 static bool
867 src_is_valid(const nir_src *src)
868 {
869 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
870 }
871
872 static bool
873 remove_use_cb(nir_src *src, void *state)
874 {
875 (void) state;
876
877 if (src_is_valid(src))
878 list_del(&src->use_link);
879
880 return true;
881 }
882
883 static bool
884 remove_def_cb(nir_dest *dest, void *state)
885 {
886 (void) state;
887
888 if (!dest->is_ssa)
889 list_del(&dest->reg.def_link);
890
891 return true;
892 }
893
894 static void
895 remove_defs_uses(nir_instr *instr)
896 {
897 nir_foreach_dest(instr, remove_def_cb, instr);
898 nir_foreach_src(instr, remove_use_cb, instr);
899 }
900
901 void nir_instr_remove_v(nir_instr *instr)
902 {
903 remove_defs_uses(instr);
904 exec_node_remove(&instr->node);
905
906 if (instr->type == nir_instr_type_jump) {
907 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
908 nir_handle_remove_jump(instr->block, jump_instr->type);
909 }
910 }
911
912 /*@}*/
913
914 void
915 nir_index_local_regs(nir_function_impl *impl)
916 {
917 unsigned index = 0;
918 foreach_list_typed(nir_register, reg, node, &impl->registers) {
919 reg->index = index++;
920 }
921 impl->reg_alloc = index;
922 }
923
924 static bool
925 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
926 {
927 return cb(&instr->dest.dest, state);
928 }
929
930 static bool
931 visit_deref_dest(nir_deref_instr *instr, nir_foreach_dest_cb cb, void *state)
932 {
933 return cb(&instr->dest, state);
934 }
935
936 static bool
937 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
938 void *state)
939 {
940 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
941 return cb(&instr->dest, state);
942
943 return true;
944 }
945
946 static bool
947 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
948 void *state)
949 {
950 return cb(&instr->dest, state);
951 }
952
953 static bool
954 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
955 {
956 return cb(&instr->dest, state);
957 }
958
959 static bool
960 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
961 nir_foreach_dest_cb cb, void *state)
962 {
963 nir_foreach_parallel_copy_entry(entry, instr) {
964 if (!cb(&entry->dest, state))
965 return false;
966 }
967
968 return true;
969 }
970
971 bool
972 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
973 {
974 switch (instr->type) {
975 case nir_instr_type_alu:
976 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
977 case nir_instr_type_deref:
978 return visit_deref_dest(nir_instr_as_deref(instr), cb, state);
979 case nir_instr_type_intrinsic:
980 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
981 case nir_instr_type_tex:
982 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
983 case nir_instr_type_phi:
984 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
985 case nir_instr_type_parallel_copy:
986 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
987 cb, state);
988
989 case nir_instr_type_load_const:
990 case nir_instr_type_ssa_undef:
991 case nir_instr_type_call:
992 case nir_instr_type_jump:
993 break;
994
995 default:
996 unreachable("Invalid instruction type");
997 break;
998 }
999
1000 return true;
1001 }
1002
1003 struct foreach_ssa_def_state {
1004 nir_foreach_ssa_def_cb cb;
1005 void *client_state;
1006 };
1007
1008 static inline bool
1009 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1010 {
1011 struct foreach_ssa_def_state *state = void_state;
1012
1013 if (dest->is_ssa)
1014 return state->cb(&dest->ssa, state->client_state);
1015 else
1016 return true;
1017 }
1018
1019 bool
1020 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1021 {
1022 switch (instr->type) {
1023 case nir_instr_type_alu:
1024 case nir_instr_type_deref:
1025 case nir_instr_type_tex:
1026 case nir_instr_type_intrinsic:
1027 case nir_instr_type_phi:
1028 case nir_instr_type_parallel_copy: {
1029 struct foreach_ssa_def_state foreach_state = {cb, state};
1030 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1031 }
1032
1033 case nir_instr_type_load_const:
1034 return cb(&nir_instr_as_load_const(instr)->def, state);
1035 case nir_instr_type_ssa_undef:
1036 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1037 case nir_instr_type_call:
1038 case nir_instr_type_jump:
1039 return true;
1040 default:
1041 unreachable("Invalid instruction type");
1042 }
1043 }
1044
1045 nir_ssa_def *
1046 nir_instr_ssa_def(nir_instr *instr)
1047 {
1048 switch (instr->type) {
1049 case nir_instr_type_alu:
1050 assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
1051 return &nir_instr_as_alu(instr)->dest.dest.ssa;
1052
1053 case nir_instr_type_deref:
1054 assert(nir_instr_as_deref(instr)->dest.is_ssa);
1055 return &nir_instr_as_deref(instr)->dest.ssa;
1056
1057 case nir_instr_type_tex:
1058 assert(nir_instr_as_tex(instr)->dest.is_ssa);
1059 return &nir_instr_as_tex(instr)->dest.ssa;
1060
1061 case nir_instr_type_intrinsic: {
1062 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1063 if (nir_intrinsic_infos[intrin->intrinsic].has_dest) {
1064 assert(intrin->dest.is_ssa);
1065 return &intrin->dest.ssa;
1066 } else {
1067 return NULL;
1068 }
1069 }
1070
1071 case nir_instr_type_phi:
1072 assert(nir_instr_as_phi(instr)->dest.is_ssa);
1073 return &nir_instr_as_phi(instr)->dest.ssa;
1074
1075 case nir_instr_type_parallel_copy:
1076 unreachable("Parallel copies are unsupported by this function");
1077
1078 case nir_instr_type_load_const:
1079 return &nir_instr_as_load_const(instr)->def;
1080
1081 case nir_instr_type_ssa_undef:
1082 return &nir_instr_as_ssa_undef(instr)->def;
1083
1084 case nir_instr_type_call:
1085 case nir_instr_type_jump:
1086 return NULL;
1087 }
1088
1089 unreachable("Invalid instruction type");
1090 }
1091
1092 static bool
1093 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1094 {
1095 if (!cb(src, state))
1096 return false;
1097 if (!src->is_ssa && src->reg.indirect)
1098 return cb(src->reg.indirect, state);
1099 return true;
1100 }
1101
1102 static bool
1103 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1104 {
1105 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1106 if (!visit_src(&instr->src[i].src, cb, state))
1107 return false;
1108
1109 return true;
1110 }
1111
1112 static bool
1113 visit_deref_instr_src(nir_deref_instr *instr,
1114 nir_foreach_src_cb cb, void *state)
1115 {
1116 if (instr->deref_type != nir_deref_type_var) {
1117 if (!visit_src(&instr->parent, cb, state))
1118 return false;
1119 }
1120
1121 if (instr->deref_type == nir_deref_type_array ||
1122 instr->deref_type == nir_deref_type_ptr_as_array) {
1123 if (!visit_src(&instr->arr.index, cb, state))
1124 return false;
1125 }
1126
1127 return true;
1128 }
1129
1130 static bool
1131 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1132 {
1133 for (unsigned i = 0; i < instr->num_srcs; i++) {
1134 if (!visit_src(&instr->src[i].src, cb, state))
1135 return false;
1136 }
1137
1138 return true;
1139 }
1140
1141 static bool
1142 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1143 void *state)
1144 {
1145 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1146 for (unsigned i = 0; i < num_srcs; i++) {
1147 if (!visit_src(&instr->src[i], cb, state))
1148 return false;
1149 }
1150
1151 return true;
1152 }
1153
1154 static bool
1155 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1156 {
1157 for (unsigned i = 0; i < instr->num_params; i++) {
1158 if (!visit_src(&instr->params[i], cb, state))
1159 return false;
1160 }
1161
1162 return true;
1163 }
1164
1165 static bool
1166 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1167 {
1168 nir_foreach_phi_src(src, instr) {
1169 if (!visit_src(&src->src, cb, state))
1170 return false;
1171 }
1172
1173 return true;
1174 }
1175
1176 static bool
1177 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1178 nir_foreach_src_cb cb, void *state)
1179 {
1180 nir_foreach_parallel_copy_entry(entry, instr) {
1181 if (!visit_src(&entry->src, cb, state))
1182 return false;
1183 }
1184
1185 return true;
1186 }
1187
1188 typedef struct {
1189 void *state;
1190 nir_foreach_src_cb cb;
1191 } visit_dest_indirect_state;
1192
1193 static bool
1194 visit_dest_indirect(nir_dest *dest, void *_state)
1195 {
1196 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1197
1198 if (!dest->is_ssa && dest->reg.indirect)
1199 return state->cb(dest->reg.indirect, state->state);
1200
1201 return true;
1202 }
1203
1204 bool
1205 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1206 {
1207 switch (instr->type) {
1208 case nir_instr_type_alu:
1209 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1210 return false;
1211 break;
1212 case nir_instr_type_deref:
1213 if (!visit_deref_instr_src(nir_instr_as_deref(instr), cb, state))
1214 return false;
1215 break;
1216 case nir_instr_type_intrinsic:
1217 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1218 return false;
1219 break;
1220 case nir_instr_type_tex:
1221 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1222 return false;
1223 break;
1224 case nir_instr_type_call:
1225 if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1226 return false;
1227 break;
1228 case nir_instr_type_load_const:
1229 /* Constant load instructions have no regular sources */
1230 break;
1231 case nir_instr_type_phi:
1232 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1233 return false;
1234 break;
1235 case nir_instr_type_parallel_copy:
1236 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1237 cb, state))
1238 return false;
1239 break;
1240 case nir_instr_type_jump:
1241 case nir_instr_type_ssa_undef:
1242 return true;
1243
1244 default:
1245 unreachable("Invalid instruction type");
1246 break;
1247 }
1248
1249 visit_dest_indirect_state dest_state;
1250 dest_state.state = state;
1251 dest_state.cb = cb;
1252 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1253 }
1254
1255 nir_const_value
1256 nir_const_value_for_float(double f, unsigned bit_size)
1257 {
1258 nir_const_value v;
1259 memset(&v, 0, sizeof(v));
1260
1261 switch (bit_size) {
1262 case 16:
1263 v.u16 = _mesa_float_to_half(f);
1264 break;
1265 case 32:
1266 v.f32 = f;
1267 break;
1268 case 64:
1269 v.f64 = f;
1270 break;
1271 default:
1272 unreachable("Invalid bit size");
1273 }
1274
1275 return v;
1276 }
1277
1278 double
1279 nir_const_value_as_float(nir_const_value value, unsigned bit_size)
1280 {
1281 switch (bit_size) {
1282 case 16: return _mesa_half_to_float(value.u16);
1283 case 32: return value.f32;
1284 case 64: return value.f64;
1285 default:
1286 unreachable("Invalid bit size");
1287 }
1288 }
1289
1290 nir_const_value *
1291 nir_src_as_const_value(nir_src src)
1292 {
1293 if (!src.is_ssa)
1294 return NULL;
1295
1296 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1297 return NULL;
1298
1299 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1300
1301 return load->value;
1302 }
1303
1304 /**
1305 * Returns true if the source is known to be dynamically uniform. Otherwise it
1306 * returns false which means it may or may not be dynamically uniform but it
1307 * can't be determined.
1308 */
1309 bool
1310 nir_src_is_dynamically_uniform(nir_src src)
1311 {
1312 if (!src.is_ssa)
1313 return false;
1314
1315 /* Constants are trivially dynamically uniform */
1316 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1317 return true;
1318
1319 /* As are uniform variables */
1320 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1321 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1322
1323 if (intr->intrinsic == nir_intrinsic_load_uniform)
1324 return true;
1325 }
1326
1327 /* Operating together dynamically uniform expressions produces a
1328 * dynamically uniform result
1329 */
1330 if (src.ssa->parent_instr->type == nir_instr_type_alu) {
1331 nir_alu_instr *alu = nir_instr_as_alu(src.ssa->parent_instr);
1332 for (int i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
1333 if (!nir_src_is_dynamically_uniform(alu->src[i].src))
1334 return false;
1335 }
1336
1337 return true;
1338 }
1339
1340 /* XXX: this could have many more tests, such as when a sampler function is
1341 * called with dynamically uniform arguments.
1342 */
1343 return false;
1344 }
1345
1346 static void
1347 src_remove_all_uses(nir_src *src)
1348 {
1349 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1350 if (!src_is_valid(src))
1351 continue;
1352
1353 list_del(&src->use_link);
1354 }
1355 }
1356
1357 static void
1358 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1359 {
1360 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1361 if (!src_is_valid(src))
1362 continue;
1363
1364 if (parent_instr) {
1365 src->parent_instr = parent_instr;
1366 if (src->is_ssa)
1367 list_addtail(&src->use_link, &src->ssa->uses);
1368 else
1369 list_addtail(&src->use_link, &src->reg.reg->uses);
1370 } else {
1371 assert(parent_if);
1372 src->parent_if = parent_if;
1373 if (src->is_ssa)
1374 list_addtail(&src->use_link, &src->ssa->if_uses);
1375 else
1376 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1377 }
1378 }
1379 }
1380
1381 void
1382 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1383 {
1384 assert(!src_is_valid(src) || src->parent_instr == instr);
1385
1386 src_remove_all_uses(src);
1387 *src = new_src;
1388 src_add_all_uses(src, instr, NULL);
1389 }
1390
1391 void
1392 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1393 {
1394 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1395
1396 src_remove_all_uses(dest);
1397 src_remove_all_uses(src);
1398 *dest = *src;
1399 *src = NIR_SRC_INIT;
1400 src_add_all_uses(dest, dest_instr, NULL);
1401 }
1402
1403 void
1404 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1405 {
1406 nir_src *src = &if_stmt->condition;
1407 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1408
1409 src_remove_all_uses(src);
1410 *src = new_src;
1411 src_add_all_uses(src, NULL, if_stmt);
1412 }
1413
1414 void
1415 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1416 {
1417 if (dest->is_ssa) {
1418 /* We can only overwrite an SSA destination if it has no uses. */
1419 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1420 } else {
1421 list_del(&dest->reg.def_link);
1422 if (dest->reg.indirect)
1423 src_remove_all_uses(dest->reg.indirect);
1424 }
1425
1426 /* We can't re-write with an SSA def */
1427 assert(!new_dest.is_ssa);
1428
1429 nir_dest_copy(dest, &new_dest, instr);
1430
1431 dest->reg.parent_instr = instr;
1432 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1433
1434 if (dest->reg.indirect)
1435 src_add_all_uses(dest->reg.indirect, instr, NULL);
1436 }
1437
1438 /* note: does *not* take ownership of 'name' */
1439 void
1440 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1441 unsigned num_components,
1442 unsigned bit_size, const char *name)
1443 {
1444 def->name = ralloc_strdup(instr, name);
1445 def->parent_instr = instr;
1446 list_inithead(&def->uses);
1447 list_inithead(&def->if_uses);
1448 def->num_components = num_components;
1449 def->bit_size = bit_size;
1450
1451 if (instr->block) {
1452 nir_function_impl *impl =
1453 nir_cf_node_get_function(&instr->block->cf_node);
1454
1455 def->index = impl->ssa_alloc++;
1456 } else {
1457 def->index = UINT_MAX;
1458 }
1459 }
1460
1461 /* note: does *not* take ownership of 'name' */
1462 void
1463 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1464 unsigned num_components, unsigned bit_size,
1465 const char *name)
1466 {
1467 dest->is_ssa = true;
1468 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1469 }
1470
1471 void
1472 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1473 {
1474 assert(!new_src.is_ssa || def != new_src.ssa);
1475
1476 nir_foreach_use_safe(use_src, def)
1477 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1478
1479 nir_foreach_if_use_safe(use_src, def)
1480 nir_if_rewrite_condition(use_src->parent_if, new_src);
1481 }
1482
1483 static bool
1484 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1485 {
1486 assert(start->block == end->block);
1487
1488 if (between->block != start->block)
1489 return false;
1490
1491 /* Search backwards looking for "between" */
1492 while (start != end) {
1493 if (between == end)
1494 return true;
1495
1496 end = nir_instr_prev(end);
1497 assert(end);
1498 }
1499
1500 return false;
1501 }
1502
1503 /* Replaces all uses of the given SSA def with the given source but only if
1504 * the use comes after the after_me instruction. This can be useful if you
1505 * are emitting code to fix up the result of some instruction: you can freely
1506 * use the result in that code and then call rewrite_uses_after and pass the
1507 * last fixup instruction as after_me and it will replace all of the uses you
1508 * want without touching the fixup code.
1509 *
1510 * This function assumes that after_me is in the same block as
1511 * def->parent_instr and that after_me comes after def->parent_instr.
1512 */
1513 void
1514 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1515 nir_instr *after_me)
1516 {
1517 if (new_src.is_ssa && def == new_src.ssa)
1518 return;
1519
1520 nir_foreach_use_safe(use_src, def) {
1521 assert(use_src->parent_instr != def->parent_instr);
1522 /* Since def already dominates all of its uses, the only way a use can
1523 * not be dominated by after_me is if it is between def and after_me in
1524 * the instruction list.
1525 */
1526 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1527 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1528 }
1529
1530 nir_foreach_if_use_safe(use_src, def)
1531 nir_if_rewrite_condition(use_src->parent_if, new_src);
1532 }
1533
1534 nir_component_mask_t
1535 nir_ssa_def_components_read(const nir_ssa_def *def)
1536 {
1537 nir_component_mask_t read_mask = 0;
1538 nir_foreach_use(use, def) {
1539 if (use->parent_instr->type == nir_instr_type_alu) {
1540 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1541 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1542 int src_idx = alu_src - &alu->src[0];
1543 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1544 read_mask |= nir_alu_instr_src_read_mask(alu, src_idx);
1545 } else {
1546 return (1 << def->num_components) - 1;
1547 }
1548 }
1549
1550 if (!list_empty(&def->if_uses))
1551 read_mask |= 1;
1552
1553 return read_mask;
1554 }
1555
1556 nir_block *
1557 nir_block_cf_tree_next(nir_block *block)
1558 {
1559 if (block == NULL) {
1560 /* nir_foreach_block_safe() will call this function on a NULL block
1561 * after the last iteration, but it won't use the result so just return
1562 * NULL here.
1563 */
1564 return NULL;
1565 }
1566
1567 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1568 if (cf_next)
1569 return nir_cf_node_cf_tree_first(cf_next);
1570
1571 nir_cf_node *parent = block->cf_node.parent;
1572
1573 switch (parent->type) {
1574 case nir_cf_node_if: {
1575 /* Are we at the end of the if? Go to the beginning of the else */
1576 nir_if *if_stmt = nir_cf_node_as_if(parent);
1577 if (block == nir_if_last_then_block(if_stmt))
1578 return nir_if_first_else_block(if_stmt);
1579
1580 assert(block == nir_if_last_else_block(if_stmt));
1581 /* fall through */
1582 }
1583
1584 case nir_cf_node_loop:
1585 return nir_cf_node_as_block(nir_cf_node_next(parent));
1586
1587 case nir_cf_node_function:
1588 return NULL;
1589
1590 default:
1591 unreachable("unknown cf node type");
1592 }
1593 }
1594
1595 nir_block *
1596 nir_block_cf_tree_prev(nir_block *block)
1597 {
1598 if (block == NULL) {
1599 /* do this for consistency with nir_block_cf_tree_next() */
1600 return NULL;
1601 }
1602
1603 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1604 if (cf_prev)
1605 return nir_cf_node_cf_tree_last(cf_prev);
1606
1607 nir_cf_node *parent = block->cf_node.parent;
1608
1609 switch (parent->type) {
1610 case nir_cf_node_if: {
1611 /* Are we at the beginning of the else? Go to the end of the if */
1612 nir_if *if_stmt = nir_cf_node_as_if(parent);
1613 if (block == nir_if_first_else_block(if_stmt))
1614 return nir_if_last_then_block(if_stmt);
1615
1616 assert(block == nir_if_first_then_block(if_stmt));
1617 /* fall through */
1618 }
1619
1620 case nir_cf_node_loop:
1621 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1622
1623 case nir_cf_node_function:
1624 return NULL;
1625
1626 default:
1627 unreachable("unknown cf node type");
1628 }
1629 }
1630
1631 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1632 {
1633 switch (node->type) {
1634 case nir_cf_node_function: {
1635 nir_function_impl *impl = nir_cf_node_as_function(node);
1636 return nir_start_block(impl);
1637 }
1638
1639 case nir_cf_node_if: {
1640 nir_if *if_stmt = nir_cf_node_as_if(node);
1641 return nir_if_first_then_block(if_stmt);
1642 }
1643
1644 case nir_cf_node_loop: {
1645 nir_loop *loop = nir_cf_node_as_loop(node);
1646 return nir_loop_first_block(loop);
1647 }
1648
1649 case nir_cf_node_block: {
1650 return nir_cf_node_as_block(node);
1651 }
1652
1653 default:
1654 unreachable("unknown node type");
1655 }
1656 }
1657
1658 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1659 {
1660 switch (node->type) {
1661 case nir_cf_node_function: {
1662 nir_function_impl *impl = nir_cf_node_as_function(node);
1663 return nir_impl_last_block(impl);
1664 }
1665
1666 case nir_cf_node_if: {
1667 nir_if *if_stmt = nir_cf_node_as_if(node);
1668 return nir_if_last_else_block(if_stmt);
1669 }
1670
1671 case nir_cf_node_loop: {
1672 nir_loop *loop = nir_cf_node_as_loop(node);
1673 return nir_loop_last_block(loop);
1674 }
1675
1676 case nir_cf_node_block: {
1677 return nir_cf_node_as_block(node);
1678 }
1679
1680 default:
1681 unreachable("unknown node type");
1682 }
1683 }
1684
1685 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1686 {
1687 if (node->type == nir_cf_node_block)
1688 return nir_block_cf_tree_next(nir_cf_node_as_block(node));
1689 else if (node->type == nir_cf_node_function)
1690 return NULL;
1691 else
1692 return nir_cf_node_as_block(nir_cf_node_next(node));
1693 }
1694
1695 nir_if *
1696 nir_block_get_following_if(nir_block *block)
1697 {
1698 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1699 return NULL;
1700
1701 if (nir_cf_node_is_last(&block->cf_node))
1702 return NULL;
1703
1704 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1705
1706 if (next_node->type != nir_cf_node_if)
1707 return NULL;
1708
1709 return nir_cf_node_as_if(next_node);
1710 }
1711
1712 nir_loop *
1713 nir_block_get_following_loop(nir_block *block)
1714 {
1715 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1716 return NULL;
1717
1718 if (nir_cf_node_is_last(&block->cf_node))
1719 return NULL;
1720
1721 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1722
1723 if (next_node->type != nir_cf_node_loop)
1724 return NULL;
1725
1726 return nir_cf_node_as_loop(next_node);
1727 }
1728
1729 void
1730 nir_index_blocks(nir_function_impl *impl)
1731 {
1732 unsigned index = 0;
1733
1734 if (impl->valid_metadata & nir_metadata_block_index)
1735 return;
1736
1737 nir_foreach_block(block, impl) {
1738 block->index = index++;
1739 }
1740
1741 /* The end_block isn't really part of the program, which is why its index
1742 * is >= num_blocks.
1743 */
1744 impl->num_blocks = impl->end_block->index = index;
1745 }
1746
1747 static bool
1748 index_ssa_def_cb(nir_ssa_def *def, void *state)
1749 {
1750 unsigned *index = (unsigned *) state;
1751 def->index = (*index)++;
1752
1753 return true;
1754 }
1755
1756 /**
1757 * The indices are applied top-to-bottom which has the very nice property
1758 * that, if A dominates B, then A->index <= B->index.
1759 */
1760 void
1761 nir_index_ssa_defs(nir_function_impl *impl)
1762 {
1763 unsigned index = 0;
1764
1765 nir_foreach_block(block, impl) {
1766 nir_foreach_instr(instr, block)
1767 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1768 }
1769
1770 impl->ssa_alloc = index;
1771 }
1772
1773 /**
1774 * The indices are applied top-to-bottom which has the very nice property
1775 * that, if A dominates B, then A->index <= B->index.
1776 */
1777 unsigned
1778 nir_index_instrs(nir_function_impl *impl)
1779 {
1780 unsigned index = 0;
1781
1782 nir_foreach_block(block, impl) {
1783 nir_foreach_instr(instr, block)
1784 instr->index = index++;
1785 }
1786
1787 return index;
1788 }
1789
1790 static nir_instr *
1791 cursor_next_instr(nir_cursor cursor)
1792 {
1793 switch (cursor.option) {
1794 case nir_cursor_before_block:
1795 for (nir_block *block = cursor.block; block;
1796 block = nir_block_cf_tree_next(block)) {
1797 nir_instr *instr = nir_block_first_instr(block);
1798 if (instr)
1799 return instr;
1800 }
1801 return NULL;
1802
1803 case nir_cursor_after_block:
1804 cursor.block = nir_block_cf_tree_next(cursor.block);
1805 if (cursor.block == NULL)
1806 return NULL;
1807
1808 cursor.option = nir_cursor_before_block;
1809 return cursor_next_instr(cursor);
1810
1811 case nir_cursor_before_instr:
1812 return cursor.instr;
1813
1814 case nir_cursor_after_instr:
1815 if (nir_instr_next(cursor.instr))
1816 return nir_instr_next(cursor.instr);
1817
1818 cursor.option = nir_cursor_after_block;
1819 cursor.block = cursor.instr->block;
1820 return cursor_next_instr(cursor);
1821 }
1822
1823 unreachable("Inavlid cursor option");
1824 }
1825
1826 static bool
1827 dest_is_ssa(nir_dest *dest, void *_state)
1828 {
1829 return dest->is_ssa;
1830 }
1831
1832 bool
1833 nir_function_impl_lower_instructions(nir_function_impl *impl,
1834 nir_instr_filter_cb filter,
1835 nir_lower_instr_cb lower,
1836 void *cb_data)
1837 {
1838 nir_builder b;
1839 nir_builder_init(&b, impl);
1840
1841 nir_metadata preserved = nir_metadata_block_index ||
1842 nir_metadata_dominance;
1843
1844 bool progress = false;
1845 nir_cursor iter = nir_before_cf_list(&impl->body);
1846 nir_instr *instr;
1847 while ((instr = cursor_next_instr(iter)) != NULL) {
1848 if (filter && !filter(instr, cb_data)) {
1849 iter = nir_after_instr(instr);
1850 continue;
1851 }
1852
1853 assert(nir_foreach_dest(instr, dest_is_ssa, NULL));
1854 nir_ssa_def *old_def = nir_instr_ssa_def(instr);
1855 if (old_def == NULL) {
1856 iter = nir_after_instr(instr);
1857 continue;
1858 }
1859
1860 /* We're about to ask the callback to generate a replacement for instr.
1861 * Save off the uses from instr's SSA def so we know what uses to
1862 * rewrite later. If we use nir_ssa_def_rewrite_uses, it fails in the
1863 * case where the generated replacement code uses the result of instr
1864 * itself. If we use nir_ssa_def_rewrite_uses_after (which is the
1865 * normal solution to this problem), it doesn't work well if control-
1866 * flow is inserted as part of the replacement, doesn't handle cases
1867 * where the replacement is something consumed by instr, and suffers
1868 * from performance issues. This is the only way to 100% guarantee
1869 * that we rewrite the correct set efficiently.
1870 */
1871 struct list_head old_uses, old_if_uses;
1872 list_replace(&old_def->uses, &old_uses);
1873 list_inithead(&old_def->uses);
1874 list_replace(&old_def->if_uses, &old_if_uses);
1875 list_inithead(&old_def->if_uses);
1876
1877 b.cursor = nir_after_instr(instr);
1878 nir_ssa_def *new_def = lower(&b, instr, cb_data);
1879 if (new_def) {
1880 assert(old_def != NULL);
1881 if (new_def->parent_instr->block != instr->block)
1882 preserved = nir_metadata_none;
1883
1884 nir_src new_src = nir_src_for_ssa(new_def);
1885 list_for_each_entry_safe(nir_src, use_src, &old_uses, use_link)
1886 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1887
1888 list_for_each_entry_safe(nir_src, use_src, &old_if_uses, use_link)
1889 nir_if_rewrite_condition(use_src->parent_if, new_src);
1890
1891 if (list_empty(&old_def->uses) && list_empty(&old_def->if_uses)) {
1892 iter = nir_instr_remove(instr);
1893 } else {
1894 iter = nir_after_instr(instr);
1895 }
1896 progress = true;
1897 } else {
1898 /* We didn't end up lowering after all. Put the uses back */
1899 if (old_def) {
1900 list_replace(&old_uses, &old_def->uses);
1901 list_replace(&old_if_uses, &old_def->if_uses);
1902 }
1903 iter = nir_after_instr(instr);
1904 }
1905 }
1906
1907 if (progress) {
1908 nir_metadata_preserve(impl, preserved);
1909 } else {
1910 #ifndef NDEBUG
1911 impl->valid_metadata &= ~nir_metadata_not_properly_reset;
1912 #endif
1913 }
1914
1915 return progress;
1916 }
1917
1918 bool
1919 nir_shader_lower_instructions(nir_shader *shader,
1920 nir_instr_filter_cb filter,
1921 nir_lower_instr_cb lower,
1922 void *cb_data)
1923 {
1924 bool progress = false;
1925
1926 nir_foreach_function(function, shader) {
1927 if (function->impl &&
1928 nir_function_impl_lower_instructions(function->impl,
1929 filter, lower, cb_data))
1930 progress = true;
1931 }
1932
1933 return progress;
1934 }
1935
1936 nir_intrinsic_op
1937 nir_intrinsic_from_system_value(gl_system_value val)
1938 {
1939 switch (val) {
1940 case SYSTEM_VALUE_VERTEX_ID:
1941 return nir_intrinsic_load_vertex_id;
1942 case SYSTEM_VALUE_INSTANCE_ID:
1943 return nir_intrinsic_load_instance_id;
1944 case SYSTEM_VALUE_DRAW_ID:
1945 return nir_intrinsic_load_draw_id;
1946 case SYSTEM_VALUE_BASE_INSTANCE:
1947 return nir_intrinsic_load_base_instance;
1948 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1949 return nir_intrinsic_load_vertex_id_zero_base;
1950 case SYSTEM_VALUE_IS_INDEXED_DRAW:
1951 return nir_intrinsic_load_is_indexed_draw;
1952 case SYSTEM_VALUE_FIRST_VERTEX:
1953 return nir_intrinsic_load_first_vertex;
1954 case SYSTEM_VALUE_BASE_VERTEX:
1955 return nir_intrinsic_load_base_vertex;
1956 case SYSTEM_VALUE_INVOCATION_ID:
1957 return nir_intrinsic_load_invocation_id;
1958 case SYSTEM_VALUE_FRAG_COORD:
1959 return nir_intrinsic_load_frag_coord;
1960 case SYSTEM_VALUE_POINT_COORD:
1961 return nir_intrinsic_load_point_coord;
1962 case SYSTEM_VALUE_FRONT_FACE:
1963 return nir_intrinsic_load_front_face;
1964 case SYSTEM_VALUE_SAMPLE_ID:
1965 return nir_intrinsic_load_sample_id;
1966 case SYSTEM_VALUE_SAMPLE_POS:
1967 return nir_intrinsic_load_sample_pos;
1968 case SYSTEM_VALUE_SAMPLE_MASK_IN:
1969 return nir_intrinsic_load_sample_mask_in;
1970 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1971 return nir_intrinsic_load_local_invocation_id;
1972 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
1973 return nir_intrinsic_load_local_invocation_index;
1974 case SYSTEM_VALUE_WORK_GROUP_ID:
1975 return nir_intrinsic_load_work_group_id;
1976 case SYSTEM_VALUE_NUM_WORK_GROUPS:
1977 return nir_intrinsic_load_num_work_groups;
1978 case SYSTEM_VALUE_PRIMITIVE_ID:
1979 return nir_intrinsic_load_primitive_id;
1980 case SYSTEM_VALUE_TESS_COORD:
1981 return nir_intrinsic_load_tess_coord;
1982 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1983 return nir_intrinsic_load_tess_level_outer;
1984 case SYSTEM_VALUE_TESS_LEVEL_INNER:
1985 return nir_intrinsic_load_tess_level_inner;
1986 case SYSTEM_VALUE_VERTICES_IN:
1987 return nir_intrinsic_load_patch_vertices_in;
1988 case SYSTEM_VALUE_HELPER_INVOCATION:
1989 return nir_intrinsic_load_helper_invocation;
1990 case SYSTEM_VALUE_COLOR0:
1991 return nir_intrinsic_load_color0;
1992 case SYSTEM_VALUE_COLOR1:
1993 return nir_intrinsic_load_color1;
1994 case SYSTEM_VALUE_VIEW_INDEX:
1995 return nir_intrinsic_load_view_index;
1996 case SYSTEM_VALUE_SUBGROUP_SIZE:
1997 return nir_intrinsic_load_subgroup_size;
1998 case SYSTEM_VALUE_SUBGROUP_INVOCATION:
1999 return nir_intrinsic_load_subgroup_invocation;
2000 case SYSTEM_VALUE_SUBGROUP_EQ_MASK:
2001 return nir_intrinsic_load_subgroup_eq_mask;
2002 case SYSTEM_VALUE_SUBGROUP_GE_MASK:
2003 return nir_intrinsic_load_subgroup_ge_mask;
2004 case SYSTEM_VALUE_SUBGROUP_GT_MASK:
2005 return nir_intrinsic_load_subgroup_gt_mask;
2006 case SYSTEM_VALUE_SUBGROUP_LE_MASK:
2007 return nir_intrinsic_load_subgroup_le_mask;
2008 case SYSTEM_VALUE_SUBGROUP_LT_MASK:
2009 return nir_intrinsic_load_subgroup_lt_mask;
2010 case SYSTEM_VALUE_NUM_SUBGROUPS:
2011 return nir_intrinsic_load_num_subgroups;
2012 case SYSTEM_VALUE_SUBGROUP_ID:
2013 return nir_intrinsic_load_subgroup_id;
2014 case SYSTEM_VALUE_LOCAL_GROUP_SIZE:
2015 return nir_intrinsic_load_local_group_size;
2016 case SYSTEM_VALUE_GLOBAL_INVOCATION_ID:
2017 return nir_intrinsic_load_global_invocation_id;
2018 case SYSTEM_VALUE_GLOBAL_INVOCATION_INDEX:
2019 return nir_intrinsic_load_global_invocation_index;
2020 case SYSTEM_VALUE_WORK_DIM:
2021 return nir_intrinsic_load_work_dim;
2022 default:
2023 unreachable("system value does not directly correspond to intrinsic");
2024 }
2025 }
2026
2027 gl_system_value
2028 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
2029 {
2030 switch (intrin) {
2031 case nir_intrinsic_load_vertex_id:
2032 return SYSTEM_VALUE_VERTEX_ID;
2033 case nir_intrinsic_load_instance_id:
2034 return SYSTEM_VALUE_INSTANCE_ID;
2035 case nir_intrinsic_load_draw_id:
2036 return SYSTEM_VALUE_DRAW_ID;
2037 case nir_intrinsic_load_base_instance:
2038 return SYSTEM_VALUE_BASE_INSTANCE;
2039 case nir_intrinsic_load_vertex_id_zero_base:
2040 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
2041 case nir_intrinsic_load_first_vertex:
2042 return SYSTEM_VALUE_FIRST_VERTEX;
2043 case nir_intrinsic_load_is_indexed_draw:
2044 return SYSTEM_VALUE_IS_INDEXED_DRAW;
2045 case nir_intrinsic_load_base_vertex:
2046 return SYSTEM_VALUE_BASE_VERTEX;
2047 case nir_intrinsic_load_invocation_id:
2048 return SYSTEM_VALUE_INVOCATION_ID;
2049 case nir_intrinsic_load_frag_coord:
2050 return SYSTEM_VALUE_FRAG_COORD;
2051 case nir_intrinsic_load_point_coord:
2052 return SYSTEM_VALUE_POINT_COORD;
2053 case nir_intrinsic_load_front_face:
2054 return SYSTEM_VALUE_FRONT_FACE;
2055 case nir_intrinsic_load_sample_id:
2056 return SYSTEM_VALUE_SAMPLE_ID;
2057 case nir_intrinsic_load_sample_pos:
2058 return SYSTEM_VALUE_SAMPLE_POS;
2059 case nir_intrinsic_load_sample_mask_in:
2060 return SYSTEM_VALUE_SAMPLE_MASK_IN;
2061 case nir_intrinsic_load_local_invocation_id:
2062 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
2063 case nir_intrinsic_load_local_invocation_index:
2064 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
2065 case nir_intrinsic_load_num_work_groups:
2066 return SYSTEM_VALUE_NUM_WORK_GROUPS;
2067 case nir_intrinsic_load_work_group_id:
2068 return SYSTEM_VALUE_WORK_GROUP_ID;
2069 case nir_intrinsic_load_primitive_id:
2070 return SYSTEM_VALUE_PRIMITIVE_ID;
2071 case nir_intrinsic_load_tess_coord:
2072 return SYSTEM_VALUE_TESS_COORD;
2073 case nir_intrinsic_load_tess_level_outer:
2074 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
2075 case nir_intrinsic_load_tess_level_inner:
2076 return SYSTEM_VALUE_TESS_LEVEL_INNER;
2077 case nir_intrinsic_load_patch_vertices_in:
2078 return SYSTEM_VALUE_VERTICES_IN;
2079 case nir_intrinsic_load_helper_invocation:
2080 return SYSTEM_VALUE_HELPER_INVOCATION;
2081 case nir_intrinsic_load_color0:
2082 return SYSTEM_VALUE_COLOR0;
2083 case nir_intrinsic_load_color1:
2084 return SYSTEM_VALUE_COLOR1;
2085 case nir_intrinsic_load_view_index:
2086 return SYSTEM_VALUE_VIEW_INDEX;
2087 case nir_intrinsic_load_subgroup_size:
2088 return SYSTEM_VALUE_SUBGROUP_SIZE;
2089 case nir_intrinsic_load_subgroup_invocation:
2090 return SYSTEM_VALUE_SUBGROUP_INVOCATION;
2091 case nir_intrinsic_load_subgroup_eq_mask:
2092 return SYSTEM_VALUE_SUBGROUP_EQ_MASK;
2093 case nir_intrinsic_load_subgroup_ge_mask:
2094 return SYSTEM_VALUE_SUBGROUP_GE_MASK;
2095 case nir_intrinsic_load_subgroup_gt_mask:
2096 return SYSTEM_VALUE_SUBGROUP_GT_MASK;
2097 case nir_intrinsic_load_subgroup_le_mask:
2098 return SYSTEM_VALUE_SUBGROUP_LE_MASK;
2099 case nir_intrinsic_load_subgroup_lt_mask:
2100 return SYSTEM_VALUE_SUBGROUP_LT_MASK;
2101 case nir_intrinsic_load_num_subgroups:
2102 return SYSTEM_VALUE_NUM_SUBGROUPS;
2103 case nir_intrinsic_load_subgroup_id:
2104 return SYSTEM_VALUE_SUBGROUP_ID;
2105 case nir_intrinsic_load_local_group_size:
2106 return SYSTEM_VALUE_LOCAL_GROUP_SIZE;
2107 case nir_intrinsic_load_global_invocation_id:
2108 return SYSTEM_VALUE_GLOBAL_INVOCATION_ID;
2109 default:
2110 unreachable("intrinsic doesn't produce a system value");
2111 }
2112 }
2113
2114 /* OpenGL utility method that remaps the location attributes if they are
2115 * doubles. Not needed for vulkan due the differences on the input location
2116 * count for doubles on vulkan vs OpenGL
2117 *
2118 * The bitfield returned in dual_slot is one bit for each double input slot in
2119 * the original OpenGL single-slot input numbering. The mapping from old
2120 * locations to new locations is as follows:
2121 *
2122 * new_loc = loc + util_bitcount(dual_slot & BITFIELD64_MASK(loc))
2123 */
2124 void
2125 nir_remap_dual_slot_attributes(nir_shader *shader, uint64_t *dual_slot)
2126 {
2127 assert(shader->info.stage == MESA_SHADER_VERTEX);
2128
2129 *dual_slot = 0;
2130 nir_foreach_variable(var, &shader->inputs) {
2131 if (glsl_type_is_dual_slot(glsl_without_array(var->type))) {
2132 unsigned slots = glsl_count_attribute_slots(var->type, true);
2133 *dual_slot |= BITFIELD64_MASK(slots) << var->data.location;
2134 }
2135 }
2136
2137 nir_foreach_variable(var, &shader->inputs) {
2138 var->data.location +=
2139 util_bitcount64(*dual_slot & BITFIELD64_MASK(var->data.location));
2140 }
2141 }
2142
2143 /* Returns an attribute mask that has been re-compacted using the given
2144 * dual_slot mask.
2145 */
2146 uint64_t
2147 nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot)
2148 {
2149 while (dual_slot) {
2150 unsigned loc = u_bit_scan64(&dual_slot);
2151 /* mask of all bits up to and including loc */
2152 uint64_t mask = BITFIELD64_MASK(loc + 1);
2153 attribs = (attribs & mask) | ((attribs & ~mask) >> 1);
2154 }
2155 return attribs;
2156 }
2157
2158 void
2159 nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *src,
2160 bool bindless)
2161 {
2162 switch (intrin->intrinsic) {
2163 #define CASE(op) \
2164 case nir_intrinsic_image_deref_##op: \
2165 intrin->intrinsic = bindless ? nir_intrinsic_bindless_image_##op \
2166 : nir_intrinsic_image_##op; \
2167 break;
2168 CASE(load)
2169 CASE(store)
2170 CASE(atomic_add)
2171 CASE(atomic_min)
2172 CASE(atomic_max)
2173 CASE(atomic_and)
2174 CASE(atomic_or)
2175 CASE(atomic_xor)
2176 CASE(atomic_exchange)
2177 CASE(atomic_comp_swap)
2178 CASE(atomic_fadd)
2179 CASE(size)
2180 CASE(samples)
2181 CASE(load_raw_intel)
2182 CASE(store_raw_intel)
2183 #undef CASE
2184 default:
2185 unreachable("Unhanded image intrinsic");
2186 }
2187
2188 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
2189 nir_variable *var = nir_deref_instr_get_variable(deref);
2190
2191 nir_intrinsic_set_image_dim(intrin, glsl_get_sampler_dim(deref->type));
2192 nir_intrinsic_set_image_array(intrin, glsl_sampler_type_is_array(deref->type));
2193 nir_intrinsic_set_format(intrin, var->data.image.format);
2194
2195 nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
2196 nir_src_for_ssa(src));
2197 }