3bfc2d1333bfbb87ff78224c97dd99e8709af145
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #define XXH_INLINE_ALL
45 #include "util/xxhash.h"
46 #include <stdio.h>
47
48 #ifndef NDEBUG
49 #include "util/debug.h"
50 #endif /* NDEBUG */
51
52 #include "nir_opcodes.h"
53
54 #if defined(_WIN32) && !defined(snprintf)
55 #define snprintf _snprintf
56 #endif
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #define NIR_FALSE 0u
63 #define NIR_TRUE (~0u)
64 #define NIR_MAX_VEC_COMPONENTS 16
65 #define NIR_MAX_MATRIX_COLUMNS 4
66 #define NIR_STREAM_PACKED (1 << 8)
67 typedef uint16_t nir_component_mask_t;
68
69 static inline bool
70 nir_num_components_valid(unsigned num_components)
71 {
72 return (num_components >= 1 &&
73 num_components <= 4) ||
74 num_components == 8 ||
75 num_components == 16;
76 }
77
78 /** Defines a cast function
79 *
80 * This macro defines a cast function from in_type to out_type where
81 * out_type is some structure type that contains a field of type out_type.
82 *
83 * Note that you have to be a bit careful as the generated cast function
84 * destroys constness.
85 */
86 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
87 type_field, type_value) \
88 static inline out_type * \
89 name(const in_type *parent) \
90 { \
91 assert(parent && parent->type_field == type_value); \
92 return exec_node_data(out_type, parent, field); \
93 }
94
95 struct nir_function;
96 struct nir_shader;
97 struct nir_instr;
98 struct nir_builder;
99
100
101 /**
102 * Description of built-in state associated with a uniform
103 *
104 * \sa nir_variable::state_slots
105 */
106 typedef struct {
107 gl_state_index16 tokens[STATE_LENGTH];
108 uint16_t swizzle;
109 } nir_state_slot;
110
111 typedef enum {
112 nir_var_shader_in = (1 << 0),
113 nir_var_shader_out = (1 << 1),
114 nir_var_shader_temp = (1 << 2),
115 nir_var_function_temp = (1 << 3),
116 nir_var_uniform = (1 << 4),
117 nir_var_mem_ubo = (1 << 5),
118 nir_var_system_value = (1 << 6),
119 nir_var_mem_ssbo = (1 << 7),
120 nir_var_mem_shared = (1 << 8),
121 nir_var_mem_global = (1 << 9),
122 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
123 nir_num_variable_modes = 11,
124 nir_var_all = (1 << nir_num_variable_modes) - 1,
125 } nir_variable_mode;
126
127 /**
128 * Rounding modes.
129 */
130 typedef enum {
131 nir_rounding_mode_undef = 0,
132 nir_rounding_mode_rtne = 1, /* round to nearest even */
133 nir_rounding_mode_ru = 2, /* round up */
134 nir_rounding_mode_rd = 3, /* round down */
135 nir_rounding_mode_rtz = 4, /* round towards zero */
136 } nir_rounding_mode;
137
138 typedef union {
139 bool b;
140 float f32;
141 double f64;
142 int8_t i8;
143 uint8_t u8;
144 int16_t i16;
145 uint16_t u16;
146 int32_t i32;
147 uint32_t u32;
148 int64_t i64;
149 uint64_t u64;
150 } nir_const_value;
151
152 #define nir_const_value_to_array(arr, c, components, m) \
153 { \
154 for (unsigned i = 0; i < components; ++i) \
155 arr[i] = c[i].m; \
156 } while (false)
157
158 static inline nir_const_value
159 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
160 {
161 nir_const_value v;
162 memset(&v, 0, sizeof(v));
163
164 switch (bit_size) {
165 case 1: v.b = x; break;
166 case 8: v.u8 = x; break;
167 case 16: v.u16 = x; break;
168 case 32: v.u32 = x; break;
169 case 64: v.u64 = x; break;
170 default:
171 unreachable("Invalid bit size");
172 }
173
174 return v;
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_int(int64_t i, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64) {
185 assert(i >= (-(1ll << (bit_size - 1))));
186 assert(i < (1ll << (bit_size - 1)));
187 }
188
189 return nir_const_value_for_raw_uint(i, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
194 {
195 nir_const_value v;
196 memset(&v, 0, sizeof(v));
197
198 assert(bit_size <= 64);
199 if (bit_size < 64)
200 assert(u < (1ull << bit_size));
201
202 return nir_const_value_for_raw_uint(u, bit_size);
203 }
204
205 static inline nir_const_value
206 nir_const_value_for_bool(bool b, unsigned bit_size)
207 {
208 /* Booleans use a 0/-1 convention */
209 return nir_const_value_for_int(-(int)b, bit_size);
210 }
211
212 /* This one isn't inline because it requires half-float conversion */
213 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
214
215 static inline int64_t
216 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 /* int1_t uses 0/-1 convention */
220 case 1: return -(int)value.b;
221 case 8: return value.i8;
222 case 16: return value.i16;
223 case 32: return value.i32;
224 case 64: return value.i64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline uint64_t
231 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
232 {
233 switch (bit_size) {
234 case 1: return value.b;
235 case 8: return value.u8;
236 case 16: return value.u16;
237 case 32: return value.u32;
238 case 64: return value.u64;
239 default:
240 unreachable("Invalid bit size");
241 }
242 }
243
244 static inline bool
245 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
246 {
247 int64_t i = nir_const_value_as_int(value, bit_size);
248
249 /* Booleans of any size use 0/-1 convention */
250 assert(i == 0 || i == -1);
251
252 return i;
253 }
254
255 /* This one isn't inline because it requires half-float conversion */
256 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
257
258 typedef struct nir_constant {
259 /**
260 * Value of the constant.
261 *
262 * The field used to back the values supplied by the constant is determined
263 * by the type associated with the \c nir_variable. Constants may be
264 * scalars, vectors, or matrices.
265 */
266 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
267
268 /* we could get this from the var->type but makes clone *much* easier to
269 * not have to care about the type.
270 */
271 unsigned num_elements;
272
273 /* Array elements / Structure Fields */
274 struct nir_constant **elements;
275 } nir_constant;
276
277 /**
278 * \brief Layout qualifiers for gl_FragDepth.
279 *
280 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
281 * with a layout qualifier.
282 */
283 typedef enum {
284 nir_depth_layout_none, /**< No depth layout is specified. */
285 nir_depth_layout_any,
286 nir_depth_layout_greater,
287 nir_depth_layout_less,
288 nir_depth_layout_unchanged
289 } nir_depth_layout;
290
291 /**
292 * Enum keeping track of how a variable was declared.
293 */
294 typedef enum {
295 /**
296 * Normal declaration.
297 */
298 nir_var_declared_normally = 0,
299
300 /**
301 * Variable is implicitly generated by the compiler and should not be
302 * visible via the API.
303 */
304 nir_var_hidden,
305 } nir_var_declaration_type;
306
307 /**
308 * Either a uniform, global variable, shader input, or shader output. Based on
309 * ir_variable - it should be easy to translate between the two.
310 */
311
312 typedef struct nir_variable {
313 struct exec_node node;
314
315 /**
316 * Declared type of the variable
317 */
318 const struct glsl_type *type;
319
320 /**
321 * Declared name of the variable
322 */
323 char *name;
324
325 struct nir_variable_data {
326 /**
327 * Storage class of the variable.
328 *
329 * \sa nir_variable_mode
330 */
331 unsigned mode:11;
332
333 /**
334 * Is the variable read-only?
335 *
336 * This is set for variables declared as \c const, shader inputs,
337 * and uniforms.
338 */
339 unsigned read_only:1;
340 unsigned centroid:1;
341 unsigned sample:1;
342 unsigned patch:1;
343 unsigned invariant:1;
344
345 /**
346 * Precision qualifier.
347 *
348 * In desktop GLSL we do not care about precision qualifiers at all, in
349 * fact, the spec says that precision qualifiers are ignored.
350 *
351 * To make things easy, we make it so that this field is always
352 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
353 * have the same precision value and the checks we add in the compiler
354 * for this field will never break a desktop shader compile.
355 */
356 unsigned precision:2;
357
358 /**
359 * Can this variable be coalesced with another?
360 *
361 * This is set by nir_lower_io_to_temporaries to say that any
362 * copies involving this variable should stay put. Propagating it can
363 * duplicate the resulting load/store, which is not wanted, and may
364 * result in a load/store of the variable with an indirect offset which
365 * the backend may not be able to handle.
366 */
367 unsigned cannot_coalesce:1;
368
369 /**
370 * When separate shader programs are enabled, only input/outputs between
371 * the stages of a multi-stage separate program can be safely removed
372 * from the shader interface. Other input/outputs must remains active.
373 *
374 * This is also used to make sure xfb varyings that are unused by the
375 * fragment shader are not removed.
376 */
377 unsigned always_active_io:1;
378
379 /**
380 * Interpolation mode for shader inputs / outputs
381 *
382 * \sa glsl_interp_mode
383 */
384 unsigned interpolation:3;
385
386 /**
387 * If non-zero, then this variable may be packed along with other variables
388 * into a single varying slot, so this offset should be applied when
389 * accessing components. For example, an offset of 1 means that the x
390 * component of this variable is actually stored in component y of the
391 * location specified by \c location.
392 */
393 unsigned location_frac:2;
394
395 /**
396 * If true, this variable represents an array of scalars that should
397 * be tightly packed. In other words, consecutive array elements
398 * should be stored one component apart, rather than one slot apart.
399 */
400 unsigned compact:1;
401
402 /**
403 * Whether this is a fragment shader output implicitly initialized with
404 * the previous contents of the specified render target at the
405 * framebuffer location corresponding to this shader invocation.
406 */
407 unsigned fb_fetch_output:1;
408
409 /**
410 * Non-zero if this variable is considered bindless as defined by
411 * ARB_bindless_texture.
412 */
413 unsigned bindless:1;
414
415 /**
416 * Was an explicit binding set in the shader?
417 */
418 unsigned explicit_binding:1;
419
420 /**
421 * Was the location explicitly set in the shader?
422 *
423 * If the location is explicitly set in the shader, it \b cannot be changed
424 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 * no effect).
426 */
427 unsigned explicit_location:1;
428
429 /**
430 * Was a transfer feedback buffer set in the shader?
431 */
432 unsigned explicit_xfb_buffer:1;
433
434 /**
435 * Was a transfer feedback stride set in the shader?
436 */
437 unsigned explicit_xfb_stride:1;
438
439 /**
440 * Was an explicit offset set in the shader?
441 */
442 unsigned explicit_offset:1;
443
444 /**
445 * Layout of the matrix. Uses glsl_matrix_layout values.
446 */
447 unsigned matrix_layout:2;
448
449 /**
450 * Non-zero if this variable was created by lowering a named interface
451 * block.
452 */
453 unsigned from_named_ifc_block:1;
454
455 /**
456 * How the variable was declared. See nir_var_declaration_type.
457 *
458 * This is used to detect variables generated by the compiler, so should
459 * not be visible via the API.
460 */
461 unsigned how_declared:2;
462
463 /**
464 * Is this variable per-view? If so, we know it must be an array with
465 * size corresponding to the number of views.
466 */
467 unsigned per_view:1;
468
469 /**
470 * \brief Layout qualifier for gl_FragDepth. See nir_depth_layout.
471 *
472 * This is not equal to \c ir_depth_layout_none if and only if this
473 * variable is \c gl_FragDepth and a layout qualifier is specified.
474 */
475 unsigned depth_layout:3;
476
477 /**
478 * Vertex stream output identifier.
479 *
480 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
481 * indicate the stream of the i-th component.
482 */
483 unsigned stream:9;
484
485 /**
486 * See gl_access_qualifier.
487 *
488 * Access flags for memory variables (SSBO/global), image uniforms, and
489 * bindless images in uniforms/inputs/outputs.
490 */
491 unsigned access:8;
492
493 /**
494 * Descriptor set binding for sampler or UBO.
495 */
496 unsigned descriptor_set:5;
497
498 /**
499 * output index for dual source blending.
500 */
501 unsigned index;
502
503 /**
504 * Initial binding point for a sampler or UBO.
505 *
506 * For array types, this represents the binding point for the first element.
507 */
508 unsigned binding;
509
510 /**
511 * Storage location of the base of this variable
512 *
513 * The precise meaning of this field depends on the nature of the variable.
514 *
515 * - Vertex shader input: one of the values from \c gl_vert_attrib.
516 * - Vertex shader output: one of the values from \c gl_varying_slot.
517 * - Geometry shader input: one of the values from \c gl_varying_slot.
518 * - Geometry shader output: one of the values from \c gl_varying_slot.
519 * - Fragment shader input: one of the values from \c gl_varying_slot.
520 * - Fragment shader output: one of the values from \c gl_frag_result.
521 * - Uniforms: Per-stage uniform slot number for default uniform block.
522 * - Uniforms: Index within the uniform block definition for UBO members.
523 * - Non-UBO Uniforms: uniform slot number.
524 * - Other: This field is not currently used.
525 *
526 * If the variable is a uniform, shader input, or shader output, and the
527 * slot has not been assigned, the value will be -1.
528 */
529 int location;
530
531 /**
532 * The actual location of the variable in the IR. Only valid for inputs,
533 * outputs, and uniforms (including samplers and images).
534 */
535 unsigned driver_location;
536
537 /**
538 * Location an atomic counter or transform feedback is stored at.
539 */
540 unsigned offset;
541
542 union {
543 struct {
544 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
545 enum pipe_format format;
546 } image;
547
548 struct {
549 /**
550 * Transform feedback buffer.
551 */
552 uint16_t buffer:2;
553
554 /**
555 * Transform feedback stride.
556 */
557 uint16_t stride;
558 } xfb;
559 };
560 } data;
561
562 /**
563 * Identifier for this variable generated by nir_index_vars() that is unique
564 * among other variables in the same exec_list.
565 */
566 unsigned index;
567
568 /* Number of nir_variable_data members */
569 uint16_t num_members;
570
571 /**
572 * Built-in state that backs this uniform
573 *
574 * Once set at variable creation, \c state_slots must remain invariant.
575 * This is because, ideally, this array would be shared by all clones of
576 * this variable in the IR tree. In other words, we'd really like for it
577 * to be a fly-weight.
578 *
579 * If the variable is not a uniform, \c num_state_slots will be zero and
580 * \c state_slots will be \c NULL.
581 */
582 /*@{*/
583 uint16_t num_state_slots; /**< Number of state slots used */
584 nir_state_slot *state_slots; /**< State descriptors. */
585 /*@}*/
586
587 /**
588 * Constant expression assigned in the initializer of the variable
589 *
590 * This field should only be used temporarily by creators of NIR shaders
591 * and then lower_constant_initializers can be used to get rid of them.
592 * Most of the rest of NIR ignores this field or asserts that it's NULL.
593 */
594 nir_constant *constant_initializer;
595
596 /**
597 * Global variable assigned in the initializer of the variable
598 * This field should only be used temporarily by creators of NIR shaders
599 * and then lower_constant_initializers can be used to get rid of them.
600 * Most of the rest of NIR ignores this field or asserts that it's NULL.
601 */
602 struct nir_variable *pointer_initializer;
603
604 /**
605 * For variables that are in an interface block or are an instance of an
606 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
607 *
608 * \sa ir_variable::location
609 */
610 const struct glsl_type *interface_type;
611
612 /**
613 * Description of per-member data for per-member struct variables
614 *
615 * This is used for variables which are actually an amalgamation of
616 * multiple entities such as a struct of built-in values or a struct of
617 * inputs each with their own layout specifier. This is only allowed on
618 * variables with a struct or array of array of struct type.
619 */
620 struct nir_variable_data *members;
621 } nir_variable;
622
623 static inline bool
624 _nir_shader_variable_has_mode(nir_variable *var, unsigned modes)
625 {
626 /* This isn't a shader variable */
627 assert(!(modes & nir_var_function_temp));
628 return var->data.mode & modes;
629 }
630
631 #define nir_foreach_variable_in_list(var, var_list) \
632 foreach_list_typed(nir_variable, var, node, var_list)
633
634 #define nir_foreach_variable_in_list_safe(var, var_list) \
635 foreach_list_typed_safe(nir_variable, var, node, var_list)
636
637 #define nir_foreach_variable_in_shader(var, shader) \
638 nir_foreach_variable_in_list(var, &(shader)->variables)
639
640 #define nir_foreach_variable_in_shader_safe(var, shader) \
641 nir_foreach_variable_in_list_safe(var, &(shader)->variables)
642
643 #define nir_foreach_variable_with_modes(var, shader, modes) \
644 nir_foreach_variable_in_shader(var, shader) \
645 if (_nir_shader_variable_has_mode(var, modes))
646
647 #define nir_foreach_variable_with_modes_safe(var, shader, modes) \
648 nir_foreach_variable_in_shader_safe(var, shader) \
649 if (_nir_shader_variable_has_mode(var, modes))
650
651 #define nir_foreach_shader_in_variable(var, shader) \
652 nir_foreach_variable_with_modes(var, shader, nir_var_shader_in)
653
654 #define nir_foreach_shader_in_variable_safe(var, shader) \
655 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_in)
656
657 #define nir_foreach_shader_out_variable(var, shader) \
658 nir_foreach_variable_with_modes(var, shader, nir_var_shader_out)
659
660 #define nir_foreach_shader_out_variable_safe(var, shader) \
661 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_out)
662
663 #define nir_foreach_uniform_variable(var, shader) \
664 nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
665
666 #define nir_foreach_uniform_variable_safe(var, shader) \
667 nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
668
669 static inline bool
670 nir_variable_is_global(const nir_variable *var)
671 {
672 return var->data.mode != nir_var_function_temp;
673 }
674
675 typedef struct nir_register {
676 struct exec_node node;
677
678 unsigned num_components; /** < number of vector components */
679 unsigned num_array_elems; /** < size of array (0 for no array) */
680
681 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
682 uint8_t bit_size;
683
684 /** generic register index. */
685 unsigned index;
686
687 /** only for debug purposes, can be NULL */
688 const char *name;
689
690 /** set of nir_srcs where this register is used (read from) */
691 struct list_head uses;
692
693 /** set of nir_dests where this register is defined (written to) */
694 struct list_head defs;
695
696 /** set of nir_ifs where this register is used as a condition */
697 struct list_head if_uses;
698 } nir_register;
699
700 #define nir_foreach_register(reg, reg_list) \
701 foreach_list_typed(nir_register, reg, node, reg_list)
702 #define nir_foreach_register_safe(reg, reg_list) \
703 foreach_list_typed_safe(nir_register, reg, node, reg_list)
704
705 typedef enum PACKED {
706 nir_instr_type_alu,
707 nir_instr_type_deref,
708 nir_instr_type_call,
709 nir_instr_type_tex,
710 nir_instr_type_intrinsic,
711 nir_instr_type_load_const,
712 nir_instr_type_jump,
713 nir_instr_type_ssa_undef,
714 nir_instr_type_phi,
715 nir_instr_type_parallel_copy,
716 } nir_instr_type;
717
718 typedef struct nir_instr {
719 struct exec_node node;
720 struct nir_block *block;
721 nir_instr_type type;
722
723 /* A temporary for optimization and analysis passes to use for storing
724 * flags. For instance, DCE uses this to store the "dead/live" info.
725 */
726 uint8_t pass_flags;
727
728 /** generic instruction index. */
729 unsigned index;
730 } nir_instr;
731
732 static inline nir_instr *
733 nir_instr_next(nir_instr *instr)
734 {
735 struct exec_node *next = exec_node_get_next(&instr->node);
736 if (exec_node_is_tail_sentinel(next))
737 return NULL;
738 else
739 return exec_node_data(nir_instr, next, node);
740 }
741
742 static inline nir_instr *
743 nir_instr_prev(nir_instr *instr)
744 {
745 struct exec_node *prev = exec_node_get_prev(&instr->node);
746 if (exec_node_is_head_sentinel(prev))
747 return NULL;
748 else
749 return exec_node_data(nir_instr, prev, node);
750 }
751
752 static inline bool
753 nir_instr_is_first(const nir_instr *instr)
754 {
755 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
756 }
757
758 static inline bool
759 nir_instr_is_last(const nir_instr *instr)
760 {
761 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
762 }
763
764 typedef struct nir_ssa_def {
765 /** for debugging only, can be NULL */
766 const char* name;
767
768 /** generic SSA definition index. */
769 unsigned index;
770
771 /** Index into the live_in and live_out bitfields */
772 unsigned live_index;
773
774 /** Instruction which produces this SSA value. */
775 nir_instr *parent_instr;
776
777 /** set of nir_instrs where this register is used (read from) */
778 struct list_head uses;
779
780 /** set of nir_ifs where this register is used as a condition */
781 struct list_head if_uses;
782
783 uint8_t num_components;
784
785 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
786 uint8_t bit_size;
787
788 /**
789 * True if this SSA value may have different values in different SIMD
790 * invocations of the shader. This is set by nir_divergence_analysis.
791 */
792 bool divergent;
793 } nir_ssa_def;
794
795 struct nir_src;
796
797 typedef struct {
798 nir_register *reg;
799 struct nir_src *indirect; /** < NULL for no indirect offset */
800 unsigned base_offset;
801
802 /* TODO use-def chain goes here */
803 } nir_reg_src;
804
805 typedef struct {
806 nir_instr *parent_instr;
807 struct list_head def_link;
808
809 nir_register *reg;
810 struct nir_src *indirect; /** < NULL for no indirect offset */
811 unsigned base_offset;
812
813 /* TODO def-use chain goes here */
814 } nir_reg_dest;
815
816 struct nir_if;
817
818 typedef struct nir_src {
819 union {
820 /** Instruction that consumes this value as a source. */
821 nir_instr *parent_instr;
822 struct nir_if *parent_if;
823 };
824
825 struct list_head use_link;
826
827 union {
828 nir_reg_src reg;
829 nir_ssa_def *ssa;
830 };
831
832 bool is_ssa;
833 } nir_src;
834
835 static inline nir_src
836 nir_src_init(void)
837 {
838 nir_src src = { { NULL } };
839 return src;
840 }
841
842 #define NIR_SRC_INIT nir_src_init()
843
844 #define nir_foreach_use(src, reg_or_ssa_def) \
845 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
846
847 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
848 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
849
850 #define nir_foreach_if_use(src, reg_or_ssa_def) \
851 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
852
853 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
854 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
855
856 typedef struct {
857 union {
858 nir_reg_dest reg;
859 nir_ssa_def ssa;
860 };
861
862 bool is_ssa;
863 } nir_dest;
864
865 static inline nir_dest
866 nir_dest_init(void)
867 {
868 nir_dest dest = { { { NULL } } };
869 return dest;
870 }
871
872 #define NIR_DEST_INIT nir_dest_init()
873
874 #define nir_foreach_def(dest, reg) \
875 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
876
877 #define nir_foreach_def_safe(dest, reg) \
878 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
879
880 static inline nir_src
881 nir_src_for_ssa(nir_ssa_def *def)
882 {
883 nir_src src = NIR_SRC_INIT;
884
885 src.is_ssa = true;
886 src.ssa = def;
887
888 return src;
889 }
890
891 static inline nir_src
892 nir_src_for_reg(nir_register *reg)
893 {
894 nir_src src = NIR_SRC_INIT;
895
896 src.is_ssa = false;
897 src.reg.reg = reg;
898 src.reg.indirect = NULL;
899 src.reg.base_offset = 0;
900
901 return src;
902 }
903
904 static inline nir_dest
905 nir_dest_for_reg(nir_register *reg)
906 {
907 nir_dest dest = NIR_DEST_INIT;
908
909 dest.reg.reg = reg;
910
911 return dest;
912 }
913
914 static inline unsigned
915 nir_src_bit_size(nir_src src)
916 {
917 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
918 }
919
920 static inline unsigned
921 nir_src_num_components(nir_src src)
922 {
923 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
924 }
925
926 static inline bool
927 nir_src_is_const(nir_src src)
928 {
929 return src.is_ssa &&
930 src.ssa->parent_instr->type == nir_instr_type_load_const;
931 }
932
933 static inline bool
934 nir_src_is_divergent(nir_src src)
935 {
936 assert(src.is_ssa);
937 return src.ssa->divergent;
938 }
939
940 static inline unsigned
941 nir_dest_bit_size(nir_dest dest)
942 {
943 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
944 }
945
946 static inline unsigned
947 nir_dest_num_components(nir_dest dest)
948 {
949 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
950 }
951
952 static inline bool
953 nir_dest_is_divergent(nir_dest dest)
954 {
955 assert(dest.is_ssa);
956 return dest.ssa.divergent;
957 }
958
959 /* Are all components the same, ie. .xxxx */
960 static inline bool
961 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
962 {
963 for (unsigned i = 1; i < nr_comp; i++)
964 if (swiz[i] != swiz[0])
965 return false;
966 return true;
967 }
968
969 /* Are all components sequential, ie. .yzw */
970 static inline bool
971 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
972 {
973 for (unsigned i = 1; i < nr_comp; i++)
974 if (swiz[i] != (swiz[0] + i))
975 return false;
976 return true;
977 }
978
979 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
980 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
981
982 typedef struct {
983 nir_src src;
984
985 /**
986 * \name input modifiers
987 */
988 /*@{*/
989 /**
990 * For inputs interpreted as floating point, flips the sign bit. For
991 * inputs interpreted as integers, performs the two's complement negation.
992 */
993 bool negate;
994
995 /**
996 * Clears the sign bit for floating point values, and computes the integer
997 * absolute value for integers. Note that the negate modifier acts after
998 * the absolute value modifier, therefore if both are set then all inputs
999 * will become negative.
1000 */
1001 bool abs;
1002 /*@}*/
1003
1004 /**
1005 * For each input component, says which component of the register it is
1006 * chosen from. Note that which elements of the swizzle are used and which
1007 * are ignored are based on the write mask for most opcodes - for example,
1008 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
1009 * a swizzle of {2, x, 1, 0} where x means "don't care."
1010 */
1011 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
1012 } nir_alu_src;
1013
1014 typedef struct {
1015 nir_dest dest;
1016
1017 /**
1018 * \name saturate output modifier
1019 *
1020 * Only valid for opcodes that output floating-point numbers. Clamps the
1021 * output to between 0.0 and 1.0 inclusive.
1022 */
1023
1024 bool saturate;
1025
1026 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
1027 } nir_alu_dest;
1028
1029 /** NIR sized and unsized types
1030 *
1031 * The values in this enum are carefully chosen so that the sized type is
1032 * just the unsized type OR the number of bits.
1033 */
1034 typedef enum PACKED {
1035 nir_type_invalid = 0, /* Not a valid type */
1036 nir_type_int = 2,
1037 nir_type_uint = 4,
1038 nir_type_bool = 6,
1039 nir_type_float = 128,
1040 nir_type_bool1 = 1 | nir_type_bool,
1041 nir_type_bool8 = 8 | nir_type_bool,
1042 nir_type_bool16 = 16 | nir_type_bool,
1043 nir_type_bool32 = 32 | nir_type_bool,
1044 nir_type_int1 = 1 | nir_type_int,
1045 nir_type_int8 = 8 | nir_type_int,
1046 nir_type_int16 = 16 | nir_type_int,
1047 nir_type_int32 = 32 | nir_type_int,
1048 nir_type_int64 = 64 | nir_type_int,
1049 nir_type_uint1 = 1 | nir_type_uint,
1050 nir_type_uint8 = 8 | nir_type_uint,
1051 nir_type_uint16 = 16 | nir_type_uint,
1052 nir_type_uint32 = 32 | nir_type_uint,
1053 nir_type_uint64 = 64 | nir_type_uint,
1054 nir_type_float16 = 16 | nir_type_float,
1055 nir_type_float32 = 32 | nir_type_float,
1056 nir_type_float64 = 64 | nir_type_float,
1057 } nir_alu_type;
1058
1059 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1060 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1061
1062 static inline unsigned
1063 nir_alu_type_get_type_size(nir_alu_type type)
1064 {
1065 return type & NIR_ALU_TYPE_SIZE_MASK;
1066 }
1067
1068 static inline nir_alu_type
1069 nir_alu_type_get_base_type(nir_alu_type type)
1070 {
1071 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1072 }
1073
1074 static inline nir_alu_type
1075 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1076 {
1077 switch (base_type) {
1078 case GLSL_TYPE_BOOL:
1079 return nir_type_bool1;
1080 break;
1081 case GLSL_TYPE_UINT:
1082 return nir_type_uint32;
1083 break;
1084 case GLSL_TYPE_INT:
1085 return nir_type_int32;
1086 break;
1087 case GLSL_TYPE_UINT16:
1088 return nir_type_uint16;
1089 break;
1090 case GLSL_TYPE_INT16:
1091 return nir_type_int16;
1092 break;
1093 case GLSL_TYPE_UINT8:
1094 return nir_type_uint8;
1095 case GLSL_TYPE_INT8:
1096 return nir_type_int8;
1097 case GLSL_TYPE_UINT64:
1098 return nir_type_uint64;
1099 break;
1100 case GLSL_TYPE_INT64:
1101 return nir_type_int64;
1102 break;
1103 case GLSL_TYPE_FLOAT:
1104 return nir_type_float32;
1105 break;
1106 case GLSL_TYPE_FLOAT16:
1107 return nir_type_float16;
1108 break;
1109 case GLSL_TYPE_DOUBLE:
1110 return nir_type_float64;
1111 break;
1112
1113 case GLSL_TYPE_SAMPLER:
1114 case GLSL_TYPE_IMAGE:
1115 case GLSL_TYPE_ATOMIC_UINT:
1116 case GLSL_TYPE_STRUCT:
1117 case GLSL_TYPE_INTERFACE:
1118 case GLSL_TYPE_ARRAY:
1119 case GLSL_TYPE_VOID:
1120 case GLSL_TYPE_SUBROUTINE:
1121 case GLSL_TYPE_FUNCTION:
1122 case GLSL_TYPE_ERROR:
1123 return nir_type_invalid;
1124 }
1125
1126 unreachable("unknown type");
1127 }
1128
1129 static inline nir_alu_type
1130 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1131 {
1132 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1133 }
1134
1135 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1136 nir_rounding_mode rnd);
1137
1138 static inline nir_op
1139 nir_op_vec(unsigned components)
1140 {
1141 switch (components) {
1142 case 1: return nir_op_mov;
1143 case 2: return nir_op_vec2;
1144 case 3: return nir_op_vec3;
1145 case 4: return nir_op_vec4;
1146 case 8: return nir_op_vec8;
1147 case 16: return nir_op_vec16;
1148 default: unreachable("bad component count");
1149 }
1150 }
1151
1152 static inline bool
1153 nir_op_is_vec(nir_op op)
1154 {
1155 switch (op) {
1156 case nir_op_mov:
1157 case nir_op_vec2:
1158 case nir_op_vec3:
1159 case nir_op_vec4:
1160 case nir_op_vec8:
1161 case nir_op_vec16:
1162 return true;
1163 default:
1164 return false;
1165 }
1166 }
1167
1168 static inline bool
1169 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1170 {
1171 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1172 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1173 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1174 }
1175
1176 static inline bool
1177 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1178 {
1179 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1180 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1181 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1182 }
1183
1184 static inline bool
1185 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1186 {
1187 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1188 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1189 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1190 }
1191
1192 static inline bool
1193 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1194 {
1195 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1196 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1197 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1198 }
1199
1200 static inline bool
1201 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1202 {
1203 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1204 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1205 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1206 }
1207
1208 static inline bool
1209 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1210 {
1211 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1212 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1213 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1214 }
1215
1216 static inline bool
1217 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1218 {
1219 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1220 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1221 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1222 }
1223
1224 static inline nir_rounding_mode
1225 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1226 nir_alu_type type)
1227 {
1228 if (nir_alu_type_get_base_type(type) != nir_type_float)
1229 return nir_rounding_mode_undef;
1230
1231 unsigned bit_size = nir_alu_type_get_type_size(type);
1232
1233 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1234 return nir_rounding_mode_rtz;
1235 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1236 return nir_rounding_mode_rtne;
1237 return nir_rounding_mode_undef;
1238 }
1239
1240 static inline bool
1241 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1242 {
1243 bool result =
1244 nir_has_any_rounding_mode_rtne(execution_mode) ||
1245 nir_has_any_rounding_mode_rtz(execution_mode);
1246 return result;
1247 }
1248
1249 typedef enum {
1250 /**
1251 * Operation where the first two sources are commutative.
1252 *
1253 * For 2-source operations, this just mathematical commutativity. Some
1254 * 3-source operations, like ffma, are only commutative in the first two
1255 * sources.
1256 */
1257 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1258 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1259 } nir_op_algebraic_property;
1260
1261 typedef struct {
1262 const char *name;
1263
1264 uint8_t num_inputs;
1265
1266 /**
1267 * The number of components in the output
1268 *
1269 * If non-zero, this is the size of the output and input sizes are
1270 * explicitly given; swizzle and writemask are still in effect, but if
1271 * the output component is masked out, then the input component may
1272 * still be in use.
1273 *
1274 * If zero, the opcode acts in the standard, per-component manner; the
1275 * operation is performed on each component (except the ones that are
1276 * masked out) with the input being taken from the input swizzle for
1277 * that component.
1278 *
1279 * The size of some of the inputs may be given (i.e. non-zero) even
1280 * though output_size is zero; in that case, the inputs with a zero
1281 * size act per-component, while the inputs with non-zero size don't.
1282 */
1283 uint8_t output_size;
1284
1285 /**
1286 * The type of vector that the instruction outputs. Note that the
1287 * staurate modifier is only allowed on outputs with the float type.
1288 */
1289
1290 nir_alu_type output_type;
1291
1292 /**
1293 * The number of components in each input
1294 */
1295 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1296
1297 /**
1298 * The type of vector that each input takes. Note that negate and
1299 * absolute value are only allowed on inputs with int or float type and
1300 * behave differently on the two.
1301 */
1302 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1303
1304 nir_op_algebraic_property algebraic_properties;
1305
1306 /* Whether this represents a numeric conversion opcode */
1307 bool is_conversion;
1308 } nir_op_info;
1309
1310 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1311
1312 typedef struct nir_alu_instr {
1313 nir_instr instr;
1314 nir_op op;
1315
1316 /** Indicates that this ALU instruction generates an exact value
1317 *
1318 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1319 * really equivalent to either. This indicates that the value generated by
1320 * this operation is high-precision and any code transformations that touch
1321 * it must ensure that the resulting value is bit-for-bit identical to the
1322 * original.
1323 */
1324 bool exact:1;
1325
1326 /**
1327 * Indicates that this instruction do not cause wrapping to occur, in the
1328 * form of overflow or underflow.
1329 */
1330 bool no_signed_wrap:1;
1331 bool no_unsigned_wrap:1;
1332
1333 nir_alu_dest dest;
1334 nir_alu_src src[];
1335 } nir_alu_instr;
1336
1337 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1338 nir_alu_instr *instr);
1339 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1340 nir_alu_instr *instr);
1341
1342 /* is this source channel used? */
1343 static inline bool
1344 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1345 unsigned channel)
1346 {
1347 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1348 return channel < nir_op_infos[instr->op].input_sizes[src];
1349
1350 return (instr->dest.write_mask >> channel) & 1;
1351 }
1352
1353 static inline nir_component_mask_t
1354 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1355 {
1356 nir_component_mask_t read_mask = 0;
1357 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1358 if (!nir_alu_instr_channel_used(instr, src, c))
1359 continue;
1360
1361 read_mask |= (1 << instr->src[src].swizzle[c]);
1362 }
1363 return read_mask;
1364 }
1365
1366 /**
1367 * Get the number of channels used for a source
1368 */
1369 static inline unsigned
1370 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1371 {
1372 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1373 return nir_op_infos[instr->op].input_sizes[src];
1374
1375 return nir_dest_num_components(instr->dest.dest);
1376 }
1377
1378 static inline bool
1379 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1380 {
1381 switch (instr->op) {
1382 case nir_op_flt:
1383 case nir_op_fge:
1384 case nir_op_feq:
1385 case nir_op_fneu:
1386 case nir_op_ilt:
1387 case nir_op_ult:
1388 case nir_op_ige:
1389 case nir_op_uge:
1390 case nir_op_ieq:
1391 case nir_op_ine:
1392 case nir_op_i2b1:
1393 case nir_op_f2b1:
1394 case nir_op_inot:
1395 return true;
1396 default:
1397 return false;
1398 }
1399 }
1400
1401 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1402 nir_alu_type full_type);
1403
1404 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1405 unsigned src1, unsigned src2);
1406
1407 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1408 const nir_alu_instr *alu2,
1409 unsigned src1, unsigned src2);
1410
1411 typedef enum {
1412 nir_deref_type_var,
1413 nir_deref_type_array,
1414 nir_deref_type_array_wildcard,
1415 nir_deref_type_ptr_as_array,
1416 nir_deref_type_struct,
1417 nir_deref_type_cast,
1418 } nir_deref_type;
1419
1420 typedef struct {
1421 nir_instr instr;
1422
1423 /** The type of this deref instruction */
1424 nir_deref_type deref_type;
1425
1426 /** The mode of the underlying variable */
1427 nir_variable_mode mode;
1428
1429 /** The dereferenced type of the resulting pointer value */
1430 const struct glsl_type *type;
1431
1432 union {
1433 /** Variable being dereferenced if deref_type is a deref_var */
1434 nir_variable *var;
1435
1436 /** Parent deref if deref_type is not deref_var */
1437 nir_src parent;
1438 };
1439
1440 /** Additional deref parameters */
1441 union {
1442 struct {
1443 nir_src index;
1444 } arr;
1445
1446 struct {
1447 unsigned index;
1448 } strct;
1449
1450 struct {
1451 unsigned ptr_stride;
1452 } cast;
1453 };
1454
1455 /** Destination to store the resulting "pointer" */
1456 nir_dest dest;
1457 } nir_deref_instr;
1458
1459 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1460
1461 static inline nir_deref_instr *
1462 nir_deref_instr_parent(const nir_deref_instr *instr)
1463 {
1464 if (instr->deref_type == nir_deref_type_var)
1465 return NULL;
1466 else
1467 return nir_src_as_deref(instr->parent);
1468 }
1469
1470 static inline nir_variable *
1471 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1472 {
1473 while (instr->deref_type != nir_deref_type_var) {
1474 if (instr->deref_type == nir_deref_type_cast)
1475 return NULL;
1476
1477 instr = nir_deref_instr_parent(instr);
1478 }
1479
1480 return instr->var;
1481 }
1482
1483 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1484 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1485 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1486
1487 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1488
1489 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1490
1491 typedef struct {
1492 nir_instr instr;
1493
1494 struct nir_function *callee;
1495
1496 unsigned num_params;
1497 nir_src params[];
1498 } nir_call_instr;
1499
1500 #include "nir_intrinsics.h"
1501
1502 #define NIR_INTRINSIC_MAX_CONST_INDEX 5
1503
1504 /** Represents an intrinsic
1505 *
1506 * An intrinsic is an instruction type for handling things that are
1507 * more-or-less regular operations but don't just consume and produce SSA
1508 * values like ALU operations do. Intrinsics are not for things that have
1509 * special semantic meaning such as phi nodes and parallel copies.
1510 * Examples of intrinsics include variable load/store operations, system
1511 * value loads, and the like. Even though texturing more-or-less falls
1512 * under this category, texturing is its own instruction type because
1513 * trying to represent texturing with intrinsics would lead to a
1514 * combinatorial explosion of intrinsic opcodes.
1515 *
1516 * By having a single instruction type for handling a lot of different
1517 * cases, optimization passes can look for intrinsics and, for the most
1518 * part, completely ignore them. Each intrinsic type also has a few
1519 * possible flags that govern whether or not they can be reordered or
1520 * eliminated. That way passes like dead code elimination can still work
1521 * on intrisics without understanding the meaning of each.
1522 *
1523 * Each intrinsic has some number of constant indices, some number of
1524 * variables, and some number of sources. What these sources, variables,
1525 * and indices mean depends on the intrinsic and is documented with the
1526 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1527 * instructions are the only types of instruction that can operate on
1528 * variables.
1529 */
1530 typedef struct {
1531 nir_instr instr;
1532
1533 nir_intrinsic_op intrinsic;
1534
1535 nir_dest dest;
1536
1537 /** number of components if this is a vectorized intrinsic
1538 *
1539 * Similarly to ALU operations, some intrinsics are vectorized.
1540 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1541 * For vectorized intrinsics, the num_components field specifies the
1542 * number of destination components and the number of source components
1543 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1544 */
1545 uint8_t num_components;
1546
1547 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1548
1549 nir_src src[];
1550 } nir_intrinsic_instr;
1551
1552 static inline nir_variable *
1553 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1554 {
1555 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1556 }
1557
1558 typedef enum {
1559 /* Memory ordering. */
1560 NIR_MEMORY_ACQUIRE = 1 << 0,
1561 NIR_MEMORY_RELEASE = 1 << 1,
1562 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1563
1564 /* Memory visibility operations. */
1565 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1566 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1567 } nir_memory_semantics;
1568
1569 typedef enum {
1570 NIR_SCOPE_NONE,
1571 NIR_SCOPE_INVOCATION,
1572 NIR_SCOPE_SUBGROUP,
1573 NIR_SCOPE_WORKGROUP,
1574 NIR_SCOPE_QUEUE_FAMILY,
1575 NIR_SCOPE_DEVICE,
1576 } nir_scope;
1577
1578 /**
1579 * \name NIR intrinsics semantic flags
1580 *
1581 * information about what the compiler can do with the intrinsics.
1582 *
1583 * \sa nir_intrinsic_info::flags
1584 */
1585 typedef enum {
1586 /**
1587 * whether the intrinsic can be safely eliminated if none of its output
1588 * value is not being used.
1589 */
1590 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1591
1592 /**
1593 * Whether the intrinsic can be reordered with respect to any other
1594 * intrinsic, i.e. whether the only reordering dependencies of the
1595 * intrinsic are due to the register reads/writes.
1596 */
1597 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1598 } nir_intrinsic_semantic_flag;
1599
1600 /**
1601 * \name NIR intrinsics const-index flag
1602 *
1603 * Indicates the usage of a const_index slot.
1604 *
1605 * \sa nir_intrinsic_info::index_map
1606 */
1607 typedef enum {
1608 /**
1609 * Generally instructions that take a offset src argument, can encode
1610 * a constant 'base' value which is added to the offset.
1611 */
1612 NIR_INTRINSIC_BASE = 1,
1613
1614 /**
1615 * For store instructions, a writemask for the store.
1616 */
1617 NIR_INTRINSIC_WRMASK,
1618
1619 /**
1620 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1621 */
1622 NIR_INTRINSIC_STREAM_ID,
1623
1624 /**
1625 * The clip-plane id for load_user_clip_plane intrinsic.
1626 */
1627 NIR_INTRINSIC_UCP_ID,
1628
1629 /**
1630 * The amount of data, starting from BASE, that this instruction may
1631 * access. This is used to provide bounds if the offset is not constant.
1632 */
1633 NIR_INTRINSIC_RANGE,
1634
1635 /**
1636 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1637 */
1638 NIR_INTRINSIC_DESC_SET,
1639
1640 /**
1641 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1642 */
1643 NIR_INTRINSIC_BINDING,
1644
1645 /**
1646 * Component offset.
1647 */
1648 NIR_INTRINSIC_COMPONENT,
1649
1650 /**
1651 * Interpolation mode (only meaningful for FS inputs).
1652 */
1653 NIR_INTRINSIC_INTERP_MODE,
1654
1655 /**
1656 * A binary nir_op to use when performing a reduction or scan operation
1657 */
1658 NIR_INTRINSIC_REDUCTION_OP,
1659
1660 /**
1661 * Cluster size for reduction operations
1662 */
1663 NIR_INTRINSIC_CLUSTER_SIZE,
1664
1665 /**
1666 * Parameter index for a load_param intrinsic
1667 */
1668 NIR_INTRINSIC_PARAM_IDX,
1669
1670 /**
1671 * Image dimensionality for image intrinsics
1672 *
1673 * One of GLSL_SAMPLER_DIM_*
1674 */
1675 NIR_INTRINSIC_IMAGE_DIM,
1676
1677 /**
1678 * Non-zero if we are accessing an array image
1679 */
1680 NIR_INTRINSIC_IMAGE_ARRAY,
1681
1682 /**
1683 * Image format for image intrinsics
1684 */
1685 NIR_INTRINSIC_FORMAT,
1686
1687 /**
1688 * Access qualifiers for image and memory access intrinsics
1689 */
1690 NIR_INTRINSIC_ACCESS,
1691
1692 /**
1693 * Alignment for offsets and addresses
1694 *
1695 * These two parameters, specify an alignment in terms of a multiplier and
1696 * an offset. The offset or address parameter X of the intrinsic is
1697 * guaranteed to satisfy the following:
1698 *
1699 * (X - align_offset) % align_mul == 0
1700 */
1701 NIR_INTRINSIC_ALIGN_MUL,
1702 NIR_INTRINSIC_ALIGN_OFFSET,
1703
1704 /**
1705 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1706 */
1707 NIR_INTRINSIC_DESC_TYPE,
1708
1709 /**
1710 * The nir_alu_type of a uniform/input/output
1711 */
1712 NIR_INTRINSIC_TYPE,
1713
1714 /**
1715 * The swizzle mask for the instructions
1716 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1717 */
1718 NIR_INTRINSIC_SWIZZLE_MASK,
1719
1720 /* Separate source/dest access flags for copies */
1721 NIR_INTRINSIC_SRC_ACCESS,
1722 NIR_INTRINSIC_DST_ACCESS,
1723
1724 /* Driver location for nir_load_patch_location_ir3 */
1725 NIR_INTRINSIC_DRIVER_LOCATION,
1726
1727 /**
1728 * Mask of nir_memory_semantics, includes ordering and visibility.
1729 */
1730 NIR_INTRINSIC_MEMORY_SEMANTICS,
1731
1732 /**
1733 * Mask of nir_variable_modes affected by the memory operation.
1734 */
1735 NIR_INTRINSIC_MEMORY_MODES,
1736
1737 /**
1738 * Value of nir_scope.
1739 */
1740 NIR_INTRINSIC_MEMORY_SCOPE,
1741
1742 /**
1743 * Value of nir_scope.
1744 */
1745 NIR_INTRINSIC_EXECUTION_SCOPE,
1746
1747 /**
1748 * Value of nir_io_semantics.
1749 */
1750 NIR_INTRINSIC_IO_SEMANTICS,
1751
1752 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1753
1754 } nir_intrinsic_index_flag;
1755
1756 typedef struct {
1757 unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
1758 unsigned num_slots:6; /* max 32, may be pessimistic with const indexing */
1759 unsigned dual_source_blend_index:1;
1760 unsigned fb_fetch_output:1; /* for GL_KHR_blend_equation_advanced */
1761 unsigned gs_streams:8; /* xxyyzzww: 2-bit stream index for each component */
1762 unsigned _pad:9;
1763 } nir_io_semantics;
1764
1765 #define NIR_INTRINSIC_MAX_INPUTS 5
1766
1767 typedef struct {
1768 const char *name;
1769
1770 uint8_t num_srcs; /** < number of register/SSA inputs */
1771
1772 /** number of components of each input register
1773 *
1774 * If this value is 0, the number of components is given by the
1775 * num_components field of nir_intrinsic_instr. If this value is -1, the
1776 * intrinsic consumes however many components are provided and it is not
1777 * validated at all.
1778 */
1779 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1780
1781 bool has_dest;
1782
1783 /** number of components of the output register
1784 *
1785 * If this value is 0, the number of components is given by the
1786 * num_components field of nir_intrinsic_instr.
1787 */
1788 uint8_t dest_components;
1789
1790 /** bitfield of legal bit sizes */
1791 uint8_t dest_bit_sizes;
1792
1793 /** the number of constant indices used by the intrinsic */
1794 uint8_t num_indices;
1795
1796 /** indicates the usage of intr->const_index[n] */
1797 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1798
1799 /** semantic flags for calls to this intrinsic */
1800 nir_intrinsic_semantic_flag flags;
1801 } nir_intrinsic_info;
1802
1803 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1804
1805 static inline unsigned
1806 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1807 {
1808 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1809 assert(srcn < info->num_srcs);
1810 if (info->src_components[srcn] > 0)
1811 return info->src_components[srcn];
1812 else if (info->src_components[srcn] == 0)
1813 return intr->num_components;
1814 else
1815 return nir_src_num_components(intr->src[srcn]);
1816 }
1817
1818 static inline unsigned
1819 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1820 {
1821 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1822 if (!info->has_dest)
1823 return 0;
1824 else if (info->dest_components)
1825 return info->dest_components;
1826 else
1827 return intr->num_components;
1828 }
1829
1830 /**
1831 * Helper to copy const_index[] from src to dst, without assuming they
1832 * match in order.
1833 */
1834 static inline void
1835 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1836 {
1837 if (src->intrinsic == dst->intrinsic) {
1838 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1839 return;
1840 }
1841
1842 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1843 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1844
1845 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1846 if (src_info->index_map[i] == 0)
1847 continue;
1848
1849 /* require that dst instruction also uses the same const_index[]: */
1850 assert(dst_info->index_map[i] > 0);
1851
1852 dst->const_index[dst_info->index_map[i] - 1] =
1853 src->const_index[src_info->index_map[i] - 1];
1854 }
1855 }
1856
1857 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1858 static inline type \
1859 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1860 { \
1861 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1862 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1863 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1864 } \
1865 static inline void \
1866 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1867 { \
1868 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1869 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1870 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1871 } \
1872 static inline bool \
1873 nir_intrinsic_has_##name(nir_intrinsic_instr *instr) \
1874 { \
1875 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1876 return info->index_map[NIR_INTRINSIC_##flag] > 0; \
1877 }
1878
1879 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1880 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1881 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1882 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1883 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1884 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1885 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1886 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1887 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1888 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1889 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1890 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1891 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1892 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1893 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1894 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1895 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1896 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1897 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1898 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1899 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1900 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1901 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1902 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1903 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1904 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1905 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1906 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1907
1908 static inline void
1909 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1910 unsigned align_mul, unsigned align_offset)
1911 {
1912 assert(util_is_power_of_two_nonzero(align_mul));
1913 assert(align_offset < align_mul);
1914 nir_intrinsic_set_align_mul(intrin, align_mul);
1915 nir_intrinsic_set_align_offset(intrin, align_offset);
1916 }
1917
1918 /** Returns a simple alignment for a load/store intrinsic offset
1919 *
1920 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1921 * and ALIGN_OFFSET parameters, this helper takes both into account and
1922 * provides a single simple alignment parameter. The offset X is guaranteed
1923 * to satisfy X % align == 0.
1924 */
1925 static inline unsigned
1926 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1927 {
1928 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1929 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1930 assert(align_offset < align_mul);
1931 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1932 }
1933
1934 static inline void
1935 nir_intrinsic_set_io_semantics(nir_intrinsic_instr *intrin,
1936 nir_io_semantics semantics)
1937 {
1938 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1939 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1940 STATIC_ASSERT(sizeof(nir_io_semantics) == sizeof(intrin->const_index[0]));
1941 semantics._pad = 0; /* clear padding bits */
1942 memcpy(&intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1943 &semantics, sizeof(semantics));
1944 }
1945
1946 static inline nir_io_semantics
1947 nir_intrinsic_io_semantics(const nir_intrinsic_instr *intrin)
1948 {
1949 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1950 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1951 nir_io_semantics semantics;
1952 memcpy(&semantics,
1953 &intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1954 sizeof(semantics));
1955 return semantics;
1956 }
1957
1958 unsigned
1959 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1960
1961 /* Converts a image_deref_* intrinsic into a image_* one */
1962 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1963 nir_ssa_def *handle, bool bindless);
1964
1965 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1966 static inline bool
1967 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1968 {
1969 if (instr->intrinsic == nir_intrinsic_load_deref ||
1970 instr->intrinsic == nir_intrinsic_load_ssbo ||
1971 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1972 instr->intrinsic == nir_intrinsic_image_deref_load ||
1973 instr->intrinsic == nir_intrinsic_image_load) {
1974 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1975 } else {
1976 const nir_intrinsic_info *info =
1977 &nir_intrinsic_infos[instr->intrinsic];
1978 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1979 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1980 }
1981 }
1982
1983 /**
1984 * \group texture information
1985 *
1986 * This gives semantic information about textures which is useful to the
1987 * frontend, the backend, and lowering passes, but not the optimizer.
1988 */
1989
1990 typedef enum {
1991 nir_tex_src_coord,
1992 nir_tex_src_projector,
1993 nir_tex_src_comparator, /* shadow comparator */
1994 nir_tex_src_offset,
1995 nir_tex_src_bias,
1996 nir_tex_src_lod,
1997 nir_tex_src_min_lod,
1998 nir_tex_src_ms_index, /* MSAA sample index */
1999 nir_tex_src_ms_mcs, /* MSAA compression value */
2000 nir_tex_src_ddx,
2001 nir_tex_src_ddy,
2002 nir_tex_src_texture_deref, /* < deref pointing to the texture */
2003 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
2004 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
2005 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
2006 nir_tex_src_texture_handle, /* < bindless texture handle */
2007 nir_tex_src_sampler_handle, /* < bindless sampler handle */
2008 nir_tex_src_plane, /* < selects plane for planar textures */
2009 nir_num_tex_src_types
2010 } nir_tex_src_type;
2011
2012 typedef struct {
2013 nir_src src;
2014 nir_tex_src_type src_type;
2015 } nir_tex_src;
2016
2017 typedef enum {
2018 nir_texop_tex, /**< Regular texture look-up */
2019 nir_texop_txb, /**< Texture look-up with LOD bias */
2020 nir_texop_txl, /**< Texture look-up with explicit LOD */
2021 nir_texop_txd, /**< Texture look-up with partial derivatives */
2022 nir_texop_txf, /**< Texel fetch with explicit LOD */
2023 nir_texop_txf_ms, /**< Multisample texture fetch */
2024 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
2025 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
2026 nir_texop_txs, /**< Texture size */
2027 nir_texop_lod, /**< Texture lod query */
2028 nir_texop_tg4, /**< Texture gather */
2029 nir_texop_query_levels, /**< Texture levels query */
2030 nir_texop_texture_samples, /**< Texture samples query */
2031 nir_texop_samples_identical, /**< Query whether all samples are definitely
2032 * identical.
2033 */
2034 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
2035 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
2036 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
2037 } nir_texop;
2038
2039 typedef struct {
2040 nir_instr instr;
2041
2042 enum glsl_sampler_dim sampler_dim;
2043 nir_alu_type dest_type;
2044
2045 nir_texop op;
2046 nir_dest dest;
2047 nir_tex_src *src;
2048 unsigned num_srcs, coord_components;
2049 bool is_array, is_shadow;
2050
2051 /**
2052 * If is_shadow is true, whether this is the old-style shadow that outputs 4
2053 * components or the new-style shadow that outputs 1 component.
2054 */
2055 bool is_new_style_shadow;
2056
2057 /* gather component selector */
2058 unsigned component : 2;
2059
2060 /* gather offsets */
2061 int8_t tg4_offsets[4][2];
2062
2063 /* True if the texture index or handle is not dynamically uniform */
2064 bool texture_non_uniform;
2065
2066 /* True if the sampler index or handle is not dynamically uniform */
2067 bool sampler_non_uniform;
2068
2069 /** The texture index
2070 *
2071 * If this texture instruction has a nir_tex_src_texture_offset source,
2072 * then the texture index is given by texture_index + texture_offset.
2073 */
2074 unsigned texture_index;
2075
2076 /** The sampler index
2077 *
2078 * The following operations do not require a sampler and, as such, this
2079 * field should be ignored:
2080 * - nir_texop_txf
2081 * - nir_texop_txf_ms
2082 * - nir_texop_txs
2083 * - nir_texop_lod
2084 * - nir_texop_query_levels
2085 * - nir_texop_texture_samples
2086 * - nir_texop_samples_identical
2087 *
2088 * If this texture instruction has a nir_tex_src_sampler_offset source,
2089 * then the sampler index is given by sampler_index + sampler_offset.
2090 */
2091 unsigned sampler_index;
2092 } nir_tex_instr;
2093
2094 /*
2095 * Returns true if the texture operation requires a sampler as a general rule,
2096 * see the documentation of sampler_index.
2097 *
2098 * Note that the specific hw/driver backend could require to a sampler
2099 * object/configuration packet in any case, for some other reason.
2100 */
2101 static inline bool
2102 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2103 {
2104 switch (instr->op) {
2105 case nir_texop_txf:
2106 case nir_texop_txf_ms:
2107 case nir_texop_txs:
2108 case nir_texop_lod:
2109 case nir_texop_query_levels:
2110 case nir_texop_texture_samples:
2111 case nir_texop_samples_identical:
2112 return false;
2113 default:
2114 return true;
2115 }
2116 }
2117
2118 static inline unsigned
2119 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2120 {
2121 switch (instr->op) {
2122 case nir_texop_txs: {
2123 unsigned ret;
2124 switch (instr->sampler_dim) {
2125 case GLSL_SAMPLER_DIM_1D:
2126 case GLSL_SAMPLER_DIM_BUF:
2127 ret = 1;
2128 break;
2129 case GLSL_SAMPLER_DIM_2D:
2130 case GLSL_SAMPLER_DIM_CUBE:
2131 case GLSL_SAMPLER_DIM_MS:
2132 case GLSL_SAMPLER_DIM_RECT:
2133 case GLSL_SAMPLER_DIM_EXTERNAL:
2134 case GLSL_SAMPLER_DIM_SUBPASS:
2135 ret = 2;
2136 break;
2137 case GLSL_SAMPLER_DIM_3D:
2138 ret = 3;
2139 break;
2140 default:
2141 unreachable("not reached");
2142 }
2143 if (instr->is_array)
2144 ret++;
2145 return ret;
2146 }
2147
2148 case nir_texop_lod:
2149 return 2;
2150
2151 case nir_texop_texture_samples:
2152 case nir_texop_query_levels:
2153 case nir_texop_samples_identical:
2154 case nir_texop_fragment_mask_fetch:
2155 return 1;
2156
2157 default:
2158 if (instr->is_shadow && instr->is_new_style_shadow)
2159 return 1;
2160
2161 return 4;
2162 }
2163 }
2164
2165 /* Returns true if this texture operation queries something about the texture
2166 * rather than actually sampling it.
2167 */
2168 static inline bool
2169 nir_tex_instr_is_query(const nir_tex_instr *instr)
2170 {
2171 switch (instr->op) {
2172 case nir_texop_txs:
2173 case nir_texop_lod:
2174 case nir_texop_texture_samples:
2175 case nir_texop_query_levels:
2176 case nir_texop_txf_ms_mcs:
2177 return true;
2178 case nir_texop_tex:
2179 case nir_texop_txb:
2180 case nir_texop_txl:
2181 case nir_texop_txd:
2182 case nir_texop_txf:
2183 case nir_texop_txf_ms:
2184 case nir_texop_txf_ms_fb:
2185 case nir_texop_tg4:
2186 return false;
2187 default:
2188 unreachable("Invalid texture opcode");
2189 }
2190 }
2191
2192 static inline bool
2193 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2194 {
2195 switch (instr->op) {
2196 case nir_texop_tex:
2197 case nir_texop_txb:
2198 case nir_texop_lod:
2199 return true;
2200 default:
2201 return false;
2202 }
2203 }
2204
2205 static inline nir_alu_type
2206 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2207 {
2208 switch (instr->src[src].src_type) {
2209 case nir_tex_src_coord:
2210 switch (instr->op) {
2211 case nir_texop_txf:
2212 case nir_texop_txf_ms:
2213 case nir_texop_txf_ms_fb:
2214 case nir_texop_txf_ms_mcs:
2215 case nir_texop_samples_identical:
2216 return nir_type_int;
2217
2218 default:
2219 return nir_type_float;
2220 }
2221
2222 case nir_tex_src_lod:
2223 switch (instr->op) {
2224 case nir_texop_txs:
2225 case nir_texop_txf:
2226 return nir_type_int;
2227
2228 default:
2229 return nir_type_float;
2230 }
2231
2232 case nir_tex_src_projector:
2233 case nir_tex_src_comparator:
2234 case nir_tex_src_bias:
2235 case nir_tex_src_min_lod:
2236 case nir_tex_src_ddx:
2237 case nir_tex_src_ddy:
2238 return nir_type_float;
2239
2240 case nir_tex_src_offset:
2241 case nir_tex_src_ms_index:
2242 case nir_tex_src_plane:
2243 return nir_type_int;
2244
2245 case nir_tex_src_ms_mcs:
2246 case nir_tex_src_texture_deref:
2247 case nir_tex_src_sampler_deref:
2248 case nir_tex_src_texture_offset:
2249 case nir_tex_src_sampler_offset:
2250 case nir_tex_src_texture_handle:
2251 case nir_tex_src_sampler_handle:
2252 return nir_type_uint;
2253
2254 case nir_num_tex_src_types:
2255 unreachable("nir_num_tex_src_types is not a valid source type");
2256 }
2257
2258 unreachable("Invalid texture source type");
2259 }
2260
2261 static inline unsigned
2262 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2263 {
2264 if (instr->src[src].src_type == nir_tex_src_coord)
2265 return instr->coord_components;
2266
2267 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2268 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2269 return 4;
2270
2271 if (instr->src[src].src_type == nir_tex_src_ddx ||
2272 instr->src[src].src_type == nir_tex_src_ddy) {
2273 if (instr->is_array)
2274 return instr->coord_components - 1;
2275 else
2276 return instr->coord_components;
2277 }
2278
2279 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2280 * the offset, since a cube maps to a single face.
2281 */
2282 if (instr->src[src].src_type == nir_tex_src_offset) {
2283 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2284 return 2;
2285 else if (instr->is_array)
2286 return instr->coord_components - 1;
2287 else
2288 return instr->coord_components;
2289 }
2290
2291 return 1;
2292 }
2293
2294 static inline int
2295 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2296 {
2297 for (unsigned i = 0; i < instr->num_srcs; i++)
2298 if (instr->src[i].src_type == type)
2299 return (int) i;
2300
2301 return -1;
2302 }
2303
2304 void nir_tex_instr_add_src(nir_tex_instr *tex,
2305 nir_tex_src_type src_type,
2306 nir_src src);
2307
2308 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2309
2310 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2311
2312 typedef struct {
2313 nir_instr instr;
2314
2315 nir_ssa_def def;
2316
2317 nir_const_value value[];
2318 } nir_load_const_instr;
2319
2320 typedef enum {
2321 /** Return from a function
2322 *
2323 * This instruction is a classic function return. It jumps to
2324 * nir_function_impl::end_block. No return value is provided in this
2325 * instruction. Instead, the function is expected to write any return
2326 * data to a deref passed in from the caller.
2327 */
2328 nir_jump_return,
2329
2330 /** Break out of the inner-most loop
2331 *
2332 * This has the same semantics as C's "break" statement.
2333 */
2334 nir_jump_break,
2335
2336 /** Jump back to the top of the inner-most loop
2337 *
2338 * This has the same semantics as C's "continue" statement assuming that a
2339 * NIR loop is implemented as "while (1) { body }".
2340 */
2341 nir_jump_continue,
2342
2343 /** Jumps for unstructured CFG.
2344 *
2345 * As within an unstructured CFG we can't rely on block ordering we need to
2346 * place explicit jumps at the end of every block.
2347 */
2348 nir_jump_goto,
2349 nir_jump_goto_if,
2350 } nir_jump_type;
2351
2352 typedef struct {
2353 nir_instr instr;
2354 nir_jump_type type;
2355 nir_src condition;
2356 struct nir_block *target;
2357 struct nir_block *else_target;
2358 } nir_jump_instr;
2359
2360 /* creates a new SSA variable in an undefined state */
2361
2362 typedef struct {
2363 nir_instr instr;
2364 nir_ssa_def def;
2365 } nir_ssa_undef_instr;
2366
2367 typedef struct {
2368 struct exec_node node;
2369
2370 /* The predecessor block corresponding to this source */
2371 struct nir_block *pred;
2372
2373 nir_src src;
2374 } nir_phi_src;
2375
2376 #define nir_foreach_phi_src(phi_src, phi) \
2377 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2378 #define nir_foreach_phi_src_safe(phi_src, phi) \
2379 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2380
2381 typedef struct {
2382 nir_instr instr;
2383
2384 struct exec_list srcs; /** < list of nir_phi_src */
2385
2386 nir_dest dest;
2387 } nir_phi_instr;
2388
2389 typedef struct {
2390 struct exec_node node;
2391 nir_src src;
2392 nir_dest dest;
2393 } nir_parallel_copy_entry;
2394
2395 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2396 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2397
2398 typedef struct {
2399 nir_instr instr;
2400
2401 /* A list of nir_parallel_copy_entrys. The sources of all of the
2402 * entries are copied to the corresponding destinations "in parallel".
2403 * In other words, if we have two entries: a -> b and b -> a, the values
2404 * get swapped.
2405 */
2406 struct exec_list entries;
2407 } nir_parallel_copy_instr;
2408
2409 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2410 type, nir_instr_type_alu)
2411 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2412 type, nir_instr_type_deref)
2413 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2414 type, nir_instr_type_call)
2415 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2416 type, nir_instr_type_jump)
2417 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2418 type, nir_instr_type_tex)
2419 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2420 type, nir_instr_type_intrinsic)
2421 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2422 type, nir_instr_type_load_const)
2423 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2424 type, nir_instr_type_ssa_undef)
2425 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2426 type, nir_instr_type_phi)
2427 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2428 nir_parallel_copy_instr, instr,
2429 type, nir_instr_type_parallel_copy)
2430
2431
2432 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2433 static inline type \
2434 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2435 { \
2436 assert(nir_src_is_const(src)); \
2437 nir_load_const_instr *load = \
2438 nir_instr_as_load_const(src.ssa->parent_instr); \
2439 assert(comp < load->def.num_components); \
2440 return nir_const_value_as_##suffix(load->value[comp], \
2441 load->def.bit_size); \
2442 } \
2443 \
2444 static inline type \
2445 nir_src_as_##suffix(nir_src src) \
2446 { \
2447 assert(nir_src_num_components(src) == 1); \
2448 return nir_src_comp_as_##suffix(src, 0); \
2449 }
2450
2451 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2452 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2453 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2454 NIR_DEFINE_SRC_AS_CONST(double, float)
2455
2456 #undef NIR_DEFINE_SRC_AS_CONST
2457
2458
2459 typedef struct {
2460 nir_ssa_def *def;
2461 unsigned comp;
2462 } nir_ssa_scalar;
2463
2464 static inline bool
2465 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2466 {
2467 return s.def->parent_instr->type == nir_instr_type_load_const;
2468 }
2469
2470 static inline nir_const_value
2471 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2472 {
2473 assert(s.comp < s.def->num_components);
2474 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2475 return load->value[s.comp];
2476 }
2477
2478 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2479 static inline type \
2480 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2481 { \
2482 return nir_const_value_as_##suffix( \
2483 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2484 }
2485
2486 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2487 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2488 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2489 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2490
2491 #undef NIR_DEFINE_SCALAR_AS_CONST
2492
2493 static inline bool
2494 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2495 {
2496 return s.def->parent_instr->type == nir_instr_type_alu;
2497 }
2498
2499 static inline nir_op
2500 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2501 {
2502 return nir_instr_as_alu(s.def->parent_instr)->op;
2503 }
2504
2505 static inline nir_ssa_scalar
2506 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2507 {
2508 nir_ssa_scalar out = { NULL, 0 };
2509
2510 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2511 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2512
2513 /* Our component must be written */
2514 assert(s.comp < s.def->num_components);
2515 assert(alu->dest.write_mask & (1u << s.comp));
2516
2517 assert(alu->src[alu_src_idx].src.is_ssa);
2518 out.def = alu->src[alu_src_idx].src.ssa;
2519
2520 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2521 /* The ALU src is unsized so the source component follows the
2522 * destination component.
2523 */
2524 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2525 } else {
2526 /* This is a sized source so all source components work together to
2527 * produce all the destination components. Since we need to return a
2528 * scalar, this only works if the source is a scalar.
2529 */
2530 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2531 out.comp = alu->src[alu_src_idx].swizzle[0];
2532 }
2533 assert(out.comp < out.def->num_components);
2534
2535 return out;
2536 }
2537
2538
2539 /*
2540 * Control flow
2541 *
2542 * Control flow consists of a tree of control flow nodes, which include
2543 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2544 * instructions that always run start-to-finish. Each basic block also keeps
2545 * track of its successors (blocks which may run immediately after the current
2546 * block) and predecessors (blocks which could have run immediately before the
2547 * current block). Each function also has a start block and an end block which
2548 * all return statements point to (which is always empty). Together, all the
2549 * blocks with their predecessors and successors make up the control flow
2550 * graph (CFG) of the function. There are helpers that modify the tree of
2551 * control flow nodes while modifying the CFG appropriately; these should be
2552 * used instead of modifying the tree directly.
2553 */
2554
2555 typedef enum {
2556 nir_cf_node_block,
2557 nir_cf_node_if,
2558 nir_cf_node_loop,
2559 nir_cf_node_function
2560 } nir_cf_node_type;
2561
2562 typedef struct nir_cf_node {
2563 struct exec_node node;
2564 nir_cf_node_type type;
2565 struct nir_cf_node *parent;
2566 } nir_cf_node;
2567
2568 typedef struct nir_block {
2569 nir_cf_node cf_node;
2570
2571 struct exec_list instr_list; /** < list of nir_instr */
2572
2573 /** generic block index; generated by nir_index_blocks */
2574 unsigned index;
2575
2576 /*
2577 * Each block can only have up to 2 successors, so we put them in a simple
2578 * array - no need for anything more complicated.
2579 */
2580 struct nir_block *successors[2];
2581
2582 /* Set of nir_block predecessors in the CFG */
2583 struct set *predecessors;
2584
2585 /*
2586 * this node's immediate dominator in the dominance tree - set to NULL for
2587 * the start block.
2588 */
2589 struct nir_block *imm_dom;
2590
2591 /* This node's children in the dominance tree */
2592 unsigned num_dom_children;
2593 struct nir_block **dom_children;
2594
2595 /* Set of nir_blocks on the dominance frontier of this block */
2596 struct set *dom_frontier;
2597
2598 /*
2599 * These two indices have the property that dom_{pre,post}_index for each
2600 * child of this block in the dominance tree will always be between
2601 * dom_pre_index and dom_post_index for this block, which makes testing if
2602 * a given block is dominated by another block an O(1) operation.
2603 */
2604 int16_t dom_pre_index, dom_post_index;
2605
2606 /* live in and out for this block; used for liveness analysis */
2607 BITSET_WORD *live_in;
2608 BITSET_WORD *live_out;
2609 } nir_block;
2610
2611 static inline bool
2612 nir_block_is_reachable(nir_block *b)
2613 {
2614 /* See also nir_block_dominates */
2615 return b->dom_post_index != -1;
2616 }
2617
2618 static inline nir_instr *
2619 nir_block_first_instr(nir_block *block)
2620 {
2621 struct exec_node *head = exec_list_get_head(&block->instr_list);
2622 return exec_node_data(nir_instr, head, node);
2623 }
2624
2625 static inline nir_instr *
2626 nir_block_last_instr(nir_block *block)
2627 {
2628 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2629 return exec_node_data(nir_instr, tail, node);
2630 }
2631
2632 static inline bool
2633 nir_block_ends_in_jump(nir_block *block)
2634 {
2635 return !exec_list_is_empty(&block->instr_list) &&
2636 nir_block_last_instr(block)->type == nir_instr_type_jump;
2637 }
2638
2639 #define nir_foreach_instr(instr, block) \
2640 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2641 #define nir_foreach_instr_reverse(instr, block) \
2642 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2643 #define nir_foreach_instr_safe(instr, block) \
2644 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2645 #define nir_foreach_instr_reverse_safe(instr, block) \
2646 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2647
2648 typedef enum {
2649 nir_selection_control_none = 0x0,
2650 nir_selection_control_flatten = 0x1,
2651 nir_selection_control_dont_flatten = 0x2,
2652 } nir_selection_control;
2653
2654 typedef struct nir_if {
2655 nir_cf_node cf_node;
2656 nir_src condition;
2657 nir_selection_control control;
2658
2659 struct exec_list then_list; /** < list of nir_cf_node */
2660 struct exec_list else_list; /** < list of nir_cf_node */
2661 } nir_if;
2662
2663 typedef struct {
2664 nir_if *nif;
2665
2666 /** Instruction that generates nif::condition. */
2667 nir_instr *conditional_instr;
2668
2669 /** Block within ::nif that has the break instruction. */
2670 nir_block *break_block;
2671
2672 /** Last block for the then- or else-path that does not contain the break. */
2673 nir_block *continue_from_block;
2674
2675 /** True when ::break_block is in the else-path of ::nif. */
2676 bool continue_from_then;
2677 bool induction_rhs;
2678
2679 /* This is true if the terminators exact trip count is unknown. For
2680 * example:
2681 *
2682 * for (int i = 0; i < imin(x, 4); i++)
2683 * ...
2684 *
2685 * Here loop analysis would have set a max_trip_count of 4 however we dont
2686 * know for sure that this is the exact trip count.
2687 */
2688 bool exact_trip_count_unknown;
2689
2690 struct list_head loop_terminator_link;
2691 } nir_loop_terminator;
2692
2693 typedef struct {
2694 /* Estimated cost (in number of instructions) of the loop */
2695 unsigned instr_cost;
2696
2697 /* Guessed trip count based on array indexing */
2698 unsigned guessed_trip_count;
2699
2700 /* Maximum number of times the loop is run (if known) */
2701 unsigned max_trip_count;
2702
2703 /* Do we know the exact number of times the loop will be run */
2704 bool exact_trip_count_known;
2705
2706 /* Unroll the loop regardless of its size */
2707 bool force_unroll;
2708
2709 /* Does the loop contain complex loop terminators, continues or other
2710 * complex behaviours? If this is true we can't rely on
2711 * loop_terminator_list to be complete or accurate.
2712 */
2713 bool complex_loop;
2714
2715 nir_loop_terminator *limiting_terminator;
2716
2717 /* A list of loop_terminators terminating this loop. */
2718 struct list_head loop_terminator_list;
2719 } nir_loop_info;
2720
2721 typedef enum {
2722 nir_loop_control_none = 0x0,
2723 nir_loop_control_unroll = 0x1,
2724 nir_loop_control_dont_unroll = 0x2,
2725 } nir_loop_control;
2726
2727 typedef struct {
2728 nir_cf_node cf_node;
2729
2730 struct exec_list body; /** < list of nir_cf_node */
2731
2732 nir_loop_info *info;
2733 nir_loop_control control;
2734 bool partially_unrolled;
2735 } nir_loop;
2736
2737 /**
2738 * Various bits of metadata that can may be created or required by
2739 * optimization and analysis passes
2740 */
2741 typedef enum {
2742 nir_metadata_none = 0x0,
2743
2744 /** Indicates that nir_block::index values are valid.
2745 *
2746 * The start block has index 0 and they increase through a natural walk of
2747 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2748 * every block index is in the range [0, nir_function_impl::num_blocks].
2749 *
2750 * A pass can preserve this metadata type if it doesn't touch the CFG.
2751 */
2752 nir_metadata_block_index = 0x1,
2753
2754 /** Indicates that block dominance information is valid
2755 *
2756 * This includes:
2757 *
2758 * - nir_block::num_dom_children
2759 * - nir_block::dom_children
2760 * - nir_block::dom_frontier
2761 * - nir_block::dom_pre_index
2762 * - nir_block::dom_post_index
2763 *
2764 * A pass can preserve this metadata type if it doesn't touch the CFG.
2765 */
2766 nir_metadata_dominance = 0x2,
2767
2768 /** Indicates that SSA def data-flow liveness information is valid
2769 *
2770 * This includes:
2771 *
2772 * - nir_ssa_def::live_index
2773 * - nir_block::live_in
2774 * - nir_block::live_out
2775 *
2776 * A pass can preserve this metadata type if it never adds or removes any
2777 * SSA defs (most passes shouldn't preserve this metadata type).
2778 */
2779 nir_metadata_live_ssa_defs = 0x4,
2780
2781 /** A dummy metadata value to track when a pass forgot to call
2782 * nir_metadata_preserve.
2783 *
2784 * A pass should always clear this value even if it doesn't make any
2785 * progress to indicate that it thought about preserving metadata.
2786 */
2787 nir_metadata_not_properly_reset = 0x8,
2788
2789 /** Indicates that loop analysis information is valid.
2790 *
2791 * This includes everything pointed to by nir_loop::info.
2792 *
2793 * A pass can preserve this metadata type if it is guaranteed to not affect
2794 * any loop metadata. However, since loop metadata includes things like
2795 * loop counts which depend on arithmetic in the loop, this is very hard to
2796 * determine. Most passes shouldn't preserve this metadata type.
2797 */
2798 nir_metadata_loop_analysis = 0x10,
2799
2800 /** All metadata
2801 *
2802 * This includes all nir_metadata flags except not_properly_reset. Passes
2803 * which do not change the shader in any way should call
2804 *
2805 * nir_metadata_preserve(impl, nir_metadata_all);
2806 */
2807 nir_metadata_all = ~nir_metadata_not_properly_reset,
2808 } nir_metadata;
2809
2810 typedef struct {
2811 nir_cf_node cf_node;
2812
2813 /** pointer to the function of which this is an implementation */
2814 struct nir_function *function;
2815
2816 struct exec_list body; /** < list of nir_cf_node */
2817
2818 nir_block *end_block;
2819
2820 /** list for all local variables in the function */
2821 struct exec_list locals;
2822
2823 /** list of local registers in the function */
2824 struct exec_list registers;
2825
2826 /** next available local register index */
2827 unsigned reg_alloc;
2828
2829 /** next available SSA value index */
2830 unsigned ssa_alloc;
2831
2832 /* total number of basic blocks, only valid when block_index_dirty = false */
2833 unsigned num_blocks;
2834
2835 /** True if this nir_function_impl uses structured control-flow
2836 *
2837 * Structured nir_function_impls have different validation rules.
2838 */
2839 bool structured;
2840
2841 nir_metadata valid_metadata;
2842 } nir_function_impl;
2843
2844 #define nir_foreach_function_temp_variable(var, impl) \
2845 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2846
2847 #define nir_foreach_function_temp_variable_safe(var, impl) \
2848 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2849
2850 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2851 nir_start_block(nir_function_impl *impl)
2852 {
2853 return (nir_block *) impl->body.head_sentinel.next;
2854 }
2855
2856 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2857 nir_impl_last_block(nir_function_impl *impl)
2858 {
2859 return (nir_block *) impl->body.tail_sentinel.prev;
2860 }
2861
2862 static inline nir_cf_node *
2863 nir_cf_node_next(nir_cf_node *node)
2864 {
2865 struct exec_node *next = exec_node_get_next(&node->node);
2866 if (exec_node_is_tail_sentinel(next))
2867 return NULL;
2868 else
2869 return exec_node_data(nir_cf_node, next, node);
2870 }
2871
2872 static inline nir_cf_node *
2873 nir_cf_node_prev(nir_cf_node *node)
2874 {
2875 struct exec_node *prev = exec_node_get_prev(&node->node);
2876 if (exec_node_is_head_sentinel(prev))
2877 return NULL;
2878 else
2879 return exec_node_data(nir_cf_node, prev, node);
2880 }
2881
2882 static inline bool
2883 nir_cf_node_is_first(const nir_cf_node *node)
2884 {
2885 return exec_node_is_head_sentinel(node->node.prev);
2886 }
2887
2888 static inline bool
2889 nir_cf_node_is_last(const nir_cf_node *node)
2890 {
2891 return exec_node_is_tail_sentinel(node->node.next);
2892 }
2893
2894 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2895 type, nir_cf_node_block)
2896 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2897 type, nir_cf_node_if)
2898 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2899 type, nir_cf_node_loop)
2900 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2901 nir_function_impl, cf_node, type, nir_cf_node_function)
2902
2903 static inline nir_block *
2904 nir_if_first_then_block(nir_if *if_stmt)
2905 {
2906 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2907 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2908 }
2909
2910 static inline nir_block *
2911 nir_if_last_then_block(nir_if *if_stmt)
2912 {
2913 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2914 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2915 }
2916
2917 static inline nir_block *
2918 nir_if_first_else_block(nir_if *if_stmt)
2919 {
2920 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2921 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2922 }
2923
2924 static inline nir_block *
2925 nir_if_last_else_block(nir_if *if_stmt)
2926 {
2927 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2928 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2929 }
2930
2931 static inline nir_block *
2932 nir_loop_first_block(nir_loop *loop)
2933 {
2934 struct exec_node *head = exec_list_get_head(&loop->body);
2935 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2936 }
2937
2938 static inline nir_block *
2939 nir_loop_last_block(nir_loop *loop)
2940 {
2941 struct exec_node *tail = exec_list_get_tail(&loop->body);
2942 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2943 }
2944
2945 /**
2946 * Return true if this list of cf_nodes contains a single empty block.
2947 */
2948 static inline bool
2949 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2950 {
2951 if (exec_list_is_singular(cf_list)) {
2952 struct exec_node *head = exec_list_get_head(cf_list);
2953 nir_block *block =
2954 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2955 return exec_list_is_empty(&block->instr_list);
2956 }
2957 return false;
2958 }
2959
2960 typedef struct {
2961 uint8_t num_components;
2962 uint8_t bit_size;
2963 } nir_parameter;
2964
2965 typedef struct nir_function {
2966 struct exec_node node;
2967
2968 const char *name;
2969 struct nir_shader *shader;
2970
2971 unsigned num_params;
2972 nir_parameter *params;
2973
2974 /** The implementation of this function.
2975 *
2976 * If the function is only declared and not implemented, this is NULL.
2977 */
2978 nir_function_impl *impl;
2979
2980 bool is_entrypoint;
2981 } nir_function;
2982
2983 typedef enum {
2984 nir_lower_imul64 = (1 << 0),
2985 nir_lower_isign64 = (1 << 1),
2986 /** Lower all int64 modulus and division opcodes */
2987 nir_lower_divmod64 = (1 << 2),
2988 /** Lower all 64-bit umul_high and imul_high opcodes */
2989 nir_lower_imul_high64 = (1 << 3),
2990 nir_lower_mov64 = (1 << 4),
2991 nir_lower_icmp64 = (1 << 5),
2992 nir_lower_iadd64 = (1 << 6),
2993 nir_lower_iabs64 = (1 << 7),
2994 nir_lower_ineg64 = (1 << 8),
2995 nir_lower_logic64 = (1 << 9),
2996 nir_lower_minmax64 = (1 << 10),
2997 nir_lower_shift64 = (1 << 11),
2998 nir_lower_imul_2x32_64 = (1 << 12),
2999 nir_lower_extract64 = (1 << 13),
3000 nir_lower_ufind_msb64 = (1 << 14),
3001 } nir_lower_int64_options;
3002
3003 typedef enum {
3004 nir_lower_drcp = (1 << 0),
3005 nir_lower_dsqrt = (1 << 1),
3006 nir_lower_drsq = (1 << 2),
3007 nir_lower_dtrunc = (1 << 3),
3008 nir_lower_dfloor = (1 << 4),
3009 nir_lower_dceil = (1 << 5),
3010 nir_lower_dfract = (1 << 6),
3011 nir_lower_dround_even = (1 << 7),
3012 nir_lower_dmod = (1 << 8),
3013 nir_lower_dsub = (1 << 9),
3014 nir_lower_ddiv = (1 << 10),
3015 nir_lower_fp64_full_software = (1 << 11),
3016 } nir_lower_doubles_options;
3017
3018 typedef enum {
3019 nir_divergence_single_prim_per_subgroup = (1 << 0),
3020 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
3021 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
3022 nir_divergence_view_index_uniform = (1 << 3),
3023 } nir_divergence_options;
3024
3025 typedef struct nir_shader_compiler_options {
3026 bool lower_fdiv;
3027 bool lower_ffma;
3028 bool fuse_ffma;
3029 bool lower_flrp16;
3030 bool lower_flrp32;
3031 /** Lowers flrp when it does not support doubles */
3032 bool lower_flrp64;
3033 bool lower_fpow;
3034 bool lower_fsat;
3035 bool lower_fsqrt;
3036 bool lower_sincos;
3037 bool lower_fmod;
3038 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
3039 bool lower_bitfield_extract;
3040 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
3041 bool lower_bitfield_extract_to_shifts;
3042 /** Lowers bitfield_insert to bfi/bfm */
3043 bool lower_bitfield_insert;
3044 /** Lowers bitfield_insert to compares, and shifts. */
3045 bool lower_bitfield_insert_to_shifts;
3046 /** Lowers bitfield_insert to bfm/bitfield_select. */
3047 bool lower_bitfield_insert_to_bitfield_select;
3048 /** Lowers bitfield_reverse to shifts. */
3049 bool lower_bitfield_reverse;
3050 /** Lowers bit_count to shifts. */
3051 bool lower_bit_count;
3052 /** Lowers ifind_msb to compare and ufind_msb */
3053 bool lower_ifind_msb;
3054 /** Lowers find_lsb to ufind_msb and logic ops */
3055 bool lower_find_lsb;
3056 bool lower_uadd_carry;
3057 bool lower_usub_borrow;
3058 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
3059 bool lower_mul_high;
3060 /** lowers fneg and ineg to fsub and isub. */
3061 bool lower_negate;
3062 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
3063 bool lower_sub;
3064
3065 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fneu} + b2f: */
3066 bool lower_scmp;
3067
3068 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
3069 bool lower_vector_cmp;
3070
3071 /** enables rules to lower idiv by power-of-two: */
3072 bool lower_idiv;
3073
3074 /** enable rules to avoid bit ops */
3075 bool lower_bitops;
3076
3077 /** enables rules to lower isign to imin+imax */
3078 bool lower_isign;
3079
3080 /** enables rules to lower fsign to fsub and flt */
3081 bool lower_fsign;
3082
3083 /** enables rules to lower iabs to ineg+imax */
3084 bool lower_iabs;
3085
3086 /* lower fdph to fdot4 */
3087 bool lower_fdph;
3088
3089 /** lower fdot to fmul and fsum/fadd. */
3090 bool lower_fdot;
3091
3092 /* Does the native fdot instruction replicate its result for four
3093 * components? If so, then opt_algebraic_late will turn all fdotN
3094 * instructions into fdot_replicatedN instructions.
3095 */
3096 bool fdot_replicates;
3097
3098 /** lowers ffloor to fsub+ffract: */
3099 bool lower_ffloor;
3100
3101 /** lowers ffract to fsub+ffloor: */
3102 bool lower_ffract;
3103
3104 /** lowers fceil to fneg+ffloor+fneg: */
3105 bool lower_fceil;
3106
3107 bool lower_ftrunc;
3108
3109 bool lower_ldexp;
3110
3111 bool lower_pack_half_2x16;
3112 bool lower_pack_unorm_2x16;
3113 bool lower_pack_snorm_2x16;
3114 bool lower_pack_unorm_4x8;
3115 bool lower_pack_snorm_4x8;
3116 bool lower_pack_64_2x32_split;
3117 bool lower_pack_32_2x16_split;
3118 bool lower_unpack_half_2x16;
3119 bool lower_unpack_unorm_2x16;
3120 bool lower_unpack_snorm_2x16;
3121 bool lower_unpack_unorm_4x8;
3122 bool lower_unpack_snorm_4x8;
3123 bool lower_unpack_64_2x32_split;
3124 bool lower_unpack_32_2x16_split;
3125
3126 bool lower_pack_split;
3127
3128 bool lower_extract_byte;
3129 bool lower_extract_word;
3130
3131 bool lower_all_io_to_temps;
3132 bool lower_all_io_to_elements;
3133
3134 /* Indicates that the driver only has zero-based vertex id */
3135 bool vertex_id_zero_based;
3136
3137 /**
3138 * If enabled, gl_BaseVertex will be lowered as:
3139 * is_indexed_draw (~0/0) & firstvertex
3140 */
3141 bool lower_base_vertex;
3142
3143 /**
3144 * If enabled, gl_HelperInvocation will be lowered as:
3145 *
3146 * !((1 << sample_id) & sample_mask_in))
3147 *
3148 * This depends on some possibly hw implementation details, which may
3149 * not be true for all hw. In particular that the FS is only executed
3150 * for covered samples or for helper invocations. So, do not blindly
3151 * enable this option.
3152 *
3153 * Note: See also issue #22 in ARB_shader_image_load_store
3154 */
3155 bool lower_helper_invocation;
3156
3157 /**
3158 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3159 *
3160 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3161 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3162 */
3163 bool optimize_sample_mask_in;
3164
3165 bool lower_cs_local_index_from_id;
3166 bool lower_cs_local_id_from_index;
3167
3168 /* Prevents lowering global_invocation_id to be in terms of work_group_id */
3169 bool has_cs_global_id;
3170
3171 bool lower_device_index_to_zero;
3172
3173 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3174 bool lower_wpos_pntc;
3175
3176 /**
3177 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3178 * lowered to simple arithmetic.
3179 *
3180 * If this flag is set, the lowering will be applied to all bit-sizes of
3181 * these instructions.
3182 *
3183 * \sa ::lower_hadd64
3184 */
3185 bool lower_hadd;
3186
3187 /**
3188 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3189 * should be lowered to simple arithmetic.
3190 *
3191 * If this flag is set, the lowering will be applied to only 64-bit
3192 * versions of these instructions.
3193 *
3194 * \sa ::lower_hadd
3195 */
3196 bool lower_hadd64;
3197
3198 /**
3199 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3200 * arithmetic.
3201 *
3202 * If this flag is set, the lowering will be applied to all bit-sizes of
3203 * these instructions.
3204 *
3205 * \sa ::lower_usub_sat64
3206 */
3207 bool lower_add_sat;
3208
3209 /**
3210 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3211 * arithmetic.
3212 *
3213 * \sa ::lower_add_sat
3214 */
3215 bool lower_usub_sat64;
3216
3217 /**
3218 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3219 * for IO purposes and would prefer loads/stores be vectorized.
3220 */
3221 bool vectorize_io;
3222 bool lower_to_scalar;
3223
3224 /**
3225 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3226 */
3227 bool vectorize_vec2_16bit;
3228
3229 /**
3230 * Should the linker unify inputs_read/outputs_written between adjacent
3231 * shader stages which are linked into a single program?
3232 */
3233 bool unify_interfaces;
3234
3235 /**
3236 * Should nir_lower_io() create load_interpolated_input intrinsics?
3237 *
3238 * If not, it generates regular load_input intrinsics and interpolation
3239 * information must be inferred from the list of input nir_variables.
3240 */
3241 bool use_interpolated_input_intrinsics;
3242
3243 /* Lowers when 32x32->64 bit multiplication is not supported */
3244 bool lower_mul_2x32_64;
3245
3246 /* Lowers when rotate instruction is not supported */
3247 bool lower_rotate;
3248
3249 /**
3250 * Backend supports imul24, and would like to use it (when possible)
3251 * for address/offset calculation. If true, driver should call
3252 * nir_lower_amul(). (If not set, amul will automatically be lowered
3253 * to imul.)
3254 */
3255 bool has_imul24;
3256
3257 /** Backend supports umul24, if not set umul24 will automatically be lowered
3258 * to imul with masked inputs */
3259 bool has_umul24;
3260
3261 /** Backend supports umad24, if not set umad24 will automatically be lowered
3262 * to imul with masked inputs and iadd */
3263 bool has_umad24;
3264
3265 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3266 * memory and control barrier intrinsics based on GLSL.
3267 */
3268 bool use_scoped_barrier;
3269
3270 /**
3271 * Is this the Intel vec4 backend?
3272 *
3273 * Used to inhibit algebraic optimizations that are known to be harmful on
3274 * the Intel vec4 backend. This is generally applicable to any
3275 * optimization that might cause more immediate values to be used in
3276 * 3-source (e.g., ffma and flrp) instructions.
3277 */
3278 bool intel_vec4;
3279
3280 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3281 bool lower_bfe_with_two_constants;
3282
3283 /** Whether 8-bit ALU is supported. */
3284 bool support_8bit_alu;
3285
3286 /** Whether 16-bit ALU is supported. */
3287 bool support_16bit_alu;
3288
3289 unsigned max_unroll_iterations;
3290
3291 nir_lower_int64_options lower_int64_options;
3292 nir_lower_doubles_options lower_doubles_options;
3293 } nir_shader_compiler_options;
3294
3295 typedef struct nir_shader {
3296 /** list of uniforms (nir_variable) */
3297 struct exec_list variables;
3298
3299 /** Set of driver-specific options for the shader.
3300 *
3301 * The memory for the options is expected to be kept in a single static
3302 * copy by the driver.
3303 */
3304 const struct nir_shader_compiler_options *options;
3305
3306 /** Various bits of compile-time information about a given shader */
3307 struct shader_info info;
3308
3309 struct exec_list functions; /** < list of nir_function */
3310
3311 /**
3312 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3313 * access plus one
3314 */
3315 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3316
3317 /** Size in bytes of required scratch space */
3318 unsigned scratch_size;
3319
3320 /** Constant data associated with this shader.
3321 *
3322 * Constant data is loaded through load_constant intrinsics (as compared to
3323 * the NIR load_const instructions which have the constant value inlined
3324 * into them). This is usually generated by nir_opt_large_constants (so
3325 * shaders don't have to load_const into a temporary array when they want
3326 * to indirect on a const array).
3327 */
3328 void *constant_data;
3329 /** Size of the constant data associated with the shader, in bytes */
3330 unsigned constant_data_size;
3331 } nir_shader;
3332
3333 #define nir_foreach_function(func, shader) \
3334 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3335
3336 static inline nir_function_impl *
3337 nir_shader_get_entrypoint(nir_shader *shader)
3338 {
3339 nir_function *func = NULL;
3340
3341 nir_foreach_function(function, shader) {
3342 assert(func == NULL);
3343 if (function->is_entrypoint) {
3344 func = function;
3345 #ifndef NDEBUG
3346 break;
3347 #endif
3348 }
3349 }
3350
3351 if (!func)
3352 return NULL;
3353
3354 assert(func->num_params == 0);
3355 assert(func->impl);
3356 return func->impl;
3357 }
3358
3359 nir_shader *nir_shader_create(void *mem_ctx,
3360 gl_shader_stage stage,
3361 const nir_shader_compiler_options *options,
3362 shader_info *si);
3363
3364 nir_register *nir_local_reg_create(nir_function_impl *impl);
3365
3366 void nir_reg_remove(nir_register *reg);
3367
3368 /** Adds a variable to the appropriate list in nir_shader */
3369 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3370
3371 static inline void
3372 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3373 {
3374 assert(var->data.mode == nir_var_function_temp);
3375 exec_list_push_tail(&impl->locals, &var->node);
3376 }
3377
3378 /** creates a variable, sets a few defaults, and adds it to the list */
3379 nir_variable *nir_variable_create(nir_shader *shader,
3380 nir_variable_mode mode,
3381 const struct glsl_type *type,
3382 const char *name);
3383 /** creates a local variable and adds it to the list */
3384 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3385 const struct glsl_type *type,
3386 const char *name);
3387
3388 nir_variable *nir_find_variable_with_location(nir_shader *shader,
3389 nir_variable_mode mode,
3390 unsigned location);
3391
3392 nir_variable *nir_find_variable_with_driver_location(nir_shader *shader,
3393 nir_variable_mode mode,
3394 unsigned location);
3395
3396 /** creates a function and adds it to the shader's list of functions */
3397 nir_function *nir_function_create(nir_shader *shader, const char *name);
3398
3399 nir_function_impl *nir_function_impl_create(nir_function *func);
3400 /** creates a function_impl that isn't tied to any particular function */
3401 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3402
3403 nir_block *nir_block_create(nir_shader *shader);
3404 nir_if *nir_if_create(nir_shader *shader);
3405 nir_loop *nir_loop_create(nir_shader *shader);
3406
3407 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3408
3409 /** requests that the given pieces of metadata be generated */
3410 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3411 /** dirties all but the preserved metadata */
3412 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3413 /** Preserves all metadata for the given shader */
3414 void nir_shader_preserve_all_metadata(nir_shader *shader);
3415
3416 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3417 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3418
3419 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3420 nir_deref_type deref_type);
3421
3422 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3423
3424 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3425 unsigned num_components,
3426 unsigned bit_size);
3427
3428 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3429 nir_intrinsic_op op);
3430
3431 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3432 nir_function *callee);
3433
3434 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3435
3436 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3437
3438 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3439
3440 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3441 unsigned num_components,
3442 unsigned bit_size);
3443
3444 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3445
3446 /**
3447 * NIR Cursors and Instruction Insertion API
3448 * @{
3449 *
3450 * A tiny struct representing a point to insert/extract instructions or
3451 * control flow nodes. Helps reduce the combinatorial explosion of possible
3452 * points to insert/extract.
3453 *
3454 * \sa nir_control_flow.h
3455 */
3456 typedef enum {
3457 nir_cursor_before_block,
3458 nir_cursor_after_block,
3459 nir_cursor_before_instr,
3460 nir_cursor_after_instr,
3461 } nir_cursor_option;
3462
3463 typedef struct {
3464 nir_cursor_option option;
3465 union {
3466 nir_block *block;
3467 nir_instr *instr;
3468 };
3469 } nir_cursor;
3470
3471 static inline nir_block *
3472 nir_cursor_current_block(nir_cursor cursor)
3473 {
3474 if (cursor.option == nir_cursor_before_instr ||
3475 cursor.option == nir_cursor_after_instr) {
3476 return cursor.instr->block;
3477 } else {
3478 return cursor.block;
3479 }
3480 }
3481
3482 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3483
3484 static inline nir_cursor
3485 nir_before_block(nir_block *block)
3486 {
3487 nir_cursor cursor;
3488 cursor.option = nir_cursor_before_block;
3489 cursor.block = block;
3490 return cursor;
3491 }
3492
3493 static inline nir_cursor
3494 nir_after_block(nir_block *block)
3495 {
3496 nir_cursor cursor;
3497 cursor.option = nir_cursor_after_block;
3498 cursor.block = block;
3499 return cursor;
3500 }
3501
3502 static inline nir_cursor
3503 nir_before_instr(nir_instr *instr)
3504 {
3505 nir_cursor cursor;
3506 cursor.option = nir_cursor_before_instr;
3507 cursor.instr = instr;
3508 return cursor;
3509 }
3510
3511 static inline nir_cursor
3512 nir_after_instr(nir_instr *instr)
3513 {
3514 nir_cursor cursor;
3515 cursor.option = nir_cursor_after_instr;
3516 cursor.instr = instr;
3517 return cursor;
3518 }
3519
3520 static inline nir_cursor
3521 nir_after_block_before_jump(nir_block *block)
3522 {
3523 nir_instr *last_instr = nir_block_last_instr(block);
3524 if (last_instr && last_instr->type == nir_instr_type_jump) {
3525 return nir_before_instr(last_instr);
3526 } else {
3527 return nir_after_block(block);
3528 }
3529 }
3530
3531 static inline nir_cursor
3532 nir_before_src(nir_src *src, bool is_if_condition)
3533 {
3534 if (is_if_condition) {
3535 nir_block *prev_block =
3536 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3537 assert(!nir_block_ends_in_jump(prev_block));
3538 return nir_after_block(prev_block);
3539 } else if (src->parent_instr->type == nir_instr_type_phi) {
3540 #ifndef NDEBUG
3541 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3542 bool found = false;
3543 nir_foreach_phi_src(phi_src, cond_phi) {
3544 if (phi_src->src.ssa == src->ssa) {
3545 found = true;
3546 break;
3547 }
3548 }
3549 assert(found);
3550 #endif
3551 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3552 * to have a more specific name.
3553 */
3554 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3555 return nir_after_block_before_jump(phi_src->pred);
3556 } else {
3557 return nir_before_instr(src->parent_instr);
3558 }
3559 }
3560
3561 static inline nir_cursor
3562 nir_before_cf_node(nir_cf_node *node)
3563 {
3564 if (node->type == nir_cf_node_block)
3565 return nir_before_block(nir_cf_node_as_block(node));
3566
3567 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3568 }
3569
3570 static inline nir_cursor
3571 nir_after_cf_node(nir_cf_node *node)
3572 {
3573 if (node->type == nir_cf_node_block)
3574 return nir_after_block(nir_cf_node_as_block(node));
3575
3576 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3577 }
3578
3579 static inline nir_cursor
3580 nir_after_phis(nir_block *block)
3581 {
3582 nir_foreach_instr(instr, block) {
3583 if (instr->type != nir_instr_type_phi)
3584 return nir_before_instr(instr);
3585 }
3586 return nir_after_block(block);
3587 }
3588
3589 static inline nir_cursor
3590 nir_after_cf_node_and_phis(nir_cf_node *node)
3591 {
3592 if (node->type == nir_cf_node_block)
3593 return nir_after_block(nir_cf_node_as_block(node));
3594
3595 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3596
3597 return nir_after_phis(block);
3598 }
3599
3600 static inline nir_cursor
3601 nir_before_cf_list(struct exec_list *cf_list)
3602 {
3603 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3604 exec_list_get_head(cf_list), node);
3605 return nir_before_cf_node(first_node);
3606 }
3607
3608 static inline nir_cursor
3609 nir_after_cf_list(struct exec_list *cf_list)
3610 {
3611 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3612 exec_list_get_tail(cf_list), node);
3613 return nir_after_cf_node(last_node);
3614 }
3615
3616 /**
3617 * Insert a NIR instruction at the given cursor.
3618