nir/lower_input_attachments: Refactor to use an options struct
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #define XXH_INLINE_ALL
45 #include "util/xxhash.h"
46 #include <stdio.h>
47
48 #ifndef NDEBUG
49 #include "util/debug.h"
50 #endif /* NDEBUG */
51
52 #include "nir_opcodes.h"
53
54 #if defined(_WIN32) && !defined(snprintf)
55 #define snprintf _snprintf
56 #endif
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #define NIR_FALSE 0u
63 #define NIR_TRUE (~0u)
64 #define NIR_MAX_VEC_COMPONENTS 16
65 #define NIR_MAX_MATRIX_COLUMNS 4
66 #define NIR_STREAM_PACKED (1 << 8)
67 typedef uint16_t nir_component_mask_t;
68
69 static inline bool
70 nir_num_components_valid(unsigned num_components)
71 {
72 return (num_components >= 1 &&
73 num_components <= 4) ||
74 num_components == 8 ||
75 num_components == 16;
76 }
77
78 /** Defines a cast function
79 *
80 * This macro defines a cast function from in_type to out_type where
81 * out_type is some structure type that contains a field of type out_type.
82 *
83 * Note that you have to be a bit careful as the generated cast function
84 * destroys constness.
85 */
86 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
87 type_field, type_value) \
88 static inline out_type * \
89 name(const in_type *parent) \
90 { \
91 assert(parent && parent->type_field == type_value); \
92 return exec_node_data(out_type, parent, field); \
93 }
94
95 struct nir_function;
96 struct nir_shader;
97 struct nir_instr;
98 struct nir_builder;
99
100
101 /**
102 * Description of built-in state associated with a uniform
103 *
104 * \sa nir_variable::state_slots
105 */
106 typedef struct {
107 gl_state_index16 tokens[STATE_LENGTH];
108 uint16_t swizzle;
109 } nir_state_slot;
110
111 typedef enum {
112 nir_var_shader_in = (1 << 0),
113 nir_var_shader_out = (1 << 1),
114 nir_var_shader_temp = (1 << 2),
115 nir_var_function_temp = (1 << 3),
116 nir_var_uniform = (1 << 4),
117 nir_var_mem_ubo = (1 << 5),
118 nir_var_system_value = (1 << 6),
119 nir_var_mem_ssbo = (1 << 7),
120 nir_var_mem_shared = (1 << 8),
121 nir_var_mem_global = (1 << 9),
122 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
123 nir_num_variable_modes = 11,
124 nir_var_all = (1 << nir_num_variable_modes) - 1,
125 } nir_variable_mode;
126
127 /**
128 * Rounding modes.
129 */
130 typedef enum {
131 nir_rounding_mode_undef = 0,
132 nir_rounding_mode_rtne = 1, /* round to nearest even */
133 nir_rounding_mode_ru = 2, /* round up */
134 nir_rounding_mode_rd = 3, /* round down */
135 nir_rounding_mode_rtz = 4, /* round towards zero */
136 } nir_rounding_mode;
137
138 typedef union {
139 bool b;
140 float f32;
141 double f64;
142 int8_t i8;
143 uint8_t u8;
144 int16_t i16;
145 uint16_t u16;
146 int32_t i32;
147 uint32_t u32;
148 int64_t i64;
149 uint64_t u64;
150 } nir_const_value;
151
152 #define nir_const_value_to_array(arr, c, components, m) \
153 { \
154 for (unsigned i = 0; i < components; ++i) \
155 arr[i] = c[i].m; \
156 } while (false)
157
158 static inline nir_const_value
159 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
160 {
161 nir_const_value v;
162 memset(&v, 0, sizeof(v));
163
164 switch (bit_size) {
165 case 1: v.b = x; break;
166 case 8: v.u8 = x; break;
167 case 16: v.u16 = x; break;
168 case 32: v.u32 = x; break;
169 case 64: v.u64 = x; break;
170 default:
171 unreachable("Invalid bit size");
172 }
173
174 return v;
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_int(int64_t i, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64) {
185 assert(i >= (-(1ll << (bit_size - 1))));
186 assert(i < (1ll << (bit_size - 1)));
187 }
188
189 return nir_const_value_for_raw_uint(i, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
194 {
195 nir_const_value v;
196 memset(&v, 0, sizeof(v));
197
198 assert(bit_size <= 64);
199 if (bit_size < 64)
200 assert(u < (1ull << bit_size));
201
202 return nir_const_value_for_raw_uint(u, bit_size);
203 }
204
205 static inline nir_const_value
206 nir_const_value_for_bool(bool b, unsigned bit_size)
207 {
208 /* Booleans use a 0/-1 convention */
209 return nir_const_value_for_int(-(int)b, bit_size);
210 }
211
212 /* This one isn't inline because it requires half-float conversion */
213 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
214
215 static inline int64_t
216 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 /* int1_t uses 0/-1 convention */
220 case 1: return -(int)value.b;
221 case 8: return value.i8;
222 case 16: return value.i16;
223 case 32: return value.i32;
224 case 64: return value.i64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline uint64_t
231 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
232 {
233 switch (bit_size) {
234 case 1: return value.b;
235 case 8: return value.u8;
236 case 16: return value.u16;
237 case 32: return value.u32;
238 case 64: return value.u64;
239 default:
240 unreachable("Invalid bit size");
241 }
242 }
243
244 static inline bool
245 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
246 {
247 int64_t i = nir_const_value_as_int(value, bit_size);
248
249 /* Booleans of any size use 0/-1 convention */
250 assert(i == 0 || i == -1);
251
252 return i;
253 }
254
255 /* This one isn't inline because it requires half-float conversion */
256 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
257
258 typedef struct nir_constant {
259 /**
260 * Value of the constant.
261 *
262 * The field used to back the values supplied by the constant is determined
263 * by the type associated with the \c nir_variable. Constants may be
264 * scalars, vectors, or matrices.
265 */
266 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
267
268 /* we could get this from the var->type but makes clone *much* easier to
269 * not have to care about the type.
270 */
271 unsigned num_elements;
272
273 /* Array elements / Structure Fields */
274 struct nir_constant **elements;
275 } nir_constant;
276
277 /**
278 * \brief Layout qualifiers for gl_FragDepth.
279 *
280 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
281 * with a layout qualifier.
282 */
283 typedef enum {
284 nir_depth_layout_none, /**< No depth layout is specified. */
285 nir_depth_layout_any,
286 nir_depth_layout_greater,
287 nir_depth_layout_less,
288 nir_depth_layout_unchanged
289 } nir_depth_layout;
290
291 /**
292 * Enum keeping track of how a variable was declared.
293 */
294 typedef enum {
295 /**
296 * Normal declaration.
297 */
298 nir_var_declared_normally = 0,
299
300 /**
301 * Variable is implicitly generated by the compiler and should not be
302 * visible via the API.
303 */
304 nir_var_hidden,
305 } nir_var_declaration_type;
306
307 /**
308 * Either a uniform, global variable, shader input, or shader output. Based on
309 * ir_variable - it should be easy to translate between the two.
310 */
311
312 typedef struct nir_variable {
313 struct exec_node node;
314
315 /**
316 * Declared type of the variable
317 */
318 const struct glsl_type *type;
319
320 /**
321 * Declared name of the variable
322 */
323 char *name;
324
325 struct nir_variable_data {
326 /**
327 * Storage class of the variable.
328 *
329 * \sa nir_variable_mode
330 */
331 nir_variable_mode mode:11;
332
333 /**
334 * Is the variable read-only?
335 *
336 * This is set for variables declared as \c const, shader inputs,
337 * and uniforms.
338 */
339 unsigned read_only:1;
340 unsigned centroid:1;
341 unsigned sample:1;
342 unsigned patch:1;
343 unsigned invariant:1;
344
345 /**
346 * Precision qualifier.
347 *
348 * In desktop GLSL we do not care about precision qualifiers at all, in
349 * fact, the spec says that precision qualifiers are ignored.
350 *
351 * To make things easy, we make it so that this field is always
352 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
353 * have the same precision value and the checks we add in the compiler
354 * for this field will never break a desktop shader compile.
355 */
356 unsigned precision:2;
357
358 /**
359 * Can this variable be coalesced with another?
360 *
361 * This is set by nir_lower_io_to_temporaries to say that any
362 * copies involving this variable should stay put. Propagating it can
363 * duplicate the resulting load/store, which is not wanted, and may
364 * result in a load/store of the variable with an indirect offset which
365 * the backend may not be able to handle.
366 */
367 unsigned cannot_coalesce:1;
368
369 /**
370 * When separate shader programs are enabled, only input/outputs between
371 * the stages of a multi-stage separate program can be safely removed
372 * from the shader interface. Other input/outputs must remains active.
373 *
374 * This is also used to make sure xfb varyings that are unused by the
375 * fragment shader are not removed.
376 */
377 unsigned always_active_io:1;
378
379 /**
380 * Interpolation mode for shader inputs / outputs
381 *
382 * \sa glsl_interp_mode
383 */
384 unsigned interpolation:3;
385
386 /**
387 * If non-zero, then this variable may be packed along with other variables
388 * into a single varying slot, so this offset should be applied when
389 * accessing components. For example, an offset of 1 means that the x
390 * component of this variable is actually stored in component y of the
391 * location specified by \c location.
392 */
393 unsigned location_frac:2;
394
395 /**
396 * If true, this variable represents an array of scalars that should
397 * be tightly packed. In other words, consecutive array elements
398 * should be stored one component apart, rather than one slot apart.
399 */
400 unsigned compact:1;
401
402 /**
403 * Whether this is a fragment shader output implicitly initialized with
404 * the previous contents of the specified render target at the
405 * framebuffer location corresponding to this shader invocation.
406 */
407 unsigned fb_fetch_output:1;
408
409 /**
410 * Non-zero if this variable is considered bindless as defined by
411 * ARB_bindless_texture.
412 */
413 unsigned bindless:1;
414
415 /**
416 * Was an explicit binding set in the shader?
417 */
418 unsigned explicit_binding:1;
419
420 /**
421 * Was the location explicitly set in the shader?
422 *
423 * If the location is explicitly set in the shader, it \b cannot be changed
424 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 * no effect).
426 */
427 unsigned explicit_location:1;
428
429 /**
430 * Was a transfer feedback buffer set in the shader?
431 */
432 unsigned explicit_xfb_buffer:1;
433
434 /**
435 * Was a transfer feedback stride set in the shader?
436 */
437 unsigned explicit_xfb_stride:1;
438
439 /**
440 * Was an explicit offset set in the shader?
441 */
442 unsigned explicit_offset:1;
443
444 /**
445 * Layout of the matrix. Uses glsl_matrix_layout values.
446 */
447 unsigned matrix_layout:2;
448
449 /**
450 * Non-zero if this variable was created by lowering a named interface
451 * block.
452 */
453 unsigned from_named_ifc_block:1;
454
455 /**
456 * How the variable was declared. See nir_var_declaration_type.
457 *
458 * This is used to detect variables generated by the compiler, so should
459 * not be visible via the API.
460 */
461 unsigned how_declared:2;
462
463 /**
464 * Is this variable per-view? If so, we know it must be an array with
465 * size corresponding to the number of views.
466 */
467 unsigned per_view:1;
468
469 /**
470 * \brief Layout qualifier for gl_FragDepth.
471 *
472 * This is not equal to \c ir_depth_layout_none if and only if this
473 * variable is \c gl_FragDepth and a layout qualifier is specified.
474 */
475 nir_depth_layout depth_layout:3;
476
477 /**
478 * Vertex stream output identifier.
479 *
480 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
481 * indicate the stream of the i-th component.
482 */
483 unsigned stream:9;
484
485 /**
486 * Access flags for memory variables (SSBO/global), image uniforms, and
487 * bindless images in uniforms/inputs/outputs.
488 */
489 enum gl_access_qualifier access:8;
490
491 /**
492 * Descriptor set binding for sampler or UBO.
493 */
494 unsigned descriptor_set:5;
495
496 /**
497 * output index for dual source blending.
498 */
499 unsigned index;
500
501 /**
502 * Initial binding point for a sampler or UBO.
503 *
504 * For array types, this represents the binding point for the first element.
505 */
506 unsigned binding;
507
508 /**
509 * Storage location of the base of this variable
510 *
511 * The precise meaning of this field depends on the nature of the variable.
512 *
513 * - Vertex shader input: one of the values from \c gl_vert_attrib.
514 * - Vertex shader output: one of the values from \c gl_varying_slot.
515 * - Geometry shader input: one of the values from \c gl_varying_slot.
516 * - Geometry shader output: one of the values from \c gl_varying_slot.
517 * - Fragment shader input: one of the values from \c gl_varying_slot.
518 * - Fragment shader output: one of the values from \c gl_frag_result.
519 * - Uniforms: Per-stage uniform slot number for default uniform block.
520 * - Uniforms: Index within the uniform block definition for UBO members.
521 * - Non-UBO Uniforms: uniform slot number.
522 * - Other: This field is not currently used.
523 *
524 * If the variable is a uniform, shader input, or shader output, and the
525 * slot has not been assigned, the value will be -1.
526 */
527 int location;
528
529 /**
530 * The actual location of the variable in the IR. Only valid for inputs,
531 * outputs, and uniforms (including samplers and images).
532 */
533 unsigned driver_location;
534
535 /**
536 * Location an atomic counter or transform feedback is stored at.
537 */
538 unsigned offset;
539
540 union {
541 struct {
542 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
543 enum pipe_format format;
544 } image;
545
546 struct {
547 /**
548 * Transform feedback buffer.
549 */
550 uint16_t buffer:2;
551
552 /**
553 * Transform feedback stride.
554 */
555 uint16_t stride;
556 } xfb;
557 };
558 } data;
559
560 /**
561 * Identifier for this variable generated by nir_index_vars() that is unique
562 * among other variables in the same exec_list.
563 */
564 unsigned index;
565
566 /* Number of nir_variable_data members */
567 uint16_t num_members;
568
569 /**
570 * Built-in state that backs this uniform
571 *
572 * Once set at variable creation, \c state_slots must remain invariant.
573 * This is because, ideally, this array would be shared by all clones of
574 * this variable in the IR tree. In other words, we'd really like for it
575 * to be a fly-weight.
576 *
577 * If the variable is not a uniform, \c num_state_slots will be zero and
578 * \c state_slots will be \c NULL.
579 */
580 /*@{*/
581 uint16_t num_state_slots; /**< Number of state slots used */
582 nir_state_slot *state_slots; /**< State descriptors. */
583 /*@}*/
584
585 /**
586 * Constant expression assigned in the initializer of the variable
587 *
588 * This field should only be used temporarily by creators of NIR shaders
589 * and then lower_constant_initializers can be used to get rid of them.
590 * Most of the rest of NIR ignores this field or asserts that it's NULL.
591 */
592 nir_constant *constant_initializer;
593
594 /**
595 * Global variable assigned in the initializer of the variable
596 * This field should only be used temporarily by creators of NIR shaders
597 * and then lower_constant_initializers can be used to get rid of them.
598 * Most of the rest of NIR ignores this field or asserts that it's NULL.
599 */
600 struct nir_variable *pointer_initializer;
601
602 /**
603 * For variables that are in an interface block or are an instance of an
604 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
605 *
606 * \sa ir_variable::location
607 */
608 const struct glsl_type *interface_type;
609
610 /**
611 * Description of per-member data for per-member struct variables
612 *
613 * This is used for variables which are actually an amalgamation of
614 * multiple entities such as a struct of built-in values or a struct of
615 * inputs each with their own layout specifier. This is only allowed on
616 * variables with a struct or array of array of struct type.
617 */
618 struct nir_variable_data *members;
619 } nir_variable;
620
621 static inline bool
622 _nir_shader_variable_has_mode(nir_variable *var, unsigned modes)
623 {
624 /* This isn't a shader variable */
625 assert(!(modes & nir_var_function_temp));
626 return var->data.mode & modes;
627 }
628
629 #define nir_foreach_variable_in_list(var, var_list) \
630 foreach_list_typed(nir_variable, var, node, var_list)
631
632 #define nir_foreach_variable_in_list_safe(var, var_list) \
633 foreach_list_typed_safe(nir_variable, var, node, var_list)
634
635 #define nir_foreach_variable_in_shader(var, shader) \
636 nir_foreach_variable_in_list(var, &(shader)->variables)
637
638 #define nir_foreach_variable_in_shader_safe(var, shader) \
639 nir_foreach_variable_in_list_safe(var, &(shader)->variables)
640
641 #define nir_foreach_variable_with_modes(var, shader, modes) \
642 nir_foreach_variable_in_shader(var, shader) \
643 if (_nir_shader_variable_has_mode(var, modes))
644
645 #define nir_foreach_variable_with_modes_safe(var, shader, modes) \
646 nir_foreach_variable_in_shader_safe(var, shader) \
647 if (_nir_shader_variable_has_mode(var, modes))
648
649 #define nir_foreach_shader_in_variable(var, shader) \
650 nir_foreach_variable_with_modes(var, shader, nir_var_shader_in)
651
652 #define nir_foreach_shader_in_variable_safe(var, shader) \
653 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_in)
654
655 #define nir_foreach_shader_out_variable(var, shader) \
656 nir_foreach_variable_with_modes(var, shader, nir_var_shader_out)
657
658 #define nir_foreach_shader_out_variable_safe(var, shader) \
659 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_out)
660
661 #define nir_foreach_uniform_variable(var, shader) \
662 nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
663
664 #define nir_foreach_uniform_variable_safe(var, shader) \
665 nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
666
667 static inline bool
668 nir_variable_is_global(const nir_variable *var)
669 {
670 return var->data.mode != nir_var_function_temp;
671 }
672
673 typedef struct nir_register {
674 struct exec_node node;
675
676 unsigned num_components; /** < number of vector components */
677 unsigned num_array_elems; /** < size of array (0 for no array) */
678
679 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
680 uint8_t bit_size;
681
682 /** generic register index. */
683 unsigned index;
684
685 /** only for debug purposes, can be NULL */
686 const char *name;
687
688 /** set of nir_srcs where this register is used (read from) */
689 struct list_head uses;
690
691 /** set of nir_dests where this register is defined (written to) */
692 struct list_head defs;
693
694 /** set of nir_ifs where this register is used as a condition */
695 struct list_head if_uses;
696 } nir_register;
697
698 #define nir_foreach_register(reg, reg_list) \
699 foreach_list_typed(nir_register, reg, node, reg_list)
700 #define nir_foreach_register_safe(reg, reg_list) \
701 foreach_list_typed_safe(nir_register, reg, node, reg_list)
702
703 typedef enum PACKED {
704 nir_instr_type_alu,
705 nir_instr_type_deref,
706 nir_instr_type_call,
707 nir_instr_type_tex,
708 nir_instr_type_intrinsic,
709 nir_instr_type_load_const,
710 nir_instr_type_jump,
711 nir_instr_type_ssa_undef,
712 nir_instr_type_phi,
713 nir_instr_type_parallel_copy,
714 } nir_instr_type;
715
716 typedef struct nir_instr {
717 struct exec_node node;
718 struct nir_block *block;
719 nir_instr_type type;
720
721 /* A temporary for optimization and analysis passes to use for storing
722 * flags. For instance, DCE uses this to store the "dead/live" info.
723 */
724 uint8_t pass_flags;
725
726 /** generic instruction index. */
727 unsigned index;
728 } nir_instr;
729
730 static inline nir_instr *
731 nir_instr_next(nir_instr *instr)
732 {
733 struct exec_node *next = exec_node_get_next(&instr->node);
734 if (exec_node_is_tail_sentinel(next))
735 return NULL;
736 else
737 return exec_node_data(nir_instr, next, node);
738 }
739
740 static inline nir_instr *
741 nir_instr_prev(nir_instr *instr)
742 {
743 struct exec_node *prev = exec_node_get_prev(&instr->node);
744 if (exec_node_is_head_sentinel(prev))
745 return NULL;
746 else
747 return exec_node_data(nir_instr, prev, node);
748 }
749
750 static inline bool
751 nir_instr_is_first(const nir_instr *instr)
752 {
753 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
754 }
755
756 static inline bool
757 nir_instr_is_last(const nir_instr *instr)
758 {
759 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
760 }
761
762 typedef struct nir_ssa_def {
763 /** for debugging only, can be NULL */
764 const char* name;
765
766 /** generic SSA definition index. */
767 unsigned index;
768
769 /** Index into the live_in and live_out bitfields */
770 unsigned live_index;
771
772 /** Instruction which produces this SSA value. */
773 nir_instr *parent_instr;
774
775 /** set of nir_instrs where this register is used (read from) */
776 struct list_head uses;
777
778 /** set of nir_ifs where this register is used as a condition */
779 struct list_head if_uses;
780
781 uint8_t num_components;
782
783 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
784 uint8_t bit_size;
785
786 /**
787 * True if this SSA value may have different values in different SIMD
788 * invocations of the shader. This is set by nir_divergence_analysis.
789 */
790 bool divergent;
791 } nir_ssa_def;
792
793 struct nir_src;
794
795 typedef struct {
796 nir_register *reg;
797 struct nir_src *indirect; /** < NULL for no indirect offset */
798 unsigned base_offset;
799
800 /* TODO use-def chain goes here */
801 } nir_reg_src;
802
803 typedef struct {
804 nir_instr *parent_instr;
805 struct list_head def_link;
806
807 nir_register *reg;
808 struct nir_src *indirect; /** < NULL for no indirect offset */
809 unsigned base_offset;
810
811 /* TODO def-use chain goes here */
812 } nir_reg_dest;
813
814 struct nir_if;
815
816 typedef struct nir_src {
817 union {
818 /** Instruction that consumes this value as a source. */
819 nir_instr *parent_instr;
820 struct nir_if *parent_if;
821 };
822
823 struct list_head use_link;
824
825 union {
826 nir_reg_src reg;
827 nir_ssa_def *ssa;
828 };
829
830 bool is_ssa;
831 } nir_src;
832
833 static inline nir_src
834 nir_src_init(void)
835 {
836 nir_src src = { { NULL } };
837 return src;
838 }
839
840 #define NIR_SRC_INIT nir_src_init()
841
842 #define nir_foreach_use(src, reg_or_ssa_def) \
843 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
844
845 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
846 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
847
848 #define nir_foreach_if_use(src, reg_or_ssa_def) \
849 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
850
851 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
852 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
853
854 typedef struct {
855 union {
856 nir_reg_dest reg;
857 nir_ssa_def ssa;
858 };
859
860 bool is_ssa;
861 } nir_dest;
862
863 static inline nir_dest
864 nir_dest_init(void)
865 {
866 nir_dest dest = { { { NULL } } };
867 return dest;
868 }
869
870 #define NIR_DEST_INIT nir_dest_init()
871
872 #define nir_foreach_def(dest, reg) \
873 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
874
875 #define nir_foreach_def_safe(dest, reg) \
876 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
877
878 static inline nir_src
879 nir_src_for_ssa(nir_ssa_def *def)
880 {
881 nir_src src = NIR_SRC_INIT;
882
883 src.is_ssa = true;
884 src.ssa = def;
885
886 return src;
887 }
888
889 static inline nir_src
890 nir_src_for_reg(nir_register *reg)
891 {
892 nir_src src = NIR_SRC_INIT;
893
894 src.is_ssa = false;
895 src.reg.reg = reg;
896 src.reg.indirect = NULL;
897 src.reg.base_offset = 0;
898
899 return src;
900 }
901
902 static inline nir_dest
903 nir_dest_for_reg(nir_register *reg)
904 {
905 nir_dest dest = NIR_DEST_INIT;
906
907 dest.reg.reg = reg;
908
909 return dest;
910 }
911
912 static inline unsigned
913 nir_src_bit_size(nir_src src)
914 {
915 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
916 }
917
918 static inline unsigned
919 nir_src_num_components(nir_src src)
920 {
921 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
922 }
923
924 static inline bool
925 nir_src_is_const(nir_src src)
926 {
927 return src.is_ssa &&
928 src.ssa->parent_instr->type == nir_instr_type_load_const;
929 }
930
931 static inline bool
932 nir_src_is_divergent(nir_src src)
933 {
934 assert(src.is_ssa);
935 return src.ssa->divergent;
936 }
937
938 static inline unsigned
939 nir_dest_bit_size(nir_dest dest)
940 {
941 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
942 }
943
944 static inline unsigned
945 nir_dest_num_components(nir_dest dest)
946 {
947 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
948 }
949
950 static inline bool
951 nir_dest_is_divergent(nir_dest dest)
952 {
953 assert(dest.is_ssa);
954 return dest.ssa.divergent;
955 }
956
957 /* Are all components the same, ie. .xxxx */
958 static inline bool
959 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
960 {
961 for (unsigned i = 1; i < nr_comp; i++)
962 if (swiz[i] != swiz[0])
963 return false;
964 return true;
965 }
966
967 /* Are all components sequential, ie. .yzw */
968 static inline bool
969 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
970 {
971 for (unsigned i = 1; i < nr_comp; i++)
972 if (swiz[i] != (swiz[0] + i))
973 return false;
974 return true;
975 }
976
977 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
978 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
979
980 typedef struct {
981 nir_src src;
982
983 /**
984 * \name input modifiers
985 */
986 /*@{*/
987 /**
988 * For inputs interpreted as floating point, flips the sign bit. For
989 * inputs interpreted as integers, performs the two's complement negation.
990 */
991 bool negate;
992
993 /**
994 * Clears the sign bit for floating point values, and computes the integer
995 * absolute value for integers. Note that the negate modifier acts after
996 * the absolute value modifier, therefore if both are set then all inputs
997 * will become negative.
998 */
999 bool abs;
1000 /*@}*/
1001
1002 /**
1003 * For each input component, says which component of the register it is
1004 * chosen from. Note that which elements of the swizzle are used and which
1005 * are ignored are based on the write mask for most opcodes - for example,
1006 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
1007 * a swizzle of {2, x, 1, 0} where x means "don't care."
1008 */
1009 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
1010 } nir_alu_src;
1011
1012 typedef struct {
1013 nir_dest dest;
1014
1015 /**
1016 * \name saturate output modifier
1017 *
1018 * Only valid for opcodes that output floating-point numbers. Clamps the
1019 * output to between 0.0 and 1.0 inclusive.
1020 */
1021
1022 bool saturate;
1023
1024 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
1025 } nir_alu_dest;
1026
1027 /** NIR sized and unsized types
1028 *
1029 * The values in this enum are carefully chosen so that the sized type is
1030 * just the unsized type OR the number of bits.
1031 */
1032 typedef enum PACKED {
1033 nir_type_invalid = 0, /* Not a valid type */
1034 nir_type_int = 2,
1035 nir_type_uint = 4,
1036 nir_type_bool = 6,
1037 nir_type_float = 128,
1038 nir_type_bool1 = 1 | nir_type_bool,
1039 nir_type_bool8 = 8 | nir_type_bool,
1040 nir_type_bool16 = 16 | nir_type_bool,
1041 nir_type_bool32 = 32 | nir_type_bool,
1042 nir_type_int1 = 1 | nir_type_int,
1043 nir_type_int8 = 8 | nir_type_int,
1044 nir_type_int16 = 16 | nir_type_int,
1045 nir_type_int32 = 32 | nir_type_int,
1046 nir_type_int64 = 64 | nir_type_int,
1047 nir_type_uint1 = 1 | nir_type_uint,
1048 nir_type_uint8 = 8 | nir_type_uint,
1049 nir_type_uint16 = 16 | nir_type_uint,
1050 nir_type_uint32 = 32 | nir_type_uint,
1051 nir_type_uint64 = 64 | nir_type_uint,
1052 nir_type_float16 = 16 | nir_type_float,
1053 nir_type_float32 = 32 | nir_type_float,
1054 nir_type_float64 = 64 | nir_type_float,
1055 } nir_alu_type;
1056
1057 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1058 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1059
1060 static inline unsigned
1061 nir_alu_type_get_type_size(nir_alu_type type)
1062 {
1063 return type & NIR_ALU_TYPE_SIZE_MASK;
1064 }
1065
1066 static inline nir_alu_type
1067 nir_alu_type_get_base_type(nir_alu_type type)
1068 {
1069 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1070 }
1071
1072 static inline nir_alu_type
1073 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1074 {
1075 switch (base_type) {
1076 case GLSL_TYPE_BOOL:
1077 return nir_type_bool1;
1078 break;
1079 case GLSL_TYPE_UINT:
1080 return nir_type_uint32;
1081 break;
1082 case GLSL_TYPE_INT:
1083 return nir_type_int32;
1084 break;
1085 case GLSL_TYPE_UINT16:
1086 return nir_type_uint16;
1087 break;
1088 case GLSL_TYPE_INT16:
1089 return nir_type_int16;
1090 break;
1091 case GLSL_TYPE_UINT8:
1092 return nir_type_uint8;
1093 case GLSL_TYPE_INT8:
1094 return nir_type_int8;
1095 case GLSL_TYPE_UINT64:
1096 return nir_type_uint64;
1097 break;
1098 case GLSL_TYPE_INT64:
1099 return nir_type_int64;
1100 break;
1101 case GLSL_TYPE_FLOAT:
1102 return nir_type_float32;
1103 break;
1104 case GLSL_TYPE_FLOAT16:
1105 return nir_type_float16;
1106 break;
1107 case GLSL_TYPE_DOUBLE:
1108 return nir_type_float64;
1109 break;
1110
1111 case GLSL_TYPE_SAMPLER:
1112 case GLSL_TYPE_IMAGE:
1113 case GLSL_TYPE_ATOMIC_UINT:
1114 case GLSL_TYPE_STRUCT:
1115 case GLSL_TYPE_INTERFACE:
1116 case GLSL_TYPE_ARRAY:
1117 case GLSL_TYPE_VOID:
1118 case GLSL_TYPE_SUBROUTINE:
1119 case GLSL_TYPE_FUNCTION:
1120 case GLSL_TYPE_ERROR:
1121 return nir_type_invalid;
1122 }
1123
1124 unreachable("unknown type");
1125 }
1126
1127 static inline nir_alu_type
1128 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1129 {
1130 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1131 }
1132
1133 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1134 nir_rounding_mode rnd);
1135
1136 static inline nir_op
1137 nir_op_vec(unsigned components)
1138 {
1139 switch (components) {
1140 case 1: return nir_op_mov;
1141 case 2: return nir_op_vec2;
1142 case 3: return nir_op_vec3;
1143 case 4: return nir_op_vec4;
1144 case 8: return nir_op_vec8;
1145 case 16: return nir_op_vec16;
1146 default: unreachable("bad component count");
1147 }
1148 }
1149
1150 static inline bool
1151 nir_op_is_vec(nir_op op)
1152 {
1153 switch (op) {
1154 case nir_op_mov:
1155 case nir_op_vec2:
1156 case nir_op_vec3:
1157 case nir_op_vec4:
1158 case nir_op_vec8:
1159 case nir_op_vec16:
1160 return true;
1161 default:
1162 return false;
1163 }
1164 }
1165
1166 static inline bool
1167 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1168 {
1169 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1170 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1171 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1172 }
1173
1174 static inline bool
1175 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1176 {
1177 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1178 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1179 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1180 }
1181
1182 static inline bool
1183 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1184 {
1185 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1186 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1187 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1188 }
1189
1190 static inline bool
1191 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1192 {
1193 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1194 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1195 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1196 }
1197
1198 static inline bool
1199 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1200 {
1201 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1202 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1203 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1204 }
1205
1206 static inline bool
1207 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1208 {
1209 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1210 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1211 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1212 }
1213
1214 static inline bool
1215 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1216 {
1217 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1218 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1219 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1220 }
1221
1222 static inline nir_rounding_mode
1223 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1224 nir_alu_type type)
1225 {
1226 if (nir_alu_type_get_base_type(type) != nir_type_float)
1227 return nir_rounding_mode_undef;
1228
1229 unsigned bit_size = nir_alu_type_get_type_size(type);
1230
1231 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1232 return nir_rounding_mode_rtz;
1233 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1234 return nir_rounding_mode_rtne;
1235 return nir_rounding_mode_undef;
1236 }
1237
1238 static inline bool
1239 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1240 {
1241 bool result =
1242 nir_has_any_rounding_mode_rtne(execution_mode) ||
1243 nir_has_any_rounding_mode_rtz(execution_mode);
1244 return result;
1245 }
1246
1247 typedef enum {
1248 /**
1249 * Operation where the first two sources are commutative.
1250 *
1251 * For 2-source operations, this just mathematical commutativity. Some
1252 * 3-source operations, like ffma, are only commutative in the first two
1253 * sources.
1254 */
1255 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1256 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1257 } nir_op_algebraic_property;
1258
1259 typedef struct {
1260 const char *name;
1261
1262 uint8_t num_inputs;
1263
1264 /**
1265 * The number of components in the output
1266 *
1267 * If non-zero, this is the size of the output and input sizes are
1268 * explicitly given; swizzle and writemask are still in effect, but if
1269 * the output component is masked out, then the input component may
1270 * still be in use.
1271 *
1272 * If zero, the opcode acts in the standard, per-component manner; the
1273 * operation is performed on each component (except the ones that are
1274 * masked out) with the input being taken from the input swizzle for
1275 * that component.
1276 *
1277 * The size of some of the inputs may be given (i.e. non-zero) even
1278 * though output_size is zero; in that case, the inputs with a zero
1279 * size act per-component, while the inputs with non-zero size don't.
1280 */
1281 uint8_t output_size;
1282
1283 /**
1284 * The type of vector that the instruction outputs. Note that the
1285 * staurate modifier is only allowed on outputs with the float type.
1286 */
1287
1288 nir_alu_type output_type;
1289
1290 /**
1291 * The number of components in each input
1292 */
1293 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1294
1295 /**
1296 * The type of vector that each input takes. Note that negate and
1297 * absolute value are only allowed on inputs with int or float type and
1298 * behave differently on the two.
1299 */
1300 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1301
1302 nir_op_algebraic_property algebraic_properties;
1303
1304 /* Whether this represents a numeric conversion opcode */
1305 bool is_conversion;
1306 } nir_op_info;
1307
1308 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1309
1310 typedef struct nir_alu_instr {
1311 nir_instr instr;
1312 nir_op op;
1313
1314 /** Indicates that this ALU instruction generates an exact value
1315 *
1316 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1317 * really equivalent to either. This indicates that the value generated by
1318 * this operation is high-precision and any code transformations that touch
1319 * it must ensure that the resulting value is bit-for-bit identical to the
1320 * original.
1321 */
1322 bool exact:1;
1323
1324 /**
1325 * Indicates that this instruction do not cause wrapping to occur, in the
1326 * form of overflow or underflow.
1327 */
1328 bool no_signed_wrap:1;
1329 bool no_unsigned_wrap:1;
1330
1331 nir_alu_dest dest;
1332 nir_alu_src src[];
1333 } nir_alu_instr;
1334
1335 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1336 nir_alu_instr *instr);
1337 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1338 nir_alu_instr *instr);
1339
1340 /* is this source channel used? */
1341 static inline bool
1342 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1343 unsigned channel)
1344 {
1345 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1346 return channel < nir_op_infos[instr->op].input_sizes[src];
1347
1348 return (instr->dest.write_mask >> channel) & 1;
1349 }
1350
1351 static inline nir_component_mask_t
1352 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1353 {
1354 nir_component_mask_t read_mask = 0;
1355 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1356 if (!nir_alu_instr_channel_used(instr, src, c))
1357 continue;
1358
1359 read_mask |= (1 << instr->src[src].swizzle[c]);
1360 }
1361 return read_mask;
1362 }
1363
1364 /**
1365 * Get the number of channels used for a source
1366 */
1367 static inline unsigned
1368 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1369 {
1370 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1371 return nir_op_infos[instr->op].input_sizes[src];
1372
1373 return nir_dest_num_components(instr->dest.dest);
1374 }
1375
1376 static inline bool
1377 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1378 {
1379 switch (instr->op) {
1380 case nir_op_flt:
1381 case nir_op_fge:
1382 case nir_op_feq:
1383 case nir_op_fne:
1384 case nir_op_ilt:
1385 case nir_op_ult:
1386 case nir_op_ige:
1387 case nir_op_uge:
1388 case nir_op_ieq:
1389 case nir_op_ine:
1390 case nir_op_i2b1:
1391 case nir_op_f2b1:
1392 case nir_op_inot:
1393 return true;
1394 default:
1395 return false;
1396 }
1397 }
1398
1399 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1400 nir_alu_type full_type);
1401
1402 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1403 unsigned src1, unsigned src2);
1404
1405 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1406 const nir_alu_instr *alu2,
1407 unsigned src1, unsigned src2);
1408
1409 typedef enum {
1410 nir_deref_type_var,
1411 nir_deref_type_array,
1412 nir_deref_type_array_wildcard,
1413 nir_deref_type_ptr_as_array,
1414 nir_deref_type_struct,
1415 nir_deref_type_cast,
1416 } nir_deref_type;
1417
1418 typedef struct {
1419 nir_instr instr;
1420
1421 /** The type of this deref instruction */
1422 nir_deref_type deref_type;
1423
1424 /** The mode of the underlying variable */
1425 nir_variable_mode mode;
1426
1427 /** The dereferenced type of the resulting pointer value */
1428 const struct glsl_type *type;
1429
1430 union {
1431 /** Variable being dereferenced if deref_type is a deref_var */
1432 nir_variable *var;
1433
1434 /** Parent deref if deref_type is not deref_var */
1435 nir_src parent;
1436 };
1437
1438 /** Additional deref parameters */
1439 union {
1440 struct {
1441 nir_src index;
1442 } arr;
1443
1444 struct {
1445 unsigned index;
1446 } strct;
1447
1448 struct {
1449 unsigned ptr_stride;
1450 } cast;
1451 };
1452
1453 /** Destination to store the resulting "pointer" */
1454 nir_dest dest;
1455 } nir_deref_instr;
1456
1457 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1458
1459 static inline nir_deref_instr *
1460 nir_deref_instr_parent(const nir_deref_instr *instr)
1461 {
1462 if (instr->deref_type == nir_deref_type_var)
1463 return NULL;
1464 else
1465 return nir_src_as_deref(instr->parent);
1466 }
1467
1468 static inline nir_variable *
1469 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1470 {
1471 while (instr->deref_type != nir_deref_type_var) {
1472 if (instr->deref_type == nir_deref_type_cast)
1473 return NULL;
1474
1475 instr = nir_deref_instr_parent(instr);
1476 }
1477
1478 return instr->var;
1479 }
1480
1481 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1482 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1483 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1484
1485 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1486
1487 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1488
1489 typedef struct {
1490 nir_instr instr;
1491
1492 struct nir_function *callee;
1493
1494 unsigned num_params;
1495 nir_src params[];
1496 } nir_call_instr;
1497
1498 #include "nir_intrinsics.h"
1499
1500 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1501
1502 /** Represents an intrinsic
1503 *
1504 * An intrinsic is an instruction type for handling things that are
1505 * more-or-less regular operations but don't just consume and produce SSA
1506 * values like ALU operations do. Intrinsics are not for things that have
1507 * special semantic meaning such as phi nodes and parallel copies.
1508 * Examples of intrinsics include variable load/store operations, system
1509 * value loads, and the like. Even though texturing more-or-less falls
1510 * under this category, texturing is its own instruction type because
1511 * trying to represent texturing with intrinsics would lead to a
1512 * combinatorial explosion of intrinsic opcodes.
1513 *
1514 * By having a single instruction type for handling a lot of different
1515 * cases, optimization passes can look for intrinsics and, for the most
1516 * part, completely ignore them. Each intrinsic type also has a few
1517 * possible flags that govern whether or not they can be reordered or
1518 * eliminated. That way passes like dead code elimination can still work
1519 * on intrisics without understanding the meaning of each.
1520 *
1521 * Each intrinsic has some number of constant indices, some number of
1522 * variables, and some number of sources. What these sources, variables,
1523 * and indices mean depends on the intrinsic and is documented with the
1524 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1525 * instructions are the only types of instruction that can operate on
1526 * variables.
1527 */
1528 typedef struct {
1529 nir_instr instr;
1530
1531 nir_intrinsic_op intrinsic;
1532
1533 nir_dest dest;
1534
1535 /** number of components if this is a vectorized intrinsic
1536 *
1537 * Similarly to ALU operations, some intrinsics are vectorized.
1538 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1539 * For vectorized intrinsics, the num_components field specifies the
1540 * number of destination components and the number of source components
1541 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1542 */
1543 uint8_t num_components;
1544
1545 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1546
1547 nir_src src[];
1548 } nir_intrinsic_instr;
1549
1550 static inline nir_variable *
1551 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1552 {
1553 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1554 }
1555
1556 typedef enum {
1557 /* Memory ordering. */
1558 NIR_MEMORY_ACQUIRE = 1 << 0,
1559 NIR_MEMORY_RELEASE = 1 << 1,
1560 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1561
1562 /* Memory visibility operations. */
1563 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1564 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1565 } nir_memory_semantics;
1566
1567 typedef enum {
1568 NIR_SCOPE_NONE,
1569 NIR_SCOPE_INVOCATION,
1570 NIR_SCOPE_SUBGROUP,
1571 NIR_SCOPE_WORKGROUP,
1572 NIR_SCOPE_QUEUE_FAMILY,
1573 NIR_SCOPE_DEVICE,
1574 } nir_scope;
1575
1576 /**
1577 * \name NIR intrinsics semantic flags
1578 *
1579 * information about what the compiler can do with the intrinsics.
1580 *
1581 * \sa nir_intrinsic_info::flags
1582 */
1583 typedef enum {
1584 /**
1585 * whether the intrinsic can be safely eliminated if none of its output
1586 * value is not being used.
1587 */
1588 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1589
1590 /**
1591 * Whether the intrinsic can be reordered with respect to any other
1592 * intrinsic, i.e. whether the only reordering dependencies of the
1593 * intrinsic are due to the register reads/writes.
1594 */
1595 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1596 } nir_intrinsic_semantic_flag;
1597
1598 /**
1599 * \name NIR intrinsics const-index flag
1600 *
1601 * Indicates the usage of a const_index slot.
1602 *
1603 * \sa nir_intrinsic_info::index_map
1604 */
1605 typedef enum {
1606 /**
1607 * Generally instructions that take a offset src argument, can encode
1608 * a constant 'base' value which is added to the offset.
1609 */
1610 NIR_INTRINSIC_BASE = 1,
1611
1612 /**
1613 * For store instructions, a writemask for the store.
1614 */
1615 NIR_INTRINSIC_WRMASK,
1616
1617 /**
1618 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1619 */
1620 NIR_INTRINSIC_STREAM_ID,
1621
1622 /**
1623 * The clip-plane id for load_user_clip_plane intrinsic.
1624 */
1625 NIR_INTRINSIC_UCP_ID,
1626
1627 /**
1628 * The amount of data, starting from BASE, that this instruction may
1629 * access. This is used to provide bounds if the offset is not constant.
1630 */
1631 NIR_INTRINSIC_RANGE,
1632
1633 /**
1634 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1635 */
1636 NIR_INTRINSIC_DESC_SET,
1637
1638 /**
1639 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1640 */
1641 NIR_INTRINSIC_BINDING,
1642
1643 /**
1644 * Component offset.
1645 */
1646 NIR_INTRINSIC_COMPONENT,
1647
1648 /**
1649 * Interpolation mode (only meaningful for FS inputs).
1650 */
1651 NIR_INTRINSIC_INTERP_MODE,
1652
1653 /**
1654 * A binary nir_op to use when performing a reduction or scan operation
1655 */
1656 NIR_INTRINSIC_REDUCTION_OP,
1657
1658 /**
1659 * Cluster size for reduction operations
1660 */
1661 NIR_INTRINSIC_CLUSTER_SIZE,
1662
1663 /**
1664 * Parameter index for a load_param intrinsic
1665 */
1666 NIR_INTRINSIC_PARAM_IDX,
1667
1668 /**
1669 * Image dimensionality for image intrinsics
1670 *
1671 * One of GLSL_SAMPLER_DIM_*
1672 */
1673 NIR_INTRINSIC_IMAGE_DIM,
1674
1675 /**
1676 * Non-zero if we are accessing an array image
1677 */
1678 NIR_INTRINSIC_IMAGE_ARRAY,
1679
1680 /**
1681 * Image format for image intrinsics
1682 */
1683 NIR_INTRINSIC_FORMAT,
1684
1685 /**
1686 * Access qualifiers for image and memory access intrinsics
1687 */
1688 NIR_INTRINSIC_ACCESS,
1689
1690 /**
1691 * Alignment for offsets and addresses
1692 *
1693 * These two parameters, specify an alignment in terms of a multiplier and
1694 * an offset. The offset or address parameter X of the intrinsic is
1695 * guaranteed to satisfy the following:
1696 *
1697 * (X - align_offset) % align_mul == 0
1698 */
1699 NIR_INTRINSIC_ALIGN_MUL,
1700 NIR_INTRINSIC_ALIGN_OFFSET,
1701
1702 /**
1703 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1704 */
1705 NIR_INTRINSIC_DESC_TYPE,
1706
1707 /**
1708 * The nir_alu_type of a uniform/input/output
1709 */
1710 NIR_INTRINSIC_TYPE,
1711
1712 /**
1713 * The swizzle mask for the instructions
1714 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1715 */
1716 NIR_INTRINSIC_SWIZZLE_MASK,
1717
1718 /* Separate source/dest access flags for copies */
1719 NIR_INTRINSIC_SRC_ACCESS,
1720 NIR_INTRINSIC_DST_ACCESS,
1721
1722 /* Driver location for nir_load_patch_location_ir3 */
1723 NIR_INTRINSIC_DRIVER_LOCATION,
1724
1725 /**
1726 * Mask of nir_memory_semantics, includes ordering and visibility.
1727 */
1728 NIR_INTRINSIC_MEMORY_SEMANTICS,
1729
1730 /**
1731 * Mask of nir_variable_modes affected by the memory operation.
1732 */
1733 NIR_INTRINSIC_MEMORY_MODES,
1734
1735 /**
1736 * Value of nir_scope.
1737 */
1738 NIR_INTRINSIC_MEMORY_SCOPE,
1739
1740 /**
1741 * Value of nir_scope.
1742 */
1743 NIR_INTRINSIC_EXECUTION_SCOPE,
1744
1745 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1746
1747 } nir_intrinsic_index_flag;
1748
1749 #define NIR_INTRINSIC_MAX_INPUTS 5
1750
1751 typedef struct {
1752 const char *name;
1753
1754 uint8_t num_srcs; /** < number of register/SSA inputs */
1755
1756 /** number of components of each input register
1757 *
1758 * If this value is 0, the number of components is given by the
1759 * num_components field of nir_intrinsic_instr. If this value is -1, the
1760 * intrinsic consumes however many components are provided and it is not
1761 * validated at all.
1762 */
1763 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1764
1765 bool has_dest;
1766
1767 /** number of components of the output register
1768 *
1769 * If this value is 0, the number of components is given by the
1770 * num_components field of nir_intrinsic_instr.
1771 */
1772 uint8_t dest_components;
1773
1774 /** bitfield of legal bit sizes */
1775 uint8_t dest_bit_sizes;
1776
1777 /** the number of constant indices used by the intrinsic */
1778 uint8_t num_indices;
1779
1780 /** indicates the usage of intr->const_index[n] */
1781 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1782
1783 /** semantic flags for calls to this intrinsic */
1784 nir_intrinsic_semantic_flag flags;
1785 } nir_intrinsic_info;
1786
1787 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1788
1789 static inline unsigned
1790 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1791 {
1792 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1793 assert(srcn < info->num_srcs);
1794 if (info->src_components[srcn] > 0)
1795 return info->src_components[srcn];
1796 else if (info->src_components[srcn] == 0)
1797 return intr->num_components;
1798 else
1799 return nir_src_num_components(intr->src[srcn]);
1800 }
1801
1802 static inline unsigned
1803 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1804 {
1805 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1806 if (!info->has_dest)
1807 return 0;
1808 else if (info->dest_components)
1809 return info->dest_components;
1810 else
1811 return intr->num_components;
1812 }
1813
1814 /**
1815 * Helper to copy const_index[] from src to dst, without assuming they
1816 * match in order.
1817 */
1818 static inline void
1819 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1820 {
1821 if (src->intrinsic == dst->intrinsic) {
1822 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1823 return;
1824 }
1825
1826 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1827 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1828
1829 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1830 if (src_info->index_map[i] == 0)
1831 continue;
1832
1833 /* require that dst instruction also uses the same const_index[]: */
1834 assert(dst_info->index_map[i] > 0);
1835
1836 dst->const_index[dst_info->index_map[i] - 1] =
1837 src->const_index[src_info->index_map[i] - 1];
1838 }
1839 }
1840
1841 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1842 static inline type \
1843 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1844 { \
1845 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1846 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1847 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1848 } \
1849 static inline void \
1850 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1851 { \
1852 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1853 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1854 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1855 }
1856
1857 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1858 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1859 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1860 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1861 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1862 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1863 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1864 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1865 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1866 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1867 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1868 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1869 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1870 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1871 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1872 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1873 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1874 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1875 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1876 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1877 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1878 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1879 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1880 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1881 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1882 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1883 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1884 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1885
1886 static inline void
1887 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1888 unsigned align_mul, unsigned align_offset)
1889 {
1890 assert(util_is_power_of_two_nonzero(align_mul));
1891 assert(align_offset < align_mul);
1892 nir_intrinsic_set_align_mul(intrin, align_mul);
1893 nir_intrinsic_set_align_offset(intrin, align_offset);
1894 }
1895
1896 /** Returns a simple alignment for a load/store intrinsic offset
1897 *
1898 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1899 * and ALIGN_OFFSET parameters, this helper takes both into account and
1900 * provides a single simple alignment parameter. The offset X is guaranteed
1901 * to satisfy X % align == 0.
1902 */
1903 static inline unsigned
1904 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1905 {
1906 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1907 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1908 assert(align_offset < align_mul);
1909 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1910 }
1911
1912 unsigned
1913 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1914
1915 /* Converts a image_deref_* intrinsic into a image_* one */
1916 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1917 nir_ssa_def *handle, bool bindless);
1918
1919 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1920 static inline bool
1921 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1922 {
1923 if (instr->intrinsic == nir_intrinsic_load_deref ||
1924 instr->intrinsic == nir_intrinsic_load_ssbo ||
1925 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1926 instr->intrinsic == nir_intrinsic_image_deref_load ||
1927 instr->intrinsic == nir_intrinsic_image_load) {
1928 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1929 } else {
1930 const nir_intrinsic_info *info =
1931 &nir_intrinsic_infos[instr->intrinsic];
1932 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1933 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1934 }
1935 }
1936
1937 /**
1938 * \group texture information
1939 *
1940 * This gives semantic information about textures which is useful to the
1941 * frontend, the backend, and lowering passes, but not the optimizer.
1942 */
1943
1944 typedef enum {
1945 nir_tex_src_coord,
1946 nir_tex_src_projector,
1947 nir_tex_src_comparator, /* shadow comparator */
1948 nir_tex_src_offset,
1949 nir_tex_src_bias,
1950 nir_tex_src_lod,
1951 nir_tex_src_min_lod,
1952 nir_tex_src_ms_index, /* MSAA sample index */
1953 nir_tex_src_ms_mcs, /* MSAA compression value */
1954 nir_tex_src_ddx,
1955 nir_tex_src_ddy,
1956 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1957 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1958 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1959 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1960 nir_tex_src_texture_handle, /* < bindless texture handle */
1961 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1962 nir_tex_src_plane, /* < selects plane for planar textures */
1963 nir_num_tex_src_types
1964 } nir_tex_src_type;
1965
1966 typedef struct {
1967 nir_src src;
1968 nir_tex_src_type src_type;
1969 } nir_tex_src;
1970
1971 typedef enum {
1972 nir_texop_tex, /**< Regular texture look-up */
1973 nir_texop_txb, /**< Texture look-up with LOD bias */
1974 nir_texop_txl, /**< Texture look-up with explicit LOD */
1975 nir_texop_txd, /**< Texture look-up with partial derivatives */
1976 nir_texop_txf, /**< Texel fetch with explicit LOD */
1977 nir_texop_txf_ms, /**< Multisample texture fetch */
1978 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1979 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1980 nir_texop_txs, /**< Texture size */
1981 nir_texop_lod, /**< Texture lod query */
1982 nir_texop_tg4, /**< Texture gather */
1983 nir_texop_query_levels, /**< Texture levels query */
1984 nir_texop_texture_samples, /**< Texture samples query */
1985 nir_texop_samples_identical, /**< Query whether all samples are definitely
1986 * identical.
1987 */
1988 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1989 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1990 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1991 } nir_texop;
1992
1993 typedef struct {
1994 nir_instr instr;
1995
1996 enum glsl_sampler_dim sampler_dim;
1997 nir_alu_type dest_type;
1998
1999 nir_texop op;
2000 nir_dest dest;
2001 nir_tex_src *src;
2002 unsigned num_srcs, coord_components;
2003 bool is_array, is_shadow;
2004
2005 /**
2006 * If is_shadow is true, whether this is the old-style shadow that outputs 4
2007 * components or the new-style shadow that outputs 1 component.
2008 */
2009 bool is_new_style_shadow;
2010
2011 /* gather component selector */
2012 unsigned component : 2;
2013
2014 /* gather offsets */
2015 int8_t tg4_offsets[4][2];
2016
2017 /* True if the texture index or handle is not dynamically uniform */
2018 bool texture_non_uniform;
2019
2020 /* True if the sampler index or handle is not dynamically uniform */
2021 bool sampler_non_uniform;
2022
2023 /** The texture index
2024 *
2025 * If this texture instruction has a nir_tex_src_texture_offset source,
2026 * then the texture index is given by texture_index + texture_offset.
2027 */
2028 unsigned texture_index;
2029
2030 /** The sampler index
2031 *
2032 * The following operations do not require a sampler and, as such, this
2033 * field should be ignored:
2034 * - nir_texop_txf
2035 * - nir_texop_txf_ms
2036 * - nir_texop_txs
2037 * - nir_texop_lod
2038 * - nir_texop_query_levels
2039 * - nir_texop_texture_samples
2040 * - nir_texop_samples_identical
2041 *
2042 * If this texture instruction has a nir_tex_src_sampler_offset source,
2043 * then the sampler index is given by sampler_index + sampler_offset.
2044 */
2045 unsigned sampler_index;
2046 } nir_tex_instr;
2047
2048 /*
2049 * Returns true if the texture operation requires a sampler as a general rule,
2050 * see the documentation of sampler_index.
2051 *
2052 * Note that the specific hw/driver backend could require to a sampler
2053 * object/configuration packet in any case, for some other reason.
2054 */
2055 static inline bool
2056 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2057 {
2058 switch (instr->op) {
2059 case nir_texop_txf:
2060 case nir_texop_txf_ms:
2061 case nir_texop_txs:
2062 case nir_texop_lod:
2063 case nir_texop_query_levels:
2064 case nir_texop_texture_samples:
2065 case nir_texop_samples_identical:
2066 return false;
2067 default:
2068 return true;
2069 }
2070 }
2071
2072 static inline unsigned
2073 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2074 {
2075 switch (instr->op) {
2076 case nir_texop_txs: {
2077 unsigned ret;
2078 switch (instr->sampler_dim) {
2079 case GLSL_SAMPLER_DIM_1D:
2080 case GLSL_SAMPLER_DIM_BUF:
2081 ret = 1;
2082 break;
2083 case GLSL_SAMPLER_DIM_2D:
2084 case GLSL_SAMPLER_DIM_CUBE:
2085 case GLSL_SAMPLER_DIM_MS:
2086 case GLSL_SAMPLER_DIM_RECT:
2087 case GLSL_SAMPLER_DIM_EXTERNAL:
2088 case GLSL_SAMPLER_DIM_SUBPASS:
2089 ret = 2;
2090 break;
2091 case GLSL_SAMPLER_DIM_3D:
2092 ret = 3;
2093 break;
2094 default:
2095 unreachable("not reached");
2096 }
2097 if (instr->is_array)
2098 ret++;
2099 return ret;
2100 }
2101
2102 case nir_texop_lod:
2103 return 2;
2104
2105 case nir_texop_texture_samples:
2106 case nir_texop_query_levels:
2107 case nir_texop_samples_identical:
2108 case nir_texop_fragment_mask_fetch:
2109 return 1;
2110
2111 default:
2112 if (instr->is_shadow && instr->is_new_style_shadow)
2113 return 1;
2114
2115 return 4;
2116 }
2117 }
2118
2119 /* Returns true if this texture operation queries something about the texture
2120 * rather than actually sampling it.
2121 */
2122 static inline bool
2123 nir_tex_instr_is_query(const nir_tex_instr *instr)
2124 {
2125 switch (instr->op) {
2126 case nir_texop_txs:
2127 case nir_texop_lod:
2128 case nir_texop_texture_samples:
2129 case nir_texop_query_levels:
2130 case nir_texop_txf_ms_mcs:
2131 return true;
2132 case nir_texop_tex:
2133 case nir_texop_txb:
2134 case nir_texop_txl:
2135 case nir_texop_txd:
2136 case nir_texop_txf:
2137 case nir_texop_txf_ms:
2138 case nir_texop_txf_ms_fb:
2139 case nir_texop_tg4:
2140 return false;
2141 default:
2142 unreachable("Invalid texture opcode");
2143 }
2144 }
2145
2146 static inline bool
2147 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2148 {
2149 switch (instr->op) {
2150 case nir_texop_tex:
2151 case nir_texop_txb:
2152 case nir_texop_lod:
2153 return true;
2154 default:
2155 return false;
2156 }
2157 }
2158
2159 static inline nir_alu_type
2160 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2161 {
2162 switch (instr->src[src].src_type) {
2163 case nir_tex_src_coord:
2164 switch (instr->op) {
2165 case nir_texop_txf:
2166 case nir_texop_txf_ms:
2167 case nir_texop_txf_ms_fb:
2168 case nir_texop_txf_ms_mcs:
2169 case nir_texop_samples_identical:
2170 return nir_type_int;
2171
2172 default:
2173 return nir_type_float;
2174 }
2175
2176 case nir_tex_src_lod:
2177 switch (instr->op) {
2178 case nir_texop_txs:
2179 case nir_texop_txf:
2180 return nir_type_int;
2181
2182 default:
2183 return nir_type_float;
2184 }
2185
2186 case nir_tex_src_projector:
2187 case nir_tex_src_comparator:
2188 case nir_tex_src_bias:
2189 case nir_tex_src_min_lod:
2190 case nir_tex_src_ddx:
2191 case nir_tex_src_ddy:
2192 return nir_type_float;
2193
2194 case nir_tex_src_offset:
2195 case nir_tex_src_ms_index:
2196 case nir_tex_src_plane:
2197 return nir_type_int;
2198
2199 case nir_tex_src_ms_mcs:
2200 case nir_tex_src_texture_deref:
2201 case nir_tex_src_sampler_deref:
2202 case nir_tex_src_texture_offset:
2203 case nir_tex_src_sampler_offset:
2204 case nir_tex_src_texture_handle:
2205 case nir_tex_src_sampler_handle:
2206 return nir_type_uint;
2207
2208 case nir_num_tex_src_types:
2209 unreachable("nir_num_tex_src_types is not a valid source type");
2210 }
2211
2212 unreachable("Invalid texture source type");
2213 }
2214
2215 static inline unsigned
2216 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2217 {
2218 if (instr->src[src].src_type == nir_tex_src_coord)
2219 return instr->coord_components;
2220
2221 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2222 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2223 return 4;
2224
2225 if (instr->src[src].src_type == nir_tex_src_ddx ||
2226 instr->src[src].src_type == nir_tex_src_ddy) {
2227 if (instr->is_array)
2228 return instr->coord_components - 1;
2229 else
2230 return instr->coord_components;
2231 }
2232
2233 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2234 * the offset, since a cube maps to a single face.
2235 */
2236 if (instr->src[src].src_type == nir_tex_src_offset) {
2237 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2238 return 2;
2239 else if (instr->is_array)
2240 return instr->coord_components - 1;
2241 else
2242 return instr->coord_components;
2243 }
2244
2245 return 1;
2246 }
2247
2248 static inline int
2249 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2250 {
2251 for (unsigned i = 0; i < instr->num_srcs; i++)
2252 if (instr->src[i].src_type == type)
2253 return (int) i;
2254
2255 return -1;
2256 }
2257
2258 void nir_tex_instr_add_src(nir_tex_instr *tex,
2259 nir_tex_src_type src_type,
2260 nir_src src);
2261
2262 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2263
2264 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2265
2266 typedef struct {
2267 nir_instr instr;
2268
2269 nir_ssa_def def;
2270
2271 nir_const_value value[];
2272 } nir_load_const_instr;
2273
2274 typedef enum {
2275 /** Return from a function
2276 *
2277 * This instruction is a classic function return. It jumps to
2278 * nir_function_impl::end_block. No return value is provided in this
2279 * instruction. Instead, the function is expected to write any return
2280 * data to a deref passed in from the caller.
2281 */
2282 nir_jump_return,
2283
2284 /** Break out of the inner-most loop
2285 *
2286 * This has the same semantics as C's "break" statement.
2287 */
2288 nir_jump_break,
2289
2290 /** Jump back to the top of the inner-most loop
2291 *
2292 * This has the same semantics as C's "continue" statement assuming that a
2293 * NIR loop is implemented as "while (1) { body }".
2294 */
2295 nir_jump_continue,
2296
2297 /** Jumps for unstructured CFG.
2298 *
2299 * As within an unstructured CFG we can't rely on block ordering we need to
2300 * place explicit jumps at the end of every block.
2301 */
2302 nir_jump_goto,
2303 nir_jump_goto_if,
2304 } nir_jump_type;
2305
2306 typedef struct {
2307 nir_instr instr;
2308 nir_jump_type type;
2309 nir_src condition;
2310 struct nir_block *target;
2311 struct nir_block *else_target;
2312 } nir_jump_instr;
2313
2314 /* creates a new SSA variable in an undefined state */
2315
2316 typedef struct {
2317 nir_instr instr;
2318 nir_ssa_def def;
2319 } nir_ssa_undef_instr;
2320
2321 typedef struct {
2322 struct exec_node node;
2323
2324 /* The predecessor block corresponding to this source */
2325 struct nir_block *pred;
2326
2327 nir_src src;
2328 } nir_phi_src;
2329
2330 #define nir_foreach_phi_src(phi_src, phi) \
2331 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2332 #define nir_foreach_phi_src_safe(phi_src, phi) \
2333 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2334
2335 typedef struct {
2336 nir_instr instr;
2337
2338 struct exec_list srcs; /** < list of nir_phi_src */
2339
2340 nir_dest dest;
2341 } nir_phi_instr;
2342
2343 typedef struct {
2344 struct exec_node node;
2345 nir_src src;
2346 nir_dest dest;
2347 } nir_parallel_copy_entry;
2348
2349 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2350 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2351
2352 typedef struct {
2353 nir_instr instr;
2354
2355 /* A list of nir_parallel_copy_entrys. The sources of all of the
2356 * entries are copied to the corresponding destinations "in parallel".
2357 * In other words, if we have two entries: a -> b and b -> a, the values
2358 * get swapped.
2359 */
2360 struct exec_list entries;
2361 } nir_parallel_copy_instr;
2362
2363 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2364 type, nir_instr_type_alu)
2365 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2366 type, nir_instr_type_deref)
2367 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2368 type, nir_instr_type_call)
2369 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2370 type, nir_instr_type_jump)
2371 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2372 type, nir_instr_type_tex)
2373 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2374 type, nir_instr_type_intrinsic)
2375 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2376 type, nir_instr_type_load_const)
2377 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2378 type, nir_instr_type_ssa_undef)
2379 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2380 type, nir_instr_type_phi)
2381 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2382 nir_parallel_copy_instr, instr,
2383 type, nir_instr_type_parallel_copy)
2384
2385
2386 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2387 static inline type \
2388 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2389 { \
2390 assert(nir_src_is_const(src)); \
2391 nir_load_const_instr *load = \
2392 nir_instr_as_load_const(src.ssa->parent_instr); \
2393 assert(comp < load->def.num_components); \
2394 return nir_const_value_as_##suffix(load->value[comp], \
2395 load->def.bit_size); \
2396 } \
2397 \
2398 static inline type \
2399 nir_src_as_##suffix(nir_src src) \
2400 { \
2401 assert(nir_src_num_components(src) == 1); \
2402 return nir_src_comp_as_##suffix(src, 0); \
2403 }
2404
2405 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2406 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2407 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2408 NIR_DEFINE_SRC_AS_CONST(double, float)
2409
2410 #undef NIR_DEFINE_SRC_AS_CONST
2411
2412
2413 typedef struct {
2414 nir_ssa_def *def;
2415 unsigned comp;
2416 } nir_ssa_scalar;
2417
2418 static inline bool
2419 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2420 {
2421 return s.def->parent_instr->type == nir_instr_type_load_const;
2422 }
2423
2424 static inline nir_const_value
2425 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2426 {
2427 assert(s.comp < s.def->num_components);
2428 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2429 return load->value[s.comp];
2430 }
2431
2432 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2433 static inline type \
2434 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2435 { \
2436 return nir_const_value_as_##suffix( \
2437 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2438 }
2439
2440 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2441 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2442 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2443 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2444
2445 #undef NIR_DEFINE_SCALAR_AS_CONST
2446
2447 static inline bool
2448 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2449 {
2450 return s.def->parent_instr->type == nir_instr_type_alu;
2451 }
2452
2453 static inline nir_op
2454 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2455 {
2456 return nir_instr_as_alu(s.def->parent_instr)->op;
2457 }
2458
2459 static inline nir_ssa_scalar
2460 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2461 {
2462 nir_ssa_scalar out = { NULL, 0 };
2463
2464 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2465 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2466
2467 /* Our component must be written */
2468 assert(s.comp < s.def->num_components);
2469 assert(alu->dest.write_mask & (1u << s.comp));
2470
2471 assert(alu->src[alu_src_idx].src.is_ssa);
2472 out.def = alu->src[alu_src_idx].src.ssa;
2473
2474 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2475 /* The ALU src is unsized so the source component follows the
2476 * destination component.
2477 */
2478 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2479 } else {
2480 /* This is a sized source so all source components work together to
2481 * produce all the destination components. Since we need to return a
2482 * scalar, this only works if the source is a scalar.
2483 */
2484 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2485 out.comp = alu->src[alu_src_idx].swizzle[0];
2486 }
2487 assert(out.comp < out.def->num_components);
2488
2489 return out;
2490 }
2491
2492
2493 /*
2494 * Control flow
2495 *
2496 * Control flow consists of a tree of control flow nodes, which include
2497 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2498 * instructions that always run start-to-finish. Each basic block also keeps
2499 * track of its successors (blocks which may run immediately after the current
2500 * block) and predecessors (blocks which could have run immediately before the
2501 * current block). Each function also has a start block and an end block which
2502 * all return statements point to (which is always empty). Together, all the
2503 * blocks with their predecessors and successors make up the control flow
2504 * graph (CFG) of the function. There are helpers that modify the tree of
2505 * control flow nodes while modifying the CFG appropriately; these should be
2506 * used instead of modifying the tree directly.
2507 */
2508
2509 typedef enum {
2510 nir_cf_node_block,
2511 nir_cf_node_if,
2512 nir_cf_node_loop,
2513 nir_cf_node_function
2514 } nir_cf_node_type;
2515
2516 typedef struct nir_cf_node {
2517 struct exec_node node;
2518 nir_cf_node_type type;
2519 struct nir_cf_node *parent;
2520 } nir_cf_node;
2521
2522 typedef struct nir_block {
2523 nir_cf_node cf_node;
2524
2525 struct exec_list instr_list; /** < list of nir_instr */
2526
2527 /** generic block index; generated by nir_index_blocks */
2528 unsigned index;
2529
2530 /*
2531 * Each block can only have up to 2 successors, so we put them in a simple
2532 * array - no need for anything more complicated.
2533 */
2534 struct nir_block *successors[2];
2535
2536 /* Set of nir_block predecessors in the CFG */
2537 struct set *predecessors;
2538
2539 /*
2540 * this node's immediate dominator in the dominance tree - set to NULL for
2541 * the start block.
2542 */
2543 struct nir_block *imm_dom;
2544
2545 /* This node's children in the dominance tree */
2546 unsigned num_dom_children;
2547 struct nir_block **dom_children;
2548
2549 /* Set of nir_blocks on the dominance frontier of this block */
2550 struct set *dom_frontier;
2551
2552 /*
2553 * These two indices have the property that dom_{pre,post}_index for each
2554 * child of this block in the dominance tree will always be between
2555 * dom_pre_index and dom_post_index for this block, which makes testing if
2556 * a given block is dominated by another block an O(1) operation.
2557 */
2558 int16_t dom_pre_index, dom_post_index;
2559
2560 /* live in and out for this block; used for liveness analysis */
2561 BITSET_WORD *live_in;
2562 BITSET_WORD *live_out;
2563 } nir_block;
2564
2565 static inline bool
2566 nir_block_is_reachable(nir_block *b)
2567 {
2568 /* See also nir_block_dominates */
2569 return b->dom_post_index != -1;
2570 }
2571
2572 static inline nir_instr *
2573 nir_block_first_instr(nir_block *block)
2574 {
2575 struct exec_node *head = exec_list_get_head(&block->instr_list);
2576 return exec_node_data(nir_instr, head, node);
2577 }
2578
2579 static inline nir_instr *
2580 nir_block_last_instr(nir_block *block)
2581 {
2582 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2583 return exec_node_data(nir_instr, tail, node);
2584 }
2585
2586 static inline bool
2587 nir_block_ends_in_jump(nir_block *block)
2588 {
2589 return !exec_list_is_empty(&block->instr_list) &&
2590 nir_block_last_instr(block)->type == nir_instr_type_jump;
2591 }
2592
2593 #define nir_foreach_instr(instr, block) \
2594 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2595 #define nir_foreach_instr_reverse(instr, block) \
2596 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2597 #define nir_foreach_instr_safe(instr, block) \
2598 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2599 #define nir_foreach_instr_reverse_safe(instr, block) \
2600 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2601
2602 typedef enum {
2603 nir_selection_control_none = 0x0,
2604 nir_selection_control_flatten = 0x1,
2605 nir_selection_control_dont_flatten = 0x2,
2606 } nir_selection_control;
2607
2608 typedef struct nir_if {
2609 nir_cf_node cf_node;
2610 nir_src condition;
2611 nir_selection_control control;
2612
2613 struct exec_list then_list; /** < list of nir_cf_node */
2614 struct exec_list else_list; /** < list of nir_cf_node */
2615 } nir_if;
2616
2617 typedef struct {
2618 nir_if *nif;
2619
2620 /** Instruction that generates nif::condition. */
2621 nir_instr *conditional_instr;
2622
2623 /** Block within ::nif that has the break instruction. */
2624 nir_block *break_block;
2625
2626 /** Last block for the then- or else-path that does not contain the break. */
2627 nir_block *continue_from_block;
2628
2629 /** True when ::break_block is in the else-path of ::nif. */
2630 bool continue_from_then;
2631 bool induction_rhs;
2632
2633 /* This is true if the terminators exact trip count is unknown. For
2634 * example:
2635 *
2636 * for (int i = 0; i < imin(x, 4); i++)
2637 * ...
2638 *
2639 * Here loop analysis would have set a max_trip_count of 4 however we dont
2640 * know for sure that this is the exact trip count.
2641 */
2642 bool exact_trip_count_unknown;
2643
2644 struct list_head loop_terminator_link;
2645 } nir_loop_terminator;
2646
2647 typedef struct {
2648 /* Estimated cost (in number of instructions) of the loop */
2649 unsigned instr_cost;
2650
2651 /* Guessed trip count based on array indexing */
2652 unsigned guessed_trip_count;
2653
2654 /* Maximum number of times the loop is run (if known) */
2655 unsigned max_trip_count;
2656
2657 /* Do we know the exact number of times the loop will be run */
2658 bool exact_trip_count_known;
2659
2660 /* Unroll the loop regardless of its size */
2661 bool force_unroll;
2662
2663 /* Does the loop contain complex loop terminators, continues or other
2664 * complex behaviours? If this is true we can't rely on
2665 * loop_terminator_list to be complete or accurate.
2666 */
2667 bool complex_loop;
2668
2669 nir_loop_terminator *limiting_terminator;
2670
2671 /* A list of loop_terminators terminating this loop. */
2672 struct list_head loop_terminator_list;
2673 } nir_loop_info;
2674
2675 typedef enum {
2676 nir_loop_control_none = 0x0,
2677 nir_loop_control_unroll = 0x1,
2678 nir_loop_control_dont_unroll = 0x2,
2679 } nir_loop_control;
2680
2681 typedef struct {
2682 nir_cf_node cf_node;
2683
2684 struct exec_list body; /** < list of nir_cf_node */
2685
2686 nir_loop_info *info;
2687 nir_loop_control control;
2688 bool partially_unrolled;
2689 } nir_loop;
2690
2691 /**
2692 * Various bits of metadata that can may be created or required by
2693 * optimization and analysis passes
2694 */
2695 typedef enum {
2696 nir_metadata_none = 0x0,
2697
2698 /** Indicates that nir_block::index values are valid.
2699 *
2700 * The start block has index 0 and they increase through a natural walk of
2701 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2702 * every block index is in the range [0, nir_function_impl::num_blocks].
2703 *
2704 * A pass can preserve this metadata type if it doesn't touch the CFG.
2705 */
2706 nir_metadata_block_index = 0x1,
2707
2708 /** Indicates that block dominance information is valid
2709 *
2710 * This includes:
2711 *
2712 * - nir_block::num_dom_children
2713 * - nir_block::dom_children
2714 * - nir_block::dom_frontier
2715 * - nir_block::dom_pre_index
2716 * - nir_block::dom_post_index
2717 *
2718 * A pass can preserve this metadata type if it doesn't touch the CFG.
2719 */
2720 nir_metadata_dominance = 0x2,
2721
2722 /** Indicates that SSA def data-flow liveness information is valid
2723 *
2724 * This includes:
2725 *
2726 * - nir_ssa_def::live_index
2727 * - nir_block::live_in
2728 * - nir_block::live_out
2729 *
2730 * A pass can preserve this metadata type if it never adds or removes any
2731 * SSA defs (most passes shouldn't preserve this metadata type).
2732 */
2733 nir_metadata_live_ssa_defs = 0x4,
2734
2735 /** A dummy metadata value to track when a pass forgot to call
2736 * nir_metadata_preserve.
2737 *
2738 * A pass should always clear this value even if it doesn't make any
2739 * progress to indicate that it thought about preserving metadata.
2740 */
2741 nir_metadata_not_properly_reset = 0x8,
2742
2743 /** Indicates that loop analysis information is valid.
2744 *
2745 * This includes everything pointed to by nir_loop::info.
2746 *
2747 * A pass can preserve this metadata type if it is guaranteed to not affect
2748 * any loop metadata. However, since loop metadata includes things like
2749 * loop counts which depend on arithmetic in the loop, this is very hard to
2750 * determine. Most passes shouldn't preserve this metadata type.
2751 */
2752 nir_metadata_loop_analysis = 0x10,
2753
2754 /** All metadata
2755 *
2756 * This includes all nir_metadata flags except not_properly_reset. Passes
2757 * which do not change the shader in any way should call
2758 *
2759 * nir_metadata_preserve(impl, nir_metadata_all);
2760 */
2761 nir_metadata_all = ~nir_metadata_not_properly_reset,
2762 } nir_metadata;
2763
2764 typedef struct {
2765 nir_cf_node cf_node;
2766
2767 /** pointer to the function of which this is an implementation */
2768 struct nir_function *function;
2769
2770 struct exec_list body; /** < list of nir_cf_node */
2771
2772 nir_block *end_block;
2773
2774 /** list for all local variables in the function */
2775 struct exec_list locals;
2776
2777 /** list of local registers in the function */
2778 struct exec_list registers;
2779
2780 /** next available local register index */
2781 unsigned reg_alloc;
2782
2783 /** next available SSA value index */
2784 unsigned ssa_alloc;
2785
2786 /* total number of basic blocks, only valid when block_index_dirty = false */
2787 unsigned num_blocks;
2788
2789 /** True if this nir_function_impl uses structured control-flow
2790 *
2791 * Structured nir_function_impls have different validation rules.
2792 */
2793 bool structured;
2794
2795 nir_metadata valid_metadata;
2796 } nir_function_impl;
2797
2798 #define nir_foreach_function_temp_variable(var, impl) \
2799 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2800
2801 #define nir_foreach_function_temp_variable_safe(var, impl) \
2802 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2803
2804 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2805 nir_start_block(nir_function_impl *impl)
2806 {
2807 return (nir_block *) impl->body.head_sentinel.next;
2808 }
2809
2810 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2811 nir_impl_last_block(nir_function_impl *impl)
2812 {
2813 return (nir_block *) impl->body.tail_sentinel.prev;
2814 }
2815
2816 static inline nir_cf_node *
2817 nir_cf_node_next(nir_cf_node *node)
2818 {
2819 struct exec_node *next = exec_node_get_next(&node->node);
2820 if (exec_node_is_tail_sentinel(next))
2821 return NULL;
2822 else
2823 return exec_node_data(nir_cf_node, next, node);
2824 }
2825
2826 static inline nir_cf_node *
2827 nir_cf_node_prev(nir_cf_node *node)
2828 {
2829 struct exec_node *prev = exec_node_get_prev(&node->node);
2830 if (exec_node_is_head_sentinel(prev))
2831 return NULL;
2832 else
2833 return exec_node_data(nir_cf_node, prev, node);
2834 }
2835
2836 static inline bool
2837 nir_cf_node_is_first(const nir_cf_node *node)
2838 {
2839 return exec_node_is_head_sentinel(node->node.prev);
2840 }
2841
2842 static inline bool
2843 nir_cf_node_is_last(const nir_cf_node *node)
2844 {
2845 return exec_node_is_tail_sentinel(node->node.next);
2846 }
2847
2848 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2849 type, nir_cf_node_block)
2850 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2851 type, nir_cf_node_if)
2852 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2853 type, nir_cf_node_loop)
2854 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2855 nir_function_impl, cf_node, type, nir_cf_node_function)
2856
2857 static inline nir_block *
2858 nir_if_first_then_block(nir_if *if_stmt)
2859 {
2860 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2861 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2862 }
2863
2864 static inline nir_block *
2865 nir_if_last_then_block(nir_if *if_stmt)
2866 {
2867 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2868 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2869 }
2870
2871 static inline nir_block *
2872 nir_if_first_else_block(nir_if *if_stmt)
2873 {
2874 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2875 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2876 }
2877
2878 static inline nir_block *
2879 nir_if_last_else_block(nir_if *if_stmt)
2880 {
2881 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2882 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2883 }
2884
2885 static inline nir_block *
2886 nir_loop_first_block(nir_loop *loop)
2887 {
2888 struct exec_node *head = exec_list_get_head(&loop->body);
2889 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2890 }
2891
2892 static inline nir_block *
2893 nir_loop_last_block(nir_loop *loop)
2894 {
2895 struct exec_node *tail = exec_list_get_tail(&loop->body);
2896 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2897 }
2898
2899 /**
2900 * Return true if this list of cf_nodes contains a single empty block.
2901 */
2902 static inline bool
2903 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2904 {
2905 if (exec_list_is_singular(cf_list)) {
2906 struct exec_node *head = exec_list_get_head(cf_list);
2907 nir_block *block =
2908 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2909 return exec_list_is_empty(&block->instr_list);
2910 }
2911 return false;
2912 }
2913
2914 typedef struct {
2915 uint8_t num_components;
2916 uint8_t bit_size;
2917 } nir_parameter;
2918
2919 typedef struct nir_function {
2920 struct exec_node node;
2921
2922 const char *name;
2923 struct nir_shader *shader;
2924
2925 unsigned num_params;
2926 nir_parameter *params;
2927
2928 /** The implementation of this function.
2929 *
2930 * If the function is only declared and not implemented, this is NULL.
2931 */
2932 nir_function_impl *impl;
2933
2934 bool is_entrypoint;
2935 } nir_function;
2936
2937 typedef enum {
2938 nir_lower_imul64 = (1 << 0),
2939 nir_lower_isign64 = (1 << 1),
2940 /** Lower all int64 modulus and division opcodes */
2941 nir_lower_divmod64 = (1 << 2),
2942 /** Lower all 64-bit umul_high and imul_high opcodes */
2943 nir_lower_imul_high64 = (1 << 3),
2944 nir_lower_mov64 = (1 << 4),
2945 nir_lower_icmp64 = (1 << 5),
2946 nir_lower_iadd64 = (1 << 6),
2947 nir_lower_iabs64 = (1 << 7),
2948 nir_lower_ineg64 = (1 << 8),
2949 nir_lower_logic64 = (1 << 9),
2950 nir_lower_minmax64 = (1 << 10),
2951 nir_lower_shift64 = (1 << 11),
2952 nir_lower_imul_2x32_64 = (1 << 12),
2953 nir_lower_extract64 = (1 << 13),
2954 nir_lower_ufind_msb64 = (1 << 14),
2955 } nir_lower_int64_options;
2956
2957 typedef enum {
2958 nir_lower_drcp = (1 << 0),
2959 nir_lower_dsqrt = (1 << 1),
2960 nir_lower_drsq = (1 << 2),
2961 nir_lower_dtrunc = (1 << 3),
2962 nir_lower_dfloor = (1 << 4),
2963 nir_lower_dceil = (1 << 5),
2964 nir_lower_dfract = (1 << 6),
2965 nir_lower_dround_even = (1 << 7),
2966 nir_lower_dmod = (1 << 8),
2967 nir_lower_dsub = (1 << 9),
2968 nir_lower_ddiv = (1 << 10),
2969 nir_lower_fp64_full_software = (1 << 11),
2970 } nir_lower_doubles_options;
2971
2972 typedef enum {
2973 nir_divergence_single_prim_per_subgroup = (1 << 0),
2974 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2975 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2976 nir_divergence_view_index_uniform = (1 << 3),
2977 } nir_divergence_options;
2978
2979 typedef struct nir_shader_compiler_options {
2980 bool lower_fdiv;
2981 bool lower_ffma;
2982 bool fuse_ffma;
2983 bool lower_flrp16;
2984 bool lower_flrp32;
2985 /** Lowers flrp when it does not support doubles */
2986 bool lower_flrp64;
2987 bool lower_fpow;
2988 bool lower_fsat;
2989 bool lower_fsqrt;
2990 bool lower_sincos;
2991 bool lower_fmod;
2992 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2993 bool lower_bitfield_extract;
2994 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2995 bool lower_bitfield_extract_to_shifts;
2996 /** Lowers bitfield_insert to bfi/bfm */
2997 bool lower_bitfield_insert;
2998 /** Lowers bitfield_insert to compares, and shifts. */
2999 bool lower_bitfield_insert_to_shifts;
3000 /** Lowers bitfield_insert to bfm/bitfield_select. */
3001 bool lower_bitfield_insert_to_bitfield_select;
3002 /** Lowers bitfield_reverse to shifts. */
3003 bool lower_bitfield_reverse;
3004 /** Lowers bit_count to shifts. */
3005 bool lower_bit_count;
3006 /** Lowers ifind_msb to compare and ufind_msb */
3007 bool lower_ifind_msb;
3008 /** Lowers find_lsb to ufind_msb and logic ops */
3009 bool lower_find_lsb;
3010 bool lower_uadd_carry;
3011 bool lower_usub_borrow;
3012 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
3013 bool lower_mul_high;
3014 /** lowers fneg and ineg to fsub and isub. */
3015 bool lower_negate;
3016 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
3017 bool lower_sub;
3018
3019 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
3020 bool lower_scmp;
3021
3022 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
3023 bool lower_vector_cmp;
3024
3025 /** enables rules to lower idiv by power-of-two: */
3026 bool lower_idiv;
3027
3028 /** enable rules to avoid bit ops */
3029 bool lower_bitops;
3030
3031 /** enables rules to lower isign to imin+imax */
3032 bool lower_isign;
3033
3034 /** enables rules to lower fsign to fsub and flt */
3035 bool lower_fsign;
3036
3037 /* lower fdph to fdot4 */
3038 bool lower_fdph;
3039
3040 /** lower fdot to fmul and fsum/fadd. */
3041 bool lower_fdot;
3042
3043 /* Does the native fdot instruction replicate its result for four
3044 * components? If so, then opt_algebraic_late will turn all fdotN
3045 * instructions into fdot_replicatedN instructions.
3046 */
3047 bool fdot_replicates;
3048
3049 /** lowers ffloor to fsub+ffract: */
3050 bool lower_ffloor;
3051
3052 /** lowers ffract to fsub+ffloor: */
3053 bool lower_ffract;
3054
3055 /** lowers fceil to fneg+ffloor+fneg: */
3056 bool lower_fceil;
3057
3058 bool lower_ftrunc;
3059
3060 bool lower_ldexp;
3061
3062 bool lower_pack_half_2x16;
3063 bool lower_pack_unorm_2x16;
3064 bool lower_pack_snorm_2x16;
3065 bool lower_pack_unorm_4x8;
3066 bool lower_pack_snorm_4x8;
3067 bool lower_pack_64_2x32_split;
3068 bool lower_pack_32_2x16_split;
3069 bool lower_unpack_half_2x16;
3070 bool lower_unpack_unorm_2x16;
3071 bool lower_unpack_snorm_2x16;
3072 bool lower_unpack_unorm_4x8;
3073 bool lower_unpack_snorm_4x8;
3074 bool lower_unpack_64_2x32_split;
3075 bool lower_unpack_32_2x16_split;
3076
3077 bool lower_pack_split;
3078
3079 bool lower_extract_byte;
3080 bool lower_extract_word;
3081
3082 bool lower_all_io_to_temps;
3083 bool lower_all_io_to_elements;
3084
3085 /* Indicates that the driver only has zero-based vertex id */
3086 bool vertex_id_zero_based;
3087
3088 /**
3089 * If enabled, gl_BaseVertex will be lowered as:
3090 * is_indexed_draw (~0/0) & firstvertex
3091 */
3092 bool lower_base_vertex;
3093
3094 /**
3095 * If enabled, gl_HelperInvocation will be lowered as:
3096 *
3097 * !((1 << sample_id) & sample_mask_in))
3098 *
3099 * This depends on some possibly hw implementation details, which may
3100 * not be true for all hw. In particular that the FS is only executed
3101 * for covered samples or for helper invocations. So, do not blindly
3102 * enable this option.
3103 *
3104 * Note: See also issue #22 in ARB_shader_image_load_store
3105 */
3106 bool lower_helper_invocation;
3107
3108 /**
3109 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3110 *
3111 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3112 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3113 */
3114 bool optimize_sample_mask_in;
3115
3116 bool lower_cs_local_index_from_id;
3117 bool lower_cs_local_id_from_index;
3118
3119 bool lower_device_index_to_zero;
3120
3121 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3122 bool lower_wpos_pntc;
3123
3124 /**
3125 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3126 * lowered to simple arithmetic.
3127 *
3128 * If this flag is set, the lowering will be applied to all bit-sizes of
3129 * these instructions.
3130 *
3131 * \sa ::lower_hadd64
3132 */
3133 bool lower_hadd;
3134
3135 /**
3136 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3137 * should be lowered to simple arithmetic.
3138 *
3139 * If this flag is set, the lowering will be applied to only 64-bit
3140 * versions of these instructions.
3141 *
3142 * \sa ::lower_hadd
3143 */
3144 bool lower_hadd64;
3145
3146 /**
3147 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3148 * arithmetic.
3149 *
3150 * If this flag is set, the lowering will be applied to all bit-sizes of
3151 * these instructions.
3152 *
3153 * \sa ::lower_usub_sat64
3154 */
3155 bool lower_add_sat;
3156
3157 /**
3158 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3159 * arithmetic.
3160 *
3161 * \sa ::lower_add_sat
3162 */
3163 bool lower_usub_sat64;
3164
3165 /**
3166 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3167 * for IO purposes and would prefer loads/stores be vectorized.
3168 */
3169 bool vectorize_io;
3170 bool lower_to_scalar;
3171
3172 /**
3173 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3174 */
3175 bool vectorize_vec2_16bit;
3176
3177 /**
3178 * Should the linker unify inputs_read/outputs_written between adjacent
3179 * shader stages which are linked into a single program?
3180 */
3181 bool unify_interfaces;
3182
3183 /**
3184 * Should nir_lower_io() create load_interpolated_input intrinsics?
3185 *
3186 * If not, it generates regular load_input intrinsics and interpolation
3187 * information must be inferred from the list of input nir_variables.
3188 */
3189 bool use_interpolated_input_intrinsics;
3190
3191 /* Lowers when 32x32->64 bit multiplication is not supported */
3192 bool lower_mul_2x32_64;
3193
3194 /* Lowers when rotate instruction is not supported */
3195 bool lower_rotate;
3196
3197 /**
3198 * Backend supports imul24, and would like to use it (when possible)
3199 * for address/offset calculation. If true, driver should call
3200 * nir_lower_amul(). (If not set, amul will automatically be lowered
3201 * to imul.)
3202 */
3203 bool has_imul24;
3204
3205 /** Backend supports umul24, if not set umul24 will automatically be lowered
3206 * to imul with masked inputs */
3207 bool has_umul24;
3208
3209 /** Backend supports umad24, if not set umad24 will automatically be lowered
3210 * to imul with masked inputs and iadd */
3211 bool has_umad24;
3212
3213 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3214 * memory and control barrier intrinsics based on GLSL.
3215 */
3216 bool use_scoped_barrier;
3217
3218 /**
3219 * Is this the Intel vec4 backend?
3220 *
3221 * Used to inhibit algebraic optimizations that are known to be harmful on
3222 * the Intel vec4 backend. This is generally applicable to any
3223 * optimization that might cause more immediate values to be used in
3224 * 3-source (e.g., ffma and flrp) instructions.
3225 */
3226 bool intel_vec4;
3227
3228 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3229 bool lower_bfe_with_two_constants;
3230
3231 /** Whether 8-bit ALU is supported. */
3232 bool support_8bit_alu;
3233
3234 /** Whether 16-bit ALU is supported. */
3235 bool support_16bit_alu;
3236
3237 unsigned max_unroll_iterations;
3238
3239 nir_lower_int64_options lower_int64_options;
3240 nir_lower_doubles_options lower_doubles_options;
3241 } nir_shader_compiler_options;
3242
3243 typedef struct nir_shader {
3244 /** list of uniforms (nir_variable) */
3245 struct exec_list variables;
3246
3247 /** Set of driver-specific options for the shader.
3248 *
3249 * The memory for the options is expected to be kept in a single static
3250 * copy by the driver.
3251 */
3252 const struct nir_shader_compiler_options *options;
3253
3254 /** Various bits of compile-time information about a given shader */
3255 struct shader_info info;
3256
3257 struct exec_list functions; /** < list of nir_function */
3258
3259 /**
3260 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3261 * access plus one
3262 */
3263 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3264
3265 /** Size in bytes of required scratch space */
3266 unsigned scratch_size;
3267
3268 /** Constant data associated with this shader.
3269 *
3270 * Constant data is loaded through load_constant intrinsics (as compared to
3271 * the NIR load_const instructions which have the constant value inlined
3272 * into them). This is usually generated by nir_opt_large_constants (so
3273 * shaders don't have to load_const into a temporary array when they want
3274 * to indirect on a const array).
3275 */
3276 void *constant_data;
3277 /** Size of the constant data associated with the shader, in bytes */
3278 unsigned constant_data_size;
3279 } nir_shader;
3280
3281 #define nir_foreach_function(func, shader) \
3282 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3283
3284 static inline nir_function_impl *
3285 nir_shader_get_entrypoint(nir_shader *shader)
3286 {
3287 nir_function *func = NULL;
3288
3289 nir_foreach_function(function, shader) {
3290 assert(func == NULL);
3291 if (function->is_entrypoint) {
3292 func = function;
3293 #ifndef NDEBUG
3294 break;
3295 #endif
3296 }
3297 }
3298
3299 if (!func)
3300 return NULL;
3301
3302 assert(func->num_params == 0);
3303 assert(func->impl);
3304 return func->impl;
3305 }
3306
3307 nir_shader *nir_shader_create(void *mem_ctx,
3308 gl_shader_stage stage,
3309 const nir_shader_compiler_options *options,
3310 shader_info *si);
3311
3312 nir_register *nir_local_reg_create(nir_function_impl *impl);
3313
3314 void nir_reg_remove(nir_register *reg);
3315
3316 /** Adds a variable to the appropriate list in nir_shader */
3317 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3318
3319 static inline void
3320 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3321 {
3322 assert(var->data.mode == nir_var_function_temp);
3323 exec_list_push_tail(&impl->locals, &var->node);
3324 }
3325
3326 /** creates a variable, sets a few defaults, and adds it to the list */
3327 nir_variable *nir_variable_create(nir_shader *shader,
3328 nir_variable_mode mode,
3329 const struct glsl_type *type,
3330 const char *name);
3331 /** creates a local variable and adds it to the list */
3332 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3333 const struct glsl_type *type,
3334 const char *name);
3335
3336 nir_variable *nir_find_variable_with_location(nir_shader *shader,
3337 nir_variable_mode mode,
3338 unsigned location);
3339
3340 nir_variable *nir_find_variable_with_driver_location(nir_shader *shader,
3341 nir_variable_mode mode,
3342 unsigned location);
3343
3344 /** creates a function and adds it to the shader's list of functions */
3345 nir_function *nir_function_create(nir_shader *shader, const char *name);
3346
3347 nir_function_impl *nir_function_impl_create(nir_function *func);
3348 /** creates a function_impl that isn't tied to any particular function */
3349 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3350
3351 nir_block *nir_block_create(nir_shader *shader);
3352 nir_if *nir_if_create(nir_shader *shader);
3353 nir_loop *nir_loop_create(nir_shader *shader);
3354
3355 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3356
3357 /** requests that the given pieces of metadata be generated */
3358 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3359 /** dirties all but the preserved metadata */
3360 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3361 /** Preserves all metadata for the given shader */
3362 void nir_shader_preserve_all_metadata(nir_shader *shader);
3363
3364 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3365 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3366
3367 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3368 nir_deref_type deref_type);
3369
3370 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3371
3372 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3373 unsigned num_components,
3374 unsigned bit_size);
3375
3376 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3377 nir_intrinsic_op op);
3378
3379 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3380 nir_function *callee);
3381
3382 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3383
3384 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3385
3386 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3387
3388 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3389 unsigned num_components,
3390 unsigned bit_size);
3391
3392 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3393
3394 /**
3395 * NIR Cursors and Instruction Insertion API
3396 * @{
3397 *
3398 * A tiny struct representing a point to insert/extract instructions or
3399 * control flow nodes. Helps reduce the combinatorial explosion of possible
3400 * points to insert/extract.
3401 *
3402 * \sa nir_control_flow.h
3403 */
3404 typedef enum {
3405 nir_cursor_before_block,
3406 nir_cursor_after_block,
3407 nir_cursor_before_instr,
3408 nir_cursor_after_instr,
3409 } nir_cursor_option;
3410
3411 typedef struct {
3412 nir_cursor_option option;
3413 union {
3414 nir_block *block;
3415 nir_instr *instr;
3416 };
3417 } nir_cursor;
3418
3419 static inline nir_block *
3420 nir_cursor_current_block(nir_cursor cursor)
3421 {
3422 if (cursor.option == nir_cursor_before_instr ||
3423 cursor.option == nir_cursor_after_instr) {
3424 return cursor.instr->block;
3425 } else {
3426 return cursor.block;
3427 }
3428 }
3429
3430 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3431
3432 static inline nir_cursor
3433 nir_before_block(nir_block *block)
3434 {
3435 nir_cursor cursor;
3436 cursor.option = nir_cursor_before_block;
3437 cursor.block = block;
3438 return cursor;
3439 }
3440
3441 static inline nir_cursor
3442 nir_after_block(nir_block *block)
3443 {
3444 nir_cursor cursor;
3445 cursor.option = nir_cursor_after_block;
3446 cursor.block = block;
3447 return cursor;
3448 }
3449
3450 static inline nir_cursor
3451 nir_before_instr(nir_instr *instr)
3452 {
3453 nir_cursor cursor;
3454 cursor.option = nir_cursor_before_instr;
3455 cursor.instr = instr;
3456 return cursor;
3457 }
3458
3459 static inline nir_cursor
3460 nir_after_instr(nir_instr *instr)
3461 {
3462 nir_cursor cursor;
3463 cursor.option = nir_cursor_after_instr;
3464 cursor.instr = instr;
3465 return cursor;
3466 }
3467
3468 static inline nir_cursor
3469 nir_after_block_before_jump(nir_block *block)
3470 {
3471 nir_instr *last_instr = nir_block_last_instr(block);
3472 if (last_instr && last_instr->type == nir_instr_type_jump) {
3473 return nir_before_instr(last_instr);
3474 } else {
3475 return nir_after_block(block);
3476 }
3477 }
3478
3479 static inline nir_cursor
3480 nir_before_src(nir_src *src, bool is_if_condition)
3481 {
3482 if (is_if_condition) {
3483 nir_block *prev_block =
3484 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3485 assert(!nir_block_ends_in_jump(prev_block));
3486 return nir_after_block(prev_block);
3487 } else if (src->parent_instr->type == nir_instr_type_phi) {
3488 #ifndef NDEBUG
3489 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3490 bool found = false;
3491 nir_foreach_phi_src(phi_src, cond_phi) {
3492 if (phi_src->src.ssa == src->ssa) {
3493 found = true;
3494 break;
3495 }
3496 }
3497 assert(found);
3498 #endif
3499 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3500 * to have a more specific name.
3501 */
3502 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3503 return nir_after_block_before_jump(phi_src->pred);
3504 } else {
3505 return nir_before_instr(src->parent_instr);
3506 }
3507 }
3508
3509 static inline nir_cursor
3510 nir_before_cf_node(nir_cf_node *node)
3511 {
3512 if (node->type == nir_cf_node_block)
3513 return nir_before_block(nir_cf_node_as_block(node));
3514
3515 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3516 }
3517
3518 static inline nir_cursor
3519 nir_after_cf_node(nir_cf_node *node)
3520 {
3521 if (node->type == nir_cf_node_block)
3522 return nir_after_block(nir_cf_node_as_block(node));
3523
3524 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3525 }
3526
3527 static inline nir_cursor
3528 nir_after_phis(nir_block *block)
3529 {
3530 nir_foreach_instr(instr, block) {
3531 if (instr->type != nir_instr_type_phi)
3532 return nir_before_instr(instr);
3533 }
3534 return nir_after_block(block);
3535 }
3536
3537 static inline nir_cursor
3538 nir_after_cf_node_and_phis(nir_cf_node *node)
3539 {
3540 if (node->type == nir_cf_node_block)
3541 return nir_after_block(nir_cf_node_as_block(node));
3542
3543 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3544
3545 return nir_after_phis(block);
3546 }
3547
3548 static inline nir_cursor
3549 nir_before_cf_list(struct exec_list *cf_list)
3550 {
3551 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3552 exec_list_get_head(cf_list), node);
3553 return nir_before_cf_node(first_node);
3554 }
3555
3556 static inline nir_cursor
3557 nir_after_cf_list(struct exec_list *cf_list)
3558 {
3559 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3560 exec_list_get_tail(cf_list), node);
3561 return nir_after_cf_node(last_node);
3562 }
3563
3564 /**
3565 * Insert a NIR instruction at the given cursor.
3566 *
3567 * Note: This does not update the cursor.
3568 */
3569 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3570
3571 static inline void
3572 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3573 {
3574 nir_instr_insert(nir_before_instr(instr), before);
3575 }
3576
3577 static inline void
3578 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3579 {
3580 nir_instr_insert(nir_after_instr(instr), after);
3581 }
3582
3583 static inline void
3584 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3585 {
3586 nir_instr_insert(nir_before_block(block), before);
3587 }
3588
3589 static inline void
3590 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3591 {
3592 nir_instr_insert(nir_after_block(block), after);
3593 }
3594
3595 static inline void
3596 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3597 {
3598 nir_instr_insert(nir_before_cf_node(node), before);
3599 }
3600
3601 static inline void
3602 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3603 {
3604 nir_instr_insert(nir_after_cf_node(node), after);
3605 }
3606
3607 static inline void
3608 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3609 {
3610 nir_instr_insert(nir_before_cf_list(list), before);
3611 }
3612
3613 static inline void
3614 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3615 {
3616 nir_instr_insert(nir_after_cf_list(list), after);
3617 }