nir/scheduler: Move nir_scheduler to its own header
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #define XXH_INLINE_ALL
45 #include "util/xxhash.h"
46 #include <stdio.h>
47
48 #ifndef NDEBUG
49 #include "util/debug.h"
50 #endif /* NDEBUG */
51
52 #include "nir_opcodes.h"
53
54 #if defined(_WIN32) && !defined(snprintf)
55 #define snprintf _snprintf
56 #endif
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #define NIR_FALSE 0u
63 #define NIR_TRUE (~0u)
64 #define NIR_MAX_VEC_COMPONENTS 16
65 #define NIR_MAX_MATRIX_COLUMNS 4
66 #define NIR_STREAM_PACKED (1 << 8)
67 typedef uint16_t nir_component_mask_t;
68
69 static inline bool
70 nir_num_components_valid(unsigned num_components)
71 {
72 return (num_components >= 1 &&
73 num_components <= 4) ||
74 num_components == 8 ||
75 num_components == 16;
76 }
77
78 /** Defines a cast function
79 *
80 * This macro defines a cast function from in_type to out_type where
81 * out_type is some structure type that contains a field of type out_type.
82 *
83 * Note that you have to be a bit careful as the generated cast function
84 * destroys constness.
85 */
86 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
87 type_field, type_value) \
88 static inline out_type * \
89 name(const in_type *parent) \
90 { \
91 assert(parent && parent->type_field == type_value); \
92 return exec_node_data(out_type, parent, field); \
93 }
94
95 struct nir_function;
96 struct nir_shader;
97 struct nir_instr;
98 struct nir_builder;
99
100
101 /**
102 * Description of built-in state associated with a uniform
103 *
104 * \sa nir_variable::state_slots
105 */
106 typedef struct {
107 gl_state_index16 tokens[STATE_LENGTH];
108 uint16_t swizzle;
109 } nir_state_slot;
110
111 typedef enum {
112 nir_var_shader_in = (1 << 0),
113 nir_var_shader_out = (1 << 1),
114 nir_var_shader_temp = (1 << 2),
115 nir_var_function_temp = (1 << 3),
116 nir_var_uniform = (1 << 4),
117 nir_var_mem_ubo = (1 << 5),
118 nir_var_system_value = (1 << 6),
119 nir_var_mem_ssbo = (1 << 7),
120 nir_var_mem_shared = (1 << 8),
121 nir_var_mem_global = (1 << 9),
122 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
123 nir_num_variable_modes = 11,
124 nir_var_all = (1 << nir_num_variable_modes) - 1,
125 } nir_variable_mode;
126
127 /**
128 * Rounding modes.
129 */
130 typedef enum {
131 nir_rounding_mode_undef = 0,
132 nir_rounding_mode_rtne = 1, /* round to nearest even */
133 nir_rounding_mode_ru = 2, /* round up */
134 nir_rounding_mode_rd = 3, /* round down */
135 nir_rounding_mode_rtz = 4, /* round towards zero */
136 } nir_rounding_mode;
137
138 typedef union {
139 bool b;
140 float f32;
141 double f64;
142 int8_t i8;
143 uint8_t u8;
144 int16_t i16;
145 uint16_t u16;
146 int32_t i32;
147 uint32_t u32;
148 int64_t i64;
149 uint64_t u64;
150 } nir_const_value;
151
152 #define nir_const_value_to_array(arr, c, components, m) \
153 { \
154 for (unsigned i = 0; i < components; ++i) \
155 arr[i] = c[i].m; \
156 } while (false)
157
158 static inline nir_const_value
159 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
160 {
161 nir_const_value v;
162 memset(&v, 0, sizeof(v));
163
164 switch (bit_size) {
165 case 1: v.b = x; break;
166 case 8: v.u8 = x; break;
167 case 16: v.u16 = x; break;
168 case 32: v.u32 = x; break;
169 case 64: v.u64 = x; break;
170 default:
171 unreachable("Invalid bit size");
172 }
173
174 return v;
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_int(int64_t i, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64) {
185 assert(i >= (-(1ll << (bit_size - 1))));
186 assert(i < (1ll << (bit_size - 1)));
187 }
188
189 return nir_const_value_for_raw_uint(i, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
194 {
195 nir_const_value v;
196 memset(&v, 0, sizeof(v));
197
198 assert(bit_size <= 64);
199 if (bit_size < 64)
200 assert(u < (1ull << bit_size));
201
202 return nir_const_value_for_raw_uint(u, bit_size);
203 }
204
205 static inline nir_const_value
206 nir_const_value_for_bool(bool b, unsigned bit_size)
207 {
208 /* Booleans use a 0/-1 convention */
209 return nir_const_value_for_int(-(int)b, bit_size);
210 }
211
212 /* This one isn't inline because it requires half-float conversion */
213 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
214
215 static inline int64_t
216 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 /* int1_t uses 0/-1 convention */
220 case 1: return -(int)value.b;
221 case 8: return value.i8;
222 case 16: return value.i16;
223 case 32: return value.i32;
224 case 64: return value.i64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline uint64_t
231 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
232 {
233 switch (bit_size) {
234 case 1: return value.b;
235 case 8: return value.u8;
236 case 16: return value.u16;
237 case 32: return value.u32;
238 case 64: return value.u64;
239 default:
240 unreachable("Invalid bit size");
241 }
242 }
243
244 static inline bool
245 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
246 {
247 int64_t i = nir_const_value_as_int(value, bit_size);
248
249 /* Booleans of any size use 0/-1 convention */
250 assert(i == 0 || i == -1);
251
252 return i;
253 }
254
255 /* This one isn't inline because it requires half-float conversion */
256 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
257
258 typedef struct nir_constant {
259 /**
260 * Value of the constant.
261 *
262 * The field used to back the values supplied by the constant is determined
263 * by the type associated with the \c nir_variable. Constants may be
264 * scalars, vectors, or matrices.
265 */
266 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
267
268 /* we could get this from the var->type but makes clone *much* easier to
269 * not have to care about the type.
270 */
271 unsigned num_elements;
272
273 /* Array elements / Structure Fields */
274 struct nir_constant **elements;
275 } nir_constant;
276
277 /**
278 * \brief Layout qualifiers for gl_FragDepth.
279 *
280 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
281 * with a layout qualifier.
282 */
283 typedef enum {
284 nir_depth_layout_none, /**< No depth layout is specified. */
285 nir_depth_layout_any,
286 nir_depth_layout_greater,
287 nir_depth_layout_less,
288 nir_depth_layout_unchanged
289 } nir_depth_layout;
290
291 /**
292 * Enum keeping track of how a variable was declared.
293 */
294 typedef enum {
295 /**
296 * Normal declaration.
297 */
298 nir_var_declared_normally = 0,
299
300 /**
301 * Variable is implicitly generated by the compiler and should not be
302 * visible via the API.
303 */
304 nir_var_hidden,
305 } nir_var_declaration_type;
306
307 /**
308 * Either a uniform, global variable, shader input, or shader output. Based on
309 * ir_variable - it should be easy to translate between the two.
310 */
311
312 typedef struct nir_variable {
313 struct exec_node node;
314
315 /**
316 * Declared type of the variable
317 */
318 const struct glsl_type *type;
319
320 /**
321 * Declared name of the variable
322 */
323 char *name;
324
325 struct nir_variable_data {
326 /**
327 * Storage class of the variable.
328 *
329 * \sa nir_variable_mode
330 */
331 nir_variable_mode mode:11;
332
333 /**
334 * Is the variable read-only?
335 *
336 * This is set for variables declared as \c const, shader inputs,
337 * and uniforms.
338 */
339 unsigned read_only:1;
340 unsigned centroid:1;
341 unsigned sample:1;
342 unsigned patch:1;
343 unsigned invariant:1;
344
345 /**
346 * Precision qualifier.
347 *
348 * In desktop GLSL we do not care about precision qualifiers at all, in
349 * fact, the spec says that precision qualifiers are ignored.
350 *
351 * To make things easy, we make it so that this field is always
352 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
353 * have the same precision value and the checks we add in the compiler
354 * for this field will never break a desktop shader compile.
355 */
356 unsigned precision:2;
357
358 /**
359 * Can this variable be coalesced with another?
360 *
361 * This is set by nir_lower_io_to_temporaries to say that any
362 * copies involving this variable should stay put. Propagating it can
363 * duplicate the resulting load/store, which is not wanted, and may
364 * result in a load/store of the variable with an indirect offset which
365 * the backend may not be able to handle.
366 */
367 unsigned cannot_coalesce:1;
368
369 /**
370 * When separate shader programs are enabled, only input/outputs between
371 * the stages of a multi-stage separate program can be safely removed
372 * from the shader interface. Other input/outputs must remains active.
373 *
374 * This is also used to make sure xfb varyings that are unused by the
375 * fragment shader are not removed.
376 */
377 unsigned always_active_io:1;
378
379 /**
380 * Interpolation mode for shader inputs / outputs
381 *
382 * \sa glsl_interp_mode
383 */
384 unsigned interpolation:3;
385
386 /**
387 * If non-zero, then this variable may be packed along with other variables
388 * into a single varying slot, so this offset should be applied when
389 * accessing components. For example, an offset of 1 means that the x
390 * component of this variable is actually stored in component y of the
391 * location specified by \c location.
392 */
393 unsigned location_frac:2;
394
395 /**
396 * If true, this variable represents an array of scalars that should
397 * be tightly packed. In other words, consecutive array elements
398 * should be stored one component apart, rather than one slot apart.
399 */
400 unsigned compact:1;
401
402 /**
403 * Whether this is a fragment shader output implicitly initialized with
404 * the previous contents of the specified render target at the
405 * framebuffer location corresponding to this shader invocation.
406 */
407 unsigned fb_fetch_output:1;
408
409 /**
410 * Non-zero if this variable is considered bindless as defined by
411 * ARB_bindless_texture.
412 */
413 unsigned bindless:1;
414
415 /**
416 * Was an explicit binding set in the shader?
417 */
418 unsigned explicit_binding:1;
419
420 /**
421 * Was the location explicitly set in the shader?
422 *
423 * If the location is explicitly set in the shader, it \b cannot be changed
424 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 * no effect).
426 */
427 unsigned explicit_location:1;
428
429 /**
430 * Was a transfer feedback buffer set in the shader?
431 */
432 unsigned explicit_xfb_buffer:1;
433
434 /**
435 * Was a transfer feedback stride set in the shader?
436 */
437 unsigned explicit_xfb_stride:1;
438
439 /**
440 * Was an explicit offset set in the shader?
441 */
442 unsigned explicit_offset:1;
443
444 /**
445 * Layout of the matrix. Uses glsl_matrix_layout values.
446 */
447 unsigned matrix_layout:2;
448
449 /**
450 * Non-zero if this variable was created by lowering a named interface
451 * block.
452 */
453 unsigned from_named_ifc_block:1;
454
455 /**
456 * How the variable was declared. See nir_var_declaration_type.
457 *
458 * This is used to detect variables generated by the compiler, so should
459 * not be visible via the API.
460 */
461 unsigned how_declared:2;
462
463 /**
464 * Is this variable per-view? If so, we know it must be an array with
465 * size corresponding to the number of views.
466 */
467 unsigned per_view:1;
468
469 /**
470 * \brief Layout qualifier for gl_FragDepth.
471 *
472 * This is not equal to \c ir_depth_layout_none if and only if this
473 * variable is \c gl_FragDepth and a layout qualifier is specified.
474 */
475 nir_depth_layout depth_layout:3;
476
477 /**
478 * Vertex stream output identifier.
479 *
480 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
481 * indicate the stream of the i-th component.
482 */
483 unsigned stream:9;
484
485 /**
486 * Access flags for memory variables (SSBO/global), image uniforms, and
487 * bindless images in uniforms/inputs/outputs.
488 */
489 enum gl_access_qualifier access:8;
490
491 /**
492 * Descriptor set binding for sampler or UBO.
493 */
494 unsigned descriptor_set:5;
495
496 /**
497 * output index for dual source blending.
498 */
499 unsigned index;
500
501 /**
502 * Initial binding point for a sampler or UBO.
503 *
504 * For array types, this represents the binding point for the first element.
505 */
506 unsigned binding;
507
508 /**
509 * Storage location of the base of this variable
510 *
511 * The precise meaning of this field depends on the nature of the variable.
512 *
513 * - Vertex shader input: one of the values from \c gl_vert_attrib.
514 * - Vertex shader output: one of the values from \c gl_varying_slot.
515 * - Geometry shader input: one of the values from \c gl_varying_slot.
516 * - Geometry shader output: one of the values from \c gl_varying_slot.
517 * - Fragment shader input: one of the values from \c gl_varying_slot.
518 * - Fragment shader output: one of the values from \c gl_frag_result.
519 * - Uniforms: Per-stage uniform slot number for default uniform block.
520 * - Uniforms: Index within the uniform block definition for UBO members.
521 * - Non-UBO Uniforms: uniform slot number.
522 * - Other: This field is not currently used.
523 *
524 * If the variable is a uniform, shader input, or shader output, and the
525 * slot has not been assigned, the value will be -1.
526 */
527 int location;
528
529 /**
530 * The actual location of the variable in the IR. Only valid for inputs,
531 * outputs, and uniforms (including samplers and images).
532 */
533 unsigned driver_location;
534
535 /**
536 * Location an atomic counter or transform feedback is stored at.
537 */
538 unsigned offset;
539
540 union {
541 struct {
542 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
543 enum pipe_format format;
544 } image;
545
546 struct {
547 /**
548 * Transform feedback buffer.
549 */
550 uint16_t buffer:2;
551
552 /**
553 * Transform feedback stride.
554 */
555 uint16_t stride;
556 } xfb;
557 };
558 } data;
559
560 /**
561 * Identifier for this variable generated by nir_index_vars() that is unique
562 * among other variables in the same exec_list.
563 */
564 unsigned index;
565
566 /* Number of nir_variable_data members */
567 uint16_t num_members;
568
569 /**
570 * Built-in state that backs this uniform
571 *
572 * Once set at variable creation, \c state_slots must remain invariant.
573 * This is because, ideally, this array would be shared by all clones of
574 * this variable in the IR tree. In other words, we'd really like for it
575 * to be a fly-weight.
576 *
577 * If the variable is not a uniform, \c num_state_slots will be zero and
578 * \c state_slots will be \c NULL.
579 */
580 /*@{*/
581 uint16_t num_state_slots; /**< Number of state slots used */
582 nir_state_slot *state_slots; /**< State descriptors. */
583 /*@}*/
584
585 /**
586 * Constant expression assigned in the initializer of the variable
587 *
588 * This field should only be used temporarily by creators of NIR shaders
589 * and then lower_constant_initializers can be used to get rid of them.
590 * Most of the rest of NIR ignores this field or asserts that it's NULL.
591 */
592 nir_constant *constant_initializer;
593
594 /**
595 * Global variable assigned in the initializer of the variable
596 * This field should only be used temporarily by creators of NIR shaders
597 * and then lower_constant_initializers can be used to get rid of them.
598 * Most of the rest of NIR ignores this field or asserts that it's NULL.
599 */
600 struct nir_variable *pointer_initializer;
601
602 /**
603 * For variables that are in an interface block or are an instance of an
604 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
605 *
606 * \sa ir_variable::location
607 */
608 const struct glsl_type *interface_type;
609
610 /**
611 * Description of per-member data for per-member struct variables
612 *
613 * This is used for variables which are actually an amalgamation of
614 * multiple entities such as a struct of built-in values or a struct of
615 * inputs each with their own layout specifier. This is only allowed on
616 * variables with a struct or array of array of struct type.
617 */
618 struct nir_variable_data *members;
619 } nir_variable;
620
621 #define nir_foreach_variable(var, var_list) \
622 foreach_list_typed(nir_variable, var, node, var_list)
623
624 #define nir_foreach_variable_safe(var, var_list) \
625 foreach_list_typed_safe(nir_variable, var, node, var_list)
626
627 static inline bool
628 nir_variable_is_global(const nir_variable *var)
629 {
630 return var->data.mode != nir_var_function_temp;
631 }
632
633 typedef struct nir_register {
634 struct exec_node node;
635
636 unsigned num_components; /** < number of vector components */
637 unsigned num_array_elems; /** < size of array (0 for no array) */
638
639 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
640 uint8_t bit_size;
641
642 /** generic register index. */
643 unsigned index;
644
645 /** only for debug purposes, can be NULL */
646 const char *name;
647
648 /** set of nir_srcs where this register is used (read from) */
649 struct list_head uses;
650
651 /** set of nir_dests where this register is defined (written to) */
652 struct list_head defs;
653
654 /** set of nir_ifs where this register is used as a condition */
655 struct list_head if_uses;
656 } nir_register;
657
658 #define nir_foreach_register(reg, reg_list) \
659 foreach_list_typed(nir_register, reg, node, reg_list)
660 #define nir_foreach_register_safe(reg, reg_list) \
661 foreach_list_typed_safe(nir_register, reg, node, reg_list)
662
663 typedef enum PACKED {
664 nir_instr_type_alu,
665 nir_instr_type_deref,
666 nir_instr_type_call,
667 nir_instr_type_tex,
668 nir_instr_type_intrinsic,
669 nir_instr_type_load_const,
670 nir_instr_type_jump,
671 nir_instr_type_ssa_undef,
672 nir_instr_type_phi,
673 nir_instr_type_parallel_copy,
674 } nir_instr_type;
675
676 typedef struct nir_instr {
677 struct exec_node node;
678 struct nir_block *block;
679 nir_instr_type type;
680
681 /* A temporary for optimization and analysis passes to use for storing
682 * flags. For instance, DCE uses this to store the "dead/live" info.
683 */
684 uint8_t pass_flags;
685
686 /** generic instruction index. */
687 unsigned index;
688 } nir_instr;
689
690 static inline nir_instr *
691 nir_instr_next(nir_instr *instr)
692 {
693 struct exec_node *next = exec_node_get_next(&instr->node);
694 if (exec_node_is_tail_sentinel(next))
695 return NULL;
696 else
697 return exec_node_data(nir_instr, next, node);
698 }
699
700 static inline nir_instr *
701 nir_instr_prev(nir_instr *instr)
702 {
703 struct exec_node *prev = exec_node_get_prev(&instr->node);
704 if (exec_node_is_head_sentinel(prev))
705 return NULL;
706 else
707 return exec_node_data(nir_instr, prev, node);
708 }
709
710 static inline bool
711 nir_instr_is_first(const nir_instr *instr)
712 {
713 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
714 }
715
716 static inline bool
717 nir_instr_is_last(const nir_instr *instr)
718 {
719 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
720 }
721
722 typedef struct nir_ssa_def {
723 /** for debugging only, can be NULL */
724 const char* name;
725
726 /** generic SSA definition index. */
727 unsigned index;
728
729 /** Index into the live_in and live_out bitfields */
730 unsigned live_index;
731
732 /** Instruction which produces this SSA value. */
733 nir_instr *parent_instr;
734
735 /** set of nir_instrs where this register is used (read from) */
736 struct list_head uses;
737
738 /** set of nir_ifs where this register is used as a condition */
739 struct list_head if_uses;
740
741 uint8_t num_components;
742
743 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
744 uint8_t bit_size;
745
746 /**
747 * True if this SSA value may have different values in different SIMD
748 * invocations of the shader. This is set by nir_divergence_analysis.
749 */
750 bool divergent;
751 } nir_ssa_def;
752
753 struct nir_src;
754
755 typedef struct {
756 nir_register *reg;
757 struct nir_src *indirect; /** < NULL for no indirect offset */
758 unsigned base_offset;
759
760 /* TODO use-def chain goes here */
761 } nir_reg_src;
762
763 typedef struct {
764 nir_instr *parent_instr;
765 struct list_head def_link;
766
767 nir_register *reg;
768 struct nir_src *indirect; /** < NULL for no indirect offset */
769 unsigned base_offset;
770
771 /* TODO def-use chain goes here */
772 } nir_reg_dest;
773
774 struct nir_if;
775
776 typedef struct nir_src {
777 union {
778 /** Instruction that consumes this value as a source. */
779 nir_instr *parent_instr;
780 struct nir_if *parent_if;
781 };
782
783 struct list_head use_link;
784
785 union {
786 nir_reg_src reg;
787 nir_ssa_def *ssa;
788 };
789
790 bool is_ssa;
791 } nir_src;
792
793 static inline nir_src
794 nir_src_init(void)
795 {
796 nir_src src = { { NULL } };
797 return src;
798 }
799
800 #define NIR_SRC_INIT nir_src_init()
801
802 #define nir_foreach_use(src, reg_or_ssa_def) \
803 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
804
805 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
806 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
807
808 #define nir_foreach_if_use(src, reg_or_ssa_def) \
809 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
810
811 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
812 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
813
814 typedef struct {
815 union {
816 nir_reg_dest reg;
817 nir_ssa_def ssa;
818 };
819
820 bool is_ssa;
821 } nir_dest;
822
823 static inline nir_dest
824 nir_dest_init(void)
825 {
826 nir_dest dest = { { { NULL } } };
827 return dest;
828 }
829
830 #define NIR_DEST_INIT nir_dest_init()
831
832 #define nir_foreach_def(dest, reg) \
833 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
834
835 #define nir_foreach_def_safe(dest, reg) \
836 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
837
838 static inline nir_src
839 nir_src_for_ssa(nir_ssa_def *def)
840 {
841 nir_src src = NIR_SRC_INIT;
842
843 src.is_ssa = true;
844 src.ssa = def;
845
846 return src;
847 }
848
849 static inline nir_src
850 nir_src_for_reg(nir_register *reg)
851 {
852 nir_src src = NIR_SRC_INIT;
853
854 src.is_ssa = false;
855 src.reg.reg = reg;
856 src.reg.indirect = NULL;
857 src.reg.base_offset = 0;
858
859 return src;
860 }
861
862 static inline nir_dest
863 nir_dest_for_reg(nir_register *reg)
864 {
865 nir_dest dest = NIR_DEST_INIT;
866
867 dest.reg.reg = reg;
868
869 return dest;
870 }
871
872 static inline unsigned
873 nir_src_bit_size(nir_src src)
874 {
875 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
876 }
877
878 static inline unsigned
879 nir_src_num_components(nir_src src)
880 {
881 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
882 }
883
884 static inline bool
885 nir_src_is_const(nir_src src)
886 {
887 return src.is_ssa &&
888 src.ssa->parent_instr->type == nir_instr_type_load_const;
889 }
890
891 static inline bool
892 nir_src_is_divergent(nir_src src)
893 {
894 assert(src.is_ssa);
895 return src.ssa->divergent;
896 }
897
898 static inline unsigned
899 nir_dest_bit_size(nir_dest dest)
900 {
901 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
902 }
903
904 static inline unsigned
905 nir_dest_num_components(nir_dest dest)
906 {
907 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
908 }
909
910 static inline bool
911 nir_dest_is_divergent(nir_dest dest)
912 {
913 assert(dest.is_ssa);
914 return dest.ssa.divergent;
915 }
916
917 /* Are all components the same, ie. .xxxx */
918 static inline bool
919 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
920 {
921 for (unsigned i = 1; i < nr_comp; i++)
922 if (swiz[i] != swiz[0])
923 return false;
924 return true;
925 }
926
927 /* Are all components sequential, ie. .yzw */
928 static inline bool
929 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
930 {
931 for (unsigned i = 1; i < nr_comp; i++)
932 if (swiz[i] != (swiz[0] + i))
933 return false;
934 return true;
935 }
936
937 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
938 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
939
940 typedef struct {
941 nir_src src;
942
943 /**
944 * \name input modifiers
945 */
946 /*@{*/
947 /**
948 * For inputs interpreted as floating point, flips the sign bit. For
949 * inputs interpreted as integers, performs the two's complement negation.
950 */
951 bool negate;
952
953 /**
954 * Clears the sign bit for floating point values, and computes the integer
955 * absolute value for integers. Note that the negate modifier acts after
956 * the absolute value modifier, therefore if both are set then all inputs
957 * will become negative.
958 */
959 bool abs;
960 /*@}*/
961
962 /**
963 * For each input component, says which component of the register it is
964 * chosen from. Note that which elements of the swizzle are used and which
965 * are ignored are based on the write mask for most opcodes - for example,
966 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
967 * a swizzle of {2, x, 1, 0} where x means "don't care."
968 */
969 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
970 } nir_alu_src;
971
972 typedef struct {
973 nir_dest dest;
974
975 /**
976 * \name saturate output modifier
977 *
978 * Only valid for opcodes that output floating-point numbers. Clamps the
979 * output to between 0.0 and 1.0 inclusive.
980 */
981
982 bool saturate;
983
984 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
985 } nir_alu_dest;
986
987 /** NIR sized and unsized types
988 *
989 * The values in this enum are carefully chosen so that the sized type is
990 * just the unsized type OR the number of bits.
991 */
992 typedef enum PACKED {
993 nir_type_invalid = 0, /* Not a valid type */
994 nir_type_int = 2,
995 nir_type_uint = 4,
996 nir_type_bool = 6,
997 nir_type_float = 128,
998 nir_type_bool1 = 1 | nir_type_bool,
999 nir_type_bool8 = 8 | nir_type_bool,
1000 nir_type_bool16 = 16 | nir_type_bool,
1001 nir_type_bool32 = 32 | nir_type_bool,
1002 nir_type_int1 = 1 | nir_type_int,
1003 nir_type_int8 = 8 | nir_type_int,
1004 nir_type_int16 = 16 | nir_type_int,
1005 nir_type_int32 = 32 | nir_type_int,
1006 nir_type_int64 = 64 | nir_type_int,
1007 nir_type_uint1 = 1 | nir_type_uint,
1008 nir_type_uint8 = 8 | nir_type_uint,
1009 nir_type_uint16 = 16 | nir_type_uint,
1010 nir_type_uint32 = 32 | nir_type_uint,
1011 nir_type_uint64 = 64 | nir_type_uint,
1012 nir_type_float16 = 16 | nir_type_float,
1013 nir_type_float32 = 32 | nir_type_float,
1014 nir_type_float64 = 64 | nir_type_float,
1015 } nir_alu_type;
1016
1017 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1018 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1019
1020 static inline unsigned
1021 nir_alu_type_get_type_size(nir_alu_type type)
1022 {
1023 return type & NIR_ALU_TYPE_SIZE_MASK;
1024 }
1025
1026 static inline nir_alu_type
1027 nir_alu_type_get_base_type(nir_alu_type type)
1028 {
1029 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1030 }
1031
1032 static inline nir_alu_type
1033 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1034 {
1035 switch (base_type) {
1036 case GLSL_TYPE_BOOL:
1037 return nir_type_bool1;
1038 break;
1039 case GLSL_TYPE_UINT:
1040 return nir_type_uint32;
1041 break;
1042 case GLSL_TYPE_INT:
1043 return nir_type_int32;
1044 break;
1045 case GLSL_TYPE_UINT16:
1046 return nir_type_uint16;
1047 break;
1048 case GLSL_TYPE_INT16:
1049 return nir_type_int16;
1050 break;
1051 case GLSL_TYPE_UINT8:
1052 return nir_type_uint8;
1053 case GLSL_TYPE_INT8:
1054 return nir_type_int8;
1055 case GLSL_TYPE_UINT64:
1056 return nir_type_uint64;
1057 break;
1058 case GLSL_TYPE_INT64:
1059 return nir_type_int64;
1060 break;
1061 case GLSL_TYPE_FLOAT:
1062 return nir_type_float32;
1063 break;
1064 case GLSL_TYPE_FLOAT16:
1065 return nir_type_float16;
1066 break;
1067 case GLSL_TYPE_DOUBLE:
1068 return nir_type_float64;
1069 break;
1070
1071 case GLSL_TYPE_SAMPLER:
1072 case GLSL_TYPE_IMAGE:
1073 case GLSL_TYPE_ATOMIC_UINT:
1074 case GLSL_TYPE_STRUCT:
1075 case GLSL_TYPE_INTERFACE:
1076 case GLSL_TYPE_ARRAY:
1077 case GLSL_TYPE_VOID:
1078 case GLSL_TYPE_SUBROUTINE:
1079 case GLSL_TYPE_FUNCTION:
1080 case GLSL_TYPE_ERROR:
1081 return nir_type_invalid;
1082 }
1083
1084 unreachable("unknown type");
1085 }
1086
1087 static inline nir_alu_type
1088 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1089 {
1090 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1091 }
1092
1093 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1094 nir_rounding_mode rnd);
1095
1096 static inline nir_op
1097 nir_op_vec(unsigned components)
1098 {
1099 switch (components) {
1100 case 1: return nir_op_mov;
1101 case 2: return nir_op_vec2;
1102 case 3: return nir_op_vec3;
1103 case 4: return nir_op_vec4;
1104 case 8: return nir_op_vec8;
1105 case 16: return nir_op_vec16;
1106 default: unreachable("bad component count");
1107 }
1108 }
1109
1110 static inline bool
1111 nir_op_is_vec(nir_op op)
1112 {
1113 switch (op) {
1114 case nir_op_mov:
1115 case nir_op_vec2:
1116 case nir_op_vec3:
1117 case nir_op_vec4:
1118 case nir_op_vec8:
1119 case nir_op_vec16:
1120 return true;
1121 default:
1122 return false;
1123 }
1124 }
1125
1126 static inline bool
1127 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1128 {
1129 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1130 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1131 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1132 }
1133
1134 static inline bool
1135 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1136 {
1137 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1138 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1139 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1140 }
1141
1142 static inline bool
1143 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1144 {
1145 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1146 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1147 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1148 }
1149
1150 static inline bool
1151 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1152 {
1153 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1154 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1155 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1156 }
1157
1158 static inline bool
1159 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1160 {
1161 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1162 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1163 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1164 }
1165
1166 static inline bool
1167 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1168 {
1169 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1170 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1171 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1172 }
1173
1174 static inline bool
1175 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1176 {
1177 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1178 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1179 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1180 }
1181
1182 static inline nir_rounding_mode
1183 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1184 nir_alu_type type)
1185 {
1186 if (nir_alu_type_get_base_type(type) != nir_type_float)
1187 return nir_rounding_mode_undef;
1188
1189 unsigned bit_size = nir_alu_type_get_type_size(type);
1190
1191 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1192 return nir_rounding_mode_rtz;
1193 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1194 return nir_rounding_mode_rtne;
1195 return nir_rounding_mode_undef;
1196 }
1197
1198 static inline bool
1199 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1200 {
1201 bool result =
1202 nir_has_any_rounding_mode_rtne(execution_mode) ||
1203 nir_has_any_rounding_mode_rtz(execution_mode);
1204 return result;
1205 }
1206
1207 typedef enum {
1208 /**
1209 * Operation where the first two sources are commutative.
1210 *
1211 * For 2-source operations, this just mathematical commutativity. Some
1212 * 3-source operations, like ffma, are only commutative in the first two
1213 * sources.
1214 */
1215 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1216 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1217 } nir_op_algebraic_property;
1218
1219 typedef struct {
1220 const char *name;
1221
1222 uint8_t num_inputs;
1223
1224 /**
1225 * The number of components in the output
1226 *
1227 * If non-zero, this is the size of the output and input sizes are
1228 * explicitly given; swizzle and writemask are still in effect, but if
1229 * the output component is masked out, then the input component may
1230 * still be in use.
1231 *
1232 * If zero, the opcode acts in the standard, per-component manner; the
1233 * operation is performed on each component (except the ones that are
1234 * masked out) with the input being taken from the input swizzle for
1235 * that component.
1236 *
1237 * The size of some of the inputs may be given (i.e. non-zero) even
1238 * though output_size is zero; in that case, the inputs with a zero
1239 * size act per-component, while the inputs with non-zero size don't.
1240 */
1241 uint8_t output_size;
1242
1243 /**
1244 * The type of vector that the instruction outputs. Note that the
1245 * staurate modifier is only allowed on outputs with the float type.
1246 */
1247
1248 nir_alu_type output_type;
1249
1250 /**
1251 * The number of components in each input
1252 */
1253 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1254
1255 /**
1256 * The type of vector that each input takes. Note that negate and
1257 * absolute value are only allowed on inputs with int or float type and
1258 * behave differently on the two.
1259 */
1260 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1261
1262 nir_op_algebraic_property algebraic_properties;
1263
1264 /* Whether this represents a numeric conversion opcode */
1265 bool is_conversion;
1266 } nir_op_info;
1267
1268 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1269
1270 typedef struct nir_alu_instr {
1271 nir_instr instr;
1272 nir_op op;
1273
1274 /** Indicates that this ALU instruction generates an exact value
1275 *
1276 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1277 * really equivalent to either. This indicates that the value generated by
1278 * this operation is high-precision and any code transformations that touch
1279 * it must ensure that the resulting value is bit-for-bit identical to the
1280 * original.
1281 */
1282 bool exact:1;
1283
1284 /**
1285 * Indicates that this instruction do not cause wrapping to occur, in the
1286 * form of overflow or underflow.
1287 */
1288 bool no_signed_wrap:1;
1289 bool no_unsigned_wrap:1;
1290
1291 nir_alu_dest dest;
1292 nir_alu_src src[];
1293 } nir_alu_instr;
1294
1295 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1296 nir_alu_instr *instr);
1297 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1298 nir_alu_instr *instr);
1299
1300 /* is this source channel used? */
1301 static inline bool
1302 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1303 unsigned channel)
1304 {
1305 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1306 return channel < nir_op_infos[instr->op].input_sizes[src];
1307
1308 return (instr->dest.write_mask >> channel) & 1;
1309 }
1310
1311 static inline nir_component_mask_t
1312 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1313 {
1314 nir_component_mask_t read_mask = 0;
1315 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1316 if (!nir_alu_instr_channel_used(instr, src, c))
1317 continue;
1318
1319 read_mask |= (1 << instr->src[src].swizzle[c]);
1320 }
1321 return read_mask;
1322 }
1323
1324 /**
1325 * Get the number of channels used for a source
1326 */
1327 static inline unsigned
1328 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1329 {
1330 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1331 return nir_op_infos[instr->op].input_sizes[src];
1332
1333 return nir_dest_num_components(instr->dest.dest);
1334 }
1335
1336 static inline bool
1337 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1338 {
1339 switch (instr->op) {
1340 case nir_op_flt:
1341 case nir_op_fge:
1342 case nir_op_feq:
1343 case nir_op_fne:
1344 case nir_op_ilt:
1345 case nir_op_ult:
1346 case nir_op_ige:
1347 case nir_op_uge:
1348 case nir_op_ieq:
1349 case nir_op_ine:
1350 case nir_op_i2b1:
1351 case nir_op_f2b1:
1352 case nir_op_inot:
1353 return true;
1354 default:
1355 return false;
1356 }
1357 }
1358
1359 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1360 nir_alu_type full_type);
1361
1362 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1363 unsigned src1, unsigned src2);
1364
1365 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1366 const nir_alu_instr *alu2,
1367 unsigned src1, unsigned src2);
1368
1369 typedef enum {
1370 nir_deref_type_var,
1371 nir_deref_type_array,
1372 nir_deref_type_array_wildcard,
1373 nir_deref_type_ptr_as_array,
1374 nir_deref_type_struct,
1375 nir_deref_type_cast,
1376 } nir_deref_type;
1377
1378 typedef struct {
1379 nir_instr instr;
1380
1381 /** The type of this deref instruction */
1382 nir_deref_type deref_type;
1383
1384 /** The mode of the underlying variable */
1385 nir_variable_mode mode;
1386
1387 /** The dereferenced type of the resulting pointer value */
1388 const struct glsl_type *type;
1389
1390 union {
1391 /** Variable being dereferenced if deref_type is a deref_var */
1392 nir_variable *var;
1393
1394 /** Parent deref if deref_type is not deref_var */
1395 nir_src parent;
1396 };
1397
1398 /** Additional deref parameters */
1399 union {
1400 struct {
1401 nir_src index;
1402 } arr;
1403
1404 struct {
1405 unsigned index;
1406 } strct;
1407
1408 struct {
1409 unsigned ptr_stride;
1410 } cast;
1411 };
1412
1413 /** Destination to store the resulting "pointer" */
1414 nir_dest dest;
1415 } nir_deref_instr;
1416
1417 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1418
1419 static inline nir_deref_instr *
1420 nir_deref_instr_parent(const nir_deref_instr *instr)
1421 {
1422 if (instr->deref_type == nir_deref_type_var)
1423 return NULL;
1424 else
1425 return nir_src_as_deref(instr->parent);
1426 }
1427
1428 static inline nir_variable *
1429 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1430 {
1431 while (instr->deref_type != nir_deref_type_var) {
1432 if (instr->deref_type == nir_deref_type_cast)
1433 return NULL;
1434
1435 instr = nir_deref_instr_parent(instr);
1436 }
1437
1438 return instr->var;
1439 }
1440
1441 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1442 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1443 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1444
1445 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1446
1447 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1448
1449 typedef struct {
1450 nir_instr instr;
1451
1452 struct nir_function *callee;
1453
1454 unsigned num_params;
1455 nir_src params[];
1456 } nir_call_instr;
1457
1458 #include "nir_intrinsics.h"
1459
1460 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1461
1462 /** Represents an intrinsic
1463 *
1464 * An intrinsic is an instruction type for handling things that are
1465 * more-or-less regular operations but don't just consume and produce SSA
1466 * values like ALU operations do. Intrinsics are not for things that have
1467 * special semantic meaning such as phi nodes and parallel copies.
1468 * Examples of intrinsics include variable load/store operations, system
1469 * value loads, and the like. Even though texturing more-or-less falls
1470 * under this category, texturing is its own instruction type because
1471 * trying to represent texturing with intrinsics would lead to a
1472 * combinatorial explosion of intrinsic opcodes.
1473 *
1474 * By having a single instruction type for handling a lot of different
1475 * cases, optimization passes can look for intrinsics and, for the most
1476 * part, completely ignore them. Each intrinsic type also has a few
1477 * possible flags that govern whether or not they can be reordered or
1478 * eliminated. That way passes like dead code elimination can still work
1479 * on intrisics without understanding the meaning of each.
1480 *
1481 * Each intrinsic has some number of constant indices, some number of
1482 * variables, and some number of sources. What these sources, variables,
1483 * and indices mean depends on the intrinsic and is documented with the
1484 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1485 * instructions are the only types of instruction that can operate on
1486 * variables.
1487 */
1488 typedef struct {
1489 nir_instr instr;
1490
1491 nir_intrinsic_op intrinsic;
1492
1493 nir_dest dest;
1494
1495 /** number of components if this is a vectorized intrinsic
1496 *
1497 * Similarly to ALU operations, some intrinsics are vectorized.
1498 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1499 * For vectorized intrinsics, the num_components field specifies the
1500 * number of destination components and the number of source components
1501 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1502 */
1503 uint8_t num_components;
1504
1505 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1506
1507 nir_src src[];
1508 } nir_intrinsic_instr;
1509
1510 static inline nir_variable *
1511 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1512 {
1513 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1514 }
1515
1516 typedef enum {
1517 /* Memory ordering. */
1518 NIR_MEMORY_ACQUIRE = 1 << 0,
1519 NIR_MEMORY_RELEASE = 1 << 1,
1520 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1521
1522 /* Memory visibility operations. */
1523 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1524 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1525 } nir_memory_semantics;
1526
1527 typedef enum {
1528 NIR_SCOPE_NONE,
1529 NIR_SCOPE_INVOCATION,
1530 NIR_SCOPE_SUBGROUP,
1531 NIR_SCOPE_WORKGROUP,
1532 NIR_SCOPE_QUEUE_FAMILY,
1533 NIR_SCOPE_DEVICE,
1534 } nir_scope;
1535
1536 /**
1537 * \name NIR intrinsics semantic flags
1538 *
1539 * information about what the compiler can do with the intrinsics.
1540 *
1541 * \sa nir_intrinsic_info::flags
1542 */
1543 typedef enum {
1544 /**
1545 * whether the intrinsic can be safely eliminated if none of its output
1546 * value is not being used.
1547 */
1548 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1549
1550 /**
1551 * Whether the intrinsic can be reordered with respect to any other
1552 * intrinsic, i.e. whether the only reordering dependencies of the
1553 * intrinsic are due to the register reads/writes.
1554 */
1555 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1556 } nir_intrinsic_semantic_flag;
1557
1558 /**
1559 * \name NIR intrinsics const-index flag
1560 *
1561 * Indicates the usage of a const_index slot.
1562 *
1563 * \sa nir_intrinsic_info::index_map
1564 */
1565 typedef enum {
1566 /**
1567 * Generally instructions that take a offset src argument, can encode
1568 * a constant 'base' value which is added to the offset.
1569 */
1570 NIR_INTRINSIC_BASE = 1,
1571
1572 /**
1573 * For store instructions, a writemask for the store.
1574 */
1575 NIR_INTRINSIC_WRMASK,
1576
1577 /**
1578 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1579 */
1580 NIR_INTRINSIC_STREAM_ID,
1581
1582 /**
1583 * The clip-plane id for load_user_clip_plane intrinsic.
1584 */
1585 NIR_INTRINSIC_UCP_ID,
1586
1587 /**
1588 * The amount of data, starting from BASE, that this instruction may
1589 * access. This is used to provide bounds if the offset is not constant.
1590 */
1591 NIR_INTRINSIC_RANGE,
1592
1593 /**
1594 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1595 */
1596 NIR_INTRINSIC_DESC_SET,
1597
1598 /**
1599 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1600 */
1601 NIR_INTRINSIC_BINDING,
1602
1603 /**
1604 * Component offset.
1605 */
1606 NIR_INTRINSIC_COMPONENT,
1607
1608 /**
1609 * Interpolation mode (only meaningful for FS inputs).
1610 */
1611 NIR_INTRINSIC_INTERP_MODE,
1612
1613 /**
1614 * A binary nir_op to use when performing a reduction or scan operation
1615 */
1616 NIR_INTRINSIC_REDUCTION_OP,
1617
1618 /**
1619 * Cluster size for reduction operations
1620 */
1621 NIR_INTRINSIC_CLUSTER_SIZE,
1622
1623 /**
1624 * Parameter index for a load_param intrinsic
1625 */
1626 NIR_INTRINSIC_PARAM_IDX,
1627
1628 /**
1629 * Image dimensionality for image intrinsics
1630 *
1631 * One of GLSL_SAMPLER_DIM_*
1632 */
1633 NIR_INTRINSIC_IMAGE_DIM,
1634
1635 /**
1636 * Non-zero if we are accessing an array image
1637 */
1638 NIR_INTRINSIC_IMAGE_ARRAY,
1639
1640 /**
1641 * Image format for image intrinsics
1642 */
1643 NIR_INTRINSIC_FORMAT,
1644
1645 /**
1646 * Access qualifiers for image and memory access intrinsics
1647 */
1648 NIR_INTRINSIC_ACCESS,
1649
1650 /**
1651 * Alignment for offsets and addresses
1652 *
1653 * These two parameters, specify an alignment in terms of a multiplier and
1654 * an offset. The offset or address parameter X of the intrinsic is
1655 * guaranteed to satisfy the following:
1656 *
1657 * (X - align_offset) % align_mul == 0
1658 */
1659 NIR_INTRINSIC_ALIGN_MUL,
1660 NIR_INTRINSIC_ALIGN_OFFSET,
1661
1662 /**
1663 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1664 */
1665 NIR_INTRINSIC_DESC_TYPE,
1666
1667 /**
1668 * The nir_alu_type of a uniform/input/output
1669 */
1670 NIR_INTRINSIC_TYPE,
1671
1672 /**
1673 * The swizzle mask for the instructions
1674 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1675 */
1676 NIR_INTRINSIC_SWIZZLE_MASK,
1677
1678 /* Separate source/dest access flags for copies */
1679 NIR_INTRINSIC_SRC_ACCESS,
1680 NIR_INTRINSIC_DST_ACCESS,
1681
1682 /* Driver location for nir_load_patch_location_ir3 */
1683 NIR_INTRINSIC_DRIVER_LOCATION,
1684
1685 /**
1686 * Mask of nir_memory_semantics, includes ordering and visibility.
1687 */
1688 NIR_INTRINSIC_MEMORY_SEMANTICS,
1689
1690 /**
1691 * Mask of nir_variable_modes affected by the memory operation.
1692 */
1693 NIR_INTRINSIC_MEMORY_MODES,
1694
1695 /**
1696 * Value of nir_scope.
1697 */
1698 NIR_INTRINSIC_MEMORY_SCOPE,
1699
1700 /**
1701 * Value of nir_scope.
1702 */
1703 NIR_INTRINSIC_EXECUTION_SCOPE,
1704
1705 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1706
1707 } nir_intrinsic_index_flag;
1708
1709 #define NIR_INTRINSIC_MAX_INPUTS 5
1710
1711 typedef struct {
1712 const char *name;
1713
1714 uint8_t num_srcs; /** < number of register/SSA inputs */
1715
1716 /** number of components of each input register
1717 *
1718 * If this value is 0, the number of components is given by the
1719 * num_components field of nir_intrinsic_instr. If this value is -1, the
1720 * intrinsic consumes however many components are provided and it is not
1721 * validated at all.
1722 */
1723 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1724
1725 bool has_dest;
1726
1727 /** number of components of the output register
1728 *
1729 * If this value is 0, the number of components is given by the
1730 * num_components field of nir_intrinsic_instr.
1731 */
1732 uint8_t dest_components;
1733
1734 /** bitfield of legal bit sizes */
1735 uint8_t dest_bit_sizes;
1736
1737 /** the number of constant indices used by the intrinsic */
1738 uint8_t num_indices;
1739
1740 /** indicates the usage of intr->const_index[n] */
1741 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1742
1743 /** semantic flags for calls to this intrinsic */
1744 nir_intrinsic_semantic_flag flags;
1745 } nir_intrinsic_info;
1746
1747 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1748
1749 static inline unsigned
1750 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1751 {
1752 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1753 assert(srcn < info->num_srcs);
1754 if (info->src_components[srcn] > 0)
1755 return info->src_components[srcn];
1756 else if (info->src_components[srcn] == 0)
1757 return intr->num_components;
1758 else
1759 return nir_src_num_components(intr->src[srcn]);
1760 }
1761
1762 static inline unsigned
1763 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1764 {
1765 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1766 if (!info->has_dest)
1767 return 0;
1768 else if (info->dest_components)
1769 return info->dest_components;
1770 else
1771 return intr->num_components;
1772 }
1773
1774 /**
1775 * Helper to copy const_index[] from src to dst, without assuming they
1776 * match in order.
1777 */
1778 static inline void
1779 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1780 {
1781 if (src->intrinsic == dst->intrinsic) {
1782 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1783 return;
1784 }
1785
1786 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1787 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1788
1789 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1790 if (src_info->index_map[i] == 0)
1791 continue;
1792
1793 /* require that dst instruction also uses the same const_index[]: */
1794 assert(dst_info->index_map[i] > 0);
1795
1796 dst->const_index[dst_info->index_map[i] - 1] =
1797 src->const_index[src_info->index_map[i] - 1];
1798 }
1799 }
1800
1801 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1802 static inline type \
1803 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1804 { \
1805 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1806 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1807 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1808 } \
1809 static inline void \
1810 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1811 { \
1812 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1813 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1814 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1815 }
1816
1817 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1818 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1819 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1820 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1821 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1822 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1823 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1824 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1825 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1826 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1827 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1828 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1829 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1830 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1831 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1832 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1833 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1834 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1835 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1836 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1837 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1838 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1839 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1840 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1841 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1842 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1843 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1844 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1845
1846 static inline void
1847 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1848 unsigned align_mul, unsigned align_offset)
1849 {
1850 assert(util_is_power_of_two_nonzero(align_mul));
1851 assert(align_offset < align_mul);
1852 nir_intrinsic_set_align_mul(intrin, align_mul);
1853 nir_intrinsic_set_align_offset(intrin, align_offset);
1854 }
1855
1856 /** Returns a simple alignment for a load/store intrinsic offset
1857 *
1858 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1859 * and ALIGN_OFFSET parameters, this helper takes both into account and
1860 * provides a single simple alignment parameter. The offset X is guaranteed
1861 * to satisfy X % align == 0.
1862 */
1863 static inline unsigned
1864 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1865 {
1866 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1867 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1868 assert(align_offset < align_mul);
1869 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1870 }
1871
1872 unsigned
1873 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1874
1875 /* Converts a image_deref_* intrinsic into a image_* one */
1876 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1877 nir_ssa_def *handle, bool bindless);
1878
1879 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1880 static inline bool
1881 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1882 {
1883 if (instr->intrinsic == nir_intrinsic_load_deref ||
1884 instr->intrinsic == nir_intrinsic_load_ssbo ||
1885 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1886 instr->intrinsic == nir_intrinsic_image_deref_load ||
1887 instr->intrinsic == nir_intrinsic_image_load) {
1888 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1889 } else {
1890 const nir_intrinsic_info *info =
1891 &nir_intrinsic_infos[instr->intrinsic];
1892 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1893 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1894 }
1895 }
1896
1897 /**
1898 * \group texture information
1899 *
1900 * This gives semantic information about textures which is useful to the
1901 * frontend, the backend, and lowering passes, but not the optimizer.
1902 */
1903
1904 typedef enum {
1905 nir_tex_src_coord,
1906 nir_tex_src_projector,
1907 nir_tex_src_comparator, /* shadow comparator */
1908 nir_tex_src_offset,
1909 nir_tex_src_bias,
1910 nir_tex_src_lod,
1911 nir_tex_src_min_lod,
1912 nir_tex_src_ms_index, /* MSAA sample index */
1913 nir_tex_src_ms_mcs, /* MSAA compression value */
1914 nir_tex_src_ddx,
1915 nir_tex_src_ddy,
1916 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1917 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1918 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1919 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1920 nir_tex_src_texture_handle, /* < bindless texture handle */
1921 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1922 nir_tex_src_plane, /* < selects plane for planar textures */
1923 nir_num_tex_src_types
1924 } nir_tex_src_type;
1925
1926 typedef struct {
1927 nir_src src;
1928 nir_tex_src_type src_type;
1929 } nir_tex_src;
1930
1931 typedef enum {
1932 nir_texop_tex, /**< Regular texture look-up */
1933 nir_texop_txb, /**< Texture look-up with LOD bias */
1934 nir_texop_txl, /**< Texture look-up with explicit LOD */
1935 nir_texop_txd, /**< Texture look-up with partial derivatives */
1936 nir_texop_txf, /**< Texel fetch with explicit LOD */
1937 nir_texop_txf_ms, /**< Multisample texture fetch */
1938 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1939 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1940 nir_texop_txs, /**< Texture size */
1941 nir_texop_lod, /**< Texture lod query */
1942 nir_texop_tg4, /**< Texture gather */
1943 nir_texop_query_levels, /**< Texture levels query */
1944 nir_texop_texture_samples, /**< Texture samples query */
1945 nir_texop_samples_identical, /**< Query whether all samples are definitely
1946 * identical.
1947 */
1948 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1949 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1950 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1951 } nir_texop;
1952
1953 typedef struct {
1954 nir_instr instr;
1955
1956 enum glsl_sampler_dim sampler_dim;
1957 nir_alu_type dest_type;
1958
1959 nir_texop op;
1960 nir_dest dest;
1961 nir_tex_src *src;
1962 unsigned num_srcs, coord_components;
1963 bool is_array, is_shadow;
1964
1965 /**
1966 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1967 * components or the new-style shadow that outputs 1 component.
1968 */
1969 bool is_new_style_shadow;
1970
1971 /* gather component selector */
1972 unsigned component : 2;
1973
1974 /* gather offsets */
1975 int8_t tg4_offsets[4][2];
1976
1977 /* True if the texture index or handle is not dynamically uniform */
1978 bool texture_non_uniform;
1979
1980 /* True if the sampler index or handle is not dynamically uniform */
1981 bool sampler_non_uniform;
1982
1983 /** The texture index
1984 *
1985 * If this texture instruction has a nir_tex_src_texture_offset source,
1986 * then the texture index is given by texture_index + texture_offset.
1987 */
1988 unsigned texture_index;
1989
1990 /** The sampler index
1991 *
1992 * The following operations do not require a sampler and, as such, this
1993 * field should be ignored:
1994 * - nir_texop_txf
1995 * - nir_texop_txf_ms
1996 * - nir_texop_txs
1997 * - nir_texop_lod
1998 * - nir_texop_query_levels
1999 * - nir_texop_texture_samples
2000 * - nir_texop_samples_identical
2001 *
2002 * If this texture instruction has a nir_tex_src_sampler_offset source,
2003 * then the sampler index is given by sampler_index + sampler_offset.
2004 */
2005 unsigned sampler_index;
2006 } nir_tex_instr;
2007
2008 /*
2009 * Returns true if the texture operation requires a sampler as a general rule,
2010 * see the documentation of sampler_index.
2011 *
2012 * Note that the specific hw/driver backend could require to a sampler
2013 * object/configuration packet in any case, for some other reason.
2014 */
2015 static inline bool
2016 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2017 {
2018 switch (instr->op) {
2019 case nir_texop_txf:
2020 case nir_texop_txf_ms:
2021 case nir_texop_txs:
2022 case nir_texop_lod:
2023 case nir_texop_query_levels:
2024 case nir_texop_texture_samples:
2025 case nir_texop_samples_identical:
2026 return false;
2027 default:
2028 return true;
2029 }
2030 }
2031
2032 static inline unsigned
2033 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2034 {
2035 switch (instr->op) {
2036 case nir_texop_txs: {
2037 unsigned ret;
2038 switch (instr->sampler_dim) {
2039 case GLSL_SAMPLER_DIM_1D:
2040 case GLSL_SAMPLER_DIM_BUF:
2041 ret = 1;
2042 break;
2043 case GLSL_SAMPLER_DIM_2D:
2044 case GLSL_SAMPLER_DIM_CUBE:
2045 case GLSL_SAMPLER_DIM_MS:
2046 case GLSL_SAMPLER_DIM_RECT:
2047 case GLSL_SAMPLER_DIM_EXTERNAL:
2048 case GLSL_SAMPLER_DIM_SUBPASS:
2049 ret = 2;
2050 break;
2051 case GLSL_SAMPLER_DIM_3D:
2052 ret = 3;
2053 break;
2054 default:
2055 unreachable("not reached");
2056 }
2057 if (instr->is_array)
2058 ret++;
2059 return ret;
2060 }
2061
2062 case nir_texop_lod:
2063 return 2;
2064
2065 case nir_texop_texture_samples:
2066 case nir_texop_query_levels:
2067 case nir_texop_samples_identical:
2068 case nir_texop_fragment_mask_fetch:
2069 return 1;
2070
2071 default:
2072 if (instr->is_shadow && instr->is_new_style_shadow)
2073 return 1;
2074
2075 return 4;
2076 }
2077 }
2078
2079 /* Returns true if this texture operation queries something about the texture
2080 * rather than actually sampling it.
2081 */
2082 static inline bool
2083 nir_tex_instr_is_query(const nir_tex_instr *instr)
2084 {
2085 switch (instr->op) {
2086 case nir_texop_txs:
2087 case nir_texop_lod:
2088 case nir_texop_texture_samples:
2089 case nir_texop_query_levels:
2090 case nir_texop_txf_ms_mcs:
2091 return true;
2092 case nir_texop_tex:
2093 case nir_texop_txb:
2094 case nir_texop_txl:
2095 case nir_texop_txd:
2096 case nir_texop_txf:
2097 case nir_texop_txf_ms:
2098 case nir_texop_txf_ms_fb:
2099 case nir_texop_tg4:
2100 return false;
2101 default:
2102 unreachable("Invalid texture opcode");
2103 }
2104 }
2105
2106 static inline bool
2107 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2108 {
2109 switch (instr->op) {
2110 case nir_texop_tex:
2111 case nir_texop_txb:
2112 case nir_texop_lod:
2113 return true;
2114 default:
2115 return false;
2116 }
2117 }
2118
2119 static inline nir_alu_type
2120 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2121 {
2122 switch (instr->src[src].src_type) {
2123 case nir_tex_src_coord:
2124 switch (instr->op) {
2125 case nir_texop_txf:
2126 case nir_texop_txf_ms:
2127 case nir_texop_txf_ms_fb:
2128 case nir_texop_txf_ms_mcs:
2129 case nir_texop_samples_identical:
2130 return nir_type_int;
2131
2132 default:
2133 return nir_type_float;
2134 }
2135
2136 case nir_tex_src_lod:
2137 switch (instr->op) {
2138 case nir_texop_txs:
2139 case nir_texop_txf:
2140 return nir_type_int;
2141
2142 default:
2143 return nir_type_float;
2144 }
2145
2146 case nir_tex_src_projector:
2147 case nir_tex_src_comparator:
2148 case nir_tex_src_bias:
2149 case nir_tex_src_min_lod:
2150 case nir_tex_src_ddx:
2151 case nir_tex_src_ddy:
2152 return nir_type_float;
2153
2154 case nir_tex_src_offset:
2155 case nir_tex_src_ms_index:
2156 case nir_tex_src_plane:
2157 return nir_type_int;
2158
2159 case nir_tex_src_ms_mcs:
2160 case nir_tex_src_texture_deref:
2161 case nir_tex_src_sampler_deref:
2162 case nir_tex_src_texture_offset:
2163 case nir_tex_src_sampler_offset:
2164 case nir_tex_src_texture_handle:
2165 case nir_tex_src_sampler_handle:
2166 return nir_type_uint;
2167
2168 case nir_num_tex_src_types:
2169 unreachable("nir_num_tex_src_types is not a valid source type");
2170 }
2171
2172 unreachable("Invalid texture source type");
2173 }
2174
2175 static inline unsigned
2176 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2177 {
2178 if (instr->src[src].src_type == nir_tex_src_coord)
2179 return instr->coord_components;
2180
2181 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2182 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2183 return 4;
2184
2185 if (instr->src[src].src_type == nir_tex_src_ddx ||
2186 instr->src[src].src_type == nir_tex_src_ddy) {
2187 if (instr->is_array)
2188 return instr->coord_components - 1;
2189 else
2190 return instr->coord_components;
2191 }
2192
2193 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2194 * the offset, since a cube maps to a single face.
2195 */
2196 if (instr->src[src].src_type == nir_tex_src_offset) {
2197 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2198 return 2;
2199 else if (instr->is_array)
2200 return instr->coord_components - 1;
2201 else
2202 return instr->coord_components;
2203 }
2204
2205 return 1;
2206 }
2207
2208 static inline int
2209 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2210 {
2211 for (unsigned i = 0; i < instr->num_srcs; i++)
2212 if (instr->src[i].src_type == type)
2213 return (int) i;
2214
2215 return -1;
2216 }
2217
2218 void nir_tex_instr_add_src(nir_tex_instr *tex,
2219 nir_tex_src_type src_type,
2220 nir_src src);
2221
2222 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2223
2224 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2225
2226 typedef struct {
2227 nir_instr instr;
2228
2229 nir_ssa_def def;
2230
2231 nir_const_value value[];
2232 } nir_load_const_instr;
2233
2234 typedef enum {
2235 /** Return from a function
2236 *
2237 * This instruction is a classic function return. It jumps to
2238 * nir_function_impl::end_block. No return value is provided in this
2239 * instruction. Instead, the function is expected to write any return
2240 * data to a deref passed in from the caller.
2241 */
2242 nir_jump_return,
2243
2244 /** Break out of the inner-most loop
2245 *
2246 * This has the same semantics as C's "break" statement.
2247 */
2248 nir_jump_break,
2249
2250 /** Jump back to the top of the inner-most loop
2251 *
2252 * This has the same semantics as C's "continue" statement assuming that a
2253 * NIR loop is implemented as "while (1) { body }".
2254 */
2255 nir_jump_continue,
2256 } nir_jump_type;
2257
2258 typedef struct {
2259 nir_instr instr;
2260 nir_jump_type type;
2261 } nir_jump_instr;
2262
2263 /* creates a new SSA variable in an undefined state */
2264
2265 typedef struct {
2266 nir_instr instr;
2267 nir_ssa_def def;
2268 } nir_ssa_undef_instr;
2269
2270 typedef struct {
2271 struct exec_node node;
2272
2273 /* The predecessor block corresponding to this source */
2274 struct nir_block *pred;
2275
2276 nir_src src;
2277 } nir_phi_src;
2278
2279 #define nir_foreach_phi_src(phi_src, phi) \
2280 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2281 #define nir_foreach_phi_src_safe(phi_src, phi) \
2282 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2283
2284 typedef struct {
2285 nir_instr instr;
2286
2287 struct exec_list srcs; /** < list of nir_phi_src */
2288
2289 nir_dest dest;
2290 } nir_phi_instr;
2291
2292 typedef struct {
2293 struct exec_node node;
2294 nir_src src;
2295 nir_dest dest;
2296 } nir_parallel_copy_entry;
2297
2298 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2299 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2300
2301 typedef struct {
2302 nir_instr instr;
2303
2304 /* A list of nir_parallel_copy_entrys. The sources of all of the
2305 * entries are copied to the corresponding destinations "in parallel".
2306 * In other words, if we have two entries: a -> b and b -> a, the values
2307 * get swapped.
2308 */
2309 struct exec_list entries;
2310 } nir_parallel_copy_instr;
2311
2312 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2313 type, nir_instr_type_alu)
2314 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2315 type, nir_instr_type_deref)
2316 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2317 type, nir_instr_type_call)
2318 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2319 type, nir_instr_type_jump)
2320 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2321 type, nir_instr_type_tex)
2322 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2323 type, nir_instr_type_intrinsic)
2324 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2325 type, nir_instr_type_load_const)
2326 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2327 type, nir_instr_type_ssa_undef)
2328 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2329 type, nir_instr_type_phi)
2330 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2331 nir_parallel_copy_instr, instr,
2332 type, nir_instr_type_parallel_copy)
2333
2334
2335 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2336 static inline type \
2337 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2338 { \
2339 assert(nir_src_is_const(src)); \
2340 nir_load_const_instr *load = \
2341 nir_instr_as_load_const(src.ssa->parent_instr); \
2342 assert(comp < load->def.num_components); \
2343 return nir_const_value_as_##suffix(load->value[comp], \
2344 load->def.bit_size); \
2345 } \
2346 \
2347 static inline type \
2348 nir_src_as_##suffix(nir_src src) \
2349 { \
2350 assert(nir_src_num_components(src) == 1); \
2351 return nir_src_comp_as_##suffix(src, 0); \
2352 }
2353
2354 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2355 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2356 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2357 NIR_DEFINE_SRC_AS_CONST(double, float)
2358
2359 #undef NIR_DEFINE_SRC_AS_CONST
2360
2361
2362 typedef struct {
2363 nir_ssa_def *def;
2364 unsigned comp;
2365 } nir_ssa_scalar;
2366
2367 static inline bool
2368 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2369 {
2370 return s.def->parent_instr->type == nir_instr_type_load_const;
2371 }
2372
2373 static inline nir_const_value
2374 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2375 {
2376 assert(s.comp < s.def->num_components);
2377 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2378 return load->value[s.comp];
2379 }
2380
2381 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2382 static inline type \
2383 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2384 { \
2385 return nir_const_value_as_##suffix( \
2386 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2387 }
2388
2389 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2390 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2391 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2392 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2393
2394 #undef NIR_DEFINE_SCALAR_AS_CONST
2395
2396 static inline bool
2397 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2398 {
2399 return s.def->parent_instr->type == nir_instr_type_alu;
2400 }
2401
2402 static inline nir_op
2403 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2404 {
2405 return nir_instr_as_alu(s.def->parent_instr)->op;
2406 }
2407
2408 static inline nir_ssa_scalar
2409 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2410 {
2411 nir_ssa_scalar out = { NULL, 0 };
2412
2413 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2414 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2415
2416 /* Our component must be written */
2417 assert(s.comp < s.def->num_components);
2418 assert(alu->dest.write_mask & (1u << s.comp));
2419
2420 assert(alu->src[alu_src_idx].src.is_ssa);
2421 out.def = alu->src[alu_src_idx].src.ssa;
2422
2423 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2424 /* The ALU src is unsized so the source component follows the
2425 * destination component.
2426 */
2427 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2428 } else {
2429 /* This is a sized source so all source components work together to
2430 * produce all the destination components. Since we need to return a
2431 * scalar, this only works if the source is a scalar.
2432 */
2433 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2434 out.comp = alu->src[alu_src_idx].swizzle[0];
2435 }
2436 assert(out.comp < out.def->num_components);
2437
2438 return out;
2439 }
2440
2441
2442 /*
2443 * Control flow
2444 *
2445 * Control flow consists of a tree of control flow nodes, which include
2446 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2447 * instructions that always run start-to-finish. Each basic block also keeps
2448 * track of its successors (blocks which may run immediately after the current
2449 * block) and predecessors (blocks which could have run immediately before the
2450 * current block). Each function also has a start block and an end block which
2451 * all return statements point to (which is always empty). Together, all the
2452 * blocks with their predecessors and successors make up the control flow
2453 * graph (CFG) of the function. There are helpers that modify the tree of
2454 * control flow nodes while modifying the CFG appropriately; these should be
2455 * used instead of modifying the tree directly.
2456 */
2457
2458 typedef enum {
2459 nir_cf_node_block,
2460 nir_cf_node_if,
2461 nir_cf_node_loop,
2462 nir_cf_node_function
2463 } nir_cf_node_type;
2464
2465 typedef struct nir_cf_node {
2466 struct exec_node node;
2467 nir_cf_node_type type;
2468 struct nir_cf_node *parent;
2469 } nir_cf_node;
2470
2471 typedef struct nir_block {
2472 nir_cf_node cf_node;
2473
2474 struct exec_list instr_list; /** < list of nir_instr */
2475
2476 /** generic block index; generated by nir_index_blocks */
2477 unsigned index;
2478
2479 /*
2480 * Each block can only have up to 2 successors, so we put them in a simple
2481 * array - no need for anything more complicated.
2482 */
2483 struct nir_block *successors[2];
2484
2485 /* Set of nir_block predecessors in the CFG */
2486 struct set *predecessors;
2487
2488 /*
2489 * this node's immediate dominator in the dominance tree - set to NULL for
2490 * the start block.
2491 */
2492 struct nir_block *imm_dom;
2493
2494 /* This node's children in the dominance tree */
2495 unsigned num_dom_children;
2496 struct nir_block **dom_children;
2497
2498 /* Set of nir_blocks on the dominance frontier of this block */
2499 struct set *dom_frontier;
2500
2501 /*
2502 * These two indices have the property that dom_{pre,post}_index for each
2503 * child of this block in the dominance tree will always be between
2504 * dom_pre_index and dom_post_index for this block, which makes testing if
2505 * a given block is dominated by another block an O(1) operation.
2506 */
2507 int16_t dom_pre_index, dom_post_index;
2508
2509 /* live in and out for this block; used for liveness analysis */
2510 BITSET_WORD *live_in;
2511 BITSET_WORD *live_out;
2512 } nir_block;
2513
2514 static inline bool
2515 nir_block_is_reachable(nir_block *b)
2516 {
2517 /* See also nir_block_dominates */
2518 return b->dom_post_index != -1;
2519 }
2520
2521 static inline nir_instr *
2522 nir_block_first_instr(nir_block *block)
2523 {
2524 struct exec_node *head = exec_list_get_head(&block->instr_list);
2525 return exec_node_data(nir_instr, head, node);
2526 }
2527
2528 static inline nir_instr *
2529 nir_block_last_instr(nir_block *block)
2530 {
2531 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2532 return exec_node_data(nir_instr, tail, node);
2533 }
2534
2535 static inline bool
2536 nir_block_ends_in_jump(nir_block *block)
2537 {
2538 return !exec_list_is_empty(&block->instr_list) &&
2539 nir_block_last_instr(block)->type == nir_instr_type_jump;
2540 }
2541
2542 #define nir_foreach_instr(instr, block) \
2543 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2544 #define nir_foreach_instr_reverse(instr, block) \
2545 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2546 #define nir_foreach_instr_safe(instr, block) \
2547 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2548 #define nir_foreach_instr_reverse_safe(instr, block) \
2549 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2550
2551 typedef enum {
2552 nir_selection_control_none = 0x0,
2553 nir_selection_control_flatten = 0x1,
2554 nir_selection_control_dont_flatten = 0x2,
2555 } nir_selection_control;
2556
2557 typedef struct nir_if {
2558 nir_cf_node cf_node;
2559 nir_src condition;
2560 nir_selection_control control;
2561
2562 struct exec_list then_list; /** < list of nir_cf_node */
2563 struct exec_list else_list; /** < list of nir_cf_node */
2564 } nir_if;
2565
2566 typedef struct {
2567 nir_if *nif;
2568
2569 /** Instruction that generates nif::condition. */
2570 nir_instr *conditional_instr;
2571
2572 /** Block within ::nif that has the break instruction. */
2573 nir_block *break_block;
2574
2575 /** Last block for the then- or else-path that does not contain the break. */
2576 nir_block *continue_from_block;
2577
2578 /** True when ::break_block is in the else-path of ::nif. */
2579 bool continue_from_then;
2580 bool induction_rhs;
2581
2582 /* This is true if the terminators exact trip count is unknown. For
2583 * example:
2584 *
2585 * for (int i = 0; i < imin(x, 4); i++)
2586 * ...
2587 *
2588 * Here loop analysis would have set a max_trip_count of 4 however we dont
2589 * know for sure that this is the exact trip count.
2590 */
2591 bool exact_trip_count_unknown;
2592
2593 struct list_head loop_terminator_link;
2594 } nir_loop_terminator;
2595
2596 typedef struct {
2597 /* Estimated cost (in number of instructions) of the loop */
2598 unsigned instr_cost;
2599
2600 /* Guessed trip count based on array indexing */
2601 unsigned guessed_trip_count;
2602
2603 /* Maximum number of times the loop is run (if known) */
2604 unsigned max_trip_count;
2605
2606 /* Do we know the exact number of times the loop will be run */
2607 bool exact_trip_count_known;
2608
2609 /* Unroll the loop regardless of its size */
2610 bool force_unroll;
2611
2612 /* Does the loop contain complex loop terminators, continues or other
2613 * complex behaviours? If this is true we can't rely on
2614 * loop_terminator_list to be complete or accurate.
2615 */
2616 bool complex_loop;
2617
2618 nir_loop_terminator *limiting_terminator;
2619
2620 /* A list of loop_terminators terminating this loop. */
2621 struct list_head loop_terminator_list;
2622 } nir_loop_info;
2623
2624 typedef enum {
2625 nir_loop_control_none = 0x0,
2626 nir_loop_control_unroll = 0x1,
2627 nir_loop_control_dont_unroll = 0x2,
2628 } nir_loop_control;
2629
2630 typedef struct {
2631 nir_cf_node cf_node;
2632
2633 struct exec_list body; /** < list of nir_cf_node */
2634
2635 nir_loop_info *info;
2636 nir_loop_control control;
2637 bool partially_unrolled;
2638 } nir_loop;
2639
2640 /**
2641 * Various bits of metadata that can may be created or required by
2642 * optimization and analysis passes
2643 */
2644 typedef enum {
2645 nir_metadata_none = 0x0,
2646
2647 /** Indicates that nir_block::index values are valid.
2648 *
2649 * The start block has index 0 and they increase through a natural walk of
2650 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2651 * every block index is in the range [0, nir_function_impl::num_blocks].
2652 *
2653 * A pass can preserve this metadata type if it doesn't touch the CFG.
2654 */
2655 nir_metadata_block_index = 0x1,
2656
2657 /** Indicates that block dominance information is valid
2658 *
2659 * This includes:
2660 *
2661 * - nir_block::num_dom_children
2662 * - nir_block::dom_children
2663 * - nir_block::dom_frontier
2664 * - nir_block::dom_pre_index
2665 * - nir_block::dom_post_index
2666 *
2667 * A pass can preserve this metadata type if it doesn't touch the CFG.
2668 */
2669 nir_metadata_dominance = 0x2,
2670
2671 /** Indicates that SSA def data-flow liveness information is valid
2672 *
2673 * This includes:
2674 *
2675 * - nir_ssa_def::live_index
2676 * - nir_block::live_in
2677 * - nir_block::live_out
2678 *
2679 * A pass can preserve this metadata type if it never adds or removes any
2680 * SSA defs (most passes shouldn't preserve this metadata type).
2681 */
2682 nir_metadata_live_ssa_defs = 0x4,
2683
2684 /** A dummy metadata value to track when a pass forgot to call
2685 * nir_metadata_preserve.
2686 *
2687 * A pass should always clear this value even if it doesn't make any
2688 * progress to indicate that it thought about preserving metadata.
2689 */
2690 nir_metadata_not_properly_reset = 0x8,
2691
2692 /** Indicates that loop analysis information is valid.
2693 *
2694 * This includes everything pointed to by nir_loop::info.
2695 *
2696 * A pass can preserve this metadata type if it is guaranteed to not affect
2697 * any loop metadata. However, since loop metadata includes things like
2698 * loop counts which depend on arithmetic in the loop, this is very hard to
2699 * determine. Most passes shouldn't preserve this metadata type.
2700 */
2701 nir_metadata_loop_analysis = 0x10,
2702
2703 /** All metadata
2704 *
2705 * This includes all nir_metadata flags except not_properly_reset. Passes
2706 * which do not change the shader in any way should call
2707 *
2708 * nir_metadata_preserve(impl, nir_metadata_all);
2709 */
2710 nir_metadata_all = ~nir_metadata_not_properly_reset,
2711 } nir_metadata;
2712
2713 typedef struct {
2714 nir_cf_node cf_node;
2715
2716 /** pointer to the function of which this is an implementation */
2717 struct nir_function *function;
2718
2719 struct exec_list body; /** < list of nir_cf_node */
2720
2721 nir_block *end_block;
2722
2723 /** list for all local variables in the function */
2724 struct exec_list locals;
2725
2726 /** list of local registers in the function */
2727 struct exec_list registers;
2728
2729 /** next available local register index */
2730 unsigned reg_alloc;
2731
2732 /** next available SSA value index */
2733 unsigned ssa_alloc;
2734
2735 /* total number of basic blocks, only valid when block_index_dirty = false */
2736 unsigned num_blocks;
2737
2738 nir_metadata valid_metadata;
2739 } nir_function_impl;
2740
2741 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2742 nir_start_block(nir_function_impl *impl)
2743 {
2744 return (nir_block *) impl->body.head_sentinel.next;
2745 }
2746
2747 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2748 nir_impl_last_block(nir_function_impl *impl)
2749 {
2750 return (nir_block *) impl->body.tail_sentinel.prev;
2751 }
2752
2753 static inline nir_cf_node *
2754 nir_cf_node_next(nir_cf_node *node)
2755 {
2756 struct exec_node *next = exec_node_get_next(&node->node);
2757 if (exec_node_is_tail_sentinel(next))
2758 return NULL;
2759 else
2760 return exec_node_data(nir_cf_node, next, node);
2761 }
2762
2763 static inline nir_cf_node *
2764 nir_cf_node_prev(nir_cf_node *node)
2765 {
2766 struct exec_node *prev = exec_node_get_prev(&node->node);
2767 if (exec_node_is_head_sentinel(prev))
2768 return NULL;
2769 else
2770 return exec_node_data(nir_cf_node, prev, node);
2771 }
2772
2773 static inline bool
2774 nir_cf_node_is_first(const nir_cf_node *node)
2775 {
2776 return exec_node_is_head_sentinel(node->node.prev);
2777 }
2778
2779 static inline bool
2780 nir_cf_node_is_last(const nir_cf_node *node)
2781 {
2782 return exec_node_is_tail_sentinel(node->node.next);
2783 }
2784
2785 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2786 type, nir_cf_node_block)
2787 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2788 type, nir_cf_node_if)
2789 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2790 type, nir_cf_node_loop)
2791 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2792 nir_function_impl, cf_node, type, nir_cf_node_function)
2793
2794 static inline nir_block *
2795 nir_if_first_then_block(nir_if *if_stmt)
2796 {
2797 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2798 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2799 }
2800
2801 static inline nir_block *
2802 nir_if_last_then_block(nir_if *if_stmt)
2803 {
2804 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2805 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2806 }
2807
2808 static inline nir_block *
2809 nir_if_first_else_block(nir_if *if_stmt)
2810 {
2811 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2812 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2813 }
2814
2815 static inline nir_block *
2816 nir_if_last_else_block(nir_if *if_stmt)
2817 {
2818 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2819 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2820 }
2821
2822 static inline nir_block *
2823 nir_loop_first_block(nir_loop *loop)
2824 {
2825 struct exec_node *head = exec_list_get_head(&loop->body);
2826 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2827 }
2828
2829 static inline nir_block *
2830 nir_loop_last_block(nir_loop *loop)
2831 {
2832 struct exec_node *tail = exec_list_get_tail(&loop->body);
2833 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2834 }
2835
2836 /**
2837 * Return true if this list of cf_nodes contains a single empty block.
2838 */
2839 static inline bool
2840 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2841 {
2842 if (exec_list_is_singular(cf_list)) {
2843 struct exec_node *head = exec_list_get_head(cf_list);
2844 nir_block *block =
2845 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2846 return exec_list_is_empty(&block->instr_list);
2847 }
2848 return false;
2849 }
2850
2851 typedef struct {
2852 uint8_t num_components;
2853 uint8_t bit_size;
2854 } nir_parameter;
2855
2856 typedef struct nir_function {
2857 struct exec_node node;
2858
2859 const char *name;
2860 struct nir_shader *shader;
2861
2862 unsigned num_params;
2863 nir_parameter *params;
2864
2865 /** The implementation of this function.
2866 *
2867 * If the function is only declared and not implemented, this is NULL.
2868 */
2869 nir_function_impl *impl;
2870
2871 bool is_entrypoint;
2872 } nir_function;
2873
2874 typedef enum {
2875 nir_lower_imul64 = (1 << 0),
2876 nir_lower_isign64 = (1 << 1),
2877 /** Lower all int64 modulus and division opcodes */
2878 nir_lower_divmod64 = (1 << 2),
2879 /** Lower all 64-bit umul_high and imul_high opcodes */
2880 nir_lower_imul_high64 = (1 << 3),
2881 nir_lower_mov64 = (1 << 4),
2882 nir_lower_icmp64 = (1 << 5),
2883 nir_lower_iadd64 = (1 << 6),
2884 nir_lower_iabs64 = (1 << 7),
2885 nir_lower_ineg64 = (1 << 8),
2886 nir_lower_logic64 = (1 << 9),
2887 nir_lower_minmax64 = (1 << 10),
2888 nir_lower_shift64 = (1 << 11),
2889 nir_lower_imul_2x32_64 = (1 << 12),
2890 nir_lower_extract64 = (1 << 13),
2891 nir_lower_ufind_msb64 = (1 << 14),
2892 } nir_lower_int64_options;
2893
2894 typedef enum {
2895 nir_lower_drcp = (1 << 0),
2896 nir_lower_dsqrt = (1 << 1),
2897 nir_lower_drsq = (1 << 2),
2898 nir_lower_dtrunc = (1 << 3),
2899 nir_lower_dfloor = (1 << 4),
2900 nir_lower_dceil = (1 << 5),
2901 nir_lower_dfract = (1 << 6),
2902 nir_lower_dround_even = (1 << 7),
2903 nir_lower_dmod = (1 << 8),
2904 nir_lower_dsub = (1 << 9),
2905 nir_lower_ddiv = (1 << 10),
2906 nir_lower_fp64_full_software = (1 << 11),
2907 } nir_lower_doubles_options;
2908
2909 typedef enum {
2910 nir_divergence_single_prim_per_subgroup = (1 << 0),
2911 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2912 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2913 nir_divergence_view_index_uniform = (1 << 3),
2914 } nir_divergence_options;
2915
2916 typedef struct nir_shader_compiler_options {
2917 bool lower_fdiv;
2918 bool lower_ffma;
2919 bool fuse_ffma;
2920 bool lower_flrp16;
2921 bool lower_flrp32;
2922 /** Lowers flrp when it does not support doubles */
2923 bool lower_flrp64;
2924 bool lower_fpow;
2925 bool lower_fsat;
2926 bool lower_fsqrt;
2927 bool lower_sincos;
2928 bool lower_fmod;
2929 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2930 bool lower_bitfield_extract;
2931 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2932 bool lower_bitfield_extract_to_shifts;
2933 /** Lowers bitfield_insert to bfi/bfm */
2934 bool lower_bitfield_insert;
2935 /** Lowers bitfield_insert to compares, and shifts. */
2936 bool lower_bitfield_insert_to_shifts;
2937 /** Lowers bitfield_insert to bfm/bitfield_select. */
2938 bool lower_bitfield_insert_to_bitfield_select;
2939 /** Lowers bitfield_reverse to shifts. */
2940 bool lower_bitfield_reverse;
2941 /** Lowers bit_count to shifts. */
2942 bool lower_bit_count;
2943 /** Lowers ifind_msb to compare and ufind_msb */
2944 bool lower_ifind_msb;
2945 /** Lowers find_lsb to ufind_msb and logic ops */
2946 bool lower_find_lsb;
2947 bool lower_uadd_carry;
2948 bool lower_usub_borrow;
2949 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2950 bool lower_mul_high;
2951 /** lowers fneg and ineg to fsub and isub. */
2952 bool lower_negate;
2953 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2954 bool lower_sub;
2955
2956 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2957 bool lower_scmp;
2958
2959 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2960 bool lower_vector_cmp;
2961
2962 /** enables rules to lower idiv by power-of-two: */
2963 bool lower_idiv;
2964
2965 /** enable rules to avoid bit ops */
2966 bool lower_bitops;
2967
2968 /** enables rules to lower isign to imin+imax */
2969 bool lower_isign;
2970
2971 /** enables rules to lower fsign to fsub and flt */
2972 bool lower_fsign;
2973
2974 /* lower fdph to fdot4 */
2975 bool lower_fdph;
2976
2977 /** lower fdot to fmul and fsum/fadd. */
2978 bool lower_fdot;
2979
2980 /* Does the native fdot instruction replicate its result for four
2981 * components? If so, then opt_algebraic_late will turn all fdotN
2982 * instructions into fdot_replicatedN instructions.
2983 */
2984 bool fdot_replicates;
2985
2986 /** lowers ffloor to fsub+ffract: */
2987 bool lower_ffloor;
2988
2989 /** lowers ffract to fsub+ffloor: */
2990 bool lower_ffract;
2991
2992 /** lowers fceil to fneg+ffloor+fneg: */
2993 bool lower_fceil;
2994
2995 bool lower_ftrunc;
2996
2997 bool lower_ldexp;
2998
2999 bool lower_pack_half_2x16;
3000 bool lower_pack_unorm_2x16;
3001 bool lower_pack_snorm_2x16;
3002 bool lower_pack_unorm_4x8;
3003 bool lower_pack_snorm_4x8;
3004 bool lower_unpack_half_2x16;
3005 bool lower_unpack_unorm_2x16;
3006 bool lower_unpack_snorm_2x16;
3007 bool lower_unpack_unorm_4x8;
3008 bool lower_unpack_snorm_4x8;
3009
3010 bool lower_pack_split;
3011
3012 bool lower_extract_byte;
3013 bool lower_extract_word;
3014
3015 bool lower_all_io_to_temps;
3016 bool lower_all_io_to_elements;
3017
3018 /* Indicates that the driver only has zero-based vertex id */
3019 bool vertex_id_zero_based;
3020
3021 /**
3022 * If enabled, gl_BaseVertex will be lowered as:
3023 * is_indexed_draw (~0/0) & firstvertex
3024 */
3025 bool lower_base_vertex;
3026
3027 /**
3028 * If enabled, gl_HelperInvocation will be lowered as:
3029 *
3030 * !((1 << sample_id) & sample_mask_in))
3031 *
3032 * This depends on some possibly hw implementation details, which may
3033 * not be true for all hw. In particular that the FS is only executed
3034 * for covered samples or for helper invocations. So, do not blindly
3035 * enable this option.
3036 *
3037 * Note: See also issue #22 in ARB_shader_image_load_store
3038 */
3039 bool lower_helper_invocation;
3040
3041 /**
3042 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3043 *
3044 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3045 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3046 */
3047 bool optimize_sample_mask_in;
3048
3049 bool lower_cs_local_index_from_id;
3050 bool lower_cs_local_id_from_index;
3051
3052 bool lower_device_index_to_zero;
3053
3054 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3055 bool lower_wpos_pntc;
3056
3057 /**
3058 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3059 * lowered to simple arithmetic.
3060 *
3061 * If this flag is set, the lowering will be applied to all bit-sizes of
3062 * these instructions.
3063 *
3064 * \sa ::lower_hadd64
3065 */
3066 bool lower_hadd;
3067
3068 /**
3069 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3070 * should be lowered to simple arithmetic.
3071 *
3072 * If this flag is set, the lowering will be applied to only 64-bit
3073 * versions of these instructions.
3074 *
3075 * \sa ::lower_hadd
3076 */
3077 bool lower_hadd64;
3078
3079 /**
3080 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3081 * arithmetic.
3082 *
3083 * If this flag is set, the lowering will be applied to all bit-sizes of
3084 * these instructions.
3085 *
3086 * \sa ::lower_usub_sat64
3087 */
3088 bool lower_add_sat;
3089
3090 /**
3091 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3092 * arithmetic.
3093 *
3094 * \sa ::lower_add_sat
3095 */
3096 bool lower_usub_sat64;
3097
3098 /**
3099 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3100 * for IO purposes and would prefer loads/stores be vectorized.
3101 */
3102 bool vectorize_io;
3103 bool lower_to_scalar;
3104
3105 /**
3106 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3107 */
3108 bool vectorize_vec2_16bit;
3109
3110 /**
3111 * Should the linker unify inputs_read/outputs_written between adjacent
3112 * shader stages which are linked into a single program?
3113 */
3114 bool unify_interfaces;
3115
3116 /**
3117 * Should nir_lower_io() create load_interpolated_input intrinsics?
3118 *
3119 * If not, it generates regular load_input intrinsics and interpolation
3120 * information must be inferred from the list of input nir_variables.
3121 */
3122 bool use_interpolated_input_intrinsics;
3123
3124 /* Lowers when 32x32->64 bit multiplication is not supported */
3125 bool lower_mul_2x32_64;
3126
3127 /* Lowers when rotate instruction is not supported */
3128 bool lower_rotate;
3129
3130 /**
3131 * Backend supports imul24, and would like to use it (when possible)
3132 * for address/offset calculation. If true, driver should call
3133 * nir_lower_amul(). (If not set, amul will automatically be lowered
3134 * to imul.)
3135 */
3136 bool has_imul24;
3137
3138 /** Backend supports umul24, if not set umul24 will automatically be lowered
3139 * to imul with masked inputs */
3140 bool has_umul24;
3141
3142 /** Backend supports umad24, if not set umad24 will automatically be lowered
3143 * to imul with masked inputs and iadd */
3144 bool has_umad24;
3145
3146 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3147 * memory and control barrier intrinsics based on GLSL.
3148 */
3149 bool use_scoped_barrier;
3150
3151 /**
3152 * Is this the Intel vec4 backend?
3153 *
3154 * Used to inhibit algebraic optimizations that are known to be harmful on
3155 * the Intel vec4 backend. This is generally applicable to any
3156 * optimization that might cause more immediate values to be used in
3157 * 3-source (e.g., ffma and flrp) instructions.
3158 */
3159 bool intel_vec4;
3160
3161 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3162 bool lower_bfe_with_two_constants;
3163
3164 /** Whether 8-bit ALU is supported. */
3165 bool support_8bit_alu;
3166
3167 /** Whether 16-bit ALU is supported. */
3168 bool support_16bit_alu;
3169
3170 unsigned max_unroll_iterations;
3171
3172 nir_lower_int64_options lower_int64_options;
3173 nir_lower_doubles_options lower_doubles_options;
3174 } nir_shader_compiler_options;
3175
3176 typedef struct nir_shader {
3177 /** list of uniforms (nir_variable) */
3178 struct exec_list uniforms;
3179
3180 /** list of inputs (nir_variable) */
3181 struct exec_list inputs;
3182
3183 /** list of outputs (nir_variable) */
3184 struct exec_list outputs;
3185
3186 /** list of shared compute variables (nir_variable) */
3187 struct exec_list shared;
3188
3189 /** Set of driver-specific options for the shader.
3190 *
3191 * The memory for the options is expected to be kept in a single static
3192 * copy by the driver.
3193 */
3194 const struct nir_shader_compiler_options *options;
3195
3196 /** Various bits of compile-time information about a given shader */
3197 struct shader_info info;
3198
3199 /** list of global variables in the shader (nir_variable) */
3200 struct exec_list globals;
3201
3202 /** list of system value variables in the shader (nir_variable) */
3203 struct exec_list system_values;
3204
3205 struct exec_list functions; /** < list of nir_function */
3206
3207 /**
3208 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3209 * access plus one
3210 */
3211 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3212
3213 /** Size in bytes of required scratch space */
3214 unsigned scratch_size;
3215
3216 /** Constant data associated with this shader.
3217 *
3218 * Constant data is loaded through load_constant intrinsics. See also
3219 * nir_opt_large_constants.
3220 */
3221 void *constant_data;
3222 unsigned constant_data_size;
3223 } nir_shader;
3224
3225 #define nir_foreach_function(func, shader) \
3226 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3227
3228 static inline nir_function_impl *
3229 nir_shader_get_entrypoint(nir_shader *shader)
3230 {
3231 nir_function *func = NULL;
3232
3233 nir_foreach_function(function, shader) {
3234 assert(func == NULL);
3235 if (function->is_entrypoint) {
3236 func = function;
3237 #ifndef NDEBUG
3238 break;
3239 #endif
3240 }
3241 }
3242
3243 if (!func)
3244 return NULL;
3245
3246 assert(func->num_params == 0);
3247 assert(func->impl);
3248 return func->impl;
3249 }
3250
3251 nir_shader *nir_shader_create(void *mem_ctx,
3252 gl_shader_stage stage,
3253 const nir_shader_compiler_options *options,
3254 shader_info *si);
3255
3256 nir_register *nir_local_reg_create(nir_function_impl *impl);
3257
3258 void nir_reg_remove(nir_register *reg);
3259
3260 /** Adds a variable to the appropriate list in nir_shader */
3261 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3262
3263 static inline void
3264 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3265 {
3266 assert(var->data.mode == nir_var_function_temp);
3267 exec_list_push_tail(&impl->locals, &var->node);
3268 }
3269
3270 /** creates a variable, sets a few defaults, and adds it to the list */
3271 nir_variable *nir_variable_create(nir_shader *shader,
3272 nir_variable_mode mode,
3273 const struct glsl_type *type,
3274 const char *name);
3275 /** creates a local variable and adds it to the list */
3276 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3277 const struct glsl_type *type,
3278 const char *name);
3279
3280 /** creates a function and adds it to the shader's list of functions */
3281 nir_function *nir_function_create(nir_shader *shader, const char *name);
3282
3283 nir_function_impl *nir_function_impl_create(nir_function *func);
3284 /** creates a function_impl that isn't tied to any particular function */
3285 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3286
3287 nir_block *nir_block_create(nir_shader *shader);
3288 nir_if *nir_if_create(nir_shader *shader);
3289 nir_loop *nir_loop_create(nir_shader *shader);
3290
3291 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3292
3293 /** requests that the given pieces of metadata be generated */
3294 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3295 /** dirties all but the preserved metadata */
3296 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3297 /** Preserves all metadata for the given shader */
3298 void nir_shader_preserve_all_metadata(nir_shader *shader);
3299
3300 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3301 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3302
3303 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3304 nir_deref_type deref_type);
3305
3306 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3307
3308 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3309 unsigned num_components,
3310 unsigned bit_size);
3311
3312 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3313 nir_intrinsic_op op);
3314
3315 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3316 nir_function *callee);
3317
3318 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3319
3320 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3321
3322 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3323
3324 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3325 unsigned num_components,
3326 unsigned bit_size);
3327
3328 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3329
3330 /**
3331 * NIR Cursors and Instruction Insertion API
3332 * @{
3333 *
3334 * A tiny struct representing a point to insert/extract instructions or
3335 * control flow nodes. Helps reduce the combinatorial explosion of possible
3336 * points to insert/extract.
3337 *
3338 * \sa nir_control_flow.h
3339 */
3340 typedef enum {
3341 nir_cursor_before_block,
3342 nir_cursor_after_block,
3343 nir_cursor_before_instr,
3344 nir_cursor_after_instr,
3345 } nir_cursor_option;
3346
3347 typedef struct {
3348 nir_cursor_option option;
3349 union {
3350 nir_block *block;
3351 nir_instr *instr;
3352 };
3353 } nir_cursor;
3354
3355 static inline nir_block *
3356 nir_cursor_current_block(nir_cursor cursor)
3357 {
3358 if (cursor.option == nir_cursor_before_instr ||
3359 cursor.option == nir_cursor_after_instr) {
3360 return cursor.instr->block;
3361 } else {
3362 return cursor.block;
3363 }
3364 }
3365
3366 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3367
3368 static inline nir_cursor
3369 nir_before_block(nir_block *block)
3370 {
3371 nir_cursor cursor;
3372 cursor.option = nir_cursor_before_block;
3373 cursor.block = block;
3374 return cursor;
3375 }
3376
3377 static inline nir_cursor
3378 nir_after_block(nir_block *block)
3379 {
3380 nir_cursor cursor;
3381 cursor.option = nir_cursor_after_block;
3382 cursor.block = block;
3383 return cursor;
3384 }
3385
3386 static inline nir_cursor
3387 nir_before_instr(nir_instr *instr)
3388 {
3389 nir_cursor cursor;
3390 cursor.option = nir_cursor_before_instr;
3391 cursor.instr = instr;
3392 return cursor;
3393 }
3394
3395 static inline nir_cursor
3396 nir_after_instr(nir_instr *instr)
3397 {
3398 nir_cursor cursor;
3399 cursor.option = nir_cursor_after_instr;
3400 cursor.instr = instr;
3401 return cursor;
3402 }
3403
3404 static inline nir_cursor
3405 nir_after_block_before_jump(nir_block *block)
3406 {
3407 nir_instr *last_instr = nir_block_last_instr(block);
3408 if (last_instr && last_instr->type == nir_instr_type_jump) {
3409 return nir_before_instr(last_instr);
3410 } else {
3411 return nir_after_block(block);
3412 }
3413 }
3414
3415 static inline nir_cursor
3416 nir_before_src(nir_src *src, bool is_if_condition)
3417 {
3418 if (is_if_condition) {
3419 nir_block *prev_block =
3420 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3421 assert(!nir_block_ends_in_jump(prev_block));
3422 return nir_after_block(prev_block);
3423 } else if (src->parent_instr->type == nir_instr_type_phi) {
3424 #ifndef NDEBUG
3425 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3426 bool found = false;
3427 nir_foreach_phi_src(phi_src, cond_phi) {
3428 if (phi_src->src.ssa == src->ssa) {
3429 found = true;
3430 break;
3431 }
3432 }
3433 assert(found);
3434 #endif
3435 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3436 * to have a more specific name.
3437 */
3438 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3439 return nir_after_block_before_jump(phi_src->pred);
3440 } else {
3441 return nir_before_instr(src->parent_instr);
3442 }
3443 }
3444
3445 static inline nir_cursor
3446 nir_before_cf_node(nir_cf_node *node)
3447 {
3448 if (node->type == nir_cf_node_block)
3449 return nir_before_block(nir_cf_node_as_block(node));
3450
3451 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3452 }
3453
3454 static inline nir_cursor
3455 nir_after_cf_node(nir_cf_node *node)
3456 {
3457 if (node->type == nir_cf_node_block)
3458 return nir_after_block(nir_cf_node_as_block(node));
3459
3460 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3461 }
3462
3463 static inline nir_cursor
3464 nir_after_phis(nir_block *block)
3465 {
3466 nir_foreach_instr(instr, block) {
3467 if (instr->type != nir_instr_type_phi)
3468 return nir_before_instr(instr);
3469 }
3470 return nir_after_block(block);
3471 }
3472
3473 static inline nir_cursor
3474 nir_after_cf_node_and_phis(nir_cf_node *node)
3475 {
3476 if (node->type == nir_cf_node_block)
3477 return nir_after_block(nir_cf_node_as_block(node));
3478
3479 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3480
3481 return nir_after_phis(block);
3482 }
3483
3484 static inline nir_cursor
3485 nir_before_cf_list(struct exec_list *cf_list)
3486 {
3487 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3488 exec_list_get_head(cf_list), node);
3489 return nir_before_cf_node(first_node);
3490 }
3491
3492 static inline nir_cursor
3493 nir_after_cf_list(struct exec_list *cf_list)
3494 {
3495 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3496 exec_list_get_tail(cf_list), node);
3497 return nir_after_cf_node(last_node);
3498 }
3499
3500 /**
3501 * Insert a NIR instruction at the given cursor.
3502 *
3503 * Note: This does not update the cursor.
3504 */
3505 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3506
3507 static inline void
3508 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3509 {
3510 nir_instr_insert(nir_before_instr(instr), before);
3511 }
3512
3513 static inline void
3514 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3515 {
3516 nir_instr_insert(nir_after_instr(instr), after);
3517 }
3518
3519 static inline void
3520 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3521 {
3522 nir_instr_insert(nir_before_block(block), before);
3523 }
3524
3525 static inline void
3526 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3527 {
3528 nir_instr_insert(nir_after_block(block), after);
3529 }
3530
3531 static inline void
3532 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3533 {
3534 nir_instr_insert(nir_before_cf_node(node), before);
3535 }
3536
3537 static inline void
3538 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3539 {
3540 nir_instr_insert(nir_after_cf_node(node), after);
3541 }
3542
3543 static inline void
3544 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3545 {
3546 nir_instr_insert(nir_before_cf_list(list), before);
3547 }
3548
3549 static inline void
3550 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3551 {
3552 nir_instr_insert(nir_after_cf_list(list), after);
3553 }
3554
3555 void nir_instr_remove_v(nir_instr *instr);
3556
3557 static inline nir_cursor
3558 nir_instr_remove(nir_instr *instr)
3559 {
3560 nir_cursor cursor;
3561 nir_instr *prev = nir_instr_prev(instr);
3562 if (prev) {
3563 cursor = nir_after_instr(prev);
3564 } else {
3565 cursor = nir_before_block(instr->block);
3566 }
3567 nir_instr_remove_v(instr);
3568 return cursor;
3569 }
3570
3571 /** @} */
3572
3573 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3574
3575 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3576 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3577 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3578 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3579 void *state);
3580 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3581 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3582 bool nir_foreach_phi_src_leaving_block(nir_block *instr,
3583 nir_foreach_src_cb cb,
3584 void *state);
3585
3586 nir_const_value *nir_src_as_const_value(nir_src src);
3587
3588 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3589 static inline c_type * \
3590 nir_src_as_ ## name (nir_src src) \
3591 { \
3592 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3593 ? cast_macro(src.ssa->parent_instr) : NULL; \
3594 }
3595
3596 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3597 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3598 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3599 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3600
3601 bool nir_src_is_dynamically_uniform(nir_src src);
3602 bool nir_srcs_equal(nir_src src1, nir_src src2);
3603 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3604 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3605 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3606 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3607 void