nir: Add a nir_foreach_uniform_variable helper
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #define XXH_INLINE_ALL
45 #include "util/xxhash.h"
46 #include <stdio.h>
47
48 #ifndef NDEBUG
49 #include "util/debug.h"
50 #endif /* NDEBUG */
51
52 #include "nir_opcodes.h"
53
54 #if defined(_WIN32) && !defined(snprintf)
55 #define snprintf _snprintf
56 #endif
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #define NIR_FALSE 0u
63 #define NIR_TRUE (~0u)
64 #define NIR_MAX_VEC_COMPONENTS 16
65 #define NIR_MAX_MATRIX_COLUMNS 4
66 #define NIR_STREAM_PACKED (1 << 8)
67 typedef uint16_t nir_component_mask_t;
68
69 static inline bool
70 nir_num_components_valid(unsigned num_components)
71 {
72 return (num_components >= 1 &&
73 num_components <= 4) ||
74 num_components == 8 ||
75 num_components == 16;
76 }
77
78 /** Defines a cast function
79 *
80 * This macro defines a cast function from in_type to out_type where
81 * out_type is some structure type that contains a field of type out_type.
82 *
83 * Note that you have to be a bit careful as the generated cast function
84 * destroys constness.
85 */
86 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
87 type_field, type_value) \
88 static inline out_type * \
89 name(const in_type *parent) \
90 { \
91 assert(parent && parent->type_field == type_value); \
92 return exec_node_data(out_type, parent, field); \
93 }
94
95 struct nir_function;
96 struct nir_shader;
97 struct nir_instr;
98 struct nir_builder;
99
100
101 /**
102 * Description of built-in state associated with a uniform
103 *
104 * \sa nir_variable::state_slots
105 */
106 typedef struct {
107 gl_state_index16 tokens[STATE_LENGTH];
108 uint16_t swizzle;
109 } nir_state_slot;
110
111 typedef enum {
112 nir_var_shader_in = (1 << 0),
113 nir_var_shader_out = (1 << 1),
114 nir_var_shader_temp = (1 << 2),
115 nir_var_function_temp = (1 << 3),
116 nir_var_uniform = (1 << 4),
117 nir_var_mem_ubo = (1 << 5),
118 nir_var_system_value = (1 << 6),
119 nir_var_mem_ssbo = (1 << 7),
120 nir_var_mem_shared = (1 << 8),
121 nir_var_mem_global = (1 << 9),
122 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
123 nir_num_variable_modes = 11,
124 nir_var_all = (1 << nir_num_variable_modes) - 1,
125 } nir_variable_mode;
126
127 /**
128 * Rounding modes.
129 */
130 typedef enum {
131 nir_rounding_mode_undef = 0,
132 nir_rounding_mode_rtne = 1, /* round to nearest even */
133 nir_rounding_mode_ru = 2, /* round up */
134 nir_rounding_mode_rd = 3, /* round down */
135 nir_rounding_mode_rtz = 4, /* round towards zero */
136 } nir_rounding_mode;
137
138 typedef union {
139 bool b;
140 float f32;
141 double f64;
142 int8_t i8;
143 uint8_t u8;
144 int16_t i16;
145 uint16_t u16;
146 int32_t i32;
147 uint32_t u32;
148 int64_t i64;
149 uint64_t u64;
150 } nir_const_value;
151
152 #define nir_const_value_to_array(arr, c, components, m) \
153 { \
154 for (unsigned i = 0; i < components; ++i) \
155 arr[i] = c[i].m; \
156 } while (false)
157
158 static inline nir_const_value
159 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
160 {
161 nir_const_value v;
162 memset(&v, 0, sizeof(v));
163
164 switch (bit_size) {
165 case 1: v.b = x; break;
166 case 8: v.u8 = x; break;
167 case 16: v.u16 = x; break;
168 case 32: v.u32 = x; break;
169 case 64: v.u64 = x; break;
170 default:
171 unreachable("Invalid bit size");
172 }
173
174 return v;
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_int(int64_t i, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64) {
185 assert(i >= (-(1ll << (bit_size - 1))));
186 assert(i < (1ll << (bit_size - 1)));
187 }
188
189 return nir_const_value_for_raw_uint(i, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
194 {
195 nir_const_value v;
196 memset(&v, 0, sizeof(v));
197
198 assert(bit_size <= 64);
199 if (bit_size < 64)
200 assert(u < (1ull << bit_size));
201
202 return nir_const_value_for_raw_uint(u, bit_size);
203 }
204
205 static inline nir_const_value
206 nir_const_value_for_bool(bool b, unsigned bit_size)
207 {
208 /* Booleans use a 0/-1 convention */
209 return nir_const_value_for_int(-(int)b, bit_size);
210 }
211
212 /* This one isn't inline because it requires half-float conversion */
213 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
214
215 static inline int64_t
216 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 /* int1_t uses 0/-1 convention */
220 case 1: return -(int)value.b;
221 case 8: return value.i8;
222 case 16: return value.i16;
223 case 32: return value.i32;
224 case 64: return value.i64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline uint64_t
231 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
232 {
233 switch (bit_size) {
234 case 1: return value.b;
235 case 8: return value.u8;
236 case 16: return value.u16;
237 case 32: return value.u32;
238 case 64: return value.u64;
239 default:
240 unreachable("Invalid bit size");
241 }
242 }
243
244 static inline bool
245 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
246 {
247 int64_t i = nir_const_value_as_int(value, bit_size);
248
249 /* Booleans of any size use 0/-1 convention */
250 assert(i == 0 || i == -1);
251
252 return i;
253 }
254
255 /* This one isn't inline because it requires half-float conversion */
256 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
257
258 typedef struct nir_constant {
259 /**
260 * Value of the constant.
261 *
262 * The field used to back the values supplied by the constant is determined
263 * by the type associated with the \c nir_variable. Constants may be
264 * scalars, vectors, or matrices.
265 */
266 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
267
268 /* we could get this from the var->type but makes clone *much* easier to
269 * not have to care about the type.
270 */
271 unsigned num_elements;
272
273 /* Array elements / Structure Fields */
274 struct nir_constant **elements;
275 } nir_constant;
276
277 /**
278 * \brief Layout qualifiers for gl_FragDepth.
279 *
280 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
281 * with a layout qualifier.
282 */
283 typedef enum {
284 nir_depth_layout_none, /**< No depth layout is specified. */
285 nir_depth_layout_any,
286 nir_depth_layout_greater,
287 nir_depth_layout_less,
288 nir_depth_layout_unchanged
289 } nir_depth_layout;
290
291 /**
292 * Enum keeping track of how a variable was declared.
293 */
294 typedef enum {
295 /**
296 * Normal declaration.
297 */
298 nir_var_declared_normally = 0,
299
300 /**
301 * Variable is implicitly generated by the compiler and should not be
302 * visible via the API.
303 */
304 nir_var_hidden,
305 } nir_var_declaration_type;
306
307 /**
308 * Either a uniform, global variable, shader input, or shader output. Based on
309 * ir_variable - it should be easy to translate between the two.
310 */
311
312 typedef struct nir_variable {
313 struct exec_node node;
314
315 /**
316 * Declared type of the variable
317 */
318 const struct glsl_type *type;
319
320 /**
321 * Declared name of the variable
322 */
323 char *name;
324
325 struct nir_variable_data {
326 /**
327 * Storage class of the variable.
328 *
329 * \sa nir_variable_mode
330 */
331 nir_variable_mode mode:11;
332
333 /**
334 * Is the variable read-only?
335 *
336 * This is set for variables declared as \c const, shader inputs,
337 * and uniforms.
338 */
339 unsigned read_only:1;
340 unsigned centroid:1;
341 unsigned sample:1;
342 unsigned patch:1;
343 unsigned invariant:1;
344
345 /**
346 * Precision qualifier.
347 *
348 * In desktop GLSL we do not care about precision qualifiers at all, in
349 * fact, the spec says that precision qualifiers are ignored.
350 *
351 * To make things easy, we make it so that this field is always
352 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
353 * have the same precision value and the checks we add in the compiler
354 * for this field will never break a desktop shader compile.
355 */
356 unsigned precision:2;
357
358 /**
359 * Can this variable be coalesced with another?
360 *
361 * This is set by nir_lower_io_to_temporaries to say that any
362 * copies involving this variable should stay put. Propagating it can
363 * duplicate the resulting load/store, which is not wanted, and may
364 * result in a load/store of the variable with an indirect offset which
365 * the backend may not be able to handle.
366 */
367 unsigned cannot_coalesce:1;
368
369 /**
370 * When separate shader programs are enabled, only input/outputs between
371 * the stages of a multi-stage separate program can be safely removed
372 * from the shader interface. Other input/outputs must remains active.
373 *
374 * This is also used to make sure xfb varyings that are unused by the
375 * fragment shader are not removed.
376 */
377 unsigned always_active_io:1;
378
379 /**
380 * Interpolation mode for shader inputs / outputs
381 *
382 * \sa glsl_interp_mode
383 */
384 unsigned interpolation:3;
385
386 /**
387 * If non-zero, then this variable may be packed along with other variables
388 * into a single varying slot, so this offset should be applied when
389 * accessing components. For example, an offset of 1 means that the x
390 * component of this variable is actually stored in component y of the
391 * location specified by \c location.
392 */
393 unsigned location_frac:2;
394
395 /**
396 * If true, this variable represents an array of scalars that should
397 * be tightly packed. In other words, consecutive array elements
398 * should be stored one component apart, rather than one slot apart.
399 */
400 unsigned compact:1;
401
402 /**
403 * Whether this is a fragment shader output implicitly initialized with
404 * the previous contents of the specified render target at the
405 * framebuffer location corresponding to this shader invocation.
406 */
407 unsigned fb_fetch_output:1;
408
409 /**
410 * Non-zero if this variable is considered bindless as defined by
411 * ARB_bindless_texture.
412 */
413 unsigned bindless:1;
414
415 /**
416 * Was an explicit binding set in the shader?
417 */
418 unsigned explicit_binding:1;
419
420 /**
421 * Was the location explicitly set in the shader?
422 *
423 * If the location is explicitly set in the shader, it \b cannot be changed
424 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 * no effect).
426 */
427 unsigned explicit_location:1;
428
429 /**
430 * Was a transfer feedback buffer set in the shader?
431 */
432 unsigned explicit_xfb_buffer:1;
433
434 /**
435 * Was a transfer feedback stride set in the shader?
436 */
437 unsigned explicit_xfb_stride:1;
438
439 /**
440 * Was an explicit offset set in the shader?
441 */
442 unsigned explicit_offset:1;
443
444 /**
445 * Layout of the matrix. Uses glsl_matrix_layout values.
446 */
447 unsigned matrix_layout:2;
448
449 /**
450 * Non-zero if this variable was created by lowering a named interface
451 * block.
452 */
453 unsigned from_named_ifc_block:1;
454
455 /**
456 * How the variable was declared. See nir_var_declaration_type.
457 *
458 * This is used to detect variables generated by the compiler, so should
459 * not be visible via the API.
460 */
461 unsigned how_declared:2;
462
463 /**
464 * Is this variable per-view? If so, we know it must be an array with
465 * size corresponding to the number of views.
466 */
467 unsigned per_view:1;
468
469 /**
470 * \brief Layout qualifier for gl_FragDepth.
471 *
472 * This is not equal to \c ir_depth_layout_none if and only if this
473 * variable is \c gl_FragDepth and a layout qualifier is specified.
474 */
475 nir_depth_layout depth_layout:3;
476
477 /**
478 * Vertex stream output identifier.
479 *
480 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
481 * indicate the stream of the i-th component.
482 */
483 unsigned stream:9;
484
485 /**
486 * Access flags for memory variables (SSBO/global), image uniforms, and
487 * bindless images in uniforms/inputs/outputs.
488 */
489 enum gl_access_qualifier access:8;
490
491 /**
492 * Descriptor set binding for sampler or UBO.
493 */
494 unsigned descriptor_set:5;
495
496 /**
497 * output index for dual source blending.
498 */
499 unsigned index;
500
501 /**
502 * Initial binding point for a sampler or UBO.
503 *
504 * For array types, this represents the binding point for the first element.
505 */
506 unsigned binding;
507
508 /**
509 * Storage location of the base of this variable
510 *
511 * The precise meaning of this field depends on the nature of the variable.
512 *
513 * - Vertex shader input: one of the values from \c gl_vert_attrib.
514 * - Vertex shader output: one of the values from \c gl_varying_slot.
515 * - Geometry shader input: one of the values from \c gl_varying_slot.
516 * - Geometry shader output: one of the values from \c gl_varying_slot.
517 * - Fragment shader input: one of the values from \c gl_varying_slot.
518 * - Fragment shader output: one of the values from \c gl_frag_result.
519 * - Uniforms: Per-stage uniform slot number for default uniform block.
520 * - Uniforms: Index within the uniform block definition for UBO members.
521 * - Non-UBO Uniforms: uniform slot number.
522 * - Other: This field is not currently used.
523 *
524 * If the variable is a uniform, shader input, or shader output, and the
525 * slot has not been assigned, the value will be -1.
526 */
527 int location;
528
529 /**
530 * The actual location of the variable in the IR. Only valid for inputs,
531 * outputs, and uniforms (including samplers and images).
532 */
533 unsigned driver_location;
534
535 /**
536 * Location an atomic counter or transform feedback is stored at.
537 */
538 unsigned offset;
539
540 union {
541 struct {
542 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
543 enum pipe_format format;
544 } image;
545
546 struct {
547 /**
548 * Transform feedback buffer.
549 */
550 uint16_t buffer:2;
551
552 /**
553 * Transform feedback stride.
554 */
555 uint16_t stride;
556 } xfb;
557 };
558 } data;
559
560 /**
561 * Identifier for this variable generated by nir_index_vars() that is unique
562 * among other variables in the same exec_list.
563 */
564 unsigned index;
565
566 /* Number of nir_variable_data members */
567 uint16_t num_members;
568
569 /**
570 * Built-in state that backs this uniform
571 *
572 * Once set at variable creation, \c state_slots must remain invariant.
573 * This is because, ideally, this array would be shared by all clones of
574 * this variable in the IR tree. In other words, we'd really like for it
575 * to be a fly-weight.
576 *
577 * If the variable is not a uniform, \c num_state_slots will be zero and
578 * \c state_slots will be \c NULL.
579 */
580 /*@{*/
581 uint16_t num_state_slots; /**< Number of state slots used */
582 nir_state_slot *state_slots; /**< State descriptors. */
583 /*@}*/
584
585 /**
586 * Constant expression assigned in the initializer of the variable
587 *
588 * This field should only be used temporarily by creators of NIR shaders
589 * and then lower_constant_initializers can be used to get rid of them.
590 * Most of the rest of NIR ignores this field or asserts that it's NULL.
591 */
592 nir_constant *constant_initializer;
593
594 /**
595 * Global variable assigned in the initializer of the variable
596 * This field should only be used temporarily by creators of NIR shaders
597 * and then lower_constant_initializers can be used to get rid of them.
598 * Most of the rest of NIR ignores this field or asserts that it's NULL.
599 */
600 struct nir_variable *pointer_initializer;
601
602 /**
603 * For variables that are in an interface block or are an instance of an
604 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
605 *
606 * \sa ir_variable::location
607 */
608 const struct glsl_type *interface_type;
609
610 /**
611 * Description of per-member data for per-member struct variables
612 *
613 * This is used for variables which are actually an amalgamation of
614 * multiple entities such as a struct of built-in values or a struct of
615 * inputs each with their own layout specifier. This is only allowed on
616 * variables with a struct or array of array of struct type.
617 */
618 struct nir_variable_data *members;
619 } nir_variable;
620
621 #define nir_foreach_variable(var, var_list) \
622 foreach_list_typed(nir_variable, var, node, var_list)
623
624 #define nir_foreach_variable_safe(var, var_list) \
625 foreach_list_typed_safe(nir_variable, var, node, var_list)
626
627 #define nir_foreach_shader_in_variable(var, shader) \
628 nir_foreach_variable(var, &(shader)->inputs)
629
630 #define nir_foreach_shader_in_variable_safe(var, shader) \
631 nir_foreach_variable_safe(var, &(shader)->inputs)
632
633 #define nir_foreach_shader_out_variable(var, shader) \
634 nir_foreach_variable(var, &(shader)->outputs)
635
636 #define nir_foreach_shader_out_variable_safe(var, shader) \
637 nir_foreach_variable_safe(var, &(shader)->outputs)
638
639 #define nir_foreach_uniform_variable(var, shader) \
640 nir_foreach_variable(var, &(shader)->uniforms) \
641 if (var->data.mode == nir_var_uniform)
642
643 #define nir_foreach_uniform_variable_safe(var, shader) \
644 nir_foreach_variable_safe(var, &(shader)->uniforms) \
645 if (var->data.mode == nir_var_uniform)
646
647 static inline bool
648 nir_variable_is_global(const nir_variable *var)
649 {
650 return var->data.mode != nir_var_function_temp;
651 }
652
653 typedef struct nir_register {
654 struct exec_node node;
655
656 unsigned num_components; /** < number of vector components */
657 unsigned num_array_elems; /** < size of array (0 for no array) */
658
659 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
660 uint8_t bit_size;
661
662 /** generic register index. */
663 unsigned index;
664
665 /** only for debug purposes, can be NULL */
666 const char *name;
667
668 /** set of nir_srcs where this register is used (read from) */
669 struct list_head uses;
670
671 /** set of nir_dests where this register is defined (written to) */
672 struct list_head defs;
673
674 /** set of nir_ifs where this register is used as a condition */
675 struct list_head if_uses;
676 } nir_register;
677
678 #define nir_foreach_register(reg, reg_list) \
679 foreach_list_typed(nir_register, reg, node, reg_list)
680 #define nir_foreach_register_safe(reg, reg_list) \
681 foreach_list_typed_safe(nir_register, reg, node, reg_list)
682
683 typedef enum PACKED {
684 nir_instr_type_alu,
685 nir_instr_type_deref,
686 nir_instr_type_call,
687 nir_instr_type_tex,
688 nir_instr_type_intrinsic,
689 nir_instr_type_load_const,
690 nir_instr_type_jump,
691 nir_instr_type_ssa_undef,
692 nir_instr_type_phi,
693 nir_instr_type_parallel_copy,
694 } nir_instr_type;
695
696 typedef struct nir_instr {
697 struct exec_node node;
698 struct nir_block *block;
699 nir_instr_type type;
700
701 /* A temporary for optimization and analysis passes to use for storing
702 * flags. For instance, DCE uses this to store the "dead/live" info.
703 */
704 uint8_t pass_flags;
705
706 /** generic instruction index. */
707 unsigned index;
708 } nir_instr;
709
710 static inline nir_instr *
711 nir_instr_next(nir_instr *instr)
712 {
713 struct exec_node *next = exec_node_get_next(&instr->node);
714 if (exec_node_is_tail_sentinel(next))
715 return NULL;
716 else
717 return exec_node_data(nir_instr, next, node);
718 }
719
720 static inline nir_instr *
721 nir_instr_prev(nir_instr *instr)
722 {
723 struct exec_node *prev = exec_node_get_prev(&instr->node);
724 if (exec_node_is_head_sentinel(prev))
725 return NULL;
726 else
727 return exec_node_data(nir_instr, prev, node);
728 }
729
730 static inline bool
731 nir_instr_is_first(const nir_instr *instr)
732 {
733 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
734 }
735
736 static inline bool
737 nir_instr_is_last(const nir_instr *instr)
738 {
739 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
740 }
741
742 typedef struct nir_ssa_def {
743 /** for debugging only, can be NULL */
744 const char* name;
745
746 /** generic SSA definition index. */
747 unsigned index;
748
749 /** Index into the live_in and live_out bitfields */
750 unsigned live_index;
751
752 /** Instruction which produces this SSA value. */
753 nir_instr *parent_instr;
754
755 /** set of nir_instrs where this register is used (read from) */
756 struct list_head uses;
757
758 /** set of nir_ifs where this register is used as a condition */
759 struct list_head if_uses;
760
761 uint8_t num_components;
762
763 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
764 uint8_t bit_size;
765
766 /**
767 * True if this SSA value may have different values in different SIMD
768 * invocations of the shader. This is set by nir_divergence_analysis.
769 */
770 bool divergent;
771 } nir_ssa_def;
772
773 struct nir_src;
774
775 typedef struct {
776 nir_register *reg;
777 struct nir_src *indirect; /** < NULL for no indirect offset */
778 unsigned base_offset;
779
780 /* TODO use-def chain goes here */
781 } nir_reg_src;
782
783 typedef struct {
784 nir_instr *parent_instr;
785 struct list_head def_link;
786
787 nir_register *reg;
788 struct nir_src *indirect; /** < NULL for no indirect offset */
789 unsigned base_offset;
790
791 /* TODO def-use chain goes here */
792 } nir_reg_dest;
793
794 struct nir_if;
795
796 typedef struct nir_src {
797 union {
798 /** Instruction that consumes this value as a source. */
799 nir_instr *parent_instr;
800 struct nir_if *parent_if;
801 };
802
803 struct list_head use_link;
804
805 union {
806 nir_reg_src reg;
807 nir_ssa_def *ssa;
808 };
809
810 bool is_ssa;
811 } nir_src;
812
813 static inline nir_src
814 nir_src_init(void)
815 {
816 nir_src src = { { NULL } };
817 return src;
818 }
819
820 #define NIR_SRC_INIT nir_src_init()
821
822 #define nir_foreach_use(src, reg_or_ssa_def) \
823 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
824
825 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
826 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
827
828 #define nir_foreach_if_use(src, reg_or_ssa_def) \
829 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
830
831 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
832 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
833
834 typedef struct {
835 union {
836 nir_reg_dest reg;
837 nir_ssa_def ssa;
838 };
839
840 bool is_ssa;
841 } nir_dest;
842
843 static inline nir_dest
844 nir_dest_init(void)
845 {
846 nir_dest dest = { { { NULL } } };
847 return dest;
848 }
849
850 #define NIR_DEST_INIT nir_dest_init()
851
852 #define nir_foreach_def(dest, reg) \
853 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
854
855 #define nir_foreach_def_safe(dest, reg) \
856 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
857
858 static inline nir_src
859 nir_src_for_ssa(nir_ssa_def *def)
860 {
861 nir_src src = NIR_SRC_INIT;
862
863 src.is_ssa = true;
864 src.ssa = def;
865
866 return src;
867 }
868
869 static inline nir_src
870 nir_src_for_reg(nir_register *reg)
871 {
872 nir_src src = NIR_SRC_INIT;
873
874 src.is_ssa = false;
875 src.reg.reg = reg;
876 src.reg.indirect = NULL;
877 src.reg.base_offset = 0;
878
879 return src;
880 }
881
882 static inline nir_dest
883 nir_dest_for_reg(nir_register *reg)
884 {
885 nir_dest dest = NIR_DEST_INIT;
886
887 dest.reg.reg = reg;
888
889 return dest;
890 }
891
892 static inline unsigned
893 nir_src_bit_size(nir_src src)
894 {
895 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
896 }
897
898 static inline unsigned
899 nir_src_num_components(nir_src src)
900 {
901 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
902 }
903
904 static inline bool
905 nir_src_is_const(nir_src src)
906 {
907 return src.is_ssa &&
908 src.ssa->parent_instr->type == nir_instr_type_load_const;
909 }
910
911 static inline bool
912 nir_src_is_divergent(nir_src src)
913 {
914 assert(src.is_ssa);
915 return src.ssa->divergent;
916 }
917
918 static inline unsigned
919 nir_dest_bit_size(nir_dest dest)
920 {
921 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
922 }
923
924 static inline unsigned
925 nir_dest_num_components(nir_dest dest)
926 {
927 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
928 }
929
930 static inline bool
931 nir_dest_is_divergent(nir_dest dest)
932 {
933 assert(dest.is_ssa);
934 return dest.ssa.divergent;
935 }
936
937 /* Are all components the same, ie. .xxxx */
938 static inline bool
939 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
940 {
941 for (unsigned i = 1; i < nr_comp; i++)
942 if (swiz[i] != swiz[0])
943 return false;
944 return true;
945 }
946
947 /* Are all components sequential, ie. .yzw */
948 static inline bool
949 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
950 {
951 for (unsigned i = 1; i < nr_comp; i++)
952 if (swiz[i] != (swiz[0] + i))
953 return false;
954 return true;
955 }
956
957 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
958 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
959
960 typedef struct {
961 nir_src src;
962
963 /**
964 * \name input modifiers
965 */
966 /*@{*/
967 /**
968 * For inputs interpreted as floating point, flips the sign bit. For
969 * inputs interpreted as integers, performs the two's complement negation.
970 */
971 bool negate;
972
973 /**
974 * Clears the sign bit for floating point values, and computes the integer
975 * absolute value for integers. Note that the negate modifier acts after
976 * the absolute value modifier, therefore if both are set then all inputs
977 * will become negative.
978 */
979 bool abs;
980 /*@}*/
981
982 /**
983 * For each input component, says which component of the register it is
984 * chosen from. Note that which elements of the swizzle are used and which
985 * are ignored are based on the write mask for most opcodes - for example,
986 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
987 * a swizzle of {2, x, 1, 0} where x means "don't care."
988 */
989 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
990 } nir_alu_src;
991
992 typedef struct {
993 nir_dest dest;
994
995 /**
996 * \name saturate output modifier
997 *
998 * Only valid for opcodes that output floating-point numbers. Clamps the
999 * output to between 0.0 and 1.0 inclusive.
1000 */
1001
1002 bool saturate;
1003
1004 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
1005 } nir_alu_dest;
1006
1007 /** NIR sized and unsized types
1008 *
1009 * The values in this enum are carefully chosen so that the sized type is
1010 * just the unsized type OR the number of bits.
1011 */
1012 typedef enum PACKED {
1013 nir_type_invalid = 0, /* Not a valid type */
1014 nir_type_int = 2,
1015 nir_type_uint = 4,
1016 nir_type_bool = 6,
1017 nir_type_float = 128,
1018 nir_type_bool1 = 1 | nir_type_bool,
1019 nir_type_bool8 = 8 | nir_type_bool,
1020 nir_type_bool16 = 16 | nir_type_bool,
1021 nir_type_bool32 = 32 | nir_type_bool,
1022 nir_type_int1 = 1 | nir_type_int,
1023 nir_type_int8 = 8 | nir_type_int,
1024 nir_type_int16 = 16 | nir_type_int,
1025 nir_type_int32 = 32 | nir_type_int,
1026 nir_type_int64 = 64 | nir_type_int,
1027 nir_type_uint1 = 1 | nir_type_uint,
1028 nir_type_uint8 = 8 | nir_type_uint,
1029 nir_type_uint16 = 16 | nir_type_uint,
1030 nir_type_uint32 = 32 | nir_type_uint,
1031 nir_type_uint64 = 64 | nir_type_uint,
1032 nir_type_float16 = 16 | nir_type_float,
1033 nir_type_float32 = 32 | nir_type_float,
1034 nir_type_float64 = 64 | nir_type_float,
1035 } nir_alu_type;
1036
1037 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1038 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1039
1040 static inline unsigned
1041 nir_alu_type_get_type_size(nir_alu_type type)
1042 {
1043 return type & NIR_ALU_TYPE_SIZE_MASK;
1044 }
1045
1046 static inline nir_alu_type
1047 nir_alu_type_get_base_type(nir_alu_type type)
1048 {
1049 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1050 }
1051
1052 static inline nir_alu_type
1053 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1054 {
1055 switch (base_type) {
1056 case GLSL_TYPE_BOOL:
1057 return nir_type_bool1;
1058 break;
1059 case GLSL_TYPE_UINT:
1060 return nir_type_uint32;
1061 break;
1062 case GLSL_TYPE_INT:
1063 return nir_type_int32;
1064 break;
1065 case GLSL_TYPE_UINT16:
1066 return nir_type_uint16;
1067 break;
1068 case GLSL_TYPE_INT16:
1069 return nir_type_int16;
1070 break;
1071 case GLSL_TYPE_UINT8:
1072 return nir_type_uint8;
1073 case GLSL_TYPE_INT8:
1074 return nir_type_int8;
1075 case GLSL_TYPE_UINT64:
1076 return nir_type_uint64;
1077 break;
1078 case GLSL_TYPE_INT64:
1079 return nir_type_int64;
1080 break;
1081 case GLSL_TYPE_FLOAT:
1082 return nir_type_float32;
1083 break;
1084 case GLSL_TYPE_FLOAT16:
1085 return nir_type_float16;
1086 break;
1087 case GLSL_TYPE_DOUBLE:
1088 return nir_type_float64;
1089 break;
1090
1091 case GLSL_TYPE_SAMPLER:
1092 case GLSL_TYPE_IMAGE:
1093 case GLSL_TYPE_ATOMIC_UINT:
1094 case GLSL_TYPE_STRUCT:
1095 case GLSL_TYPE_INTERFACE:
1096 case GLSL_TYPE_ARRAY:
1097 case GLSL_TYPE_VOID:
1098 case GLSL_TYPE_SUBROUTINE:
1099 case GLSL_TYPE_FUNCTION:
1100 case GLSL_TYPE_ERROR:
1101 return nir_type_invalid;
1102 }
1103
1104 unreachable("unknown type");
1105 }
1106
1107 static inline nir_alu_type
1108 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1109 {
1110 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1111 }
1112
1113 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1114 nir_rounding_mode rnd);
1115
1116 static inline nir_op
1117 nir_op_vec(unsigned components)
1118 {
1119 switch (components) {
1120 case 1: return nir_op_mov;
1121 case 2: return nir_op_vec2;
1122 case 3: return nir_op_vec3;
1123 case 4: return nir_op_vec4;
1124 case 8: return nir_op_vec8;
1125 case 16: return nir_op_vec16;
1126 default: unreachable("bad component count");
1127 }
1128 }
1129
1130 static inline bool
1131 nir_op_is_vec(nir_op op)
1132 {
1133 switch (op) {
1134 case nir_op_mov:
1135 case nir_op_vec2:
1136 case nir_op_vec3:
1137 case nir_op_vec4:
1138 case nir_op_vec8:
1139 case nir_op_vec16:
1140 return true;
1141 default:
1142 return false;
1143 }
1144 }
1145
1146 static inline bool
1147 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1148 {
1149 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1150 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1151 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1152 }
1153
1154 static inline bool
1155 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1156 {
1157 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1158 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1159 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1160 }
1161
1162 static inline bool
1163 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1164 {
1165 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1166 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1167 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1168 }
1169
1170 static inline bool
1171 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1172 {
1173 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1174 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1175 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1176 }
1177
1178 static inline bool
1179 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1180 {
1181 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1182 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1183 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1184 }
1185
1186 static inline bool
1187 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1188 {
1189 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1190 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1191 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1192 }
1193
1194 static inline bool
1195 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1196 {
1197 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1198 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1199 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1200 }
1201
1202 static inline nir_rounding_mode
1203 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1204 nir_alu_type type)
1205 {
1206 if (nir_alu_type_get_base_type(type) != nir_type_float)
1207 return nir_rounding_mode_undef;
1208
1209 unsigned bit_size = nir_alu_type_get_type_size(type);
1210
1211 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1212 return nir_rounding_mode_rtz;
1213 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1214 return nir_rounding_mode_rtne;
1215 return nir_rounding_mode_undef;
1216 }
1217
1218 static inline bool
1219 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1220 {
1221 bool result =
1222 nir_has_any_rounding_mode_rtne(execution_mode) ||
1223 nir_has_any_rounding_mode_rtz(execution_mode);
1224 return result;
1225 }
1226
1227 typedef enum {
1228 /**
1229 * Operation where the first two sources are commutative.
1230 *
1231 * For 2-source operations, this just mathematical commutativity. Some
1232 * 3-source operations, like ffma, are only commutative in the first two
1233 * sources.
1234 */
1235 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1236 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1237 } nir_op_algebraic_property;
1238
1239 typedef struct {
1240 const char *name;
1241
1242 uint8_t num_inputs;
1243
1244 /**
1245 * The number of components in the output
1246 *
1247 * If non-zero, this is the size of the output and input sizes are
1248 * explicitly given; swizzle and writemask are still in effect, but if
1249 * the output component is masked out, then the input component may
1250 * still be in use.
1251 *
1252 * If zero, the opcode acts in the standard, per-component manner; the
1253 * operation is performed on each component (except the ones that are
1254 * masked out) with the input being taken from the input swizzle for
1255 * that component.
1256 *
1257 * The size of some of the inputs may be given (i.e. non-zero) even
1258 * though output_size is zero; in that case, the inputs with a zero
1259 * size act per-component, while the inputs with non-zero size don't.
1260 */
1261 uint8_t output_size;
1262
1263 /**
1264 * The type of vector that the instruction outputs. Note that the
1265 * staurate modifier is only allowed on outputs with the float type.
1266 */
1267
1268 nir_alu_type output_type;
1269
1270 /**
1271 * The number of components in each input
1272 */
1273 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1274
1275 /**
1276 * The type of vector that each input takes. Note that negate and
1277 * absolute value are only allowed on inputs with int or float type and
1278 * behave differently on the two.
1279 */
1280 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1281
1282 nir_op_algebraic_property algebraic_properties;
1283
1284 /* Whether this represents a numeric conversion opcode */
1285 bool is_conversion;
1286 } nir_op_info;
1287
1288 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1289
1290 typedef struct nir_alu_instr {
1291 nir_instr instr;
1292 nir_op op;
1293
1294 /** Indicates that this ALU instruction generates an exact value
1295 *
1296 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1297 * really equivalent to either. This indicates that the value generated by
1298 * this operation is high-precision and any code transformations that touch
1299 * it must ensure that the resulting value is bit-for-bit identical to the
1300 * original.
1301 */
1302 bool exact:1;
1303
1304 /**
1305 * Indicates that this instruction do not cause wrapping to occur, in the
1306 * form of overflow or underflow.
1307 */
1308 bool no_signed_wrap:1;
1309 bool no_unsigned_wrap:1;
1310
1311 nir_alu_dest dest;
1312 nir_alu_src src[];
1313 } nir_alu_instr;
1314
1315 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1316 nir_alu_instr *instr);
1317 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1318 nir_alu_instr *instr);
1319
1320 /* is this source channel used? */
1321 static inline bool
1322 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1323 unsigned channel)
1324 {
1325 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1326 return channel < nir_op_infos[instr->op].input_sizes[src];
1327
1328 return (instr->dest.write_mask >> channel) & 1;
1329 }
1330
1331 static inline nir_component_mask_t
1332 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1333 {
1334 nir_component_mask_t read_mask = 0;
1335 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1336 if (!nir_alu_instr_channel_used(instr, src, c))
1337 continue;
1338
1339 read_mask |= (1 << instr->src[src].swizzle[c]);
1340 }
1341 return read_mask;
1342 }
1343
1344 /**
1345 * Get the number of channels used for a source
1346 */
1347 static inline unsigned
1348 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1349 {
1350 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1351 return nir_op_infos[instr->op].input_sizes[src];
1352
1353 return nir_dest_num_components(instr->dest.dest);
1354 }
1355
1356 static inline bool
1357 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1358 {
1359 switch (instr->op) {
1360 case nir_op_flt:
1361 case nir_op_fge:
1362 case nir_op_feq:
1363 case nir_op_fne:
1364 case nir_op_ilt:
1365 case nir_op_ult:
1366 case nir_op_ige:
1367 case nir_op_uge:
1368 case nir_op_ieq:
1369 case nir_op_ine:
1370 case nir_op_i2b1:
1371 case nir_op_f2b1:
1372 case nir_op_inot:
1373 return true;
1374 default:
1375 return false;
1376 }
1377 }
1378
1379 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1380 nir_alu_type full_type);
1381
1382 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1383 unsigned src1, unsigned src2);
1384
1385 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1386 const nir_alu_instr *alu2,
1387 unsigned src1, unsigned src2);
1388
1389 typedef enum {
1390 nir_deref_type_var,
1391 nir_deref_type_array,
1392 nir_deref_type_array_wildcard,
1393 nir_deref_type_ptr_as_array,
1394 nir_deref_type_struct,
1395 nir_deref_type_cast,
1396 } nir_deref_type;
1397
1398 typedef struct {
1399 nir_instr instr;
1400
1401 /** The type of this deref instruction */
1402 nir_deref_type deref_type;
1403
1404 /** The mode of the underlying variable */
1405 nir_variable_mode mode;
1406
1407 /** The dereferenced type of the resulting pointer value */
1408 const struct glsl_type *type;
1409
1410 union {
1411 /** Variable being dereferenced if deref_type is a deref_var */
1412 nir_variable *var;
1413
1414 /** Parent deref if deref_type is not deref_var */
1415 nir_src parent;
1416 };
1417
1418 /** Additional deref parameters */
1419 union {
1420 struct {
1421 nir_src index;
1422 } arr;
1423
1424 struct {
1425 unsigned index;
1426 } strct;
1427
1428 struct {
1429 unsigned ptr_stride;
1430 } cast;
1431 };
1432
1433 /** Destination to store the resulting "pointer" */
1434 nir_dest dest;
1435 } nir_deref_instr;
1436
1437 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1438
1439 static inline nir_deref_instr *
1440 nir_deref_instr_parent(const nir_deref_instr *instr)
1441 {
1442 if (instr->deref_type == nir_deref_type_var)
1443 return NULL;
1444 else
1445 return nir_src_as_deref(instr->parent);
1446 }
1447
1448 static inline nir_variable *
1449 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1450 {
1451 while (instr->deref_type != nir_deref_type_var) {
1452 if (instr->deref_type == nir_deref_type_cast)
1453 return NULL;
1454
1455 instr = nir_deref_instr_parent(instr);
1456 }
1457
1458 return instr->var;
1459 }
1460
1461 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1462 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1463 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1464
1465 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1466
1467 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1468
1469 typedef struct {
1470 nir_instr instr;
1471
1472 struct nir_function *callee;
1473
1474 unsigned num_params;
1475 nir_src params[];
1476 } nir_call_instr;
1477
1478 #include "nir_intrinsics.h"
1479
1480 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1481
1482 /** Represents an intrinsic
1483 *
1484 * An intrinsic is an instruction type for handling things that are
1485 * more-or-less regular operations but don't just consume and produce SSA
1486 * values like ALU operations do. Intrinsics are not for things that have
1487 * special semantic meaning such as phi nodes and parallel copies.
1488 * Examples of intrinsics include variable load/store operations, system
1489 * value loads, and the like. Even though texturing more-or-less falls
1490 * under this category, texturing is its own instruction type because
1491 * trying to represent texturing with intrinsics would lead to a
1492 * combinatorial explosion of intrinsic opcodes.
1493 *
1494 * By having a single instruction type for handling a lot of different
1495 * cases, optimization passes can look for intrinsics and, for the most
1496 * part, completely ignore them. Each intrinsic type also has a few
1497 * possible flags that govern whether or not they can be reordered or
1498 * eliminated. That way passes like dead code elimination can still work
1499 * on intrisics without understanding the meaning of each.
1500 *
1501 * Each intrinsic has some number of constant indices, some number of
1502 * variables, and some number of sources. What these sources, variables,
1503 * and indices mean depends on the intrinsic and is documented with the
1504 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1505 * instructions are the only types of instruction that can operate on
1506 * variables.
1507 */
1508 typedef struct {
1509 nir_instr instr;
1510
1511 nir_intrinsic_op intrinsic;
1512
1513 nir_dest dest;
1514
1515 /** number of components if this is a vectorized intrinsic
1516 *
1517 * Similarly to ALU operations, some intrinsics are vectorized.
1518 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1519 * For vectorized intrinsics, the num_components field specifies the
1520 * number of destination components and the number of source components
1521 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1522 */
1523 uint8_t num_components;
1524
1525 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1526
1527 nir_src src[];
1528 } nir_intrinsic_instr;
1529
1530 static inline nir_variable *
1531 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1532 {
1533 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1534 }
1535
1536 typedef enum {
1537 /* Memory ordering. */
1538 NIR_MEMORY_ACQUIRE = 1 << 0,
1539 NIR_MEMORY_RELEASE = 1 << 1,
1540 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1541
1542 /* Memory visibility operations. */
1543 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1544 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1545 } nir_memory_semantics;
1546
1547 typedef enum {
1548 NIR_SCOPE_NONE,
1549 NIR_SCOPE_INVOCATION,
1550 NIR_SCOPE_SUBGROUP,
1551 NIR_SCOPE_WORKGROUP,
1552 NIR_SCOPE_QUEUE_FAMILY,
1553 NIR_SCOPE_DEVICE,
1554 } nir_scope;
1555
1556 /**
1557 * \name NIR intrinsics semantic flags
1558 *
1559 * information about what the compiler can do with the intrinsics.
1560 *
1561 * \sa nir_intrinsic_info::flags
1562 */
1563 typedef enum {
1564 /**
1565 * whether the intrinsic can be safely eliminated if none of its output
1566 * value is not being used.
1567 */
1568 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1569
1570 /**
1571 * Whether the intrinsic can be reordered with respect to any other
1572 * intrinsic, i.e. whether the only reordering dependencies of the
1573 * intrinsic are due to the register reads/writes.
1574 */
1575 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1576 } nir_intrinsic_semantic_flag;
1577
1578 /**
1579 * \name NIR intrinsics const-index flag
1580 *
1581 * Indicates the usage of a const_index slot.
1582 *
1583 * \sa nir_intrinsic_info::index_map
1584 */
1585 typedef enum {
1586 /**
1587 * Generally instructions that take a offset src argument, can encode
1588 * a constant 'base' value which is added to the offset.
1589 */
1590 NIR_INTRINSIC_BASE = 1,
1591
1592 /**
1593 * For store instructions, a writemask for the store.
1594 */
1595 NIR_INTRINSIC_WRMASK,
1596
1597 /**
1598 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1599 */
1600 NIR_INTRINSIC_STREAM_ID,
1601
1602 /**
1603 * The clip-plane id for load_user_clip_plane intrinsic.
1604 */
1605 NIR_INTRINSIC_UCP_ID,
1606
1607 /**
1608 * The amount of data, starting from BASE, that this instruction may
1609 * access. This is used to provide bounds if the offset is not constant.
1610 */
1611 NIR_INTRINSIC_RANGE,
1612
1613 /**
1614 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1615 */
1616 NIR_INTRINSIC_DESC_SET,
1617
1618 /**
1619 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1620 */
1621 NIR_INTRINSIC_BINDING,
1622
1623 /**
1624 * Component offset.
1625 */
1626 NIR_INTRINSIC_COMPONENT,
1627
1628 /**
1629 * Interpolation mode (only meaningful for FS inputs).
1630 */
1631 NIR_INTRINSIC_INTERP_MODE,
1632
1633 /**
1634 * A binary nir_op to use when performing a reduction or scan operation
1635 */
1636 NIR_INTRINSIC_REDUCTION_OP,
1637
1638 /**
1639 * Cluster size for reduction operations
1640 */
1641 NIR_INTRINSIC_CLUSTER_SIZE,
1642
1643 /**
1644 * Parameter index for a load_param intrinsic
1645 */
1646 NIR_INTRINSIC_PARAM_IDX,
1647
1648 /**
1649 * Image dimensionality for image intrinsics
1650 *
1651 * One of GLSL_SAMPLER_DIM_*
1652 */
1653 NIR_INTRINSIC_IMAGE_DIM,
1654
1655 /**
1656 * Non-zero if we are accessing an array image
1657 */
1658 NIR_INTRINSIC_IMAGE_ARRAY,
1659
1660 /**
1661 * Image format for image intrinsics
1662 */
1663 NIR_INTRINSIC_FORMAT,
1664
1665 /**
1666 * Access qualifiers for image and memory access intrinsics
1667 */
1668 NIR_INTRINSIC_ACCESS,
1669
1670 /**
1671 * Alignment for offsets and addresses
1672 *
1673 * These two parameters, specify an alignment in terms of a multiplier and
1674 * an offset. The offset or address parameter X of the intrinsic is
1675 * guaranteed to satisfy the following:
1676 *
1677 * (X - align_offset) % align_mul == 0
1678 */
1679 NIR_INTRINSIC_ALIGN_MUL,
1680 NIR_INTRINSIC_ALIGN_OFFSET,
1681
1682 /**
1683 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1684 */
1685 NIR_INTRINSIC_DESC_TYPE,
1686
1687 /**
1688 * The nir_alu_type of a uniform/input/output
1689 */
1690 NIR_INTRINSIC_TYPE,
1691
1692 /**
1693 * The swizzle mask for the instructions
1694 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1695 */
1696 NIR_INTRINSIC_SWIZZLE_MASK,
1697
1698 /* Separate source/dest access flags for copies */
1699 NIR_INTRINSIC_SRC_ACCESS,
1700 NIR_INTRINSIC_DST_ACCESS,
1701
1702 /* Driver location for nir_load_patch_location_ir3 */
1703 NIR_INTRINSIC_DRIVER_LOCATION,
1704
1705 /**
1706 * Mask of nir_memory_semantics, includes ordering and visibility.
1707 */
1708 NIR_INTRINSIC_MEMORY_SEMANTICS,
1709
1710 /**
1711 * Mask of nir_variable_modes affected by the memory operation.
1712 */
1713 NIR_INTRINSIC_MEMORY_MODES,
1714
1715 /**
1716 * Value of nir_scope.
1717 */
1718 NIR_INTRINSIC_MEMORY_SCOPE,
1719
1720 /**
1721 * Value of nir_scope.
1722 */
1723 NIR_INTRINSIC_EXECUTION_SCOPE,
1724
1725 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1726
1727 } nir_intrinsic_index_flag;
1728
1729 #define NIR_INTRINSIC_MAX_INPUTS 5
1730
1731 typedef struct {
1732 const char *name;
1733
1734 uint8_t num_srcs; /** < number of register/SSA inputs */
1735
1736 /** number of components of each input register
1737 *
1738 * If this value is 0, the number of components is given by the
1739 * num_components field of nir_intrinsic_instr. If this value is -1, the
1740 * intrinsic consumes however many components are provided and it is not
1741 * validated at all.
1742 */
1743 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1744
1745 bool has_dest;
1746
1747 /** number of components of the output register
1748 *
1749 * If this value is 0, the number of components is given by the
1750 * num_components field of nir_intrinsic_instr.
1751 */
1752 uint8_t dest_components;
1753
1754 /** bitfield of legal bit sizes */
1755 uint8_t dest_bit_sizes;
1756
1757 /** the number of constant indices used by the intrinsic */
1758 uint8_t num_indices;
1759
1760 /** indicates the usage of intr->const_index[n] */
1761 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1762
1763 /** semantic flags for calls to this intrinsic */
1764 nir_intrinsic_semantic_flag flags;
1765 } nir_intrinsic_info;
1766
1767 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1768
1769 static inline unsigned
1770 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1771 {
1772 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1773 assert(srcn < info->num_srcs);
1774 if (info->src_components[srcn] > 0)
1775 return info->src_components[srcn];
1776 else if (info->src_components[srcn] == 0)
1777 return intr->num_components;
1778 else
1779 return nir_src_num_components(intr->src[srcn]);
1780 }
1781
1782 static inline unsigned
1783 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1784 {
1785 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1786 if (!info->has_dest)
1787 return 0;
1788 else if (info->dest_components)
1789 return info->dest_components;
1790 else
1791 return intr->num_components;
1792 }
1793
1794 /**
1795 * Helper to copy const_index[] from src to dst, without assuming they
1796 * match in order.
1797 */
1798 static inline void
1799 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1800 {
1801 if (src->intrinsic == dst->intrinsic) {
1802 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1803 return;
1804 }
1805
1806 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1807 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1808
1809 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1810 if (src_info->index_map[i] == 0)
1811 continue;
1812
1813 /* require that dst instruction also uses the same const_index[]: */
1814 assert(dst_info->index_map[i] > 0);
1815
1816 dst->const_index[dst_info->index_map[i] - 1] =
1817 src->const_index[src_info->index_map[i] - 1];
1818 }
1819 }
1820
1821 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1822 static inline type \
1823 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1824 { \
1825 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1826 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1827 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1828 } \
1829 static inline void \
1830 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1831 { \
1832 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1833 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1834 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1835 }
1836
1837 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1838 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1839 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1840 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1841 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1842 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1843 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1844 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1845 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1846 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1847 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1848 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1849 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1850 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1851 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1852 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1853 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1854 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1855 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1856 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1857 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1858 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1859 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1860 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1861 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1862 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1863 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1864 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1865
1866 static inline void
1867 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1868 unsigned align_mul, unsigned align_offset)
1869 {
1870 assert(util_is_power_of_two_nonzero(align_mul));
1871 assert(align_offset < align_mul);
1872 nir_intrinsic_set_align_mul(intrin, align_mul);
1873 nir_intrinsic_set_align_offset(intrin, align_offset);
1874 }
1875
1876 /** Returns a simple alignment for a load/store intrinsic offset
1877 *
1878 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1879 * and ALIGN_OFFSET parameters, this helper takes both into account and
1880 * provides a single simple alignment parameter. The offset X is guaranteed
1881 * to satisfy X % align == 0.
1882 */
1883 static inline unsigned
1884 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1885 {
1886 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1887 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1888 assert(align_offset < align_mul);
1889 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1890 }
1891
1892 unsigned
1893 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1894
1895 /* Converts a image_deref_* intrinsic into a image_* one */
1896 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1897 nir_ssa_def *handle, bool bindless);
1898
1899 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1900 static inline bool
1901 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1902 {
1903 if (instr->intrinsic == nir_intrinsic_load_deref ||
1904 instr->intrinsic == nir_intrinsic_load_ssbo ||
1905 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1906 instr->intrinsic == nir_intrinsic_image_deref_load ||
1907 instr->intrinsic == nir_intrinsic_image_load) {
1908 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1909 } else {
1910 const nir_intrinsic_info *info =
1911 &nir_intrinsic_infos[instr->intrinsic];
1912 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1913 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1914 }
1915 }
1916
1917 /**
1918 * \group texture information
1919 *
1920 * This gives semantic information about textures which is useful to the
1921 * frontend, the backend, and lowering passes, but not the optimizer.
1922 */
1923
1924 typedef enum {
1925 nir_tex_src_coord,
1926 nir_tex_src_projector,
1927 nir_tex_src_comparator, /* shadow comparator */
1928 nir_tex_src_offset,
1929 nir_tex_src_bias,
1930 nir_tex_src_lod,
1931 nir_tex_src_min_lod,
1932 nir_tex_src_ms_index, /* MSAA sample index */
1933 nir_tex_src_ms_mcs, /* MSAA compression value */
1934 nir_tex_src_ddx,
1935 nir_tex_src_ddy,
1936 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1937 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1938 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1939 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1940 nir_tex_src_texture_handle, /* < bindless texture handle */
1941 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1942 nir_tex_src_plane, /* < selects plane for planar textures */
1943 nir_num_tex_src_types
1944 } nir_tex_src_type;
1945
1946 typedef struct {
1947 nir_src src;
1948 nir_tex_src_type src_type;
1949 } nir_tex_src;
1950
1951 typedef enum {
1952 nir_texop_tex, /**< Regular texture look-up */
1953 nir_texop_txb, /**< Texture look-up with LOD bias */
1954 nir_texop_txl, /**< Texture look-up with explicit LOD */
1955 nir_texop_txd, /**< Texture look-up with partial derivatives */
1956 nir_texop_txf, /**< Texel fetch with explicit LOD */
1957 nir_texop_txf_ms, /**< Multisample texture fetch */
1958 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1959 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1960 nir_texop_txs, /**< Texture size */
1961 nir_texop_lod, /**< Texture lod query */
1962 nir_texop_tg4, /**< Texture gather */
1963 nir_texop_query_levels, /**< Texture levels query */
1964 nir_texop_texture_samples, /**< Texture samples query */
1965 nir_texop_samples_identical, /**< Query whether all samples are definitely
1966 * identical.
1967 */
1968 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1969 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1970 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1971 } nir_texop;
1972
1973 typedef struct {
1974 nir_instr instr;
1975
1976 enum glsl_sampler_dim sampler_dim;
1977 nir_alu_type dest_type;
1978
1979 nir_texop op;
1980 nir_dest dest;
1981 nir_tex_src *src;
1982 unsigned num_srcs, coord_components;
1983 bool is_array, is_shadow;
1984
1985 /**
1986 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1987 * components or the new-style shadow that outputs 1 component.
1988 */
1989 bool is_new_style_shadow;
1990
1991 /* gather component selector */
1992 unsigned component : 2;
1993
1994 /* gather offsets */
1995 int8_t tg4_offsets[4][2];
1996
1997 /* True if the texture index or handle is not dynamically uniform */
1998 bool texture_non_uniform;
1999
2000 /* True if the sampler index or handle is not dynamically uniform */
2001 bool sampler_non_uniform;
2002
2003 /** The texture index
2004 *
2005 * If this texture instruction has a nir_tex_src_texture_offset source,
2006 * then the texture index is given by texture_index + texture_offset.
2007 */
2008 unsigned texture_index;
2009
2010 /** The sampler index
2011 *
2012 * The following operations do not require a sampler and, as such, this
2013 * field should be ignored:
2014 * - nir_texop_txf
2015 * - nir_texop_txf_ms
2016 * - nir_texop_txs
2017 * - nir_texop_lod
2018 * - nir_texop_query_levels
2019 * - nir_texop_texture_samples
2020 * - nir_texop_samples_identical
2021 *
2022 * If this texture instruction has a nir_tex_src_sampler_offset source,
2023 * then the sampler index is given by sampler_index + sampler_offset.
2024 */
2025 unsigned sampler_index;
2026 } nir_tex_instr;
2027
2028 /*
2029 * Returns true if the texture operation requires a sampler as a general rule,
2030 * see the documentation of sampler_index.
2031 *
2032 * Note that the specific hw/driver backend could require to a sampler
2033 * object/configuration packet in any case, for some other reason.
2034 */
2035 static inline bool
2036 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2037 {
2038 switch (instr->op) {
2039 case nir_texop_txf:
2040 case nir_texop_txf_ms:
2041 case nir_texop_txs:
2042 case nir_texop_lod:
2043 case nir_texop_query_levels:
2044 case nir_texop_texture_samples:
2045 case nir_texop_samples_identical:
2046 return false;
2047 default:
2048 return true;
2049 }
2050 }
2051
2052 static inline unsigned
2053 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2054 {
2055 switch (instr->op) {
2056 case nir_texop_txs: {
2057 unsigned ret;
2058 switch (instr->sampler_dim) {
2059 case GLSL_SAMPLER_DIM_1D:
2060 case GLSL_SAMPLER_DIM_BUF:
2061 ret = 1;
2062 break;
2063 case GLSL_SAMPLER_DIM_2D:
2064 case GLSL_SAMPLER_DIM_CUBE:
2065 case GLSL_SAMPLER_DIM_MS:
2066 case GLSL_SAMPLER_DIM_RECT:
2067 case GLSL_SAMPLER_DIM_EXTERNAL:
2068 case GLSL_SAMPLER_DIM_SUBPASS:
2069 ret = 2;
2070 break;
2071 case GLSL_SAMPLER_DIM_3D:
2072 ret = 3;
2073 break;
2074 default:
2075 unreachable("not reached");
2076 }
2077 if (instr->is_array)
2078 ret++;
2079 return ret;
2080 }
2081
2082 case nir_texop_lod:
2083 return 2;
2084
2085 case nir_texop_texture_samples:
2086 case nir_texop_query_levels:
2087 case nir_texop_samples_identical:
2088 case nir_texop_fragment_mask_fetch:
2089 return 1;
2090
2091 default:
2092 if (instr->is_shadow && instr->is_new_style_shadow)
2093 return 1;
2094
2095 return 4;
2096 }
2097 }
2098
2099 /* Returns true if this texture operation queries something about the texture
2100 * rather than actually sampling it.
2101 */
2102 static inline bool
2103 nir_tex_instr_is_query(const nir_tex_instr *instr)
2104 {
2105 switch (instr->op) {
2106 case nir_texop_txs:
2107 case nir_texop_lod:
2108 case nir_texop_texture_samples:
2109 case nir_texop_query_levels:
2110 case nir_texop_txf_ms_mcs:
2111 return true;
2112 case nir_texop_tex:
2113 case nir_texop_txb:
2114 case nir_texop_txl:
2115 case nir_texop_txd:
2116 case nir_texop_txf:
2117 case nir_texop_txf_ms:
2118 case nir_texop_txf_ms_fb:
2119 case nir_texop_tg4:
2120 return false;
2121 default:
2122 unreachable("Invalid texture opcode");
2123 }
2124 }
2125
2126 static inline bool
2127 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2128 {
2129 switch (instr->op) {
2130 case nir_texop_tex:
2131 case nir_texop_txb:
2132 case nir_texop_lod:
2133 return true;
2134 default:
2135 return false;
2136 }
2137 }
2138
2139 static inline nir_alu_type
2140 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2141 {
2142 switch (instr->src[src].src_type) {
2143 case nir_tex_src_coord:
2144 switch (instr->op) {
2145 case nir_texop_txf:
2146 case nir_texop_txf_ms:
2147 case nir_texop_txf_ms_fb:
2148 case nir_texop_txf_ms_mcs:
2149 case nir_texop_samples_identical:
2150 return nir_type_int;
2151
2152 default:
2153 return nir_type_float;
2154 }
2155
2156 case nir_tex_src_lod:
2157 switch (instr->op) {
2158 case nir_texop_txs:
2159 case nir_texop_txf:
2160 return nir_type_int;
2161
2162 default:
2163 return nir_type_float;
2164 }
2165
2166 case nir_tex_src_projector:
2167 case nir_tex_src_comparator:
2168 case nir_tex_src_bias:
2169 case nir_tex_src_min_lod:
2170 case nir_tex_src_ddx:
2171 case nir_tex_src_ddy:
2172 return nir_type_float;
2173
2174 case nir_tex_src_offset:
2175 case nir_tex_src_ms_index:
2176 case nir_tex_src_plane:
2177 return nir_type_int;
2178
2179 case nir_tex_src_ms_mcs:
2180 case nir_tex_src_texture_deref:
2181 case nir_tex_src_sampler_deref:
2182 case nir_tex_src_texture_offset:
2183 case nir_tex_src_sampler_offset:
2184 case nir_tex_src_texture_handle:
2185 case nir_tex_src_sampler_handle:
2186 return nir_type_uint;
2187
2188 case nir_num_tex_src_types:
2189 unreachable("nir_num_tex_src_types is not a valid source type");
2190 }
2191
2192 unreachable("Invalid texture source type");
2193 }
2194
2195 static inline unsigned
2196 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2197 {
2198 if (instr->src[src].src_type == nir_tex_src_coord)
2199 return instr->coord_components;
2200
2201 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2202 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2203 return 4;
2204
2205 if (instr->src[src].src_type == nir_tex_src_ddx ||
2206 instr->src[src].src_type == nir_tex_src_ddy) {
2207 if (instr->is_array)
2208 return instr->coord_components - 1;
2209 else
2210 return instr->coord_components;
2211 }
2212
2213 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2214 * the offset, since a cube maps to a single face.
2215 */
2216 if (instr->src[src].src_type == nir_tex_src_offset) {
2217 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2218 return 2;
2219 else if (instr->is_array)
2220 return instr->coord_components - 1;
2221 else
2222 return instr->coord_components;
2223 }
2224
2225 return 1;
2226 }
2227
2228 static inline int
2229 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2230 {
2231 for (unsigned i = 0; i < instr->num_srcs; i++)
2232 if (instr->src[i].src_type == type)
2233 return (int) i;
2234
2235 return -1;
2236 }
2237
2238 void nir_tex_instr_add_src(nir_tex_instr *tex,
2239 nir_tex_src_type src_type,
2240 nir_src src);
2241
2242 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2243
2244 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2245
2246 typedef struct {
2247 nir_instr instr;
2248
2249 nir_ssa_def def;
2250
2251 nir_const_value value[];
2252 } nir_load_const_instr;
2253
2254 typedef enum {
2255 /** Return from a function
2256 *
2257 * This instruction is a classic function return. It jumps to
2258 * nir_function_impl::end_block. No return value is provided in this
2259 * instruction. Instead, the function is expected to write any return
2260 * data to a deref passed in from the caller.
2261 */
2262 nir_jump_return,
2263
2264 /** Break out of the inner-most loop
2265 *
2266 * This has the same semantics as C's "break" statement.
2267 */
2268 nir_jump_break,
2269
2270 /** Jump back to the top of the inner-most loop
2271 *
2272 * This has the same semantics as C's "continue" statement assuming that a
2273 * NIR loop is implemented as "while (1) { body }".
2274 */
2275 nir_jump_continue,
2276 } nir_jump_type;
2277
2278 typedef struct {
2279 nir_instr instr;
2280 nir_jump_type type;
2281 } nir_jump_instr;
2282
2283 /* creates a new SSA variable in an undefined state */
2284
2285 typedef struct {
2286 nir_instr instr;
2287 nir_ssa_def def;
2288 } nir_ssa_undef_instr;
2289
2290 typedef struct {
2291 struct exec_node node;
2292
2293 /* The predecessor block corresponding to this source */
2294 struct nir_block *pred;
2295
2296 nir_src src;
2297 } nir_phi_src;
2298
2299 #define nir_foreach_phi_src(phi_src, phi) \
2300 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2301 #define nir_foreach_phi_src_safe(phi_src, phi) \
2302 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2303
2304 typedef struct {
2305 nir_instr instr;
2306
2307 struct exec_list srcs; /** < list of nir_phi_src */
2308
2309 nir_dest dest;
2310 } nir_phi_instr;
2311
2312 typedef struct {
2313 struct exec_node node;
2314 nir_src src;
2315 nir_dest dest;
2316 } nir_parallel_copy_entry;
2317
2318 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2319 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2320
2321 typedef struct {
2322 nir_instr instr;
2323
2324 /* A list of nir_parallel_copy_entrys. The sources of all of the
2325 * entries are copied to the corresponding destinations "in parallel".
2326 * In other words, if we have two entries: a -> b and b -> a, the values
2327 * get swapped.
2328 */
2329 struct exec_list entries;
2330 } nir_parallel_copy_instr;
2331
2332 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2333 type, nir_instr_type_alu)
2334 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2335 type, nir_instr_type_deref)
2336 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2337 type, nir_instr_type_call)
2338 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2339 type, nir_instr_type_jump)
2340 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2341 type, nir_instr_type_tex)
2342 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2343 type, nir_instr_type_intrinsic)
2344 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2345 type, nir_instr_type_load_const)
2346 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2347 type, nir_instr_type_ssa_undef)
2348 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2349 type, nir_instr_type_phi)
2350 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2351 nir_parallel_copy_instr, instr,
2352 type, nir_instr_type_parallel_copy)
2353
2354
2355 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2356 static inline type \
2357 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2358 { \
2359 assert(nir_src_is_const(src)); \
2360 nir_load_const_instr *load = \
2361 nir_instr_as_load_const(src.ssa->parent_instr); \
2362 assert(comp < load->def.num_components); \
2363 return nir_const_value_as_##suffix(load->value[comp], \
2364 load->def.bit_size); \
2365 } \
2366 \
2367 static inline type \
2368 nir_src_as_##suffix(nir_src src) \
2369 { \
2370 assert(nir_src_num_components(src) == 1); \
2371 return nir_src_comp_as_##suffix(src, 0); \
2372 }
2373
2374 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2375 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2376 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2377 NIR_DEFINE_SRC_AS_CONST(double, float)
2378
2379 #undef NIR_DEFINE_SRC_AS_CONST
2380
2381
2382 typedef struct {
2383 nir_ssa_def *def;
2384 unsigned comp;
2385 } nir_ssa_scalar;
2386
2387 static inline bool
2388 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2389 {
2390 return s.def->parent_instr->type == nir_instr_type_load_const;
2391 }
2392
2393 static inline nir_const_value
2394 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2395 {
2396 assert(s.comp < s.def->num_components);
2397 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2398 return load->value[s.comp];
2399 }
2400
2401 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2402 static inline type \
2403 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2404 { \
2405 return nir_const_value_as_##suffix( \
2406 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2407 }
2408
2409 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2410 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2411 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2412 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2413
2414 #undef NIR_DEFINE_SCALAR_AS_CONST
2415
2416 static inline bool
2417 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2418 {
2419 return s.def->parent_instr->type == nir_instr_type_alu;
2420 }
2421
2422 static inline nir_op
2423 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2424 {
2425 return nir_instr_as_alu(s.def->parent_instr)->op;
2426 }
2427
2428 static inline nir_ssa_scalar
2429 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2430 {
2431 nir_ssa_scalar out = { NULL, 0 };
2432
2433 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2434 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2435
2436 /* Our component must be written */
2437 assert(s.comp < s.def->num_components);
2438 assert(alu->dest.write_mask & (1u << s.comp));
2439
2440 assert(alu->src[alu_src_idx].src.is_ssa);
2441 out.def = alu->src[alu_src_idx].src.ssa;
2442
2443 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2444 /* The ALU src is unsized so the source component follows the
2445 * destination component.
2446 */
2447 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2448 } else {
2449 /* This is a sized source so all source components work together to
2450 * produce all the destination components. Since we need to return a
2451 * scalar, this only works if the source is a scalar.
2452 */
2453 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2454 out.comp = alu->src[alu_src_idx].swizzle[0];
2455 }
2456 assert(out.comp < out.def->num_components);
2457
2458 return out;
2459 }
2460
2461
2462 /*
2463 * Control flow
2464 *
2465 * Control flow consists of a tree of control flow nodes, which include
2466 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2467 * instructions that always run start-to-finish. Each basic block also keeps
2468 * track of its successors (blocks which may run immediately after the current
2469 * block) and predecessors (blocks which could have run immediately before the
2470 * current block). Each function also has a start block and an end block which
2471 * all return statements point to (which is always empty). Together, all the
2472 * blocks with their predecessors and successors make up the control flow
2473 * graph (CFG) of the function. There are helpers that modify the tree of
2474 * control flow nodes while modifying the CFG appropriately; these should be
2475 * used instead of modifying the tree directly.
2476 */
2477
2478 typedef enum {
2479 nir_cf_node_block,
2480 nir_cf_node_if,
2481 nir_cf_node_loop,
2482 nir_cf_node_function
2483 } nir_cf_node_type;
2484
2485 typedef struct nir_cf_node {
2486 struct exec_node node;
2487 nir_cf_node_type type;
2488 struct nir_cf_node *parent;
2489 } nir_cf_node;
2490
2491 typedef struct nir_block {
2492 nir_cf_node cf_node;
2493
2494 struct exec_list instr_list; /** < list of nir_instr */
2495
2496 /** generic block index; generated by nir_index_blocks */
2497 unsigned index;
2498
2499 /*
2500 * Each block can only have up to 2 successors, so we put them in a simple
2501 * array - no need for anything more complicated.
2502 */
2503 struct nir_block *successors[2];
2504
2505 /* Set of nir_block predecessors in the CFG */
2506 struct set *predecessors;
2507
2508 /*
2509 * this node's immediate dominator in the dominance tree - set to NULL for
2510 * the start block.
2511 */
2512 struct nir_block *imm_dom;
2513
2514 /* This node's children in the dominance tree */
2515 unsigned num_dom_children;
2516 struct nir_block **dom_children;
2517
2518 /* Set of nir_blocks on the dominance frontier of this block */
2519 struct set *dom_frontier;
2520
2521 /*
2522 * These two indices have the property that dom_{pre,post}_index for each
2523 * child of this block in the dominance tree will always be between
2524 * dom_pre_index and dom_post_index for this block, which makes testing if
2525 * a given block is dominated by another block an O(1) operation.
2526 */
2527 int16_t dom_pre_index, dom_post_index;
2528
2529 /* live in and out for this block; used for liveness analysis */
2530 BITSET_WORD *live_in;
2531 BITSET_WORD *live_out;
2532 } nir_block;
2533
2534 static inline bool
2535 nir_block_is_reachable(nir_block *b)
2536 {
2537 /* See also nir_block_dominates */
2538 return b->dom_post_index != -1;
2539 }
2540
2541 static inline nir_instr *
2542 nir_block_first_instr(nir_block *block)
2543 {
2544 struct exec_node *head = exec_list_get_head(&block->instr_list);
2545 return exec_node_data(nir_instr, head, node);
2546 }
2547
2548 static inline nir_instr *
2549 nir_block_last_instr(nir_block *block)
2550 {
2551 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2552 return exec_node_data(nir_instr, tail, node);
2553 }
2554
2555 static inline bool
2556 nir_block_ends_in_jump(nir_block *block)
2557 {
2558 return !exec_list_is_empty(&block->instr_list) &&
2559 nir_block_last_instr(block)->type == nir_instr_type_jump;
2560 }
2561
2562 #define nir_foreach_instr(instr, block) \
2563 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2564 #define nir_foreach_instr_reverse(instr, block) \
2565 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2566 #define nir_foreach_instr_safe(instr, block) \
2567 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2568 #define nir_foreach_instr_reverse_safe(instr, block) \
2569 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2570
2571 typedef enum {
2572 nir_selection_control_none = 0x0,
2573 nir_selection_control_flatten = 0x1,
2574 nir_selection_control_dont_flatten = 0x2,
2575 } nir_selection_control;
2576
2577 typedef struct nir_if {
2578 nir_cf_node cf_node;
2579 nir_src condition;
2580 nir_selection_control control;
2581
2582 struct exec_list then_list; /** < list of nir_cf_node */
2583 struct exec_list else_list; /** < list of nir_cf_node */
2584 } nir_if;
2585
2586 typedef struct {
2587 nir_if *nif;
2588
2589 /** Instruction that generates nif::condition. */
2590 nir_instr *conditional_instr;
2591
2592 /** Block within ::nif that has the break instruction. */
2593 nir_block *break_block;
2594
2595 /** Last block for the then- or else-path that does not contain the break. */
2596 nir_block *continue_from_block;
2597
2598 /** True when ::break_block is in the else-path of ::nif. */
2599 bool continue_from_then;
2600 bool induction_rhs;
2601
2602 /* This is true if the terminators exact trip count is unknown. For
2603 * example:
2604 *
2605 * for (int i = 0; i < imin(x, 4); i++)
2606 * ...
2607 *
2608 * Here loop analysis would have set a max_trip_count of 4 however we dont
2609 * know for sure that this is the exact trip count.
2610 */
2611 bool exact_trip_count_unknown;
2612
2613 struct list_head loop_terminator_link;
2614 } nir_loop_terminator;
2615
2616 typedef struct {
2617 /* Estimated cost (in number of instructions) of the loop */
2618 unsigned instr_cost;
2619
2620 /* Guessed trip count based on array indexing */
2621 unsigned guessed_trip_count;
2622
2623 /* Maximum number of times the loop is run (if known) */
2624 unsigned max_trip_count;
2625
2626 /* Do we know the exact number of times the loop will be run */
2627 bool exact_trip_count_known;
2628
2629 /* Unroll the loop regardless of its size */
2630 bool force_unroll;
2631
2632 /* Does the loop contain complex loop terminators, continues or other
2633 * complex behaviours? If this is true we can't rely on
2634 * loop_terminator_list to be complete or accurate.
2635 */
2636 bool complex_loop;
2637
2638 nir_loop_terminator *limiting_terminator;
2639
2640 /* A list of loop_terminators terminating this loop. */
2641 struct list_head loop_terminator_list;
2642 } nir_loop_info;
2643
2644 typedef enum {
2645 nir_loop_control_none = 0x0,
2646 nir_loop_control_unroll = 0x1,
2647 nir_loop_control_dont_unroll = 0x2,
2648 } nir_loop_control;
2649
2650 typedef struct {
2651 nir_cf_node cf_node;
2652
2653 struct exec_list body; /** < list of nir_cf_node */
2654
2655 nir_loop_info *info;
2656 nir_loop_control control;
2657 bool partially_unrolled;
2658 } nir_loop;
2659
2660 /**
2661 * Various bits of metadata that can may be created or required by
2662 * optimization and analysis passes
2663 */
2664 typedef enum {
2665 nir_metadata_none = 0x0,
2666
2667 /** Indicates that nir_block::index values are valid.
2668 *
2669 * The start block has index 0 and they increase through a natural walk of
2670 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2671 * every block index is in the range [0, nir_function_impl::num_blocks].
2672 *
2673 * A pass can preserve this metadata type if it doesn't touch the CFG.
2674 */
2675 nir_metadata_block_index = 0x1,
2676
2677 /** Indicates that block dominance information is valid
2678 *
2679 * This includes:
2680 *
2681 * - nir_block::num_dom_children
2682 * - nir_block::dom_children
2683 * - nir_block::dom_frontier
2684 * - nir_block::dom_pre_index
2685 * - nir_block::dom_post_index
2686 *
2687 * A pass can preserve this metadata type if it doesn't touch the CFG.
2688 */
2689 nir_metadata_dominance = 0x2,
2690
2691 /** Indicates that SSA def data-flow liveness information is valid
2692 *
2693 * This includes:
2694 *
2695 * - nir_ssa_def::live_index
2696 * - nir_block::live_in
2697 * - nir_block::live_out
2698 *
2699 * A pass can preserve this metadata type if it never adds or removes any
2700 * SSA defs (most passes shouldn't preserve this metadata type).
2701 */
2702 nir_metadata_live_ssa_defs = 0x4,
2703
2704 /** A dummy metadata value to track when a pass forgot to call
2705 * nir_metadata_preserve.
2706 *
2707 * A pass should always clear this value even if it doesn't make any
2708 * progress to indicate that it thought about preserving metadata.
2709 */
2710 nir_metadata_not_properly_reset = 0x8,
2711
2712 /** Indicates that loop analysis information is valid.
2713 *
2714 * This includes everything pointed to by nir_loop::info.
2715 *
2716 * A pass can preserve this metadata type if it is guaranteed to not affect
2717 * any loop metadata. However, since loop metadata includes things like
2718 * loop counts which depend on arithmetic in the loop, this is very hard to
2719 * determine. Most passes shouldn't preserve this metadata type.
2720 */
2721 nir_metadata_loop_analysis = 0x10,
2722
2723 /** All metadata
2724 *
2725 * This includes all nir_metadata flags except not_properly_reset. Passes
2726 * which do not change the shader in any way should call
2727 *
2728 * nir_metadata_preserve(impl, nir_metadata_all);
2729 */
2730 nir_metadata_all = ~nir_metadata_not_properly_reset,
2731 } nir_metadata;
2732
2733 typedef struct {
2734 nir_cf_node cf_node;
2735
2736 /** pointer to the function of which this is an implementation */
2737 struct nir_function *function;
2738
2739 struct exec_list body; /** < list of nir_cf_node */
2740
2741 nir_block *end_block;
2742
2743 /** list for all local variables in the function */
2744 struct exec_list locals;
2745
2746 /** list of local registers in the function */
2747 struct exec_list registers;
2748
2749 /** next available local register index */
2750 unsigned reg_alloc;
2751
2752 /** next available SSA value index */
2753 unsigned ssa_alloc;
2754
2755 /* total number of basic blocks, only valid when block_index_dirty = false */
2756 unsigned num_blocks;
2757
2758 nir_metadata valid_metadata;
2759 } nir_function_impl;
2760
2761 #define nir_foreach_function_temp_variable(var, impl) \
2762 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2763
2764 #define nir_foreach_function_temp_variable_safe(var, impl) \
2765 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2766
2767 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2768 nir_start_block(nir_function_impl *impl)
2769 {
2770 return (nir_block *) impl->body.head_sentinel.next;
2771 }
2772
2773 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2774 nir_impl_last_block(nir_function_impl *impl)
2775 {
2776 return (nir_block *) impl->body.tail_sentinel.prev;
2777 }
2778
2779 static inline nir_cf_node *
2780 nir_cf_node_next(nir_cf_node *node)
2781 {
2782 struct exec_node *next = exec_node_get_next(&node->node);
2783 if (exec_node_is_tail_sentinel(next))
2784 return NULL;
2785 else
2786 return exec_node_data(nir_cf_node, next, node);
2787 }
2788
2789 static inline nir_cf_node *
2790 nir_cf_node_prev(nir_cf_node *node)
2791 {
2792 struct exec_node *prev = exec_node_get_prev(&node->node);
2793 if (exec_node_is_head_sentinel(prev))
2794 return NULL;
2795 else
2796 return exec_node_data(nir_cf_node, prev, node);
2797 }
2798
2799 static inline bool
2800 nir_cf_node_is_first(const nir_cf_node *node)
2801 {
2802 return exec_node_is_head_sentinel(node->node.prev);
2803 }
2804
2805 static inline bool
2806 nir_cf_node_is_last(const nir_cf_node *node)
2807 {
2808 return exec_node_is_tail_sentinel(node->node.next);
2809 }
2810
2811 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2812 type, nir_cf_node_block)
2813 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2814 type, nir_cf_node_if)
2815 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2816 type, nir_cf_node_loop)
2817 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2818 nir_function_impl, cf_node, type, nir_cf_node_function)
2819
2820 static inline nir_block *
2821 nir_if_first_then_block(nir_if *if_stmt)
2822 {
2823 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2824 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2825 }
2826
2827 static inline nir_block *
2828 nir_if_last_then_block(nir_if *if_stmt)
2829 {
2830 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2831 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2832 }
2833
2834 static inline nir_block *
2835 nir_if_first_else_block(nir_if *if_stmt)
2836 {
2837 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2838 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2839 }
2840
2841 static inline nir_block *
2842 nir_if_last_else_block(nir_if *if_stmt)
2843 {
2844 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2845 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2846 }
2847
2848 static inline nir_block *
2849 nir_loop_first_block(nir_loop *loop)
2850 {
2851 struct exec_node *head = exec_list_get_head(&loop->body);
2852 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2853 }
2854
2855 static inline nir_block *
2856 nir_loop_last_block(nir_loop *loop)
2857 {
2858 struct exec_node *tail = exec_list_get_tail(&loop->body);
2859 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2860 }
2861
2862 /**
2863 * Return true if this list of cf_nodes contains a single empty block.
2864 */
2865 static inline bool
2866 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2867 {
2868 if (exec_list_is_singular(cf_list)) {
2869 struct exec_node *head = exec_list_get_head(cf_list);
2870 nir_block *block =
2871 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2872 return exec_list_is_empty(&block->instr_list);
2873 }
2874 return false;
2875 }
2876
2877 typedef struct {
2878 uint8_t num_components;
2879 uint8_t bit_size;
2880 } nir_parameter;
2881
2882 typedef struct nir_function {
2883 struct exec_node node;
2884
2885 const char *name;
2886 struct nir_shader *shader;
2887
2888 unsigned num_params;
2889 nir_parameter *params;
2890
2891 /** The implementation of this function.
2892 *
2893 * If the function is only declared and not implemented, this is NULL.
2894 */
2895 nir_function_impl *impl;
2896
2897 bool is_entrypoint;
2898 } nir_function;
2899
2900 typedef enum {
2901 nir_lower_imul64 = (1 << 0),
2902 nir_lower_isign64 = (1 << 1),
2903 /** Lower all int64 modulus and division opcodes */
2904 nir_lower_divmod64 = (1 << 2),
2905 /** Lower all 64-bit umul_high and imul_high opcodes */
2906 nir_lower_imul_high64 = (1 << 3),
2907 nir_lower_mov64 = (1 << 4),
2908 nir_lower_icmp64 = (1 << 5),
2909 nir_lower_iadd64 = (1 << 6),
2910 nir_lower_iabs64 = (1 << 7),
2911 nir_lower_ineg64 = (1 << 8),
2912 nir_lower_logic64 = (1 << 9),
2913 nir_lower_minmax64 = (1 << 10),
2914 nir_lower_shift64 = (1 << 11),
2915 nir_lower_imul_2x32_64 = (1 << 12),
2916 nir_lower_extract64 = (1 << 13),
2917 nir_lower_ufind_msb64 = (1 << 14),
2918 } nir_lower_int64_options;
2919
2920 typedef enum {
2921 nir_lower_drcp = (1 << 0),
2922 nir_lower_dsqrt = (1 << 1),
2923 nir_lower_drsq = (1 << 2),
2924 nir_lower_dtrunc = (1 << 3),
2925 nir_lower_dfloor = (1 << 4),
2926 nir_lower_dceil = (1 << 5),
2927 nir_lower_dfract = (1 << 6),
2928 nir_lower_dround_even = (1 << 7),
2929 nir_lower_dmod = (1 << 8),
2930 nir_lower_dsub = (1 << 9),
2931 nir_lower_ddiv = (1 << 10),
2932 nir_lower_fp64_full_software = (1 << 11),
2933 } nir_lower_doubles_options;
2934
2935 typedef enum {
2936 nir_divergence_single_prim_per_subgroup = (1 << 0),
2937 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2938 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2939 nir_divergence_view_index_uniform = (1 << 3),
2940 } nir_divergence_options;
2941
2942 typedef struct nir_shader_compiler_options {
2943 bool lower_fdiv;
2944 bool lower_ffma;
2945 bool fuse_ffma;
2946 bool lower_flrp16;
2947 bool lower_flrp32;
2948 /** Lowers flrp when it does not support doubles */
2949 bool lower_flrp64;
2950 bool lower_fpow;
2951 bool lower_fsat;
2952 bool lower_fsqrt;
2953 bool lower_sincos;
2954 bool lower_fmod;
2955 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2956 bool lower_bitfield_extract;
2957 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2958 bool lower_bitfield_extract_to_shifts;
2959 /** Lowers bitfield_insert to bfi/bfm */
2960 bool lower_bitfield_insert;
2961 /** Lowers bitfield_insert to compares, and shifts. */
2962 bool lower_bitfield_insert_to_shifts;
2963 /** Lowers bitfield_insert to bfm/bitfield_select. */
2964 bool lower_bitfield_insert_to_bitfield_select;
2965 /** Lowers bitfield_reverse to shifts. */
2966 bool lower_bitfield_reverse;
2967 /** Lowers bit_count to shifts. */
2968 bool lower_bit_count;
2969 /** Lowers ifind_msb to compare and ufind_msb */
2970 bool lower_ifind_msb;
2971 /** Lowers find_lsb to ufind_msb and logic ops */
2972 bool lower_find_lsb;
2973 bool lower_uadd_carry;
2974 bool lower_usub_borrow;
2975 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2976 bool lower_mul_high;
2977 /** lowers fneg and ineg to fsub and isub. */
2978 bool lower_negate;
2979 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2980 bool lower_sub;
2981
2982 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2983 bool lower_scmp;
2984
2985 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2986 bool lower_vector_cmp;
2987
2988 /** enables rules to lower idiv by power-of-two: */
2989 bool lower_idiv;
2990
2991 /** enable rules to avoid bit ops */
2992 bool lower_bitops;
2993
2994 /** enables rules to lower isign to imin+imax */
2995 bool lower_isign;
2996
2997 /** enables rules to lower fsign to fsub and flt */
2998 bool lower_fsign;
2999
3000 /* lower fdph to fdot4 */
3001 bool lower_fdph;
3002
3003 /** lower fdot to fmul and fsum/fadd. */
3004 bool lower_fdot;
3005
3006 /* Does the native fdot instruction replicate its result for four
3007 * components? If so, then opt_algebraic_late will turn all fdotN
3008 * instructions into fdot_replicatedN instructions.
3009 */
3010 bool fdot_replicates;
3011
3012 /** lowers ffloor to fsub+ffract: */
3013 bool lower_ffloor;
3014
3015 /** lowers ffract to fsub+ffloor: */
3016 bool lower_ffract;
3017
3018 /** lowers fceil to fneg+ffloor+fneg: */
3019 bool lower_fceil;
3020
3021 bool lower_ftrunc;
3022
3023 bool lower_ldexp;
3024
3025 bool lower_pack_half_2x16;
3026 bool lower_pack_unorm_2x16;
3027 bool lower_pack_snorm_2x16;
3028 bool lower_pack_unorm_4x8;
3029 bool lower_pack_snorm_4x8;
3030 bool lower_unpack_half_2x16;
3031 bool lower_unpack_unorm_2x16;
3032 bool lower_unpack_snorm_2x16;
3033 bool lower_unpack_unorm_4x8;
3034 bool lower_unpack_snorm_4x8;
3035
3036 bool lower_pack_split;
3037
3038 bool lower_extract_byte;
3039 bool lower_extract_word;
3040
3041 bool lower_all_io_to_temps;
3042 bool lower_all_io_to_elements;
3043
3044 /* Indicates that the driver only has zero-based vertex id */
3045 bool vertex_id_zero_based;
3046
3047 /**
3048 * If enabled, gl_BaseVertex will be lowered as:
3049 * is_indexed_draw (~0/0) & firstvertex
3050 */
3051 bool lower_base_vertex;
3052
3053 /**
3054 * If enabled, gl_HelperInvocation will be lowered as:
3055 *
3056 * !((1 << sample_id) & sample_mask_in))
3057 *
3058 * This depends on some possibly hw implementation details, which may
3059 * not be true for all hw. In particular that the FS is only executed
3060 * for covered samples or for helper invocations. So, do not blindly
3061 * enable this option.
3062 *
3063 * Note: See also issue #22 in ARB_shader_image_load_store
3064 */
3065 bool lower_helper_invocation;
3066
3067 /**
3068 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3069 *
3070 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3071 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3072 */
3073 bool optimize_sample_mask_in;
3074
3075 bool lower_cs_local_index_from_id;
3076 bool lower_cs_local_id_from_index;
3077
3078 bool lower_device_index_to_zero;
3079
3080 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3081 bool lower_wpos_pntc;
3082
3083 /**
3084 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3085 * lowered to simple arithmetic.
3086 *
3087 * If this flag is set, the lowering will be applied to all bit-sizes of
3088 * these instructions.
3089 *
3090 * \sa ::lower_hadd64
3091 */
3092 bool lower_hadd;
3093
3094 /**
3095 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3096 * should be lowered to simple arithmetic.
3097 *
3098 * If this flag is set, the lowering will be applied to only 64-bit
3099 * versions of these instructions.
3100 *
3101 * \sa ::lower_hadd
3102 */
3103 bool lower_hadd64;
3104
3105 /**
3106 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3107 * arithmetic.
3108 *
3109 * If this flag is set, the lowering will be applied to all bit-sizes of
3110 * these instructions.
3111 *
3112 * \sa ::lower_usub_sat64
3113 */
3114 bool lower_add_sat;
3115
3116 /**
3117 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3118 * arithmetic.
3119 *
3120 * \sa ::lower_add_sat
3121 */
3122 bool lower_usub_sat64;
3123
3124 /**
3125 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3126 * for IO purposes and would prefer loads/stores be vectorized.
3127 */
3128 bool vectorize_io;
3129 bool lower_to_scalar;
3130
3131 /**
3132 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3133 */
3134 bool vectorize_vec2_16bit;
3135
3136 /**
3137 * Should the linker unify inputs_read/outputs_written between adjacent
3138 * shader stages which are linked into a single program?
3139 */
3140 bool unify_interfaces;
3141
3142 /**
3143 * Should nir_lower_io() create load_interpolated_input intrinsics?
3144 *
3145 * If not, it generates regular load_input intrinsics and interpolation
3146 * information must be inferred from the list of input nir_variables.
3147 */
3148 bool use_interpolated_input_intrinsics;
3149
3150 /* Lowers when 32x32->64 bit multiplication is not supported */
3151 bool lower_mul_2x32_64;
3152
3153 /* Lowers when rotate instruction is not supported */
3154 bool lower_rotate;
3155
3156 /**
3157 * Backend supports imul24, and would like to use it (when possible)
3158 * for address/offset calculation. If true, driver should call
3159 * nir_lower_amul(). (If not set, amul will automatically be lowered
3160 * to imul.)
3161 */
3162 bool has_imul24;
3163
3164 /** Backend supports umul24, if not set umul24 will automatically be lowered
3165 * to imul with masked inputs */
3166 bool has_umul24;
3167
3168 /** Backend supports umad24, if not set umad24 will automatically be lowered
3169 * to imul with masked inputs and iadd */
3170 bool has_umad24;
3171
3172 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3173 * memory and control barrier intrinsics based on GLSL.
3174 */
3175 bool use_scoped_barrier;
3176
3177 /**
3178 * Is this the Intel vec4 backend?
3179 *
3180 * Used to inhibit algebraic optimizations that are known to be harmful on
3181 * the Intel vec4 backend. This is generally applicable to any
3182 * optimization that might cause more immediate values to be used in
3183 * 3-source (e.g., ffma and flrp) instructions.
3184 */
3185 bool intel_vec4;
3186
3187 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3188 bool lower_bfe_with_two_constants;
3189
3190 /** Whether 8-bit ALU is supported. */
3191 bool support_8bit_alu;
3192
3193 /** Whether 16-bit ALU is supported. */
3194 bool support_16bit_alu;
3195
3196 unsigned max_unroll_iterations;
3197
3198 nir_lower_int64_options lower_int64_options;
3199 nir_lower_doubles_options lower_doubles_options;
3200 } nir_shader_compiler_options;
3201
3202 typedef struct nir_shader {
3203 /** list of uniforms (nir_variable) */
3204 struct exec_list uniforms;
3205
3206 /** list of inputs (nir_variable) */
3207 struct exec_list inputs;
3208
3209 /** list of outputs (nir_variable) */
3210 struct exec_list outputs;
3211
3212 /** list of shared compute variables (nir_variable) */
3213 struct exec_list shared;
3214
3215 /** Set of driver-specific options for the shader.
3216 *
3217 * The memory for the options is expected to be kept in a single static
3218 * copy by the driver.
3219 */
3220 const struct nir_shader_compiler_options *options;
3221
3222 /** Various bits of compile-time information about a given shader */
3223 struct shader_info info;
3224
3225 /** list of global variables in the shader (nir_variable) */
3226 struct exec_list globals;
3227
3228 /** list of system value variables in the shader (nir_variable) */
3229 struct exec_list system_values;
3230
3231 struct exec_list functions; /** < list of nir_function */
3232
3233 /**
3234 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3235 * access plus one
3236 */
3237 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3238
3239 /** Size in bytes of required scratch space */
3240 unsigned scratch_size;
3241
3242 /** Constant data associated with this shader.
3243 *
3244 * Constant data is loaded through load_constant intrinsics. See also
3245 * nir_opt_large_constants.
3246 */
3247 void *constant_data;
3248 unsigned constant_data_size;
3249 } nir_shader;
3250
3251 #define nir_foreach_function(func, shader) \
3252 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3253
3254 static inline nir_function_impl *
3255 nir_shader_get_entrypoint(nir_shader *shader)
3256 {
3257 nir_function *func = NULL;
3258
3259 nir_foreach_function(function, shader) {
3260 assert(func == NULL);
3261 if (function->is_entrypoint) {
3262 func = function;
3263 #ifndef NDEBUG
3264 break;
3265 #endif
3266 }
3267 }
3268
3269 if (!func)
3270 return NULL;
3271
3272 assert(func->num_params == 0);
3273 assert(func->impl);
3274 return func->impl;
3275 }
3276
3277 nir_shader *nir_shader_create(void *mem_ctx,
3278 gl_shader_stage stage,
3279 const nir_shader_compiler_options *options,
3280 shader_info *si);
3281
3282 nir_register *nir_local_reg_create(nir_function_impl *impl);
3283
3284 void nir_reg_remove(nir_register *reg);
3285
3286 /** Adds a variable to the appropriate list in nir_shader */
3287 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3288
3289 static inline void
3290 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3291 {
3292 assert(var->data.mode == nir_var_function_temp);
3293 exec_list_push_tail(&impl->locals, &var->node);
3294 }
3295
3296 /** creates a variable, sets a few defaults, and adds it to the list */
3297 nir_variable *nir_variable_create(nir_shader *shader,
3298 nir_variable_mode mode,
3299 const struct glsl_type *type,
3300 const char *name);
3301 /** creates a local variable and adds it to the list */
3302 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3303 const struct glsl_type *type,
3304 const char *name);
3305
3306 /** creates a function and adds it to the shader's list of functions */
3307 nir_function *nir_function_create(nir_shader *shader, const char *name);
3308
3309 nir_function_impl *nir_function_impl_create(nir_function *func);
3310 /** creates a function_impl that isn't tied to any particular function */
3311 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3312
3313 nir_block *nir_block_create(nir_shader *shader);
3314 nir_if *nir_if_create(nir_shader *shader);
3315 nir_loop *nir_loop_create(nir_shader *shader);
3316
3317 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3318
3319 /** requests that the given pieces of metadata be generated */
3320 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3321 /** dirties all but the preserved metadata */
3322 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3323 /** Preserves all metadata for the given shader */
3324 void nir_shader_preserve_all_metadata(nir_shader *shader);
3325
3326 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3327 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3328
3329 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3330 nir_deref_type deref_type);
3331
3332 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3333
3334 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3335 unsigned num_components,
3336 unsigned bit_size);
3337
3338 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3339 nir_intrinsic_op op);
3340
3341 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3342 nir_function *callee);
3343
3344 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3345
3346 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3347
3348 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3349
3350 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3351 unsigned num_components,
3352 unsigned bit_size);
3353
3354 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3355
3356 /**
3357 * NIR Cursors and Instruction Insertion API
3358 * @{
3359 *
3360 * A tiny struct representing a point to insert/extract instructions or
3361 * control flow nodes. Helps reduce the combinatorial explosion of possible
3362 * points to insert/extract.
3363 *
3364 * \sa nir_control_flow.h
3365 */
3366 typedef enum {
3367 nir_cursor_before_block,
3368 nir_cursor_after_block,
3369 nir_cursor_before_instr,
3370 nir_cursor_after_instr,
3371 } nir_cursor_option;
3372
3373 typedef struct {
3374 nir_cursor_option option;
3375 union {
3376 nir_block *block;
3377 nir_instr *instr;
3378 };
3379 } nir_cursor;
3380
3381 static inline nir_block *
3382 nir_cursor_current_block(nir_cursor cursor)
3383 {
3384 if (cursor.option == nir_cursor_before_instr ||
3385 cursor.option == nir_cursor_after_instr) {
3386 return cursor.instr->block;
3387 } else {
3388 return cursor.block;
3389 }
3390 }
3391
3392 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3393
3394 static inline nir_cursor
3395 nir_before_block(nir_block *block)
3396 {
3397 nir_cursor cursor;
3398 cursor.option = nir_cursor_before_block;
3399 cursor.block = block;
3400 return cursor;
3401 }
3402
3403 static inline nir_cursor
3404 nir_after_block(nir_block *block)
3405 {
3406 nir_cursor cursor;
3407 cursor.option = nir_cursor_after_block;
3408 cursor.block = block;
3409 return cursor;
3410 }
3411
3412 static inline nir_cursor
3413 nir_before_instr(nir_instr *instr)
3414 {
3415 nir_cursor cursor;
3416 cursor.option = nir_cursor_before_instr;
3417 cursor.instr = instr;
3418 return cursor;
3419 }
3420
3421 static inline nir_cursor
3422 nir_after_instr(nir_instr *instr)
3423 {
3424 nir_cursor cursor;
3425 cursor.option = nir_cursor_after_instr;
3426 cursor.instr = instr;
3427 return cursor;
3428 }
3429
3430 static inline nir_cursor
3431 nir_after_block_before_jump(nir_block *block)
3432 {
3433 nir_instr *last_instr = nir_block_last_instr(block);
3434 if (last_instr && last_instr->type == nir_instr_type_jump) {
3435 return nir_before_instr(last_instr);
3436 } else {
3437 return nir_after_block(block);
3438 }
3439 }
3440
3441 static inline nir_cursor
3442 nir_before_src(nir_src *src, bool is_if_condition)
3443 {
3444 if (is_if_condition) {
3445 nir_block *prev_block =
3446 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3447 assert(!nir_block_ends_in_jump(prev_block));
3448 return nir_after_block(prev_block);
3449 } else if (src->parent_instr->type == nir_instr_type_phi) {
3450 #ifndef NDEBUG
3451 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3452 bool found = false;
3453 nir_foreach_phi_src(phi_src, cond_phi) {
3454 if (phi_src->src.ssa == src->ssa) {
3455 found = true;
3456 break;
3457 }
3458 }
3459 assert(found);
3460 #endif
3461 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3462 * to have a more specific name.
3463 */
3464 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3465 return nir_after_block_before_jump(phi_src->pred);
3466 } else {
3467 return nir_before_instr(src->parent_instr);
3468 }
3469 }
3470
3471 static inline nir_cursor
3472 nir_before_cf_node(nir_cf_node *node)
3473 {
3474 if (node->type == nir_cf_node_block)
3475 return nir_before_block(nir_cf_node_as_block(node));
3476
3477 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3478 }
3479
3480 static inline nir_cursor
3481 nir_after_cf_node(nir_cf_node *node)
3482 {
3483 if (node->type == nir_cf_node_block)
3484 return nir_after_block(nir_cf_node_as_block(node));
3485
3486 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3487 }
3488
3489 static inline nir_cursor
3490 nir_after_phis(nir_block *block)
3491 {
3492 nir_foreach_instr(instr, block) {
3493 if (instr->type != nir_instr_type_phi)
3494 return nir_before_instr(instr);
3495 }
3496 return nir_after_block(block);
3497 }
3498
3499 static inline nir_cursor
3500 nir_after_cf_node_and_phis(nir_cf_node *node)
3501 {
3502 if (node->type == nir_cf_node_block)
3503 return nir_after_block(nir_cf_node_as_block(node));
3504
3505 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3506
3507 return nir_after_phis(block);
3508 }
3509
3510 static inline nir_cursor
3511 nir_before_cf_list(struct exec_list *cf_list)
3512 {
3513 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3514 exec_list_get_head(cf_list), node);
3515 return nir_before_cf_node(first_node);
3516 }
3517
3518 static inline nir_cursor
3519 nir_after_cf_list(struct exec_list *cf_list)
3520 {
3521 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3522 exec_list_get_tail(cf_list), node);
3523 return nir_after_cf_node(last_node);
3524 }
3525
3526 /**
3527 * Insert a NIR instruction at the given cursor.
3528 *
3529 * Note: This does not update the cursor.
3530 */
3531 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3532
3533 static inline void
3534 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3535 {
3536 nir_instr_insert(nir_before_instr(instr), before);
3537 }
3538
3539 static inline void
3540 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3541 {
3542 nir_instr_insert(nir_after_instr(instr), after);
3543 }
3544
3545 static inline void
3546 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3547 {
3548 nir_instr_insert(nir_before_block(block), before);
3549 }
3550
3551 static inline void
3552 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3553 {
3554 nir_instr_insert(nir_after_block(block), after);
3555 }
3556
3557 static inline void
3558 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3559 {
3560 nir_instr_insert(nir_before_cf_node(node), before);
3561 }
3562
3563 static inline void
3564 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3565 {
3566 nir_instr_insert(nir_after_cf_node(node), after);
3567 }
3568
3569 static inline void
3570 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3571 {
3572 nir_instr_insert(nir_before_cf_list(list), before);
3573 }
3574
3575 static inline void
3576 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3577 {
3578 nir_instr_insert(nir_after_cf_list(list), after);
3579 }
3580
3581 void nir_instr_remove_v(nir_instr *instr);
3582
3583 static inline nir_cursor
3584 nir_instr_remove(nir_instr *instr)
3585 {
3586 nir_cursor cursor;
3587 nir_instr *prev = nir_instr_prev(instr);
3588 if (prev) {
3589 cursor = nir_after_instr(prev);
3590 } else {
3591 cursor = nir_before_block(instr->block);
3592 }
3593 nir_instr_remove_v(instr);
3594 return cursor;
3595 }
3596
3597 /** @} */
3598
3599 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3600
3601 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3602 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3603 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3604 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3605 void *state);
3606 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3607 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3608 bool nir_foreach_phi_src_leaving_block(nir_block *instr,
3609 nir_foreach_src_cb cb,
3610 void *state);
3611
3612 nir_const_value *nir_src_as_const_value(nir_src src);
3613
3614 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3615 static inline c_type * \
3616 nir_src_as_ ## name (nir_src src) \
3617 { \
3618 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3619 ? cast_macro(src.ssa->parent_instr) : NULL; \
3620 }
3621
3622 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3623 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3624 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3625 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3626
3627 bool nir_src_is_dynamically_uniform(nir_src src);
3628 bool nir_srcs_equal(nir_src src1, nir_src src2);
3629 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3630 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3631 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3632 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3633 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3634 nir_dest new_dest);
3635
3636 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3637 unsigned num_components, unsigned bit_size,
3638 const char *name);
3639 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3640 unsigned num_components, unsigned bit_size,
3641 const char *name);
3642 static inline void
3643 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3644 const struct glsl_type *type,
3645 const char *name)
3646 {
3647 assert(glsl_type_is_vector_or_scalar(type));
3648 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3649 glsl_get_bit_size(type), name);
3650 }
3651 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3652 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3653 nir_instr *after_me);
3654
3655 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3656
3657 /*
3658 * finds the next basic block in source-code order, returns NULL if there is
3659 * none
3660 */
3661
3662 nir_block *nir_block_cf_tree_next(nir_block *block);
3663
3664 /* Performs the opposite of nir_block_cf_tree_next() */
3665
3666 nir_block *nir_block_cf_tree_prev(nir_block *block);
3667
3668 /* Gets the first block in a CF node in source-code order */
3669
3670 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3671
3672 /* Gets the last block in a CF node in source-code order */
3673
3674 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3675
3676 /* Gets the next block after a CF node in source-code order */
3677
3678 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3679
3680 /* Macros for loops that visit blocks in source-code order */
3681
3682 #define nir_foreach_block(block, impl) \
3683 for (nir_block *block = nir_start_block(impl); block != NULL; \
3684 block = nir_block_cf_tree_next(block))
3685
3686 #define nir_foreach_block_safe(block, impl) \
3687 for (nir_block *block = nir_start_block(impl), \
3688 *next = nir_block_cf_tree_next(block); \
3689 block != NULL; \
3690 block = next, next = nir_block_cf_tree_next(block))
3691
3692 #define nir_foreach_block_reverse(block, impl) \
3693 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3694 block = nir_block_cf_tree_prev(block))
3695
3696 #define nir_foreach_block_reverse_safe(block, impl) \
3697 for (nir_block *block = nir_impl_last_block(impl), \
3698 *prev = nir_block_cf_tree_prev(block); \
3699 block != NULL; \
3700 block = prev, prev = nir_block_cf_tree_prev(block))
3701
3702 #define nir_foreach_block_in_cf_node(block, node) \
3703 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3704 block != nir_cf_node_cf_tree_next(node); \
3705 block = nir_block_cf_tree_next(block))
3706
3707 /* If the following CF node is an if, this function returns that if.
3708 * Otherwise, it returns NULL.
3709 */
3710 nir_if *nir_block_get_following_if(nir_block *block);
3711
3712 nir_loop *nir_block_get_following_loop(nir_block *block);
3713
3714 void nir_index_local_regs(nir_function_impl *impl);
3715 void nir_index_ssa_defs(nir_function_impl *impl);
3716 unsigned nir_index_instrs(nir_function_impl *impl);
3717
3718 void nir_index_blocks(nir_function_impl *impl);
3719
3720 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3721
3722 void nir_print_shader(nir_shader *shader, FILE *fp);
3723 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3724 void nir_print_instr(const nir_instr *instr, FILE *fp);
3725 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3726
3727 /** Shallow clone of a single ALU instruction. */
3728 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3729
3730 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3731 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3732 const nir_function_impl *fi);
3733 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3734 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3735
3736 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3737
3738 void nir_shader_serialize_deserialize(nir_shader *s);
3739
3740 #ifndef NDEBUG
3741 void nir_validate_shader(nir_shader *shader, const char *when);
3742 void nir_metadata_set_validation_flag(nir_shader *shader);
3743 void nir_metadata_check_validation_flag(nir_shader *shader);
3744
3745 static inline bool
3746 should_skip_nir(const char *name)
3747 {
3748 static const char *list = NULL;
3749 if (!list) {
3750 /* Comma separated list of names to skip. */
3751 list = getenv("NIR_SKIP");
3752 if (!list)
3753 list = "";
3754 }
3755
3756 if (!list[0])
3757 return false;
3758
3759 return comma_separated_list_contains(list, name);
3760 }
3761
3762 static inline bool
3763 should_clone_nir(void)
3764 {
3765 static int should_clone = -1;
3766 if (should_clone < 0)
3767 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3768
3769 return should_clone;
3770 }
3771
3772 static inline bool
3773 should_serialize_deserialize_nir(void)
3774 {
3775 static int test_serialize = -1;
3776 if (test_serialize < 0)
3777 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3778
3779 return test_serialize;
3780 }
3781
3782 static inline bool
3783 should_print_nir(void)
3784 {
3785 static int should_print = -1;
3786 if (should_print < 0)
3787 should_print = env_var_as_boolean("NIR_PRINT", false);
3788
3789 return should_print;
3790 }
3791 #else
3792 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3793 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3794 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3795 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3796 static inline bool should_clone_nir(void) { return false; }
3797 static inline bool should_serialize_deserialize_nir(void) { return false; }
3798 static inline bool should_print_nir(void) { return false; }
3799 #endif /* NDEBUG */
3800
3801 #define _PASS(pass, nir, do_pass) do { \
3802 if (should_skip_nir(#pass)) { \
3803 printf("skipping %s\n", #pass); \
3804 break; \
3805 } \
3806 do_pass \
3807 nir_validate_shader(nir, "after " #pass); \
3808 if (should_clone_nir()) { \
3809 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3810 nir_shader_replace(nir, clone); \
3811 } \
3812 if (should_serialize_deserialize_nir()) { \
3813 nir_shader_serialize_deserialize(nir); \
3814 } \
3815 } while (0)
3816
3817 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3818 nir_metadata_set_validation_flag(nir); \
3819 if (should_print_nir()) \
3820 printf("%s\n", #pass); \
3821 if (pass(nir, ##__VA_ARGS__)) { \
3822 progress = true; \
3823 if (should_print_nir()) \
3824 nir_print_shader(nir, stdout); \
3825 nir_metadata_check_validation_flag(nir); \
3826 } \
3827 )
3828
3829 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3830 if (should_print_nir()) \
3831 printf("%s\n", #pass); \
3832 pass(nir, ##__VA_ARGS__); \
3833 if (should_print_nir()) \
3834 nir_print_shader(nir, stdout); \
3835 )
3836
3837 #define NIR_SKIP(name) should_skip_nir(#name)
3838
3839 /** An instruction filtering callback
3840 *
3841 * Returns true if the instruction should be processed and false otherwise.
3842 */
3843 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3844
3845 /** A simple instruction lowering callback
3846 *
3847 * Many instruction lowering passes can be written as a simple function which
3848 * takes an instruction as its input and returns a sequence of instructions
3849 * that implement the consumed instruction. This function type represents
3850 * such a lowering function. When called, a function with this prototype
3851 * should either return NULL indicating that no lowering needs to be done or
3852 * emit a sequence of instructions using the provided builder (whose cursor
3853 * will already be placed after the instruction to be lowered) and return the
3854 * resulting nir_ssa_def.
3855 */
3856 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3857 nir_instr *, void *);
3858
3859 /**
3860 * Special return value for nir_lower_instr_cb when some progress occurred
3861 * (like changing an input to the instr) that didn't result in a replacement
3862 * SSA def being generated.
3863 */
3864 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3865
3866 /** Iterate over all the instructions in a nir_function_impl and lower them
3867 * using the provided callbacks
3868 *
3869 * This function implements the guts of a standard lowering pass for you. It
3870 * iterates over all of the instructions in a nir_function_impl and calls the
3871 * filter callback on each one. If the filter callback returns true, it then
3872 * calls the lowering call back on the instruction. (Splitting it this way
3873 * allows us to avoid some save/restore work for instructions we know won't be
3874 * lowered.) If the instruction is dead after the lowering is complete, it
3875 * will be removed. If new instructions are added, the lowering callback will
3876 * also be called on them in case multiple lowerings are required.
3877 *
3878 * The metadata for the nir_function_impl will also be updated. If any blocks
3879 * are added (they cannot be removed), dominance and block indices will be
3880 * invalidated.
3881 */
3882 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3883 nir_instr_filter_cb filter,
3884 nir_lower_instr_cb lower,
3885 void *cb_data);
3886 bool nir_shader_lower_instructions(nir_shader *shader,
3887 nir_instr_filter_cb filter,
3888 nir_lower_instr_cb lower,
3889 void *cb_data);
3890
3891 void nir_calc_dominance_impl(nir_function_impl *impl);
3892 void nir_calc_dominance(nir_shader *shader);
3893
3894 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3895 bool nir_block_dominates(nir_block *parent, nir_block *child);
3896 bool nir_block_is_unreachable(nir_block *block);
3897
3898 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3899 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3900
3901 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3902 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3903
3904 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3905 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3906
3907 int nir_gs_count_vertices(const nir_shader *shader);
3908
3909 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3910 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3911 bool nir_split_var_copies(nir_shader *shader);
3912 bool nir_split_per_member_structs(nir_shader *shader);
3913 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3914
3915 bool nir_lower_returns_impl(nir_function_impl *impl);
3916 bool nir_lower_returns(nir_shader *shader);
3917
3918 void nir_inline_function_impl(struct nir_builder *b,
3919 const nir_function_impl *impl,
3920 nir_ssa_def **params);
3921 bool nir_inline_functions(nir_shader *shader);
3922
3923 bool nir_propagate_invariant(nir_shader *shader);
3924
3925 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3926 void nir_lower_deref_copy_instr(struct nir_builder *b,
3927 nir_intrinsic_instr *copy);
3928 bool nir_lower_var_copies(nir_shader *shader);
3929
3930 void nir_fixup_deref_modes(nir_shader *shader);
3931
3932 bool nir_lower_global_vars_to_local(nir_shader *shader);
3933
3934 typedef enum {
3935 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3936 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3937 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3938 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3939 } nir_lower_array_deref_of_vec_options;
3940
3941 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3942 nir_lower_array_deref_of_vec_options options);
3943
3944 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3945
3946 bool nir_lower_locals_to_regs(nir_shader *shader);
3947
3948 void nir_lower_io_to_temporaries(nir_shader *shader,
3949 nir_function_impl *entrypoint,
3950 bool outputs, bool inputs);
3951
3952 bool nir_lower_vars_to_scratch(nir_shader *shader,
3953 nir_variable_mode modes,
3954 int size_threshold,
3955 glsl_type_size_align_func size_align);
3956
3957 void nir_lower_clip_halfz(nir_shader *shader);
3958
3959 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3960
3961 void nir_gather_ssa_types(nir_function_impl *impl,
3962 BITSET_WORD *float_types,
3963 BITSET_WORD *int_types);
3964
3965 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3966 int (*type_size)(const struct glsl_type *, bool));
3967
3968 /* Some helpers to do very simple linking */
3969 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3970 bool nir_remove_unused_io_vars(nir_shader *shader, nir_variable_mode mode,
3971 uint64_t *used_by_other_stage,
3972 uint64_t *used_by_other_stage_patches);
3973 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3974 bool default_to_smooth_interp);
3975 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3976 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3977
3978 bool nir_lower_amul(nir_shader *shader,
3979 int (*type_size)(const struct glsl_type *, bool));
3980
3981 void nir_assign_io_var_locations(struct exec_list *var_list,
3982 unsigned *size,
3983 gl_shader_stage stage);
3984
3985 typedef struct {
3986 uint8_t num_linked_io_vars;
3987 uint8_t num_linked_patch_io_vars;
3988 } nir_linked_io_var_info;
3989
3990 nir_linked_io_var_info
3991 nir_assign_linked_io_var_locations(nir_shader *producer,
3992 nir_shader *consumer);
3993
3994 typedef enum {
3995 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3996 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3997 * modes.
3998 */
3999 nir_lower_io_lower_64bit_to_32 = (1 << 0),
4000
4001 /* If set, this forces all non-flat fragment shader inputs to be
4002 * interpolated as if with the "sample" qualifier. This requires
4003 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
4004 */
4005 nir_lower_io_force_sample_interpolation = (1 << 1),
4006 } nir_lower_io_options;
4007 bool nir_lower_io(nir_shader *shader,
4008 nir_variable_mode modes,
4009 int (*type_size)(const struct glsl_type *, bool),
4010 nir_lower_io_options);
4011
4012 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
4013
4014 bool
4015 nir_lower_vars_to_explicit_types(nir_shader *shader,
4016 nir_variable_mode modes,
4017 glsl_type_size_align_func type_info);
4018
4019 typedef enum {
4020 /**
4021 * An address format which is a simple 32-bit global GPU address.
4022 */
4023 nir_address_format_32bit_global,
4024
4025 /**
4026 * An address format which is a simple 64-bit global GPU address.
4027 */
4028 nir_address_format_64bit_global,
4029
4030 /**
4031 * An address format which is a bounds-checked 64-bit global GPU address.
4032 *
4033 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
4034 * address stored with the low bits in .x and high bits in .y, .z is a
4035 * size, and .w is an offset. When the final I/O operation is lowered, .w
4036 * is checked against .z and the operation is predicated on the result.
4037 */
4038 nir_address_format_64bit_bounded_global,
4039
4040 /**
4041 * An address format which is comprised of a vec2 where the first
4042 * component is a buffer index and the second is an offset.
4043 */
4044 nir_address_format_32bit_index_offset,
4045
4046 /**
4047 * An address format which is comprised of a vec3 where the first two
4048 * components specify the buffer and the third is an offset.
4049 */
4050 nir_address_format_vec2_index_32bit_offset,
4051
4052 /**
4053 * An address format which is a simple 32-bit offset.
4054 */
4055 nir_address_format_32bit_offset,
4056
4057 /**
4058 * An address format representing a purely logical addressing model. In
4059 * this model, all deref chains must be complete from the dereference
4060 * operation to the variable. Cast derefs are not allowed. These
4061 * addresses will be 32-bit scalars but the format is immaterial because
4062 * you can always chase the chain.
4063 */
4064 nir_address_format_logical,
4065 } nir_address_format;
4066
4067 static inline unsigned
4068 nir_address_format_bit_size(nir_address_format addr_format)
4069 {
4070 switch (addr_format) {
4071 case nir_address_format_32bit_global: return 32;
4072 case nir_address_format_64bit_global: return 64;
4073 case nir_address_format_64bit_bounded_global: return 32;
4074 case nir_address_format_32bit_index_offset: return 32;
4075 case nir_address_format_vec2_index_32bit_offset: return 32;
4076 case nir_address_format_32bit_offset: return 32;
4077 case nir_address_format_logical: return 32;
4078 }
4079 unreachable("Invalid address format");
4080 }
4081
4082 static inline unsigned
4083 nir_address_format_num_components(nir_address_format addr_format)
4084 {
4085 switch (addr_format) {
4086 case nir_address_format_32bit_global: return 1;
4087 case nir_address_format_64bit_global: return 1;
4088 case nir_address_format_64bit_bounded_global: return 4;
4089 case nir_address_format_32bit_index_offset: return 2;
4090 case nir_address_format_vec2_index_32bit_offset: return 3;
4091 case nir_address_format_32bit_offset: return 1;
4092 case nir_address_format_logical: return 1;
4093 }
4094 unreachable("Invalid address format");
4095 }
4096
4097 static inline const struct glsl_type *
4098 nir_address_format_to_glsl_type(nir_address_format addr_format)
4099 {
4100 unsigned bit_size = nir_address_format_bit_size(addr_format);
4101 assert(bit_size == 32 || bit_size == 64);
4102 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
4103 nir_address_format_num_components(addr_format));
4104 }
4105
4106 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
4107
4108 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4109 nir_address_format addr_format);
4110
4111 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4112 nir_address_format addr_format);
4113
4114 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
4115 nir_deref_instr *deref,
4116 nir_ssa_def *base_addr,
4117 nir_address_format addr_format);
4118 void nir_lower_explicit_io_instr(struct nir_builder *b,
4119 nir_intrinsic_instr *io_instr,
4120 nir_ssa_def *addr,
4121 nir_address_format addr_format);
4122
4123 bool nir_lower_explicit_io(nir_shader *shader,
4124 nir_variable_mode modes,
4125 nir_address_format);
4126
4127 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
4128 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
4129
4130 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
4131
4132 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
4133 bool nir_lower_regs_to_ssa(nir_shader *shader);
4134 bool nir_lower_vars_to_ssa(nir_shader *shader);
4135
4136 bool nir_remove_dead_derefs(nir_shader *shader);
4137 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
4138 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes,
4139 bool (*can_remove_var)(nir_variable *var));
4140 bool nir_lower_variable_initializers(nir_shader *shader,
4141 nir_variable_mode modes);
4142
4143 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
4144 bool nir_lower_vec_to_movs(nir_shader *shader);
4145 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
4146 bool alpha_to_one,
4147 const gl_state_index16 *alpha_ref_state_tokens);
4148 bool nir_lower_alu(nir_shader *shader);
4149
4150 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
4151 bool always_precise, bool have_ffma);
4152
4153 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
4154 bool nir_lower_bool_to_bitsize(nir_shader *shader);
4155 bool nir_lower_bool_to_float(nir_shader *shader);
4156 bool nir_lower_bool_to_int32(nir_shader *shader);
4157 bool nir_lower_int_to_float(nir_shader *shader);
4158 bool nir_lower_load_const_to_scalar(nir_shader *shader);
4159 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
4160 bool nir_lower_phis_to_scalar(nir_shader *shader);
4161 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
4162 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
4163 bool outputs_only);
4164 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
4165 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
4166 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
4167
4168 bool nir_lower_fragcolor(nir_shader *shader);
4169 void nir_lower_fragcoord_wtrans(nir_shader *shader);
4170 void nir_lower_viewport_transform(nir_shader *shader);
4171 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
4172
4173 typedef struct nir_lower_subgroups_options {
4174 uint8_t subgroup_size;
4175 uint8_t ballot_bit_size;
4176 bool lower_to_scalar:1;
4177 bool lower_vote_trivial:1;
4178 bool lower_vote_eq_to_ballot:1;
4179 bool lower_subgroup_masks:1;
4180 bool lower_shuffle:1;
4181 bool lower_shuffle_to_32bit:1;
4182 bool lower_shuffle_to_swizzle_amd:1;
4183 bool lower_quad:1;
4184 bool lower_quad_broadcast_dynamic:1;
4185 bool lower_quad_broadcast_dynamic_to_const:1;
4186 } nir_lower_subgroups_options;
4187
4188 bool nir_lower_subgroups(nir_shader *shader,
4189 const nir_lower_subgroups_options *options);
4190
4191 bool nir_lower_system_values(nir_shader *shader);
4192
4193 enum PACKED nir_lower_tex_packing {
4194 nir_lower_tex_packing_none = 0,
4195 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
4196 * or unsigned ints based on the sampler type
4197 */
4198 nir_lower_tex_packing_16,
4199 /* The sampler returns 1 32-bit word of 4x8 unorm */
4200 nir_lower_tex_packing_8,
4201 };
4202
4203 typedef struct nir_lower_tex_options {
4204 /**
4205 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4206 * sampler types a texture projector is lowered.
4207 */
4208 unsigned lower_txp;
4209
4210 /**
4211 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4212 */
4213 bool lower_txf_offset;
4214
4215 /**
4216 * If true, lower away nir_tex_src_offset for all rect textures.
4217 */
4218 bool lower_rect_offset;
4219
4220 /**
4221 * If true, lower rect textures to 2D, using txs to fetch the
4222 * texture dimensions and dividing the texture coords by the
4223 * texture dims to normalize.
4224 */
4225 bool lower_rect;
4226
4227 /**
4228 * If true, convert yuv to rgb.
4229 */
4230 unsigned lower_y_uv_external;
4231 unsigned lower_y_u_v_external;
4232 unsigned lower_yx_xuxv_external;
4233 unsigned lower_xy_uxvx_external;
4234 unsigned lower_ayuv_external;
4235 unsigned lower_xyuv_external;
4236
4237 /**
4238 * To emulate certain texture wrap modes, this can be used
4239 * to saturate the specified tex coord to [0.0, 1.0]. The
4240 * bits are according to sampler #, ie. if, for example:
4241 *
4242 * (conf->saturate_s & (1 << n))
4243 *
4244 * is true, then the s coord for sampler n is saturated.
4245 *
4246 * Note that clamping must happen *after* projector lowering
4247 * so any projected texture sample instruction with a clamped
4248 * coordinate gets automatically lowered, regardless of the
4249 * 'lower_txp' setting.
4250 */
4251 unsigned saturate_s;
4252 unsigned saturate_t;
4253 unsigned saturate_r;
4254
4255 /* Bitmask of textures that need swizzling.
4256 *
4257 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4258 * swizzles[texture_index] is applied to the result of the texturing
4259 * operation.
4260 */
4261 unsigned swizzle_result;
4262
4263 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4264 * while 4 and 5 represent 0 and 1 respectively.
4265 */
4266 uint8_t swizzles[32][4];
4267
4268 /* Can be used to scale sampled values in range required by the format. */
4269 float scale_factors[32];
4270
4271 /**
4272 * Bitmap of textures that need srgb to linear conversion. If
4273 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4274 * of the texture are lowered to linear.
4275 */
4276 unsigned lower_srgb;
4277
4278 /**
4279 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4280 * LODs to nir_texop_txl.
4281 */
4282 bool lower_tex_without_implicit_lod;
4283
4284 /**
4285 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4286 */
4287 bool lower_txd_cube_map;
4288
4289 /**
4290 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4291 */
4292 bool lower_txd_3d;
4293
4294 /**
4295 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4296 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4297 * with lower_txd_cube_map.
4298 */
4299 bool lower_txd_shadow;
4300
4301 /**
4302 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4303 * Implies lower_txd_cube_map and lower_txd_shadow.
4304 */
4305 bool lower_txd;
4306
4307 /**
4308 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4309 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4310 */
4311 bool lower_txb_shadow_clamp;
4312
4313 /**
4314 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4315 * with nir_texop_txl. This includes cube maps.
4316 */
4317 bool lower_txd_shadow_clamp;
4318
4319 /**
4320 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4321 * with nir_texop_txl. This includes cube maps.
4322 */
4323 bool lower_txd_offset_clamp;
4324
4325 /**
4326 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4327 * sampler is bindless.
4328 */
4329 bool lower_txd_clamp_bindless_sampler;
4330
4331 /**
4332 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4333 * sampler index is not statically determinable to be less than 16.
4334 */
4335 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4336
4337 /**
4338 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4339 * 0-lod followed by a nir_ishr.
4340 */
4341 bool lower_txs_lod;
4342
4343 /**
4344 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4345 * mixed-up tg4 locations.
4346 */
4347 bool lower_tg4_broadcom_swizzle;
4348
4349 /**
4350 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4351 */
4352 bool lower_tg4_offsets;
4353
4354 enum nir_lower_tex_packing lower_tex_packing[32];
4355 } nir_lower_tex_options;
4356
4357 bool nir_lower_tex(nir_shader *shader,
4358 const nir_lower_tex_options *options);
4359
4360 enum nir_lower_non_uniform_access_type {
4361 nir_lower_non_uniform_ubo_access = (1 << 0),
4362 nir_lower_non_uniform_ssbo_access = (1 << 1),
4363 nir_lower_non_uniform_texture_access = (1 << 2),
4364 nir_lower_non_uniform_image_access = (1 << 3),
4365 };
4366
4367 bool nir_lower_non_uniform_access(nir_shader *shader,
4368 enum nir_lower_non_uniform_access_type);
4369
4370 enum nir_lower_idiv_path {
4371 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4372 * the two but it is not exact in some cases (for example, 1091317713u /
4373 * 1034u gives 5209173 instead of 1055432) */
4374 nir_lower_idiv_fast,
4375 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4376 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4377 * the nv50 path and many of them are integer multiplications, so it is
4378 * probably slower. It should always return the correct result, though. */
4379 nir_lower_idiv_precise,
4380 };
4381
4382 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4383
4384 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4385
4386 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4387 bool use_vars,
4388 bool use_clipdist_array,
4389 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4390 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4391 bool use_clipdist_array,
4392 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4393 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4394 bool use_clipdist_array);
4395 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4396 bool nir_lower_clip_disable(nir_shader *shader, unsigned clip_plane_enable);
4397
4398 void nir_lower_point_size_mov(nir_shader *shader,
4399 const gl_state_index16 *pointsize_state_tokens);
4400
4401 bool nir_lower_frexp(nir_shader *nir);
4402
4403 void nir_lower_two_sided_color(nir_shader *shader, bool face_sysval);
4404
4405 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4406
4407 bool nir_lower_flatshade(nir_shader *shader);
4408
4409 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4410 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4411 const gl_state_index16 *uniform_state_tokens);
4412
4413 typedef struct nir_lower_wpos_ytransform_options {
4414 gl_state_index16 state_tokens[STATE_LENGTH];
4415 bool fs_coord_origin_upper_left :1;
4416 bool fs_coord_origin_lower_left :1;
4417 bool fs_coord_pixel_center_integer :1;
4418 bool fs_coord_pixel_center_half_integer :1;
4419 } nir_lower_wpos_ytransform_options;
4420
4421 bool nir_lower_wpos_ytransform(nir_shader *shader,
4422 const nir_lower_wpos_ytransform_options *options);
4423 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4424
4425 bool nir_lower_wrmasks(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
4426
4427 bool nir_lower_fb_read(nir_shader *shader);
4428
4429 typedef struct nir_lower_drawpixels_options {
4430 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4431 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4432 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4433 unsigned drawpix_sampler;
4434 unsigned pixelmap_sampler;
4435 bool pixel_maps :1;
4436 bool scale_and_bias :1;
4437 } nir_lower_drawpixels_options;
4438
4439 void nir_lower_drawpixels(nir_shader *shader,
4440 const nir_lower_drawpixels_options *options);
4441
4442 typedef struct nir_lower_bitmap_options {
4443 unsigned sampler;
4444 bool swizzle_xxxx;
4445 } nir_lower_bitmap_options;
4446
4447 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4448
4449 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4450
4451 typedef enum {
4452 nir_lower_int_source_mods = 1 << 0,
4453 nir_lower_float_source_mods = 1 << 1,
4454 nir_lower_triop_abs = 1 << 2,
4455 nir_lower_all_source_mods = (1 << 3) - 1
4456 } nir_lower_to_source_mods_flags;
4457
4458
4459 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4460
4461 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4462
4463 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4464
4465 bool nir_lower_bit_size(nir_shader *shader,
4466 nir_lower_bit_size_callback callback,
4467 void *callback_data);
4468
4469 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4470 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4471
4472 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4473 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4474 nir_lower_doubles_options options);
4475 bool nir_lower_pack(nir_shader *shader);
4476
4477 void nir_lower_mediump_outputs(nir_shader *nir);
4478
4479 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4480
4481 typedef enum {
4482 nir_lower_interpolation_at_sample = (1 << 1),
4483 nir_lower_interpolation_at_offset = (1 << 2),
4484 nir_lower_interpolation_centroid = (1 << 3),
4485 nir_lower_interpolation_pixel = (1 << 4),
4486 nir_lower_interpolation_sample = (1 << 5),
4487 } nir_lower_interpolation_options;
4488
4489 bool nir_lower_interpolation(nir_shader *shader,
4490 nir_lower_interpolation_options options);
4491
4492 bool nir_lower_discard_to_demote(nir_shader *shader);
4493
4494 bool nir_lower_memory_model(nir_shader *shader);
4495
4496 bool nir_normalize_cubemap_coords(nir_shader *shader);
4497
4498 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4499
4500 void nir_loop_analyze_impl(nir_function_impl *impl,
4501 nir_variable_mode indirect_mask);
4502
4503 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4504
4505 bool nir_repair_ssa_impl(nir_function_impl *impl);
4506 bool nir_repair_ssa(nir_shader *shader);
4507
4508 void nir_convert_loop_to_lcssa(nir_loop *loop);
4509 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4510 void nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4511
4512 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4513 * registers. If false, convert all values (even those not involved in a phi
4514 * node) to registers.
4515 */
4516 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4517
4518 bool nir_lower_phis_to_regs_block(nir_block *block);
4519 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4520 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4521
4522 bool nir_lower_samplers(nir_shader *shader);
4523 bool nir_lower_ssbo(nir_shader *shader);
4524
4525 /* This is here for unit tests. */
4526 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4527
4528 bool nir_opt_comparison_pre(nir_shader *shader);
4529
4530 bool nir_opt_access(nir_shader *shader);
4531 bool nir_opt_algebraic(nir_shader *shader);
4532 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4533 bool nir_opt_algebraic_late(nir_shader *shader);
4534 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4535 bool nir_opt_constant_folding(nir_shader *shader);
4536
4537 /* Try to combine a and b into a. Return true if combination was possible,
4538 * which will result in b being removed by the pass. Return false if
4539 * combination wasn't possible.
4540 */
4541 typedef bool (*nir_combine_memory_barrier_cb)(
4542 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4543
4544 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4545 nir_combine_memory_barrier_cb combine_cb,
4546 void *data);
4547
4548 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4549
4550 bool nir_copy_prop(nir_shader *shader);
4551
4552 bool nir_opt_copy_prop_vars(nir_shader *shader);
4553
4554 bool nir_opt_cse(nir_shader *shader);
4555
4556 bool nir_opt_dce(nir_shader *shader);
4557
4558 bool nir_opt_dead_cf(nir_shader *shader);
4559
4560 bool nir_opt_dead_write_vars(nir_shader *shader);
4561
4562 bool nir_opt_deref_impl(nir_function_impl *impl);
4563 bool nir_opt_deref(nir_shader *shader);
4564
4565 bool nir_opt_find_array_copies(nir_shader *shader);
4566
4567 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4568
4569 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4570
4571 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4572
4573 bool nir_opt_intrinsics(nir_shader *shader);
4574
4575 bool nir_opt_large_constants(nir_shader *shader,
4576 glsl_type_size_align_func size_align,
4577 unsigned threshold);
4578
4579 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4580
4581 typedef enum {
4582 nir_move_const_undef = (1 << 0),
4583 nir_move_load_ubo = (1 << 1),
4584 nir_move_load_input = (1 << 2),
4585 nir_move_comparisons = (1 << 3),
4586 nir_move_copies = (1 << 4),
4587 } nir_move_options;
4588
4589 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4590
4591 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4592
4593 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4594
4595 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4596 bool indirect_load_ok, bool expensive_alu_ok);
4597
4598 bool nir_opt_rematerialize_compares(nir_shader *shader);
4599
4600 bool nir_opt_remove_phis(nir_shader *shader);
4601 bool nir_opt_remove_phis_block(nir_block *block);
4602
4603 bool nir_opt_shrink_load(nir_shader *shader);
4604
4605 bool nir_opt_trivial_continues(nir_shader *shader);
4606
4607 bool nir_opt_undef(nir_shader *shader);
4608
4609 bool nir_opt_vectorize(nir_shader *shader);
4610
4611 bool nir_opt_conditional_discard(nir_shader *shader);
4612
4613 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4614 unsigned num_components, unsigned high_offset,
4615 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4616
4617 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4618 nir_should_vectorize_mem_func callback,
4619 nir_variable_mode robust_modes);
4620
4621 void nir_strip(nir_shader *shader);
4622
4623 void nir_sweep(nir_shader *shader);
4624
4625 void nir_remap_dual_slot_attributes(nir_shader *shader,
4626 uint64_t *dual_slot_inputs);
4627 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4628
4629 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4630 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4631
4632 static inline bool
4633 nir_variable_is_in_ubo(const nir_variable *var)
4634 {
4635 return (var->data.mode == nir_var_mem_ubo &&
4636 var->interface_type != NULL);
4637 }
4638
4639 static inline bool
4640 nir_variable_is_in_ssbo(const nir_variable *var)
4641 {
4642 return (var->data.mode == nir_var_mem_ssbo &&
4643 var->interface_type != NULL);
4644 }
4645
4646 static inline bool
4647 nir_variable_is_in_block(const nir_variable *var)
4648 {
4649 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4650 }
4651
4652 typedef struct nir_unsigned_upper_bound_config {
4653 unsigned min_subgroup_size;
4654 unsigned max_subgroup_size;
4655 unsigned max_work_group_invocations;
4656 unsigned max_work_group_count[3];
4657 unsigned max_work_group_size[3];
4658
4659 uint32_t vertex_attrib_max[32];
4660 } nir_unsigned_upper_bound_config;
4661
4662 uint32_t
4663 nir_unsigned_upper_bound(nir_shader *shader, struct hash_table *range_ht,
4664 nir_ssa_scalar scalar,
4665 const nir_unsigned_upper_bound_config *config);
4666
4667 bool
4668 nir_addition_might_overflow(nir_shader *shader, struct hash_table *range_ht,
4669 nir_ssa_scalar ssa, unsigned const_val,
4670 const nir_unsigned_upper_bound_config *config);
4671
4672 #ifdef __cplusplus
4673 } /* extern "C" */
4674 #endif
4675
4676 #endif /* NIR_H */