Added few more stubs so that control reaches to DestroyDevice().
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/enum_operators.h"
40 #include "util/macros.h"
41 #include "util/format/u_format.h"
42 #include "compiler/nir_types.h"
43 #include "compiler/shader_enums.h"
44 #include "compiler/shader_info.h"
45 #define XXH_INLINE_ALL
46 #include "util/xxhash.h"
47 #include <stdio.h>
48
49 #ifndef NDEBUG
50 #include "util/debug.h"
51 #endif /* NDEBUG */
52
53 #include "nir_opcodes.h"
54
55 #if defined(_WIN32) && !defined(snprintf)
56 #define snprintf _snprintf
57 #endif
58
59 #ifdef __cplusplus
60 extern "C" {
61 #endif
62
63 #define NIR_FALSE 0u
64 #define NIR_TRUE (~0u)
65 #define NIR_MAX_VEC_COMPONENTS 16
66 #define NIR_MAX_MATRIX_COLUMNS 4
67 #define NIR_STREAM_PACKED (1 << 8)
68 typedef uint16_t nir_component_mask_t;
69
70 static inline bool
71 nir_num_components_valid(unsigned num_components)
72 {
73 return (num_components >= 1 &&
74 num_components <= 4) ||
75 num_components == 8 ||
76 num_components == 16;
77 }
78
79 /** Defines a cast function
80 *
81 * This macro defines a cast function from in_type to out_type where
82 * out_type is some structure type that contains a field of type out_type.
83 *
84 * Note that you have to be a bit careful as the generated cast function
85 * destroys constness.
86 */
87 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
88 type_field, type_value) \
89 static inline out_type * \
90 name(const in_type *parent) \
91 { \
92 assert(parent && parent->type_field == type_value); \
93 return exec_node_data(out_type, parent, field); \
94 }
95
96 struct nir_function;
97 struct nir_shader;
98 struct nir_instr;
99 struct nir_builder;
100
101
102 /**
103 * Description of built-in state associated with a uniform
104 *
105 * \sa nir_variable::state_slots
106 */
107 typedef struct {
108 gl_state_index16 tokens[STATE_LENGTH];
109 uint16_t swizzle;
110 } nir_state_slot;
111
112 typedef enum {
113 nir_var_shader_in = (1 << 0),
114 nir_var_shader_out = (1 << 1),
115 nir_var_shader_temp = (1 << 2),
116 nir_var_function_temp = (1 << 3),
117 nir_var_uniform = (1 << 4),
118 nir_var_mem_ubo = (1 << 5),
119 nir_var_system_value = (1 << 6),
120 nir_var_mem_ssbo = (1 << 7),
121 nir_var_mem_shared = (1 << 8),
122 nir_var_mem_global = (1 << 9),
123 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
124 nir_var_mem_constant = (1 << 11),
125 nir_num_variable_modes = 12,
126 nir_var_all = (1 << nir_num_variable_modes) - 1,
127 } nir_variable_mode;
128 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_variable_mode)
129
130 /**
131 * Rounding modes.
132 */
133 typedef enum {
134 nir_rounding_mode_undef = 0,
135 nir_rounding_mode_rtne = 1, /* round to nearest even */
136 nir_rounding_mode_ru = 2, /* round up */
137 nir_rounding_mode_rd = 3, /* round down */
138 nir_rounding_mode_rtz = 4, /* round towards zero */
139 } nir_rounding_mode;
140
141 typedef union {
142 bool b;
143 float f32;
144 double f64;
145 int8_t i8;
146 uint8_t u8;
147 int16_t i16;
148 uint16_t u16;
149 int32_t i32;
150 uint32_t u32;
151 int64_t i64;
152 uint64_t u64;
153 } nir_const_value;
154
155 #define nir_const_value_to_array(arr, c, components, m) \
156 { \
157 for (unsigned i = 0; i < components; ++i) \
158 arr[i] = c[i].m; \
159 } while (false)
160
161 static inline nir_const_value
162 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
163 {
164 nir_const_value v;
165 memset(&v, 0, sizeof(v));
166
167 switch (bit_size) {
168 case 1: v.b = x; break;
169 case 8: v.u8 = x; break;
170 case 16: v.u16 = x; break;
171 case 32: v.u32 = x; break;
172 case 64: v.u64 = x; break;
173 default:
174 unreachable("Invalid bit size");
175 }
176
177 return v;
178 }
179
180 static inline nir_const_value
181 nir_const_value_for_int(int64_t i, unsigned bit_size)
182 {
183 nir_const_value v;
184 memset(&v, 0, sizeof(v));
185
186 assert(bit_size <= 64);
187 if (bit_size < 64) {
188 assert(i >= (-(1ll << (bit_size - 1))));
189 assert(i < (1ll << (bit_size - 1)));
190 }
191
192 return nir_const_value_for_raw_uint(i, bit_size);
193 }
194
195 static inline nir_const_value
196 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
197 {
198 nir_const_value v;
199 memset(&v, 0, sizeof(v));
200
201 assert(bit_size <= 64);
202 if (bit_size < 64)
203 assert(u < (1ull << bit_size));
204
205 return nir_const_value_for_raw_uint(u, bit_size);
206 }
207
208 static inline nir_const_value
209 nir_const_value_for_bool(bool b, unsigned bit_size)
210 {
211 /* Booleans use a 0/-1 convention */
212 return nir_const_value_for_int(-(int)b, bit_size);
213 }
214
215 /* This one isn't inline because it requires half-float conversion */
216 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
217
218 static inline int64_t
219 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
220 {
221 switch (bit_size) {
222 /* int1_t uses 0/-1 convention */
223 case 1: return -(int)value.b;
224 case 8: return value.i8;
225 case 16: return value.i16;
226 case 32: return value.i32;
227 case 64: return value.i64;
228 default:
229 unreachable("Invalid bit size");
230 }
231 }
232
233 static inline uint64_t
234 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
235 {
236 switch (bit_size) {
237 case 1: return value.b;
238 case 8: return value.u8;
239 case 16: return value.u16;
240 case 32: return value.u32;
241 case 64: return value.u64;
242 default:
243 unreachable("Invalid bit size");
244 }
245 }
246
247 static inline bool
248 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
249 {
250 int64_t i = nir_const_value_as_int(value, bit_size);
251
252 /* Booleans of any size use 0/-1 convention */
253 assert(i == 0 || i == -1);
254
255 return i;
256 }
257
258 /* This one isn't inline because it requires half-float conversion */
259 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
260
261 typedef struct nir_constant {
262 /**
263 * Value of the constant.
264 *
265 * The field used to back the values supplied by the constant is determined
266 * by the type associated with the \c nir_variable. Constants may be
267 * scalars, vectors, or matrices.
268 */
269 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
270
271 /* we could get this from the var->type but makes clone *much* easier to
272 * not have to care about the type.
273 */
274 unsigned num_elements;
275
276 /* Array elements / Structure Fields */
277 struct nir_constant **elements;
278 } nir_constant;
279
280 /**
281 * \brief Layout qualifiers for gl_FragDepth.
282 *
283 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
284 * with a layout qualifier.
285 */
286 typedef enum {
287 nir_depth_layout_none, /**< No depth layout is specified. */
288 nir_depth_layout_any,
289 nir_depth_layout_greater,
290 nir_depth_layout_less,
291 nir_depth_layout_unchanged
292 } nir_depth_layout;
293
294 /**
295 * Enum keeping track of how a variable was declared.
296 */
297 typedef enum {
298 /**
299 * Normal declaration.
300 */
301 nir_var_declared_normally = 0,
302
303 /**
304 * Variable is implicitly generated by the compiler and should not be
305 * visible via the API.
306 */
307 nir_var_hidden,
308 } nir_var_declaration_type;
309
310 /**
311 * Either a uniform, global variable, shader input, or shader output. Based on
312 * ir_variable - it should be easy to translate between the two.
313 */
314
315 typedef struct nir_variable {
316 struct exec_node node;
317
318 /**
319 * Declared type of the variable
320 */
321 const struct glsl_type *type;
322
323 /**
324 * Declared name of the variable
325 */
326 char *name;
327
328 struct nir_variable_data {
329 /**
330 * Storage class of the variable.
331 *
332 * \sa nir_variable_mode
333 */
334 unsigned mode:12;
335
336 /**
337 * Is the variable read-only?
338 *
339 * This is set for variables declared as \c const, shader inputs,
340 * and uniforms.
341 */
342 unsigned read_only:1;
343 unsigned centroid:1;
344 unsigned sample:1;
345 unsigned patch:1;
346 unsigned invariant:1;
347
348 /**
349 * Precision qualifier.
350 *
351 * In desktop GLSL we do not care about precision qualifiers at all, in
352 * fact, the spec says that precision qualifiers are ignored.
353 *
354 * To make things easy, we make it so that this field is always
355 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
356 * have the same precision value and the checks we add in the compiler
357 * for this field will never break a desktop shader compile.
358 */
359 unsigned precision:2;
360
361 /**
362 * Can this variable be coalesced with another?
363 *
364 * This is set by nir_lower_io_to_temporaries to say that any
365 * copies involving this variable should stay put. Propagating it can
366 * duplicate the resulting load/store, which is not wanted, and may
367 * result in a load/store of the variable with an indirect offset which
368 * the backend may not be able to handle.
369 */
370 unsigned cannot_coalesce:1;
371
372 /**
373 * When separate shader programs are enabled, only input/outputs between
374 * the stages of a multi-stage separate program can be safely removed
375 * from the shader interface. Other input/outputs must remains active.
376 *
377 * This is also used to make sure xfb varyings that are unused by the
378 * fragment shader are not removed.
379 */
380 unsigned always_active_io:1;
381
382 /**
383 * Interpolation mode for shader inputs / outputs
384 *
385 * \sa glsl_interp_mode
386 */
387 unsigned interpolation:3;
388
389 /**
390 * If non-zero, then this variable may be packed along with other variables
391 * into a single varying slot, so this offset should be applied when
392 * accessing components. For example, an offset of 1 means that the x
393 * component of this variable is actually stored in component y of the
394 * location specified by \c location.
395 */
396 unsigned location_frac:2;
397
398 /**
399 * If true, this variable represents an array of scalars that should
400 * be tightly packed. In other words, consecutive array elements
401 * should be stored one component apart, rather than one slot apart.
402 */
403 unsigned compact:1;
404
405 /**
406 * Whether this is a fragment shader output implicitly initialized with
407 * the previous contents of the specified render target at the
408 * framebuffer location corresponding to this shader invocation.
409 */
410 unsigned fb_fetch_output:1;
411
412 /**
413 * Non-zero if this variable is considered bindless as defined by
414 * ARB_bindless_texture.
415 */
416 unsigned bindless:1;
417
418 /**
419 * Was an explicit binding set in the shader?
420 */
421 unsigned explicit_binding:1;
422
423 /**
424 * Was the location explicitly set in the shader?
425 *
426 * If the location is explicitly set in the shader, it \b cannot be changed
427 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
428 * no effect).
429 */
430 unsigned explicit_location:1;
431
432 /**
433 * Was a transfer feedback buffer set in the shader?
434 */
435 unsigned explicit_xfb_buffer:1;
436
437 /**
438 * Was a transfer feedback stride set in the shader?
439 */
440 unsigned explicit_xfb_stride:1;
441
442 /**
443 * Was an explicit offset set in the shader?
444 */
445 unsigned explicit_offset:1;
446
447 /**
448 * Layout of the matrix. Uses glsl_matrix_layout values.
449 */
450 unsigned matrix_layout:2;
451
452 /**
453 * Non-zero if this variable was created by lowering a named interface
454 * block.
455 */
456 unsigned from_named_ifc_block:1;
457
458 /**
459 * How the variable was declared. See nir_var_declaration_type.
460 *
461 * This is used to detect variables generated by the compiler, so should
462 * not be visible via the API.
463 */
464 unsigned how_declared:2;
465
466 /**
467 * Is this variable per-view? If so, we know it must be an array with
468 * size corresponding to the number of views.
469 */
470 unsigned per_view:1;
471
472 /**
473 * \brief Layout qualifier for gl_FragDepth. See nir_depth_layout.
474 *
475 * This is not equal to \c ir_depth_layout_none if and only if this
476 * variable is \c gl_FragDepth and a layout qualifier is specified.
477 */
478 unsigned depth_layout:3;
479
480 /**
481 * Vertex stream output identifier.
482 *
483 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
484 * indicate the stream of the i-th component.
485 */
486 unsigned stream:9;
487
488 /**
489 * See gl_access_qualifier.
490 *
491 * Access flags for memory variables (SSBO/global), image uniforms, and
492 * bindless images in uniforms/inputs/outputs.
493 */
494 unsigned access:8;
495
496 /**
497 * Descriptor set binding for sampler or UBO.
498 */
499 unsigned descriptor_set:5;
500
501 /**
502 * output index for dual source blending.
503 */
504 unsigned index;
505
506 /**
507 * Initial binding point for a sampler or UBO.
508 *
509 * For array types, this represents the binding point for the first element.
510 */
511 unsigned binding;
512
513 /**
514 * Storage location of the base of this variable
515 *
516 * The precise meaning of this field depends on the nature of the variable.
517 *
518 * - Vertex shader input: one of the values from \c gl_vert_attrib.
519 * - Vertex shader output: one of the values from \c gl_varying_slot.
520 * - Geometry shader input: one of the values from \c gl_varying_slot.
521 * - Geometry shader output: one of the values from \c gl_varying_slot.
522 * - Fragment shader input: one of the values from \c gl_varying_slot.
523 * - Fragment shader output: one of the values from \c gl_frag_result.
524 * - Uniforms: Per-stage uniform slot number for default uniform block.
525 * - Uniforms: Index within the uniform block definition for UBO members.
526 * - Non-UBO Uniforms: uniform slot number.
527 * - Other: This field is not currently used.
528 *
529 * If the variable is a uniform, shader input, or shader output, and the
530 * slot has not been assigned, the value will be -1.
531 */
532 int location;
533
534 /**
535 * The actual location of the variable in the IR. Only valid for inputs,
536 * outputs, and uniforms (including samplers and images).
537 */
538 unsigned driver_location;
539
540 /**
541 * Location an atomic counter or transform feedback is stored at.
542 */
543 unsigned offset;
544
545 union {
546 struct {
547 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
548 enum pipe_format format;
549 } image;
550
551 struct {
552 /**
553 * For OpenCL inline samplers. See cl_sampler_addressing_mode and cl_sampler_filter_mode
554 */
555 unsigned is_inline_sampler : 1;
556 unsigned addressing_mode : 3;
557 unsigned normalized_coordinates : 1;
558 unsigned filter_mode : 1;
559 } sampler;
560
561 struct {
562 /**
563 * Transform feedback buffer.
564 */
565 uint16_t buffer:2;
566
567 /**
568 * Transform feedback stride.
569 */
570 uint16_t stride;
571 } xfb;
572 };
573 } data;
574
575 /**
576 * Identifier for this variable generated by nir_index_vars() that is unique
577 * among other variables in the same exec_list.
578 */
579 unsigned index;
580
581 /* Number of nir_variable_data members */
582 uint16_t num_members;
583
584 /**
585 * Built-in state that backs this uniform
586 *
587 * Once set at variable creation, \c state_slots must remain invariant.
588 * This is because, ideally, this array would be shared by all clones of
589 * this variable in the IR tree. In other words, we'd really like for it
590 * to be a fly-weight.
591 *
592 * If the variable is not a uniform, \c num_state_slots will be zero and
593 * \c state_slots will be \c NULL.
594 */
595 /*@{*/
596 uint16_t num_state_slots; /**< Number of state slots used */
597 nir_state_slot *state_slots; /**< State descriptors. */
598 /*@}*/
599
600 /**
601 * Constant expression assigned in the initializer of the variable
602 *
603 * This field should only be used temporarily by creators of NIR shaders
604 * and then lower_constant_initializers can be used to get rid of them.
605 * Most of the rest of NIR ignores this field or asserts that it's NULL.
606 */
607 nir_constant *constant_initializer;
608
609 /**
610 * Global variable assigned in the initializer of the variable
611 * This field should only be used temporarily by creators of NIR shaders
612 * and then lower_constant_initializers can be used to get rid of them.
613 * Most of the rest of NIR ignores this field or asserts that it's NULL.
614 */
615 struct nir_variable *pointer_initializer;
616
617 /**
618 * For variables that are in an interface block or are an instance of an
619 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
620 *
621 * \sa ir_variable::location
622 */
623 const struct glsl_type *interface_type;
624
625 /**
626 * Description of per-member data for per-member struct variables
627 *
628 * This is used for variables which are actually an amalgamation of
629 * multiple entities such as a struct of built-in values or a struct of
630 * inputs each with their own layout specifier. This is only allowed on
631 * variables with a struct or array of array of struct type.
632 */
633 struct nir_variable_data *members;
634 } nir_variable;
635
636 static inline bool
637 _nir_shader_variable_has_mode(nir_variable *var, unsigned modes)
638 {
639 /* This isn't a shader variable */
640 assert(!(modes & nir_var_function_temp));
641 return var->data.mode & modes;
642 }
643
644 #define nir_foreach_variable_in_list(var, var_list) \
645 foreach_list_typed(nir_variable, var, node, var_list)
646
647 #define nir_foreach_variable_in_list_safe(var, var_list) \
648 foreach_list_typed_safe(nir_variable, var, node, var_list)
649
650 #define nir_foreach_variable_in_shader(var, shader) \
651 nir_foreach_variable_in_list(var, &(shader)->variables)
652
653 #define nir_foreach_variable_in_shader_safe(var, shader) \
654 nir_foreach_variable_in_list_safe(var, &(shader)->variables)
655
656 #define nir_foreach_variable_with_modes(var, shader, modes) \
657 nir_foreach_variable_in_shader(var, shader) \
658 if (_nir_shader_variable_has_mode(var, modes))
659
660 #define nir_foreach_variable_with_modes_safe(var, shader, modes) \
661 nir_foreach_variable_in_shader_safe(var, shader) \
662 if (_nir_shader_variable_has_mode(var, modes))
663
664 #define nir_foreach_shader_in_variable(var, shader) \
665 nir_foreach_variable_with_modes(var, shader, nir_var_shader_in)
666
667 #define nir_foreach_shader_in_variable_safe(var, shader) \
668 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_in)
669
670 #define nir_foreach_shader_out_variable(var, shader) \
671 nir_foreach_variable_with_modes(var, shader, nir_var_shader_out)
672
673 #define nir_foreach_shader_out_variable_safe(var, shader) \
674 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_out)
675
676 #define nir_foreach_uniform_variable(var, shader) \
677 nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
678
679 #define nir_foreach_uniform_variable_safe(var, shader) \
680 nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
681
682 static inline bool
683 nir_variable_is_global(const nir_variable *var)
684 {
685 return var->data.mode != nir_var_function_temp;
686 }
687
688 typedef struct nir_register {
689 struct exec_node node;
690
691 unsigned num_components; /** < number of vector components */
692 unsigned num_array_elems; /** < size of array (0 for no array) */
693
694 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
695 uint8_t bit_size;
696
697 /** generic register index. */
698 unsigned index;
699
700 /** only for debug purposes, can be NULL */
701 const char *name;
702
703 /** set of nir_srcs where this register is used (read from) */
704 struct list_head uses;
705
706 /** set of nir_dests where this register is defined (written to) */
707 struct list_head defs;
708
709 /** set of nir_ifs where this register is used as a condition */
710 struct list_head if_uses;
711 } nir_register;
712
713 #define nir_foreach_register(reg, reg_list) \
714 foreach_list_typed(nir_register, reg, node, reg_list)
715 #define nir_foreach_register_safe(reg, reg_list) \
716 foreach_list_typed_safe(nir_register, reg, node, reg_list)
717
718 typedef enum PACKED {
719 nir_instr_type_alu,
720 nir_instr_type_deref,
721 nir_instr_type_call,
722 nir_instr_type_tex,
723 nir_instr_type_intrinsic,
724 nir_instr_type_load_const,
725 nir_instr_type_jump,
726 nir_instr_type_ssa_undef,
727 nir_instr_type_phi,
728 nir_instr_type_parallel_copy,
729 } nir_instr_type;
730
731 typedef struct nir_instr {
732 struct exec_node node;
733 struct nir_block *block;
734 nir_instr_type type;
735
736 /* A temporary for optimization and analysis passes to use for storing
737 * flags. For instance, DCE uses this to store the "dead/live" info.
738 */
739 uint8_t pass_flags;
740
741 /** generic instruction index. */
742 unsigned index;
743 } nir_instr;
744
745 static inline nir_instr *
746 nir_instr_next(nir_instr *instr)
747 {
748 struct exec_node *next = exec_node_get_next(&instr->node);
749 if (exec_node_is_tail_sentinel(next))
750 return NULL;
751 else
752 return exec_node_data(nir_instr, next, node);
753 }
754
755 static inline nir_instr *
756 nir_instr_prev(nir_instr *instr)
757 {
758 struct exec_node *prev = exec_node_get_prev(&instr->node);
759 if (exec_node_is_head_sentinel(prev))
760 return NULL;
761 else
762 return exec_node_data(nir_instr, prev, node);
763 }
764
765 static inline bool
766 nir_instr_is_first(const nir_instr *instr)
767 {
768 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
769 }
770
771 static inline bool
772 nir_instr_is_last(const nir_instr *instr)
773 {
774 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
775 }
776
777 typedef struct nir_ssa_def {
778 /** for debugging only, can be NULL */
779 const char* name;
780
781 /** generic SSA definition index. */
782 unsigned index;
783
784 /** Ordered SSA definition index used by nir_liveness. */
785 unsigned live_index;
786
787 /** Instruction which produces this SSA value. */
788 nir_instr *parent_instr;
789
790 /** set of nir_instrs where this register is used (read from) */
791 struct list_head uses;
792
793 /** set of nir_ifs where this register is used as a condition */
794 struct list_head if_uses;
795
796 uint8_t num_components;
797
798 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
799 uint8_t bit_size;
800
801 /**
802 * True if this SSA value may have different values in different SIMD
803 * invocations of the shader. This is set by nir_divergence_analysis.
804 */
805 bool divergent;
806 } nir_ssa_def;
807
808 struct nir_src;
809
810 typedef struct {
811 nir_register *reg;
812 struct nir_src *indirect; /** < NULL for no indirect offset */
813 unsigned base_offset;
814
815 /* TODO use-def chain goes here */
816 } nir_reg_src;
817
818 typedef struct {
819 nir_instr *parent_instr;
820 struct list_head def_link;
821
822 nir_register *reg;
823 struct nir_src *indirect; /** < NULL for no indirect offset */
824 unsigned base_offset;
825
826 /* TODO def-use chain goes here */
827 } nir_reg_dest;
828
829 struct nir_if;
830
831 typedef struct nir_src {
832 union {
833 /** Instruction that consumes this value as a source. */
834 nir_instr *parent_instr;
835 struct nir_if *parent_if;
836 };
837
838 struct list_head use_link;
839
840 union {
841 nir_reg_src reg;
842 nir_ssa_def *ssa;
843 };
844
845 bool is_ssa;
846 } nir_src;
847
848 static inline nir_src
849 nir_src_init(void)
850 {
851 nir_src src = { { NULL } };
852 return src;
853 }
854
855 #define NIR_SRC_INIT nir_src_init()
856
857 #define nir_foreach_use(src, reg_or_ssa_def) \
858 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
859
860 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
861 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
862
863 #define nir_foreach_if_use(src, reg_or_ssa_def) \
864 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
865
866 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
867 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
868
869 typedef struct {
870 union {
871 nir_reg_dest reg;
872 nir_ssa_def ssa;
873 };
874
875 bool is_ssa;
876 } nir_dest;
877
878 static inline nir_dest
879 nir_dest_init(void)
880 {
881 nir_dest dest = { { { NULL } } };
882 return dest;
883 }
884
885 #define NIR_DEST_INIT nir_dest_init()
886
887 #define nir_foreach_def(dest, reg) \
888 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
889
890 #define nir_foreach_def_safe(dest, reg) \
891 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
892
893 static inline nir_src
894 nir_src_for_ssa(nir_ssa_def *def)
895 {
896 nir_src src = NIR_SRC_INIT;
897
898 src.is_ssa = true;
899 src.ssa = def;
900
901 return src;
902 }
903
904 static inline nir_src
905 nir_src_for_reg(nir_register *reg)
906 {
907 nir_src src = NIR_SRC_INIT;
908
909 src.is_ssa = false;
910 src.reg.reg = reg;
911 src.reg.indirect = NULL;
912 src.reg.base_offset = 0;
913
914 return src;
915 }
916
917 static inline nir_dest
918 nir_dest_for_reg(nir_register *reg)
919 {
920 nir_dest dest = NIR_DEST_INIT;
921
922 dest.reg.reg = reg;
923
924 return dest;
925 }
926
927 static inline unsigned
928 nir_src_bit_size(nir_src src)
929 {
930 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
931 }
932
933 static inline unsigned
934 nir_src_num_components(nir_src src)
935 {
936 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
937 }
938
939 static inline bool
940 nir_src_is_const(nir_src src)
941 {
942 return src.is_ssa &&
943 src.ssa->parent_instr->type == nir_instr_type_load_const;
944 }
945
946 static inline bool
947 nir_src_is_divergent(nir_src src)
948 {
949 assert(src.is_ssa);
950 return src.ssa->divergent;
951 }
952
953 static inline unsigned
954 nir_dest_bit_size(nir_dest dest)
955 {
956 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
957 }
958
959 static inline unsigned
960 nir_dest_num_components(nir_dest dest)
961 {
962 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
963 }
964
965 static inline bool
966 nir_dest_is_divergent(nir_dest dest)
967 {
968 assert(dest.is_ssa);
969 return dest.ssa.divergent;
970 }
971
972 /* Are all components the same, ie. .xxxx */
973 static inline bool
974 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
975 {
976 for (unsigned i = 1; i < nr_comp; i++)
977 if (swiz[i] != swiz[0])
978 return false;
979 return true;
980 }
981
982 /* Are all components sequential, ie. .yzw */
983 static inline bool
984 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
985 {
986 for (unsigned i = 1; i < nr_comp; i++)
987 if (swiz[i] != (swiz[0] + i))
988 return false;
989 return true;
990 }
991
992 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
993 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
994
995 typedef struct {
996 nir_src src;
997
998 /**
999 * \name input modifiers
1000 */
1001 /*@{*/
1002 /**
1003 * For inputs interpreted as floating point, flips the sign bit. For
1004 * inputs interpreted as integers, performs the two's complement negation.
1005 */
1006 bool negate;
1007
1008 /**
1009 * Clears the sign bit for floating point values, and computes the integer
1010 * absolute value for integers. Note that the negate modifier acts after
1011 * the absolute value modifier, therefore if both are set then all inputs
1012 * will become negative.
1013 */
1014 bool abs;
1015 /*@}*/
1016
1017 /**
1018 * For each input component, says which component of the register it is
1019 * chosen from. Note that which elements of the swizzle are used and which
1020 * are ignored are based on the write mask for most opcodes - for example,
1021 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
1022 * a swizzle of {2, x, 1, 0} where x means "don't care."
1023 */
1024 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
1025 } nir_alu_src;
1026
1027 typedef struct {
1028 nir_dest dest;
1029
1030 /**
1031 * \name saturate output modifier
1032 *
1033 * Only valid for opcodes that output floating-point numbers. Clamps the
1034 * output to between 0.0 and 1.0 inclusive.
1035 */
1036
1037 bool saturate;
1038
1039 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
1040 } nir_alu_dest;
1041
1042 /** NIR sized and unsized types
1043 *
1044 * The values in this enum are carefully chosen so that the sized type is
1045 * just the unsized type OR the number of bits.
1046 */
1047 typedef enum PACKED {
1048 nir_type_invalid = 0, /* Not a valid type */
1049 nir_type_int = 2,
1050 nir_type_uint = 4,
1051 nir_type_bool = 6,
1052 nir_type_float = 128,
1053 nir_type_bool1 = 1 | nir_type_bool,
1054 nir_type_bool8 = 8 | nir_type_bool,
1055 nir_type_bool16 = 16 | nir_type_bool,
1056 nir_type_bool32 = 32 | nir_type_bool,
1057 nir_type_int1 = 1 | nir_type_int,
1058 nir_type_int8 = 8 | nir_type_int,
1059 nir_type_int16 = 16 | nir_type_int,
1060 nir_type_int32 = 32 | nir_type_int,
1061 nir_type_int64 = 64 | nir_type_int,
1062 nir_type_uint1 = 1 | nir_type_uint,
1063 nir_type_uint8 = 8 | nir_type_uint,
1064 nir_type_uint16 = 16 | nir_type_uint,
1065 nir_type_uint32 = 32 | nir_type_uint,
1066 nir_type_uint64 = 64 | nir_type_uint,
1067 nir_type_float16 = 16 | nir_type_float,
1068 nir_type_float32 = 32 | nir_type_float,
1069 nir_type_float64 = 64 | nir_type_float,
1070 } nir_alu_type;
1071
1072 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1073 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1074
1075 static inline unsigned
1076 nir_alu_type_get_type_size(nir_alu_type type)
1077 {
1078 return type & NIR_ALU_TYPE_SIZE_MASK;
1079 }
1080
1081 static inline nir_alu_type
1082 nir_alu_type_get_base_type(nir_alu_type type)
1083 {
1084 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1085 }
1086
1087 static inline nir_alu_type
1088 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1089 {
1090 switch (base_type) {
1091 case GLSL_TYPE_BOOL:
1092 return nir_type_bool1;
1093 break;
1094 case GLSL_TYPE_UINT:
1095 return nir_type_uint32;
1096 break;
1097 case GLSL_TYPE_INT:
1098 return nir_type_int32;
1099 break;
1100 case GLSL_TYPE_UINT16:
1101 return nir_type_uint16;
1102 break;
1103 case GLSL_TYPE_INT16:
1104 return nir_type_int16;
1105 break;
1106 case GLSL_TYPE_UINT8:
1107 return nir_type_uint8;
1108 case GLSL_TYPE_INT8:
1109 return nir_type_int8;
1110 case GLSL_TYPE_UINT64:
1111 return nir_type_uint64;
1112 break;
1113 case GLSL_TYPE_INT64:
1114 return nir_type_int64;
1115 break;
1116 case GLSL_TYPE_FLOAT:
1117 return nir_type_float32;
1118 break;
1119 case GLSL_TYPE_FLOAT16:
1120 return nir_type_float16;
1121 break;
1122 case GLSL_TYPE_DOUBLE:
1123 return nir_type_float64;
1124 break;
1125
1126 case GLSL_TYPE_SAMPLER:
1127 case GLSL_TYPE_IMAGE:
1128 case GLSL_TYPE_ATOMIC_UINT:
1129 case GLSL_TYPE_STRUCT:
1130 case GLSL_TYPE_INTERFACE:
1131 case GLSL_TYPE_ARRAY:
1132 case GLSL_TYPE_VOID:
1133 case GLSL_TYPE_SUBROUTINE:
1134 case GLSL_TYPE_FUNCTION:
1135 case GLSL_TYPE_ERROR:
1136 return nir_type_invalid;
1137 }
1138
1139 unreachable("unknown type");
1140 }
1141
1142 static inline nir_alu_type
1143 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1144 {
1145 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1146 }
1147
1148 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1149 nir_rounding_mode rnd);
1150
1151 static inline nir_op
1152 nir_op_vec(unsigned components)
1153 {
1154 switch (components) {
1155 case 1: return nir_op_mov;
1156 case 2: return nir_op_vec2;
1157 case 3: return nir_op_vec3;
1158 case 4: return nir_op_vec4;
1159 case 8: return nir_op_vec8;
1160 case 16: return nir_op_vec16;
1161 default: unreachable("bad component count");
1162 }
1163 }
1164
1165 static inline bool
1166 nir_op_is_vec(nir_op op)
1167 {
1168 switch (op) {
1169 case nir_op_mov:
1170 case nir_op_vec2:
1171 case nir_op_vec3:
1172 case nir_op_vec4:
1173 case nir_op_vec8:
1174 case nir_op_vec16:
1175 return true;
1176 default:
1177 return false;
1178 }
1179 }
1180
1181 static inline bool
1182 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1183 {
1184 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1185 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1186 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1187 }
1188
1189 static inline bool
1190 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1191 {
1192 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1193 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1194 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1195 }
1196
1197 static inline bool
1198 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1199 {
1200 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1201 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1202 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1203 }
1204
1205 static inline bool
1206 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1207 {
1208 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1209 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1210 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1211 }
1212
1213 static inline bool
1214 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1215 {
1216 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1217 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1218 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1219 }
1220
1221 static inline bool
1222 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1223 {
1224 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1225 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1226 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1227 }
1228
1229 static inline bool
1230 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1231 {
1232 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1233 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1234 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1235 }
1236
1237 static inline nir_rounding_mode
1238 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1239 nir_alu_type type)
1240 {
1241 if (nir_alu_type_get_base_type(type) != nir_type_float)
1242 return nir_rounding_mode_undef;
1243
1244 unsigned bit_size = nir_alu_type_get_type_size(type);
1245
1246 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1247 return nir_rounding_mode_rtz;
1248 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1249 return nir_rounding_mode_rtne;
1250 return nir_rounding_mode_undef;
1251 }
1252
1253 static inline bool
1254 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1255 {
1256 bool result =
1257 nir_has_any_rounding_mode_rtne(execution_mode) ||
1258 nir_has_any_rounding_mode_rtz(execution_mode);
1259 return result;
1260 }
1261
1262 typedef enum {
1263 /**
1264 * Operation where the first two sources are commutative.
1265 *
1266 * For 2-source operations, this just mathematical commutativity. Some
1267 * 3-source operations, like ffma, are only commutative in the first two
1268 * sources.
1269 */
1270 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1271 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1272 } nir_op_algebraic_property;
1273
1274 typedef struct {
1275 const char *name;
1276
1277 uint8_t num_inputs;
1278
1279 /**
1280 * The number of components in the output
1281 *
1282 * If non-zero, this is the size of the output and input sizes are
1283 * explicitly given; swizzle and writemask are still in effect, but if
1284 * the output component is masked out, then the input component may
1285 * still be in use.
1286 *
1287 * If zero, the opcode acts in the standard, per-component manner; the
1288 * operation is performed on each component (except the ones that are
1289 * masked out) with the input being taken from the input swizzle for
1290 * that component.
1291 *
1292 * The size of some of the inputs may be given (i.e. non-zero) even
1293 * though output_size is zero; in that case, the inputs with a zero
1294 * size act per-component, while the inputs with non-zero size don't.
1295 */
1296 uint8_t output_size;
1297
1298 /**
1299 * The type of vector that the instruction outputs. Note that the
1300 * staurate modifier is only allowed on outputs with the float type.
1301 */
1302
1303 nir_alu_type output_type;
1304
1305 /**
1306 * The number of components in each input
1307 */
1308 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1309
1310 /**
1311 * The type of vector that each input takes. Note that negate and
1312 * absolute value are only allowed on inputs with int or float type and
1313 * behave differently on the two.
1314 */
1315 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1316
1317 nir_op_algebraic_property algebraic_properties;
1318
1319 /* Whether this represents a numeric conversion opcode */
1320 bool is_conversion;
1321 } nir_op_info;
1322
1323 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1324
1325 typedef struct nir_alu_instr {
1326 nir_instr instr;
1327 nir_op op;
1328
1329 /** Indicates that this ALU instruction generates an exact value
1330 *
1331 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1332 * really equivalent to either. This indicates that the value generated by
1333 * this operation is high-precision and any code transformations that touch
1334 * it must ensure that the resulting value is bit-for-bit identical to the
1335 * original.
1336 */
1337 bool exact:1;
1338
1339 /**
1340 * Indicates that this instruction do not cause wrapping to occur, in the
1341 * form of overflow or underflow.
1342 */
1343 bool no_signed_wrap:1;
1344 bool no_unsigned_wrap:1;
1345
1346 nir_alu_dest dest;
1347 nir_alu_src src[];
1348 } nir_alu_instr;
1349
1350 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1351 nir_alu_instr *instr);
1352 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1353 nir_alu_instr *instr);
1354
1355 /* is this source channel used? */
1356 static inline bool
1357 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1358 unsigned channel)
1359 {
1360 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1361 return channel < nir_op_infos[instr->op].input_sizes[src];
1362
1363 return (instr->dest.write_mask >> channel) & 1;
1364 }
1365
1366 static inline nir_component_mask_t
1367 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1368 {
1369 nir_component_mask_t read_mask = 0;
1370 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1371 if (!nir_alu_instr_channel_used(instr, src, c))
1372 continue;
1373
1374 read_mask |= (1 << instr->src[src].swizzle[c]);
1375 }
1376 return read_mask;
1377 }
1378
1379 /**
1380 * Get the number of channels used for a source
1381 */
1382 static inline unsigned
1383 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1384 {
1385 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1386 return nir_op_infos[instr->op].input_sizes[src];
1387
1388 return nir_dest_num_components(instr->dest.dest);
1389 }
1390
1391 static inline bool
1392 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1393 {
1394 switch (instr->op) {
1395 case nir_op_flt:
1396 case nir_op_fge:
1397 case nir_op_feq:
1398 case nir_op_fneu:
1399 case nir_op_ilt:
1400 case nir_op_ult:
1401 case nir_op_ige:
1402 case nir_op_uge:
1403 case nir_op_ieq:
1404 case nir_op_ine:
1405 case nir_op_i2b1:
1406 case nir_op_f2b1:
1407 case nir_op_inot:
1408 return true;
1409 default:
1410 return false;
1411 }
1412 }
1413
1414 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1415 nir_alu_type full_type);
1416
1417 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1418 unsigned src1, unsigned src2);
1419
1420 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1421 const nir_alu_instr *alu2,
1422 unsigned src1, unsigned src2);
1423
1424 typedef enum {
1425 nir_deref_type_var,
1426 nir_deref_type_array,
1427 nir_deref_type_array_wildcard,
1428 nir_deref_type_ptr_as_array,
1429 nir_deref_type_struct,
1430 nir_deref_type_cast,
1431 } nir_deref_type;
1432
1433 typedef struct {
1434 nir_instr instr;
1435
1436 /** The type of this deref instruction */
1437 nir_deref_type deref_type;
1438
1439 /** The mode of the underlying variable */
1440 nir_variable_mode mode;
1441
1442 /** The dereferenced type of the resulting pointer value */
1443 const struct glsl_type *type;
1444
1445 union {
1446 /** Variable being dereferenced if deref_type is a deref_var */
1447 nir_variable *var;
1448
1449 /** Parent deref if deref_type is not deref_var */
1450 nir_src parent;
1451 };
1452
1453 /** Additional deref parameters */
1454 union {
1455 struct {
1456 nir_src index;
1457 } arr;
1458
1459 struct {
1460 unsigned index;
1461 } strct;
1462
1463 struct {
1464 unsigned ptr_stride;
1465 unsigned align_mul;
1466 unsigned align_offset;
1467 } cast;
1468 };
1469
1470 /** Destination to store the resulting "pointer" */
1471 nir_dest dest;
1472 } nir_deref_instr;
1473
1474 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1475
1476 static inline nir_deref_instr *
1477 nir_deref_instr_parent(const nir_deref_instr *instr)
1478 {
1479 if (instr->deref_type == nir_deref_type_var)
1480 return NULL;
1481 else
1482 return nir_src_as_deref(instr->parent);
1483 }
1484
1485 static inline nir_variable *
1486 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1487 {
1488 while (instr->deref_type != nir_deref_type_var) {
1489 if (instr->deref_type == nir_deref_type_cast)
1490 return NULL;
1491
1492 instr = nir_deref_instr_parent(instr);
1493 }
1494
1495 return instr->var;
1496 }
1497
1498 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1499 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1500 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1501
1502 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1503
1504 unsigned nir_deref_instr_array_stride(nir_deref_instr *instr);
1505
1506 typedef struct {
1507 nir_instr instr;
1508
1509 struct nir_function *callee;
1510
1511 unsigned num_params;
1512 nir_src params[];
1513 } nir_call_instr;
1514
1515 #include "nir_intrinsics.h"
1516
1517 #define NIR_INTRINSIC_MAX_CONST_INDEX 5
1518
1519 /** Represents an intrinsic
1520 *
1521 * An intrinsic is an instruction type for handling things that are
1522 * more-or-less regular operations but don't just consume and produce SSA
1523 * values like ALU operations do. Intrinsics are not for things that have
1524 * special semantic meaning such as phi nodes and parallel copies.
1525 * Examples of intrinsics include variable load/store operations, system
1526 * value loads, and the like. Even though texturing more-or-less falls
1527 * under this category, texturing is its own instruction type because
1528 * trying to represent texturing with intrinsics would lead to a
1529 * combinatorial explosion of intrinsic opcodes.
1530 *
1531 * By having a single instruction type for handling a lot of different
1532 * cases, optimization passes can look for intrinsics and, for the most
1533 * part, completely ignore them. Each intrinsic type also has a few
1534 * possible flags that govern whether or not they can be reordered or
1535 * eliminated. That way passes like dead code elimination can still work
1536 * on intrisics without understanding the meaning of each.
1537 *
1538 * Each intrinsic has some number of constant indices, some number of
1539 * variables, and some number of sources. What these sources, variables,
1540 * and indices mean depends on the intrinsic and is documented with the
1541 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1542 * instructions are the only types of instruction that can operate on
1543 * variables.
1544 */
1545 typedef struct {
1546 nir_instr instr;
1547
1548 nir_intrinsic_op intrinsic;
1549
1550 nir_dest dest;
1551
1552 /** number of components if this is a vectorized intrinsic
1553 *
1554 * Similarly to ALU operations, some intrinsics are vectorized.
1555 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1556 * For vectorized intrinsics, the num_components field specifies the
1557 * number of destination components and the number of source components
1558 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1559 */
1560 uint8_t num_components;
1561
1562 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1563
1564 nir_src src[];
1565 } nir_intrinsic_instr;
1566
1567 static inline nir_variable *
1568 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1569 {
1570 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1571 }
1572
1573 typedef enum {
1574 /* Memory ordering. */
1575 NIR_MEMORY_ACQUIRE = 1 << 0,
1576 NIR_MEMORY_RELEASE = 1 << 1,
1577 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1578
1579 /* Memory visibility operations. */
1580 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1581 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1582 } nir_memory_semantics;
1583
1584 typedef enum {
1585 NIR_SCOPE_NONE,
1586 NIR_SCOPE_INVOCATION,
1587 NIR_SCOPE_SUBGROUP,
1588 NIR_SCOPE_WORKGROUP,
1589 NIR_SCOPE_QUEUE_FAMILY,
1590 NIR_SCOPE_DEVICE,
1591 } nir_scope;
1592
1593 /**
1594 * \name NIR intrinsics semantic flags
1595 *
1596 * information about what the compiler can do with the intrinsics.
1597 *
1598 * \sa nir_intrinsic_info::flags
1599 */
1600 typedef enum {
1601 /**
1602 * whether the intrinsic can be safely eliminated if none of its output
1603 * value is not being used.
1604 */
1605 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1606
1607 /**
1608 * Whether the intrinsic can be reordered with respect to any other
1609 * intrinsic, i.e. whether the only reordering dependencies of the
1610 * intrinsic are due to the register reads/writes.
1611 */
1612 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1613 } nir_intrinsic_semantic_flag;
1614
1615 /**
1616 * \name NIR intrinsics const-index flag
1617 *
1618 * Indicates the usage of a const_index slot.
1619 *
1620 * \sa nir_intrinsic_info::index_map
1621 */
1622 typedef enum {
1623 /**
1624 * Generally instructions that take a offset src argument, can encode
1625 * a constant 'base' value which is added to the offset.
1626 */
1627 NIR_INTRINSIC_BASE = 1,
1628
1629 /**
1630 * For store instructions, a writemask for the store.
1631 */
1632 NIR_INTRINSIC_WRMASK,
1633
1634 /**
1635 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1636 */
1637 NIR_INTRINSIC_STREAM_ID,
1638
1639 /**
1640 * The clip-plane id for load_user_clip_plane intrinsic.
1641 */
1642 NIR_INTRINSIC_UCP_ID,
1643
1644 /**
1645 * The amount of data, starting from BASE, that this instruction may
1646 * access. This is used to provide bounds if the offset is not constant.
1647 */
1648 NIR_INTRINSIC_RANGE,
1649
1650 /**
1651 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1652 */
1653 NIR_INTRINSIC_DESC_SET,
1654
1655 /**
1656 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1657 */
1658 NIR_INTRINSIC_BINDING,
1659
1660 /**
1661 * Component offset.
1662 */
1663 NIR_INTRINSIC_COMPONENT,
1664
1665 /**
1666 * Interpolation mode (only meaningful for FS inputs).
1667 */
1668 NIR_INTRINSIC_INTERP_MODE,
1669
1670 /**
1671 * A binary nir_op to use when performing a reduction or scan operation
1672 */
1673 NIR_INTRINSIC_REDUCTION_OP,
1674
1675 /**
1676 * Cluster size for reduction operations
1677 */
1678 NIR_INTRINSIC_CLUSTER_SIZE,
1679
1680 /**
1681 * Parameter index for a load_param intrinsic
1682 */
1683 NIR_INTRINSIC_PARAM_IDX,
1684
1685 /**
1686 * Image dimensionality for image intrinsics
1687 *
1688 * One of GLSL_SAMPLER_DIM_*
1689 */
1690 NIR_INTRINSIC_IMAGE_DIM,
1691
1692 /**
1693 * Non-zero if we are accessing an array image
1694 */
1695 NIR_INTRINSIC_IMAGE_ARRAY,
1696
1697 /**
1698 * Image format for image intrinsics
1699 */
1700 NIR_INTRINSIC_FORMAT,
1701
1702 /**
1703 * Access qualifiers for image and memory access intrinsics
1704 */
1705 NIR_INTRINSIC_ACCESS,
1706
1707 /**
1708 * Alignment for offsets and addresses
1709 *
1710 * These two parameters, specify an alignment in terms of a multiplier and
1711 * an offset. The offset or address parameter X of the intrinsic is
1712 * guaranteed to satisfy the following:
1713 *
1714 * (X - align_offset) % align_mul == 0
1715 */
1716 NIR_INTRINSIC_ALIGN_MUL,
1717 NIR_INTRINSIC_ALIGN_OFFSET,
1718
1719 /**
1720 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1721 */
1722 NIR_INTRINSIC_DESC_TYPE,
1723
1724 /**
1725 * The nir_alu_type of a uniform/input/output
1726 */
1727 NIR_INTRINSIC_TYPE,
1728
1729 /**
1730 * The swizzle mask for the instructions
1731 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1732 */
1733 NIR_INTRINSIC_SWIZZLE_MASK,
1734
1735 /* Separate source/dest access flags for copies */
1736 NIR_INTRINSIC_SRC_ACCESS,
1737 NIR_INTRINSIC_DST_ACCESS,
1738
1739 /* Driver location for nir_load_patch_location_ir3 */
1740 NIR_INTRINSIC_DRIVER_LOCATION,
1741
1742 /**
1743 * Mask of nir_memory_semantics, includes ordering and visibility.
1744 */
1745 NIR_INTRINSIC_MEMORY_SEMANTICS,
1746
1747 /**
1748 * Mask of nir_variable_modes affected by the memory operation.
1749 */
1750 NIR_INTRINSIC_MEMORY_MODES,
1751
1752 /**
1753 * Value of nir_scope.
1754 */
1755 NIR_INTRINSIC_MEMORY_SCOPE,
1756
1757 /**
1758 * Value of nir_scope.
1759 */
1760 NIR_INTRINSIC_EXECUTION_SCOPE,
1761
1762 /**
1763 * Value of nir_io_semantics.
1764 */
1765 NIR_INTRINSIC_IO_SEMANTICS,
1766
1767 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1768
1769 } nir_intrinsic_index_flag;
1770
1771 typedef struct {
1772 unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
1773 unsigned num_slots:6; /* max 32, may be pessimistic with const indexing */
1774 unsigned dual_source_blend_index:1;
1775 unsigned fb_fetch_output:1; /* for GL_KHR_blend_equation_advanced */
1776 unsigned gs_streams:8; /* xxyyzzww: 2-bit stream index for each component */
1777 unsigned _pad:9;
1778 } nir_io_semantics;
1779
1780 #define NIR_INTRINSIC_MAX_INPUTS 5
1781
1782 typedef struct {
1783 const char *name;
1784
1785 uint8_t num_srcs; /** < number of register/SSA inputs */
1786
1787 /** number of components of each input register
1788 *
1789 * If this value is 0, the number of components is given by the
1790 * num_components field of nir_intrinsic_instr. If this value is -1, the
1791 * intrinsic consumes however many components are provided and it is not
1792 * validated at all.
1793 */
1794 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1795
1796 bool has_dest;
1797
1798 /** number of components of the output register
1799 *
1800 * If this value is 0, the number of components is given by the
1801 * num_components field of nir_intrinsic_instr.
1802 */
1803 uint8_t dest_components;
1804
1805 /** bitfield of legal bit sizes */
1806 uint8_t dest_bit_sizes;
1807
1808 /** the number of constant indices used by the intrinsic */
1809 uint8_t num_indices;
1810
1811 /** indicates the usage of intr->const_index[n] */
1812 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1813
1814 /** semantic flags for calls to this intrinsic */
1815 nir_intrinsic_semantic_flag flags;
1816 } nir_intrinsic_info;
1817
1818 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1819
1820 static inline unsigned
1821 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1822 {
1823 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1824 assert(srcn < info->num_srcs);
1825 if (info->src_components[srcn] > 0)
1826 return info->src_components[srcn];
1827 else if (info->src_components[srcn] == 0)
1828 return intr->num_components;
1829 else
1830 return nir_src_num_components(intr->src[srcn]);
1831 }
1832
1833 static inline unsigned
1834 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1835 {
1836 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1837 if (!info->has_dest)
1838 return 0;
1839 else if (info->dest_components)
1840 return info->dest_components;
1841 else
1842 return intr->num_components;
1843 }
1844
1845 /**
1846 * Helper to copy const_index[] from src to dst, without assuming they
1847 * match in order.
1848 */
1849 static inline void
1850 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1851 {
1852 if (src->intrinsic == dst->intrinsic) {
1853 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1854 return;
1855 }
1856
1857 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1858 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1859
1860 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1861 if (src_info->index_map[i] == 0)
1862 continue;
1863
1864 /* require that dst instruction also uses the same const_index[]: */
1865 assert(dst_info->index_map[i] > 0);
1866
1867 dst->const_index[dst_info->index_map[i] - 1] =
1868 src->const_index[src_info->index_map[i] - 1];
1869 }
1870 }
1871
1872 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1873 static inline type \
1874 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1875 { \
1876 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1877 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1878 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1879 } \
1880 static inline void \
1881 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1882 { \
1883 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1884 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1885 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1886 } \
1887 static inline bool \
1888 nir_intrinsic_has_##name(nir_intrinsic_instr *instr) \
1889 { \
1890 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1891 return info->index_map[NIR_INTRINSIC_##flag] > 0; \
1892 }
1893
1894 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1895 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1896 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1897 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1898 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1899 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1900 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1901 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1902 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1903 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1904 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1905 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1906 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1907 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1908 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1909 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1910 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1911 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1912 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1913 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1914 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1915 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1916 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1917 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1918 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1919 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1920 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1921 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1922
1923 static inline void
1924 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1925 unsigned align_mul, unsigned align_offset)
1926 {
1927 assert(util_is_power_of_two_nonzero(align_mul));
1928 assert(align_offset < align_mul);
1929 nir_intrinsic_set_align_mul(intrin, align_mul);
1930 nir_intrinsic_set_align_offset(intrin, align_offset);
1931 }
1932
1933 /** Returns a simple alignment for a load/store intrinsic offset
1934 *
1935 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1936 * and ALIGN_OFFSET parameters, this helper takes both into account and
1937 * provides a single simple alignment parameter. The offset X is guaranteed
1938 * to satisfy X % align == 0.
1939 */
1940 static inline unsigned
1941 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1942 {
1943 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1944 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1945 assert(align_offset < align_mul);
1946 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1947 }
1948
1949 static inline void
1950 nir_intrinsic_set_io_semantics(nir_intrinsic_instr *intrin,
1951 nir_io_semantics semantics)
1952 {
1953 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1954 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1955 STATIC_ASSERT(sizeof(nir_io_semantics) == sizeof(intrin->const_index[0]));
1956 semantics._pad = 0; /* clear padding bits */
1957 memcpy(&intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1958 &semantics, sizeof(semantics));
1959 }
1960
1961 static inline nir_io_semantics
1962 nir_intrinsic_io_semantics(const nir_intrinsic_instr *intrin)
1963 {
1964 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1965 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1966 nir_io_semantics semantics;
1967 memcpy(&semantics,
1968 &intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1969 sizeof(semantics));
1970 return semantics;
1971 }
1972
1973 unsigned
1974 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1975
1976 /* Converts a image_deref_* intrinsic into a image_* one */
1977 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1978 nir_ssa_def *handle, bool bindless);
1979
1980 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1981 static inline bool
1982 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1983 {
1984 if (instr->intrinsic == nir_intrinsic_load_deref ||
1985 instr->intrinsic == nir_intrinsic_load_ssbo ||
1986 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1987 instr->intrinsic == nir_intrinsic_image_deref_load ||
1988 instr->intrinsic == nir_intrinsic_image_load) {
1989 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1990 } else {
1991 const nir_intrinsic_info *info =
1992 &nir_intrinsic_infos[instr->intrinsic];
1993 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1994 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1995 }
1996 }
1997
1998 /**
1999 * \group texture information
2000 *
2001 * This gives semantic information about textures which is useful to the
2002 * frontend, the backend, and lowering passes, but not the optimizer.
2003 */
2004
2005 typedef enum {
2006 nir_tex_src_coord,
2007 nir_tex_src_projector,
2008 nir_tex_src_comparator, /* shadow comparator */
2009 nir_tex_src_offset,
2010 nir_tex_src_bias,
2011 nir_tex_src_lod,
2012 nir_tex_src_min_lod,
2013 nir_tex_src_ms_index, /* MSAA sample index */
2014 nir_tex_src_ms_mcs, /* MSAA compression value */
2015 nir_tex_src_ddx,
2016 nir_tex_src_ddy,
2017 nir_tex_src_texture_deref, /* < deref pointing to the texture */
2018 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
2019 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
2020 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
2021 nir_tex_src_texture_handle, /* < bindless texture handle */
2022 nir_tex_src_sampler_handle, /* < bindless sampler handle */
2023 nir_tex_src_plane, /* < selects plane for planar textures */
2024 nir_num_tex_src_types
2025 } nir_tex_src_type;
2026
2027 typedef struct {
2028 nir_src src;
2029 nir_tex_src_type src_type;
2030 } nir_tex_src;
2031
2032 typedef enum {
2033 nir_texop_tex, /**< Regular texture look-up */
2034 nir_texop_txb, /**< Texture look-up with LOD bias */
2035 nir_texop_txl, /**< Texture look-up with explicit LOD */
2036 nir_texop_txd, /**< Texture look-up with partial derivatives */
2037 nir_texop_txf, /**< Texel fetch with explicit LOD */
2038 nir_texop_txf_ms, /**< Multisample texture fetch */
2039 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
2040 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
2041 nir_texop_txs, /**< Texture size */
2042 nir_texop_lod, /**< Texture lod query */
2043 nir_texop_tg4, /**< Texture gather */
2044 nir_texop_query_levels, /**< Texture levels query */
2045 nir_texop_texture_samples, /**< Texture samples query */
2046 nir_texop_samples_identical, /**< Query whether all samples are definitely
2047 * identical.
2048 */
2049 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
2050 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
2051 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
2052 } nir_texop;
2053
2054 typedef struct {
2055 nir_instr instr;
2056
2057 enum glsl_sampler_dim sampler_dim;
2058 nir_alu_type dest_type;
2059
2060 nir_texop op;
2061 nir_dest dest;
2062 nir_tex_src *src;
2063 unsigned num_srcs, coord_components;
2064 bool is_array, is_shadow;
2065
2066 /**
2067 * If is_shadow is true, whether this is the old-style shadow that outputs 4
2068 * components or the new-style shadow that outputs 1 component.
2069 */
2070 bool is_new_style_shadow;
2071
2072 /* gather component selector */
2073 unsigned component : 2;
2074
2075 /* gather offsets */
2076 int8_t tg4_offsets[4][2];
2077
2078 /* True if the texture index or handle is not dynamically uniform */
2079 bool texture_non_uniform;
2080
2081 /* True if the sampler index or handle is not dynamically uniform */
2082 bool sampler_non_uniform;
2083
2084 /** The texture index
2085 *
2086 * If this texture instruction has a nir_tex_src_texture_offset source,
2087 * then the texture index is given by texture_index + texture_offset.
2088 */
2089 unsigned texture_index;
2090
2091 /** The sampler index
2092 *
2093 * The following operations do not require a sampler and, as such, this
2094 * field should be ignored:
2095 * - nir_texop_txf
2096 * - nir_texop_txf_ms
2097 * - nir_texop_txs
2098 * - nir_texop_lod
2099 * - nir_texop_query_levels
2100 * - nir_texop_texture_samples
2101 * - nir_texop_samples_identical
2102 *
2103 * If this texture instruction has a nir_tex_src_sampler_offset source,
2104 * then the sampler index is given by sampler_index + sampler_offset.
2105 */
2106 unsigned sampler_index;
2107 } nir_tex_instr;
2108
2109 /*
2110 * Returns true if the texture operation requires a sampler as a general rule,
2111 * see the documentation of sampler_index.
2112 *
2113 * Note that the specific hw/driver backend could require to a sampler
2114 * object/configuration packet in any case, for some other reason.
2115 */
2116 static inline bool
2117 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2118 {
2119 switch (instr->op) {
2120 case nir_texop_txf:
2121 case nir_texop_txf_ms:
2122 case nir_texop_txs:
2123 case nir_texop_lod:
2124 case nir_texop_query_levels:
2125 case nir_texop_texture_samples:
2126 case nir_texop_samples_identical:
2127 return false;
2128 default:
2129 return true;
2130 }
2131 }
2132
2133 static inline unsigned
2134 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2135 {
2136 switch (instr->op) {
2137 case nir_texop_txs: {
2138 unsigned ret;
2139 switch (instr->sampler_dim) {
2140 case GLSL_SAMPLER_DIM_1D:
2141 case GLSL_SAMPLER_DIM_BUF:
2142 ret = 1;
2143 break;
2144 case GLSL_SAMPLER_DIM_2D:
2145 case GLSL_SAMPLER_DIM_CUBE:
2146 case GLSL_SAMPLER_DIM_MS:
2147 case GLSL_SAMPLER_DIM_RECT:
2148 case GLSL_SAMPLER_DIM_EXTERNAL:
2149 case GLSL_SAMPLER_DIM_SUBPASS:
2150 ret = 2;
2151 break;
2152 case GLSL_SAMPLER_DIM_3D:
2153 ret = 3;
2154 break;
2155 default:
2156 unreachable("not reached");
2157 }
2158 if (instr->is_array)
2159 ret++;
2160 return ret;
2161 }
2162
2163 case nir_texop_lod:
2164 return 2;
2165
2166 case nir_texop_texture_samples:
2167 case nir_texop_query_levels:
2168 case nir_texop_samples_identical:
2169 case nir_texop_fragment_mask_fetch:
2170 return 1;
2171
2172 default:
2173 if (instr->is_shadow && instr->is_new_style_shadow)
2174 return 1;
2175
2176 return 4;
2177 }
2178 }
2179
2180 /* Returns true if this texture operation queries something about the texture
2181 * rather than actually sampling it.
2182 */
2183 static inline bool
2184 nir_tex_instr_is_query(const nir_tex_instr *instr)
2185 {
2186 switch (instr->op) {
2187 case nir_texop_txs:
2188 case nir_texop_lod:
2189 case nir_texop_texture_samples:
2190 case nir_texop_query_levels:
2191 case nir_texop_txf_ms_mcs:
2192 return true;
2193 case nir_texop_tex:
2194 case nir_texop_txb:
2195 case nir_texop_txl:
2196 case nir_texop_txd:
2197 case nir_texop_txf:
2198 case nir_texop_txf_ms:
2199 case nir_texop_txf_ms_fb:
2200 case nir_texop_tg4:
2201 return false;
2202 default:
2203 unreachable("Invalid texture opcode");
2204 }
2205 }
2206
2207 static inline bool
2208 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2209 {
2210 switch (instr->op) {
2211 case nir_texop_tex:
2212 case nir_texop_txb:
2213 case nir_texop_lod:
2214 return true;
2215 default:
2216 return false;
2217 }
2218 }
2219
2220 static inline nir_alu_type
2221 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2222 {
2223 switch (instr->src[src].src_type) {
2224 case nir_tex_src_coord:
2225 switch (instr->op) {
2226 case nir_texop_txf:
2227 case nir_texop_txf_ms:
2228 case nir_texop_txf_ms_fb:
2229 case nir_texop_txf_ms_mcs:
2230 case nir_texop_samples_identical:
2231 return nir_type_int;
2232
2233 default:
2234 return nir_type_float;
2235 }
2236
2237 case nir_tex_src_lod:
2238 switch (instr->op) {
2239 case nir_texop_txs:
2240 case nir_texop_txf:
2241 return nir_type_int;
2242
2243 default:
2244 return nir_type_float;
2245 }
2246
2247 case nir_tex_src_projector:
2248 case nir_tex_src_comparator:
2249 case nir_tex_src_bias:
2250 case nir_tex_src_min_lod:
2251 case nir_tex_src_ddx:
2252 case nir_tex_src_ddy:
2253 return nir_type_float;
2254
2255 case nir_tex_src_offset:
2256 case nir_tex_src_ms_index:
2257 case nir_tex_src_plane:
2258 return nir_type_int;
2259
2260 case nir_tex_src_ms_mcs:
2261 case nir_tex_src_texture_deref:
2262 case nir_tex_src_sampler_deref:
2263 case nir_tex_src_texture_offset:
2264 case nir_tex_src_sampler_offset:
2265 case nir_tex_src_texture_handle:
2266 case nir_tex_src_sampler_handle:
2267 return nir_type_uint;
2268
2269 case nir_num_tex_src_types:
2270 unreachable("nir_num_tex_src_types is not a valid source type");
2271 }
2272
2273 unreachable("Invalid texture source type");
2274 }
2275
2276 static inline unsigned
2277 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2278 {
2279 if (instr->src[src].src_type == nir_tex_src_coord)
2280 return instr->coord_components;
2281
2282 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2283 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2284 return 4;
2285
2286 if (instr->src[src].src_type == nir_tex_src_ddx ||
2287 instr->src[src].src_type == nir_tex_src_ddy) {
2288 if (instr->is_array)
2289 return instr->coord_components - 1;
2290 else
2291 return instr->coord_components;
2292 }
2293
2294 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2295 * the offset, since a cube maps to a single face.
2296 */
2297 if (instr->src[src].src_type == nir_tex_src_offset) {
2298 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2299 return 2;
2300 else if (instr->is_array)
2301 return instr->coord_components - 1;
2302 else
2303 return instr->coord_components;
2304 }
2305
2306 return 1;
2307 }
2308
2309 static inline int
2310 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2311 {
2312 for (unsigned i = 0; i < instr->num_srcs; i++)
2313 if (instr->src[i].src_type == type)
2314 return (int) i;
2315
2316 return -1;
2317 }
2318
2319 void nir_tex_instr_add_src(nir_tex_instr *tex,
2320 nir_tex_src_type src_type,
2321 nir_src src);
2322
2323 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2324
2325 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2326
2327 typedef struct {
2328 nir_instr instr;
2329
2330 nir_ssa_def def;
2331
2332 nir_const_value value[];
2333 } nir_load_const_instr;
2334
2335 typedef enum {
2336 /** Return from a function
2337 *
2338 * This instruction is a classic function return. It jumps to
2339 * nir_function_impl::end_block. No return value is provided in this
2340 * instruction. Instead, the function is expected to write any return
2341 * data to a deref passed in from the caller.
2342 */
2343 nir_jump_return,
2344
2345 /** Break out of the inner-most loop
2346 *
2347 * This has the same semantics as C's "break" statement.
2348 */
2349 nir_jump_break,
2350
2351 /** Jump back to the top of the inner-most loop
2352 *
2353 * This has the same semantics as C's "continue" statement assuming that a
2354 * NIR loop is implemented as "while (1) { body }".
2355 */
2356 nir_jump_continue,
2357
2358 /** Jumps for unstructured CFG.
2359 *
2360 * As within an unstructured CFG we can't rely on block ordering we need to
2361 * place explicit jumps at the end of every block.
2362 */
2363 nir_jump_goto,
2364 nir_jump_goto_if,
2365 } nir_jump_type;
2366
2367 typedef struct {
2368 nir_instr instr;
2369 nir_jump_type type;
2370 nir_src condition;
2371 struct nir_block *target;
2372 struct nir_block *else_target;
2373 } nir_jump_instr;
2374
2375 /* creates a new SSA variable in an undefined state */
2376
2377 typedef struct {
2378 nir_instr instr;
2379 nir_ssa_def def;
2380 } nir_ssa_undef_instr;
2381
2382 typedef struct {
2383 struct exec_node node;
2384
2385 /* The predecessor block corresponding to this source */
2386 struct nir_block *pred;
2387
2388 nir_src src;
2389 } nir_phi_src;
2390
2391 #define nir_foreach_phi_src(phi_src, phi) \
2392 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2393 #define nir_foreach_phi_src_safe(phi_src, phi) \
2394 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2395
2396 typedef struct {
2397 nir_instr instr;
2398
2399 struct exec_list srcs; /** < list of nir_phi_src */
2400
2401 nir_dest dest;
2402 } nir_phi_instr;
2403
2404 typedef struct {
2405 struct exec_node node;
2406 nir_src src;
2407 nir_dest dest;
2408 } nir_parallel_copy_entry;
2409
2410 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2411 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2412
2413 typedef struct {
2414 nir_instr instr;
2415
2416 /* A list of nir_parallel_copy_entrys. The sources of all of the
2417 * entries are copied to the corresponding destinations "in parallel".
2418 * In other words, if we have two entries: a -> b and b -> a, the values
2419 * get swapped.
2420 */
2421 struct exec_list entries;
2422 } nir_parallel_copy_instr;
2423
2424 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2425 type, nir_instr_type_alu)
2426 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2427 type, nir_instr_type_deref)
2428 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2429 type, nir_instr_type_call)
2430 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2431 type, nir_instr_type_jump)
2432 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2433 type, nir_instr_type_tex)
2434 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2435 type, nir_instr_type_intrinsic)
2436 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2437 type, nir_instr_type_load_const)
2438 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2439 type, nir_instr_type_ssa_undef)
2440 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2441 type, nir_instr_type_phi)
2442 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2443 nir_parallel_copy_instr, instr,
2444 type, nir_instr_type_parallel_copy)
2445
2446
2447 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2448 static inline type \
2449 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2450 { \
2451 assert(nir_src_is_const(src)); \
2452 nir_load_const_instr *load = \
2453 nir_instr_as_load_const(src.ssa->parent_instr); \
2454 assert(comp < load->def.num_components); \
2455 return nir_const_value_as_##suffix(load->value[comp], \
2456 load->def.bit_size); \
2457 } \
2458 \
2459 static inline type \
2460 nir_src_as_##suffix(nir_src src) \
2461 { \
2462 assert(nir_src_num_components(src) == 1); \
2463 return nir_src_comp_as_##suffix(src, 0); \
2464 }
2465
2466 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2467 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2468 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2469 NIR_DEFINE_SRC_AS_CONST(double, float)
2470
2471 #undef NIR_DEFINE_SRC_AS_CONST
2472
2473
2474 typedef struct {
2475 nir_ssa_def *def;
2476 unsigned comp;
2477 } nir_ssa_scalar;
2478
2479 static inline bool
2480 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2481 {
2482 return s.def->parent_instr->type == nir_instr_type_load_const;
2483 }
2484
2485 static inline nir_const_value
2486 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2487 {
2488 assert(s.comp < s.def->num_components);
2489 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2490 return load->value[s.comp];
2491 }
2492
2493 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2494 static inline type \
2495 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2496 { \
2497 return nir_const_value_as_##suffix( \
2498 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2499 }
2500
2501 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2502 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2503 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2504 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2505
2506 #undef NIR_DEFINE_SCALAR_AS_CONST
2507
2508 static inline bool
2509 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2510 {
2511 return s.def->parent_instr->type == nir_instr_type_alu;
2512 }
2513
2514 static inline nir_op
2515 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2516 {
2517 return nir_instr_as_alu(s.def->parent_instr)->op;
2518 }
2519
2520 static inline nir_ssa_scalar
2521 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2522 {
2523 nir_ssa_scalar out = { NULL, 0 };
2524
2525 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2526 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2527
2528 /* Our component must be written */
2529 assert(s.comp < s.def->num_components);
2530 assert(alu->dest.write_mask & (1u << s.comp));
2531
2532 assert(alu->src[alu_src_idx].src.is_ssa);
2533 out.def = alu->src[alu_src_idx].src.ssa;
2534
2535 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2536 /* The ALU src is unsized so the source component follows the
2537 * destination component.
2538 */
2539 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2540 } else {
2541 /* This is a sized source so all source components work together to
2542 * produce all the destination components. Since we need to return a
2543 * scalar, this only works if the source is a scalar.
2544 */
2545 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2546 out.comp = alu->src[alu_src_idx].swizzle[0];
2547 }
2548 assert(out.comp < out.def->num_components);
2549
2550 return out;
2551 }
2552
2553
2554 /*
2555 * Control flow
2556 *
2557 * Control flow consists of a tree of control flow nodes, which include
2558 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2559 * instructions that always run start-to-finish. Each basic block also keeps
2560 * track of its successors (blocks which may run immediately after the current
2561 * block) and predecessors (blocks which could have run immediately before the
2562 * current block). Each function also has a start block and an end block which
2563 * all return statements point to (which is always empty). Together, all the
2564 * blocks with their predecessors and successors make up the control flow
2565 * graph (CFG) of the function. There are helpers that modify the tree of
2566 * control flow nodes while modifying the CFG appropriately; these should be
2567 * used instead of modifying the tree directly.
2568 */
2569
2570 typedef enum {
2571 nir_cf_node_block,
2572 nir_cf_node_if,
2573 nir_cf_node_loop,
2574 nir_cf_node_function
2575 } nir_cf_node_type;
2576
2577 typedef struct nir_cf_node {
2578 struct exec_node node;
2579 nir_cf_node_type type;
2580 struct nir_cf_node *parent;
2581 } nir_cf_node;
2582
2583 typedef struct nir_block {
2584 nir_cf_node cf_node;
2585
2586 struct exec_list instr_list; /** < list of nir_instr */
2587
2588 /** generic block index; generated by nir_index_blocks */
2589 unsigned index;
2590
2591 /*
2592 * Each block can only have up to 2 successors, so we put them in a simple
2593 * array - no need for anything more complicated.
2594 */
2595 struct nir_block *successors[2];
2596
2597 /* Set of nir_block predecessors in the CFG */
2598 struct set *predecessors;
2599
2600 /*
2601 * this node's immediate dominator in the dominance tree - set to NULL for
2602 * the start block.
2603 */
2604 struct nir_block *imm_dom;
2605
2606 /* This node's children in the dominance tree */
2607 unsigned num_dom_children;
2608 struct nir_block **dom_children;
2609
2610 /* Set of nir_blocks on the dominance frontier of this block */
2611 struct set *dom_frontier;
2612
2613 /*
2614 * These two indices have the property that dom_{pre,post}_index for each
2615 * child of this block in the dominance tree will always be between
2616 * dom_pre_index and dom_post_index for this block, which makes testing if
2617 * a given block is dominated by another block an O(1) operation.
2618 */
2619 int16_t dom_pre_index, dom_post_index;
2620
2621 /* SSA def live in and out for this block; used for liveness analysis.
2622 * Indexed by ssa_def->index
2623 */
2624 BITSET_WORD *live_in;
2625 BITSET_WORD *live_out;
2626 } nir_block;
2627
2628 static inline bool
2629 nir_block_is_reachable(nir_block *b)
2630 {
2631 /* See also nir_block_dominates */
2632 return b->dom_post_index != -1;
2633 }
2634
2635 static inline nir_instr *
2636 nir_block_first_instr(nir_block *block)
2637 {
2638 struct exec_node *head = exec_list_get_head(&block->instr_list);
2639 return exec_node_data(nir_instr, head, node);
2640 }
2641
2642 static inline nir_instr *
2643 nir_block_last_instr(nir_block *block)
2644 {
2645 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2646 return exec_node_data(nir_instr, tail, node);
2647 }
2648
2649 static inline bool
2650 nir_block_ends_in_jump(nir_block *block)
2651 {
2652 return !exec_list_is_empty(&block->instr_list) &&
2653 nir_block_last_instr(block)->type == nir_instr_type_jump;
2654 }
2655
2656 #define nir_foreach_instr(instr, block) \
2657 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2658 #define nir_foreach_instr_reverse(instr, block) \
2659 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2660 #define nir_foreach_instr_safe(instr, block) \
2661 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2662 #define nir_foreach_instr_reverse_safe(instr, block) \
2663 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2664
2665 typedef enum {
2666 nir_selection_control_none = 0x0,
2667 nir_selection_control_flatten = 0x1,
2668 nir_selection_control_dont_flatten = 0x2,
2669 } nir_selection_control;
2670
2671 typedef struct nir_if {
2672 nir_cf_node cf_node;
2673 nir_src condition;
2674 nir_selection_control control;
2675
2676 struct exec_list then_list; /** < list of nir_cf_node */
2677 struct exec_list else_list; /** < list of nir_cf_node */
2678 } nir_if;
2679
2680 typedef struct {
2681 nir_if *nif;
2682
2683 /** Instruction that generates nif::condition. */
2684 nir_instr *conditional_instr;
2685
2686 /** Block within ::nif that has the break instruction. */
2687 nir_block *break_block;
2688
2689 /** Last block for the then- or else-path that does not contain the break. */
2690 nir_block *continue_from_block;
2691
2692 /** True when ::break_block is in the else-path of ::nif. */
2693 bool continue_from_then;
2694 bool induction_rhs;
2695
2696 /* This is true if the terminators exact trip count is unknown. For
2697 * example:
2698 *
2699 * for (int i = 0; i < imin(x, 4); i++)
2700 * ...
2701 *
2702 * Here loop analysis would have set a max_trip_count of 4 however we dont
2703 * know for sure that this is the exact trip count.
2704 */
2705 bool exact_trip_count_unknown;
2706
2707 struct list_head loop_terminator_link;
2708 } nir_loop_terminator;
2709
2710 typedef struct {
2711 /* Estimated cost (in number of instructions) of the loop */
2712 unsigned instr_cost;
2713
2714 /* Guessed trip count based on array indexing */
2715 unsigned guessed_trip_count;
2716
2717 /* Maximum number of times the loop is run (if known) */
2718 unsigned max_trip_count;
2719
2720 /* Do we know the exact number of times the loop will be run */
2721 bool exact_trip_count_known;
2722
2723 /* Unroll the loop regardless of its size */
2724 bool force_unroll;
2725
2726 /* Does the loop contain complex loop terminators, continues or other
2727 * complex behaviours? If this is true we can't rely on
2728 * loop_terminator_list to be complete or accurate.
2729 */
2730 bool complex_loop;
2731
2732 nir_loop_terminator *limiting_terminator;
2733
2734 /* A list of loop_terminators terminating this loop. */
2735 struct list_head loop_terminator_list;
2736 } nir_loop_info;
2737
2738 typedef enum {
2739 nir_loop_control_none = 0x0,
2740 nir_loop_control_unroll = 0x1,
2741 nir_loop_control_dont_unroll = 0x2,
2742 } nir_loop_control;
2743
2744 typedef struct {
2745 nir_cf_node cf_node;
2746
2747 struct exec_list body; /** < list of nir_cf_node */
2748
2749 nir_loop_info *info;
2750 nir_loop_control control;
2751 bool partially_unrolled;
2752 } nir_loop;
2753
2754 /**
2755 * Various bits of metadata that can may be created or required by
2756 * optimization and analysis passes
2757 */
2758 typedef enum {
2759 nir_metadata_none = 0x0,
2760
2761 /** Indicates that nir_block::index values are valid.
2762 *
2763 * The start block has index 0 and they increase through a natural walk of
2764 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2765 * every block index is in the range [0, nir_function_impl::num_blocks].
2766 *
2767 * A pass can preserve this metadata type if it doesn't touch the CFG.
2768 */
2769 nir_metadata_block_index = 0x1,
2770
2771 /** Indicates that block dominance information is valid
2772 *
2773 * This includes:
2774 *
2775 * - nir_block::num_dom_children
2776 * - nir_block::dom_children
2777 * - nir_block::dom_frontier
2778 * - nir_block::dom_pre_index
2779 * - nir_block::dom_post_index
2780 *
2781 * A pass can preserve this metadata type if it doesn't touch the CFG.
2782 */
2783 nir_metadata_dominance = 0x2,
2784
2785 /** Indicates that SSA def data-flow liveness information is valid
2786 *
2787 * This includes:
2788 *
2789 * - nir_ssa_def::live_index
2790 * - nir_block::live_in
2791 * - nir_block::live_out
2792 *
2793 * A pass can preserve this metadata type if it never adds or removes any
2794 * SSA defs (most passes shouldn't preserve this metadata type).
2795 */
2796 nir_metadata_live_ssa_defs = 0x4,
2797
2798 /** A dummy metadata value to track when a pass forgot to call
2799 * nir_metadata_preserve.
2800 *
2801 * A pass should always clear this value even if it doesn't make any
2802 * progress to indicate that it thought about preserving metadata.
2803 */
2804 nir_metadata_not_properly_reset = 0x8,
2805
2806 /** Indicates that loop analysis information is valid.
2807 *
2808 * This includes everything pointed to by nir_loop::info.
2809 *
2810 * A pass can preserve this metadata type if it is guaranteed to not affect
2811 * any loop metadata. However, since loop metadata includes things like
2812 * loop counts which depend on arithmetic in the loop, this is very hard to
2813 * determine. Most passes shouldn't preserve this metadata type.
2814 */
2815 nir_metadata_loop_analysis = 0x10,
2816
2817 /** All metadata
2818 *
2819 * This includes all nir_metadata flags except not_properly_reset. Passes
2820 * which do not change the shader in any way should call
2821 *
2822 * nir_metadata_preserve(impl, nir_metadata_all);
2823 */
2824 nir_metadata_all = ~nir_metadata_not_properly_reset,
2825 } nir_metadata;
2826 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_metadata)
2827
2828 typedef struct {
2829 nir_cf_node cf_node;
2830
2831 /** pointer to the function of which this is an implementation */
2832 struct nir_function *function;
2833
2834 struct exec_list body; /** < list of nir_cf_node */
2835
2836 nir_block *end_block;
2837
2838 /** list for all local variables in the function */
2839 struct exec_list locals;
2840
2841 /** list of local registers in the function */
2842 struct exec_list registers;
2843
2844 /** next available local register index */
2845 unsigned reg_alloc;
2846
2847 /** next available SSA value index */
2848 unsigned ssa_alloc;
2849
2850 /* total number of basic blocks, only valid when block_index_dirty = false */
2851 unsigned num_blocks;
2852
2853 /** True if this nir_function_impl uses structured control-flow
2854 *
2855 * Structured nir_function_impls have different validation rules.
2856 */
2857 bool structured;
2858
2859 nir_metadata valid_metadata;
2860 } nir_function_impl;
2861
2862 #define nir_foreach_function_temp_variable(var, impl) \
2863 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2864
2865 #define nir_foreach_function_temp_variable_safe(var, impl) \
2866 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2867
2868 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2869 nir_start_block(nir_function_impl *impl)
2870 {
2871 return (nir_block *) impl->body.head_sentinel.next;
2872 }
2873
2874 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2875 nir_impl_last_block(nir_function_impl *impl)
2876 {
2877 return (nir_block *) impl->body.tail_sentinel.prev;
2878 }
2879
2880 static inline nir_cf_node *
2881 nir_cf_node_next(nir_cf_node *node)
2882 {
2883 struct exec_node *next = exec_node_get_next(&node->node);
2884 if (exec_node_is_tail_sentinel(next))
2885 return NULL;
2886 else
2887 return exec_node_data(nir_cf_node, next, node);
2888 }
2889
2890 static inline nir_cf_node *
2891 nir_cf_node_prev(nir_cf_node *node)
2892 {
2893 struct exec_node *prev = exec_node_get_prev(&node->node);
2894 if (exec_node_is_head_sentinel(prev))
2895 return NULL;
2896 else
2897 return exec_node_data(nir_cf_node, prev, node);
2898 }
2899
2900 static inline bool
2901 nir_cf_node_is_first(const nir_cf_node *node)
2902 {
2903 return exec_node_is_head_sentinel(node->node.prev);
2904 }
2905
2906 static inline bool
2907 nir_cf_node_is_last(const nir_cf_node *node)
2908 {
2909 return exec_node_is_tail_sentinel(node->node.next);
2910 }
2911
2912 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2913 type, nir_cf_node_block)
2914 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2915 type, nir_cf_node_if)
2916 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2917 type, nir_cf_node_loop)
2918 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2919 nir_function_impl, cf_node, type, nir_cf_node_function)
2920
2921 static inline nir_block *
2922 nir_if_first_then_block(nir_if *if_stmt)
2923 {
2924 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2925 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2926 }
2927
2928 static inline nir_block *
2929 nir_if_last_then_block(nir_if *if_stmt)
2930 {
2931 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2932 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2933 }
2934
2935 static inline nir_block *
2936 nir_if_first_else_block(nir_if *if_stmt)
2937 {
2938 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2939 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2940 }
2941
2942 static inline nir_block *
2943 nir_if_last_else_block(nir_if *if_stmt)
2944 {
2945 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2946 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2947 }
2948
2949 static inline nir_block *
2950 nir_loop_first_block(nir_loop *loop)
2951 {
2952 struct exec_node *head = exec_list_get_head(&loop->body);
2953 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2954 }
2955
2956 static inline nir_block *
2957 nir_loop_last_block(nir_loop *loop)
2958 {
2959 struct exec_node *tail = exec_list_get_tail(&loop->body);
2960 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2961 }
2962
2963 /**
2964 * Return true if this list of cf_nodes contains a single empty block.
2965 */
2966 static inline bool
2967 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2968 {
2969 if (exec_list_is_singular(cf_list)) {
2970 struct exec_node *head = exec_list_get_head(cf_list);
2971 nir_block *block =
2972 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2973 return exec_list_is_empty(&block->instr_list);
2974 }
2975 return false;
2976 }
2977
2978 typedef struct {
2979 uint8_t num_components;
2980 uint8_t bit_size;
2981 } nir_parameter;
2982
2983 typedef struct nir_function {
2984 struct exec_node node;
2985
2986 const char *name;
2987 struct nir_shader *shader;
2988
2989 unsigned num_params;
2990 nir_parameter *params;
2991
2992 /** The implementation of this function.
2993 *
2994 * If the function is only declared and not implemented, this is NULL.
2995 */
2996 nir_function_impl *impl;
2997
2998 bool is_entrypoint;
2999 } nir_function;
3000
3001 typedef enum {
3002 nir_lower_imul64 = (1 << 0),
3003 nir_lower_isign64 = (1 << 1),
3004 /** Lower all int64 modulus and division opcodes */
3005 nir_lower_divmod64 = (1 << 2),
3006 /** Lower all 64-bit umul_high and imul_high opcodes */
3007 nir_lower_imul_high64 = (1 << 3),
3008 nir_lower_mov64 = (1 << 4),
3009 nir_lower_icmp64 = (1 << 5),
3010 nir_lower_iadd64 = (1 << 6),
3011 nir_lower_iabs64 = (1 << 7),
3012 nir_lower_ineg64 = (1 << 8),
3013 nir_lower_logic64 = (1 << 9),
3014 nir_lower_minmax64 = (1 << 10),
3015 nir_lower_shift64 = (1 << 11),
3016 nir_lower_imul_2x32_64 = (1 << 12),
3017 nir_lower_extract64 = (1 << 13),
3018 nir_lower_ufind_msb64 = (1 << 14),
3019 nir_lower_bit_count64 = (1 << 15),
3020 } nir_lower_int64_options;
3021
3022 typedef enum {
3023 nir_lower_drcp = (1 << 0),
3024 nir_lower_dsqrt = (1 << 1),
3025 nir_lower_drsq = (1 << 2),
3026 nir_lower_dtrunc = (1 << 3),
3027 nir_lower_dfloor = (1 << 4),
3028 nir_lower_dceil = (1 << 5),
3029 nir_lower_dfract = (1 << 6),
3030 nir_lower_dround_even = (1 << 7),
3031 nir_lower_dmod = (1 << 8),
3032 nir_lower_dsub = (1 << 9),
3033 nir_lower_ddiv = (1 << 10),
3034 nir_lower_fp64_full_software = (1 << 11),
3035 } nir_lower_doubles_options;
3036
3037 typedef enum {
3038 nir_divergence_single_prim_per_subgroup = (1 << 0),
3039 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
3040 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
3041 nir_divergence_view_index_uniform = (1 << 3),
3042 } nir_divergence_options;
3043
3044 typedef struct nir_shader_compiler_options {
3045 bool lower_fdiv;
3046 bool lower_ffma;
3047 bool fuse_ffma;
3048 bool lower_flrp16;
3049 bool lower_flrp32;
3050 /** Lowers flrp when it does not support doubles */
3051 bool lower_flrp64;
3052 bool lower_fpow;
3053 bool lower_fsat;
3054 bool lower_fsqrt;
3055 bool lower_sincos;
3056 bool lower_fmod;
3057 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
3058 bool lower_bitfield_extract;
3059 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
3060 bool lower_bitfield_extract_to_shifts;
3061 /** Lowers bitfield_insert to bfi/bfm */
3062 bool lower_bitfield_insert;
3063 /** Lowers bitfield_insert to compares, and shifts. */
3064 bool lower_bitfield_insert_to_shifts;
3065 /** Lowers bitfield_insert to bfm/bitfield_select. */
3066 bool lower_bitfield_insert_to_bitfield_select;
3067 /** Lowers bitfield_reverse to shifts. */
3068 bool lower_bitfield_reverse;
3069 /** Lowers bit_count to shifts. */
3070 bool lower_bit_count;
3071 /** Lowers ifind_msb to compare and ufind_msb */
3072 bool lower_ifind_msb;
3073 /** Lowers find_lsb to ufind_msb and logic ops */
3074 bool lower_find_lsb;
3075 bool lower_uadd_carry;
3076 bool lower_usub_borrow;
3077 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
3078 bool lower_mul_high;
3079 /** lowers fneg and ineg to fsub and isub. */
3080 bool lower_negate;
3081 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
3082 bool lower_sub;
3083
3084 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fneu} + b2f: */
3085 bool lower_scmp;
3086
3087 /* lower b/fall_equalN/b/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
3088 bool lower_vector_cmp;
3089
3090 /** enables rules to lower idiv by power-of-two: */
3091 bool lower_idiv;
3092
3093 /** enable rules to avoid bit ops */
3094 bool lower_bitops;
3095
3096 /** enables rules to lower isign to imin+imax */
3097 bool lower_isign;
3098
3099 /** enables rules to lower fsign to fsub and flt */
3100 bool lower_fsign;
3101
3102 /** enables rules to lower iabs to ineg+imax */
3103 bool lower_iabs;
3104
3105 /* lower fdph to fdot4 */
3106 bool lower_fdph;
3107
3108 /** lower fdot to fmul and fsum/fadd. */
3109 bool lower_fdot;
3110
3111 /* Does the native fdot instruction replicate its result for four
3112 * components? If so, then opt_algebraic_late will turn all fdotN
3113 * instructions into fdot_replicatedN instructions.
3114 */
3115 bool fdot_replicates;
3116
3117 /** lowers ffloor to fsub+ffract: */
3118 bool lower_ffloor;
3119
3120 /** lowers ffract to fsub+ffloor: */
3121 bool lower_ffract;
3122
3123 /** lowers fceil to fneg+ffloor+fneg: */
3124 bool lower_fceil;
3125
3126 bool lower_ftrunc;
3127
3128 bool lower_ldexp;
3129
3130 bool lower_pack_half_2x16;
3131 bool lower_pack_unorm_2x16;
3132 bool lower_pack_snorm_2x16;
3133 bool lower_pack_unorm_4x8;
3134 bool lower_pack_snorm_4x8;
3135 bool lower_pack_64_2x32_split;
3136 bool lower_pack_32_2x16_split;
3137 bool lower_unpack_half_2x16;
3138 bool lower_unpack_unorm_2x16;
3139 bool lower_unpack_snorm_2x16;
3140 bool lower_unpack_unorm_4x8;
3141 bool lower_unpack_snorm_4x8;
3142 bool lower_unpack_64_2x32_split;
3143 bool lower_unpack_32_2x16_split;
3144
3145 bool lower_pack_split;
3146
3147 bool lower_extract_byte;
3148 bool lower_extract_word;
3149
3150 bool lower_all_io_to_temps;
3151 bool lower_all_io_to_elements;
3152
3153 /* Indicates that the driver only has zero-based vertex id */
3154 bool vertex_id_zero_based;
3155
3156 /**
3157 * If enabled, gl_BaseVertex will be lowered as:
3158 * is_indexed_draw (~0/0) & firstvertex
3159 */
3160 bool lower_base_vertex;
3161
3162 /**
3163 * If enabled, gl_HelperInvocation will be lowered as:
3164 *
3165 * !((1 << sample_id) & sample_mask_in))
3166 *
3167 * This depends on some possibly hw implementation details, which may
3168 * not be true for all hw. In particular that the FS is only executed
3169 * for covered samples or for helper invocations. So, do not blindly
3170 * enable this option.
3171 *
3172 * Note: See also issue #22 in ARB_shader_image_load_store
3173 */
3174 bool lower_helper_invocation;
3175
3176 /**
3177 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3178 *
3179 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3180 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3181 */
3182 bool optimize_sample_mask_in;
3183
3184 bool lower_cs_local_index_from_id;
3185 bool lower_cs_local_id_from_index;
3186
3187 /* Prevents lowering global_invocation_id to be in terms of work_group_id */
3188 bool has_cs_global_id;
3189
3190 bool lower_device_index_to_zero;
3191
3192 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3193 bool lower_wpos_pntc;
3194
3195 /**
3196 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3197 * lowered to simple arithmetic.
3198 *
3199 * If this flag is set, the lowering will be applied to all bit-sizes of
3200 * these instructions.
3201 *
3202 * \sa ::lower_hadd64
3203 */
3204 bool lower_hadd;
3205
3206 /**
3207 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3208 * should be lowered to simple arithmetic.
3209 *
3210 * If this flag is set, the lowering will be applied to only 64-bit
3211 * versions of these instructions.
3212 *
3213 * \sa ::lower_hadd
3214 */
3215 bool lower_hadd64;
3216
3217 /**
3218 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3219 * arithmetic.
3220 *
3221 * If this flag is set, the lowering will be applied to all bit-sizes of
3222 * these instructions.
3223 *
3224 * \sa ::lower_usub_sat64
3225 */
3226 bool lower_add_sat;
3227
3228 /**
3229 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3230 * arithmetic.
3231 *
3232 * \sa ::lower_add_sat
3233 */
3234 bool lower_usub_sat64;
3235
3236 /**
3237 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3238 * for IO purposes and would prefer loads/stores be vectorized.
3239 */
3240 bool vectorize_io;
3241 bool lower_to_scalar;
3242
3243 /**
3244 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3245 */
3246 bool vectorize_vec2_16bit;
3247
3248 /**
3249 * Should the linker unify inputs_read/outputs_written between adjacent
3250 * shader stages which are linked into a single program?
3251 */
3252 bool unify_interfaces;
3253
3254 /**
3255 * Should nir_lower_io() create load_interpolated_input intrinsics?
3256 *
3257 * If not, it generates regular load_input intrinsics and interpolation
3258 * information must be inferred from the list of input nir_variables.
3259 */
3260 bool use_interpolated_input_intrinsics;
3261
3262 /* Lowers when 32x32->64 bit multiplication is not supported */
3263 bool lower_mul_2x32_64;
3264
3265 /* Lowers when rotate instruction is not supported */
3266 bool lower_rotate;
3267
3268 /**
3269 * Backend supports imul24, and would like to use it (when possible)
3270 * for address/offset calculation. If true, driver should call
3271 * nir_lower_amul(). (If not set, amul will automatically be lowered
3272 * to imul.)
3273 */
3274 bool has_imul24;
3275
3276 /** Backend supports umul24, if not set umul24 will automatically be lowered
3277 * to imul with masked inputs */
3278 bool has_umul24;
3279
3280 /** Backend supports umad24, if not set umad24 will automatically be lowered
3281 * to imul with masked inputs and iadd */
3282 bool has_umad24;
3283
3284 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3285 * memory and control barrier intrinsics based on GLSL.
3286 */
3287 bool use_scoped_barrier;
3288
3289 /**
3290 * Is this the Intel vec4 backend?
3291 *
3292 * Used to inhibit algebraic optimizations that are known to be harmful on
3293 * the Intel vec4 backend. This is generally applicable to any
3294 * optimization that might cause more immediate values to be used in
3295 * 3-source (e.g., ffma and flrp) instructions.
3296 */
3297 bool intel_vec4;
3298
3299 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3300 bool lower_bfe_with_two_constants;
3301
3302 /** Whether 8-bit ALU is supported. */
3303 bool support_8bit_alu;
3304
3305 /** Whether 16-bit ALU is supported. */
3306 bool support_16bit_alu;
3307
3308 unsigned max_unroll_iterations;
3309
3310 nir_lower_int64_options lower_int64_options;
3311 nir_lower_doubles_options lower_doubles_options;
3312 } nir_shader_compiler_options;
3313
3314 typedef struct nir_shader {
3315 /** list of uniforms (nir_variable) */
3316 struct exec_list variables;
3317
3318 /** Set of driver-specific options for the shader.
3319 *
3320 * The memory for the options is expected to be kept in a single static
3321 * copy by the driver.
3322 */
3323 const struct nir_shader_compiler_options *options;
3324
3325 /** Various bits of compile-time information about a given shader */
3326 struct shader_info info;
3327
3328 struct exec_list functions; /** < list of nir_function */
3329
3330 /**
3331 * The size of the variable space for load_input_*, load_uniform_*, etc.
3332 * intrinsics. This is in back-end specific units which is likely one of
3333 * bytes, dwords, or vec4s depending on context and back-end.
3334 */
3335 unsigned num_inputs, num_uniforms, num_outputs;
3336
3337 /** Size in bytes of required shared memory */
3338 unsigned shared_size;
3339
3340 /** Size in bytes of required scratch space */
3341 unsigned scratch_size;
3342
3343 /** Constant data associated with this shader.
3344 *
3345 * Constant data is loaded through load_constant intrinsics (as compared to
3346 * the NIR load_const instructions which have the constant value inlined
3347 * into them). This is usually generated by nir_opt_large_constants (so
3348 * shaders don't have to load_const into a temporary array when they want
3349 * to indirect on a const array).
3350 */
3351 void *constant_data;
3352 /** Size of the constant data associated with the shader, in bytes */
3353 unsigned constant_data_size;
3354 } nir_shader;
3355
3356 #define nir_foreach_function(func, shader) \
3357 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3358
3359 static inline nir_function_impl *
3360 nir_shader_get_entrypoint(nir_shader *shader)
3361 {
3362 nir_function *func = NULL;
3363
3364 nir_foreach_function(function, shader) {
3365 assert(func == NULL);
3366 if (function->is_entrypoint) {
3367 func = function;
3368 #ifndef NDEBUG
3369 break;
3370 #endif
3371 }
3372 }
3373
3374 if (!func)
3375 return NULL;
3376
3377 assert(func->num_params == 0);
3378 assert(func->impl);
3379 return func->impl;
3380 }
3381
3382 nir_shader *nir_shader_create(void *mem_ctx,
3383 gl_shader_stage stage,
3384 const nir_shader_compiler_options *options,
3385 shader_info *si);
3386
3387 nir_register *nir_local_reg_create(nir_function_impl *impl);
3388
3389 void nir_reg_remove(nir_register *reg);
3390
3391 /** Adds a variable to the appropriate list in nir_shader */
3392 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3393
3394 static inline void
3395 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3396 {
3397 assert(var->data.mode == nir_var_function_temp);
3398 exec_list_push_tail(&impl->locals, &var->node);
3399 }
3400
3401 /** creates a variable, sets a few defaults, and adds it to the list */
3402 nir_variable *nir_variable_create(nir_shader *shader,
3403 nir_variable_mode mode,
3404 const struct glsl_type *type,
3405 const char *name);
3406 /** creates a local variable and adds it to the list */
3407 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3408 const struct glsl_type *type,
3409 const char *name);
3410
3411 nir_variable *nir_find_variable_with_location(nir_shader *shader,
3412 nir_variable_mode mode,
3413 unsigned location);
3414
3415 nir_variable *nir_find_variable_with_driver_location(nir_shader *shader,
3416 nir_variable_mode mode,
3417 unsigned location);
3418
3419 /** creates a function and adds it to the shader's list of functions */
3420 nir_function *nir_function_create(nir_shader *shader, const char *name);
3421
3422 nir_function_impl *nir_function_impl_create(nir_function *func);
3423 /** creates a function_impl that isn't tied to any particular function */
3424 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3425
3426 nir_block *nir_block_create(nir_shader *shader);
3427 nir_if *nir_if_create(nir_shader *shader);
3428 nir_loop *nir_loop_create(nir_shader *shader);
3429
3430 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3431
3432 /** requests that the given pieces of metadata be generated */
3433 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3434 /** dirties all but the preserved metadata */
3435 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3436 /** Preserves all metadata for the given shader */
3437 void nir_shader_preserve_all_metadata(nir_shader *shader);
3438
3439 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3440 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3441
3442 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3443 nir_deref_type deref_type);
3444
3445 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3446
3447 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3448 unsigned num_components,
3449 unsigned bit_size);
3450
3451 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3452 nir_intrinsic_op op);
3453
3454 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3455 nir_function *callee);
3456
3457 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3458
3459 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3460
3461 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3462
3463 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3464 unsigned num_components,
3465 unsigned bit_size);
3466
3467 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3468
3469 /**
3470 * NIR Cursors and Instruction Insertion API
3471 * @{
3472 *
3473 * A tiny struct representing a point to insert/extract instructions or
3474 * control flow nodes. Helps reduce the combinatorial explosion of possible
3475 * points to insert/extract.
3476 *
3477 * \sa nir_control_flow.h
3478 */
3479 typedef enum {
3480 nir_cursor_before_block,
3481 nir_cursor_after_block,
3482 nir_cursor_before_instr,
3483 nir_cursor_after_instr,
3484 } nir_cursor_option;
3485
3486 typedef struct {
3487 nir_cursor_option option;
3488 union {
3489 nir_block *block;
3490 nir_instr *instr;
3491 };
3492 } nir_cursor;
3493
3494 static inline nir_block *
3495 nir_cursor_current_block(nir_cursor cursor)
3496 {
3497 if (cursor.option == nir_cursor_before_instr ||
3498 cursor.option == nir_cursor_after_instr) {
3499 return cursor.instr->block;
3500 } else {
3501 return cursor.block;
3502 }
3503 }
3504
3505 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3506
3507 static inline nir_cursor
3508 nir_before_block(nir_block *block)
3509 {
3510 nir_cursor cursor;
3511 cursor.option = nir_cursor_before_block;
3512 cursor.block = block;
3513 return cursor;
3514 }
3515
3516 static inline nir_cursor
3517 nir_after_block(nir_block *block)
3518 {
3519 nir_cursor cursor;
3520 cursor.option = nir_cursor_after_block;
3521 cursor.block = block;
3522 return cursor;
3523 }
3524
3525 static inline nir_cursor
3526 nir_before_instr(nir_instr *instr)
3527 {
3528 nir_cursor cursor;
3529 cursor.option = nir_cursor_before_instr;
3530 cursor.instr = instr;
3531 return cursor;
3532 }
3533
3534 static inline nir_cursor
3535 nir_after_instr(nir_instr *instr)
3536 {
3537 nir_cursor cursor;
3538 cursor.option = nir_cursor_after_instr;
3539 cursor.instr = instr;
3540 return cursor;
3541 }
3542
3543 static inline nir_cursor
3544 nir_after_block_before_jump(nir_block *block)
3545 {
3546 nir_instr *last_instr = nir_block_last_instr(block);
3547 if (last_instr && last_instr->type == nir_instr_type_jump) {
3548 return nir_before_instr(last_instr);
3549 } else {
3550 return nir_after_block(block);
3551 }
3552 }
3553
3554 static inline nir_cursor
3555 nir_before_src(nir_src *src, bool is_if_condition)
3556 {
3557 if (is_if_condition) {
3558 nir_block *prev_block =
3559 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3560 assert(!nir_block_ends_in_jump(prev_block));
3561 return nir_after_block(prev_block);
3562 } else if (src->parent_instr->type == nir_instr_type_phi) {
3563 #ifndef NDEBUG
3564 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3565 bool found = false;
3566 nir_foreach_phi_src(phi_src, cond_phi) {
3567 if (phi_src->src.ssa == src->ssa) {
3568 found = true;
3569 break;
3570 }
3571 }
3572 assert(found);
3573 #endif
3574 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3575 * to have a more specific name.
3576 */
3577 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3578 return nir_after_block_before_jump(phi_src->pred);
3579 } else {
3580 return nir_before_instr(src->parent_instr);
3581 }
3582 }
3583
3584 static inline nir_cursor
3585 nir_before_cf_node(nir_cf_node *node)
3586 {
3587 if (node->type == nir_cf_node_block)
3588 return nir_before_block(nir_cf_node_as_block(node));
3589
3590 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3591 }
3592
3593 static inline nir_cursor
3594 nir_after_cf_node(nir_cf_node *node)
3595 {
3596 if (node->type == nir_cf_node_block)
3597 return nir_after_block(nir_cf_node_as_block(node));
3598
3599 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3600 }
3601
3602 static inline nir_cursor
3603 nir_after_phis(nir_block *block)
3604 {
3605 nir_foreach_instr(instr, block) {
3606 if (instr->type != nir_instr_type_phi)
3607 return nir_before_instr(instr);
3608 }
3609 return nir_after_block(block);
3610 }
3611
3612 static inline nir_cursor
3613 nir_after_cf_node_and_phis(nir_cf_node *node)
3614 {
3615 if (node->type == nir_cf_node_block)
3616 return nir_after_block(nir_cf_node_as_block(node));
3617
3618 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3619
3620 return nir_after_phis(block);
3621 }
3622
3623 static inline nir_cursor
3624 nir_before_cf_list(struct exec_list *cf_list)
3625 {
3626 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3627 exec_list_get_head(cf_list), node);
3628 return nir_before_cf_node(first_node);
3629 }
3630
3631 static inline nir_cursor
3632 nir_after_cf_list(struct exec_list *cf_list)
3633 {
3634 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3635 exec_list_get_tail(cf_list), node);
3636 return nir_after_cf_node(last_node);
3637 }
3638
3639 /**
3640 * Insert a NIR instruction at the given cursor.
3641 *
3642 * Note: This does not update the cursor.
3643 */
3644 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3645
3646 static inline void
3647 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3648 {
3649 nir_instr_insert(nir_before_instr(instr), before);
3650 }
3651
3652 static inline void
3653 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3654 {
3655 nir_instr_insert(nir_after_instr(instr), after);
3656 }
3657
3658 static inline void
3659 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3660 {
3661 nir_instr_insert(nir_before_block(block), before);
3662 }
3663
3664 static inline void
3665 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3666 {
3667 nir_instr_insert(nir_after_block(block), after);
3668 }
3669
3670 static inline void
3671 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3672 {
3673 nir_instr_insert(nir_before_cf_node(node), before);
3674 }
3675
3676 static inline void
3677 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3678 {
3679 nir_instr_insert(nir_after_cf_node(node), after);
3680 }
3681
3682 static inline void
3683 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3684 {
3685 nir_instr_insert(nir_before_cf_list(list), before);
3686 }
3687
3688 static inline void
3689 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3690 {
3691 nir_instr_insert(nir_after_cf_list(list), after);
3692 }
3693
3694 void nir_instr_remove_v(nir_instr *instr);
3695
3696 static inline nir_cursor
3697 nir_instr_remove(nir_instr *instr)
3698 {
3699 nir_cursor cursor;
3700 nir_instr *prev = nir_instr_prev(instr);
3701 if (prev) {
3702 cursor = nir_after_instr(prev);
3703 } else {
3704 cursor = nir_before_block(instr->block);
3705 }
3706 nir_instr_remove_v(instr);
3707 return cursor;
3708 }
3709
3710 /** @} */
3711
3712 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3713
3714 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3715 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3716 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3717 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3718 void *state);
3719 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3720 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3721 bool nir_foreach_phi_src_leaving_block(nir_block *instr,
3722 nir_foreach_src_cb cb,
3723 void *state);
3724
3725 nir_const_value *nir_src_as_const_value(nir_src src);
3726
3727 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3728 static inline c_type * \
3729 nir_src_as_ ## name (nir_src src) \
3730 { \
3731 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3732 ? cast_macro(src.ssa->parent_instr) : NULL; \
3733 }
3734
3735 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3736 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3737 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3738 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3739
3740 bool nir_src_is_dynamically_uniform(nir_src src);
3741 bool nir_srcs_equal(nir_src src1, nir_src src2);
3742 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3743 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3744 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3745 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3746 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3747 nir_dest new_dest);
3748
3749 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3750 unsigned num_components, unsigned bit_size,
3751 const char *name);
3752 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3753 unsigned num_components, unsigned bit_size,
3754 const char *name);
3755 static inline void
3756 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3757 const struct glsl_type *type,
3758 const char *name)
3759 {
3760 assert(glsl_type_is_vector_or_scalar(type));
3761 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3762 glsl_get_bit_size(type), name);
3763 }
3764 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3765 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3766 nir_instr *after_me);
3767
3768 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3769
3770
3771 /** Returns the next block, disregarding structure
3772 *
3773 * The ordering is deterministic but has no guarantees beyond that. In
3774 * particular, it is not guaranteed to be dominance-preserving.
3775 */
3776 nir_block *nir_block_unstructured_next(nir_block *block);
3777 nir_block *nir_unstructured_start_block(nir_function_impl *impl);
3778
3779 #define nir_foreach_block_unstructured(block, impl) \
3780 for (nir_block *block = nir_unstructured_start_block(impl); block != NULL; \
3781 block = nir_block_unstructured_next(block))
3782
3783 #define nir_foreach_block_unstructured_safe(block, impl) \
3784 for (nir_block *block = nir_unstructured_start_block(impl), \
3785 *next = nir_block_unstructured_next(block); \
3786 block != NULL; \
3787 block = next, next = nir_block_unstructured_next(block))
3788
3789 /*
3790 * finds the next basic block in source-code order, returns NULL if there is
3791 * none
3792 */
3793
3794 nir_block *nir_block_cf_tree_next(nir_block *block);
3795
3796 /* Performs the opposite of nir_block_cf_tree_next() */
3797
3798 nir_block *nir_block_cf_tree_prev(nir_block *block);
3799
3800 /* Gets the first block in a CF node in source-code order */
3801
3802 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3803
3804 /* Gets the last block in a CF node in source-code order */
3805
3806 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3807
3808 /* Gets the next block after a CF node in source-code order */
3809
3810 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3811
3812 /* Macros for loops that visit blocks in source-code order */
3813
3814 #define nir_foreach_block(block, impl) \
3815 for (nir_block *block = nir_start_block(impl); block != NULL; \
3816 block = nir_block_cf_tree_next(block))
3817
3818 #define nir_foreach_block_safe(block, impl) \
3819 for (nir_block *block = nir_start_block(impl), \
3820 *next = nir_block_cf_tree_next(block); \
3821 block != NULL; \
3822 block = next, next = nir_block_cf_tree_next(block))
3823
3824 #define nir_foreach_block_reverse(block, impl) \
3825 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3826 block = nir_block_cf_tree_prev(block))
3827
3828 #define nir_foreach_block_reverse_safe(block, impl) \
3829 for (nir_block *block = nir_impl_last_block(impl), \
3830 *prev = nir_block_cf_tree_prev(block); \
3831 block != NULL; \
3832 block = prev, prev = nir_block_cf_tree_prev(block))
3833
3834 #define nir_foreach_block_in_cf_node(block, node) \
3835 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3836 block != nir_cf_node_cf_tree_next(node); \
3837 block = nir_block_cf_tree_next(block))
3838
3839 /* If the following CF node is an if, this function returns that if.
3840 * Otherwise, it returns NULL.
3841 */
3842 nir_if *nir_block_get_following_if(nir_block *block);
3843
3844 nir_loop *nir_block_get_following_loop(nir_block *block);
3845
3846 void nir_index_local_regs(nir_function_impl *impl);
3847 void nir_index_ssa_defs(nir_function_impl *impl);
3848 unsigned nir_index_instrs(nir_function_impl *impl);
3849
3850 void nir_index_blocks(nir_function_impl *impl);
3851
3852 unsigned nir_shader_index_vars(nir_shader *shader, nir_variable_mode modes);
3853 unsigned nir_function_impl_index_vars(nir_function_impl *impl);
3854
3855 void nir_print_shader(nir_shader *shader, FILE *fp);
3856 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3857 void nir_print_instr(const nir_instr *instr, FILE *fp);
3858 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3859
3860 /** Shallow clone of a single instruction. */
3861 nir_instr *nir_instr_clone(nir_shader *s, const nir_instr *orig);
3862
3863 /** Shallow clone of a single ALU instruction. */
3864 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3865
3866 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3867 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3868 const nir_function_impl *fi);
3869 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3870 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3871
3872 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3873
3874 void nir_shader_serialize_deserialize(nir_shader *s);
3875
3876 #ifndef NDEBUG
3877 void nir_validate_shader(nir_shader *shader, const char *when);
3878 void nir_metadata_set_validation_flag(nir_shader *shader);
3879 void nir_metadata_check_validation_flag(nir_shader *shader);
3880
3881 static inline bool
3882 should_skip_nir(const char *name)
3883 {
3884 static const char *list = NULL;
3885 if (!list) {
3886 /* Comma separated list of names to skip. */
3887 list = getenv("NIR_SKIP");
3888 if (!list)
3889 list = "";
3890 }
3891
3892 if (!list[0])
3893 return false;
3894
3895 return comma_separated_list_contains(list, name);
3896 }
3897
3898 static inline bool
3899 should_clone_nir(void)
3900 {
3901 static int should_clone = -1;
3902 if (should_clone < 0)
3903 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3904
3905 return should_clone;
3906 }
3907
3908 static inline bool
3909 should_serialize_deserialize_nir(void)
3910 {
3911 static int test_serialize = -1;
3912 if (test_serialize < 0)
3913 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3914
3915 return test_serialize;
3916 }
3917
3918 static inline bool
3919 should_print_nir(void)
3920 {
3921 static int should_print = -1;
3922 if (should_print < 0)
3923 should_print = env_var_as_boolean("NIR_PRINT", false);
3924
3925 return should_print;
3926 }
3927 #else
3928 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3929 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3930 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3931 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3932 static inline bool should_clone_nir(void) { return false; }
3933 static inline bool should_serialize_deserialize_nir(void) { return false; }
3934 static inline bool should_print_nir(void) { return false; }
3935 #endif /* NDEBUG */
3936
3937 #define _PASS(pass, nir, do_pass) do { \
3938 if (should_skip_nir(#pass)) { \
3939 printf("skipping %s\n", #pass); \
3940 break; \
3941 } \
3942 do_pass \
3943 nir_validate_shader(nir, "after " #pass); \
3944 if (should_clone_nir()) { \
3945 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3946 nir_shader_replace(nir, clone); \
3947 } \
3948 if (should_serialize_deserialize_nir()) { \
3949 nir_shader_serialize_deserialize(nir); \
3950 } \
3951 } while (0)
3952
3953 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3954 nir_metadata_set_validation_flag(nir); \
3955 if (should_print_nir()) \
3956 printf("%s\n", #pass); \
3957 if (pass(nir, ##__VA_ARGS__)) { \
3958 progress = true; \
3959 if (should_print_nir()) \
3960 nir_print_shader(nir, stdout); \
3961 nir_metadata_check_validation_flag(nir); \
3962 } \
3963 )
3964
3965 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3966 if (should_print_nir()) \
3967 printf("%s\n", #pass); \
3968 pass(nir, ##__VA_ARGS__); \
3969 if (should_print_nir()) \
3970 nir_print_shader(nir, stdout); \
3971 )
3972
3973 #define NIR_SKIP(name) should_skip_nir(#name)
3974
3975 /** An instruction filtering callback
3976 *
3977 * Returns true if the instruction should be processed and false otherwise.
3978 */
3979 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3980
3981 /** A simple instruction lowering callback
3982 *
3983 * Many instruction lowering passes can be written as a simple function which
3984 * takes an instruction as its input and returns a sequence of instructions
3985 * that implement the consumed instruction. This function type represents
3986 * such a lowering function. When called, a function with this prototype
3987 * should either return NULL indicating that no lowering needs to be done or
3988 * emit a sequence of instructions using the provided builder (whose cursor
3989 * will already be placed after the instruction to be lowered) and return the
3990 * resulting nir_ssa_def.
3991 */
3992 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3993 nir_instr *, void *);
3994
3995 /**
3996 * Special return value for nir_lower_instr_cb when some progress occurred
3997 * (like changing an input to the instr) that didn't result in a replacement
3998 * SSA def being generated.
3999 */
4000 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
4001
4002 /** Iterate over all the instructions in a nir_function_impl and lower them
4003 * using the provided callbacks
4004 *
4005 * This function implements the guts of a standard lowering pass for you. It
4006 * iterates over all of the instructions in a nir_function_impl and calls the
4007 * filter callback on each one. If the filter callback returns true, it then
4008 * calls the lowering call back on the instruction. (Splitting it this way
4009 * allows us to avoid some save/restore work for instructions we know won't be
4010 * lowered.) If the instruction is dead after the lowering is complete, it
4011 * will be removed. If new instructions are added, the lowering callback will
4012 * also be called on them in case multiple lowerings are required.
4013 *
4014 * The metadata for the nir_function_impl will also be updated. If any blocks
4015 * are added (they cannot be removed), dominance and block indices will be
4016 * invalidated.
4017 */
4018 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
4019 nir_instr_filter_cb filter,
4020 nir_lower_instr_cb lower,
4021 void *cb_data);
4022 bool nir_shader_lower_instructions(nir_shader *shader,
4023 nir_instr_filter_cb filter,
4024 nir_lower_instr_cb lower,
4025 void *cb_data);
4026
4027 void nir_calc_dominance_impl(nir_function_impl *impl);
4028 void nir_calc_dominance(nir_shader *shader);
4029
4030 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
4031 bool nir_block_dominates(nir_block *parent, nir_block *child);
4032 bool nir_block_is_unreachable(nir_block *block);
4033
4034 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
4035 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
4036
4037 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
4038 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
4039
4040 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
4041 void nir_dump_cfg(nir_shader *shader, FILE *fp);
4042
4043 int nir_gs_count_vertices(const nir_shader *shader);
4044
4045 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
4046 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
4047 bool nir_split_var_copies(nir_shader *shader);
4048 bool nir_split_per_member_structs(nir_shader *shader);
4049 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
4050
4051 bool nir_lower_returns_impl(nir_function_impl *impl);
4052 bool nir_lower_returns(nir_shader *shader);
4053
4054 void nir_inline_function_impl(struct nir_builder *b,
4055 const nir_function_impl *impl,
4056 nir_ssa_def **params,
4057 struct hash_table *shader_var_remap);
4058 bool nir_inline_functions(nir_shader *shader);
4059
4060 bool nir_propagate_invariant(nir_shader *shader);
4061
4062 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
4063 void nir_lower_deref_copy_instr(struct nir_builder *b,
4064 nir_intrinsic_instr *copy);
4065 bool nir_lower_var_copies(nir_shader *shader);
4066
4067 void nir_fixup_deref_modes(nir_shader *shader);
4068
4069 bool nir_lower_global_vars_to_local(nir_shader *shader);
4070
4071 typedef enum {
4072 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
4073 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
4074 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
4075 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
4076 } nir_lower_array_deref_of_vec_options;
4077
4078 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
4079 nir_lower_array_deref_of_vec_options options);
4080
4081 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes,
4082 uint32_t max_lower_array_len);
4083
4084 bool nir_lower_locals_to_regs(nir_shader *shader);
4085
4086 void nir_lower_io_to_temporaries(nir_shader *shader,
4087 nir_function_impl *entrypoint,
4088 bool outputs, bool inputs);
4089
4090 bool nir_lower_vars_to_scratch(nir_shader *shader,
4091 nir_variable_mode modes,
4092 int size_threshold,
4093 glsl_type_size_align_func size_align);
4094
4095 void nir_lower_clip_halfz(nir_shader *shader);
4096
4097 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
4098
4099 void nir_gather_ssa_types(nir_function_impl *impl,
4100 BITSET_WORD *float_types,
4101 BITSET_WORD *int_types);
4102
4103 void nir_assign_var_locations(nir_shader *shader, nir_variable_mode mode,
4104 unsigned *size,
4105 int (*type_size)(const struct glsl_type *, bool));
4106
4107 /* Some helpers to do very simple linking */
4108 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
4109 bool nir_remove_unused_io_vars(nir_shader *shader, nir_variable_mode mode,
4110 uint64_t *used_by_other_stage,
4111 uint64_t *used_by_other_stage_patches);
4112 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
4113 bool default_to_smooth_interp);
4114 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
4115 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
4116
4117 bool nir_lower_amul(nir_shader *shader,
4118 int (*type_size)(const struct glsl_type *, bool));
4119
4120 bool nir_lower_ubo_vec4(nir_shader *shader);
4121
4122 void nir_assign_io_var_locations(nir_shader *shader,
4123 nir_variable_mode mode,
4124 unsigned *size,
4125 gl_shader_stage stage);
4126
4127 typedef struct {
4128 uint8_t num_linked_io_vars;
4129 uint8_t num_linked_patch_io_vars;
4130 } nir_linked_io_var_info;
4131
4132 nir_linked_io_var_info
4133 nir_assign_linked_io_var_locations(nir_shader *producer,
4134 nir_shader *consumer);
4135
4136 typedef enum {
4137 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
4138 * to 32-bit operations. This is only valid for nir_var_shader_in/out
4139 * modes.
4140 */
4141 nir_lower_io_lower_64bit_to_32 = (1 << 0),
4142
4143 /* If set, this forces all non-flat fragment shader inputs to be
4144 * interpolated as if with the "sample" qualifier. This requires
4145 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
4146 */
4147 nir_lower_io_force_sample_interpolation = (1 << 1),
4148 } nir_lower_io_options;
4149 bool nir_lower_io(nir_shader *shader,
4150 nir_variable_mode modes,
4151 int (*type_size)(const struct glsl_type *, bool),
4152 nir_lower_io_options);
4153
4154 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
4155
4156 bool
4157 nir_lower_vars_to_explicit_types(nir_shader *shader,
4158 nir_variable_mode modes,
4159 glsl_type_size_align_func type_info);
4160
4161 bool nir_lower_mem_constant_vars(nir_shader *shader,
4162 glsl_type_size_align_func type_info);
4163
4164 typedef enum {
4165 /**
4166 * An address format which is a simple 32-bit global GPU address.
4167 */
4168 nir_address_format_32bit_global,
4169
4170 /**
4171 * An address format which is a simple 64-bit global GPU address.
4172 */
4173 nir_address_format_64bit_global,
4174
4175 /**
4176 * An address format which is a bounds-checked 64-bit global GPU address.
4177 *
4178 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
4179 * address stored with the low bits in .x and high bits in .y, .z is a
4180 * size, and .w is an offset. When the final I/O operation is lowered, .w
4181 * is checked against .z and the operation is predicated on the result.
4182 */
4183 nir_address_format_64bit_bounded_global,
4184
4185 /**
4186 * An address format which is comprised of a vec2 where the first
4187 * component is a buffer index and the second is an offset.
4188 */
4189 nir_address_format_32bit_index_offset,
4190
4191 /**
4192 * An address format which is a 64-bit value, where the high 32 bits
4193 * are a buffer index, and the low 32 bits are an offset.
4194 */
4195 nir_address_format_32bit_index_offset_pack64,
4196
4197 /**
4198 * An address format which is comprised of a vec3 where the first two
4199 * components specify the buffer and the third is an offset.
4200 */
4201 nir_address_format_vec2_index_32bit_offset,
4202
4203 /**
4204 * An address format which is a simple 32-bit offset.
4205 */
4206 nir_address_format_32bit_offset,
4207
4208 /**
4209 * An address format which is a simple 32-bit offset cast to 64-bit.
4210 */
4211 nir_address_format_32bit_offset_as_64bit,
4212
4213 /**
4214 * An address format representing a purely logical addressing model. In
4215 * this model, all deref chains must be complete from the dereference
4216 * operation to the variable. Cast derefs are not allowed. These
4217 * addresses will be 32-bit scalars but the format is immaterial because
4218 * you can always chase the chain.
4219 */
4220 nir_address_format_logical,
4221 } nir_address_format;
4222
4223 static inline unsigned
4224 nir_address_format_bit_size(nir_address_format addr_format)
4225 {
4226 switch (addr_format) {
4227 case nir_address_format_32bit_global: return 32;
4228 case nir_address_format_64bit_global: return 64;
4229 case nir_address_format_64bit_bounded_global: return 32;
4230 case nir_address_format_32bit_index_offset: return 32;
4231 case nir_address_format_32bit_index_offset_pack64: return 64;
4232 case nir_address_format_vec2_index_32bit_offset: return 32;
4233 case nir_address_format_32bit_offset: return 32;
4234 case nir_address_format_32bit_offset_as_64bit: return 64;
4235 case nir_address_format_logical: return 32;
4236 }
4237 unreachable("Invalid address format");
4238 }
4239
4240 static inline unsigned
4241 nir_address_format_num_components(nir_address_format addr_format)
4242 {
4243 switch (addr_format) {
4244 case nir_address_format_32bit_global: return 1;
4245 case nir_address_format_64bit_global: return 1;
4246 case nir_address_format_64bit_bounded_global: return 4;
4247 case nir_address_format_32bit_index_offset: return 2;
4248 case nir_address_format_32bit_index_offset_pack64: return 1;
4249 case nir_address_format_vec2_index_32bit_offset: return 3;
4250 case nir_address_format_32bit_offset: return 1;
4251 case nir_address_format_32bit_offset_as_64bit: return 1;
4252 case nir_address_format_logical: return 1;
4253 }
4254 unreachable("Invalid address format");
4255 }
4256
4257 static inline const struct glsl_type *
4258 nir_address_format_to_glsl_type(nir_address_format addr_format)
4259 {
4260 unsigned bit_size = nir_address_format_bit_size(addr_format);
4261 assert(bit_size == 32 || bit_size == 64);
4262 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
4263 nir_address_format_num_components(addr_format));
4264 }
4265
4266 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
4267
4268 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4269 nir_address_format addr_format);
4270
4271 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4272 nir_address_format addr_format);
4273
4274 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
4275 nir_deref_instr *deref,
4276 nir_ssa_def *base_addr,
4277 nir_address_format addr_format);
4278
4279 bool nir_get_explicit_deref_align(nir_deref_instr *deref,
4280 bool default_to_type_align,
4281 uint32_t *align_mul,
4282 uint32_t *align_offset);
4283
4284 void nir_lower_explicit_io_instr(struct nir_builder *b,
4285 nir_intrinsic_instr *io_instr,
4286 nir_ssa_def *addr,
4287 nir_address_format addr_format);
4288
4289 bool nir_lower_explicit_io(nir_shader *shader,
4290 nir_variable_mode modes,
4291 nir_address_format);
4292
4293 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
4294 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
4295
4296 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
4297
4298 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
4299 bool nir_lower_regs_to_ssa(nir_shader *shader);
4300 bool nir_lower_vars_to_ssa(nir_shader *shader);
4301
4302 bool nir_remove_dead_derefs(nir_shader *shader);
4303 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
4304 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes,
4305 bool (*can_remove_var)(nir_variable *var));
4306 bool nir_lower_variable_initializers(nir_shader *shader,
4307 nir_variable_mode modes);
4308
4309 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
4310 bool nir_lower_vec_to_movs(nir_shader *shader);
4311 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
4312 bool alpha_to_one,
4313 const gl_state_index16 *alpha_ref_state_tokens);
4314 bool nir_lower_alu(nir_shader *shader);
4315
4316 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
4317 bool always_precise);
4318
4319 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
4320 bool nir_lower_bool_to_bitsize(nir_shader *shader);
4321 bool nir_lower_bool_to_float(nir_shader *shader);
4322 bool nir_lower_bool_to_int32(nir_shader *shader);
4323 bool nir_lower_int_to_float(nir_shader *shader);
4324 bool nir_lower_load_const_to_scalar(nir_shader *shader);
4325 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
4326 bool nir_lower_phis_to_scalar(nir_shader *shader);
4327 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
4328 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
4329 bool outputs_only);
4330 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
4331 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
4332 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
4333
4334 bool nir_lower_fragcolor(nir_shader *shader);
4335 bool nir_lower_fragcoord_wtrans(nir_shader *shader);
4336 void nir_lower_viewport_transform(nir_shader *shader);
4337 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
4338
4339 typedef struct nir_lower_subgroups_options {
4340 uint8_t subgroup_size;
4341 uint8_t ballot_bit_size;
4342 bool lower_to_scalar:1;
4343 bool lower_vote_trivial:1;
4344 bool lower_vote_eq_to_ballot:1;
4345 bool lower_subgroup_masks:1;
4346 bool lower_shuffle:1;
4347 bool lower_shuffle_to_32bit:1;
4348 bool lower_shuffle_to_swizzle_amd:1;
4349 bool lower_quad:1;
4350 bool lower_quad_broadcast_dynamic:1;
4351 bool lower_quad_broadcast_dynamic_to_const:1;
4352 } nir_lower_subgroups_options;
4353
4354 bool nir_lower_subgroups(nir_shader *shader,
4355 const nir_lower_subgroups_options *options);
4356
4357 bool nir_lower_system_values(nir_shader *shader);
4358
4359 typedef struct nir_lower_compute_system_values_options {
4360 bool has_base_global_invocation_id:1;
4361 bool has_base_work_group_id:1;
4362 } nir_lower_compute_system_values_options;
4363
4364 bool nir_lower_compute_system_values(nir_shader *shader,
4365 const nir_lower_compute_system_values_options *options);
4366
4367 enum PACKED nir_lower_tex_packing {
4368 nir_lower_tex_packing_none = 0,
4369 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
4370 * or unsigned ints based on the sampler type
4371 */
4372 nir_lower_tex_packing_16,
4373 /* The sampler returns 1 32-bit word of 4x8 unorm */
4374 nir_lower_tex_packing_8,
4375 };
4376
4377 typedef struct nir_lower_tex_options {
4378 /**
4379 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4380 * sampler types a texture projector is lowered.
4381 */
4382 unsigned lower_txp;
4383
4384 /**
4385 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4386 */
4387 bool lower_txf_offset;
4388
4389 /**
4390 * If true, lower away nir_tex_src_offset for all rect textures.
4391 */
4392 bool lower_rect_offset;
4393
4394 /**
4395 * If true, lower rect textures to 2D, using txs to fetch the
4396 * texture dimensions and dividing the texture coords by the
4397 * texture dims to normalize.
4398 */
4399 bool lower_rect;
4400
4401 /**
4402 * If true, convert yuv to rgb.
4403 */
4404 unsigned lower_y_uv_external;
4405 unsigned lower_y_u_v_external;
4406 unsigned lower_yx_xuxv_external;
4407 unsigned lower_xy_uxvx_external;
4408 unsigned lower_ayuv_external;
4409 unsigned lower_xyuv_external;
4410 unsigned bt709_external;
4411 unsigned bt2020_external;
4412
4413 /**
4414 * To emulate certain texture wrap modes, this can be used
4415 * to saturate the specified tex coord to [0.0, 1.0]. The
4416 * bits are according to sampler #, ie. if, for example:
4417 *
4418 * (conf->saturate_s & (1 << n))
4419 *
4420 * is true, then the s coord for sampler n is saturated.
4421 *
4422 * Note that clamping must happen *after* projector lowering
4423 * so any projected texture sample instruction with a clamped
4424 * coordinate gets automatically lowered, regardless of the
4425 * 'lower_txp' setting.
4426 */
4427 unsigned saturate_s;
4428 unsigned saturate_t;
4429 unsigned saturate_r;
4430
4431 /* Bitmask of textures that need swizzling.
4432 *
4433 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4434 * swizzles[texture_index] is applied to the result of the texturing
4435 * operation.
4436 */
4437 unsigned swizzle_result;
4438
4439 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4440 * while 4 and 5 represent 0 and 1 respectively.
4441 */
4442 uint8_t swizzles[32][4];
4443
4444 /* Can be used to scale sampled values in range required by the format. */
4445 float scale_factors[32];
4446
4447 /**
4448 * Bitmap of textures that need srgb to linear conversion. If
4449 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4450 * of the texture are lowered to linear.
4451 */
4452 unsigned lower_srgb;
4453
4454 /**
4455 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4456 * LODs to nir_texop_txl.
4457 */
4458 bool lower_tex_without_implicit_lod;
4459
4460 /**
4461 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4462 */
4463 bool lower_txd_cube_map;
4464
4465 /**
4466 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4467 */
4468 bool lower_txd_3d;
4469
4470 /**
4471 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4472 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4473 * with lower_txd_cube_map.
4474 */
4475 bool lower_txd_shadow;
4476
4477 /**
4478 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4479 * Implies lower_txd_cube_map and lower_txd_shadow.
4480 */
4481 bool lower_txd;
4482
4483 /**
4484 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4485 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4486 */
4487 bool lower_txb_shadow_clamp;
4488
4489 /**
4490 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4491 * with nir_texop_txl. This includes cube maps.
4492 */
4493 bool lower_txd_shadow_clamp;
4494
4495 /**
4496 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4497 * with nir_texop_txl. This includes cube maps.
4498 */
4499 bool lower_txd_offset_clamp;
4500
4501 /**
4502 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4503 * sampler is bindless.
4504 */
4505 bool lower_txd_clamp_bindless_sampler;
4506
4507 /**
4508 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4509 * sampler index is not statically determinable to be less than 16.
4510 */
4511 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4512
4513 /**
4514 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4515 * 0-lod followed by a nir_ishr.
4516 */
4517 bool lower_txs_lod;
4518
4519 /**
4520 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4521 * mixed-up tg4 locations.
4522 */
4523 bool lower_tg4_broadcom_swizzle;
4524
4525 /**
4526 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4527 */
4528 bool lower_tg4_offsets;
4529
4530 enum nir_lower_tex_packing lower_tex_packing[32];
4531 } nir_lower_tex_options;
4532
4533 bool nir_lower_tex(nir_shader *shader,
4534 const nir_lower_tex_options *options);
4535
4536 enum nir_lower_non_uniform_access_type {
4537 nir_lower_non_uniform_ubo_access = (1 << 0),
4538 nir_lower_non_uniform_ssbo_access = (1 << 1),
4539 nir_lower_non_uniform_texture_access = (1 << 2),
4540 nir_lower_non_uniform_image_access = (1 << 3),
4541 };
4542
4543 bool nir_lower_non_uniform_access(nir_shader *shader,
4544 enum nir_lower_non_uniform_access_type);
4545
4546 enum nir_lower_idiv_path {
4547 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4548 * the two but it is not exact in some cases (for example, 1091317713u /
4549 * 1034u gives 5209173 instead of 1055432) */
4550 nir_lower_idiv_fast,
4551 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4552 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4553 * the nv50 path and many of them are integer multiplications, so it is
4554 * probably slower. It should always return the correct result, though. */
4555 nir_lower_idiv_precise,
4556 };
4557
4558 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4559
4560 typedef struct nir_input_attachment_options {
4561 bool use_fragcoord_sysval;
4562 bool use_layer_id_sysval;
4563 bool use_view_id_for_layer;
4564 } nir_input_attachment_options;
4565
4566 bool nir_lower_input_attachments(nir_shader *shader,
4567 const nir_input_attachment_options *options);
4568
4569 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4570 bool use_vars,
4571 bool use_clipdist_array,
4572 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4573 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4574 bool use_clipdist_array,
4575 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4576 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4577 bool use_clipdist_array);
4578 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4579 bool nir_lower_clip_disable(nir_shader *shader, unsigned clip_plane_enable);
4580
4581 void nir_lower_point_size_mov(nir_shader *shader,
4582 const gl_state_index16 *pointsize_state_tokens);
4583
4584 bool nir_lower_frexp(nir_shader *nir);
4585
4586 void nir_lower_two_sided_color(nir_shader *shader, bool face_sysval);
4587
4588 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4589
4590 bool nir_lower_flatshade(nir_shader *shader);
4591
4592 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4593 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4594 const gl_state_index16 *uniform_state_tokens);
4595
4596 typedef struct nir_lower_wpos_ytransform_options {
4597 gl_state_index16 state_tokens[STATE_LENGTH];
4598 bool fs_coord_origin_upper_left :1;
4599 bool fs_coord_origin_lower_left :1;
4600 bool fs_coord_pixel_center_integer :1;
4601 bool fs_coord_pixel_center_half_integer :1;
4602 } nir_lower_wpos_ytransform_options;
4603
4604 bool nir_lower_wpos_ytransform(nir_shader *shader,
4605 const nir_lower_wpos_ytransform_options *options);
4606 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4607
4608 bool nir_lower_wrmasks(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
4609
4610 bool nir_lower_fb_read(nir_shader *shader);
4611
4612 typedef struct nir_lower_drawpixels_options {
4613 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4614 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4615 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4616 unsigned drawpix_sampler;
4617 unsigned pixelmap_sampler;
4618 bool pixel_maps :1;
4619 bool scale_and_bias :1;
4620 } nir_lower_drawpixels_options;
4621
4622 void nir_lower_drawpixels(nir_shader *shader,
4623 const nir_lower_drawpixels_options *options);
4624
4625 typedef struct nir_lower_bitmap_options {
4626 unsigned sampler;
4627 bool swizzle_xxxx;
4628 } nir_lower_bitmap_options;
4629
4630 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4631
4632 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4633
4634 typedef enum {
4635 nir_lower_int_source_mods = 1 << 0,
4636 nir_lower_float_source_mods = 1 << 1,
4637 nir_lower_triop_abs = 1 << 2,
4638 nir_lower_all_source_mods = (1 << 3) - 1
4639 } nir_lower_to_source_mods_flags;
4640
4641
4642 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4643
4644 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4645
4646 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4647
4648 bool nir_lower_bit_size(nir_shader *shader,
4649 nir_lower_bit_size_callback callback,
4650 void *callback_data);
4651 bool nir_lower_64bit_phis(nir_shader *shader);
4652
4653 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4654 bool nir_lower_int64(nir_shader *shader);
4655
4656 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4657 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4658 nir_lower_doubles_options options);
4659 bool nir_lower_pack(nir_shader *shader);
4660
4661 void nir_lower_mediump_outputs(nir_shader *nir);
4662
4663 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4664
4665 typedef enum {
4666 nir_lower_interpolation_at_sample = (1 << 1),
4667 nir_lower_interpolation_at_offset = (1 << 2),
4668 nir_lower_interpolation_centroid = (1 << 3),
4669 nir_lower_interpolation_pixel = (1 << 4),
4670 nir_lower_interpolation_sample = (1 << 5),
4671 } nir_lower_interpolation_options;
4672
4673 bool nir_lower_interpolation(nir_shader *shader,
4674 nir_lower_interpolation_options options);
4675
4676 bool nir_lower_discard_to_demote(nir_shader *shader);
4677
4678 bool nir_lower_memory_model(nir_shader *shader);
4679
4680 bool nir_lower_goto_ifs(nir_shader *shader);
4681
4682 bool nir_normalize_cubemap_coords(nir_shader *shader);
4683
4684 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4685
4686 void nir_loop_analyze_impl(nir_function_impl *impl,
4687 nir_variable_mode indirect_mask);
4688
4689 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4690
4691 bool nir_repair_ssa_impl(nir_function_impl *impl);
4692 bool nir_repair_ssa(nir_shader *shader);
4693
4694 void nir_convert_loop_to_lcssa(nir_loop *loop);
4695 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4696 void nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4697
4698 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4699 * registers. If false, convert all values (even those not involved in a phi
4700 * node) to registers.
4701 */
4702 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4703
4704 bool nir_lower_phis_to_regs_block(nir_block *block);
4705 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4706 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4707
4708 bool nir_lower_samplers(nir_shader *shader);
4709 bool nir_lower_ssbo(nir_shader *shader);
4710
4711 /* This is here for unit tests. */
4712 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4713
4714 bool nir_opt_comparison_pre(nir_shader *shader);
4715
4716 bool nir_opt_access(nir_shader *shader);
4717 bool nir_opt_algebraic(nir_shader *shader);
4718 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4719 bool nir_opt_algebraic_late(nir_shader *shader);
4720 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4721 bool nir_opt_constant_folding(nir_shader *shader);
4722
4723 /* Try to combine a and b into a. Return true if combination was possible,
4724 * which will result in b being removed by the pass. Return false if
4725 * combination wasn't possible.
4726 */
4727 typedef bool (*nir_combine_memory_barrier_cb)(
4728 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4729
4730 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4731 nir_combine_memory_barrier_cb combine_cb,
4732 void *data);
4733
4734 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4735
4736 bool nir_copy_prop(nir_shader *shader);
4737
4738 bool nir_opt_copy_prop_vars(nir_shader *shader);
4739
4740 bool nir_opt_cse(nir_shader *shader);
4741
4742 bool nir_opt_dce(nir_shader *shader);
4743
4744 bool nir_opt_dead_cf(nir_shader *shader);
4745
4746 bool nir_opt_dead_write_vars(nir_shader *shader);
4747
4748 bool nir_opt_deref_impl(nir_function_impl *impl);
4749 bool nir_opt_deref(nir_shader *shader);
4750
4751 bool nir_opt_find_array_copies(nir_shader *shader);
4752
4753 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4754
4755 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4756
4757 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4758
4759 bool nir_opt_intrinsics(nir_shader *shader);
4760
4761 bool nir_opt_large_constants(nir_shader *shader,
4762 glsl_type_size_align_func size_align,
4763 unsigned threshold);
4764
4765 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4766
4767 typedef enum {
4768 nir_move_const_undef = (1 << 0),
4769 nir_move_load_ubo = (1 << 1),
4770 nir_move_load_input = (1 << 2),
4771 nir_move_comparisons = (1 << 3),
4772 nir_move_copies = (1 << 4),
4773 } nir_move_options;
4774
4775 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4776
4777 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4778
4779 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4780
4781 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4782 bool indirect_load_ok, bool expensive_alu_ok);
4783
4784 bool nir_opt_rematerialize_compares(nir_shader *shader);
4785
4786 bool nir_opt_remove_phis(nir_shader *shader);
4787 bool nir_opt_remove_phis_block(nir_block *block);
4788
4789 bool nir_opt_shrink_vectors(nir_shader *shader);
4790
4791 bool nir_opt_trivial_continues(nir_shader *shader);
4792
4793 bool nir_opt_undef(nir_shader *shader);
4794
4795 typedef bool (*nir_opt_vectorize_cb)(const nir_instr *a, const nir_instr *b,
4796 void *data);
4797 bool nir_opt_vectorize(nir_shader *shader, nir_opt_vectorize_cb filter,
4798 void *data);
4799
4800 bool nir_opt_conditional_discard(nir_shader *shader);
4801
4802 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4803 unsigned num_components, unsigned high_offset,
4804 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4805
4806 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4807 nir_should_vectorize_mem_func callback,
4808 nir_variable_mode robust_modes);
4809
4810 void nir_sweep(nir_shader *shader);
4811
4812 void nir_remap_dual_slot_attributes(nir_shader *shader,
4813 uint64_t *dual_slot_inputs);
4814 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4815
4816 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4817 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4818
4819 static inline bool
4820 nir_variable_is_in_ubo(const nir_variable *var)
4821 {
4822 return (var->data.mode == nir_var_mem_ubo &&
4823 var->interface_type != NULL);
4824 }
4825
4826 static inline bool
4827 nir_variable_is_in_ssbo(const nir_variable *var)
4828 {
4829 return (var->data.mode == nir_var_mem_ssbo &&
4830 var->interface_type != NULL);
4831 }
4832
4833 static inline bool
4834 nir_variable_is_in_block(const nir_variable *var)
4835 {
4836 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4837 }
4838
4839 typedef struct nir_unsigned_upper_bound_config {
4840 unsigned min_subgroup_size;
4841 unsigned max_subgroup_size;
4842 unsigned max_work_group_invocations;
4843 unsigned max_work_group_count[3];
4844 unsigned max_work_group_size[3];
4845
4846 uint32_t vertex_attrib_max[32];
4847 } nir_unsigned_upper_bound_config;
4848
4849 uint32_t
4850 nir_unsigned_upper_bound(nir_shader *shader, struct hash_table *range_ht,
4851 nir_ssa_scalar scalar,
4852 const nir_unsigned_upper_bound_config *config);
4853
4854 bool
4855 nir_addition_might_overflow(nir_shader *shader, struct hash_table *range_ht,
4856 nir_ssa_scalar ssa, unsigned const_val,
4857 const nir_unsigned_upper_bound_config *config);
4858
4859 #ifdef __cplusplus
4860 } /* extern "C" */
4861 #endif
4862
4863 #endif /* NIR_H */