cb702ca3023aad2386e5f8310747369b1d9e976d
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/enum_operators.h"
40 #include "util/macros.h"
41 #include "util/format/u_format.h"
42 #include "compiler/nir_types.h"
43 #include "compiler/shader_enums.h"
44 #include "compiler/shader_info.h"
45 #define XXH_INLINE_ALL
46 #include "util/xxhash.h"
47 #include <stdio.h>
48
49 #ifndef NDEBUG
50 #include "util/debug.h"
51 #endif /* NDEBUG */
52
53 #include "nir_opcodes.h"
54
55 #if defined(_WIN32) && !defined(snprintf)
56 #define snprintf _snprintf
57 #endif
58
59 #ifdef __cplusplus
60 extern "C" {
61 #endif
62
63 #define NIR_FALSE 0u
64 #define NIR_TRUE (~0u)
65 #define NIR_MAX_VEC_COMPONENTS 16
66 #define NIR_MAX_MATRIX_COLUMNS 4
67 #define NIR_STREAM_PACKED (1 << 8)
68 typedef uint16_t nir_component_mask_t;
69
70 static inline bool
71 nir_num_components_valid(unsigned num_components)
72 {
73 return (num_components >= 1 &&
74 num_components <= 4) ||
75 num_components == 8 ||
76 num_components == 16;
77 }
78
79 /** Defines a cast function
80 *
81 * This macro defines a cast function from in_type to out_type where
82 * out_type is some structure type that contains a field of type out_type.
83 *
84 * Note that you have to be a bit careful as the generated cast function
85 * destroys constness.
86 */
87 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
88 type_field, type_value) \
89 static inline out_type * \
90 name(const in_type *parent) \
91 { \
92 assert(parent && parent->type_field == type_value); \
93 return exec_node_data(out_type, parent, field); \
94 }
95
96 struct nir_function;
97 struct nir_shader;
98 struct nir_instr;
99 struct nir_builder;
100
101
102 /**
103 * Description of built-in state associated with a uniform
104 *
105 * \sa nir_variable::state_slots
106 */
107 typedef struct {
108 gl_state_index16 tokens[STATE_LENGTH];
109 uint16_t swizzle;
110 } nir_state_slot;
111
112 typedef enum {
113 nir_var_shader_in = (1 << 0),
114 nir_var_shader_out = (1 << 1),
115 nir_var_shader_temp = (1 << 2),
116 nir_var_function_temp = (1 << 3),
117 nir_var_uniform = (1 << 4),
118 nir_var_mem_ubo = (1 << 5),
119 nir_var_system_value = (1 << 6),
120 nir_var_mem_ssbo = (1 << 7),
121 nir_var_mem_shared = (1 << 8),
122 nir_var_mem_global = (1 << 9),
123 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
124 nir_var_mem_constant = (1 << 11),
125 nir_num_variable_modes = 12,
126 nir_var_all = (1 << nir_num_variable_modes) - 1,
127 } nir_variable_mode;
128 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_variable_mode)
129
130 /**
131 * Rounding modes.
132 */
133 typedef enum {
134 nir_rounding_mode_undef = 0,
135 nir_rounding_mode_rtne = 1, /* round to nearest even */
136 nir_rounding_mode_ru = 2, /* round up */
137 nir_rounding_mode_rd = 3, /* round down */
138 nir_rounding_mode_rtz = 4, /* round towards zero */
139 } nir_rounding_mode;
140
141 typedef union {
142 bool b;
143 float f32;
144 double f64;
145 int8_t i8;
146 uint8_t u8;
147 int16_t i16;
148 uint16_t u16;
149 int32_t i32;
150 uint32_t u32;
151 int64_t i64;
152 uint64_t u64;
153 } nir_const_value;
154
155 #define nir_const_value_to_array(arr, c, components, m) \
156 { \
157 for (unsigned i = 0; i < components; ++i) \
158 arr[i] = c[i].m; \
159 } while (false)
160
161 static inline nir_const_value
162 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
163 {
164 nir_const_value v;
165 memset(&v, 0, sizeof(v));
166
167 switch (bit_size) {
168 case 1: v.b = x; break;
169 case 8: v.u8 = x; break;
170 case 16: v.u16 = x; break;
171 case 32: v.u32 = x; break;
172 case 64: v.u64 = x; break;
173 default:
174 unreachable("Invalid bit size");
175 }
176
177 return v;
178 }
179
180 static inline nir_const_value
181 nir_const_value_for_int(int64_t i, unsigned bit_size)
182 {
183 nir_const_value v;
184 memset(&v, 0, sizeof(v));
185
186 assert(bit_size <= 64);
187 if (bit_size < 64) {
188 assert(i >= (-(1ll << (bit_size - 1))));
189 assert(i < (1ll << (bit_size - 1)));
190 }
191
192 return nir_const_value_for_raw_uint(i, bit_size);
193 }
194
195 static inline nir_const_value
196 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
197 {
198 nir_const_value v;
199 memset(&v, 0, sizeof(v));
200
201 assert(bit_size <= 64);
202 if (bit_size < 64)
203 assert(u < (1ull << bit_size));
204
205 return nir_const_value_for_raw_uint(u, bit_size);
206 }
207
208 static inline nir_const_value
209 nir_const_value_for_bool(bool b, unsigned bit_size)
210 {
211 /* Booleans use a 0/-1 convention */
212 return nir_const_value_for_int(-(int)b, bit_size);
213 }
214
215 /* This one isn't inline because it requires half-float conversion */
216 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
217
218 static inline int64_t
219 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
220 {
221 switch (bit_size) {
222 /* int1_t uses 0/-1 convention */
223 case 1: return -(int)value.b;
224 case 8: return value.i8;
225 case 16: return value.i16;
226 case 32: return value.i32;
227 case 64: return value.i64;
228 default:
229 unreachable("Invalid bit size");
230 }
231 }
232
233 static inline uint64_t
234 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
235 {
236 switch (bit_size) {
237 case 1: return value.b;
238 case 8: return value.u8;
239 case 16: return value.u16;
240 case 32: return value.u32;
241 case 64: return value.u64;
242 default:
243 unreachable("Invalid bit size");
244 }
245 }
246
247 static inline bool
248 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
249 {
250 int64_t i = nir_const_value_as_int(value, bit_size);
251
252 /* Booleans of any size use 0/-1 convention */
253 assert(i == 0 || i == -1);
254
255 return i;
256 }
257
258 /* This one isn't inline because it requires half-float conversion */
259 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
260
261 typedef struct nir_constant {
262 /**
263 * Value of the constant.
264 *
265 * The field used to back the values supplied by the constant is determined
266 * by the type associated with the \c nir_variable. Constants may be
267 * scalars, vectors, or matrices.
268 */
269 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
270
271 /* we could get this from the var->type but makes clone *much* easier to
272 * not have to care about the type.
273 */
274 unsigned num_elements;
275
276 /* Array elements / Structure Fields */
277 struct nir_constant **elements;
278 } nir_constant;
279
280 /**
281 * \brief Layout qualifiers for gl_FragDepth.
282 *
283 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
284 * with a layout qualifier.
285 */
286 typedef enum {
287 nir_depth_layout_none, /**< No depth layout is specified. */
288 nir_depth_layout_any,
289 nir_depth_layout_greater,
290 nir_depth_layout_less,
291 nir_depth_layout_unchanged
292 } nir_depth_layout;
293
294 /**
295 * Enum keeping track of how a variable was declared.
296 */
297 typedef enum {
298 /**
299 * Normal declaration.
300 */
301 nir_var_declared_normally = 0,
302
303 /**
304 * Variable is implicitly generated by the compiler and should not be
305 * visible via the API.
306 */
307 nir_var_hidden,
308 } nir_var_declaration_type;
309
310 /**
311 * Either a uniform, global variable, shader input, or shader output. Based on
312 * ir_variable - it should be easy to translate between the two.
313 */
314
315 typedef struct nir_variable {
316 struct exec_node node;
317
318 /**
319 * Declared type of the variable
320 */
321 const struct glsl_type *type;
322
323 /**
324 * Declared name of the variable
325 */
326 char *name;
327
328 struct nir_variable_data {
329 /**
330 * Storage class of the variable.
331 *
332 * \sa nir_variable_mode
333 */
334 unsigned mode:12;
335
336 /**
337 * Is the variable read-only?
338 *
339 * This is set for variables declared as \c const, shader inputs,
340 * and uniforms.
341 */
342 unsigned read_only:1;
343 unsigned centroid:1;
344 unsigned sample:1;
345 unsigned patch:1;
346 unsigned invariant:1;
347
348 /**
349 * Precision qualifier.
350 *
351 * In desktop GLSL we do not care about precision qualifiers at all, in
352 * fact, the spec says that precision qualifiers are ignored.
353 *
354 * To make things easy, we make it so that this field is always
355 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
356 * have the same precision value and the checks we add in the compiler
357 * for this field will never break a desktop shader compile.
358 */
359 unsigned precision:2;
360
361 /**
362 * Can this variable be coalesced with another?
363 *
364 * This is set by nir_lower_io_to_temporaries to say that any
365 * copies involving this variable should stay put. Propagating it can
366 * duplicate the resulting load/store, which is not wanted, and may
367 * result in a load/store of the variable with an indirect offset which
368 * the backend may not be able to handle.
369 */
370 unsigned cannot_coalesce:1;
371
372 /**
373 * When separate shader programs are enabled, only input/outputs between
374 * the stages of a multi-stage separate program can be safely removed
375 * from the shader interface. Other input/outputs must remains active.
376 *
377 * This is also used to make sure xfb varyings that are unused by the
378 * fragment shader are not removed.
379 */
380 unsigned always_active_io:1;
381
382 /**
383 * Interpolation mode for shader inputs / outputs
384 *
385 * \sa glsl_interp_mode
386 */
387 unsigned interpolation:3;
388
389 /**
390 * If non-zero, then this variable may be packed along with other variables
391 * into a single varying slot, so this offset should be applied when
392 * accessing components. For example, an offset of 1 means that the x
393 * component of this variable is actually stored in component y of the
394 * location specified by \c location.
395 */
396 unsigned location_frac:2;
397
398 /**
399 * If true, this variable represents an array of scalars that should
400 * be tightly packed. In other words, consecutive array elements
401 * should be stored one component apart, rather than one slot apart.
402 */
403 unsigned compact:1;
404
405 /**
406 * Whether this is a fragment shader output implicitly initialized with
407 * the previous contents of the specified render target at the
408 * framebuffer location corresponding to this shader invocation.
409 */
410 unsigned fb_fetch_output:1;
411
412 /**
413 * Non-zero if this variable is considered bindless as defined by
414 * ARB_bindless_texture.
415 */
416 unsigned bindless:1;
417
418 /**
419 * Was an explicit binding set in the shader?
420 */
421 unsigned explicit_binding:1;
422
423 /**
424 * Was the location explicitly set in the shader?
425 *
426 * If the location is explicitly set in the shader, it \b cannot be changed
427 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
428 * no effect).
429 */
430 unsigned explicit_location:1;
431
432 /**
433 * Was a transfer feedback buffer set in the shader?
434 */
435 unsigned explicit_xfb_buffer:1;
436
437 /**
438 * Was a transfer feedback stride set in the shader?
439 */
440 unsigned explicit_xfb_stride:1;
441
442 /**
443 * Was an explicit offset set in the shader?
444 */
445 unsigned explicit_offset:1;
446
447 /**
448 * Layout of the matrix. Uses glsl_matrix_layout values.
449 */
450 unsigned matrix_layout:2;
451
452 /**
453 * Non-zero if this variable was created by lowering a named interface
454 * block.
455 */
456 unsigned from_named_ifc_block:1;
457
458 /**
459 * How the variable was declared. See nir_var_declaration_type.
460 *
461 * This is used to detect variables generated by the compiler, so should
462 * not be visible via the API.
463 */
464 unsigned how_declared:2;
465
466 /**
467 * Is this variable per-view? If so, we know it must be an array with
468 * size corresponding to the number of views.
469 */
470 unsigned per_view:1;
471
472 /**
473 * \brief Layout qualifier for gl_FragDepth. See nir_depth_layout.
474 *
475 * This is not equal to \c ir_depth_layout_none if and only if this
476 * variable is \c gl_FragDepth and a layout qualifier is specified.
477 */
478 unsigned depth_layout:3;
479
480 /**
481 * Vertex stream output identifier.
482 *
483 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
484 * indicate the stream of the i-th component.
485 */
486 unsigned stream:9;
487
488 /**
489 * See gl_access_qualifier.
490 *
491 * Access flags for memory variables (SSBO/global), image uniforms, and
492 * bindless images in uniforms/inputs/outputs.
493 */
494 unsigned access:8;
495
496 /**
497 * Descriptor set binding for sampler or UBO.
498 */
499 unsigned descriptor_set:5;
500
501 /**
502 * output index for dual source blending.
503 */
504 unsigned index;
505
506 /**
507 * Initial binding point for a sampler or UBO.
508 *
509 * For array types, this represents the binding point for the first element.
510 */
511 unsigned binding;
512
513 /**
514 * Storage location of the base of this variable
515 *
516 * The precise meaning of this field depends on the nature of the variable.
517 *
518 * - Vertex shader input: one of the values from \c gl_vert_attrib.
519 * - Vertex shader output: one of the values from \c gl_varying_slot.
520 * - Geometry shader input: one of the values from \c gl_varying_slot.
521 * - Geometry shader output: one of the values from \c gl_varying_slot.
522 * - Fragment shader input: one of the values from \c gl_varying_slot.
523 * - Fragment shader output: one of the values from \c gl_frag_result.
524 * - Uniforms: Per-stage uniform slot number for default uniform block.
525 * - Uniforms: Index within the uniform block definition for UBO members.
526 * - Non-UBO Uniforms: uniform slot number.
527 * - Other: This field is not currently used.
528 *
529 * If the variable is a uniform, shader input, or shader output, and the
530 * slot has not been assigned, the value will be -1.
531 */
532 int location;
533
534 /**
535 * The actual location of the variable in the IR. Only valid for inputs,
536 * outputs, and uniforms (including samplers and images).
537 */
538 unsigned driver_location;
539
540 /**
541 * Location an atomic counter or transform feedback is stored at.
542 */
543 unsigned offset;
544
545 union {
546 struct {
547 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
548 enum pipe_format format;
549 } image;
550
551 struct {
552 /**
553 * For OpenCL inline samplers. See cl_sampler_addressing_mode and cl_sampler_filter_mode
554 */
555 unsigned is_inline_sampler : 1;
556 unsigned addressing_mode : 3;
557 unsigned normalized_coordinates : 1;
558 unsigned filter_mode : 1;
559 } sampler;
560
561 struct {
562 /**
563 * Transform feedback buffer.
564 */
565 uint16_t buffer:2;
566
567 /**
568 * Transform feedback stride.
569 */
570 uint16_t stride;
571 } xfb;
572 };
573 } data;
574
575 /**
576 * Identifier for this variable generated by nir_index_vars() that is unique
577 * among other variables in the same exec_list.
578 */
579 unsigned index;
580
581 /* Number of nir_variable_data members */
582 uint16_t num_members;
583
584 /**
585 * Built-in state that backs this uniform
586 *
587 * Once set at variable creation, \c state_slots must remain invariant.
588 * This is because, ideally, this array would be shared by all clones of
589 * this variable in the IR tree. In other words, we'd really like for it
590 * to be a fly-weight.
591 *
592 * If the variable is not a uniform, \c num_state_slots will be zero and
593 * \c state_slots will be \c NULL.
594 */
595 /*@{*/
596 uint16_t num_state_slots; /**< Number of state slots used */
597 nir_state_slot *state_slots; /**< State descriptors. */
598 /*@}*/
599
600 /**
601 * Constant expression assigned in the initializer of the variable
602 *
603 * This field should only be used temporarily by creators of NIR shaders
604 * and then lower_constant_initializers can be used to get rid of them.
605 * Most of the rest of NIR ignores this field or asserts that it's NULL.
606 */
607 nir_constant *constant_initializer;
608
609 /**
610 * Global variable assigned in the initializer of the variable
611 * This field should only be used temporarily by creators of NIR shaders
612 * and then lower_constant_initializers can be used to get rid of them.
613 * Most of the rest of NIR ignores this field or asserts that it's NULL.
614 */
615 struct nir_variable *pointer_initializer;
616
617 /**
618 * For variables that are in an interface block or are an instance of an
619 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
620 *
621 * \sa ir_variable::location
622 */
623 const struct glsl_type *interface_type;
624
625 /**
626 * Description of per-member data for per-member struct variables
627 *
628 * This is used for variables which are actually an amalgamation of
629 * multiple entities such as a struct of built-in values or a struct of
630 * inputs each with their own layout specifier. This is only allowed on
631 * variables with a struct or array of array of struct type.
632 */
633 struct nir_variable_data *members;
634 } nir_variable;
635
636 static inline bool
637 _nir_shader_variable_has_mode(nir_variable *var, unsigned modes)
638 {
639 /* This isn't a shader variable */
640 assert(!(modes & nir_var_function_temp));
641 return var->data.mode & modes;
642 }
643
644 #define nir_foreach_variable_in_list(var, var_list) \
645 foreach_list_typed(nir_variable, var, node, var_list)
646
647 #define nir_foreach_variable_in_list_safe(var, var_list) \
648 foreach_list_typed_safe(nir_variable, var, node, var_list)
649
650 #define nir_foreach_variable_in_shader(var, shader) \
651 nir_foreach_variable_in_list(var, &(shader)->variables)
652
653 #define nir_foreach_variable_in_shader_safe(var, shader) \
654 nir_foreach_variable_in_list_safe(var, &(shader)->variables)
655
656 #define nir_foreach_variable_with_modes(var, shader, modes) \
657 nir_foreach_variable_in_shader(var, shader) \
658 if (_nir_shader_variable_has_mode(var, modes))
659
660 #define nir_foreach_variable_with_modes_safe(var, shader, modes) \
661 nir_foreach_variable_in_shader_safe(var, shader) \
662 if (_nir_shader_variable_has_mode(var, modes))
663
664 #define nir_foreach_shader_in_variable(var, shader) \
665 nir_foreach_variable_with_modes(var, shader, nir_var_shader_in)
666
667 #define nir_foreach_shader_in_variable_safe(var, shader) \
668 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_in)
669
670 #define nir_foreach_shader_out_variable(var, shader) \
671 nir_foreach_variable_with_modes(var, shader, nir_var_shader_out)
672
673 #define nir_foreach_shader_out_variable_safe(var, shader) \
674 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_out)
675
676 #define nir_foreach_uniform_variable(var, shader) \
677 nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
678
679 #define nir_foreach_uniform_variable_safe(var, shader) \
680 nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
681
682 static inline bool
683 nir_variable_is_global(const nir_variable *var)
684 {
685 return var->data.mode != nir_var_function_temp;
686 }
687
688 typedef struct nir_register {
689 struct exec_node node;
690
691 unsigned num_components; /** < number of vector components */
692 unsigned num_array_elems; /** < size of array (0 for no array) */
693
694 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
695 uint8_t bit_size;
696
697 /** generic register index. */
698 unsigned index;
699
700 /** only for debug purposes, can be NULL */
701 const char *name;
702
703 /** set of nir_srcs where this register is used (read from) */
704 struct list_head uses;
705
706 /** set of nir_dests where this register is defined (written to) */
707 struct list_head defs;
708
709 /** set of nir_ifs where this register is used as a condition */
710 struct list_head if_uses;
711 } nir_register;
712
713 #define nir_foreach_register(reg, reg_list) \
714 foreach_list_typed(nir_register, reg, node, reg_list)
715 #define nir_foreach_register_safe(reg, reg_list) \
716 foreach_list_typed_safe(nir_register, reg, node, reg_list)
717
718 typedef enum PACKED {
719 nir_instr_type_alu,
720 nir_instr_type_deref,
721 nir_instr_type_call,
722 nir_instr_type_tex,
723 nir_instr_type_intrinsic,
724 nir_instr_type_load_const,
725 nir_instr_type_jump,
726 nir_instr_type_ssa_undef,
727 nir_instr_type_phi,
728 nir_instr_type_parallel_copy,
729 } nir_instr_type;
730
731 typedef struct nir_instr {
732 struct exec_node node;
733 struct nir_block *block;
734 nir_instr_type type;
735
736 /* A temporary for optimization and analysis passes to use for storing
737 * flags. For instance, DCE uses this to store the "dead/live" info.
738 */
739 uint8_t pass_flags;
740
741 /** generic instruction index. */
742 unsigned index;
743 } nir_instr;
744
745 static inline nir_instr *
746 nir_instr_next(nir_instr *instr)
747 {
748 struct exec_node *next = exec_node_get_next(&instr->node);
749 if (exec_node_is_tail_sentinel(next))
750 return NULL;
751 else
752 return exec_node_data(nir_instr, next, node);
753 }
754
755 static inline nir_instr *
756 nir_instr_prev(nir_instr *instr)
757 {
758 struct exec_node *prev = exec_node_get_prev(&instr->node);
759 if (exec_node_is_head_sentinel(prev))
760 return NULL;
761 else
762 return exec_node_data(nir_instr, prev, node);
763 }
764
765 static inline bool
766 nir_instr_is_first(const nir_instr *instr)
767 {
768 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
769 }
770
771 static inline bool
772 nir_instr_is_last(const nir_instr *instr)
773 {
774 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
775 }
776
777 typedef struct nir_ssa_def {
778 /** for debugging only, can be NULL */
779 const char* name;
780
781 /** generic SSA definition index. */
782 unsigned index;
783
784 /** Ordered SSA definition index used by nir_liveness. */
785 unsigned live_index;
786
787 /** Instruction which produces this SSA value. */
788 nir_instr *parent_instr;
789
790 /** set of nir_instrs where this register is used (read from) */
791 struct list_head uses;
792
793 /** set of nir_ifs where this register is used as a condition */
794 struct list_head if_uses;
795
796 uint8_t num_components;
797
798 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
799 uint8_t bit_size;
800
801 /**
802 * True if this SSA value may have different values in different SIMD
803 * invocations of the shader. This is set by nir_divergence_analysis.
804 */
805 bool divergent;
806 } nir_ssa_def;
807
808 struct nir_src;
809
810 typedef struct {
811 nir_register *reg;
812 struct nir_src *indirect; /** < NULL for no indirect offset */
813 unsigned base_offset;
814
815 /* TODO use-def chain goes here */
816 } nir_reg_src;
817
818 typedef struct {
819 nir_instr *parent_instr;
820 struct list_head def_link;
821
822 nir_register *reg;
823 struct nir_src *indirect; /** < NULL for no indirect offset */
824 unsigned base_offset;
825
826 /* TODO def-use chain goes here */
827 } nir_reg_dest;
828
829 struct nir_if;
830
831 typedef struct nir_src {
832 union {
833 /** Instruction that consumes this value as a source. */
834 nir_instr *parent_instr;
835 struct nir_if *parent_if;
836 };
837
838 struct list_head use_link;
839
840 union {
841 nir_reg_src reg;
842 nir_ssa_def *ssa;
843 };
844
845 bool is_ssa;
846 } nir_src;
847
848 static inline nir_src
849 nir_src_init(void)
850 {
851 nir_src src = { { NULL } };
852 return src;
853 }
854
855 #define NIR_SRC_INIT nir_src_init()
856
857 #define nir_foreach_use(src, reg_or_ssa_def) \
858 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
859
860 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
861 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
862
863 #define nir_foreach_if_use(src, reg_or_ssa_def) \
864 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
865
866 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
867 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
868
869 typedef struct {
870 union {
871 nir_reg_dest reg;
872 nir_ssa_def ssa;
873 };
874
875 bool is_ssa;
876 } nir_dest;
877
878 static inline nir_dest
879 nir_dest_init(void)
880 {
881 nir_dest dest = { { { NULL } } };
882 return dest;
883 }
884
885 #define NIR_DEST_INIT nir_dest_init()
886
887 #define nir_foreach_def(dest, reg) \
888 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
889
890 #define nir_foreach_def_safe(dest, reg) \
891 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
892
893 static inline nir_src
894 nir_src_for_ssa(nir_ssa_def *def)
895 {
896 nir_src src = NIR_SRC_INIT;
897
898 src.is_ssa = true;
899 src.ssa = def;
900
901 return src;
902 }
903
904 static inline nir_src
905 nir_src_for_reg(nir_register *reg)
906 {
907 nir_src src = NIR_SRC_INIT;
908
909 src.is_ssa = false;
910 src.reg.reg = reg;
911 src.reg.indirect = NULL;
912 src.reg.base_offset = 0;
913
914 return src;
915 }
916
917 static inline nir_dest
918 nir_dest_for_reg(nir_register *reg)
919 {
920 nir_dest dest = NIR_DEST_INIT;
921
922 dest.reg.reg = reg;
923
924 return dest;
925 }
926
927 static inline unsigned
928 nir_src_bit_size(nir_src src)
929 {
930 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
931 }
932
933 static inline unsigned
934 nir_src_num_components(nir_src src)
935 {
936 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
937 }
938
939 static inline bool
940 nir_src_is_const(nir_src src)
941 {
942 return src.is_ssa &&
943 src.ssa->parent_instr->type == nir_instr_type_load_const;
944 }
945
946 static inline bool
947 nir_src_is_divergent(nir_src src)
948 {
949 assert(src.is_ssa);
950 return src.ssa->divergent;
951 }
952
953 static inline unsigned
954 nir_dest_bit_size(nir_dest dest)
955 {
956 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
957 }
958
959 static inline unsigned
960 nir_dest_num_components(nir_dest dest)
961 {
962 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
963 }
964
965 static inline bool
966 nir_dest_is_divergent(nir_dest dest)
967 {
968 assert(dest.is_ssa);
969 return dest.ssa.divergent;
970 }
971
972 /* Are all components the same, ie. .xxxx */
973 static inline bool
974 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
975 {
976 for (unsigned i = 1; i < nr_comp; i++)
977 if (swiz[i] != swiz[0])
978 return false;
979 return true;
980 }
981
982 /* Are all components sequential, ie. .yzw */
983 static inline bool
984 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
985 {
986 for (unsigned i = 1; i < nr_comp; i++)
987 if (swiz[i] != (swiz[0] + i))
988 return false;
989 return true;
990 }
991
992 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
993 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
994
995 typedef struct {
996 nir_src src;
997
998 /**
999 * \name input modifiers
1000 */
1001 /*@{*/
1002 /**
1003 * For inputs interpreted as floating point, flips the sign bit. For
1004 * inputs interpreted as integers, performs the two's complement negation.
1005 */
1006 bool negate;
1007
1008 /**
1009 * Clears the sign bit for floating point values, and computes the integer
1010 * absolute value for integers. Note that the negate modifier acts after
1011 * the absolute value modifier, therefore if both are set then all inputs
1012 * will become negative.
1013 */
1014 bool abs;
1015 /*@}*/
1016
1017 /**
1018 * For each input component, says which component of the register it is
1019 * chosen from. Note that which elements of the swizzle are used and which
1020 * are ignored are based on the write mask for most opcodes - for example,
1021 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
1022 * a swizzle of {2, x, 1, 0} where x means "don't care."
1023 */
1024 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
1025 } nir_alu_src;
1026
1027 typedef struct {
1028 nir_dest dest;
1029
1030 /**
1031 * \name saturate output modifier
1032 *
1033 * Only valid for opcodes that output floating-point numbers. Clamps the
1034 * output to between 0.0 and 1.0 inclusive.
1035 */
1036
1037 bool saturate;
1038
1039 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
1040 } nir_alu_dest;
1041
1042 /** NIR sized and unsized types
1043 *
1044 * The values in this enum are carefully chosen so that the sized type is
1045 * just the unsized type OR the number of bits.
1046 */
1047 typedef enum PACKED {
1048 nir_type_invalid = 0, /* Not a valid type */
1049 nir_type_int = 2,
1050 nir_type_uint = 4,
1051 nir_type_bool = 6,
1052 nir_type_float = 128,
1053 nir_type_bool1 = 1 | nir_type_bool,
1054 nir_type_bool8 = 8 | nir_type_bool,
1055 nir_type_bool16 = 16 | nir_type_bool,
1056 nir_type_bool32 = 32 | nir_type_bool,
1057 nir_type_int1 = 1 | nir_type_int,
1058 nir_type_int8 = 8 | nir_type_int,
1059 nir_type_int16 = 16 | nir_type_int,
1060 nir_type_int32 = 32 | nir_type_int,
1061 nir_type_int64 = 64 | nir_type_int,
1062 nir_type_uint1 = 1 | nir_type_uint,
1063 nir_type_uint8 = 8 | nir_type_uint,
1064 nir_type_uint16 = 16 | nir_type_uint,
1065 nir_type_uint32 = 32 | nir_type_uint,
1066 nir_type_uint64 = 64 | nir_type_uint,
1067 nir_type_float16 = 16 | nir_type_float,
1068 nir_type_float32 = 32 | nir_type_float,
1069 nir_type_float64 = 64 | nir_type_float,
1070 } nir_alu_type;
1071
1072 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1073 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1074
1075 static inline unsigned
1076 nir_alu_type_get_type_size(nir_alu_type type)
1077 {
1078 return type & NIR_ALU_TYPE_SIZE_MASK;
1079 }
1080
1081 static inline nir_alu_type
1082 nir_alu_type_get_base_type(nir_alu_type type)
1083 {
1084 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1085 }
1086
1087 static inline nir_alu_type
1088 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1089 {
1090 switch (base_type) {
1091 case GLSL_TYPE_BOOL:
1092 return nir_type_bool1;
1093 break;
1094 case GLSL_TYPE_UINT:
1095 return nir_type_uint32;
1096 break;
1097 case GLSL_TYPE_INT:
1098 return nir_type_int32;
1099 break;
1100 case GLSL_TYPE_UINT16:
1101 return nir_type_uint16;
1102 break;
1103 case GLSL_TYPE_INT16:
1104 return nir_type_int16;
1105 break;
1106 case GLSL_TYPE_UINT8:
1107 return nir_type_uint8;
1108 case GLSL_TYPE_INT8:
1109 return nir_type_int8;
1110 case GLSL_TYPE_UINT64:
1111 return nir_type_uint64;
1112 break;
1113 case GLSL_TYPE_INT64:
1114 return nir_type_int64;
1115 break;
1116 case GLSL_TYPE_FLOAT:
1117 return nir_type_float32;
1118 break;
1119 case GLSL_TYPE_FLOAT16:
1120 return nir_type_float16;
1121 break;
1122 case GLSL_TYPE_DOUBLE:
1123 return nir_type_float64;
1124 break;
1125
1126 case GLSL_TYPE_SAMPLER:
1127 case GLSL_TYPE_IMAGE:
1128 case GLSL_TYPE_ATOMIC_UINT:
1129 case GLSL_TYPE_STRUCT:
1130 case GLSL_TYPE_INTERFACE:
1131 case GLSL_TYPE_ARRAY:
1132 case GLSL_TYPE_VOID:
1133 case GLSL_TYPE_SUBROUTINE:
1134 case GLSL_TYPE_FUNCTION:
1135 case GLSL_TYPE_ERROR:
1136 return nir_type_invalid;
1137 }
1138
1139 unreachable("unknown type");
1140 }
1141
1142 static inline nir_alu_type
1143 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1144 {
1145 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1146 }
1147
1148 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1149 nir_rounding_mode rnd);
1150
1151 static inline nir_op
1152 nir_op_vec(unsigned components)
1153 {
1154 switch (components) {
1155 case 1: return nir_op_mov;
1156 case 2: return nir_op_vec2;
1157 case 3: return nir_op_vec3;
1158 case 4: return nir_op_vec4;
1159 case 8: return nir_op_vec8;
1160 case 16: return nir_op_vec16;
1161 default: unreachable("bad component count");
1162 }
1163 }
1164
1165 static inline bool
1166 nir_op_is_vec(nir_op op)
1167 {
1168 switch (op) {
1169 case nir_op_mov:
1170 case nir_op_vec2:
1171 case nir_op_vec3:
1172 case nir_op_vec4:
1173 case nir_op_vec8:
1174 case nir_op_vec16:
1175 return true;
1176 default:
1177 return false;
1178 }
1179 }
1180
1181 static inline bool
1182 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1183 {
1184 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1185 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1186 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1187 }
1188
1189 static inline bool
1190 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1191 {
1192 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1193 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1194 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1195 }
1196
1197 static inline bool
1198 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1199 {
1200 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1201 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1202 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1203 }
1204
1205 static inline bool
1206 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1207 {
1208 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1209 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1210 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1211 }
1212
1213 static inline bool
1214 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1215 {
1216 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1217 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1218 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1219 }
1220
1221 static inline bool
1222 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1223 {
1224 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1225 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1226 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1227 }
1228
1229 static inline bool
1230 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1231 {
1232 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1233 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1234 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1235 }
1236
1237 static inline nir_rounding_mode
1238 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1239 nir_alu_type type)
1240 {
1241 if (nir_alu_type_get_base_type(type) != nir_type_float)
1242 return nir_rounding_mode_undef;
1243
1244 unsigned bit_size = nir_alu_type_get_type_size(type);
1245
1246 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1247 return nir_rounding_mode_rtz;
1248 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1249 return nir_rounding_mode_rtne;
1250 return nir_rounding_mode_undef;
1251 }
1252
1253 static inline bool
1254 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1255 {
1256 bool result =
1257 nir_has_any_rounding_mode_rtne(execution_mode) ||
1258 nir_has_any_rounding_mode_rtz(execution_mode);
1259 return result;
1260 }
1261
1262 typedef enum {
1263 /**
1264 * Operation where the first two sources are commutative.
1265 *
1266 * For 2-source operations, this just mathematical commutativity. Some
1267 * 3-source operations, like ffma, are only commutative in the first two
1268 * sources.
1269 */
1270 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1271 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1272 } nir_op_algebraic_property;
1273
1274 typedef struct {
1275 const char *name;
1276
1277 uint8_t num_inputs;
1278
1279 /**
1280 * The number of components in the output
1281 *
1282 * If non-zero, this is the size of the output and input sizes are
1283 * explicitly given; swizzle and writemask are still in effect, but if
1284 * the output component is masked out, then the input component may
1285 * still be in use.
1286 *
1287 * If zero, the opcode acts in the standard, per-component manner; the
1288 * operation is performed on each component (except the ones that are
1289 * masked out) with the input being taken from the input swizzle for
1290 * that component.
1291 *
1292 * The size of some of the inputs may be given (i.e. non-zero) even
1293 * though output_size is zero; in that case, the inputs with a zero
1294 * size act per-component, while the inputs with non-zero size don't.
1295 */
1296 uint8_t output_size;
1297
1298 /**
1299 * The type of vector that the instruction outputs. Note that the
1300 * staurate modifier is only allowed on outputs with the float type.
1301 */
1302
1303 nir_alu_type output_type;
1304
1305 /**
1306 * The number of components in each input
1307 */
1308 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1309
1310 /**
1311 * The type of vector that each input takes. Note that negate and
1312 * absolute value are only allowed on inputs with int or float type and
1313 * behave differently on the two.
1314 */
1315 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1316
1317 nir_op_algebraic_property algebraic_properties;
1318
1319 /* Whether this represents a numeric conversion opcode */
1320 bool is_conversion;
1321 } nir_op_info;
1322
1323 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1324
1325 typedef struct nir_alu_instr {
1326 nir_instr instr;
1327 nir_op op;
1328
1329 /** Indicates that this ALU instruction generates an exact value
1330 *
1331 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1332 * really equivalent to either. This indicates that the value generated by
1333 * this operation is high-precision and any code transformations that touch
1334 * it must ensure that the resulting value is bit-for-bit identical to the
1335 * original.
1336 */
1337 bool exact:1;
1338
1339 /**
1340 * Indicates that this instruction do not cause wrapping to occur, in the
1341 * form of overflow or underflow.
1342 */
1343 bool no_signed_wrap:1;
1344 bool no_unsigned_wrap:1;
1345
1346 nir_alu_dest dest;
1347 nir_alu_src src[];
1348 } nir_alu_instr;
1349
1350 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1351 nir_alu_instr *instr);
1352 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1353 nir_alu_instr *instr);
1354
1355 /* is this source channel used? */
1356 static inline bool
1357 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1358 unsigned channel)
1359 {
1360 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1361 return channel < nir_op_infos[instr->op].input_sizes[src];
1362
1363 return (instr->dest.write_mask >> channel) & 1;
1364 }
1365
1366 static inline nir_component_mask_t
1367 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1368 {
1369 nir_component_mask_t read_mask = 0;
1370 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1371 if (!nir_alu_instr_channel_used(instr, src, c))
1372 continue;
1373
1374 read_mask |= (1 << instr->src[src].swizzle[c]);
1375 }
1376 return read_mask;
1377 }
1378
1379 /**
1380 * Get the number of channels used for a source
1381 */
1382 static inline unsigned
1383 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1384 {
1385 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1386 return nir_op_infos[instr->op].input_sizes[src];
1387
1388 return nir_dest_num_components(instr->dest.dest);
1389 }
1390
1391 static inline bool
1392 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1393 {
1394 switch (instr->op) {
1395 case nir_op_flt:
1396 case nir_op_fge:
1397 case nir_op_feq:
1398 case nir_op_fneu:
1399 case nir_op_ilt:
1400 case nir_op_ult:
1401 case nir_op_ige:
1402 case nir_op_uge:
1403 case nir_op_ieq:
1404 case nir_op_ine:
1405 case nir_op_i2b1:
1406 case nir_op_f2b1:
1407 case nir_op_inot:
1408 return true;
1409 default:
1410 return false;
1411 }
1412 }
1413
1414 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1415 nir_alu_type full_type);
1416
1417 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1418 unsigned src1, unsigned src2);
1419
1420 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1421 const nir_alu_instr *alu2,
1422 unsigned src1, unsigned src2);
1423
1424 typedef enum {
1425 nir_deref_type_var,
1426 nir_deref_type_array,
1427 nir_deref_type_array_wildcard,
1428 nir_deref_type_ptr_as_array,
1429 nir_deref_type_struct,
1430 nir_deref_type_cast,
1431 } nir_deref_type;
1432
1433 typedef struct {
1434 nir_instr instr;
1435
1436 /** The type of this deref instruction */
1437 nir_deref_type deref_type;
1438
1439 /** The mode of the underlying variable */
1440 nir_variable_mode mode;
1441
1442 /** The dereferenced type of the resulting pointer value */
1443 const struct glsl_type *type;
1444
1445 union {
1446 /** Variable being dereferenced if deref_type is a deref_var */
1447 nir_variable *var;
1448
1449 /** Parent deref if deref_type is not deref_var */
1450 nir_src parent;
1451 };
1452
1453 /** Additional deref parameters */
1454 union {
1455 struct {
1456 nir_src index;
1457 } arr;
1458
1459 struct {
1460 unsigned index;
1461 } strct;
1462
1463 struct {
1464 unsigned ptr_stride;
1465 } cast;
1466 };
1467
1468 /** Destination to store the resulting "pointer" */
1469 nir_dest dest;
1470 } nir_deref_instr;
1471
1472 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1473
1474 static inline nir_deref_instr *
1475 nir_deref_instr_parent(const nir_deref_instr *instr)
1476 {
1477 if (instr->deref_type == nir_deref_type_var)
1478 return NULL;
1479 else
1480 return nir_src_as_deref(instr->parent);
1481 }
1482
1483 static inline nir_variable *
1484 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1485 {
1486 while (instr->deref_type != nir_deref_type_var) {
1487 if (instr->deref_type == nir_deref_type_cast)
1488 return NULL;
1489
1490 instr = nir_deref_instr_parent(instr);
1491 }
1492
1493 return instr->var;
1494 }
1495
1496 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1497 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1498 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1499
1500 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1501
1502 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1503
1504 typedef struct {
1505 nir_instr instr;
1506
1507 struct nir_function *callee;
1508
1509 unsigned num_params;
1510 nir_src params[];
1511 } nir_call_instr;
1512
1513 #include "nir_intrinsics.h"
1514
1515 #define NIR_INTRINSIC_MAX_CONST_INDEX 5
1516
1517 /** Represents an intrinsic
1518 *
1519 * An intrinsic is an instruction type for handling things that are
1520 * more-or-less regular operations but don't just consume and produce SSA
1521 * values like ALU operations do. Intrinsics are not for things that have
1522 * special semantic meaning such as phi nodes and parallel copies.
1523 * Examples of intrinsics include variable load/store operations, system
1524 * value loads, and the like. Even though texturing more-or-less falls
1525 * under this category, texturing is its own instruction type because
1526 * trying to represent texturing with intrinsics would lead to a
1527 * combinatorial explosion of intrinsic opcodes.
1528 *
1529 * By having a single instruction type for handling a lot of different
1530 * cases, optimization passes can look for intrinsics and, for the most
1531 * part, completely ignore them. Each intrinsic type also has a few
1532 * possible flags that govern whether or not they can be reordered or
1533 * eliminated. That way passes like dead code elimination can still work
1534 * on intrisics without understanding the meaning of each.
1535 *
1536 * Each intrinsic has some number of constant indices, some number of
1537 * variables, and some number of sources. What these sources, variables,
1538 * and indices mean depends on the intrinsic and is documented with the
1539 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1540 * instructions are the only types of instruction that can operate on
1541 * variables.
1542 */
1543 typedef struct {
1544 nir_instr instr;
1545
1546 nir_intrinsic_op intrinsic;
1547
1548 nir_dest dest;
1549
1550 /** number of components if this is a vectorized intrinsic
1551 *
1552 * Similarly to ALU operations, some intrinsics are vectorized.
1553 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1554 * For vectorized intrinsics, the num_components field specifies the
1555 * number of destination components and the number of source components
1556 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1557 */
1558 uint8_t num_components;
1559
1560 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1561
1562 nir_src src[];
1563 } nir_intrinsic_instr;
1564
1565 static inline nir_variable *
1566 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1567 {
1568 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1569 }
1570
1571 typedef enum {
1572 /* Memory ordering. */
1573 NIR_MEMORY_ACQUIRE = 1 << 0,
1574 NIR_MEMORY_RELEASE = 1 << 1,
1575 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1576
1577 /* Memory visibility operations. */
1578 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1579 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1580 } nir_memory_semantics;
1581
1582 typedef enum {
1583 NIR_SCOPE_NONE,
1584 NIR_SCOPE_INVOCATION,
1585 NIR_SCOPE_SUBGROUP,
1586 NIR_SCOPE_WORKGROUP,
1587 NIR_SCOPE_QUEUE_FAMILY,
1588 NIR_SCOPE_DEVICE,
1589 } nir_scope;
1590
1591 /**
1592 * \name NIR intrinsics semantic flags
1593 *
1594 * information about what the compiler can do with the intrinsics.
1595 *
1596 * \sa nir_intrinsic_info::flags
1597 */
1598 typedef enum {
1599 /**
1600 * whether the intrinsic can be safely eliminated if none of its output
1601 * value is not being used.
1602 */
1603 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1604
1605 /**
1606 * Whether the intrinsic can be reordered with respect to any other
1607 * intrinsic, i.e. whether the only reordering dependencies of the
1608 * intrinsic are due to the register reads/writes.
1609 */
1610 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1611 } nir_intrinsic_semantic_flag;
1612
1613 /**
1614 * \name NIR intrinsics const-index flag
1615 *
1616 * Indicates the usage of a const_index slot.
1617 *
1618 * \sa nir_intrinsic_info::index_map
1619 */
1620 typedef enum {
1621 /**
1622 * Generally instructions that take a offset src argument, can encode
1623 * a constant 'base' value which is added to the offset.
1624 */
1625 NIR_INTRINSIC_BASE = 1,
1626
1627 /**
1628 * For store instructions, a writemask for the store.
1629 */
1630 NIR_INTRINSIC_WRMASK,
1631
1632 /**
1633 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1634 */
1635 NIR_INTRINSIC_STREAM_ID,
1636
1637 /**
1638 * The clip-plane id for load_user_clip_plane intrinsic.
1639 */
1640 NIR_INTRINSIC_UCP_ID,
1641
1642 /**
1643 * The amount of data, starting from BASE, that this instruction may
1644 * access. This is used to provide bounds if the offset is not constant.
1645 */
1646 NIR_INTRINSIC_RANGE,
1647
1648 /**
1649 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1650 */
1651 NIR_INTRINSIC_DESC_SET,
1652
1653 /**
1654 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1655 */
1656 NIR_INTRINSIC_BINDING,
1657
1658 /**
1659 * Component offset.
1660 */
1661 NIR_INTRINSIC_COMPONENT,
1662
1663 /**
1664 * Interpolation mode (only meaningful for FS inputs).
1665 */
1666 NIR_INTRINSIC_INTERP_MODE,
1667
1668 /**
1669 * A binary nir_op to use when performing a reduction or scan operation
1670 */
1671 NIR_INTRINSIC_REDUCTION_OP,
1672
1673 /**
1674 * Cluster size for reduction operations
1675 */
1676 NIR_INTRINSIC_CLUSTER_SIZE,
1677
1678 /**
1679 * Parameter index for a load_param intrinsic
1680 */
1681 NIR_INTRINSIC_PARAM_IDX,
1682
1683 /**
1684 * Image dimensionality for image intrinsics
1685 *
1686 * One of GLSL_SAMPLER_DIM_*
1687 */
1688 NIR_INTRINSIC_IMAGE_DIM,
1689
1690 /**
1691 * Non-zero if we are accessing an array image
1692 */
1693 NIR_INTRINSIC_IMAGE_ARRAY,
1694
1695 /**
1696 * Image format for image intrinsics
1697 */
1698 NIR_INTRINSIC_FORMAT,
1699
1700 /**
1701 * Access qualifiers for image and memory access intrinsics
1702 */
1703 NIR_INTRINSIC_ACCESS,
1704
1705 /**
1706 * Alignment for offsets and addresses
1707 *
1708 * These two parameters, specify an alignment in terms of a multiplier and
1709 * an offset. The offset or address parameter X of the intrinsic is
1710 * guaranteed to satisfy the following:
1711 *
1712 * (X - align_offset) % align_mul == 0
1713 */
1714 NIR_INTRINSIC_ALIGN_MUL,
1715 NIR_INTRINSIC_ALIGN_OFFSET,
1716
1717 /**
1718 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1719 */
1720 NIR_INTRINSIC_DESC_TYPE,
1721
1722 /**
1723 * The nir_alu_type of a uniform/input/output
1724 */
1725 NIR_INTRINSIC_TYPE,
1726
1727 /**
1728 * The swizzle mask for the instructions
1729 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1730 */
1731 NIR_INTRINSIC_SWIZZLE_MASK,
1732
1733 /* Separate source/dest access flags for copies */
1734 NIR_INTRINSIC_SRC_ACCESS,
1735 NIR_INTRINSIC_DST_ACCESS,
1736
1737 /* Driver location for nir_load_patch_location_ir3 */
1738 NIR_INTRINSIC_DRIVER_LOCATION,
1739
1740 /**
1741 * Mask of nir_memory_semantics, includes ordering and visibility.
1742 */
1743 NIR_INTRINSIC_MEMORY_SEMANTICS,
1744
1745 /**
1746 * Mask of nir_variable_modes affected by the memory operation.
1747 */
1748 NIR_INTRINSIC_MEMORY_MODES,
1749
1750 /**
1751 * Value of nir_scope.
1752 */
1753 NIR_INTRINSIC_MEMORY_SCOPE,
1754
1755 /**
1756 * Value of nir_scope.
1757 */
1758 NIR_INTRINSIC_EXECUTION_SCOPE,
1759
1760 /**
1761 * Value of nir_io_semantics.
1762 */
1763 NIR_INTRINSIC_IO_SEMANTICS,
1764
1765 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1766
1767 } nir_intrinsic_index_flag;
1768
1769 typedef struct {
1770 unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
1771 unsigned num_slots:6; /* max 32, may be pessimistic with const indexing */
1772 unsigned dual_source_blend_index:1;
1773 unsigned fb_fetch_output:1; /* for GL_KHR_blend_equation_advanced */
1774 unsigned gs_streams:8; /* xxyyzzww: 2-bit stream index for each component */
1775 unsigned _pad:9;
1776 } nir_io_semantics;
1777
1778 #define NIR_INTRINSIC_MAX_INPUTS 5
1779
1780 typedef struct {
1781 const char *name;
1782
1783 uint8_t num_srcs; /** < number of register/SSA inputs */
1784
1785 /** number of components of each input register
1786 *
1787 * If this value is 0, the number of components is given by the
1788 * num_components field of nir_intrinsic_instr. If this value is -1, the
1789 * intrinsic consumes however many components are provided and it is not
1790 * validated at all.
1791 */
1792 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1793
1794 bool has_dest;
1795
1796 /** number of components of the output register
1797 *
1798 * If this value is 0, the number of components is given by the
1799 * num_components field of nir_intrinsic_instr.
1800 */
1801 uint8_t dest_components;
1802
1803 /** bitfield of legal bit sizes */
1804 uint8_t dest_bit_sizes;
1805
1806 /** the number of constant indices used by the intrinsic */
1807 uint8_t num_indices;
1808
1809 /** indicates the usage of intr->const_index[n] */
1810 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1811
1812 /** semantic flags for calls to this intrinsic */
1813 nir_intrinsic_semantic_flag flags;
1814 } nir_intrinsic_info;
1815
1816 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1817
1818 static inline unsigned
1819 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1820 {
1821 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1822 assert(srcn < info->num_srcs);
1823 if (info->src_components[srcn] > 0)
1824 return info->src_components[srcn];
1825 else if (info->src_components[srcn] == 0)
1826 return intr->num_components;
1827 else
1828 return nir_src_num_components(intr->src[srcn]);
1829 }
1830
1831 static inline unsigned
1832 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1833 {
1834 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1835 if (!info->has_dest)
1836 return 0;
1837 else if (info->dest_components)
1838 return info->dest_components;
1839 else
1840 return intr->num_components;
1841 }
1842
1843 /**
1844 * Helper to copy const_index[] from src to dst, without assuming they
1845 * match in order.
1846 */
1847 static inline void
1848 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1849 {
1850 if (src->intrinsic == dst->intrinsic) {
1851 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1852 return;
1853 }
1854
1855 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1856 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1857
1858 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1859 if (src_info->index_map[i] == 0)
1860 continue;
1861
1862 /* require that dst instruction also uses the same const_index[]: */
1863 assert(dst_info->index_map[i] > 0);
1864
1865 dst->const_index[dst_info->index_map[i] - 1] =
1866 src->const_index[src_info->index_map[i] - 1];
1867 }
1868 }
1869
1870 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1871 static inline type \
1872 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1873 { \
1874 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1875 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1876 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1877 } \
1878 static inline void \
1879 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1880 { \
1881 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1882 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1883 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1884 } \
1885 static inline bool \
1886 nir_intrinsic_has_##name(nir_intrinsic_instr *instr) \
1887 { \
1888 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1889 return info->index_map[NIR_INTRINSIC_##flag] > 0; \
1890 }
1891
1892 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1893 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1894 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1895 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1896 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1897 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1898 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1899 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1900 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1901 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1902 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1903 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1904 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1905 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1906 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1907 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1908 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1909 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1910 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1911 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1912 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1913 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1914 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1915 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1916 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1917 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1918 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1919 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1920
1921 static inline void
1922 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1923 unsigned align_mul, unsigned align_offset)
1924 {
1925 assert(util_is_power_of_two_nonzero(align_mul));
1926 assert(align_offset < align_mul);
1927 nir_intrinsic_set_align_mul(intrin, align_mul);
1928 nir_intrinsic_set_align_offset(intrin, align_offset);
1929 }
1930
1931 /** Returns a simple alignment for a load/store intrinsic offset
1932 *
1933 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1934 * and ALIGN_OFFSET parameters, this helper takes both into account and
1935 * provides a single simple alignment parameter. The offset X is guaranteed
1936 * to satisfy X % align == 0.
1937 */
1938 static inline unsigned
1939 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1940 {
1941 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1942 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1943 assert(align_offset < align_mul);
1944 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1945 }
1946
1947 static inline void
1948 nir_intrinsic_set_io_semantics(nir_intrinsic_instr *intrin,
1949 nir_io_semantics semantics)
1950 {
1951 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1952 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1953 STATIC_ASSERT(sizeof(nir_io_semantics) == sizeof(intrin->const_index[0]));
1954 semantics._pad = 0; /* clear padding bits */
1955 memcpy(&intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1956 &semantics, sizeof(semantics));
1957 }
1958
1959 static inline nir_io_semantics
1960 nir_intrinsic_io_semantics(const nir_intrinsic_instr *intrin)
1961 {
1962 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1963 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1964 nir_io_semantics semantics;
1965 memcpy(&semantics,
1966 &intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1967 sizeof(semantics));
1968 return semantics;
1969 }
1970
1971 unsigned
1972 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1973
1974 /* Converts a image_deref_* intrinsic into a image_* one */
1975 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1976 nir_ssa_def *handle, bool bindless);
1977
1978 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1979 static inline bool
1980 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1981 {
1982 if (instr->intrinsic == nir_intrinsic_load_deref ||
1983 instr->intrinsic == nir_intrinsic_load_ssbo ||
1984 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1985 instr->intrinsic == nir_intrinsic_image_deref_load ||
1986 instr->intrinsic == nir_intrinsic_image_load) {
1987 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1988 } else {
1989 const nir_intrinsic_info *info =
1990 &nir_intrinsic_infos[instr->intrinsic];
1991 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1992 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1993 }
1994 }
1995
1996 /**
1997 * \group texture information
1998 *
1999 * This gives semantic information about textures which is useful to the
2000 * frontend, the backend, and lowering passes, but not the optimizer.
2001 */
2002
2003 typedef enum {
2004 nir_tex_src_coord,
2005 nir_tex_src_projector,
2006 nir_tex_src_comparator, /* shadow comparator */
2007 nir_tex_src_offset,
2008 nir_tex_src_bias,
2009 nir_tex_src_lod,
2010 nir_tex_src_min_lod,
2011 nir_tex_src_ms_index, /* MSAA sample index */
2012 nir_tex_src_ms_mcs, /* MSAA compression value */
2013 nir_tex_src_ddx,
2014 nir_tex_src_ddy,
2015 nir_tex_src_texture_deref, /* < deref pointing to the texture */
2016 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
2017 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
2018 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
2019 nir_tex_src_texture_handle, /* < bindless texture handle */
2020 nir_tex_src_sampler_handle, /* < bindless sampler handle */
2021 nir_tex_src_plane, /* < selects plane for planar textures */
2022 nir_num_tex_src_types
2023 } nir_tex_src_type;
2024
2025 typedef struct {
2026 nir_src src;
2027 nir_tex_src_type src_type;
2028 } nir_tex_src;
2029
2030 typedef enum {
2031 nir_texop_tex, /**< Regular texture look-up */
2032 nir_texop_txb, /**< Texture look-up with LOD bias */
2033 nir_texop_txl, /**< Texture look-up with explicit LOD */
2034 nir_texop_txd, /**< Texture look-up with partial derivatives */
2035 nir_texop_txf, /**< Texel fetch with explicit LOD */
2036 nir_texop_txf_ms, /**< Multisample texture fetch */
2037 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
2038 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
2039 nir_texop_txs, /**< Texture size */
2040 nir_texop_lod, /**< Texture lod query */
2041 nir_texop_tg4, /**< Texture gather */
2042 nir_texop_query_levels, /**< Texture levels query */
2043 nir_texop_texture_samples, /**< Texture samples query */
2044 nir_texop_samples_identical, /**< Query whether all samples are definitely
2045 * identical.
2046 */
2047 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
2048 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
2049 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
2050 } nir_texop;
2051
2052 typedef struct {
2053 nir_instr instr;
2054
2055 enum glsl_sampler_dim sampler_dim;
2056 nir_alu_type dest_type;
2057
2058 nir_texop op;
2059 nir_dest dest;
2060 nir_tex_src *src;
2061 unsigned num_srcs, coord_components;
2062 bool is_array, is_shadow;
2063
2064 /**
2065 * If is_shadow is true, whether this is the old-style shadow that outputs 4
2066 * components or the new-style shadow that outputs 1 component.
2067 */
2068 bool is_new_style_shadow;
2069
2070 /* gather component selector */
2071 unsigned component : 2;
2072
2073 /* gather offsets */
2074 int8_t tg4_offsets[4][2];
2075
2076 /* True if the texture index or handle is not dynamically uniform */
2077 bool texture_non_uniform;
2078
2079 /* True if the sampler index or handle is not dynamically uniform */
2080 bool sampler_non_uniform;
2081
2082 /** The texture index
2083 *
2084 * If this texture instruction has a nir_tex_src_texture_offset source,
2085 * then the texture index is given by texture_index + texture_offset.
2086 */
2087 unsigned texture_index;
2088
2089 /** The sampler index
2090 *
2091 * The following operations do not require a sampler and, as such, this
2092 * field should be ignored:
2093 * - nir_texop_txf
2094 * - nir_texop_txf_ms
2095 * - nir_texop_txs
2096 * - nir_texop_lod
2097 * - nir_texop_query_levels
2098 * - nir_texop_texture_samples
2099 * - nir_texop_samples_identical
2100 *
2101 * If this texture instruction has a nir_tex_src_sampler_offset source,
2102 * then the sampler index is given by sampler_index + sampler_offset.
2103 */
2104 unsigned sampler_index;
2105 } nir_tex_instr;
2106
2107 /*
2108 * Returns true if the texture operation requires a sampler as a general rule,
2109 * see the documentation of sampler_index.
2110 *
2111 * Note that the specific hw/driver backend could require to a sampler
2112 * object/configuration packet in any case, for some other reason.
2113 */
2114 static inline bool
2115 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2116 {
2117 switch (instr->op) {
2118 case nir_texop_txf:
2119 case nir_texop_txf_ms:
2120 case nir_texop_txs:
2121 case nir_texop_lod:
2122 case nir_texop_query_levels:
2123 case nir_texop_texture_samples:
2124 case nir_texop_samples_identical:
2125 return false;
2126 default:
2127 return true;
2128 }
2129 }
2130
2131 static inline unsigned
2132 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2133 {
2134 switch (instr->op) {
2135 case nir_texop_txs: {
2136 unsigned ret;
2137 switch (instr->sampler_dim) {
2138 case GLSL_SAMPLER_DIM_1D:
2139 case GLSL_SAMPLER_DIM_BUF:
2140 ret = 1;
2141 break;
2142 case GLSL_SAMPLER_DIM_2D:
2143 case GLSL_SAMPLER_DIM_CUBE:
2144 case GLSL_SAMPLER_DIM_MS:
2145 case GLSL_SAMPLER_DIM_RECT:
2146 case GLSL_SAMPLER_DIM_EXTERNAL:
2147 case GLSL_SAMPLER_DIM_SUBPASS:
2148 ret = 2;
2149 break;
2150 case GLSL_SAMPLER_DIM_3D:
2151 ret = 3;
2152 break;
2153 default:
2154 unreachable("not reached");
2155 }
2156 if (instr->is_array)
2157 ret++;
2158 return ret;
2159 }
2160
2161 case nir_texop_lod:
2162 return 2;
2163
2164 case nir_texop_texture_samples:
2165 case nir_texop_query_levels:
2166 case nir_texop_samples_identical:
2167 case nir_texop_fragment_mask_fetch:
2168 return 1;
2169
2170 default:
2171 if (instr->is_shadow && instr->is_new_style_shadow)
2172 return 1;
2173
2174 return 4;
2175 }
2176 }
2177
2178 /* Returns true if this texture operation queries something about the texture
2179 * rather than actually sampling it.
2180 */
2181 static inline bool
2182 nir_tex_instr_is_query(const nir_tex_instr *instr)
2183 {
2184 switch (instr->op) {
2185 case nir_texop_txs:
2186 case nir_texop_lod:
2187 case nir_texop_texture_samples:
2188 case nir_texop_query_levels:
2189 case nir_texop_txf_ms_mcs:
2190 return true;
2191 case nir_texop_tex:
2192 case nir_texop_txb:
2193 case nir_texop_txl:
2194 case nir_texop_txd:
2195 case nir_texop_txf:
2196 case nir_texop_txf_ms:
2197 case nir_texop_txf_ms_fb:
2198 case nir_texop_tg4:
2199 return false;
2200 default:
2201 unreachable("Invalid texture opcode");
2202 }
2203 }
2204
2205 static inline bool
2206 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2207 {
2208 switch (instr->op) {
2209 case nir_texop_tex:
2210 case nir_texop_txb:
2211 case nir_texop_lod:
2212 return true;
2213 default:
2214 return false;
2215 }
2216 }
2217
2218 static inline nir_alu_type
2219 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2220 {
2221 switch (instr->src[src].src_type) {
2222 case nir_tex_src_coord:
2223 switch (instr->op) {
2224 case nir_texop_txf:
2225 case nir_texop_txf_ms:
2226 case nir_texop_txf_ms_fb:
2227 case nir_texop_txf_ms_mcs:
2228 case nir_texop_samples_identical:
2229 return nir_type_int;
2230
2231 default:
2232 return nir_type_float;
2233 }
2234
2235 case nir_tex_src_lod:
2236 switch (instr->op) {
2237 case nir_texop_txs:
2238 case nir_texop_txf:
2239 return nir_type_int;
2240
2241 default:
2242 return nir_type_float;
2243 }
2244
2245 case nir_tex_src_projector:
2246 case nir_tex_src_comparator:
2247 case nir_tex_src_bias:
2248 case nir_tex_src_min_lod:
2249 case nir_tex_src_ddx:
2250 case nir_tex_src_ddy:
2251 return nir_type_float;
2252
2253 case nir_tex_src_offset:
2254 case nir_tex_src_ms_index:
2255 case nir_tex_src_plane:
2256 return nir_type_int;
2257
2258 case nir_tex_src_ms_mcs:
2259 case nir_tex_src_texture_deref:
2260 case nir_tex_src_sampler_deref:
2261 case nir_tex_src_texture_offset:
2262 case nir_tex_src_sampler_offset:
2263 case nir_tex_src_texture_handle:
2264 case nir_tex_src_sampler_handle:
2265 return nir_type_uint;
2266
2267 case nir_num_tex_src_types:
2268 unreachable("nir_num_tex_src_types is not a valid source type");
2269 }
2270
2271 unreachable("Invalid texture source type");
2272 }
2273
2274 static inline unsigned
2275 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2276 {
2277 if (instr->src[src].src_type == nir_tex_src_coord)
2278 return instr->coord_components;
2279
2280 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2281 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2282 return 4;
2283
2284 if (instr->src[src].src_type == nir_tex_src_ddx ||
2285 instr->src[src].src_type == nir_tex_src_ddy) {
2286 if (instr->is_array)
2287 return instr->coord_components - 1;
2288 else
2289 return instr->coord_components;
2290 }
2291
2292 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2293 * the offset, since a cube maps to a single face.
2294 */
2295 if (instr->src[src].src_type == nir_tex_src_offset) {
2296 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2297 return 2;
2298 else if (instr->is_array)
2299 return instr->coord_components - 1;
2300 else
2301 return instr->coord_components;
2302 }
2303
2304 return 1;
2305 }
2306
2307 static inline int
2308 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2309 {
2310 for (unsigned i = 0; i < instr->num_srcs; i++)
2311 if (instr->src[i].src_type == type)
2312 return (int) i;
2313
2314 return -1;
2315 }
2316
2317 void nir_tex_instr_add_src(nir_tex_instr *tex,
2318 nir_tex_src_type src_type,
2319 nir_src src);
2320
2321 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2322
2323 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2324
2325 typedef struct {
2326 nir_instr instr;
2327
2328 nir_ssa_def def;
2329
2330 nir_const_value value[];
2331 } nir_load_const_instr;
2332
2333 typedef enum {
2334 /** Return from a function
2335 *
2336 * This instruction is a classic function return. It jumps to
2337 * nir_function_impl::end_block. No return value is provided in this
2338 * instruction. Instead, the function is expected to write any return
2339 * data to a deref passed in from the caller.
2340 */
2341 nir_jump_return,
2342
2343 /** Break out of the inner-most loop
2344 *
2345 * This has the same semantics as C's "break" statement.
2346 */
2347 nir_jump_break,
2348
2349 /** Jump back to the top of the inner-most loop
2350 *
2351 * This has the same semantics as C's "continue" statement assuming that a
2352 * NIR loop is implemented as "while (1) { body }".
2353 */
2354 nir_jump_continue,
2355
2356 /** Jumps for unstructured CFG.
2357 *
2358 * As within an unstructured CFG we can't rely on block ordering we need to
2359 * place explicit jumps at the end of every block.
2360 */
2361 nir_jump_goto,
2362 nir_jump_goto_if,
2363 } nir_jump_type;
2364
2365 typedef struct {
2366 nir_instr instr;
2367 nir_jump_type type;
2368 nir_src condition;
2369 struct nir_block *target;
2370 struct nir_block *else_target;
2371 } nir_jump_instr;
2372
2373 /* creates a new SSA variable in an undefined state */
2374
2375 typedef struct {
2376 nir_instr instr;
2377 nir_ssa_def def;
2378 } nir_ssa_undef_instr;
2379
2380 typedef struct {
2381 struct exec_node node;
2382
2383 /* The predecessor block corresponding to this source */
2384 struct nir_block *pred;
2385
2386 nir_src src;
2387 } nir_phi_src;
2388
2389 #define nir_foreach_phi_src(phi_src, phi) \
2390 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2391 #define nir_foreach_phi_src_safe(phi_src, phi) \
2392 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2393
2394 typedef struct {
2395 nir_instr instr;
2396
2397 struct exec_list srcs; /** < list of nir_phi_src */
2398
2399 nir_dest dest;
2400 } nir_phi_instr;
2401
2402 typedef struct {
2403 struct exec_node node;
2404 nir_src src;
2405 nir_dest dest;
2406 } nir_parallel_copy_entry;
2407
2408 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2409 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2410
2411 typedef struct {
2412 nir_instr instr;
2413
2414 /* A list of nir_parallel_copy_entrys. The sources of all of the
2415 * entries are copied to the corresponding destinations "in parallel".
2416 * In other words, if we have two entries: a -> b and b -> a, the values
2417 * get swapped.
2418 */
2419 struct exec_list entries;
2420 } nir_parallel_copy_instr;
2421
2422 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2423 type, nir_instr_type_alu)
2424 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2425 type, nir_instr_type_deref)
2426 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2427 type, nir_instr_type_call)
2428 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2429 type, nir_instr_type_jump)
2430 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2431 type, nir_instr_type_tex)
2432 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2433 type, nir_instr_type_intrinsic)
2434 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2435 type, nir_instr_type_load_const)
2436 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2437 type, nir_instr_type_ssa_undef)
2438 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2439 type, nir_instr_type_phi)
2440 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2441 nir_parallel_copy_instr, instr,
2442 type, nir_instr_type_parallel_copy)
2443
2444
2445 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2446 static inline type \
2447 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2448 { \
2449 assert(nir_src_is_const(src)); \
2450 nir_load_const_instr *load = \
2451 nir_instr_as_load_const(src.ssa->parent_instr); \
2452 assert(comp < load->def.num_components); \
2453 return nir_const_value_as_##suffix(load->value[comp], \
2454 load->def.bit_size); \
2455 } \
2456 \
2457 static inline type \
2458 nir_src_as_##suffix(nir_src src) \
2459 { \
2460 assert(nir_src_num_components(src) == 1); \
2461 return nir_src_comp_as_##suffix(src, 0); \
2462 }
2463
2464 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2465 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2466 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2467 NIR_DEFINE_SRC_AS_CONST(double, float)
2468
2469 #undef NIR_DEFINE_SRC_AS_CONST
2470
2471
2472 typedef struct {
2473 nir_ssa_def *def;
2474 unsigned comp;
2475 } nir_ssa_scalar;
2476
2477 static inline bool
2478 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2479 {
2480 return s.def->parent_instr->type == nir_instr_type_load_const;
2481 }
2482
2483 static inline nir_const_value
2484 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2485 {
2486 assert(s.comp < s.def->num_components);
2487 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2488 return load->value[s.comp];
2489 }
2490
2491 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2492 static inline type \
2493 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2494 { \
2495 return nir_const_value_as_##suffix( \
2496 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2497 }
2498
2499 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2500 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2501 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2502 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2503
2504 #undef NIR_DEFINE_SCALAR_AS_CONST
2505
2506 static inline bool
2507 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2508 {
2509 return s.def->parent_instr->type == nir_instr_type_alu;
2510 }
2511
2512 static inline nir_op
2513 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2514 {
2515 return nir_instr_as_alu(s.def->parent_instr)->op;
2516 }
2517
2518 static inline nir_ssa_scalar
2519 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2520 {
2521 nir_ssa_scalar out = { NULL, 0 };
2522
2523 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2524 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2525
2526 /* Our component must be written */
2527 assert(s.comp < s.def->num_components);
2528 assert(alu->dest.write_mask & (1u << s.comp));
2529
2530 assert(alu->src[alu_src_idx].src.is_ssa);
2531 out.def = alu->src[alu_src_idx].src.ssa;
2532
2533 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2534 /* The ALU src is unsized so the source component follows the
2535 * destination component.
2536 */
2537 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2538 } else {
2539 /* This is a sized source so all source components work together to
2540 * produce all the destination components. Since we need to return a
2541 * scalar, this only works if the source is a scalar.
2542 */
2543 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2544 out.comp = alu->src[alu_src_idx].swizzle[0];
2545 }
2546 assert(out.comp < out.def->num_components);
2547
2548 return out;
2549 }
2550
2551
2552 /*
2553 * Control flow
2554 *
2555 * Control flow consists of a tree of control flow nodes, which include
2556 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2557 * instructions that always run start-to-finish. Each basic block also keeps
2558 * track of its successors (blocks which may run immediately after the current
2559 * block) and predecessors (blocks which could have run immediately before the
2560 * current block). Each function also has a start block and an end block which
2561 * all return statements point to (which is always empty). Together, all the
2562 * blocks with their predecessors and successors make up the control flow
2563 * graph (CFG) of the function. There are helpers that modify the tree of
2564 * control flow nodes while modifying the CFG appropriately; these should be
2565 * used instead of modifying the tree directly.
2566 */
2567
2568 typedef enum {
2569 nir_cf_node_block,
2570 nir_cf_node_if,
2571 nir_cf_node_loop,
2572 nir_cf_node_function
2573 } nir_cf_node_type;
2574
2575 typedef struct nir_cf_node {
2576 struct exec_node node;
2577 nir_cf_node_type type;
2578 struct nir_cf_node *parent;
2579 } nir_cf_node;
2580
2581 typedef struct nir_block {
2582 nir_cf_node cf_node;
2583
2584 struct exec_list instr_list; /** < list of nir_instr */
2585
2586 /** generic block index; generated by nir_index_blocks */
2587 unsigned index;
2588
2589 /*
2590 * Each block can only have up to 2 successors, so we put them in a simple
2591 * array - no need for anything more complicated.
2592 */
2593 struct nir_block *successors[2];
2594
2595 /* Set of nir_block predecessors in the CFG */
2596 struct set *predecessors;
2597
2598 /*
2599 * this node's immediate dominator in the dominance tree - set to NULL for
2600 * the start block.
2601 */
2602 struct nir_block *imm_dom;
2603
2604 /* This node's children in the dominance tree */
2605 unsigned num_dom_children;
2606 struct nir_block **dom_children;
2607
2608 /* Set of nir_blocks on the dominance frontier of this block */
2609 struct set *dom_frontier;
2610
2611 /*
2612 * These two indices have the property that dom_{pre,post}_index for each
2613 * child of this block in the dominance tree will always be between
2614 * dom_pre_index and dom_post_index for this block, which makes testing if
2615 * a given block is dominated by another block an O(1) operation.
2616 */
2617 int16_t dom_pre_index, dom_post_index;
2618
2619 /* SSA def live in and out for this block; used for liveness analysis.
2620 * Indexed by ssa_def->index
2621 */
2622 BITSET_WORD *live_in;
2623 BITSET_WORD *live_out;
2624 } nir_block;
2625
2626 static inline bool
2627 nir_block_is_reachable(nir_block *b)
2628 {
2629 /* See also nir_block_dominates */
2630 return b->dom_post_index != -1;
2631 }
2632
2633 static inline nir_instr *
2634 nir_block_first_instr(nir_block *block)
2635 {
2636 struct exec_node *head = exec_list_get_head(&block->instr_list);
2637 return exec_node_data(nir_instr, head, node);
2638 }
2639
2640 static inline nir_instr *
2641 nir_block_last_instr(nir_block *block)
2642 {
2643 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2644 return exec_node_data(nir_instr, tail, node);
2645 }
2646
2647 static inline bool
2648 nir_block_ends_in_jump(nir_block *block)
2649 {
2650 return !exec_list_is_empty(&block->instr_list) &&
2651 nir_block_last_instr(block)->type == nir_instr_type_jump;
2652 }
2653
2654 #define nir_foreach_instr(instr, block) \
2655 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2656 #define nir_foreach_instr_reverse(instr, block) \
2657 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2658 #define nir_foreach_instr_safe(instr, block) \
2659 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2660 #define nir_foreach_instr_reverse_safe(instr, block) \
2661 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2662
2663 typedef enum {
2664 nir_selection_control_none = 0x0,
2665 nir_selection_control_flatten = 0x1,
2666 nir_selection_control_dont_flatten = 0x2,
2667 } nir_selection_control;
2668
2669 typedef struct nir_if {
2670 nir_cf_node cf_node;
2671 nir_src condition;
2672 nir_selection_control control;
2673
2674 struct exec_list then_list; /** < list of nir_cf_node */
2675 struct exec_list else_list; /** < list of nir_cf_node */
2676 } nir_if;
2677
2678 typedef struct {
2679 nir_if *nif;
2680
2681 /** Instruction that generates nif::condition. */
2682 nir_instr *conditional_instr;
2683
2684 /** Block within ::nif that has the break instruction. */
2685 nir_block *break_block;
2686
2687 /** Last block for the then- or else-path that does not contain the break. */
2688 nir_block *continue_from_block;
2689
2690 /** True when ::break_block is in the else-path of ::nif. */
2691 bool continue_from_then;
2692 bool induction_rhs;
2693
2694 /* This is true if the terminators exact trip count is unknown. For
2695 * example:
2696 *
2697 * for (int i = 0; i < imin(x, 4); i++)
2698 * ...
2699 *
2700 * Here loop analysis would have set a max_trip_count of 4 however we dont
2701 * know for sure that this is the exact trip count.
2702 */
2703 bool exact_trip_count_unknown;
2704
2705 struct list_head loop_terminator_link;
2706 } nir_loop_terminator;
2707
2708 typedef struct {
2709 /* Estimated cost (in number of instructions) of the loop */
2710 unsigned instr_cost;
2711
2712 /* Guessed trip count based on array indexing */
2713 unsigned guessed_trip_count;
2714
2715 /* Maximum number of times the loop is run (if known) */
2716 unsigned max_trip_count;
2717
2718 /* Do we know the exact number of times the loop will be run */
2719 bool exact_trip_count_known;
2720
2721 /* Unroll the loop regardless of its size */
2722 bool force_unroll;
2723
2724 /* Does the loop contain complex loop terminators, continues or other
2725 * complex behaviours? If this is true we can't rely on
2726 * loop_terminator_list to be complete or accurate.
2727 */
2728 bool complex_loop;
2729
2730 nir_loop_terminator *limiting_terminator;
2731
2732 /* A list of loop_terminators terminating this loop. */
2733 struct list_head loop_terminator_list;
2734 } nir_loop_info;
2735
2736 typedef enum {
2737 nir_loop_control_none = 0x0,
2738 nir_loop_control_unroll = 0x1,
2739 nir_loop_control_dont_unroll = 0x2,
2740 } nir_loop_control;
2741
2742 typedef struct {
2743 nir_cf_node cf_node;
2744
2745 struct exec_list body; /** < list of nir_cf_node */
2746
2747 nir_loop_info *info;
2748 nir_loop_control control;
2749 bool partially_unrolled;
2750 } nir_loop;
2751
2752 /**
2753 * Various bits of metadata that can may be created or required by
2754 * optimization and analysis passes
2755 */
2756 typedef enum {
2757 nir_metadata_none = 0x0,
2758
2759 /** Indicates that nir_block::index values are valid.
2760 *
2761 * The start block has index 0 and they increase through a natural walk of
2762 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2763 * every block index is in the range [0, nir_function_impl::num_blocks].
2764 *
2765 * A pass can preserve this metadata type if it doesn't touch the CFG.
2766 */
2767 nir_metadata_block_index = 0x1,
2768
2769 /** Indicates that block dominance information is valid
2770 *
2771 * This includes:
2772 *
2773 * - nir_block::num_dom_children
2774 * - nir_block::dom_children
2775 * - nir_block::dom_frontier
2776 * - nir_block::dom_pre_index
2777 * - nir_block::dom_post_index
2778 *
2779 * A pass can preserve this metadata type if it doesn't touch the CFG.
2780 */
2781 nir_metadata_dominance = 0x2,
2782
2783 /** Indicates that SSA def data-flow liveness information is valid
2784 *
2785 * This includes:
2786 *
2787 * - nir_ssa_def::live_index
2788 * - nir_block::live_in
2789 * - nir_block::live_out
2790 *
2791 * A pass can preserve this metadata type if it never adds or removes any
2792 * SSA defs (most passes shouldn't preserve this metadata type).
2793 */
2794 nir_metadata_live_ssa_defs = 0x4,
2795
2796 /** A dummy metadata value to track when a pass forgot to call
2797 * nir_metadata_preserve.
2798 *
2799 * A pass should always clear this value even if it doesn't make any
2800 * progress to indicate that it thought about preserving metadata.
2801 */
2802 nir_metadata_not_properly_reset = 0x8,
2803
2804 /** Indicates that loop analysis information is valid.
2805 *
2806 * This includes everything pointed to by nir_loop::info.
2807 *
2808 * A pass can preserve this metadata type if it is guaranteed to not affect
2809 * any loop metadata. However, since loop metadata includes things like
2810 * loop counts which depend on arithmetic in the loop, this is very hard to
2811 * determine. Most passes shouldn't preserve this metadata type.
2812 */
2813 nir_metadata_loop_analysis = 0x10,
2814
2815 /** All metadata
2816 *
2817 * This includes all nir_metadata flags except not_properly_reset. Passes
2818 * which do not change the shader in any way should call
2819 *
2820 * nir_metadata_preserve(impl, nir_metadata_all);
2821 */
2822 nir_metadata_all = ~nir_metadata_not_properly_reset,
2823 } nir_metadata;
2824 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_metadata)
2825
2826 typedef struct {
2827 nir_cf_node cf_node;
2828
2829 /** pointer to the function of which this is an implementation */
2830 struct nir_function *function;
2831
2832 struct exec_list body; /** < list of nir_cf_node */
2833
2834 nir_block *end_block;
2835
2836 /** list for all local variables in the function */
2837 struct exec_list locals;
2838
2839 /** list of local registers in the function */
2840 struct exec_list registers;
2841
2842 /** next available local register index */
2843 unsigned reg_alloc;
2844
2845 /** next available SSA value index */
2846 unsigned ssa_alloc;
2847
2848 /* total number of basic blocks, only valid when block_index_dirty = false */
2849 unsigned num_blocks;
2850
2851 /** True if this nir_function_impl uses structured control-flow
2852 *
2853 * Structured nir_function_impls have different validation rules.
2854 */
2855 bool structured;
2856
2857 nir_metadata valid_metadata;
2858 } nir_function_impl;
2859
2860 #define nir_foreach_function_temp_variable(var, impl) \
2861 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2862
2863 #define nir_foreach_function_temp_variable_safe(var, impl) \
2864 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2865
2866 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2867 nir_start_block(nir_function_impl *impl)
2868 {
2869 return (nir_block *) impl->body.head_sentinel.next;
2870 }
2871
2872 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2873 nir_impl_last_block(nir_function_impl *impl)
2874 {
2875 return (nir_block *) impl->body.tail_sentinel.prev;
2876 }
2877
2878 static inline nir_cf_node *
2879 nir_cf_node_next(nir_cf_node *node)
2880 {
2881 struct exec_node *next = exec_node_get_next(&node->node);
2882 if (exec_node_is_tail_sentinel(next))
2883 return NULL;
2884 else
2885 return exec_node_data(nir_cf_node, next, node);
2886 }
2887
2888 static inline nir_cf_node *
2889 nir_cf_node_prev(nir_cf_node *node)
2890 {
2891 struct exec_node *prev = exec_node_get_prev(&node->node);
2892 if (exec_node_is_head_sentinel(prev))
2893 return NULL;
2894 else
2895 return exec_node_data(nir_cf_node, prev, node);
2896 }
2897
2898 static inline bool
2899 nir_cf_node_is_first(const nir_cf_node *node)
2900 {
2901 return exec_node_is_head_sentinel(node->node.prev);
2902 }
2903
2904 static inline bool
2905 nir_cf_node_is_last(const nir_cf_node *node)
2906 {
2907 return exec_node_is_tail_sentinel(node->node.next);
2908 }
2909
2910 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2911 type, nir_cf_node_block)
2912 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2913 type, nir_cf_node_if)
2914 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2915 type, nir_cf_node_loop)
2916 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2917 nir_function_impl, cf_node, type, nir_cf_node_function)
2918
2919 static inline nir_block *
2920 nir_if_first_then_block(nir_if *if_stmt)
2921 {
2922 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2923 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2924 }
2925
2926 static inline nir_block *
2927 nir_if_last_then_block(nir_if *if_stmt)
2928 {
2929 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2930 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2931 }
2932
2933 static inline nir_block *
2934 nir_if_first_else_block(nir_if *if_stmt)
2935 {
2936 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2937 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2938 }
2939
2940 static inline nir_block *
2941 nir_if_last_else_block(nir_if *if_stmt)
2942 {
2943 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2944 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2945 }
2946
2947 static inline nir_block *
2948 nir_loop_first_block(nir_loop *loop)
2949 {
2950 struct exec_node *head = exec_list_get_head(&loop->body);
2951 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2952 }
2953
2954 static inline nir_block *
2955 nir_loop_last_block(nir_loop *loop)
2956 {
2957 struct exec_node *tail = exec_list_get_tail(&loop->body);
2958 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2959 }
2960
2961 /**
2962 * Return true if this list of cf_nodes contains a single empty block.
2963 */
2964 static inline bool
2965 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2966 {
2967 if (exec_list_is_singular(cf_list)) {
2968 struct exec_node *head = exec_list_get_head(cf_list);
2969 nir_block *block =
2970 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2971 return exec_list_is_empty(&block->instr_list);
2972 }
2973 return false;
2974 }
2975
2976 typedef struct {
2977 uint8_t num_components;
2978 uint8_t bit_size;
2979 } nir_parameter;
2980
2981 typedef struct nir_function {
2982 struct exec_node node;
2983
2984 const char *name;
2985 struct nir_shader *shader;
2986
2987 unsigned num_params;
2988 nir_parameter *params;
2989
2990 /** The implementation of this function.
2991 *
2992 * If the function is only declared and not implemented, this is NULL.
2993 */
2994 nir_function_impl *impl;
2995
2996 bool is_entrypoint;
2997 } nir_function;
2998
2999 typedef enum {
3000 nir_lower_imul64 = (1 << 0),
3001 nir_lower_isign64 = (1 << 1),
3002 /** Lower all int64 modulus and division opcodes */
3003 nir_lower_divmod64 = (1 << 2),
3004 /** Lower all 64-bit umul_high and imul_high opcodes */
3005 nir_lower_imul_high64 = (1 << 3),
3006 nir_lower_mov64 = (1 << 4),
3007 nir_lower_icmp64 = (1 << 5),
3008 nir_lower_iadd64 = (1 << 6),
3009 nir_lower_iabs64 = (1 << 7),
3010 nir_lower_ineg64 = (1 << 8),
3011 nir_lower_logic64 = (1 << 9),
3012 nir_lower_minmax64 = (1 << 10),
3013 nir_lower_shift64 = (1 << 11),
3014 nir_lower_imul_2x32_64 = (1 << 12),
3015 nir_lower_extract64 = (1 << 13),
3016 nir_lower_ufind_msb64 = (1 << 14),
3017 nir_lower_bit_count64 = (1 << 15),
3018 } nir_lower_int64_options;
3019
3020 typedef enum {
3021 nir_lower_drcp = (1 << 0),
3022 nir_lower_dsqrt = (1 << 1),
3023 nir_lower_drsq = (1 << 2),
3024 nir_lower_dtrunc = (1 << 3),
3025 nir_lower_dfloor = (1 << 4),
3026 nir_lower_dceil = (1 << 5),
3027 nir_lower_dfract = (1 << 6),
3028 nir_lower_dround_even = (1 << 7),
3029 nir_lower_dmod = (1 << 8),
3030 nir_lower_dsub = (1 << 9),
3031 nir_lower_ddiv = (1 << 10),
3032 nir_lower_fp64_full_software = (1 << 11),
3033 } nir_lower_doubles_options;
3034
3035 typedef enum {
3036 nir_divergence_single_prim_per_subgroup = (1 << 0),
3037 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
3038 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
3039 nir_divergence_view_index_uniform = (1 << 3),
3040 } nir_divergence_options;
3041
3042 typedef struct nir_shader_compiler_options {
3043 bool lower_fdiv;
3044 bool lower_ffma;
3045 bool fuse_ffma;
3046 bool lower_flrp16;
3047 bool lower_flrp32;
3048 /** Lowers flrp when it does not support doubles */
3049 bool lower_flrp64;
3050 bool lower_fpow;
3051 bool lower_fsat;
3052 bool lower_fsqrt;
3053 bool lower_sincos;
3054 bool lower_fmod;
3055 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
3056 bool lower_bitfield_extract;
3057 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
3058 bool lower_bitfield_extract_to_shifts;
3059 /** Lowers bitfield_insert to bfi/bfm */
3060 bool lower_bitfield_insert;
3061 /** Lowers bitfield_insert to compares, and shifts. */
3062 bool lower_bitfield_insert_to_shifts;
3063 /** Lowers bitfield_insert to bfm/bitfield_select. */
3064 bool lower_bitfield_insert_to_bitfield_select;
3065 /** Lowers bitfield_reverse to shifts. */
3066 bool lower_bitfield_reverse;
3067 /** Lowers bit_count to shifts. */
3068 bool lower_bit_count;
3069 /** Lowers ifind_msb to compare and ufind_msb */
3070 bool lower_ifind_msb;
3071 /** Lowers find_lsb to ufind_msb and logic ops */
3072 bool lower_find_lsb;
3073 bool lower_uadd_carry;
3074 bool lower_usub_borrow;
3075 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
3076 bool lower_mul_high;
3077 /** lowers fneg and ineg to fsub and isub. */
3078 bool lower_negate;
3079 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
3080 bool lower_sub;
3081
3082 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fneu} + b2f: */
3083 bool lower_scmp;
3084
3085 /* lower b/fall_equalN/b/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
3086 bool lower_vector_cmp;
3087
3088 /** enables rules to lower idiv by power-of-two: */
3089 bool lower_idiv;
3090
3091 /** enable rules to avoid bit ops */
3092 bool lower_bitops;
3093
3094 /** enables rules to lower isign to imin+imax */
3095 bool lower_isign;
3096
3097 /** enables rules to lower fsign to fsub and flt */
3098 bool lower_fsign;
3099
3100 /** enables rules to lower iabs to ineg+imax */
3101 bool lower_iabs;
3102
3103 /* lower fdph to fdot4 */
3104 bool lower_fdph;
3105
3106 /** lower fdot to fmul and fsum/fadd. */
3107 bool lower_fdot;
3108
3109 /* Does the native fdot instruction replicate its result for four
3110 * components? If so, then opt_algebraic_late will turn all fdotN
3111 * instructions into fdot_replicatedN instructions.
3112 */
3113 bool fdot_replicates;
3114
3115 /** lowers ffloor to fsub+ffract: */
3116 bool lower_ffloor;
3117
3118 /** lowers ffract to fsub+ffloor: */
3119 bool lower_ffract;
3120
3121 /** lowers fceil to fneg+ffloor+fneg: */
3122 bool lower_fceil;
3123
3124 bool lower_ftrunc;
3125
3126 bool lower_ldexp;
3127
3128 bool lower_pack_half_2x16;
3129 bool lower_pack_unorm_2x16;
3130 bool lower_pack_snorm_2x16;
3131 bool lower_pack_unorm_4x8;
3132 bool lower_pack_snorm_4x8;
3133 bool lower_pack_64_2x32_split;
3134 bool lower_pack_32_2x16_split;
3135 bool lower_unpack_half_2x16;
3136 bool lower_unpack_unorm_2x16;
3137 bool lower_unpack_snorm_2x16;
3138 bool lower_unpack_unorm_4x8;
3139 bool lower_unpack_snorm_4x8;
3140 bool lower_unpack_64_2x32_split;
3141 bool lower_unpack_32_2x16_split;
3142
3143 bool lower_pack_split;
3144
3145 bool lower_extract_byte;
3146 bool lower_extract_word;
3147
3148 bool lower_all_io_to_temps;
3149 bool lower_all_io_to_elements;
3150
3151 /* Indicates that the driver only has zero-based vertex id */
3152 bool vertex_id_zero_based;
3153
3154 /**
3155 * If enabled, gl_BaseVertex will be lowered as:
3156 * is_indexed_draw (~0/0) & firstvertex
3157 */
3158 bool lower_base_vertex;
3159
3160 /**
3161 * If enabled, gl_HelperInvocation will be lowered as:
3162 *
3163 * !((1 << sample_id) & sample_mask_in))
3164 *
3165 * This depends on some possibly hw implementation details, which may
3166 * not be true for all hw. In particular that the FS is only executed
3167 * for covered samples or for helper invocations. So, do not blindly
3168 * enable this option.
3169 *
3170 * Note: See also issue #22 in ARB_shader_image_load_store
3171 */
3172 bool lower_helper_invocation;
3173
3174 /**
3175 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3176 *
3177 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3178 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3179 */
3180 bool optimize_sample_mask_in;
3181
3182 bool lower_cs_local_index_from_id;
3183 bool lower_cs_local_id_from_index;
3184
3185 /* Prevents lowering global_invocation_id to be in terms of work_group_id */
3186 bool has_cs_global_id;
3187
3188 bool lower_device_index_to_zero;
3189
3190 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3191 bool lower_wpos_pntc;
3192
3193 /**
3194 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3195 * lowered to simple arithmetic.
3196 *
3197 * If this flag is set, the lowering will be applied to all bit-sizes of
3198 * these instructions.
3199 *
3200 * \sa ::lower_hadd64
3201 */
3202 bool lower_hadd;
3203
3204 /**
3205 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3206 * should be lowered to simple arithmetic.
3207 *
3208 * If this flag is set, the lowering will be applied to only 64-bit
3209 * versions of these instructions.
3210 *
3211 * \sa ::lower_hadd
3212 */
3213 bool lower_hadd64;
3214
3215 /**
3216 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3217 * arithmetic.
3218 *
3219 * If this flag is set, the lowering will be applied to all bit-sizes of
3220 * these instructions.
3221 *
3222 * \sa ::lower_usub_sat64
3223 */
3224 bool lower_add_sat;
3225
3226 /**
3227 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3228 * arithmetic.
3229 *
3230 * \sa ::lower_add_sat
3231 */
3232 bool lower_usub_sat64;
3233
3234 /**
3235 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3236 * for IO purposes and would prefer loads/stores be vectorized.
3237 */
3238 bool vectorize_io;
3239 bool lower_to_scalar;
3240
3241 /**
3242 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3243 */
3244 bool vectorize_vec2_16bit;
3245
3246 /**
3247 * Should the linker unify inputs_read/outputs_written between adjacent
3248 * shader stages which are linked into a single program?
3249 */
3250 bool unify_interfaces;
3251
3252 /**
3253 * Should nir_lower_io() create load_interpolated_input intrinsics?
3254 *
3255 * If not, it generates regular load_input intrinsics and interpolation
3256 * information must be inferred from the list of input nir_variables.
3257 */
3258 bool use_interpolated_input_intrinsics;
3259
3260 /* Lowers when 32x32->64 bit multiplication is not supported */
3261 bool lower_mul_2x32_64;
3262
3263 /* Lowers when rotate instruction is not supported */
3264 bool lower_rotate;
3265
3266 /**
3267 * Backend supports imul24, and would like to use it (when possible)
3268 * for address/offset calculation. If true, driver should call
3269 * nir_lower_amul(). (If not set, amul will automatically be lowered
3270 * to imul.)
3271 */
3272 bool has_imul24;
3273
3274 /** Backend supports umul24, if not set umul24 will automatically be lowered
3275 * to imul with masked inputs */
3276 bool has_umul24;
3277
3278 /** Backend supports umad24, if not set umad24 will automatically be lowered
3279 * to imul with masked inputs and iadd */
3280 bool has_umad24;
3281
3282 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3283 * memory and control barrier intrinsics based on GLSL.
3284 */
3285 bool use_scoped_barrier;
3286
3287 /**
3288 * Is this the Intel vec4 backend?
3289 *
3290 * Used to inhibit algebraic optimizations that are known to be harmful on
3291 * the Intel vec4 backend. This is generally applicable to any
3292 * optimization that might cause more immediate values to be used in
3293 * 3-source (e.g., ffma and flrp) instructions.
3294 */
3295 bool intel_vec4;
3296
3297 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3298 bool lower_bfe_with_two_constants;
3299
3300 /** Whether 8-bit ALU is supported. */
3301 bool support_8bit_alu;
3302
3303 /** Whether 16-bit ALU is supported. */
3304 bool support_16bit_alu;
3305
3306 unsigned max_unroll_iterations;
3307
3308 nir_lower_int64_options lower_int64_options;
3309 nir_lower_doubles_options lower_doubles_options;
3310 } nir_shader_compiler_options;
3311
3312 typedef struct nir_shader {
3313 /** list of uniforms (nir_variable) */
3314 struct exec_list variables;
3315
3316 /** Set of driver-specific options for the shader.
3317 *
3318 * The memory for the options is expected to be kept in a single static
3319 * copy by the driver.
3320 */
3321 const struct nir_shader_compiler_options *options;
3322
3323 /** Various bits of compile-time information about a given shader */
3324 struct shader_info info;
3325
3326 struct exec_list functions; /** < list of nir_function */
3327
3328 /**
3329 * The size of the variable space for load_input_*, load_uniform_*, etc.
3330 * intrinsics. This is in back-end specific units which is likely one of
3331 * bytes, dwords, or vec4s depending on context and back-end.
3332 */
3333 unsigned num_inputs, num_uniforms, num_outputs;
3334
3335 /** Size in bytes of required shared memory */
3336 unsigned shared_size;
3337
3338 /** Size in bytes of required scratch space */
3339 unsigned scratch_size;
3340
3341 /** Constant data associated with this shader.
3342 *
3343 * Constant data is loaded through load_constant intrinsics (as compared to
3344 * the NIR load_const instructions which have the constant value inlined
3345 * into them). This is usually generated by nir_opt_large_constants (so
3346 * shaders don't have to load_const into a temporary array when they want
3347 * to indirect on a const array).
3348 */
3349 void *constant_data;
3350 /** Size of the constant data associated with the shader, in bytes */
3351 unsigned constant_data_size;
3352 } nir_shader;
3353
3354 #define nir_foreach_function(func, shader) \
3355 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3356
3357 static inline nir_function_impl *
3358 nir_shader_get_entrypoint(nir_shader *shader)
3359 {
3360 nir_function *func = NULL;
3361
3362 nir_foreach_function(function, shader) {
3363 assert(func == NULL);
3364 if (function->is_entrypoint) {
3365 func = function;
3366 #ifndef NDEBUG
3367 break;
3368 #endif
3369 }
3370 }
3371
3372 if (!func)
3373 return NULL;
3374
3375 assert(func->num_params == 0);
3376 assert(func->impl);
3377 return func->impl;
3378 }
3379
3380 nir_shader *nir_shader_create(void *mem_ctx,
3381 gl_shader_stage stage,
3382 const nir_shader_compiler_options *options,
3383 shader_info *si);
3384
3385 nir_register *nir_local_reg_create(nir_function_impl *impl);
3386
3387 void nir_reg_remove(nir_register *reg);
3388
3389 /** Adds a variable to the appropriate list in nir_shader */
3390 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3391
3392 static inline void
3393 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3394 {
3395 assert(var->data.mode == nir_var_function_temp);
3396 exec_list_push_tail(&impl->locals, &var->node);
3397 }
3398
3399 /** creates a variable, sets a few defaults, and adds it to the list */
3400 nir_variable *nir_variable_create(nir_shader *shader,
3401 nir_variable_mode mode,
3402 const struct glsl_type *type,
3403 const char *name);
3404 /** creates a local variable and adds it to the list */
3405 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3406 const struct glsl_type *type,
3407 const char *name);
3408
3409 nir_variable *nir_find_variable_with_location(nir_shader *shader,
3410 nir_variable_mode mode,
3411 unsigned location);
3412
3413 nir_variable *nir_find_variable_with_driver_location(nir_shader *shader,
3414 nir_variable_mode mode,
3415 unsigned location);
3416
3417 /** creates a function and adds it to the shader's list of functions */
3418 nir_function *nir_function_create(nir_shader *shader, const char *name);
3419
3420 nir_function_impl *nir_function_impl_create(nir_function *func);
3421 /** creates a function_impl that isn't tied to any particular function */
3422 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3423
3424 nir_block *nir_block_create(nir_shader *shader);
3425 nir_if *nir_if_create(nir_shader *shader);
3426 nir_loop *nir_loop_create(nir_shader *shader);
3427
3428 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3429
3430 /** requests that the given pieces of metadata be generated */
3431 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3432 /** dirties all but the preserved metadata */
3433 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3434 /** Preserves all metadata for the given shader */
3435 void nir_shader_preserve_all_metadata(nir_shader *shader);
3436
3437 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3438 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3439
3440 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3441 nir_deref_type deref_type);
3442
3443 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3444
3445 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3446 unsigned num_components,
3447 unsigned bit_size);
3448
3449 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3450 nir_intrinsic_op op);
3451
3452 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3453 nir_function *callee);
3454
3455 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3456
3457 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3458
3459 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3460
3461 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3462 unsigned num_components,
3463 unsigned bit_size);
3464
3465 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3466
3467 /**
3468 * NIR Cursors and Instruction Insertion API
3469 * @{
3470 *
3471 * A tiny struct representing a point to insert/extract instructions or
3472 * control flow nodes. Helps reduce the combinatorial explosion of possible
3473 * points to insert/extract.
3474 *
3475 * \sa nir_control_flow.h
3476 */
3477 typedef enum {
3478 nir_cursor_before_block,
3479 nir_cursor_after_block,
3480 nir_cursor_before_instr,
3481 nir_cursor_after_instr,
3482 } nir_cursor_option;
3483
3484 typedef struct {
3485 nir_cursor_option option;
3486 union {
3487 nir_block *block;
3488 nir_instr *instr;
3489 };
3490 } nir_cursor;
3491
3492 static inline nir_block *
3493 nir_cursor_current_block(nir_cursor cursor)
3494 {
3495 if (cursor.option == nir_cursor_before_instr ||
3496 cursor.option == nir_cursor_after_instr) {
3497 return cursor.instr->block;
3498 } else {
3499 return cursor.block;
3500 }
3501 }
3502
3503 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3504
3505 static inline nir_cursor
3506 nir_before_block(nir_block *block)
3507 {
3508 nir_cursor cursor;
3509 cursor.option = nir_cursor_before_block;
3510 cursor.block = block;
3511 return cursor;
3512 }
3513
3514 static inline nir_cursor
3515 nir_after_block(nir_block *block)
3516 {
3517 nir_cursor cursor;
3518 cursor.option = nir_cursor_after_block;
3519 cursor.block = block;
3520 return cursor;
3521 }
3522
3523 static inline nir_cursor
3524 nir_before_instr(nir_instr *instr)
3525 {
3526 nir_cursor cursor;
3527 cursor.option = nir_cursor_before_instr;
3528 cursor.instr = instr;
3529 return cursor;
3530 }
3531
3532 static inline nir_cursor
3533 nir_after_instr(nir_instr *instr)
3534 {
3535 nir_cursor cursor;
3536 cursor.option = nir_cursor_after_instr;
3537 cursor.instr = instr;
3538 return cursor;
3539 }
3540
3541 static inline nir_cursor
3542 nir_after_block_before_jump(nir_block *block)
3543 {
3544 nir_instr *last_instr = nir_block_last_instr(block);
3545 if (last_instr && last_instr->type == nir_instr_type_jump) {
3546 return nir_before_instr(last_instr);
3547 } else {
3548 return nir_after_block(block);
3549 }
3550 }
3551
3552 static inline nir_cursor
3553 nir_before_src(nir_src *src, bool is_if_condition)
3554 {
3555 if (is_if_condition) {
3556 nir_block *prev_block =
3557 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3558 assert(!nir_block_ends_in_jump(prev_block));
3559 return nir_after_block(prev_block);
3560 } else if (src->parent_instr->type == nir_instr_type_phi) {
3561 #ifndef NDEBUG
3562 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3563 bool found = false;
3564 nir_foreach_phi_src(phi_src, cond_phi) {
3565 if (phi_src->src.ssa == src->ssa) {
3566 found = true;
3567 break;
3568 }
3569 }
3570 assert(found);
3571 #endif
3572 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3573 * to have a more specific name.
3574 */
3575 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3576 return nir_after_block_before_jump(phi_src->pred);
3577 } else {
3578 return nir_before_instr(src->parent_instr);
3579 }
3580 }
3581
3582 static inline nir_cursor
3583 nir_before_cf_node(nir_cf_node *node)
3584 {
3585 if (node->type == nir_cf_node_block)
3586 return nir_before_block(nir_cf_node_as_block(node));
3587
3588 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3589 }
3590
3591 static inline nir_cursor
3592 nir_after_cf_node(nir_cf_node *node)
3593 {
3594 if (node->type == nir_cf_node_block)
3595 return nir_after_block(nir_cf_node_as_block(node));
3596
3597 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3598 }
3599
3600 static inline nir_cursor
3601 nir_after_phis(nir_block *block)
3602 {
3603 nir_foreach_instr(instr, block) {
3604 if (instr->type != nir_instr_type_phi)
3605 return nir_before_instr(instr);
3606 }
3607 return nir_after_block(block);
3608 }
3609
3610 static inline nir_cursor
3611 nir_after_cf_node_and_phis(nir_cf_node *node)
3612 {
3613 if (node->type == nir_cf_node_block)
3614 return nir_after_block(nir_cf_node_as_block(node));
3615
3616 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3617
3618 return nir_after_phis(block);
3619 }
3620
3621 static inline nir_cursor
3622 nir_before_cf_list(struct exec_list *cf_list)
3623 {
3624 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3625 exec_list_get_head(cf_list), node);
3626 return nir_before_cf_node(first_node);
3627 }
3628
3629 static inline nir_cursor
3630 nir_after_cf_list(struct exec_list *cf_list)
3631 {
3632 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3633 exec_list_get_tail(cf_list), node);
3634 return nir_after_cf_node(last_node);
3635 }
3636
3637 /**
3638 * Insert a NIR instruction at the given cursor.
3639 *
3640 * Note: This does not update the cursor.
3641 */
3642 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3643
3644 static inline void
3645 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3646 {
3647 nir_instr_insert(nir_before_instr(instr), before);
3648 }
3649
3650 static inline void
3651 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3652 {
3653 nir_instr_insert(nir_after_instr(instr), after);
3654 }
3655
3656 static inline void
3657 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3658 {
3659 nir_instr_insert(nir_before_block(block), before);
3660 }
3661
3662 static inline void
3663 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3664 {
3665 nir_instr_insert(nir_after_block(block), after);
3666 }
3667
3668 static inline void
3669 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3670 {
3671 nir_instr_insert(nir_before_cf_node(node), before);
3672 }
3673
3674 static inline void
3675 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3676 {
3677 nir_instr_insert(nir_after_cf_node(node), after);
3678 }
3679
3680 static inline void
3681 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3682 {
3683 nir_instr_insert(nir_before_cf_list(list), before);
3684 }
3685
3686 static inline void
3687 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3688 {
3689 nir_instr_insert(nir_after_cf_list(list), after);
3690 }
3691
3692 void nir_instr_remove_v(nir_instr *instr);
3693
3694 static inline nir_cursor
3695 nir_instr_remove(nir_instr *instr)
3696 {
3697 nir_cursor cursor;
3698 nir_instr *prev = nir_instr_prev(instr);
3699 if (prev) {
3700 cursor = nir_after_instr(prev);
3701 } else {
3702 cursor = nir_before_block(instr->block);
3703 }
3704 nir_instr_remove_v(instr);
3705 return cursor;
3706 }
3707
3708 /** @} */
3709
3710 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3711
3712 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3713 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3714 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3715 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3716 void *state);
3717 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3718 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3719 bool nir_foreach_phi_src_leaving_block(nir_block *instr,
3720 nir_foreach_src_cb cb,
3721 void *state);
3722
3723 nir_const_value *nir_src_as_const_value(nir_src src);
3724
3725 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3726 static inline c_type * \
3727 nir_src_as_ ## name (nir_src src) \
3728 { \
3729 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3730 ? cast_macro(src.ssa->parent_instr) : NULL; \
3731 }
3732
3733 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3734 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3735 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3736 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3737
3738 bool nir_src_is_dynamically_uniform(nir_src src);
3739 bool nir_srcs_equal(nir_src src1, nir_src src2);
3740 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3741 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3742 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3743 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3744 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3745 nir_dest new_dest);
3746
3747 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3748 unsigned num_components, unsigned bit_size,
3749 const char *name);
3750 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3751 unsigned num_components, unsigned bit_size,
3752 const char *name);
3753 static inline void
3754 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3755 const struct glsl_type *type,
3756 const char *name)
3757 {
3758 assert(glsl_type_is_vector_or_scalar(type));
3759 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3760 glsl_get_bit_size(type), name);
3761 }
3762 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3763 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3764 nir_instr *after_me);
3765
3766 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3767
3768
3769 /** Returns the next block, disregarding structure
3770 *
3771 * The ordering is deterministic but has no guarantees beyond that. In
3772 * particular, it is not guaranteed to be dominance-preserving.
3773 */
3774 nir_block *nir_block_unstructured_next(nir_block *block);
3775 nir_block *nir_unstructured_start_block(nir_function_impl *impl);
3776
3777 #define nir_foreach_block_unstructured(block, impl) \
3778 for (nir_block *block = nir_unstructured_start_block(impl); block != NULL; \
3779 block = nir_block_unstructured_next(block))
3780
3781 #define nir_foreach_block_unstructured_safe(block, impl) \
3782 for (nir_block *block = nir_unstructured_start_block(impl), \
3783 *next = nir_block_unstructured_next(block); \
3784 block != NULL; \
3785 block = next, next = nir_block_unstructured_next(block))
3786
3787 /*
3788 * finds the next basic block in source-code order, returns NULL if there is
3789 * none
3790 */
3791
3792 nir_block *nir_block_cf_tree_next(nir_block *block);
3793
3794 /* Performs the opposite of nir_block_cf_tree_next() */
3795
3796 nir_block *nir_block_cf_tree_prev(nir_block *block);
3797
3798 /* Gets the first block in a CF node in source-code order */
3799
3800 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3801
3802 /* Gets the last block in a CF node in source-code order */
3803
3804 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3805
3806 /* Gets the next block after a CF node in source-code order */
3807
3808 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3809
3810 /* Macros for loops that visit blocks in source-code order */
3811
3812 #define nir_foreach_block(block, impl) \
3813 for (nir_block *block = nir_start_block(impl); block != NULL; \
3814 block = nir_block_cf_tree_next(block))
3815
3816 #define nir_foreach_block_safe(block, impl) \
3817 for (nir_block *block = nir_start_block(impl), \
3818 *next = nir_block_cf_tree_next(block); \
3819 block != NULL; \
3820 block = next, next = nir_block_cf_tree_next(block))
3821
3822 #define nir_foreach_block_reverse(block, impl) \
3823 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3824 block = nir_block_cf_tree_prev(block))
3825
3826 #define nir_foreach_block_reverse_safe(block, impl) \
3827 for (nir_block *block = nir_impl_last_block(impl), \
3828 *prev = nir_block_cf_tree_prev(block); \
3829 block != NULL; \
3830 block = prev, prev = nir_block_cf_tree_prev(block))
3831
3832 #define nir_foreach_block_in_cf_node(block, node) \
3833 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3834 block != nir_cf_node_cf_tree_next(node); \
3835 block = nir_block_cf_tree_next(block))
3836
3837 /* If the following CF node is an if, this function returns that if.
3838 * Otherwise, it returns NULL.
3839 */
3840 nir_if *nir_block_get_following_if(nir_block *block);
3841
3842 nir_loop *nir_block_get_following_loop(nir_block *block);
3843
3844 void nir_index_local_regs(nir_function_impl *impl);
3845 void nir_index_ssa_defs(nir_function_impl *impl);
3846 unsigned nir_index_instrs(nir_function_impl *impl);
3847
3848 void nir_index_blocks(nir_function_impl *impl);
3849
3850 unsigned nir_shader_index_vars(nir_shader *shader, nir_variable_mode modes);
3851 unsigned nir_function_impl_index_vars(nir_function_impl *impl);
3852
3853 void nir_print_shader(nir_shader *shader, FILE *fp);
3854 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3855 void nir_print_instr(const nir_instr *instr, FILE *fp);
3856 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3857
3858 /** Shallow clone of a single instruction. */
3859 nir_instr *nir_instr_clone(nir_shader *s, const nir_instr *orig);
3860
3861 /** Shallow clone of a single ALU instruction. */
3862 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3863
3864 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3865 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3866 const nir_function_impl *fi);
3867 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3868 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3869
3870 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3871
3872 void nir_shader_serialize_deserialize(nir_shader *s);
3873
3874 #ifndef NDEBUG
3875 void nir_validate_shader(nir_shader *shader, const char *when);
3876 void nir_metadata_set_validation_flag(nir_shader *shader);
3877 void nir_metadata_check_validation_flag(nir_shader *shader);
3878
3879 static inline bool
3880 should_skip_nir(const char *name)
3881 {
3882 static const char *list = NULL;
3883 if (!list) {
3884 /* Comma separated list of names to skip. */
3885 list = getenv("NIR_SKIP");
3886 if (!list)
3887 list = "";
3888 }
3889
3890 if (!list[0])
3891 return false;
3892
3893 return comma_separated_list_contains(list, name);
3894 }
3895
3896 static inline bool
3897 should_clone_nir(void)
3898 {
3899 static int should_clone = -1;
3900 if (should_clone < 0)
3901 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3902
3903 return should_clone;
3904 }
3905
3906 static inline bool
3907 should_serialize_deserialize_nir(void)
3908 {
3909 static int test_serialize = -1;
3910 if (test_serialize < 0)
3911 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3912
3913 return test_serialize;
3914 }
3915
3916 static inline bool
3917 should_print_nir(void)
3918 {
3919 static int should_print = -1;
3920 if (should_print < 0)
3921 should_print = env_var_as_boolean("NIR_PRINT", false);
3922
3923 return should_print;
3924 }
3925 #else
3926 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3927 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3928 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3929 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3930 static inline bool should_clone_nir(void) { return false; }
3931 static inline bool should_serialize_deserialize_nir(void) { return false; }
3932 static inline bool should_print_nir(void) { return false; }
3933 #endif /* NDEBUG */
3934
3935 #define _PASS(pass, nir, do_pass) do { \
3936 if (should_skip_nir(#pass)) { \
3937 printf("skipping %s\n", #pass); \
3938 break; \
3939 } \
3940 do_pass \
3941 nir_validate_shader(nir, "after " #pass); \
3942 if (should_clone_nir()) { \
3943 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3944 nir_shader_replace(nir, clone); \
3945 } \
3946 if (should_serialize_deserialize_nir()) { \
3947 nir_shader_serialize_deserialize(nir); \
3948 } \
3949 } while (0)
3950
3951 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3952 nir_metadata_set_validation_flag(nir); \
3953 if (should_print_nir()) \
3954 printf("%s\n", #pass); \
3955 if (pass(nir, ##__VA_ARGS__)) { \
3956 progress = true; \
3957 if (should_print_nir()) \
3958 nir_print_shader(nir, stdout); \
3959 nir_metadata_check_validation_flag(nir); \
3960 } \
3961 )
3962
3963 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3964 if (should_print_nir()) \
3965 printf("%s\n", #pass); \
3966 pass(nir, ##__VA_ARGS__); \
3967 if (should_print_nir()) \
3968 nir_print_shader(nir, stdout); \
3969 )
3970
3971 #define NIR_SKIP(name) should_skip_nir(#name)
3972
3973 /** An instruction filtering callback
3974 *
3975 * Returns true if the instruction should be processed and false otherwise.
3976 */
3977 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3978
3979 /** A simple instruction lowering callback
3980 *
3981 * Many instruction lowering passes can be written as a simple function which
3982 * takes an instruction as its input and returns a sequence of instructions
3983 * that implement the consumed instruction. This function type represents
3984 * such a lowering function. When called, a function with this prototype
3985 * should either return NULL indicating that no lowering needs to be done or
3986 * emit a sequence of instructions using the provided builder (whose cursor
3987 * will already be placed after the instruction to be lowered) and return the
3988 * resulting nir_ssa_def.
3989 */
3990 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3991 nir_instr *, void *);
3992
3993 /**
3994 * Special return value for nir_lower_instr_cb when some progress occurred
3995 * (like changing an input to the instr) that didn't result in a replacement
3996 * SSA def being generated.
3997 */
3998 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3999
4000 /** Iterate over all the instructions in a nir_function_impl and lower them
4001 * using the provided callbacks
4002 *
4003 * This function implements the guts of a standard lowering pass for you. It
4004 * iterates over all of the instructions in a nir_function_impl and calls the
4005 * filter callback on each one. If the filter callback returns true, it then
4006 * calls the lowering call back on the instruction. (Splitting it this way
4007 * allows us to avoid some save/restore work for instructions we know won't be
4008 * lowered.) If the instruction is dead after the lowering is complete, it
4009 * will be removed. If new instructions are added, the lowering callback will
4010 * also be called on them in case multiple lowerings are required.
4011 *
4012 * The metadata for the nir_function_impl will also be updated. If any blocks
4013 * are added (they cannot be removed), dominance and block indices will be
4014 * invalidated.
4015 */
4016 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
4017 nir_instr_filter_cb filter,
4018 nir_lower_instr_cb lower,
4019 void *cb_data);
4020 bool nir_shader_lower_instructions(nir_shader *shader,
4021 nir_instr_filter_cb filter,
4022 nir_lower_instr_cb lower,
4023 void *cb_data);
4024
4025 void nir_calc_dominance_impl(nir_function_impl *impl);
4026 void nir_calc_dominance(nir_shader *shader);
4027
4028 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
4029 bool nir_block_dominates(nir_block *parent, nir_block *child);
4030 bool nir_block_is_unreachable(nir_block *block);
4031
4032 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
4033 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
4034
4035 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
4036 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
4037
4038 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
4039 void nir_dump_cfg(nir_shader *shader, FILE *fp);
4040
4041 int nir_gs_count_vertices(const nir_shader *shader);
4042
4043 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
4044 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
4045 bool nir_split_var_copies(nir_shader *shader);
4046 bool nir_split_per_member_structs(nir_shader *shader);
4047 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
4048
4049 bool nir_lower_returns_impl(nir_function_impl *impl);
4050 bool nir_lower_returns(nir_shader *shader);
4051
4052 void nir_inline_function_impl(struct nir_builder *b,
4053 const nir_function_impl *impl,
4054 nir_ssa_def **params,
4055 struct hash_table *shader_var_remap);
4056 bool nir_inline_functions(nir_shader *shader);
4057
4058 bool nir_propagate_invariant(nir_shader *shader);
4059
4060 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
4061 void nir_lower_deref_copy_instr(struct nir_builder *b,
4062 nir_intrinsic_instr *copy);
4063 bool nir_lower_var_copies(nir_shader *shader);
4064
4065 void nir_fixup_deref_modes(nir_shader *shader);
4066
4067 bool nir_lower_global_vars_to_local(nir_shader *shader);
4068
4069 typedef enum {
4070 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
4071 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
4072 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
4073 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
4074 } nir_lower_array_deref_of_vec_options;
4075
4076 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
4077 nir_lower_array_deref_of_vec_options options);
4078
4079 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
4080
4081 bool nir_lower_locals_to_regs(nir_shader *shader);
4082
4083 void nir_lower_io_to_temporaries(nir_shader *shader,
4084 nir_function_impl *entrypoint,
4085 bool outputs, bool inputs);
4086
4087 bool nir_lower_vars_to_scratch(nir_shader *shader,
4088 nir_variable_mode modes,
4089 int size_threshold,
4090 glsl_type_size_align_func size_align);
4091
4092 void nir_lower_clip_halfz(nir_shader *shader);
4093
4094 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
4095
4096 void nir_gather_ssa_types(nir_function_impl *impl,
4097 BITSET_WORD *float_types,
4098 BITSET_WORD *int_types);
4099
4100 void nir_assign_var_locations(nir_shader *shader, nir_variable_mode mode,
4101 unsigned *size,
4102 int (*type_size)(const struct glsl_type *, bool));
4103
4104 /* Some helpers to do very simple linking */
4105 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
4106 bool nir_remove_unused_io_vars(nir_shader *shader, nir_variable_mode mode,
4107 uint64_t *used_by_other_stage,
4108 uint64_t *used_by_other_stage_patches);
4109 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
4110 bool default_to_smooth_interp);
4111 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
4112 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
4113
4114 bool nir_lower_amul(nir_shader *shader,
4115 int (*type_size)(const struct glsl_type *, bool));
4116
4117 bool nir_lower_ubo_vec4(nir_shader *shader);
4118
4119 void nir_assign_io_var_locations(nir_shader *shader,
4120 nir_variable_mode mode,
4121 unsigned *size,
4122 gl_shader_stage stage);
4123
4124 typedef struct {
4125 uint8_t num_linked_io_vars;
4126 uint8_t num_linked_patch_io_vars;
4127 } nir_linked_io_var_info;
4128
4129 nir_linked_io_var_info
4130 nir_assign_linked_io_var_locations(nir_shader *producer,
4131 nir_shader *consumer);
4132
4133 typedef enum {
4134 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
4135 * to 32-bit operations. This is only valid for nir_var_shader_in/out
4136 * modes.
4137 */
4138 nir_lower_io_lower_64bit_to_32 = (1 << 0),
4139
4140 /* If set, this forces all non-flat fragment shader inputs to be
4141 * interpolated as if with the "sample" qualifier. This requires
4142 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
4143 */
4144 nir_lower_io_force_sample_interpolation = (1 << 1),
4145 } nir_lower_io_options;
4146 bool nir_lower_io(nir_shader *shader,
4147 nir_variable_mode modes,
4148 int (*type_size)(const struct glsl_type *, bool),
4149 nir_lower_io_options);
4150
4151 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
4152
4153 bool
4154 nir_lower_vars_to_explicit_types(nir_shader *shader,
4155 nir_variable_mode modes,
4156 glsl_type_size_align_func type_info);
4157
4158 bool nir_lower_mem_constant_vars(nir_shader *shader,
4159 glsl_type_size_align_func type_info);
4160
4161 typedef enum {
4162 /**
4163 * An address format which is a simple 32-bit global GPU address.
4164 */
4165 nir_address_format_32bit_global,
4166
4167 /**
4168 * An address format which is a simple 64-bit global GPU address.
4169 */
4170 nir_address_format_64bit_global,
4171
4172 /**
4173 * An address format which is a bounds-checked 64-bit global GPU address.
4174 *
4175 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
4176 * address stored with the low bits in .x and high bits in .y, .z is a
4177 * size, and .w is an offset. When the final I/O operation is lowered, .w
4178 * is checked against .z and the operation is predicated on the result.
4179 */
4180 nir_address_format_64bit_bounded_global,
4181
4182 /**
4183 * An address format which is comprised of a vec2 where the first
4184 * component is a buffer index and the second is an offset.
4185 */
4186 nir_address_format_32bit_index_offset,
4187
4188 /**
4189 * An address format which is a 64-bit value, where the high 32 bits
4190 * are a buffer index, and the low 32 bits are an offset.
4191 */
4192 nir_address_format_32bit_index_offset_pack64,
4193
4194 /**
4195 * An address format which is comprised of a vec3 where the first two
4196 * components specify the buffer and the third is an offset.
4197 */
4198 nir_address_format_vec2_index_32bit_offset,
4199
4200 /**
4201 * An address format which is a simple 32-bit offset.
4202 */
4203 nir_address_format_32bit_offset,
4204