nir: Add a nir_foreach_function_temp_variable helper
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #define XXH_INLINE_ALL
45 #include "util/xxhash.h"
46 #include <stdio.h>
47
48 #ifndef NDEBUG
49 #include "util/debug.h"
50 #endif /* NDEBUG */
51
52 #include "nir_opcodes.h"
53
54 #if defined(_WIN32) && !defined(snprintf)
55 #define snprintf _snprintf
56 #endif
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #define NIR_FALSE 0u
63 #define NIR_TRUE (~0u)
64 #define NIR_MAX_VEC_COMPONENTS 16
65 #define NIR_MAX_MATRIX_COLUMNS 4
66 #define NIR_STREAM_PACKED (1 << 8)
67 typedef uint16_t nir_component_mask_t;
68
69 static inline bool
70 nir_num_components_valid(unsigned num_components)
71 {
72 return (num_components >= 1 &&
73 num_components <= 4) ||
74 num_components == 8 ||
75 num_components == 16;
76 }
77
78 /** Defines a cast function
79 *
80 * This macro defines a cast function from in_type to out_type where
81 * out_type is some structure type that contains a field of type out_type.
82 *
83 * Note that you have to be a bit careful as the generated cast function
84 * destroys constness.
85 */
86 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
87 type_field, type_value) \
88 static inline out_type * \
89 name(const in_type *parent) \
90 { \
91 assert(parent && parent->type_field == type_value); \
92 return exec_node_data(out_type, parent, field); \
93 }
94
95 struct nir_function;
96 struct nir_shader;
97 struct nir_instr;
98 struct nir_builder;
99
100
101 /**
102 * Description of built-in state associated with a uniform
103 *
104 * \sa nir_variable::state_slots
105 */
106 typedef struct {
107 gl_state_index16 tokens[STATE_LENGTH];
108 uint16_t swizzle;
109 } nir_state_slot;
110
111 typedef enum {
112 nir_var_shader_in = (1 << 0),
113 nir_var_shader_out = (1 << 1),
114 nir_var_shader_temp = (1 << 2),
115 nir_var_function_temp = (1 << 3),
116 nir_var_uniform = (1 << 4),
117 nir_var_mem_ubo = (1 << 5),
118 nir_var_system_value = (1 << 6),
119 nir_var_mem_ssbo = (1 << 7),
120 nir_var_mem_shared = (1 << 8),
121 nir_var_mem_global = (1 << 9),
122 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
123 nir_num_variable_modes = 11,
124 nir_var_all = (1 << nir_num_variable_modes) - 1,
125 } nir_variable_mode;
126
127 /**
128 * Rounding modes.
129 */
130 typedef enum {
131 nir_rounding_mode_undef = 0,
132 nir_rounding_mode_rtne = 1, /* round to nearest even */
133 nir_rounding_mode_ru = 2, /* round up */
134 nir_rounding_mode_rd = 3, /* round down */
135 nir_rounding_mode_rtz = 4, /* round towards zero */
136 } nir_rounding_mode;
137
138 typedef union {
139 bool b;
140 float f32;
141 double f64;
142 int8_t i8;
143 uint8_t u8;
144 int16_t i16;
145 uint16_t u16;
146 int32_t i32;
147 uint32_t u32;
148 int64_t i64;
149 uint64_t u64;
150 } nir_const_value;
151
152 #define nir_const_value_to_array(arr, c, components, m) \
153 { \
154 for (unsigned i = 0; i < components; ++i) \
155 arr[i] = c[i].m; \
156 } while (false)
157
158 static inline nir_const_value
159 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
160 {
161 nir_const_value v;
162 memset(&v, 0, sizeof(v));
163
164 switch (bit_size) {
165 case 1: v.b = x; break;
166 case 8: v.u8 = x; break;
167 case 16: v.u16 = x; break;
168 case 32: v.u32 = x; break;
169 case 64: v.u64 = x; break;
170 default:
171 unreachable("Invalid bit size");
172 }
173
174 return v;
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_int(int64_t i, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64) {
185 assert(i >= (-(1ll << (bit_size - 1))));
186 assert(i < (1ll << (bit_size - 1)));
187 }
188
189 return nir_const_value_for_raw_uint(i, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
194 {
195 nir_const_value v;
196 memset(&v, 0, sizeof(v));
197
198 assert(bit_size <= 64);
199 if (bit_size < 64)
200 assert(u < (1ull << bit_size));
201
202 return nir_const_value_for_raw_uint(u, bit_size);
203 }
204
205 static inline nir_const_value
206 nir_const_value_for_bool(bool b, unsigned bit_size)
207 {
208 /* Booleans use a 0/-1 convention */
209 return nir_const_value_for_int(-(int)b, bit_size);
210 }
211
212 /* This one isn't inline because it requires half-float conversion */
213 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
214
215 static inline int64_t
216 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 /* int1_t uses 0/-1 convention */
220 case 1: return -(int)value.b;
221 case 8: return value.i8;
222 case 16: return value.i16;
223 case 32: return value.i32;
224 case 64: return value.i64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline uint64_t
231 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
232 {
233 switch (bit_size) {
234 case 1: return value.b;
235 case 8: return value.u8;
236 case 16: return value.u16;
237 case 32: return value.u32;
238 case 64: return value.u64;
239 default:
240 unreachable("Invalid bit size");
241 }
242 }
243
244 static inline bool
245 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
246 {
247 int64_t i = nir_const_value_as_int(value, bit_size);
248
249 /* Booleans of any size use 0/-1 convention */
250 assert(i == 0 || i == -1);
251
252 return i;
253 }
254
255 /* This one isn't inline because it requires half-float conversion */
256 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
257
258 typedef struct nir_constant {
259 /**
260 * Value of the constant.
261 *
262 * The field used to back the values supplied by the constant is determined
263 * by the type associated with the \c nir_variable. Constants may be
264 * scalars, vectors, or matrices.
265 */
266 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
267
268 /* we could get this from the var->type but makes clone *much* easier to
269 * not have to care about the type.
270 */
271 unsigned num_elements;
272
273 /* Array elements / Structure Fields */
274 struct nir_constant **elements;
275 } nir_constant;
276
277 /**
278 * \brief Layout qualifiers for gl_FragDepth.
279 *
280 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
281 * with a layout qualifier.
282 */
283 typedef enum {
284 nir_depth_layout_none, /**< No depth layout is specified. */
285 nir_depth_layout_any,
286 nir_depth_layout_greater,
287 nir_depth_layout_less,
288 nir_depth_layout_unchanged
289 } nir_depth_layout;
290
291 /**
292 * Enum keeping track of how a variable was declared.
293 */
294 typedef enum {
295 /**
296 * Normal declaration.
297 */
298 nir_var_declared_normally = 0,
299
300 /**
301 * Variable is implicitly generated by the compiler and should not be
302 * visible via the API.
303 */
304 nir_var_hidden,
305 } nir_var_declaration_type;
306
307 /**
308 * Either a uniform, global variable, shader input, or shader output. Based on
309 * ir_variable - it should be easy to translate between the two.
310 */
311
312 typedef struct nir_variable {
313 struct exec_node node;
314
315 /**
316 * Declared type of the variable
317 */
318 const struct glsl_type *type;
319
320 /**
321 * Declared name of the variable
322 */
323 char *name;
324
325 struct nir_variable_data {
326 /**
327 * Storage class of the variable.
328 *
329 * \sa nir_variable_mode
330 */
331 nir_variable_mode mode:11;
332
333 /**
334 * Is the variable read-only?
335 *
336 * This is set for variables declared as \c const, shader inputs,
337 * and uniforms.
338 */
339 unsigned read_only:1;
340 unsigned centroid:1;
341 unsigned sample:1;
342 unsigned patch:1;
343 unsigned invariant:1;
344
345 /**
346 * Precision qualifier.
347 *
348 * In desktop GLSL we do not care about precision qualifiers at all, in
349 * fact, the spec says that precision qualifiers are ignored.
350 *
351 * To make things easy, we make it so that this field is always
352 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
353 * have the same precision value and the checks we add in the compiler
354 * for this field will never break a desktop shader compile.
355 */
356 unsigned precision:2;
357
358 /**
359 * Can this variable be coalesced with another?
360 *
361 * This is set by nir_lower_io_to_temporaries to say that any
362 * copies involving this variable should stay put. Propagating it can
363 * duplicate the resulting load/store, which is not wanted, and may
364 * result in a load/store of the variable with an indirect offset which
365 * the backend may not be able to handle.
366 */
367 unsigned cannot_coalesce:1;
368
369 /**
370 * When separate shader programs are enabled, only input/outputs between
371 * the stages of a multi-stage separate program can be safely removed
372 * from the shader interface. Other input/outputs must remains active.
373 *
374 * This is also used to make sure xfb varyings that are unused by the
375 * fragment shader are not removed.
376 */
377 unsigned always_active_io:1;
378
379 /**
380 * Interpolation mode for shader inputs / outputs
381 *
382 * \sa glsl_interp_mode
383 */
384 unsigned interpolation:3;
385
386 /**
387 * If non-zero, then this variable may be packed along with other variables
388 * into a single varying slot, so this offset should be applied when
389 * accessing components. For example, an offset of 1 means that the x
390 * component of this variable is actually stored in component y of the
391 * location specified by \c location.
392 */
393 unsigned location_frac:2;
394
395 /**
396 * If true, this variable represents an array of scalars that should
397 * be tightly packed. In other words, consecutive array elements
398 * should be stored one component apart, rather than one slot apart.
399 */
400 unsigned compact:1;
401
402 /**
403 * Whether this is a fragment shader output implicitly initialized with
404 * the previous contents of the specified render target at the
405 * framebuffer location corresponding to this shader invocation.
406 */
407 unsigned fb_fetch_output:1;
408
409 /**
410 * Non-zero if this variable is considered bindless as defined by
411 * ARB_bindless_texture.
412 */
413 unsigned bindless:1;
414
415 /**
416 * Was an explicit binding set in the shader?
417 */
418 unsigned explicit_binding:1;
419
420 /**
421 * Was the location explicitly set in the shader?
422 *
423 * If the location is explicitly set in the shader, it \b cannot be changed
424 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 * no effect).
426 */
427 unsigned explicit_location:1;
428
429 /**
430 * Was a transfer feedback buffer set in the shader?
431 */
432 unsigned explicit_xfb_buffer:1;
433
434 /**
435 * Was a transfer feedback stride set in the shader?
436 */
437 unsigned explicit_xfb_stride:1;
438
439 /**
440 * Was an explicit offset set in the shader?
441 */
442 unsigned explicit_offset:1;
443
444 /**
445 * Layout of the matrix. Uses glsl_matrix_layout values.
446 */
447 unsigned matrix_layout:2;
448
449 /**
450 * Non-zero if this variable was created by lowering a named interface
451 * block.
452 */
453 unsigned from_named_ifc_block:1;
454
455 /**
456 * How the variable was declared. See nir_var_declaration_type.
457 *
458 * This is used to detect variables generated by the compiler, so should
459 * not be visible via the API.
460 */
461 unsigned how_declared:2;
462
463 /**
464 * Is this variable per-view? If so, we know it must be an array with
465 * size corresponding to the number of views.
466 */
467 unsigned per_view:1;
468
469 /**
470 * \brief Layout qualifier for gl_FragDepth.
471 *
472 * This is not equal to \c ir_depth_layout_none if and only if this
473 * variable is \c gl_FragDepth and a layout qualifier is specified.
474 */
475 nir_depth_layout depth_layout:3;
476
477 /**
478 * Vertex stream output identifier.
479 *
480 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
481 * indicate the stream of the i-th component.
482 */
483 unsigned stream:9;
484
485 /**
486 * Access flags for memory variables (SSBO/global), image uniforms, and
487 * bindless images in uniforms/inputs/outputs.
488 */
489 enum gl_access_qualifier access:8;
490
491 /**
492 * Descriptor set binding for sampler or UBO.
493 */
494 unsigned descriptor_set:5;
495
496 /**
497 * output index for dual source blending.
498 */
499 unsigned index;
500
501 /**
502 * Initial binding point for a sampler or UBO.
503 *
504 * For array types, this represents the binding point for the first element.
505 */
506 unsigned binding;
507
508 /**
509 * Storage location of the base of this variable
510 *
511 * The precise meaning of this field depends on the nature of the variable.
512 *
513 * - Vertex shader input: one of the values from \c gl_vert_attrib.
514 * - Vertex shader output: one of the values from \c gl_varying_slot.
515 * - Geometry shader input: one of the values from \c gl_varying_slot.
516 * - Geometry shader output: one of the values from \c gl_varying_slot.
517 * - Fragment shader input: one of the values from \c gl_varying_slot.
518 * - Fragment shader output: one of the values from \c gl_frag_result.
519 * - Uniforms: Per-stage uniform slot number for default uniform block.
520 * - Uniforms: Index within the uniform block definition for UBO members.
521 * - Non-UBO Uniforms: uniform slot number.
522 * - Other: This field is not currently used.
523 *
524 * If the variable is a uniform, shader input, or shader output, and the
525 * slot has not been assigned, the value will be -1.
526 */
527 int location;
528
529 /**
530 * The actual location of the variable in the IR. Only valid for inputs,
531 * outputs, and uniforms (including samplers and images).
532 */
533 unsigned driver_location;
534
535 /**
536 * Location an atomic counter or transform feedback is stored at.
537 */
538 unsigned offset;
539
540 union {
541 struct {
542 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
543 enum pipe_format format;
544 } image;
545
546 struct {
547 /**
548 * Transform feedback buffer.
549 */
550 uint16_t buffer:2;
551
552 /**
553 * Transform feedback stride.
554 */
555 uint16_t stride;
556 } xfb;
557 };
558 } data;
559
560 /**
561 * Identifier for this variable generated by nir_index_vars() that is unique
562 * among other variables in the same exec_list.
563 */
564 unsigned index;
565
566 /* Number of nir_variable_data members */
567 uint16_t num_members;
568
569 /**
570 * Built-in state that backs this uniform
571 *
572 * Once set at variable creation, \c state_slots must remain invariant.
573 * This is because, ideally, this array would be shared by all clones of
574 * this variable in the IR tree. In other words, we'd really like for it
575 * to be a fly-weight.
576 *
577 * If the variable is not a uniform, \c num_state_slots will be zero and
578 * \c state_slots will be \c NULL.
579 */
580 /*@{*/
581 uint16_t num_state_slots; /**< Number of state slots used */
582 nir_state_slot *state_slots; /**< State descriptors. */
583 /*@}*/
584
585 /**
586 * Constant expression assigned in the initializer of the variable
587 *
588 * This field should only be used temporarily by creators of NIR shaders
589 * and then lower_constant_initializers can be used to get rid of them.
590 * Most of the rest of NIR ignores this field or asserts that it's NULL.
591 */
592 nir_constant *constant_initializer;
593
594 /**
595 * Global variable assigned in the initializer of the variable
596 * This field should only be used temporarily by creators of NIR shaders
597 * and then lower_constant_initializers can be used to get rid of them.
598 * Most of the rest of NIR ignores this field or asserts that it's NULL.
599 */
600 struct nir_variable *pointer_initializer;
601
602 /**
603 * For variables that are in an interface block or are an instance of an
604 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
605 *
606 * \sa ir_variable::location
607 */
608 const struct glsl_type *interface_type;
609
610 /**
611 * Description of per-member data for per-member struct variables
612 *
613 * This is used for variables which are actually an amalgamation of
614 * multiple entities such as a struct of built-in values or a struct of
615 * inputs each with their own layout specifier. This is only allowed on
616 * variables with a struct or array of array of struct type.
617 */
618 struct nir_variable_data *members;
619 } nir_variable;
620
621 #define nir_foreach_variable(var, var_list) \
622 foreach_list_typed(nir_variable, var, node, var_list)
623
624 #define nir_foreach_variable_safe(var, var_list) \
625 foreach_list_typed_safe(nir_variable, var, node, var_list)
626
627 #define nir_foreach_shader_in_variable(var, shader) \
628 nir_foreach_variable(var, &(shader)->inputs)
629
630 #define nir_foreach_shader_in_variable_safe(var, shader) \
631 nir_foreach_variable_safe(var, &(shader)->inputs)
632
633 #define nir_foreach_shader_out_variable(var, shader) \
634 nir_foreach_variable(var, &(shader)->outputs)
635
636 #define nir_foreach_shader_out_variable_safe(var, shader) \
637 nir_foreach_variable_safe(var, &(shader)->outputs)
638
639 static inline bool
640 nir_variable_is_global(const nir_variable *var)
641 {
642 return var->data.mode != nir_var_function_temp;
643 }
644
645 typedef struct nir_register {
646 struct exec_node node;
647
648 unsigned num_components; /** < number of vector components */
649 unsigned num_array_elems; /** < size of array (0 for no array) */
650
651 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
652 uint8_t bit_size;
653
654 /** generic register index. */
655 unsigned index;
656
657 /** only for debug purposes, can be NULL */
658 const char *name;
659
660 /** set of nir_srcs where this register is used (read from) */
661 struct list_head uses;
662
663 /** set of nir_dests where this register is defined (written to) */
664 struct list_head defs;
665
666 /** set of nir_ifs where this register is used as a condition */
667 struct list_head if_uses;
668 } nir_register;
669
670 #define nir_foreach_register(reg, reg_list) \
671 foreach_list_typed(nir_register, reg, node, reg_list)
672 #define nir_foreach_register_safe(reg, reg_list) \
673 foreach_list_typed_safe(nir_register, reg, node, reg_list)
674
675 typedef enum PACKED {
676 nir_instr_type_alu,
677 nir_instr_type_deref,
678 nir_instr_type_call,
679 nir_instr_type_tex,
680 nir_instr_type_intrinsic,
681 nir_instr_type_load_const,
682 nir_instr_type_jump,
683 nir_instr_type_ssa_undef,
684 nir_instr_type_phi,
685 nir_instr_type_parallel_copy,
686 } nir_instr_type;
687
688 typedef struct nir_instr {
689 struct exec_node node;
690 struct nir_block *block;
691 nir_instr_type type;
692
693 /* A temporary for optimization and analysis passes to use for storing
694 * flags. For instance, DCE uses this to store the "dead/live" info.
695 */
696 uint8_t pass_flags;
697
698 /** generic instruction index. */
699 unsigned index;
700 } nir_instr;
701
702 static inline nir_instr *
703 nir_instr_next(nir_instr *instr)
704 {
705 struct exec_node *next = exec_node_get_next(&instr->node);
706 if (exec_node_is_tail_sentinel(next))
707 return NULL;
708 else
709 return exec_node_data(nir_instr, next, node);
710 }
711
712 static inline nir_instr *
713 nir_instr_prev(nir_instr *instr)
714 {
715 struct exec_node *prev = exec_node_get_prev(&instr->node);
716 if (exec_node_is_head_sentinel(prev))
717 return NULL;
718 else
719 return exec_node_data(nir_instr, prev, node);
720 }
721
722 static inline bool
723 nir_instr_is_first(const nir_instr *instr)
724 {
725 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
726 }
727
728 static inline bool
729 nir_instr_is_last(const nir_instr *instr)
730 {
731 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
732 }
733
734 typedef struct nir_ssa_def {
735 /** for debugging only, can be NULL */
736 const char* name;
737
738 /** generic SSA definition index. */
739 unsigned index;
740
741 /** Index into the live_in and live_out bitfields */
742 unsigned live_index;
743
744 /** Instruction which produces this SSA value. */
745 nir_instr *parent_instr;
746
747 /** set of nir_instrs where this register is used (read from) */
748 struct list_head uses;
749
750 /** set of nir_ifs where this register is used as a condition */
751 struct list_head if_uses;
752
753 uint8_t num_components;
754
755 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
756 uint8_t bit_size;
757
758 /**
759 * True if this SSA value may have different values in different SIMD
760 * invocations of the shader. This is set by nir_divergence_analysis.
761 */
762 bool divergent;
763 } nir_ssa_def;
764
765 struct nir_src;
766
767 typedef struct {
768 nir_register *reg;
769 struct nir_src *indirect; /** < NULL for no indirect offset */
770 unsigned base_offset;
771
772 /* TODO use-def chain goes here */
773 } nir_reg_src;
774
775 typedef struct {
776 nir_instr *parent_instr;
777 struct list_head def_link;
778
779 nir_register *reg;
780 struct nir_src *indirect; /** < NULL for no indirect offset */
781 unsigned base_offset;
782
783 /* TODO def-use chain goes here */
784 } nir_reg_dest;
785
786 struct nir_if;
787
788 typedef struct nir_src {
789 union {
790 /** Instruction that consumes this value as a source. */
791 nir_instr *parent_instr;
792 struct nir_if *parent_if;
793 };
794
795 struct list_head use_link;
796
797 union {
798 nir_reg_src reg;
799 nir_ssa_def *ssa;
800 };
801
802 bool is_ssa;
803 } nir_src;
804
805 static inline nir_src
806 nir_src_init(void)
807 {
808 nir_src src = { { NULL } };
809 return src;
810 }
811
812 #define NIR_SRC_INIT nir_src_init()
813
814 #define nir_foreach_use(src, reg_or_ssa_def) \
815 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
816
817 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
818 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
819
820 #define nir_foreach_if_use(src, reg_or_ssa_def) \
821 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
822
823 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
824 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
825
826 typedef struct {
827 union {
828 nir_reg_dest reg;
829 nir_ssa_def ssa;
830 };
831
832 bool is_ssa;
833 } nir_dest;
834
835 static inline nir_dest
836 nir_dest_init(void)
837 {
838 nir_dest dest = { { { NULL } } };
839 return dest;
840 }
841
842 #define NIR_DEST_INIT nir_dest_init()
843
844 #define nir_foreach_def(dest, reg) \
845 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
846
847 #define nir_foreach_def_safe(dest, reg) \
848 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
849
850 static inline nir_src
851 nir_src_for_ssa(nir_ssa_def *def)
852 {
853 nir_src src = NIR_SRC_INIT;
854
855 src.is_ssa = true;
856 src.ssa = def;
857
858 return src;
859 }
860
861 static inline nir_src
862 nir_src_for_reg(nir_register *reg)
863 {
864 nir_src src = NIR_SRC_INIT;
865
866 src.is_ssa = false;
867 src.reg.reg = reg;
868 src.reg.indirect = NULL;
869 src.reg.base_offset = 0;
870
871 return src;
872 }
873
874 static inline nir_dest
875 nir_dest_for_reg(nir_register *reg)
876 {
877 nir_dest dest = NIR_DEST_INIT;
878
879 dest.reg.reg = reg;
880
881 return dest;
882 }
883
884 static inline unsigned
885 nir_src_bit_size(nir_src src)
886 {
887 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
888 }
889
890 static inline unsigned
891 nir_src_num_components(nir_src src)
892 {
893 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
894 }
895
896 static inline bool
897 nir_src_is_const(nir_src src)
898 {
899 return src.is_ssa &&
900 src.ssa->parent_instr->type == nir_instr_type_load_const;
901 }
902
903 static inline bool
904 nir_src_is_divergent(nir_src src)
905 {
906 assert(src.is_ssa);
907 return src.ssa->divergent;
908 }
909
910 static inline unsigned
911 nir_dest_bit_size(nir_dest dest)
912 {
913 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
914 }
915
916 static inline unsigned
917 nir_dest_num_components(nir_dest dest)
918 {
919 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
920 }
921
922 static inline bool
923 nir_dest_is_divergent(nir_dest dest)
924 {
925 assert(dest.is_ssa);
926 return dest.ssa.divergent;
927 }
928
929 /* Are all components the same, ie. .xxxx */
930 static inline bool
931 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
932 {
933 for (unsigned i = 1; i < nr_comp; i++)
934 if (swiz[i] != swiz[0])
935 return false;
936 return true;
937 }
938
939 /* Are all components sequential, ie. .yzw */
940 static inline bool
941 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
942 {
943 for (unsigned i = 1; i < nr_comp; i++)
944 if (swiz[i] != (swiz[0] + i))
945 return false;
946 return true;
947 }
948
949 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
950 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
951
952 typedef struct {
953 nir_src src;
954
955 /**
956 * \name input modifiers
957 */
958 /*@{*/
959 /**
960 * For inputs interpreted as floating point, flips the sign bit. For
961 * inputs interpreted as integers, performs the two's complement negation.
962 */
963 bool negate;
964
965 /**
966 * Clears the sign bit for floating point values, and computes the integer
967 * absolute value for integers. Note that the negate modifier acts after
968 * the absolute value modifier, therefore if both are set then all inputs
969 * will become negative.
970 */
971 bool abs;
972 /*@}*/
973
974 /**
975 * For each input component, says which component of the register it is
976 * chosen from. Note that which elements of the swizzle are used and which
977 * are ignored are based on the write mask for most opcodes - for example,
978 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
979 * a swizzle of {2, x, 1, 0} where x means "don't care."
980 */
981 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
982 } nir_alu_src;
983
984 typedef struct {
985 nir_dest dest;
986
987 /**
988 * \name saturate output modifier
989 *
990 * Only valid for opcodes that output floating-point numbers. Clamps the
991 * output to between 0.0 and 1.0 inclusive.
992 */
993
994 bool saturate;
995
996 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
997 } nir_alu_dest;
998
999 /** NIR sized and unsized types
1000 *
1001 * The values in this enum are carefully chosen so that the sized type is
1002 * just the unsized type OR the number of bits.
1003 */
1004 typedef enum PACKED {
1005 nir_type_invalid = 0, /* Not a valid type */
1006 nir_type_int = 2,
1007 nir_type_uint = 4,
1008 nir_type_bool = 6,
1009 nir_type_float = 128,
1010 nir_type_bool1 = 1 | nir_type_bool,
1011 nir_type_bool8 = 8 | nir_type_bool,
1012 nir_type_bool16 = 16 | nir_type_bool,
1013 nir_type_bool32 = 32 | nir_type_bool,
1014 nir_type_int1 = 1 | nir_type_int,
1015 nir_type_int8 = 8 | nir_type_int,
1016 nir_type_int16 = 16 | nir_type_int,
1017 nir_type_int32 = 32 | nir_type_int,
1018 nir_type_int64 = 64 | nir_type_int,
1019 nir_type_uint1 = 1 | nir_type_uint,
1020 nir_type_uint8 = 8 | nir_type_uint,
1021 nir_type_uint16 = 16 | nir_type_uint,
1022 nir_type_uint32 = 32 | nir_type_uint,
1023 nir_type_uint64 = 64 | nir_type_uint,
1024 nir_type_float16 = 16 | nir_type_float,
1025 nir_type_float32 = 32 | nir_type_float,
1026 nir_type_float64 = 64 | nir_type_float,
1027 } nir_alu_type;
1028
1029 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1030 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1031
1032 static inline unsigned
1033 nir_alu_type_get_type_size(nir_alu_type type)
1034 {
1035 return type & NIR_ALU_TYPE_SIZE_MASK;
1036 }
1037
1038 static inline nir_alu_type
1039 nir_alu_type_get_base_type(nir_alu_type type)
1040 {
1041 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1042 }
1043
1044 static inline nir_alu_type
1045 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1046 {
1047 switch (base_type) {
1048 case GLSL_TYPE_BOOL:
1049 return nir_type_bool1;
1050 break;
1051 case GLSL_TYPE_UINT:
1052 return nir_type_uint32;
1053 break;
1054 case GLSL_TYPE_INT:
1055 return nir_type_int32;
1056 break;
1057 case GLSL_TYPE_UINT16:
1058 return nir_type_uint16;
1059 break;
1060 case GLSL_TYPE_INT16:
1061 return nir_type_int16;
1062 break;
1063 case GLSL_TYPE_UINT8:
1064 return nir_type_uint8;
1065 case GLSL_TYPE_INT8:
1066 return nir_type_int8;
1067 case GLSL_TYPE_UINT64:
1068 return nir_type_uint64;
1069 break;
1070 case GLSL_TYPE_INT64:
1071 return nir_type_int64;
1072 break;
1073 case GLSL_TYPE_FLOAT:
1074 return nir_type_float32;
1075 break;
1076 case GLSL_TYPE_FLOAT16:
1077 return nir_type_float16;
1078 break;
1079 case GLSL_TYPE_DOUBLE:
1080 return nir_type_float64;
1081 break;
1082
1083 case GLSL_TYPE_SAMPLER:
1084 case GLSL_TYPE_IMAGE:
1085 case GLSL_TYPE_ATOMIC_UINT:
1086 case GLSL_TYPE_STRUCT:
1087 case GLSL_TYPE_INTERFACE:
1088 case GLSL_TYPE_ARRAY:
1089 case GLSL_TYPE_VOID:
1090 case GLSL_TYPE_SUBROUTINE:
1091 case GLSL_TYPE_FUNCTION:
1092 case GLSL_TYPE_ERROR:
1093 return nir_type_invalid;
1094 }
1095
1096 unreachable("unknown type");
1097 }
1098
1099 static inline nir_alu_type
1100 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1101 {
1102 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1103 }
1104
1105 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1106 nir_rounding_mode rnd);
1107
1108 static inline nir_op
1109 nir_op_vec(unsigned components)
1110 {
1111 switch (components) {
1112 case 1: return nir_op_mov;
1113 case 2: return nir_op_vec2;
1114 case 3: return nir_op_vec3;
1115 case 4: return nir_op_vec4;
1116 case 8: return nir_op_vec8;
1117 case 16: return nir_op_vec16;
1118 default: unreachable("bad component count");
1119 }
1120 }
1121
1122 static inline bool
1123 nir_op_is_vec(nir_op op)
1124 {
1125 switch (op) {
1126 case nir_op_mov:
1127 case nir_op_vec2:
1128 case nir_op_vec3:
1129 case nir_op_vec4:
1130 case nir_op_vec8:
1131 case nir_op_vec16:
1132 return true;
1133 default:
1134 return false;
1135 }
1136 }
1137
1138 static inline bool
1139 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1140 {
1141 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1142 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1143 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1144 }
1145
1146 static inline bool
1147 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1148 {
1149 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1150 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1151 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1152 }
1153
1154 static inline bool
1155 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1156 {
1157 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1158 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1159 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1160 }
1161
1162 static inline bool
1163 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1164 {
1165 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1166 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1167 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1168 }
1169
1170 static inline bool
1171 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1172 {
1173 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1174 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1175 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1176 }
1177
1178 static inline bool
1179 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1180 {
1181 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1182 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1183 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1184 }
1185
1186 static inline bool
1187 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1188 {
1189 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1190 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1191 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1192 }
1193
1194 static inline nir_rounding_mode
1195 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1196 nir_alu_type type)
1197 {
1198 if (nir_alu_type_get_base_type(type) != nir_type_float)
1199 return nir_rounding_mode_undef;
1200
1201 unsigned bit_size = nir_alu_type_get_type_size(type);
1202
1203 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1204 return nir_rounding_mode_rtz;
1205 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1206 return nir_rounding_mode_rtne;
1207 return nir_rounding_mode_undef;
1208 }
1209
1210 static inline bool
1211 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1212 {
1213 bool result =
1214 nir_has_any_rounding_mode_rtne(execution_mode) ||
1215 nir_has_any_rounding_mode_rtz(execution_mode);
1216 return result;
1217 }
1218
1219 typedef enum {
1220 /**
1221 * Operation where the first two sources are commutative.
1222 *
1223 * For 2-source operations, this just mathematical commutativity. Some
1224 * 3-source operations, like ffma, are only commutative in the first two
1225 * sources.
1226 */
1227 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1228 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1229 } nir_op_algebraic_property;
1230
1231 typedef struct {
1232 const char *name;
1233
1234 uint8_t num_inputs;
1235
1236 /**
1237 * The number of components in the output
1238 *
1239 * If non-zero, this is the size of the output and input sizes are
1240 * explicitly given; swizzle and writemask are still in effect, but if
1241 * the output component is masked out, then the input component may
1242 * still be in use.
1243 *
1244 * If zero, the opcode acts in the standard, per-component manner; the
1245 * operation is performed on each component (except the ones that are
1246 * masked out) with the input being taken from the input swizzle for
1247 * that component.
1248 *
1249 * The size of some of the inputs may be given (i.e. non-zero) even
1250 * though output_size is zero; in that case, the inputs with a zero
1251 * size act per-component, while the inputs with non-zero size don't.
1252 */
1253 uint8_t output_size;
1254
1255 /**
1256 * The type of vector that the instruction outputs. Note that the
1257 * staurate modifier is only allowed on outputs with the float type.
1258 */
1259
1260 nir_alu_type output_type;
1261
1262 /**
1263 * The number of components in each input
1264 */
1265 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1266
1267 /**
1268 * The type of vector that each input takes. Note that negate and
1269 * absolute value are only allowed on inputs with int or float type and
1270 * behave differently on the two.
1271 */
1272 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1273
1274 nir_op_algebraic_property algebraic_properties;
1275
1276 /* Whether this represents a numeric conversion opcode */
1277 bool is_conversion;
1278 } nir_op_info;
1279
1280 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1281
1282 typedef struct nir_alu_instr {
1283 nir_instr instr;
1284 nir_op op;
1285
1286 /** Indicates that this ALU instruction generates an exact value
1287 *
1288 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1289 * really equivalent to either. This indicates that the value generated by
1290 * this operation is high-precision and any code transformations that touch
1291 * it must ensure that the resulting value is bit-for-bit identical to the
1292 * original.
1293 */
1294 bool exact:1;
1295
1296 /**
1297 * Indicates that this instruction do not cause wrapping to occur, in the
1298 * form of overflow or underflow.
1299 */
1300 bool no_signed_wrap:1;
1301 bool no_unsigned_wrap:1;
1302
1303 nir_alu_dest dest;
1304 nir_alu_src src[];
1305 } nir_alu_instr;
1306
1307 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1308 nir_alu_instr *instr);
1309 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1310 nir_alu_instr *instr);
1311
1312 /* is this source channel used? */
1313 static inline bool
1314 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1315 unsigned channel)
1316 {
1317 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1318 return channel < nir_op_infos[instr->op].input_sizes[src];
1319
1320 return (instr->dest.write_mask >> channel) & 1;
1321 }
1322
1323 static inline nir_component_mask_t
1324 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1325 {
1326 nir_component_mask_t read_mask = 0;
1327 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1328 if (!nir_alu_instr_channel_used(instr, src, c))
1329 continue;
1330
1331 read_mask |= (1 << instr->src[src].swizzle[c]);
1332 }
1333 return read_mask;
1334 }
1335
1336 /**
1337 * Get the number of channels used for a source
1338 */
1339 static inline unsigned
1340 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1341 {
1342 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1343 return nir_op_infos[instr->op].input_sizes[src];
1344
1345 return nir_dest_num_components(instr->dest.dest);
1346 }
1347
1348 static inline bool
1349 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1350 {
1351 switch (instr->op) {
1352 case nir_op_flt:
1353 case nir_op_fge:
1354 case nir_op_feq:
1355 case nir_op_fne:
1356 case nir_op_ilt:
1357 case nir_op_ult:
1358 case nir_op_ige:
1359 case nir_op_uge:
1360 case nir_op_ieq:
1361 case nir_op_ine:
1362 case nir_op_i2b1:
1363 case nir_op_f2b1:
1364 case nir_op_inot:
1365 return true;
1366 default:
1367 return false;
1368 }
1369 }
1370
1371 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1372 nir_alu_type full_type);
1373
1374 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1375 unsigned src1, unsigned src2);
1376
1377 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1378 const nir_alu_instr *alu2,
1379 unsigned src1, unsigned src2);
1380
1381 typedef enum {
1382 nir_deref_type_var,
1383 nir_deref_type_array,
1384 nir_deref_type_array_wildcard,
1385 nir_deref_type_ptr_as_array,
1386 nir_deref_type_struct,
1387 nir_deref_type_cast,
1388 } nir_deref_type;
1389
1390 typedef struct {
1391 nir_instr instr;
1392
1393 /** The type of this deref instruction */
1394 nir_deref_type deref_type;
1395
1396 /** The mode of the underlying variable */
1397 nir_variable_mode mode;
1398
1399 /** The dereferenced type of the resulting pointer value */
1400 const struct glsl_type *type;
1401
1402 union {
1403 /** Variable being dereferenced if deref_type is a deref_var */
1404 nir_variable *var;
1405
1406 /** Parent deref if deref_type is not deref_var */
1407 nir_src parent;
1408 };
1409
1410 /** Additional deref parameters */
1411 union {
1412 struct {
1413 nir_src index;
1414 } arr;
1415
1416 struct {
1417 unsigned index;
1418 } strct;
1419
1420 struct {
1421 unsigned ptr_stride;
1422 } cast;
1423 };
1424
1425 /** Destination to store the resulting "pointer" */
1426 nir_dest dest;
1427 } nir_deref_instr;
1428
1429 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1430
1431 static inline nir_deref_instr *
1432 nir_deref_instr_parent(const nir_deref_instr *instr)
1433 {
1434 if (instr->deref_type == nir_deref_type_var)
1435 return NULL;
1436 else
1437 return nir_src_as_deref(instr->parent);
1438 }
1439
1440 static inline nir_variable *
1441 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1442 {
1443 while (instr->deref_type != nir_deref_type_var) {
1444 if (instr->deref_type == nir_deref_type_cast)
1445 return NULL;
1446
1447 instr = nir_deref_instr_parent(instr);
1448 }
1449
1450 return instr->var;
1451 }
1452
1453 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1454 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1455 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1456
1457 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1458
1459 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1460
1461 typedef struct {
1462 nir_instr instr;
1463
1464 struct nir_function *callee;
1465
1466 unsigned num_params;
1467 nir_src params[];
1468 } nir_call_instr;
1469
1470 #include "nir_intrinsics.h"
1471
1472 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1473
1474 /** Represents an intrinsic
1475 *
1476 * An intrinsic is an instruction type for handling things that are
1477 * more-or-less regular operations but don't just consume and produce SSA
1478 * values like ALU operations do. Intrinsics are not for things that have
1479 * special semantic meaning such as phi nodes and parallel copies.
1480 * Examples of intrinsics include variable load/store operations, system
1481 * value loads, and the like. Even though texturing more-or-less falls
1482 * under this category, texturing is its own instruction type because
1483 * trying to represent texturing with intrinsics would lead to a
1484 * combinatorial explosion of intrinsic opcodes.
1485 *
1486 * By having a single instruction type for handling a lot of different
1487 * cases, optimization passes can look for intrinsics and, for the most
1488 * part, completely ignore them. Each intrinsic type also has a few
1489 * possible flags that govern whether or not they can be reordered or
1490 * eliminated. That way passes like dead code elimination can still work
1491 * on intrisics without understanding the meaning of each.
1492 *
1493 * Each intrinsic has some number of constant indices, some number of
1494 * variables, and some number of sources. What these sources, variables,
1495 * and indices mean depends on the intrinsic and is documented with the
1496 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1497 * instructions are the only types of instruction that can operate on
1498 * variables.
1499 */
1500 typedef struct {
1501 nir_instr instr;
1502
1503 nir_intrinsic_op intrinsic;
1504
1505 nir_dest dest;
1506
1507 /** number of components if this is a vectorized intrinsic
1508 *
1509 * Similarly to ALU operations, some intrinsics are vectorized.
1510 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1511 * For vectorized intrinsics, the num_components field specifies the
1512 * number of destination components and the number of source components
1513 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1514 */
1515 uint8_t num_components;
1516
1517 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1518
1519 nir_src src[];
1520 } nir_intrinsic_instr;
1521
1522 static inline nir_variable *
1523 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1524 {
1525 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1526 }
1527
1528 typedef enum {
1529 /* Memory ordering. */
1530 NIR_MEMORY_ACQUIRE = 1 << 0,
1531 NIR_MEMORY_RELEASE = 1 << 1,
1532 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1533
1534 /* Memory visibility operations. */
1535 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1536 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1537 } nir_memory_semantics;
1538
1539 typedef enum {
1540 NIR_SCOPE_NONE,
1541 NIR_SCOPE_INVOCATION,
1542 NIR_SCOPE_SUBGROUP,
1543 NIR_SCOPE_WORKGROUP,
1544 NIR_SCOPE_QUEUE_FAMILY,
1545 NIR_SCOPE_DEVICE,
1546 } nir_scope;
1547
1548 /**
1549 * \name NIR intrinsics semantic flags
1550 *
1551 * information about what the compiler can do with the intrinsics.
1552 *
1553 * \sa nir_intrinsic_info::flags
1554 */
1555 typedef enum {
1556 /**
1557 * whether the intrinsic can be safely eliminated if none of its output
1558 * value is not being used.
1559 */
1560 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1561
1562 /**
1563 * Whether the intrinsic can be reordered with respect to any other
1564 * intrinsic, i.e. whether the only reordering dependencies of the
1565 * intrinsic are due to the register reads/writes.
1566 */
1567 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1568 } nir_intrinsic_semantic_flag;
1569
1570 /**
1571 * \name NIR intrinsics const-index flag
1572 *
1573 * Indicates the usage of a const_index slot.
1574 *
1575 * \sa nir_intrinsic_info::index_map
1576 */
1577 typedef enum {
1578 /**
1579 * Generally instructions that take a offset src argument, can encode
1580 * a constant 'base' value which is added to the offset.
1581 */
1582 NIR_INTRINSIC_BASE = 1,
1583
1584 /**
1585 * For store instructions, a writemask for the store.
1586 */
1587 NIR_INTRINSIC_WRMASK,
1588
1589 /**
1590 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1591 */
1592 NIR_INTRINSIC_STREAM_ID,
1593
1594 /**
1595 * The clip-plane id for load_user_clip_plane intrinsic.
1596 */
1597 NIR_INTRINSIC_UCP_ID,
1598
1599 /**
1600 * The amount of data, starting from BASE, that this instruction may
1601 * access. This is used to provide bounds if the offset is not constant.
1602 */
1603 NIR_INTRINSIC_RANGE,
1604
1605 /**
1606 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1607 */
1608 NIR_INTRINSIC_DESC_SET,
1609
1610 /**
1611 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1612 */
1613 NIR_INTRINSIC_BINDING,
1614
1615 /**
1616 * Component offset.
1617 */
1618 NIR_INTRINSIC_COMPONENT,
1619
1620 /**
1621 * Interpolation mode (only meaningful for FS inputs).
1622 */
1623 NIR_INTRINSIC_INTERP_MODE,
1624
1625 /**
1626 * A binary nir_op to use when performing a reduction or scan operation
1627 */
1628 NIR_INTRINSIC_REDUCTION_OP,
1629
1630 /**
1631 * Cluster size for reduction operations
1632 */
1633 NIR_INTRINSIC_CLUSTER_SIZE,
1634
1635 /**
1636 * Parameter index for a load_param intrinsic
1637 */
1638 NIR_INTRINSIC_PARAM_IDX,
1639
1640 /**
1641 * Image dimensionality for image intrinsics
1642 *
1643 * One of GLSL_SAMPLER_DIM_*
1644 */
1645 NIR_INTRINSIC_IMAGE_DIM,
1646
1647 /**
1648 * Non-zero if we are accessing an array image
1649 */
1650 NIR_INTRINSIC_IMAGE_ARRAY,
1651
1652 /**
1653 * Image format for image intrinsics
1654 */
1655 NIR_INTRINSIC_FORMAT,
1656
1657 /**
1658 * Access qualifiers for image and memory access intrinsics
1659 */
1660 NIR_INTRINSIC_ACCESS,
1661
1662 /**
1663 * Alignment for offsets and addresses
1664 *
1665 * These two parameters, specify an alignment in terms of a multiplier and
1666 * an offset. The offset or address parameter X of the intrinsic is
1667 * guaranteed to satisfy the following:
1668 *
1669 * (X - align_offset) % align_mul == 0
1670 */
1671 NIR_INTRINSIC_ALIGN_MUL,
1672 NIR_INTRINSIC_ALIGN_OFFSET,
1673
1674 /**
1675 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1676 */
1677 NIR_INTRINSIC_DESC_TYPE,
1678
1679 /**
1680 * The nir_alu_type of a uniform/input/output
1681 */
1682 NIR_INTRINSIC_TYPE,
1683
1684 /**
1685 * The swizzle mask for the instructions
1686 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1687 */
1688 NIR_INTRINSIC_SWIZZLE_MASK,
1689
1690 /* Separate source/dest access flags for copies */
1691 NIR_INTRINSIC_SRC_ACCESS,
1692 NIR_INTRINSIC_DST_ACCESS,
1693
1694 /* Driver location for nir_load_patch_location_ir3 */
1695 NIR_INTRINSIC_DRIVER_LOCATION,
1696
1697 /**
1698 * Mask of nir_memory_semantics, includes ordering and visibility.
1699 */
1700 NIR_INTRINSIC_MEMORY_SEMANTICS,
1701
1702 /**
1703 * Mask of nir_variable_modes affected by the memory operation.
1704 */
1705 NIR_INTRINSIC_MEMORY_MODES,
1706
1707 /**
1708 * Value of nir_scope.
1709 */
1710 NIR_INTRINSIC_MEMORY_SCOPE,
1711
1712 /**
1713 * Value of nir_scope.
1714 */
1715 NIR_INTRINSIC_EXECUTION_SCOPE,
1716
1717 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1718
1719 } nir_intrinsic_index_flag;
1720
1721 #define NIR_INTRINSIC_MAX_INPUTS 5
1722
1723 typedef struct {
1724 const char *name;
1725
1726 uint8_t num_srcs; /** < number of register/SSA inputs */
1727
1728 /** number of components of each input register
1729 *
1730 * If this value is 0, the number of components is given by the
1731 * num_components field of nir_intrinsic_instr. If this value is -1, the
1732 * intrinsic consumes however many components are provided and it is not
1733 * validated at all.
1734 */
1735 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1736
1737 bool has_dest;
1738
1739 /** number of components of the output register
1740 *
1741 * If this value is 0, the number of components is given by the
1742 * num_components field of nir_intrinsic_instr.
1743 */
1744 uint8_t dest_components;
1745
1746 /** bitfield of legal bit sizes */
1747 uint8_t dest_bit_sizes;
1748
1749 /** the number of constant indices used by the intrinsic */
1750 uint8_t num_indices;
1751
1752 /** indicates the usage of intr->const_index[n] */
1753 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1754
1755 /** semantic flags for calls to this intrinsic */
1756 nir_intrinsic_semantic_flag flags;
1757 } nir_intrinsic_info;
1758
1759 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1760
1761 static inline unsigned
1762 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1763 {
1764 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1765 assert(srcn < info->num_srcs);
1766 if (info->src_components[srcn] > 0)
1767 return info->src_components[srcn];
1768 else if (info->src_components[srcn] == 0)
1769 return intr->num_components;
1770 else
1771 return nir_src_num_components(intr->src[srcn]);
1772 }
1773
1774 static inline unsigned
1775 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1776 {
1777 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1778 if (!info->has_dest)
1779 return 0;
1780 else if (info->dest_components)
1781 return info->dest_components;
1782 else
1783 return intr->num_components;
1784 }
1785
1786 /**
1787 * Helper to copy const_index[] from src to dst, without assuming they
1788 * match in order.
1789 */
1790 static inline void
1791 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1792 {
1793 if (src->intrinsic == dst->intrinsic) {
1794 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1795 return;
1796 }
1797
1798 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1799 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1800
1801 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1802 if (src_info->index_map[i] == 0)
1803 continue;
1804
1805 /* require that dst instruction also uses the same const_index[]: */
1806 assert(dst_info->index_map[i] > 0);
1807
1808 dst->const_index[dst_info->index_map[i] - 1] =
1809 src->const_index[src_info->index_map[i] - 1];
1810 }
1811 }
1812
1813 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1814 static inline type \
1815 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1816 { \
1817 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1818 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1819 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1820 } \
1821 static inline void \
1822 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1823 { \
1824 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1825 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1826 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1827 }
1828
1829 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1830 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1831 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1832 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1833 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1834 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1835 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1836 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1837 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1838 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1839 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1840 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1841 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1842 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1843 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1844 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1845 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1846 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1847 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1848 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1849 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1850 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1851 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1852 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1853 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1854 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1855 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1856 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1857
1858 static inline void
1859 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1860 unsigned align_mul, unsigned align_offset)
1861 {
1862 assert(util_is_power_of_two_nonzero(align_mul));
1863 assert(align_offset < align_mul);
1864 nir_intrinsic_set_align_mul(intrin, align_mul);
1865 nir_intrinsic_set_align_offset(intrin, align_offset);
1866 }
1867
1868 /** Returns a simple alignment for a load/store intrinsic offset
1869 *
1870 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1871 * and ALIGN_OFFSET parameters, this helper takes both into account and
1872 * provides a single simple alignment parameter. The offset X is guaranteed
1873 * to satisfy X % align == 0.
1874 */
1875 static inline unsigned
1876 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1877 {
1878 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1879 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1880 assert(align_offset < align_mul);
1881 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1882 }
1883
1884 unsigned
1885 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1886
1887 /* Converts a image_deref_* intrinsic into a image_* one */
1888 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1889 nir_ssa_def *handle, bool bindless);
1890
1891 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1892 static inline bool
1893 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1894 {
1895 if (instr->intrinsic == nir_intrinsic_load_deref ||
1896 instr->intrinsic == nir_intrinsic_load_ssbo ||
1897 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1898 instr->intrinsic == nir_intrinsic_image_deref_load ||
1899 instr->intrinsic == nir_intrinsic_image_load) {
1900 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1901 } else {
1902 const nir_intrinsic_info *info =
1903 &nir_intrinsic_infos[instr->intrinsic];
1904 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1905 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1906 }
1907 }
1908
1909 /**
1910 * \group texture information
1911 *
1912 * This gives semantic information about textures which is useful to the
1913 * frontend, the backend, and lowering passes, but not the optimizer.
1914 */
1915
1916 typedef enum {
1917 nir_tex_src_coord,
1918 nir_tex_src_projector,
1919 nir_tex_src_comparator, /* shadow comparator */
1920 nir_tex_src_offset,
1921 nir_tex_src_bias,
1922 nir_tex_src_lod,
1923 nir_tex_src_min_lod,
1924 nir_tex_src_ms_index, /* MSAA sample index */
1925 nir_tex_src_ms_mcs, /* MSAA compression value */
1926 nir_tex_src_ddx,
1927 nir_tex_src_ddy,
1928 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1929 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1930 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1931 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1932 nir_tex_src_texture_handle, /* < bindless texture handle */
1933 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1934 nir_tex_src_plane, /* < selects plane for planar textures */
1935 nir_num_tex_src_types
1936 } nir_tex_src_type;
1937
1938 typedef struct {
1939 nir_src src;
1940 nir_tex_src_type src_type;
1941 } nir_tex_src;
1942
1943 typedef enum {
1944 nir_texop_tex, /**< Regular texture look-up */
1945 nir_texop_txb, /**< Texture look-up with LOD bias */
1946 nir_texop_txl, /**< Texture look-up with explicit LOD */
1947 nir_texop_txd, /**< Texture look-up with partial derivatives */
1948 nir_texop_txf, /**< Texel fetch with explicit LOD */
1949 nir_texop_txf_ms, /**< Multisample texture fetch */
1950 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1951 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1952 nir_texop_txs, /**< Texture size */
1953 nir_texop_lod, /**< Texture lod query */
1954 nir_texop_tg4, /**< Texture gather */
1955 nir_texop_query_levels, /**< Texture levels query */
1956 nir_texop_texture_samples, /**< Texture samples query */
1957 nir_texop_samples_identical, /**< Query whether all samples are definitely
1958 * identical.
1959 */
1960 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1961 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1962 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1963 } nir_texop;
1964
1965 typedef struct {
1966 nir_instr instr;
1967
1968 enum glsl_sampler_dim sampler_dim;
1969 nir_alu_type dest_type;
1970
1971 nir_texop op;
1972 nir_dest dest;
1973 nir_tex_src *src;
1974 unsigned num_srcs, coord_components;
1975 bool is_array, is_shadow;
1976
1977 /**
1978 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1979 * components or the new-style shadow that outputs 1 component.
1980 */
1981 bool is_new_style_shadow;
1982
1983 /* gather component selector */
1984 unsigned component : 2;
1985
1986 /* gather offsets */
1987 int8_t tg4_offsets[4][2];
1988
1989 /* True if the texture index or handle is not dynamically uniform */
1990 bool texture_non_uniform;
1991
1992 /* True if the sampler index or handle is not dynamically uniform */
1993 bool sampler_non_uniform;
1994
1995 /** The texture index
1996 *
1997 * If this texture instruction has a nir_tex_src_texture_offset source,
1998 * then the texture index is given by texture_index + texture_offset.
1999 */
2000 unsigned texture_index;
2001
2002 /** The sampler index
2003 *
2004 * The following operations do not require a sampler and, as such, this
2005 * field should be ignored:
2006 * - nir_texop_txf
2007 * - nir_texop_txf_ms
2008 * - nir_texop_txs
2009 * - nir_texop_lod
2010 * - nir_texop_query_levels
2011 * - nir_texop_texture_samples
2012 * - nir_texop_samples_identical
2013 *
2014 * If this texture instruction has a nir_tex_src_sampler_offset source,
2015 * then the sampler index is given by sampler_index + sampler_offset.
2016 */
2017 unsigned sampler_index;
2018 } nir_tex_instr;
2019
2020 /*
2021 * Returns true if the texture operation requires a sampler as a general rule,
2022 * see the documentation of sampler_index.
2023 *
2024 * Note that the specific hw/driver backend could require to a sampler
2025 * object/configuration packet in any case, for some other reason.
2026 */
2027 static inline bool
2028 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2029 {
2030 switch (instr->op) {
2031 case nir_texop_txf:
2032 case nir_texop_txf_ms:
2033 case nir_texop_txs:
2034 case nir_texop_lod:
2035 case nir_texop_query_levels:
2036 case nir_texop_texture_samples:
2037 case nir_texop_samples_identical:
2038 return false;
2039 default:
2040 return true;
2041 }
2042 }
2043
2044 static inline unsigned
2045 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2046 {
2047 switch (instr->op) {
2048 case nir_texop_txs: {
2049 unsigned ret;
2050 switch (instr->sampler_dim) {
2051 case GLSL_SAMPLER_DIM_1D:
2052 case GLSL_SAMPLER_DIM_BUF:
2053 ret = 1;
2054 break;
2055 case GLSL_SAMPLER_DIM_2D:
2056 case GLSL_SAMPLER_DIM_CUBE:
2057 case GLSL_SAMPLER_DIM_MS:
2058 case GLSL_SAMPLER_DIM_RECT:
2059 case GLSL_SAMPLER_DIM_EXTERNAL:
2060 case GLSL_SAMPLER_DIM_SUBPASS:
2061 ret = 2;
2062 break;
2063 case GLSL_SAMPLER_DIM_3D:
2064 ret = 3;
2065 break;
2066 default:
2067 unreachable("not reached");
2068 }
2069 if (instr->is_array)
2070 ret++;
2071 return ret;
2072 }
2073
2074 case nir_texop_lod:
2075 return 2;
2076
2077 case nir_texop_texture_samples:
2078 case nir_texop_query_levels:
2079 case nir_texop_samples_identical:
2080 case nir_texop_fragment_mask_fetch:
2081 return 1;
2082
2083 default:
2084 if (instr->is_shadow && instr->is_new_style_shadow)
2085 return 1;
2086
2087 return 4;
2088 }
2089 }
2090
2091 /* Returns true if this texture operation queries something about the texture
2092 * rather than actually sampling it.
2093 */
2094 static inline bool
2095 nir_tex_instr_is_query(const nir_tex_instr *instr)
2096 {
2097 switch (instr->op) {
2098 case nir_texop_txs:
2099 case nir_texop_lod:
2100 case nir_texop_texture_samples:
2101 case nir_texop_query_levels:
2102 case nir_texop_txf_ms_mcs:
2103 return true;
2104 case nir_texop_tex:
2105 case nir_texop_txb:
2106 case nir_texop_txl:
2107 case nir_texop_txd:
2108 case nir_texop_txf:
2109 case nir_texop_txf_ms:
2110 case nir_texop_txf_ms_fb:
2111 case nir_texop_tg4:
2112 return false;
2113 default:
2114 unreachable("Invalid texture opcode");
2115 }
2116 }
2117
2118 static inline bool
2119 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2120 {
2121 switch (instr->op) {
2122 case nir_texop_tex:
2123 case nir_texop_txb:
2124 case nir_texop_lod:
2125 return true;
2126 default:
2127 return false;
2128 }
2129 }
2130
2131 static inline nir_alu_type
2132 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2133 {
2134 switch (instr->src[src].src_type) {
2135 case nir_tex_src_coord:
2136 switch (instr->op) {
2137 case nir_texop_txf:
2138 case nir_texop_txf_ms:
2139 case nir_texop_txf_ms_fb:
2140 case nir_texop_txf_ms_mcs:
2141 case nir_texop_samples_identical:
2142 return nir_type_int;
2143
2144 default:
2145 return nir_type_float;
2146 }
2147
2148 case nir_tex_src_lod:
2149 switch (instr->op) {
2150 case nir_texop_txs:
2151 case nir_texop_txf:
2152 return nir_type_int;
2153
2154 default:
2155 return nir_type_float;
2156 }
2157
2158 case nir_tex_src_projector:
2159 case nir_tex_src_comparator:
2160 case nir_tex_src_bias:
2161 case nir_tex_src_min_lod:
2162 case nir_tex_src_ddx:
2163 case nir_tex_src_ddy:
2164 return nir_type_float;
2165
2166 case nir_tex_src_offset:
2167 case nir_tex_src_ms_index:
2168 case nir_tex_src_plane:
2169 return nir_type_int;
2170
2171 case nir_tex_src_ms_mcs:
2172 case nir_tex_src_texture_deref:
2173 case nir_tex_src_sampler_deref:
2174 case nir_tex_src_texture_offset:
2175 case nir_tex_src_sampler_offset:
2176 case nir_tex_src_texture_handle:
2177 case nir_tex_src_sampler_handle:
2178 return nir_type_uint;
2179
2180 case nir_num_tex_src_types:
2181 unreachable("nir_num_tex_src_types is not a valid source type");
2182 }
2183
2184 unreachable("Invalid texture source type");
2185 }
2186
2187 static inline unsigned
2188 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2189 {
2190 if (instr->src[src].src_type == nir_tex_src_coord)
2191 return instr->coord_components;
2192
2193 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2194 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2195 return 4;
2196
2197 if (instr->src[src].src_type == nir_tex_src_ddx ||
2198 instr->src[src].src_type == nir_tex_src_ddy) {
2199 if (instr->is_array)
2200 return instr->coord_components - 1;
2201 else
2202 return instr->coord_components;
2203 }
2204
2205 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2206 * the offset, since a cube maps to a single face.
2207 */
2208 if (instr->src[src].src_type == nir_tex_src_offset) {
2209 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2210 return 2;
2211 else if (instr->is_array)
2212 return instr->coord_components - 1;
2213 else
2214 return instr->coord_components;
2215 }
2216
2217 return 1;
2218 }
2219
2220 static inline int
2221 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2222 {
2223 for (unsigned i = 0; i < instr->num_srcs; i++)
2224 if (instr->src[i].src_type == type)
2225 return (int) i;
2226
2227 return -1;
2228 }
2229
2230 void nir_tex_instr_add_src(nir_tex_instr *tex,
2231 nir_tex_src_type src_type,
2232 nir_src src);
2233
2234 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2235
2236 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2237
2238 typedef struct {
2239 nir_instr instr;
2240
2241 nir_ssa_def def;
2242
2243 nir_const_value value[];
2244 } nir_load_const_instr;
2245
2246 typedef enum {
2247 /** Return from a function
2248 *
2249 * This instruction is a classic function return. It jumps to
2250 * nir_function_impl::end_block. No return value is provided in this
2251 * instruction. Instead, the function is expected to write any return
2252 * data to a deref passed in from the caller.
2253 */
2254 nir_jump_return,
2255
2256 /** Break out of the inner-most loop
2257 *
2258 * This has the same semantics as C's "break" statement.
2259 */
2260 nir_jump_break,
2261
2262 /** Jump back to the top of the inner-most loop
2263 *
2264 * This has the same semantics as C's "continue" statement assuming that a
2265 * NIR loop is implemented as "while (1) { body }".
2266 */
2267 nir_jump_continue,
2268 } nir_jump_type;
2269
2270 typedef struct {
2271 nir_instr instr;
2272 nir_jump_type type;
2273 } nir_jump_instr;
2274
2275 /* creates a new SSA variable in an undefined state */
2276
2277 typedef struct {
2278 nir_instr instr;
2279 nir_ssa_def def;
2280 } nir_ssa_undef_instr;
2281
2282 typedef struct {
2283 struct exec_node node;
2284
2285 /* The predecessor block corresponding to this source */
2286 struct nir_block *pred;
2287
2288 nir_src src;
2289 } nir_phi_src;
2290
2291 #define nir_foreach_phi_src(phi_src, phi) \
2292 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2293 #define nir_foreach_phi_src_safe(phi_src, phi) \
2294 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2295
2296 typedef struct {
2297 nir_instr instr;
2298
2299 struct exec_list srcs; /** < list of nir_phi_src */
2300
2301 nir_dest dest;
2302 } nir_phi_instr;
2303
2304 typedef struct {
2305 struct exec_node node;
2306 nir_src src;
2307 nir_dest dest;
2308 } nir_parallel_copy_entry;
2309
2310 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2311 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2312
2313 typedef struct {
2314 nir_instr instr;
2315
2316 /* A list of nir_parallel_copy_entrys. The sources of all of the
2317 * entries are copied to the corresponding destinations "in parallel".
2318 * In other words, if we have two entries: a -> b and b -> a, the values
2319 * get swapped.
2320 */
2321 struct exec_list entries;
2322 } nir_parallel_copy_instr;
2323
2324 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2325 type, nir_instr_type_alu)
2326 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2327 type, nir_instr_type_deref)
2328 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2329 type, nir_instr_type_call)
2330 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2331 type, nir_instr_type_jump)
2332 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2333 type, nir_instr_type_tex)
2334 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2335 type, nir_instr_type_intrinsic)
2336 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2337 type, nir_instr_type_load_const)
2338 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2339 type, nir_instr_type_ssa_undef)
2340 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2341 type, nir_instr_type_phi)
2342 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2343 nir_parallel_copy_instr, instr,
2344 type, nir_instr_type_parallel_copy)
2345
2346
2347 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2348 static inline type \
2349 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2350 { \
2351 assert(nir_src_is_const(src)); \
2352 nir_load_const_instr *load = \
2353 nir_instr_as_load_const(src.ssa->parent_instr); \
2354 assert(comp < load->def.num_components); \
2355 return nir_const_value_as_##suffix(load->value[comp], \
2356 load->def.bit_size); \
2357 } \
2358 \
2359 static inline type \
2360 nir_src_as_##suffix(nir_src src) \
2361 { \
2362 assert(nir_src_num_components(src) == 1); \
2363 return nir_src_comp_as_##suffix(src, 0); \
2364 }
2365
2366 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2367 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2368 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2369 NIR_DEFINE_SRC_AS_CONST(double, float)
2370
2371 #undef NIR_DEFINE_SRC_AS_CONST
2372
2373
2374 typedef struct {
2375 nir_ssa_def *def;
2376 unsigned comp;
2377 } nir_ssa_scalar;
2378
2379 static inline bool
2380 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2381 {
2382 return s.def->parent_instr->type == nir_instr_type_load_const;
2383 }
2384
2385 static inline nir_const_value
2386 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2387 {
2388 assert(s.comp < s.def->num_components);
2389 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2390 return load->value[s.comp];
2391 }
2392
2393 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2394 static inline type \
2395 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2396 { \
2397 return nir_const_value_as_##suffix( \
2398 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2399 }
2400
2401 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2402 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2403 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2404 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2405
2406 #undef NIR_DEFINE_SCALAR_AS_CONST
2407
2408 static inline bool
2409 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2410 {
2411 return s.def->parent_instr->type == nir_instr_type_alu;
2412 }
2413
2414 static inline nir_op
2415 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2416 {
2417 return nir_instr_as_alu(s.def->parent_instr)->op;
2418 }
2419
2420 static inline nir_ssa_scalar
2421 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2422 {
2423 nir_ssa_scalar out = { NULL, 0 };
2424
2425 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2426 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2427
2428 /* Our component must be written */
2429 assert(s.comp < s.def->num_components);
2430 assert(alu->dest.write_mask & (1u << s.comp));
2431
2432 assert(alu->src[alu_src_idx].src.is_ssa);
2433 out.def = alu->src[alu_src_idx].src.ssa;
2434
2435 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2436 /* The ALU src is unsized so the source component follows the
2437 * destination component.
2438 */
2439 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2440 } else {
2441 /* This is a sized source so all source components work together to
2442 * produce all the destination components. Since we need to return a
2443 * scalar, this only works if the source is a scalar.
2444 */
2445 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2446 out.comp = alu->src[alu_src_idx].swizzle[0];
2447 }
2448 assert(out.comp < out.def->num_components);
2449
2450 return out;
2451 }
2452
2453
2454 /*
2455 * Control flow
2456 *
2457 * Control flow consists of a tree of control flow nodes, which include
2458 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2459 * instructions that always run start-to-finish. Each basic block also keeps
2460 * track of its successors (blocks which may run immediately after the current
2461 * block) and predecessors (blocks which could have run immediately before the
2462 * current block). Each function also has a start block and an end block which
2463 * all return statements point to (which is always empty). Together, all the
2464 * blocks with their predecessors and successors make up the control flow
2465 * graph (CFG) of the function. There are helpers that modify the tree of
2466 * control flow nodes while modifying the CFG appropriately; these should be
2467 * used instead of modifying the tree directly.
2468 */
2469
2470 typedef enum {
2471 nir_cf_node_block,
2472 nir_cf_node_if,
2473 nir_cf_node_loop,
2474 nir_cf_node_function
2475 } nir_cf_node_type;
2476
2477 typedef struct nir_cf_node {
2478 struct exec_node node;
2479 nir_cf_node_type type;
2480 struct nir_cf_node *parent;
2481 } nir_cf_node;
2482
2483 typedef struct nir_block {
2484 nir_cf_node cf_node;
2485
2486 struct exec_list instr_list; /** < list of nir_instr */
2487
2488 /** generic block index; generated by nir_index_blocks */
2489 unsigned index;
2490
2491 /*
2492 * Each block can only have up to 2 successors, so we put them in a simple
2493 * array - no need for anything more complicated.
2494 */
2495 struct nir_block *successors[2];
2496
2497 /* Set of nir_block predecessors in the CFG */
2498 struct set *predecessors;
2499
2500 /*
2501 * this node's immediate dominator in the dominance tree - set to NULL for
2502 * the start block.
2503 */
2504 struct nir_block *imm_dom;
2505
2506 /* This node's children in the dominance tree */
2507 unsigned num_dom_children;
2508 struct nir_block **dom_children;
2509
2510 /* Set of nir_blocks on the dominance frontier of this block */
2511 struct set *dom_frontier;
2512
2513 /*
2514 * These two indices have the property that dom_{pre,post}_index for each
2515 * child of this block in the dominance tree will always be between
2516 * dom_pre_index and dom_post_index for this block, which makes testing if
2517 * a given block is dominated by another block an O(1) operation.
2518 */
2519 int16_t dom_pre_index, dom_post_index;
2520
2521 /* live in and out for this block; used for liveness analysis */
2522 BITSET_WORD *live_in;
2523 BITSET_WORD *live_out;
2524 } nir_block;
2525
2526 static inline bool
2527 nir_block_is_reachable(nir_block *b)
2528 {
2529 /* See also nir_block_dominates */
2530 return b->dom_post_index != -1;
2531 }
2532
2533 static inline nir_instr *
2534 nir_block_first_instr(nir_block *block)
2535 {
2536 struct exec_node *head = exec_list_get_head(&block->instr_list);
2537 return exec_node_data(nir_instr, head, node);
2538 }
2539
2540 static inline nir_instr *
2541 nir_block_last_instr(nir_block *block)
2542 {
2543 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2544 return exec_node_data(nir_instr, tail, node);
2545 }
2546
2547 static inline bool
2548 nir_block_ends_in_jump(nir_block *block)
2549 {
2550 return !exec_list_is_empty(&block->instr_list) &&
2551 nir_block_last_instr(block)->type == nir_instr_type_jump;
2552 }
2553
2554 #define nir_foreach_instr(instr, block) \
2555 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2556 #define nir_foreach_instr_reverse(instr, block) \
2557 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2558 #define nir_foreach_instr_safe(instr, block) \
2559 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2560 #define nir_foreach_instr_reverse_safe(instr, block) \
2561 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2562
2563 typedef enum {
2564 nir_selection_control_none = 0x0,
2565 nir_selection_control_flatten = 0x1,
2566 nir_selection_control_dont_flatten = 0x2,
2567 } nir_selection_control;
2568
2569 typedef struct nir_if {
2570 nir_cf_node cf_node;
2571 nir_src condition;
2572 nir_selection_control control;
2573
2574 struct exec_list then_list; /** < list of nir_cf_node */
2575 struct exec_list else_list; /** < list of nir_cf_node */
2576 } nir_if;
2577
2578 typedef struct {
2579 nir_if *nif;
2580
2581 /** Instruction that generates nif::condition. */
2582 nir_instr *conditional_instr;
2583
2584 /** Block within ::nif that has the break instruction. */
2585 nir_block *break_block;
2586
2587 /** Last block for the then- or else-path that does not contain the break. */
2588 nir_block *continue_from_block;
2589
2590 /** True when ::break_block is in the else-path of ::nif. */
2591 bool continue_from_then;
2592 bool induction_rhs;
2593
2594 /* This is true if the terminators exact trip count is unknown. For
2595 * example:
2596 *
2597 * for (int i = 0; i < imin(x, 4); i++)
2598 * ...
2599 *
2600 * Here loop analysis would have set a max_trip_count of 4 however we dont
2601 * know for sure that this is the exact trip count.
2602 */
2603 bool exact_trip_count_unknown;
2604
2605 struct list_head loop_terminator_link;
2606 } nir_loop_terminator;
2607
2608 typedef struct {
2609 /* Estimated cost (in number of instructions) of the loop */
2610 unsigned instr_cost;
2611
2612 /* Guessed trip count based on array indexing */
2613 unsigned guessed_trip_count;
2614
2615 /* Maximum number of times the loop is run (if known) */
2616 unsigned max_trip_count;
2617
2618 /* Do we know the exact number of times the loop will be run */
2619 bool exact_trip_count_known;
2620
2621 /* Unroll the loop regardless of its size */
2622 bool force_unroll;
2623
2624 /* Does the loop contain complex loop terminators, continues or other
2625 * complex behaviours? If this is true we can't rely on
2626 * loop_terminator_list to be complete or accurate.
2627 */
2628 bool complex_loop;
2629
2630 nir_loop_terminator *limiting_terminator;
2631
2632 /* A list of loop_terminators terminating this loop. */
2633 struct list_head loop_terminator_list;
2634 } nir_loop_info;
2635
2636 typedef enum {
2637 nir_loop_control_none = 0x0,
2638 nir_loop_control_unroll = 0x1,
2639 nir_loop_control_dont_unroll = 0x2,
2640 } nir_loop_control;
2641
2642 typedef struct {
2643 nir_cf_node cf_node;
2644
2645 struct exec_list body; /** < list of nir_cf_node */
2646
2647 nir_loop_info *info;
2648 nir_loop_control control;
2649 bool partially_unrolled;
2650 } nir_loop;
2651
2652 /**
2653 * Various bits of metadata that can may be created or required by
2654 * optimization and analysis passes
2655 */
2656 typedef enum {
2657 nir_metadata_none = 0x0,
2658
2659 /** Indicates that nir_block::index values are valid.
2660 *
2661 * The start block has index 0 and they increase through a natural walk of
2662 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2663 * every block index is in the range [0, nir_function_impl::num_blocks].
2664 *
2665 * A pass can preserve this metadata type if it doesn't touch the CFG.
2666 */
2667 nir_metadata_block_index = 0x1,
2668
2669 /** Indicates that block dominance information is valid
2670 *
2671 * This includes:
2672 *
2673 * - nir_block::num_dom_children
2674 * - nir_block::dom_children
2675 * - nir_block::dom_frontier
2676 * - nir_block::dom_pre_index
2677 * - nir_block::dom_post_index
2678 *
2679 * A pass can preserve this metadata type if it doesn't touch the CFG.
2680 */
2681 nir_metadata_dominance = 0x2,
2682
2683 /** Indicates that SSA def data-flow liveness information is valid
2684 *
2685 * This includes:
2686 *
2687 * - nir_ssa_def::live_index
2688 * - nir_block::live_in
2689 * - nir_block::live_out
2690 *
2691 * A pass can preserve this metadata type if it never adds or removes any
2692 * SSA defs (most passes shouldn't preserve this metadata type).
2693 */
2694 nir_metadata_live_ssa_defs = 0x4,
2695
2696 /** A dummy metadata value to track when a pass forgot to call
2697 * nir_metadata_preserve.
2698 *
2699 * A pass should always clear this value even if it doesn't make any
2700 * progress to indicate that it thought about preserving metadata.
2701 */
2702 nir_metadata_not_properly_reset = 0x8,
2703
2704 /** Indicates that loop analysis information is valid.
2705 *
2706 * This includes everything pointed to by nir_loop::info.
2707 *
2708 * A pass can preserve this metadata type if it is guaranteed to not affect
2709 * any loop metadata. However, since loop metadata includes things like
2710 * loop counts which depend on arithmetic in the loop, this is very hard to
2711 * determine. Most passes shouldn't preserve this metadata type.
2712 */
2713 nir_metadata_loop_analysis = 0x10,
2714
2715 /** All metadata
2716 *
2717 * This includes all nir_metadata flags except not_properly_reset. Passes
2718 * which do not change the shader in any way should call
2719 *
2720 * nir_metadata_preserve(impl, nir_metadata_all);
2721 */
2722 nir_metadata_all = ~nir_metadata_not_properly_reset,
2723 } nir_metadata;
2724
2725 typedef struct {
2726 nir_cf_node cf_node;
2727
2728 /** pointer to the function of which this is an implementation */
2729 struct nir_function *function;
2730
2731 struct exec_list body; /** < list of nir_cf_node */
2732
2733 nir_block *end_block;
2734
2735 /** list for all local variables in the function */
2736 struct exec_list locals;
2737
2738 /** list of local registers in the function */
2739 struct exec_list registers;
2740
2741 /** next available local register index */
2742 unsigned reg_alloc;
2743
2744 /** next available SSA value index */
2745 unsigned ssa_alloc;
2746
2747 /* total number of basic blocks, only valid when block_index_dirty = false */
2748 unsigned num_blocks;
2749
2750 nir_metadata valid_metadata;
2751 } nir_function_impl;
2752
2753 #define nir_foreach_function_temp_variable(var, impl) \
2754 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2755
2756 #define nir_foreach_function_temp_variable_safe(var, impl) \
2757 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2758
2759 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2760 nir_start_block(nir_function_impl *impl)
2761 {
2762 return (nir_block *) impl->body.head_sentinel.next;
2763 }
2764
2765 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2766 nir_impl_last_block(nir_function_impl *impl)
2767 {
2768 return (nir_block *) impl->body.tail_sentinel.prev;
2769 }
2770
2771 static inline nir_cf_node *
2772 nir_cf_node_next(nir_cf_node *node)
2773 {
2774 struct exec_node *next = exec_node_get_next(&node->node);
2775 if (exec_node_is_tail_sentinel(next))
2776 return NULL;
2777 else
2778 return exec_node_data(nir_cf_node, next, node);
2779 }
2780
2781 static inline nir_cf_node *
2782 nir_cf_node_prev(nir_cf_node *node)
2783 {
2784 struct exec_node *prev = exec_node_get_prev(&node->node);
2785 if (exec_node_is_head_sentinel(prev))
2786 return NULL;
2787 else
2788 return exec_node_data(nir_cf_node, prev, node);
2789 }
2790
2791 static inline bool
2792 nir_cf_node_is_first(const nir_cf_node *node)
2793 {
2794 return exec_node_is_head_sentinel(node->node.prev);
2795 }
2796
2797 static inline bool
2798 nir_cf_node_is_last(const nir_cf_node *node)
2799 {
2800 return exec_node_is_tail_sentinel(node->node.next);
2801 }
2802
2803 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2804 type, nir_cf_node_block)
2805 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2806 type, nir_cf_node_if)
2807 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2808 type, nir_cf_node_loop)
2809 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2810 nir_function_impl, cf_node, type, nir_cf_node_function)
2811
2812 static inline nir_block *
2813 nir_if_first_then_block(nir_if *if_stmt)
2814 {
2815 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2816 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2817 }
2818
2819 static inline nir_block *
2820 nir_if_last_then_block(nir_if *if_stmt)
2821 {
2822 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2823 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2824 }
2825
2826 static inline nir_block *
2827 nir_if_first_else_block(nir_if *if_stmt)
2828 {
2829 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2830 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2831 }
2832
2833 static inline nir_block *
2834 nir_if_last_else_block(nir_if *if_stmt)
2835 {
2836 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2837 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2838 }
2839
2840 static inline nir_block *
2841 nir_loop_first_block(nir_loop *loop)
2842 {
2843 struct exec_node *head = exec_list_get_head(&loop->body);
2844 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2845 }
2846
2847 static inline nir_block *
2848 nir_loop_last_block(nir_loop *loop)
2849 {
2850 struct exec_node *tail = exec_list_get_tail(&loop->body);
2851 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2852 }
2853
2854 /**
2855 * Return true if this list of cf_nodes contains a single empty block.
2856 */
2857 static inline bool
2858 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2859 {
2860 if (exec_list_is_singular(cf_list)) {
2861 struct exec_node *head = exec_list_get_head(cf_list);
2862 nir_block *block =
2863 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2864 return exec_list_is_empty(&block->instr_list);
2865 }
2866 return false;
2867 }
2868
2869 typedef struct {
2870 uint8_t num_components;
2871 uint8_t bit_size;
2872 } nir_parameter;
2873
2874 typedef struct nir_function {
2875 struct exec_node node;
2876
2877 const char *name;
2878 struct nir_shader *shader;
2879
2880 unsigned num_params;
2881 nir_parameter *params;
2882
2883 /** The implementation of this function.
2884 *
2885 * If the function is only declared and not implemented, this is NULL.
2886 */
2887 nir_function_impl *impl;
2888
2889 bool is_entrypoint;
2890 } nir_function;
2891
2892 typedef enum {
2893 nir_lower_imul64 = (1 << 0),
2894 nir_lower_isign64 = (1 << 1),
2895 /** Lower all int64 modulus and division opcodes */
2896 nir_lower_divmod64 = (1 << 2),
2897 /** Lower all 64-bit umul_high and imul_high opcodes */
2898 nir_lower_imul_high64 = (1 << 3),
2899 nir_lower_mov64 = (1 << 4),
2900 nir_lower_icmp64 = (1 << 5),
2901 nir_lower_iadd64 = (1 << 6),
2902 nir_lower_iabs64 = (1 << 7),
2903 nir_lower_ineg64 = (1 << 8),
2904 nir_lower_logic64 = (1 << 9),
2905 nir_lower_minmax64 = (1 << 10),
2906 nir_lower_shift64 = (1 << 11),
2907 nir_lower_imul_2x32_64 = (1 << 12),
2908 nir_lower_extract64 = (1 << 13),
2909 nir_lower_ufind_msb64 = (1 << 14),
2910 } nir_lower_int64_options;
2911
2912 typedef enum {
2913 nir_lower_drcp = (1 << 0),
2914 nir_lower_dsqrt = (1 << 1),
2915 nir_lower_drsq = (1 << 2),
2916 nir_lower_dtrunc = (1 << 3),
2917 nir_lower_dfloor = (1 << 4),
2918 nir_lower_dceil = (1 << 5),
2919 nir_lower_dfract = (1 << 6),
2920 nir_lower_dround_even = (1 << 7),
2921 nir_lower_dmod = (1 << 8),
2922 nir_lower_dsub = (1 << 9),
2923 nir_lower_ddiv = (1 << 10),
2924 nir_lower_fp64_full_software = (1 << 11),
2925 } nir_lower_doubles_options;
2926
2927 typedef enum {
2928 nir_divergence_single_prim_per_subgroup = (1 << 0),
2929 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2930 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2931 nir_divergence_view_index_uniform = (1 << 3),
2932 } nir_divergence_options;
2933
2934 typedef struct nir_shader_compiler_options {
2935 bool lower_fdiv;
2936 bool lower_ffma;
2937 bool fuse_ffma;
2938 bool lower_flrp16;
2939 bool lower_flrp32;
2940 /** Lowers flrp when it does not support doubles */
2941 bool lower_flrp64;
2942 bool lower_fpow;
2943 bool lower_fsat;
2944 bool lower_fsqrt;
2945 bool lower_sincos;
2946 bool lower_fmod;
2947 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2948 bool lower_bitfield_extract;
2949 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2950 bool lower_bitfield_extract_to_shifts;
2951 /** Lowers bitfield_insert to bfi/bfm */
2952 bool lower_bitfield_insert;
2953 /** Lowers bitfield_insert to compares, and shifts. */
2954 bool lower_bitfield_insert_to_shifts;
2955 /** Lowers bitfield_insert to bfm/bitfield_select. */
2956 bool lower_bitfield_insert_to_bitfield_select;
2957 /** Lowers bitfield_reverse to shifts. */
2958 bool lower_bitfield_reverse;
2959 /** Lowers bit_count to shifts. */
2960 bool lower_bit_count;
2961 /** Lowers ifind_msb to compare and ufind_msb */
2962 bool lower_ifind_msb;
2963 /** Lowers find_lsb to ufind_msb and logic ops */
2964 bool lower_find_lsb;
2965 bool lower_uadd_carry;
2966 bool lower_usub_borrow;
2967 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2968 bool lower_mul_high;
2969 /** lowers fneg and ineg to fsub and isub. */
2970 bool lower_negate;
2971 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2972 bool lower_sub;
2973
2974 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2975 bool lower_scmp;
2976
2977 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2978 bool lower_vector_cmp;
2979
2980 /** enables rules to lower idiv by power-of-two: */
2981 bool lower_idiv;
2982
2983 /** enable rules to avoid bit ops */
2984 bool lower_bitops;
2985
2986 /** enables rules to lower isign to imin+imax */
2987 bool lower_isign;
2988
2989 /** enables rules to lower fsign to fsub and flt */
2990 bool lower_fsign;
2991
2992 /* lower fdph to fdot4 */
2993 bool lower_fdph;
2994
2995 /** lower fdot to fmul and fsum/fadd. */
2996 bool lower_fdot;
2997
2998 /* Does the native fdot instruction replicate its result for four
2999 * components? If so, then opt_algebraic_late will turn all fdotN
3000 * instructions into fdot_replicatedN instructions.
3001 */
3002 bool fdot_replicates;
3003
3004 /** lowers ffloor to fsub+ffract: */
3005 bool lower_ffloor;
3006
3007 /** lowers ffract to fsub+ffloor: */
3008 bool lower_ffract;
3009
3010 /** lowers fceil to fneg+ffloor+fneg: */
3011 bool lower_fceil;
3012
3013 bool lower_ftrunc;
3014
3015 bool lower_ldexp;
3016
3017 bool lower_pack_half_2x16;
3018 bool lower_pack_unorm_2x16;
3019 bool lower_pack_snorm_2x16;
3020 bool lower_pack_unorm_4x8;
3021 bool lower_pack_snorm_4x8;
3022 bool lower_unpack_half_2x16;
3023 bool lower_unpack_unorm_2x16;
3024 bool lower_unpack_snorm_2x16;
3025 bool lower_unpack_unorm_4x8;
3026 bool lower_unpack_snorm_4x8;
3027
3028 bool lower_pack_split;
3029
3030 bool lower_extract_byte;
3031 bool lower_extract_word;
3032
3033 bool lower_all_io_to_temps;
3034 bool lower_all_io_to_elements;
3035
3036 /* Indicates that the driver only has zero-based vertex id */
3037 bool vertex_id_zero_based;
3038
3039 /**
3040 * If enabled, gl_BaseVertex will be lowered as:
3041 * is_indexed_draw (~0/0) & firstvertex
3042 */
3043 bool lower_base_vertex;
3044
3045 /**
3046 * If enabled, gl_HelperInvocation will be lowered as:
3047 *
3048 * !((1 << sample_id) & sample_mask_in))
3049 *
3050 * This depends on some possibly hw implementation details, which may
3051 * not be true for all hw. In particular that the FS is only executed
3052 * for covered samples or for helper invocations. So, do not blindly
3053 * enable this option.
3054 *
3055 * Note: See also issue #22 in ARB_shader_image_load_store
3056 */
3057 bool lower_helper_invocation;
3058
3059 /**
3060 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3061 *
3062 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3063 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3064 */
3065 bool optimize_sample_mask_in;
3066
3067 bool lower_cs_local_index_from_id;
3068 bool lower_cs_local_id_from_index;
3069
3070 bool lower_device_index_to_zero;
3071
3072 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3073 bool lower_wpos_pntc;
3074
3075 /**
3076 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3077 * lowered to simple arithmetic.
3078 *
3079 * If this flag is set, the lowering will be applied to all bit-sizes of
3080 * these instructions.
3081 *
3082 * \sa ::lower_hadd64
3083 */
3084 bool lower_hadd;
3085
3086 /**
3087 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3088 * should be lowered to simple arithmetic.
3089 *
3090 * If this flag is set, the lowering will be applied to only 64-bit
3091 * versions of these instructions.
3092 *
3093 * \sa ::lower_hadd
3094 */
3095 bool lower_hadd64;
3096
3097 /**
3098 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3099 * arithmetic.
3100 *
3101 * If this flag is set, the lowering will be applied to all bit-sizes of
3102 * these instructions.
3103 *
3104 * \sa ::lower_usub_sat64
3105 */
3106 bool lower_add_sat;
3107
3108 /**
3109 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3110 * arithmetic.
3111 *
3112 * \sa ::lower_add_sat
3113 */
3114 bool lower_usub_sat64;
3115
3116 /**
3117 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3118 * for IO purposes and would prefer loads/stores be vectorized.
3119 */
3120 bool vectorize_io;
3121 bool lower_to_scalar;
3122
3123 /**
3124 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3125 */
3126 bool vectorize_vec2_16bit;
3127
3128 /**
3129 * Should the linker unify inputs_read/outputs_written between adjacent
3130 * shader stages which are linked into a single program?
3131 */
3132 bool unify_interfaces;
3133
3134 /**
3135 * Should nir_lower_io() create load_interpolated_input intrinsics?
3136 *
3137 * If not, it generates regular load_input intrinsics and interpolation
3138 * information must be inferred from the list of input nir_variables.
3139 */
3140 bool use_interpolated_input_intrinsics;
3141
3142 /* Lowers when 32x32->64 bit multiplication is not supported */
3143 bool lower_mul_2x32_64;
3144
3145 /* Lowers when rotate instruction is not supported */
3146 bool lower_rotate;
3147
3148 /**
3149 * Backend supports imul24, and would like to use it (when possible)
3150 * for address/offset calculation. If true, driver should call
3151 * nir_lower_amul(). (If not set, amul will automatically be lowered
3152 * to imul.)
3153 */
3154 bool has_imul24;
3155
3156 /** Backend supports umul24, if not set umul24 will automatically be lowered
3157 * to imul with masked inputs */
3158 bool has_umul24;
3159
3160 /** Backend supports umad24, if not set umad24 will automatically be lowered
3161 * to imul with masked inputs and iadd */
3162 bool has_umad24;
3163
3164 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3165 * memory and control barrier intrinsics based on GLSL.
3166 */
3167 bool use_scoped_barrier;
3168
3169 /**
3170 * Is this the Intel vec4 backend?
3171 *
3172 * Used to inhibit algebraic optimizations that are known to be harmful on
3173 * the Intel vec4 backend. This is generally applicable to any
3174 * optimization that might cause more immediate values to be used in
3175 * 3-source (e.g., ffma and flrp) instructions.
3176 */
3177 bool intel_vec4;
3178
3179 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3180 bool lower_bfe_with_two_constants;
3181
3182 /** Whether 8-bit ALU is supported. */
3183 bool support_8bit_alu;
3184
3185 /** Whether 16-bit ALU is supported. */
3186 bool support_16bit_alu;
3187
3188 unsigned max_unroll_iterations;
3189
3190 nir_lower_int64_options lower_int64_options;
3191 nir_lower_doubles_options lower_doubles_options;
3192 } nir_shader_compiler_options;
3193
3194 typedef struct nir_shader {
3195 /** list of uniforms (nir_variable) */
3196 struct exec_list uniforms;
3197
3198 /** list of inputs (nir_variable) */
3199 struct exec_list inputs;
3200
3201 /** list of outputs (nir_variable) */
3202 struct exec_list outputs;
3203
3204 /** list of shared compute variables (nir_variable) */
3205 struct exec_list shared;
3206
3207 /** Set of driver-specific options for the shader.
3208 *
3209 * The memory for the options is expected to be kept in a single static
3210 * copy by the driver.
3211 */
3212 const struct nir_shader_compiler_options *options;
3213
3214 /** Various bits of compile-time information about a given shader */
3215 struct shader_info info;
3216
3217 /** list of global variables in the shader (nir_variable) */
3218 struct exec_list globals;
3219
3220 /** list of system value variables in the shader (nir_variable) */
3221 struct exec_list system_values;
3222
3223 struct exec_list functions; /** < list of nir_function */
3224
3225 /**
3226 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3227 * access plus one
3228 */
3229 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3230
3231 /** Size in bytes of required scratch space */
3232 unsigned scratch_size;
3233
3234 /** Constant data associated with this shader.
3235 *
3236 * Constant data is loaded through load_constant intrinsics. See also
3237 * nir_opt_large_constants.
3238 */
3239 void *constant_data;
3240 unsigned constant_data_size;
3241 } nir_shader;
3242
3243 #define nir_foreach_function(func, shader) \
3244 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3245
3246 static inline nir_function_impl *
3247 nir_shader_get_entrypoint(nir_shader *shader)
3248 {
3249 nir_function *func = NULL;
3250
3251 nir_foreach_function(function, shader) {
3252 assert(func == NULL);
3253 if (function->is_entrypoint) {
3254 func = function;
3255 #ifndef NDEBUG
3256 break;
3257 #endif
3258 }
3259 }
3260
3261 if (!func)
3262 return NULL;
3263
3264 assert(func->num_params == 0);
3265 assert(func->impl);
3266 return func->impl;
3267 }
3268
3269 nir_shader *nir_shader_create(void *mem_ctx,
3270 gl_shader_stage stage,
3271 const nir_shader_compiler_options *options,
3272 shader_info *si);
3273
3274 nir_register *nir_local_reg_create(nir_function_impl *impl);
3275
3276 void nir_reg_remove(nir_register *reg);
3277
3278 /** Adds a variable to the appropriate list in nir_shader */
3279 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3280
3281 static inline void
3282 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3283 {
3284 assert(var->data.mode == nir_var_function_temp);
3285 exec_list_push_tail(&impl->locals, &var->node);
3286 }
3287
3288 /** creates a variable, sets a few defaults, and adds it to the list */
3289 nir_variable *nir_variable_create(nir_shader *shader,
3290 nir_variable_mode mode,
3291 const struct glsl_type *type,
3292 const char *name);
3293 /** creates a local variable and adds it to the list */
3294 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3295 const struct glsl_type *type,
3296 const char *name);
3297
3298 /** creates a function and adds it to the shader's list of functions */
3299 nir_function *nir_function_create(nir_shader *shader, const char *name);
3300
3301 nir_function_impl *nir_function_impl_create(nir_function *func);
3302 /** creates a function_impl that isn't tied to any particular function */
3303 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3304
3305 nir_block *nir_block_create(nir_shader *shader);
3306 nir_if *nir_if_create(nir_shader *shader);
3307 nir_loop *nir_loop_create(nir_shader *shader);
3308
3309 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3310
3311 /** requests that the given pieces of metadata be generated */
3312 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3313 /** dirties all but the preserved metadata */
3314 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3315 /** Preserves all metadata for the given shader */
3316 void nir_shader_preserve_all_metadata(nir_shader *shader);
3317
3318 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3319 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3320
3321 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3322 nir_deref_type deref_type);
3323
3324 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3325
3326 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3327 unsigned num_components,
3328 unsigned bit_size);
3329
3330 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3331 nir_intrinsic_op op);
3332
3333 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3334 nir_function *callee);
3335
3336 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3337
3338 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3339
3340 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3341
3342 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3343 unsigned num_components,
3344 unsigned bit_size);
3345
3346 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3347
3348 /**
3349 * NIR Cursors and Instruction Insertion API
3350 * @{
3351 *
3352 * A tiny struct representing a point to insert/extract instructions or
3353 * control flow nodes. Helps reduce the combinatorial explosion of possible
3354 * points to insert/extract.
3355 *
3356 * \sa nir_control_flow.h
3357 */
3358 typedef enum {
3359 nir_cursor_before_block,
3360 nir_cursor_after_block,
3361 nir_cursor_before_instr,
3362 nir_cursor_after_instr,
3363 } nir_cursor_option;
3364
3365 typedef struct {
3366 nir_cursor_option option;
3367 union {
3368 nir_block *block;
3369 nir_instr *instr;
3370 };
3371 } nir_cursor;
3372
3373 static inline nir_block *
3374 nir_cursor_current_block(nir_cursor cursor)
3375 {
3376 if (cursor.option == nir_cursor_before_instr ||
3377 cursor.option == nir_cursor_after_instr) {
3378 return cursor.instr->block;
3379 } else {
3380 return cursor.block;
3381 }
3382 }
3383
3384 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3385
3386 static inline nir_cursor
3387 nir_before_block(nir_block *block)
3388 {
3389 nir_cursor cursor;
3390 cursor.option = nir_cursor_before_block;
3391 cursor.block = block;
3392 return cursor;
3393 }
3394
3395 static inline nir_cursor
3396 nir_after_block(nir_block *block)
3397 {
3398 nir_cursor cursor;
3399 cursor.option = nir_cursor_after_block;
3400 cursor.block = block;
3401 return cursor;
3402 }
3403
3404 static inline nir_cursor
3405 nir_before_instr(nir_instr *instr)
3406 {
3407 nir_cursor cursor;
3408 cursor.option = nir_cursor_before_instr;
3409 cursor.instr = instr;
3410 return cursor;
3411 }
3412
3413 static inline nir_cursor
3414 nir_after_instr(nir_instr *instr)
3415 {
3416 nir_cursor cursor;
3417 cursor.option = nir_cursor_after_instr;
3418 cursor.instr = instr;
3419 return cursor;
3420 }
3421
3422 static inline nir_cursor
3423 nir_after_block_before_jump(nir_block *block)
3424 {
3425 nir_instr *last_instr = nir_block_last_instr(block);
3426 if (last_instr && last_instr->type == nir_instr_type_jump) {
3427 return nir_before_instr(last_instr);
3428 } else {
3429 return nir_after_block(block);
3430 }
3431 }
3432
3433 static inline nir_cursor
3434 nir_before_src(nir_src *src, bool is_if_condition)
3435 {
3436 if (is_if_condition) {
3437 nir_block *prev_block =
3438 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3439 assert(!nir_block_ends_in_jump(prev_block));
3440 return nir_after_block(prev_block);
3441 } else if (src->parent_instr->type == nir_instr_type_phi) {
3442 #ifndef NDEBUG
3443 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3444 bool found = false;
3445 nir_foreach_phi_src(phi_src, cond_phi) {
3446 if (phi_src->src.ssa == src->ssa) {
3447 found = true;
3448 break;
3449 }
3450 }
3451 assert(found);
3452 #endif
3453 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3454 * to have a more specific name.
3455 */
3456 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3457 return nir_after_block_before_jump(phi_src->pred);
3458 } else {
3459 return nir_before_instr(src->parent_instr);
3460 }
3461 }
3462
3463 static inline nir_cursor
3464 nir_before_cf_node(nir_cf_node *node)
3465 {
3466 if (node->type == nir_cf_node_block)
3467 return nir_before_block(nir_cf_node_as_block(node));
3468
3469 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3470 }
3471
3472 static inline nir_cursor
3473 nir_after_cf_node(nir_cf_node *node)
3474 {
3475 if (node->type == nir_cf_node_block)
3476 return nir_after_block(nir_cf_node_as_block(node));
3477
3478 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3479 }
3480
3481 static inline nir_cursor
3482 nir_after_phis(nir_block *block)
3483 {
3484 nir_foreach_instr(instr, block) {
3485 if (instr->type != nir_instr_type_phi)
3486 return nir_before_instr(instr);
3487 }
3488 return nir_after_block(block);
3489 }
3490
3491 static inline nir_cursor
3492 nir_after_cf_node_and_phis(nir_cf_node *node)
3493 {
3494 if (node->type == nir_cf_node_block)
3495 return nir_after_block(nir_cf_node_as_block(node));
3496
3497 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3498
3499 return nir_after_phis(block);
3500 }
3501
3502 static inline nir_cursor
3503 nir_before_cf_list(struct exec_list *cf_list)
3504 {
3505 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3506 exec_list_get_head(cf_list), node);
3507 return nir_before_cf_node(first_node);
3508 }
3509
3510 static inline nir_cursor
3511 nir_after_cf_list(struct exec_list *cf_list)
3512 {
3513 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3514 exec_list_get_tail(cf_list), node);
3515 return nir_after_cf_node(last_node);
3516 }
3517
3518 /**
3519 * Insert a NIR instruction at the given cursor.
3520 *
3521 * Note: This does not update the cursor.
3522 */
3523 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3524
3525 static inline void
3526 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3527 {
3528 nir_instr_insert(nir_before_instr(instr), before);
3529 }
3530
3531 static inline void
3532 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3533 {
3534 nir_instr_insert(nir_after_instr(instr), after);
3535 }
3536
3537 static inline void
3538 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3539 {
3540 nir_instr_insert(nir_before_block(block), before);
3541 }
3542
3543 static inline void
3544 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3545 {
3546 nir_instr_insert(nir_after_block(block), after);
3547 }
3548
3549 static inline void
3550 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3551 {
3552 nir_instr_insert(nir_before_cf_node(node), before);
3553 }
3554
3555 static inline void
3556 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3557 {
3558 nir_instr_insert(nir_after_cf_node(node), after);
3559 }
3560
3561 static inline void
3562 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3563 {
3564 nir_instr_insert(nir_before_cf_list(list), before);
3565 }
3566
3567 static inline void
3568 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3569 {
3570 nir_instr_insert(nir_after_cf_list(list), after);
3571 }
3572
3573 void nir_instr_remove_v(nir_instr *instr);
3574
3575 static inline nir_cursor
3576 nir_instr_remove(nir_instr *instr)
3577 {
3578 nir_cursor cursor;
3579 nir_instr *prev = nir_instr_prev(instr);
3580 if (prev) {
3581 cursor = nir_after_instr(prev);
3582 } else {
3583 cursor = nir_before_block(instr->block);
3584 }
3585 nir_instr_remove_v(instr);
3586 return cursor;
3587 }
3588
3589 /** @} */
3590
3591 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3592
3593 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3594 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3595 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3596 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3597 void *state);
3598 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3599 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3600 bool nir_foreach_phi_src_leaving_block(nir_block *instr,
3601 nir_foreach_src_cb cb,
3602 void *state);
3603
3604 nir_const_value *nir_src_as_const_value(nir_src src);
3605
3606 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3607 static inline c_type * \
3608 nir_src_as_ ## name (nir_src src) \
3609 { \
3610 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3611 ? cast_macro(src.ssa->parent_instr) : NULL; \
3612 }
3613