nir: Improve the comment on num_inputs and friends
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #define XXH_INLINE_ALL
45 #include "util/xxhash.h"
46 #include <stdio.h>
47
48 #ifndef NDEBUG
49 #include "util/debug.h"
50 #endif /* NDEBUG */
51
52 #include "nir_opcodes.h"
53
54 #if defined(_WIN32) && !defined(snprintf)
55 #define snprintf _snprintf
56 #endif
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #define NIR_FALSE 0u
63 #define NIR_TRUE (~0u)
64 #define NIR_MAX_VEC_COMPONENTS 16
65 #define NIR_MAX_MATRIX_COLUMNS 4
66 #define NIR_STREAM_PACKED (1 << 8)
67 typedef uint16_t nir_component_mask_t;
68
69 static inline bool
70 nir_num_components_valid(unsigned num_components)
71 {
72 return (num_components >= 1 &&
73 num_components <= 4) ||
74 num_components == 8 ||
75 num_components == 16;
76 }
77
78 /** Defines a cast function
79 *
80 * This macro defines a cast function from in_type to out_type where
81 * out_type is some structure type that contains a field of type out_type.
82 *
83 * Note that you have to be a bit careful as the generated cast function
84 * destroys constness.
85 */
86 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
87 type_field, type_value) \
88 static inline out_type * \
89 name(const in_type *parent) \
90 { \
91 assert(parent && parent->type_field == type_value); \
92 return exec_node_data(out_type, parent, field); \
93 }
94
95 struct nir_function;
96 struct nir_shader;
97 struct nir_instr;
98 struct nir_builder;
99
100
101 /**
102 * Description of built-in state associated with a uniform
103 *
104 * \sa nir_variable::state_slots
105 */
106 typedef struct {
107 gl_state_index16 tokens[STATE_LENGTH];
108 uint16_t swizzle;
109 } nir_state_slot;
110
111 typedef enum {
112 nir_var_shader_in = (1 << 0),
113 nir_var_shader_out = (1 << 1),
114 nir_var_shader_temp = (1 << 2),
115 nir_var_function_temp = (1 << 3),
116 nir_var_uniform = (1 << 4),
117 nir_var_mem_ubo = (1 << 5),
118 nir_var_system_value = (1 << 6),
119 nir_var_mem_ssbo = (1 << 7),
120 nir_var_mem_shared = (1 << 8),
121 nir_var_mem_global = (1 << 9),
122 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
123 nir_num_variable_modes = 11,
124 nir_var_all = (1 << nir_num_variable_modes) - 1,
125 } nir_variable_mode;
126
127 /**
128 * Rounding modes.
129 */
130 typedef enum {
131 nir_rounding_mode_undef = 0,
132 nir_rounding_mode_rtne = 1, /* round to nearest even */
133 nir_rounding_mode_ru = 2, /* round up */
134 nir_rounding_mode_rd = 3, /* round down */
135 nir_rounding_mode_rtz = 4, /* round towards zero */
136 } nir_rounding_mode;
137
138 typedef union {
139 bool b;
140 float f32;
141 double f64;
142 int8_t i8;
143 uint8_t u8;
144 int16_t i16;
145 uint16_t u16;
146 int32_t i32;
147 uint32_t u32;
148 int64_t i64;
149 uint64_t u64;
150 } nir_const_value;
151
152 #define nir_const_value_to_array(arr, c, components, m) \
153 { \
154 for (unsigned i = 0; i < components; ++i) \
155 arr[i] = c[i].m; \
156 } while (false)
157
158 static inline nir_const_value
159 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
160 {
161 nir_const_value v;
162 memset(&v, 0, sizeof(v));
163
164 switch (bit_size) {
165 case 1: v.b = x; break;
166 case 8: v.u8 = x; break;
167 case 16: v.u16 = x; break;
168 case 32: v.u32 = x; break;
169 case 64: v.u64 = x; break;
170 default:
171 unreachable("Invalid bit size");
172 }
173
174 return v;
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_int(int64_t i, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64) {
185 assert(i >= (-(1ll << (bit_size - 1))));
186 assert(i < (1ll << (bit_size - 1)));
187 }
188
189 return nir_const_value_for_raw_uint(i, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
194 {
195 nir_const_value v;
196 memset(&v, 0, sizeof(v));
197
198 assert(bit_size <= 64);
199 if (bit_size < 64)
200 assert(u < (1ull << bit_size));
201
202 return nir_const_value_for_raw_uint(u, bit_size);
203 }
204
205 static inline nir_const_value
206 nir_const_value_for_bool(bool b, unsigned bit_size)
207 {
208 /* Booleans use a 0/-1 convention */
209 return nir_const_value_for_int(-(int)b, bit_size);
210 }
211
212 /* This one isn't inline because it requires half-float conversion */
213 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
214
215 static inline int64_t
216 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 /* int1_t uses 0/-1 convention */
220 case 1: return -(int)value.b;
221 case 8: return value.i8;
222 case 16: return value.i16;
223 case 32: return value.i32;
224 case 64: return value.i64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline uint64_t
231 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
232 {
233 switch (bit_size) {
234 case 1: return value.b;
235 case 8: return value.u8;
236 case 16: return value.u16;
237 case 32: return value.u32;
238 case 64: return value.u64;
239 default:
240 unreachable("Invalid bit size");
241 }
242 }
243
244 static inline bool
245 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
246 {
247 int64_t i = nir_const_value_as_int(value, bit_size);
248
249 /* Booleans of any size use 0/-1 convention */
250 assert(i == 0 || i == -1);
251
252 return i;
253 }
254
255 /* This one isn't inline because it requires half-float conversion */
256 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
257
258 typedef struct nir_constant {
259 /**
260 * Value of the constant.
261 *
262 * The field used to back the values supplied by the constant is determined
263 * by the type associated with the \c nir_variable. Constants may be
264 * scalars, vectors, or matrices.
265 */
266 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
267
268 /* we could get this from the var->type but makes clone *much* easier to
269 * not have to care about the type.
270 */
271 unsigned num_elements;
272
273 /* Array elements / Structure Fields */
274 struct nir_constant **elements;
275 } nir_constant;
276
277 /**
278 * \brief Layout qualifiers for gl_FragDepth.
279 *
280 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
281 * with a layout qualifier.
282 */
283 typedef enum {
284 nir_depth_layout_none, /**< No depth layout is specified. */
285 nir_depth_layout_any,
286 nir_depth_layout_greater,
287 nir_depth_layout_less,
288 nir_depth_layout_unchanged
289 } nir_depth_layout;
290
291 /**
292 * Enum keeping track of how a variable was declared.
293 */
294 typedef enum {
295 /**
296 * Normal declaration.
297 */
298 nir_var_declared_normally = 0,
299
300 /**
301 * Variable is implicitly generated by the compiler and should not be
302 * visible via the API.
303 */
304 nir_var_hidden,
305 } nir_var_declaration_type;
306
307 /**
308 * Either a uniform, global variable, shader input, or shader output. Based on
309 * ir_variable - it should be easy to translate between the two.
310 */
311
312 typedef struct nir_variable {
313 struct exec_node node;
314
315 /**
316 * Declared type of the variable
317 */
318 const struct glsl_type *type;
319
320 /**
321 * Declared name of the variable
322 */
323 char *name;
324
325 struct nir_variable_data {
326 /**
327 * Storage class of the variable.
328 *
329 * \sa nir_variable_mode
330 */
331 unsigned mode:11;
332
333 /**
334 * Is the variable read-only?
335 *
336 * This is set for variables declared as \c const, shader inputs,
337 * and uniforms.
338 */
339 unsigned read_only:1;
340 unsigned centroid:1;
341 unsigned sample:1;
342 unsigned patch:1;
343 unsigned invariant:1;
344
345 /**
346 * Precision qualifier.
347 *
348 * In desktop GLSL we do not care about precision qualifiers at all, in
349 * fact, the spec says that precision qualifiers are ignored.
350 *
351 * To make things easy, we make it so that this field is always
352 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
353 * have the same precision value and the checks we add in the compiler
354 * for this field will never break a desktop shader compile.
355 */
356 unsigned precision:2;
357
358 /**
359 * Can this variable be coalesced with another?
360 *
361 * This is set by nir_lower_io_to_temporaries to say that any
362 * copies involving this variable should stay put. Propagating it can
363 * duplicate the resulting load/store, which is not wanted, and may
364 * result in a load/store of the variable with an indirect offset which
365 * the backend may not be able to handle.
366 */
367 unsigned cannot_coalesce:1;
368
369 /**
370 * When separate shader programs are enabled, only input/outputs between
371 * the stages of a multi-stage separate program can be safely removed
372 * from the shader interface. Other input/outputs must remains active.
373 *
374 * This is also used to make sure xfb varyings that are unused by the
375 * fragment shader are not removed.
376 */
377 unsigned always_active_io:1;
378
379 /**
380 * Interpolation mode for shader inputs / outputs
381 *
382 * \sa glsl_interp_mode
383 */
384 unsigned interpolation:3;
385
386 /**
387 * If non-zero, then this variable may be packed along with other variables
388 * into a single varying slot, so this offset should be applied when
389 * accessing components. For example, an offset of 1 means that the x
390 * component of this variable is actually stored in component y of the
391 * location specified by \c location.
392 */
393 unsigned location_frac:2;
394
395 /**
396 * If true, this variable represents an array of scalars that should
397 * be tightly packed. In other words, consecutive array elements
398 * should be stored one component apart, rather than one slot apart.
399 */
400 unsigned compact:1;
401
402 /**
403 * Whether this is a fragment shader output implicitly initialized with
404 * the previous contents of the specified render target at the
405 * framebuffer location corresponding to this shader invocation.
406 */
407 unsigned fb_fetch_output:1;
408
409 /**
410 * Non-zero if this variable is considered bindless as defined by
411 * ARB_bindless_texture.
412 */
413 unsigned bindless:1;
414
415 /**
416 * Was an explicit binding set in the shader?
417 */
418 unsigned explicit_binding:1;
419
420 /**
421 * Was the location explicitly set in the shader?
422 *
423 * If the location is explicitly set in the shader, it \b cannot be changed
424 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 * no effect).
426 */
427 unsigned explicit_location:1;
428
429 /**
430 * Was a transfer feedback buffer set in the shader?
431 */
432 unsigned explicit_xfb_buffer:1;
433
434 /**
435 * Was a transfer feedback stride set in the shader?
436 */
437 unsigned explicit_xfb_stride:1;
438
439 /**
440 * Was an explicit offset set in the shader?
441 */
442 unsigned explicit_offset:1;
443
444 /**
445 * Layout of the matrix. Uses glsl_matrix_layout values.
446 */
447 unsigned matrix_layout:2;
448
449 /**
450 * Non-zero if this variable was created by lowering a named interface
451 * block.
452 */
453 unsigned from_named_ifc_block:1;
454
455 /**
456 * How the variable was declared. See nir_var_declaration_type.
457 *
458 * This is used to detect variables generated by the compiler, so should
459 * not be visible via the API.
460 */
461 unsigned how_declared:2;
462
463 /**
464 * Is this variable per-view? If so, we know it must be an array with
465 * size corresponding to the number of views.
466 */
467 unsigned per_view:1;
468
469 /**
470 * \brief Layout qualifier for gl_FragDepth. See nir_depth_layout.
471 *
472 * This is not equal to \c ir_depth_layout_none if and only if this
473 * variable is \c gl_FragDepth and a layout qualifier is specified.
474 */
475 unsigned depth_layout:3;
476
477 /**
478 * Vertex stream output identifier.
479 *
480 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
481 * indicate the stream of the i-th component.
482 */
483 unsigned stream:9;
484
485 /**
486 * See gl_access_qualifier.
487 *
488 * Access flags for memory variables (SSBO/global), image uniforms, and
489 * bindless images in uniforms/inputs/outputs.
490 */
491 unsigned access:8;
492
493 /**
494 * Descriptor set binding for sampler or UBO.
495 */
496 unsigned descriptor_set:5;
497
498 /**
499 * output index for dual source blending.
500 */
501 unsigned index;
502
503 /**
504 * Initial binding point for a sampler or UBO.
505 *
506 * For array types, this represents the binding point for the first element.
507 */
508 unsigned binding;
509
510 /**
511 * Storage location of the base of this variable
512 *
513 * The precise meaning of this field depends on the nature of the variable.
514 *
515 * - Vertex shader input: one of the values from \c gl_vert_attrib.
516 * - Vertex shader output: one of the values from \c gl_varying_slot.
517 * - Geometry shader input: one of the values from \c gl_varying_slot.
518 * - Geometry shader output: one of the values from \c gl_varying_slot.
519 * - Fragment shader input: one of the values from \c gl_varying_slot.
520 * - Fragment shader output: one of the values from \c gl_frag_result.
521 * - Uniforms: Per-stage uniform slot number for default uniform block.
522 * - Uniforms: Index within the uniform block definition for UBO members.
523 * - Non-UBO Uniforms: uniform slot number.
524 * - Other: This field is not currently used.
525 *
526 * If the variable is a uniform, shader input, or shader output, and the
527 * slot has not been assigned, the value will be -1.
528 */
529 int location;
530
531 /**
532 * The actual location of the variable in the IR. Only valid for inputs,
533 * outputs, and uniforms (including samplers and images).
534 */
535 unsigned driver_location;
536
537 /**
538 * Location an atomic counter or transform feedback is stored at.
539 */
540 unsigned offset;
541
542 union {
543 struct {
544 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
545 enum pipe_format format;
546 } image;
547
548 struct {
549 /**
550 * For OpenCL inline samplers. See cl_sampler_addressing_mode and cl_sampler_filter_mode
551 */
552 unsigned is_inline_sampler : 1;
553 unsigned addressing_mode : 3;
554 unsigned normalized_coordinates : 1;
555 unsigned filter_mode : 1;
556 } sampler;
557
558 struct {
559 /**
560 * Transform feedback buffer.
561 */
562 uint16_t buffer:2;
563
564 /**
565 * Transform feedback stride.
566 */
567 uint16_t stride;
568 } xfb;
569 };
570 } data;
571
572 /**
573 * Identifier for this variable generated by nir_index_vars() that is unique
574 * among other variables in the same exec_list.
575 */
576 unsigned index;
577
578 /* Number of nir_variable_data members */
579 uint16_t num_members;
580
581 /**
582 * Built-in state that backs this uniform
583 *
584 * Once set at variable creation, \c state_slots must remain invariant.
585 * This is because, ideally, this array would be shared by all clones of
586 * this variable in the IR tree. In other words, we'd really like for it
587 * to be a fly-weight.
588 *
589 * If the variable is not a uniform, \c num_state_slots will be zero and
590 * \c state_slots will be \c NULL.
591 */
592 /*@{*/
593 uint16_t num_state_slots; /**< Number of state slots used */
594 nir_state_slot *state_slots; /**< State descriptors. */
595 /*@}*/
596
597 /**
598 * Constant expression assigned in the initializer of the variable
599 *
600 * This field should only be used temporarily by creators of NIR shaders
601 * and then lower_constant_initializers can be used to get rid of them.
602 * Most of the rest of NIR ignores this field or asserts that it's NULL.
603 */
604 nir_constant *constant_initializer;
605
606 /**
607 * Global variable assigned in the initializer of the variable
608 * This field should only be used temporarily by creators of NIR shaders
609 * and then lower_constant_initializers can be used to get rid of them.
610 * Most of the rest of NIR ignores this field or asserts that it's NULL.
611 */
612 struct nir_variable *pointer_initializer;
613
614 /**
615 * For variables that are in an interface block or are an instance of an
616 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
617 *
618 * \sa ir_variable::location
619 */
620 const struct glsl_type *interface_type;
621
622 /**
623 * Description of per-member data for per-member struct variables
624 *
625 * This is used for variables which are actually an amalgamation of
626 * multiple entities such as a struct of built-in values or a struct of
627 * inputs each with their own layout specifier. This is only allowed on
628 * variables with a struct or array of array of struct type.
629 */
630 struct nir_variable_data *members;
631 } nir_variable;
632
633 static inline bool
634 _nir_shader_variable_has_mode(nir_variable *var, unsigned modes)
635 {
636 /* This isn't a shader variable */
637 assert(!(modes & nir_var_function_temp));
638 return var->data.mode & modes;
639 }
640
641 #define nir_foreach_variable_in_list(var, var_list) \
642 foreach_list_typed(nir_variable, var, node, var_list)
643
644 #define nir_foreach_variable_in_list_safe(var, var_list) \
645 foreach_list_typed_safe(nir_variable, var, node, var_list)
646
647 #define nir_foreach_variable_in_shader(var, shader) \
648 nir_foreach_variable_in_list(var, &(shader)->variables)
649
650 #define nir_foreach_variable_in_shader_safe(var, shader) \
651 nir_foreach_variable_in_list_safe(var, &(shader)->variables)
652
653 #define nir_foreach_variable_with_modes(var, shader, modes) \
654 nir_foreach_variable_in_shader(var, shader) \
655 if (_nir_shader_variable_has_mode(var, modes))
656
657 #define nir_foreach_variable_with_modes_safe(var, shader, modes) \
658 nir_foreach_variable_in_shader_safe(var, shader) \
659 if (_nir_shader_variable_has_mode(var, modes))
660
661 #define nir_foreach_shader_in_variable(var, shader) \
662 nir_foreach_variable_with_modes(var, shader, nir_var_shader_in)
663
664 #define nir_foreach_shader_in_variable_safe(var, shader) \
665 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_in)
666
667 #define nir_foreach_shader_out_variable(var, shader) \
668 nir_foreach_variable_with_modes(var, shader, nir_var_shader_out)
669
670 #define nir_foreach_shader_out_variable_safe(var, shader) \
671 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_out)
672
673 #define nir_foreach_uniform_variable(var, shader) \
674 nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
675
676 #define nir_foreach_uniform_variable_safe(var, shader) \
677 nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
678
679 static inline bool
680 nir_variable_is_global(const nir_variable *var)
681 {
682 return var->data.mode != nir_var_function_temp;
683 }
684
685 typedef struct nir_register {
686 struct exec_node node;
687
688 unsigned num_components; /** < number of vector components */
689 unsigned num_array_elems; /** < size of array (0 for no array) */
690
691 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
692 uint8_t bit_size;
693
694 /** generic register index. */
695 unsigned index;
696
697 /** only for debug purposes, can be NULL */
698 const char *name;
699
700 /** set of nir_srcs where this register is used (read from) */
701 struct list_head uses;
702
703 /** set of nir_dests where this register is defined (written to) */
704 struct list_head defs;
705
706 /** set of nir_ifs where this register is used as a condition */
707 struct list_head if_uses;
708 } nir_register;
709
710 #define nir_foreach_register(reg, reg_list) \
711 foreach_list_typed(nir_register, reg, node, reg_list)
712 #define nir_foreach_register_safe(reg, reg_list) \
713 foreach_list_typed_safe(nir_register, reg, node, reg_list)
714
715 typedef enum PACKED {
716 nir_instr_type_alu,
717 nir_instr_type_deref,
718 nir_instr_type_call,
719 nir_instr_type_tex,
720 nir_instr_type_intrinsic,
721 nir_instr_type_load_const,
722 nir_instr_type_jump,
723 nir_instr_type_ssa_undef,
724 nir_instr_type_phi,
725 nir_instr_type_parallel_copy,
726 } nir_instr_type;
727
728 typedef struct nir_instr {
729 struct exec_node node;
730 struct nir_block *block;
731 nir_instr_type type;
732
733 /* A temporary for optimization and analysis passes to use for storing
734 * flags. For instance, DCE uses this to store the "dead/live" info.
735 */
736 uint8_t pass_flags;
737
738 /** generic instruction index. */
739 unsigned index;
740 } nir_instr;
741
742 static inline nir_instr *
743 nir_instr_next(nir_instr *instr)
744 {
745 struct exec_node *next = exec_node_get_next(&instr->node);
746 if (exec_node_is_tail_sentinel(next))
747 return NULL;
748 else
749 return exec_node_data(nir_instr, next, node);
750 }
751
752 static inline nir_instr *
753 nir_instr_prev(nir_instr *instr)
754 {
755 struct exec_node *prev = exec_node_get_prev(&instr->node);
756 if (exec_node_is_head_sentinel(prev))
757 return NULL;
758 else
759 return exec_node_data(nir_instr, prev, node);
760 }
761
762 static inline bool
763 nir_instr_is_first(const nir_instr *instr)
764 {
765 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
766 }
767
768 static inline bool
769 nir_instr_is_last(const nir_instr *instr)
770 {
771 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
772 }
773
774 typedef struct nir_ssa_def {
775 /** for debugging only, can be NULL */
776 const char* name;
777
778 /** generic SSA definition index. */
779 unsigned index;
780
781 /** Ordered SSA definition index used by nir_liveness. */
782 unsigned live_index;
783
784 /** Instruction which produces this SSA value. */
785 nir_instr *parent_instr;
786
787 /** set of nir_instrs where this register is used (read from) */
788 struct list_head uses;
789
790 /** set of nir_ifs where this register is used as a condition */
791 struct list_head if_uses;
792
793 uint8_t num_components;
794
795 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
796 uint8_t bit_size;
797
798 /**
799 * True if this SSA value may have different values in different SIMD
800 * invocations of the shader. This is set by nir_divergence_analysis.
801 */
802 bool divergent;
803 } nir_ssa_def;
804
805 struct nir_src;
806
807 typedef struct {
808 nir_register *reg;
809 struct nir_src *indirect; /** < NULL for no indirect offset */
810 unsigned base_offset;
811
812 /* TODO use-def chain goes here */
813 } nir_reg_src;
814
815 typedef struct {
816 nir_instr *parent_instr;
817 struct list_head def_link;
818
819 nir_register *reg;
820 struct nir_src *indirect; /** < NULL for no indirect offset */
821 unsigned base_offset;
822
823 /* TODO def-use chain goes here */
824 } nir_reg_dest;
825
826 struct nir_if;
827
828 typedef struct nir_src {
829 union {
830 /** Instruction that consumes this value as a source. */
831 nir_instr *parent_instr;
832 struct nir_if *parent_if;
833 };
834
835 struct list_head use_link;
836
837 union {
838 nir_reg_src reg;
839 nir_ssa_def *ssa;
840 };
841
842 bool is_ssa;
843 } nir_src;
844
845 static inline nir_src
846 nir_src_init(void)
847 {
848 nir_src src = { { NULL } };
849 return src;
850 }
851
852 #define NIR_SRC_INIT nir_src_init()
853
854 #define nir_foreach_use(src, reg_or_ssa_def) \
855 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
856
857 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
858 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
859
860 #define nir_foreach_if_use(src, reg_or_ssa_def) \
861 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
862
863 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
864 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
865
866 typedef struct {
867 union {
868 nir_reg_dest reg;
869 nir_ssa_def ssa;
870 };
871
872 bool is_ssa;
873 } nir_dest;
874
875 static inline nir_dest
876 nir_dest_init(void)
877 {
878 nir_dest dest = { { { NULL } } };
879 return dest;
880 }
881
882 #define NIR_DEST_INIT nir_dest_init()
883
884 #define nir_foreach_def(dest, reg) \
885 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
886
887 #define nir_foreach_def_safe(dest, reg) \
888 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
889
890 static inline nir_src
891 nir_src_for_ssa(nir_ssa_def *def)
892 {
893 nir_src src = NIR_SRC_INIT;
894
895 src.is_ssa = true;
896 src.ssa = def;
897
898 return src;
899 }
900
901 static inline nir_src
902 nir_src_for_reg(nir_register *reg)
903 {
904 nir_src src = NIR_SRC_INIT;
905
906 src.is_ssa = false;
907 src.reg.reg = reg;
908 src.reg.indirect = NULL;
909 src.reg.base_offset = 0;
910
911 return src;
912 }
913
914 static inline nir_dest
915 nir_dest_for_reg(nir_register *reg)
916 {
917 nir_dest dest = NIR_DEST_INIT;
918
919 dest.reg.reg = reg;
920
921 return dest;
922 }
923
924 static inline unsigned
925 nir_src_bit_size(nir_src src)
926 {
927 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
928 }
929
930 static inline unsigned
931 nir_src_num_components(nir_src src)
932 {
933 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
934 }
935
936 static inline bool
937 nir_src_is_const(nir_src src)
938 {
939 return src.is_ssa &&
940 src.ssa->parent_instr->type == nir_instr_type_load_const;
941 }
942
943 static inline bool
944 nir_src_is_divergent(nir_src src)
945 {
946 assert(src.is_ssa);
947 return src.ssa->divergent;
948 }
949
950 static inline unsigned
951 nir_dest_bit_size(nir_dest dest)
952 {
953 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
954 }
955
956 static inline unsigned
957 nir_dest_num_components(nir_dest dest)
958 {
959 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
960 }
961
962 static inline bool
963 nir_dest_is_divergent(nir_dest dest)
964 {
965 assert(dest.is_ssa);
966 return dest.ssa.divergent;
967 }
968
969 /* Are all components the same, ie. .xxxx */
970 static inline bool
971 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
972 {
973 for (unsigned i = 1; i < nr_comp; i++)
974 if (swiz[i] != swiz[0])
975 return false;
976 return true;
977 }
978
979 /* Are all components sequential, ie. .yzw */
980 static inline bool
981 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
982 {
983 for (unsigned i = 1; i < nr_comp; i++)
984 if (swiz[i] != (swiz[0] + i))
985 return false;
986 return true;
987 }
988
989 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
990 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
991
992 typedef struct {
993 nir_src src;
994
995 /**
996 * \name input modifiers
997 */
998 /*@{*/
999 /**
1000 * For inputs interpreted as floating point, flips the sign bit. For
1001 * inputs interpreted as integers, performs the two's complement negation.
1002 */
1003 bool negate;
1004
1005 /**
1006 * Clears the sign bit for floating point values, and computes the integer
1007 * absolute value for integers. Note that the negate modifier acts after
1008 * the absolute value modifier, therefore if both are set then all inputs
1009 * will become negative.
1010 */
1011 bool abs;
1012 /*@}*/
1013
1014 /**
1015 * For each input component, says which component of the register it is
1016 * chosen from. Note that which elements of the swizzle are used and which
1017 * are ignored are based on the write mask for most opcodes - for example,
1018 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
1019 * a swizzle of {2, x, 1, 0} where x means "don't care."
1020 */
1021 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
1022 } nir_alu_src;
1023
1024 typedef struct {
1025 nir_dest dest;
1026
1027 /**
1028 * \name saturate output modifier
1029 *
1030 * Only valid for opcodes that output floating-point numbers. Clamps the
1031 * output to between 0.0 and 1.0 inclusive.
1032 */
1033
1034 bool saturate;
1035
1036 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
1037 } nir_alu_dest;
1038
1039 /** NIR sized and unsized types
1040 *
1041 * The values in this enum are carefully chosen so that the sized type is
1042 * just the unsized type OR the number of bits.
1043 */
1044 typedef enum PACKED {
1045 nir_type_invalid = 0, /* Not a valid type */
1046 nir_type_int = 2,
1047 nir_type_uint = 4,
1048 nir_type_bool = 6,
1049 nir_type_float = 128,
1050 nir_type_bool1 = 1 | nir_type_bool,
1051 nir_type_bool8 = 8 | nir_type_bool,
1052 nir_type_bool16 = 16 | nir_type_bool,
1053 nir_type_bool32 = 32 | nir_type_bool,
1054 nir_type_int1 = 1 | nir_type_int,
1055 nir_type_int8 = 8 | nir_type_int,
1056 nir_type_int16 = 16 | nir_type_int,
1057 nir_type_int32 = 32 | nir_type_int,
1058 nir_type_int64 = 64 | nir_type_int,
1059 nir_type_uint1 = 1 | nir_type_uint,
1060 nir_type_uint8 = 8 | nir_type_uint,
1061 nir_type_uint16 = 16 | nir_type_uint,
1062 nir_type_uint32 = 32 | nir_type_uint,
1063 nir_type_uint64 = 64 | nir_type_uint,
1064 nir_type_float16 = 16 | nir_type_float,
1065 nir_type_float32 = 32 | nir_type_float,
1066 nir_type_float64 = 64 | nir_type_float,
1067 } nir_alu_type;
1068
1069 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1070 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1071
1072 static inline unsigned
1073 nir_alu_type_get_type_size(nir_alu_type type)
1074 {
1075 return type & NIR_ALU_TYPE_SIZE_MASK;
1076 }
1077
1078 static inline nir_alu_type
1079 nir_alu_type_get_base_type(nir_alu_type type)
1080 {
1081 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1082 }
1083
1084 static inline nir_alu_type
1085 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1086 {
1087 switch (base_type) {
1088 case GLSL_TYPE_BOOL:
1089 return nir_type_bool1;
1090 break;
1091 case GLSL_TYPE_UINT:
1092 return nir_type_uint32;
1093 break;
1094 case GLSL_TYPE_INT:
1095 return nir_type_int32;
1096 break;
1097 case GLSL_TYPE_UINT16:
1098 return nir_type_uint16;
1099 break;
1100 case GLSL_TYPE_INT16:
1101 return nir_type_int16;
1102 break;
1103 case GLSL_TYPE_UINT8:
1104 return nir_type_uint8;
1105 case GLSL_TYPE_INT8:
1106 return nir_type_int8;
1107 case GLSL_TYPE_UINT64:
1108 return nir_type_uint64;
1109 break;
1110 case GLSL_TYPE_INT64:
1111 return nir_type_int64;
1112 break;
1113 case GLSL_TYPE_FLOAT:
1114 return nir_type_float32;
1115 break;
1116 case GLSL_TYPE_FLOAT16:
1117 return nir_type_float16;
1118 break;
1119 case GLSL_TYPE_DOUBLE:
1120 return nir_type_float64;
1121 break;
1122
1123 case GLSL_TYPE_SAMPLER:
1124 case GLSL_TYPE_IMAGE:
1125 case GLSL_TYPE_ATOMIC_UINT:
1126 case GLSL_TYPE_STRUCT:
1127 case GLSL_TYPE_INTERFACE:
1128 case GLSL_TYPE_ARRAY:
1129 case GLSL_TYPE_VOID:
1130 case GLSL_TYPE_SUBROUTINE:
1131 case GLSL_TYPE_FUNCTION:
1132 case GLSL_TYPE_ERROR:
1133 return nir_type_invalid;
1134 }
1135
1136 unreachable("unknown type");
1137 }
1138
1139 static inline nir_alu_type
1140 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1141 {
1142 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1143 }
1144
1145 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1146 nir_rounding_mode rnd);
1147
1148 static inline nir_op
1149 nir_op_vec(unsigned components)
1150 {
1151 switch (components) {
1152 case 1: return nir_op_mov;
1153 case 2: return nir_op_vec2;
1154 case 3: return nir_op_vec3;
1155 case 4: return nir_op_vec4;
1156 case 8: return nir_op_vec8;
1157 case 16: return nir_op_vec16;
1158 default: unreachable("bad component count");
1159 }
1160 }
1161
1162 static inline bool
1163 nir_op_is_vec(nir_op op)
1164 {
1165 switch (op) {
1166 case nir_op_mov:
1167 case nir_op_vec2:
1168 case nir_op_vec3:
1169 case nir_op_vec4:
1170 case nir_op_vec8:
1171 case nir_op_vec16:
1172 return true;
1173 default:
1174 return false;
1175 }
1176 }
1177
1178 static inline bool
1179 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1180 {
1181 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1182 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1183 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1184 }
1185
1186 static inline bool
1187 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1188 {
1189 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1190 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1191 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1192 }
1193
1194 static inline bool
1195 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1196 {
1197 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1198 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1199 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1200 }
1201
1202 static inline bool
1203 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1204 {
1205 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1206 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1207 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1208 }
1209
1210 static inline bool
1211 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1212 {
1213 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1214 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1215 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1216 }
1217
1218 static inline bool
1219 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1220 {
1221 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1222 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1223 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1224 }
1225
1226 static inline bool
1227 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1228 {
1229 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1230 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1231 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1232 }
1233
1234 static inline nir_rounding_mode
1235 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1236 nir_alu_type type)
1237 {
1238 if (nir_alu_type_get_base_type(type) != nir_type_float)
1239 return nir_rounding_mode_undef;
1240
1241 unsigned bit_size = nir_alu_type_get_type_size(type);
1242
1243 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1244 return nir_rounding_mode_rtz;
1245 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1246 return nir_rounding_mode_rtne;
1247 return nir_rounding_mode_undef;
1248 }
1249
1250 static inline bool
1251 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1252 {
1253 bool result =
1254 nir_has_any_rounding_mode_rtne(execution_mode) ||
1255 nir_has_any_rounding_mode_rtz(execution_mode);
1256 return result;
1257 }
1258
1259 typedef enum {
1260 /**
1261 * Operation where the first two sources are commutative.
1262 *
1263 * For 2-source operations, this just mathematical commutativity. Some
1264 * 3-source operations, like ffma, are only commutative in the first two
1265 * sources.
1266 */
1267 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1268 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1269 } nir_op_algebraic_property;
1270
1271 typedef struct {
1272 const char *name;
1273
1274 uint8_t num_inputs;
1275
1276 /**
1277 * The number of components in the output
1278 *
1279 * If non-zero, this is the size of the output and input sizes are
1280 * explicitly given; swizzle and writemask are still in effect, but if
1281 * the output component is masked out, then the input component may
1282 * still be in use.
1283 *
1284 * If zero, the opcode acts in the standard, per-component manner; the
1285 * operation is performed on each component (except the ones that are
1286 * masked out) with the input being taken from the input swizzle for
1287 * that component.
1288 *
1289 * The size of some of the inputs may be given (i.e. non-zero) even
1290 * though output_size is zero; in that case, the inputs with a zero
1291 * size act per-component, while the inputs with non-zero size don't.
1292 */
1293 uint8_t output_size;
1294
1295 /**
1296 * The type of vector that the instruction outputs. Note that the
1297 * staurate modifier is only allowed on outputs with the float type.
1298 */
1299
1300 nir_alu_type output_type;
1301
1302 /**
1303 * The number of components in each input
1304 */
1305 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1306
1307 /**
1308 * The type of vector that each input takes. Note that negate and
1309 * absolute value are only allowed on inputs with int or float type and
1310 * behave differently on the two.
1311 */
1312 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1313
1314 nir_op_algebraic_property algebraic_properties;
1315
1316 /* Whether this represents a numeric conversion opcode */
1317 bool is_conversion;
1318 } nir_op_info;
1319
1320 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1321
1322 typedef struct nir_alu_instr {
1323 nir_instr instr;
1324 nir_op op;
1325
1326 /** Indicates that this ALU instruction generates an exact value
1327 *
1328 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1329 * really equivalent to either. This indicates that the value generated by
1330 * this operation is high-precision and any code transformations that touch
1331 * it must ensure that the resulting value is bit-for-bit identical to the
1332 * original.
1333 */
1334 bool exact:1;
1335
1336 /**
1337 * Indicates that this instruction do not cause wrapping to occur, in the
1338 * form of overflow or underflow.
1339 */
1340 bool no_signed_wrap:1;
1341 bool no_unsigned_wrap:1;
1342
1343 nir_alu_dest dest;
1344 nir_alu_src src[];
1345 } nir_alu_instr;
1346
1347 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1348 nir_alu_instr *instr);
1349 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1350 nir_alu_instr *instr);
1351
1352 /* is this source channel used? */
1353 static inline bool
1354 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1355 unsigned channel)
1356 {
1357 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1358 return channel < nir_op_infos[instr->op].input_sizes[src];
1359
1360 return (instr->dest.write_mask >> channel) & 1;
1361 }
1362
1363 static inline nir_component_mask_t
1364 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1365 {
1366 nir_component_mask_t read_mask = 0;
1367 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1368 if (!nir_alu_instr_channel_used(instr, src, c))
1369 continue;
1370
1371 read_mask |= (1 << instr->src[src].swizzle[c]);
1372 }
1373 return read_mask;
1374 }
1375
1376 /**
1377 * Get the number of channels used for a source
1378 */
1379 static inline unsigned
1380 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1381 {
1382 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1383 return nir_op_infos[instr->op].input_sizes[src];
1384
1385 return nir_dest_num_components(instr->dest.dest);
1386 }
1387
1388 static inline bool
1389 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1390 {
1391 switch (instr->op) {
1392 case nir_op_flt:
1393 case nir_op_fge:
1394 case nir_op_feq:
1395 case nir_op_fneu:
1396 case nir_op_ilt:
1397 case nir_op_ult:
1398 case nir_op_ige:
1399 case nir_op_uge:
1400 case nir_op_ieq:
1401 case nir_op_ine:
1402 case nir_op_i2b1:
1403 case nir_op_f2b1:
1404 case nir_op_inot:
1405 return true;
1406 default:
1407 return false;
1408 }
1409 }
1410
1411 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1412 nir_alu_type full_type);
1413
1414 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1415 unsigned src1, unsigned src2);
1416
1417 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1418 const nir_alu_instr *alu2,
1419 unsigned src1, unsigned src2);
1420
1421 typedef enum {
1422 nir_deref_type_var,
1423 nir_deref_type_array,
1424 nir_deref_type_array_wildcard,
1425 nir_deref_type_ptr_as_array,
1426 nir_deref_type_struct,
1427 nir_deref_type_cast,
1428 } nir_deref_type;
1429
1430 typedef struct {
1431 nir_instr instr;
1432
1433 /** The type of this deref instruction */
1434 nir_deref_type deref_type;
1435
1436 /** The mode of the underlying variable */
1437 nir_variable_mode mode;
1438
1439 /** The dereferenced type of the resulting pointer value */
1440 const struct glsl_type *type;
1441
1442 union {
1443 /** Variable being dereferenced if deref_type is a deref_var */
1444 nir_variable *var;
1445
1446 /** Parent deref if deref_type is not deref_var */
1447 nir_src parent;
1448 };
1449
1450 /** Additional deref parameters */
1451 union {
1452 struct {
1453 nir_src index;
1454 } arr;
1455
1456 struct {
1457 unsigned index;
1458 } strct;
1459
1460 struct {
1461 unsigned ptr_stride;
1462 } cast;
1463 };
1464
1465 /** Destination to store the resulting "pointer" */
1466 nir_dest dest;
1467 } nir_deref_instr;
1468
1469 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1470
1471 static inline nir_deref_instr *
1472 nir_deref_instr_parent(const nir_deref_instr *instr)
1473 {
1474 if (instr->deref_type == nir_deref_type_var)
1475 return NULL;
1476 else
1477 return nir_src_as_deref(instr->parent);
1478 }
1479
1480 static inline nir_variable *
1481 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1482 {
1483 while (instr->deref_type != nir_deref_type_var) {
1484 if (instr->deref_type == nir_deref_type_cast)
1485 return NULL;
1486
1487 instr = nir_deref_instr_parent(instr);
1488 }
1489
1490 return instr->var;
1491 }
1492
1493 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1494 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1495 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1496
1497 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1498
1499 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1500
1501 typedef struct {
1502 nir_instr instr;
1503
1504 struct nir_function *callee;
1505
1506 unsigned num_params;
1507 nir_src params[];
1508 } nir_call_instr;
1509
1510 #include "nir_intrinsics.h"
1511
1512 #define NIR_INTRINSIC_MAX_CONST_INDEX 5
1513
1514 /** Represents an intrinsic
1515 *
1516 * An intrinsic is an instruction type for handling things that are
1517 * more-or-less regular operations but don't just consume and produce SSA
1518 * values like ALU operations do. Intrinsics are not for things that have
1519 * special semantic meaning such as phi nodes and parallel copies.
1520 * Examples of intrinsics include variable load/store operations, system
1521 * value loads, and the like. Even though texturing more-or-less falls
1522 * under this category, texturing is its own instruction type because
1523 * trying to represent texturing with intrinsics would lead to a
1524 * combinatorial explosion of intrinsic opcodes.
1525 *
1526 * By having a single instruction type for handling a lot of different
1527 * cases, optimization passes can look for intrinsics and, for the most
1528 * part, completely ignore them. Each intrinsic type also has a few
1529 * possible flags that govern whether or not they can be reordered or
1530 * eliminated. That way passes like dead code elimination can still work
1531 * on intrisics without understanding the meaning of each.
1532 *
1533 * Each intrinsic has some number of constant indices, some number of
1534 * variables, and some number of sources. What these sources, variables,
1535 * and indices mean depends on the intrinsic and is documented with the
1536 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1537 * instructions are the only types of instruction that can operate on
1538 * variables.
1539 */
1540 typedef struct {
1541 nir_instr instr;
1542
1543 nir_intrinsic_op intrinsic;
1544
1545 nir_dest dest;
1546
1547 /** number of components if this is a vectorized intrinsic
1548 *
1549 * Similarly to ALU operations, some intrinsics are vectorized.
1550 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1551 * For vectorized intrinsics, the num_components field specifies the
1552 * number of destination components and the number of source components
1553 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1554 */
1555 uint8_t num_components;
1556
1557 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1558
1559 nir_src src[];
1560 } nir_intrinsic_instr;
1561
1562 static inline nir_variable *
1563 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1564 {
1565 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1566 }
1567
1568 typedef enum {
1569 /* Memory ordering. */
1570 NIR_MEMORY_ACQUIRE = 1 << 0,
1571 NIR_MEMORY_RELEASE = 1 << 1,
1572 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1573
1574 /* Memory visibility operations. */
1575 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1576 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1577 } nir_memory_semantics;
1578
1579 typedef enum {
1580 NIR_SCOPE_NONE,
1581 NIR_SCOPE_INVOCATION,
1582 NIR_SCOPE_SUBGROUP,
1583 NIR_SCOPE_WORKGROUP,
1584 NIR_SCOPE_QUEUE_FAMILY,
1585 NIR_SCOPE_DEVICE,
1586 } nir_scope;
1587
1588 /**
1589 * \name NIR intrinsics semantic flags
1590 *
1591 * information about what the compiler can do with the intrinsics.
1592 *
1593 * \sa nir_intrinsic_info::flags
1594 */
1595 typedef enum {
1596 /**
1597 * whether the intrinsic can be safely eliminated if none of its output
1598 * value is not being used.
1599 */
1600 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1601
1602 /**
1603 * Whether the intrinsic can be reordered with respect to any other
1604 * intrinsic, i.e. whether the only reordering dependencies of the
1605 * intrinsic are due to the register reads/writes.
1606 */
1607 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1608 } nir_intrinsic_semantic_flag;
1609
1610 /**
1611 * \name NIR intrinsics const-index flag
1612 *
1613 * Indicates the usage of a const_index slot.
1614 *
1615 * \sa nir_intrinsic_info::index_map
1616 */
1617 typedef enum {
1618 /**
1619 * Generally instructions that take a offset src argument, can encode
1620 * a constant 'base' value which is added to the offset.
1621 */
1622 NIR_INTRINSIC_BASE = 1,
1623
1624 /**
1625 * For store instructions, a writemask for the store.
1626 */
1627 NIR_INTRINSIC_WRMASK,
1628
1629 /**
1630 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1631 */
1632 NIR_INTRINSIC_STREAM_ID,
1633
1634 /**
1635 * The clip-plane id for load_user_clip_plane intrinsic.
1636 */
1637 NIR_INTRINSIC_UCP_ID,
1638
1639 /**
1640 * The amount of data, starting from BASE, that this instruction may
1641 * access. This is used to provide bounds if the offset is not constant.
1642 */
1643 NIR_INTRINSIC_RANGE,
1644
1645 /**
1646 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1647 */
1648 NIR_INTRINSIC_DESC_SET,
1649
1650 /**
1651 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1652 */
1653 NIR_INTRINSIC_BINDING,
1654
1655 /**
1656 * Component offset.
1657 */
1658 NIR_INTRINSIC_COMPONENT,
1659
1660 /**
1661 * Interpolation mode (only meaningful for FS inputs).
1662 */
1663 NIR_INTRINSIC_INTERP_MODE,
1664
1665 /**
1666 * A binary nir_op to use when performing a reduction or scan operation
1667 */
1668 NIR_INTRINSIC_REDUCTION_OP,
1669
1670 /**
1671 * Cluster size for reduction operations
1672 */
1673 NIR_INTRINSIC_CLUSTER_SIZE,
1674
1675 /**
1676 * Parameter index for a load_param intrinsic
1677 */
1678 NIR_INTRINSIC_PARAM_IDX,
1679
1680 /**
1681 * Image dimensionality for image intrinsics
1682 *
1683 * One of GLSL_SAMPLER_DIM_*
1684 */
1685 NIR_INTRINSIC_IMAGE_DIM,
1686
1687 /**
1688 * Non-zero if we are accessing an array image
1689 */
1690 NIR_INTRINSIC_IMAGE_ARRAY,
1691
1692 /**
1693 * Image format for image intrinsics
1694 */
1695 NIR_INTRINSIC_FORMAT,
1696
1697 /**
1698 * Access qualifiers for image and memory access intrinsics
1699 */
1700 NIR_INTRINSIC_ACCESS,
1701
1702 /**
1703 * Alignment for offsets and addresses
1704 *
1705 * These two parameters, specify an alignment in terms of a multiplier and
1706 * an offset. The offset or address parameter X of the intrinsic is
1707 * guaranteed to satisfy the following:
1708 *
1709 * (X - align_offset) % align_mul == 0
1710 */
1711 NIR_INTRINSIC_ALIGN_MUL,
1712 NIR_INTRINSIC_ALIGN_OFFSET,
1713
1714 /**
1715 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1716 */
1717 NIR_INTRINSIC_DESC_TYPE,
1718
1719 /**
1720 * The nir_alu_type of a uniform/input/output
1721 */
1722 NIR_INTRINSIC_TYPE,
1723
1724 /**
1725 * The swizzle mask for the instructions
1726 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1727 */
1728 NIR_INTRINSIC_SWIZZLE_MASK,
1729
1730 /* Separate source/dest access flags for copies */
1731 NIR_INTRINSIC_SRC_ACCESS,
1732 NIR_INTRINSIC_DST_ACCESS,
1733
1734 /* Driver location for nir_load_patch_location_ir3 */
1735 NIR_INTRINSIC_DRIVER_LOCATION,
1736
1737 /**
1738 * Mask of nir_memory_semantics, includes ordering and visibility.
1739 */
1740 NIR_INTRINSIC_MEMORY_SEMANTICS,
1741
1742 /**
1743 * Mask of nir_variable_modes affected by the memory operation.
1744 */
1745 NIR_INTRINSIC_MEMORY_MODES,
1746
1747 /**
1748 * Value of nir_scope.
1749 */
1750 NIR_INTRINSIC_MEMORY_SCOPE,
1751
1752 /**
1753 * Value of nir_scope.
1754 */
1755 NIR_INTRINSIC_EXECUTION_SCOPE,
1756
1757 /**
1758 * Value of nir_io_semantics.
1759 */
1760 NIR_INTRINSIC_IO_SEMANTICS,
1761
1762 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1763
1764 } nir_intrinsic_index_flag;
1765
1766 typedef struct {
1767 unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
1768 unsigned num_slots:6; /* max 32, may be pessimistic with const indexing */
1769 unsigned dual_source_blend_index:1;
1770 unsigned fb_fetch_output:1; /* for GL_KHR_blend_equation_advanced */
1771 unsigned gs_streams:8; /* xxyyzzww: 2-bit stream index for each component */
1772 unsigned _pad:9;
1773 } nir_io_semantics;
1774
1775 #define NIR_INTRINSIC_MAX_INPUTS 5
1776
1777 typedef struct {
1778 const char *name;
1779
1780 uint8_t num_srcs; /** < number of register/SSA inputs */
1781
1782 /** number of components of each input register
1783 *
1784 * If this value is 0, the number of components is given by the
1785 * num_components field of nir_intrinsic_instr. If this value is -1, the
1786 * intrinsic consumes however many components are provided and it is not
1787 * validated at all.
1788 */
1789 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1790
1791 bool has_dest;
1792
1793 /** number of components of the output register
1794 *
1795 * If this value is 0, the number of components is given by the
1796 * num_components field of nir_intrinsic_instr.
1797 */
1798 uint8_t dest_components;
1799
1800 /** bitfield of legal bit sizes */
1801 uint8_t dest_bit_sizes;
1802
1803 /** the number of constant indices used by the intrinsic */
1804 uint8_t num_indices;
1805
1806 /** indicates the usage of intr->const_index[n] */
1807 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1808
1809 /** semantic flags for calls to this intrinsic */
1810 nir_intrinsic_semantic_flag flags;
1811 } nir_intrinsic_info;
1812
1813 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1814
1815 static inline unsigned
1816 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1817 {
1818 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1819 assert(srcn < info->num_srcs);
1820 if (info->src_components[srcn] > 0)
1821 return info->src_components[srcn];
1822 else if (info->src_components[srcn] == 0)
1823 return intr->num_components;
1824 else
1825 return nir_src_num_components(intr->src[srcn]);
1826 }
1827
1828 static inline unsigned
1829 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1830 {
1831 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1832 if (!info->has_dest)
1833 return 0;
1834 else if (info->dest_components)
1835 return info->dest_components;
1836 else
1837 return intr->num_components;
1838 }
1839
1840 /**
1841 * Helper to copy const_index[] from src to dst, without assuming they
1842 * match in order.
1843 */
1844 static inline void
1845 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1846 {
1847 if (src->intrinsic == dst->intrinsic) {
1848 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1849 return;
1850 }
1851
1852 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1853 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1854
1855 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1856 if (src_info->index_map[i] == 0)
1857 continue;
1858
1859 /* require that dst instruction also uses the same const_index[]: */
1860 assert(dst_info->index_map[i] > 0);
1861
1862 dst->const_index[dst_info->index_map[i] - 1] =
1863 src->const_index[src_info->index_map[i] - 1];
1864 }
1865 }
1866
1867 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1868 static inline type \
1869 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1870 { \
1871 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1872 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1873 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1874 } \
1875 static inline void \
1876 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1877 { \
1878 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1879 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1880 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1881 } \
1882 static inline bool \
1883 nir_intrinsic_has_##name(nir_intrinsic_instr *instr) \
1884 { \
1885 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1886 return info->index_map[NIR_INTRINSIC_##flag] > 0; \
1887 }
1888
1889 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1890 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1891 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1892 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1893 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1894 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1895 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1896 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1897 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1898 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1899 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1900 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1901 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1902 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1903 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1904 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1905 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1906 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1907 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1908 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1909 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1910 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1911 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1912 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1913 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1914 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1915 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1916 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1917
1918 static inline void
1919 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1920 unsigned align_mul, unsigned align_offset)
1921 {
1922 assert(util_is_power_of_two_nonzero(align_mul));
1923 assert(align_offset < align_mul);
1924 nir_intrinsic_set_align_mul(intrin, align_mul);
1925 nir_intrinsic_set_align_offset(intrin, align_offset);
1926 }
1927
1928 /** Returns a simple alignment for a load/store intrinsic offset
1929 *
1930 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1931 * and ALIGN_OFFSET parameters, this helper takes both into account and
1932 * provides a single simple alignment parameter. The offset X is guaranteed
1933 * to satisfy X % align == 0.
1934 */
1935 static inline unsigned
1936 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1937 {
1938 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1939 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1940 assert(align_offset < align_mul);
1941 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1942 }
1943
1944 static inline void
1945 nir_intrinsic_set_io_semantics(nir_intrinsic_instr *intrin,
1946 nir_io_semantics semantics)
1947 {
1948 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1949 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1950 STATIC_ASSERT(sizeof(nir_io_semantics) == sizeof(intrin->const_index[0]));
1951 semantics._pad = 0; /* clear padding bits */
1952 memcpy(&intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1953 &semantics, sizeof(semantics));
1954 }
1955
1956 static inline nir_io_semantics
1957 nir_intrinsic_io_semantics(const nir_intrinsic_instr *intrin)
1958 {
1959 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1960 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1961 nir_io_semantics semantics;
1962 memcpy(&semantics,
1963 &intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1964 sizeof(semantics));
1965 return semantics;
1966 }
1967
1968 unsigned
1969 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1970
1971 /* Converts a image_deref_* intrinsic into a image_* one */
1972 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1973 nir_ssa_def *handle, bool bindless);
1974
1975 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1976 static inline bool
1977 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1978 {
1979 if (instr->intrinsic == nir_intrinsic_load_deref ||
1980 instr->intrinsic == nir_intrinsic_load_ssbo ||
1981 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1982 instr->intrinsic == nir_intrinsic_image_deref_load ||
1983 instr->intrinsic == nir_intrinsic_image_load) {
1984 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1985 } else {
1986 const nir_intrinsic_info *info =
1987 &nir_intrinsic_infos[instr->intrinsic];
1988 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1989 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1990 }
1991 }
1992
1993 /**
1994 * \group texture information
1995 *
1996 * This gives semantic information about textures which is useful to the
1997 * frontend, the backend, and lowering passes, but not the optimizer.
1998 */
1999
2000 typedef enum {
2001 nir_tex_src_coord,
2002 nir_tex_src_projector,
2003 nir_tex_src_comparator, /* shadow comparator */
2004 nir_tex_src_offset,
2005 nir_tex_src_bias,
2006 nir_tex_src_lod,
2007 nir_tex_src_min_lod,
2008 nir_tex_src_ms_index, /* MSAA sample index */
2009 nir_tex_src_ms_mcs, /* MSAA compression value */
2010 nir_tex_src_ddx,
2011 nir_tex_src_ddy,
2012 nir_tex_src_texture_deref, /* < deref pointing to the texture */
2013 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
2014 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
2015 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
2016 nir_tex_src_texture_handle, /* < bindless texture handle */
2017 nir_tex_src_sampler_handle, /* < bindless sampler handle */
2018 nir_tex_src_plane, /* < selects plane for planar textures */
2019 nir_num_tex_src_types
2020 } nir_tex_src_type;
2021
2022 typedef struct {
2023 nir_src src;
2024 nir_tex_src_type src_type;
2025 } nir_tex_src;
2026
2027 typedef enum {
2028 nir_texop_tex, /**< Regular texture look-up */
2029 nir_texop_txb, /**< Texture look-up with LOD bias */
2030 nir_texop_txl, /**< Texture look-up with explicit LOD */
2031 nir_texop_txd, /**< Texture look-up with partial derivatives */
2032 nir_texop_txf, /**< Texel fetch with explicit LOD */
2033 nir_texop_txf_ms, /**< Multisample texture fetch */
2034 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
2035 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
2036 nir_texop_txs, /**< Texture size */
2037 nir_texop_lod, /**< Texture lod query */
2038 nir_texop_tg4, /**< Texture gather */
2039 nir_texop_query_levels, /**< Texture levels query */
2040 nir_texop_texture_samples, /**< Texture samples query */
2041 nir_texop_samples_identical, /**< Query whether all samples are definitely
2042 * identical.
2043 */
2044 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
2045 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
2046 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
2047 } nir_texop;
2048
2049 typedef struct {
2050 nir_instr instr;
2051
2052 enum glsl_sampler_dim sampler_dim;
2053 nir_alu_type dest_type;
2054
2055 nir_texop op;
2056 nir_dest dest;
2057 nir_tex_src *src;
2058 unsigned num_srcs, coord_components;
2059 bool is_array, is_shadow;
2060
2061 /**
2062 * If is_shadow is true, whether this is the old-style shadow that outputs 4
2063 * components or the new-style shadow that outputs 1 component.
2064 */
2065 bool is_new_style_shadow;
2066
2067 /* gather component selector */
2068 unsigned component : 2;
2069
2070 /* gather offsets */
2071 int8_t tg4_offsets[4][2];
2072
2073 /* True if the texture index or handle is not dynamically uniform */
2074 bool texture_non_uniform;
2075
2076 /* True if the sampler index or handle is not dynamically uniform */
2077 bool sampler_non_uniform;
2078
2079 /** The texture index
2080 *
2081 * If this texture instruction has a nir_tex_src_texture_offset source,
2082 * then the texture index is given by texture_index + texture_offset.
2083 */
2084 unsigned texture_index;
2085
2086 /** The sampler index
2087 *
2088 * The following operations do not require a sampler and, as such, this
2089 * field should be ignored:
2090 * - nir_texop_txf
2091 * - nir_texop_txf_ms
2092 * - nir_texop_txs
2093 * - nir_texop_lod
2094 * - nir_texop_query_levels
2095 * - nir_texop_texture_samples
2096 * - nir_texop_samples_identical
2097 *
2098 * If this texture instruction has a nir_tex_src_sampler_offset source,
2099 * then the sampler index is given by sampler_index + sampler_offset.
2100 */
2101 unsigned sampler_index;
2102 } nir_tex_instr;
2103
2104 /*
2105 * Returns true if the texture operation requires a sampler as a general rule,
2106 * see the documentation of sampler_index.
2107 *
2108 * Note that the specific hw/driver backend could require to a sampler
2109 * object/configuration packet in any case, for some other reason.
2110 */
2111 static inline bool
2112 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2113 {
2114 switch (instr->op) {
2115 case nir_texop_txf:
2116 case nir_texop_txf_ms:
2117 case nir_texop_txs:
2118 case nir_texop_lod:
2119 case nir_texop_query_levels:
2120 case nir_texop_texture_samples:
2121 case nir_texop_samples_identical:
2122 return false;
2123 default:
2124 return true;
2125 }
2126 }
2127
2128 static inline unsigned
2129 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2130 {
2131 switch (instr->op) {
2132 case nir_texop_txs: {
2133 unsigned ret;
2134 switch (instr->sampler_dim) {
2135 case GLSL_SAMPLER_DIM_1D:
2136 case GLSL_SAMPLER_DIM_BUF:
2137 ret = 1;
2138 break;
2139 case GLSL_SAMPLER_DIM_2D:
2140 case GLSL_SAMPLER_DIM_CUBE:
2141 case GLSL_SAMPLER_DIM_MS:
2142 case GLSL_SAMPLER_DIM_RECT:
2143 case GLSL_SAMPLER_DIM_EXTERNAL:
2144 case GLSL_SAMPLER_DIM_SUBPASS:
2145 ret = 2;
2146 break;
2147 case GLSL_SAMPLER_DIM_3D:
2148 ret = 3;
2149 break;
2150 default:
2151 unreachable("not reached");
2152 }
2153 if (instr->is_array)
2154 ret++;
2155 return ret;
2156 }
2157
2158 case nir_texop_lod:
2159 return 2;
2160
2161 case nir_texop_texture_samples:
2162 case nir_texop_query_levels:
2163 case nir_texop_samples_identical:
2164 case nir_texop_fragment_mask_fetch:
2165 return 1;
2166
2167 default:
2168 if (instr->is_shadow && instr->is_new_style_shadow)
2169 return 1;
2170
2171 return 4;
2172 }
2173 }
2174
2175 /* Returns true if this texture operation queries something about the texture
2176 * rather than actually sampling it.
2177 */
2178 static inline bool
2179 nir_tex_instr_is_query(const nir_tex_instr *instr)
2180 {
2181 switch (instr->op) {
2182 case nir_texop_txs:
2183 case nir_texop_lod:
2184 case nir_texop_texture_samples:
2185 case nir_texop_query_levels:
2186 case nir_texop_txf_ms_mcs:
2187 return true;
2188 case nir_texop_tex:
2189 case nir_texop_txb:
2190 case nir_texop_txl:
2191 case nir_texop_txd:
2192 case nir_texop_txf:
2193 case nir_texop_txf_ms:
2194 case nir_texop_txf_ms_fb:
2195 case nir_texop_tg4:
2196 return false;
2197 default:
2198 unreachable("Invalid texture opcode");
2199 }
2200 }
2201
2202 static inline bool
2203 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2204 {
2205 switch (instr->op) {
2206 case nir_texop_tex:
2207 case nir_texop_txb:
2208 case nir_texop_lod:
2209 return true;
2210 default:
2211 return false;
2212 }
2213 }
2214
2215 static inline nir_alu_type
2216 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2217 {
2218 switch (instr->src[src].src_type) {
2219 case nir_tex_src_coord:
2220 switch (instr->op) {
2221 case nir_texop_txf:
2222 case nir_texop_txf_ms:
2223 case nir_texop_txf_ms_fb:
2224 case nir_texop_txf_ms_mcs:
2225 case nir_texop_samples_identical:
2226 return nir_type_int;
2227
2228 default:
2229 return nir_type_float;
2230 }
2231
2232 case nir_tex_src_lod:
2233 switch (instr->op) {
2234 case nir_texop_txs:
2235 case nir_texop_txf:
2236 return nir_type_int;
2237
2238 default:
2239 return nir_type_float;
2240 }
2241
2242 case nir_tex_src_projector:
2243 case nir_tex_src_comparator:
2244 case nir_tex_src_bias:
2245 case nir_tex_src_min_lod:
2246 case nir_tex_src_ddx:
2247 case nir_tex_src_ddy:
2248 return nir_type_float;
2249
2250 case nir_tex_src_offset:
2251 case nir_tex_src_ms_index:
2252 case nir_tex_src_plane:
2253 return nir_type_int;
2254
2255 case nir_tex_src_ms_mcs:
2256 case nir_tex_src_texture_deref:
2257 case nir_tex_src_sampler_deref:
2258 case nir_tex_src_texture_offset:
2259 case nir_tex_src_sampler_offset:
2260 case nir_tex_src_texture_handle:
2261 case nir_tex_src_sampler_handle:
2262 return nir_type_uint;
2263
2264 case nir_num_tex_src_types:
2265 unreachable("nir_num_tex_src_types is not a valid source type");
2266 }
2267
2268 unreachable("Invalid texture source type");
2269 }
2270
2271 static inline unsigned
2272 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2273 {
2274 if (instr->src[src].src_type == nir_tex_src_coord)
2275 return instr->coord_components;
2276
2277 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2278 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2279 return 4;
2280
2281 if (instr->src[src].src_type == nir_tex_src_ddx ||
2282 instr->src[src].src_type == nir_tex_src_ddy) {
2283 if (instr->is_array)
2284 return instr->coord_components - 1;
2285 else
2286 return instr->coord_components;
2287 }
2288
2289 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2290 * the offset, since a cube maps to a single face.
2291 */
2292 if (instr->src[src].src_type == nir_tex_src_offset) {
2293 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2294 return 2;
2295 else if (instr->is_array)
2296 return instr->coord_components - 1;
2297 else
2298 return instr->coord_components;
2299 }
2300
2301 return 1;
2302 }
2303
2304 static inline int
2305 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2306 {
2307 for (unsigned i = 0; i < instr->num_srcs; i++)
2308 if (instr->src[i].src_type == type)
2309 return (int) i;
2310
2311 return -1;
2312 }
2313
2314 void nir_tex_instr_add_src(nir_tex_instr *tex,
2315 nir_tex_src_type src_type,
2316 nir_src src);
2317
2318 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2319
2320 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2321
2322 typedef struct {
2323 nir_instr instr;
2324
2325 nir_ssa_def def;
2326
2327 nir_const_value value[];
2328 } nir_load_const_instr;
2329
2330 typedef enum {
2331 /** Return from a function
2332 *
2333 * This instruction is a classic function return. It jumps to
2334 * nir_function_impl::end_block. No return value is provided in this
2335 * instruction. Instead, the function is expected to write any return
2336 * data to a deref passed in from the caller.
2337 */
2338 nir_jump_return,
2339
2340 /** Break out of the inner-most loop
2341 *
2342 * This has the same semantics as C's "break" statement.
2343 */
2344 nir_jump_break,
2345
2346 /** Jump back to the top of the inner-most loop
2347 *
2348 * This has the same semantics as C's "continue" statement assuming that a
2349 * NIR loop is implemented as "while (1) { body }".
2350 */
2351 nir_jump_continue,
2352
2353 /** Jumps for unstructured CFG.
2354 *
2355 * As within an unstructured CFG we can't rely on block ordering we need to
2356 * place explicit jumps at the end of every block.
2357 */
2358 nir_jump_goto,
2359 nir_jump_goto_if,
2360 } nir_jump_type;
2361
2362 typedef struct {
2363 nir_instr instr;
2364 nir_jump_type type;
2365 nir_src condition;
2366 struct nir_block *target;
2367 struct nir_block *else_target;
2368 } nir_jump_instr;
2369
2370 /* creates a new SSA variable in an undefined state */
2371
2372 typedef struct {
2373 nir_instr instr;
2374 nir_ssa_def def;
2375 } nir_ssa_undef_instr;
2376
2377 typedef struct {
2378 struct exec_node node;
2379
2380 /* The predecessor block corresponding to this source */
2381 struct nir_block *pred;
2382
2383 nir_src src;
2384 } nir_phi_src;
2385
2386 #define nir_foreach_phi_src(phi_src, phi) \
2387 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2388 #define nir_foreach_phi_src_safe(phi_src, phi) \
2389 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2390
2391 typedef struct {
2392 nir_instr instr;
2393
2394 struct exec_list srcs; /** < list of nir_phi_src */
2395
2396 nir_dest dest;
2397 } nir_phi_instr;
2398
2399 typedef struct {
2400 struct exec_node node;
2401 nir_src src;
2402 nir_dest dest;
2403 } nir_parallel_copy_entry;
2404
2405 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2406 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2407
2408 typedef struct {
2409 nir_instr instr;
2410
2411 /* A list of nir_parallel_copy_entrys. The sources of all of the
2412 * entries are copied to the corresponding destinations "in parallel".
2413 * In other words, if we have two entries: a -> b and b -> a, the values
2414 * get swapped.
2415 */
2416 struct exec_list entries;
2417 } nir_parallel_copy_instr;
2418
2419 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2420 type, nir_instr_type_alu)
2421 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2422 type, nir_instr_type_deref)
2423 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2424 type, nir_instr_type_call)
2425 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2426 type, nir_instr_type_jump)
2427 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2428 type, nir_instr_type_tex)
2429 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2430 type, nir_instr_type_intrinsic)
2431 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2432 type, nir_instr_type_load_const)
2433 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2434 type, nir_instr_type_ssa_undef)
2435 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2436 type, nir_instr_type_phi)
2437 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2438 nir_parallel_copy_instr, instr,
2439 type, nir_instr_type_parallel_copy)
2440
2441
2442 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2443 static inline type \
2444 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2445 { \
2446 assert(nir_src_is_const(src)); \
2447 nir_load_const_instr *load = \
2448 nir_instr_as_load_const(src.ssa->parent_instr); \
2449 assert(comp < load->def.num_components); \
2450 return nir_const_value_as_##suffix(load->value[comp], \
2451 load->def.bit_size); \
2452 } \
2453 \
2454 static inline type \
2455 nir_src_as_##suffix(nir_src src) \
2456 { \
2457 assert(nir_src_num_components(src) == 1); \
2458 return nir_src_comp_as_##suffix(src, 0); \
2459 }
2460
2461 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2462 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2463 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2464 NIR_DEFINE_SRC_AS_CONST(double, float)
2465
2466 #undef NIR_DEFINE_SRC_AS_CONST
2467
2468
2469 typedef struct {
2470 nir_ssa_def *def;
2471 unsigned comp;
2472 } nir_ssa_scalar;
2473
2474 static inline bool
2475 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2476 {
2477 return s.def->parent_instr->type == nir_instr_type_load_const;
2478 }
2479
2480 static inline nir_const_value
2481 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2482 {
2483 assert(s.comp < s.def->num_components);
2484 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2485 return load->value[s.comp];
2486 }
2487
2488 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2489 static inline type \
2490 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2491 { \
2492 return nir_const_value_as_##suffix( \
2493 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2494 }
2495
2496 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2497 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2498 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2499 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2500
2501 #undef NIR_DEFINE_SCALAR_AS_CONST
2502
2503 static inline bool
2504 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2505 {
2506 return s.def->parent_instr->type == nir_instr_type_alu;
2507 }
2508
2509 static inline nir_op
2510 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2511 {
2512 return nir_instr_as_alu(s.def->parent_instr)->op;
2513 }
2514
2515 static inline nir_ssa_scalar
2516 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2517 {
2518 nir_ssa_scalar out = { NULL, 0 };
2519
2520 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2521 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2522
2523 /* Our component must be written */
2524 assert(s.comp < s.def->num_components);
2525 assert(alu->dest.write_mask & (1u << s.comp));
2526
2527 assert(alu->src[alu_src_idx].src.is_ssa);
2528 out.def = alu->src[alu_src_idx].src.ssa;
2529
2530 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2531 /* The ALU src is unsized so the source component follows the
2532 * destination component.
2533 */
2534 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2535 } else {
2536 /* This is a sized source so all source components work together to
2537 * produce all the destination components. Since we need to return a
2538 * scalar, this only works if the source is a scalar.
2539 */
2540 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2541 out.comp = alu->src[alu_src_idx].swizzle[0];
2542 }
2543 assert(out.comp < out.def->num_components);
2544
2545 return out;
2546 }
2547
2548
2549 /*
2550 * Control flow
2551 *
2552 * Control flow consists of a tree of control flow nodes, which include
2553 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2554 * instructions that always run start-to-finish. Each basic block also keeps
2555 * track of its successors (blocks which may run immediately after the current
2556 * block) and predecessors (blocks which could have run immediately before the
2557 * current block). Each function also has a start block and an end block which
2558 * all return statements point to (which is always empty). Together, all the
2559 * blocks with their predecessors and successors make up the control flow
2560 * graph (CFG) of the function. There are helpers that modify the tree of
2561 * control flow nodes while modifying the CFG appropriately; these should be
2562 * used instead of modifying the tree directly.
2563 */
2564
2565 typedef enum {
2566 nir_cf_node_block,
2567 nir_cf_node_if,
2568 nir_cf_node_loop,
2569 nir_cf_node_function
2570 } nir_cf_node_type;
2571
2572 typedef struct nir_cf_node {
2573 struct exec_node node;
2574 nir_cf_node_type type;
2575 struct nir_cf_node *parent;
2576 } nir_cf_node;
2577
2578 typedef struct nir_block {
2579 nir_cf_node cf_node;
2580
2581 struct exec_list instr_list; /** < list of nir_instr */
2582
2583 /** generic block index; generated by nir_index_blocks */
2584 unsigned index;
2585
2586 /*
2587 * Each block can only have up to 2 successors, so we put them in a simple
2588 * array - no need for anything more complicated.
2589 */
2590 struct nir_block *successors[2];
2591
2592 /* Set of nir_block predecessors in the CFG */
2593 struct set *predecessors;
2594
2595 /*
2596 * this node's immediate dominator in the dominance tree - set to NULL for
2597 * the start block.
2598 */
2599 struct nir_block *imm_dom;
2600
2601 /* This node's children in the dominance tree */
2602 unsigned num_dom_children;
2603 struct nir_block **dom_children;
2604
2605 /* Set of nir_blocks on the dominance frontier of this block */
2606 struct set *dom_frontier;
2607
2608 /*
2609 * These two indices have the property that dom_{pre,post}_index for each
2610 * child of this block in the dominance tree will always be between
2611 * dom_pre_index and dom_post_index for this block, which makes testing if
2612 * a given block is dominated by another block an O(1) operation.
2613 */
2614 int16_t dom_pre_index, dom_post_index;
2615
2616 /* SSA def live in and out for this block; used for liveness analysis.
2617 * Indexed by ssa_def->index
2618 */
2619 BITSET_WORD *live_in;
2620 BITSET_WORD *live_out;
2621 } nir_block;
2622
2623 static inline bool
2624 nir_block_is_reachable(nir_block *b)
2625 {
2626 /* See also nir_block_dominates */
2627 return b->dom_post_index != -1;
2628 }
2629
2630 static inline nir_instr *
2631 nir_block_first_instr(nir_block *block)
2632 {
2633 struct exec_node *head = exec_list_get_head(&block->instr_list);
2634 return exec_node_data(nir_instr, head, node);
2635 }
2636
2637 static inline nir_instr *
2638 nir_block_last_instr(nir_block *block)
2639 {
2640 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2641 return exec_node_data(nir_instr, tail, node);
2642 }
2643
2644 static inline bool
2645 nir_block_ends_in_jump(nir_block *block)
2646 {
2647 return !exec_list_is_empty(&block->instr_list) &&
2648 nir_block_last_instr(block)->type == nir_instr_type_jump;
2649 }
2650
2651 #define nir_foreach_instr(instr, block) \
2652 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2653 #define nir_foreach_instr_reverse(instr, block) \
2654 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2655 #define nir_foreach_instr_safe(instr, block) \
2656 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2657 #define nir_foreach_instr_reverse_safe(instr, block) \
2658 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2659
2660 typedef enum {
2661 nir_selection_control_none = 0x0,
2662 nir_selection_control_flatten = 0x1,
2663 nir_selection_control_dont_flatten = 0x2,
2664 } nir_selection_control;
2665
2666 typedef struct nir_if {
2667 nir_cf_node cf_node;
2668 nir_src condition;
2669 nir_selection_control control;
2670
2671 struct exec_list then_list; /** < list of nir_cf_node */
2672 struct exec_list else_list; /** < list of nir_cf_node */
2673 } nir_if;
2674
2675 typedef struct {
2676 nir_if *nif;
2677
2678 /** Instruction that generates nif::condition. */
2679 nir_instr *conditional_instr;
2680
2681 /** Block within ::nif that has the break instruction. */
2682 nir_block *break_block;
2683
2684 /** Last block for the then- or else-path that does not contain the break. */
2685 nir_block *continue_from_block;
2686
2687 /** True when ::break_block is in the else-path of ::nif. */
2688 bool continue_from_then;
2689 bool induction_rhs;
2690
2691 /* This is true if the terminators exact trip count is unknown. For
2692 * example:
2693 *
2694 * for (int i = 0; i < imin(x, 4); i++)
2695 * ...
2696 *
2697 * Here loop analysis would have set a max_trip_count of 4 however we dont
2698 * know for sure that this is the exact trip count.
2699 */
2700 bool exact_trip_count_unknown;
2701
2702 struct list_head loop_terminator_link;
2703 } nir_loop_terminator;
2704
2705 typedef struct {
2706 /* Estimated cost (in number of instructions) of the loop */
2707 unsigned instr_cost;
2708
2709 /* Guessed trip count based on array indexing */
2710 unsigned guessed_trip_count;
2711
2712 /* Maximum number of times the loop is run (if known) */
2713 unsigned max_trip_count;
2714
2715 /* Do we know the exact number of times the loop will be run */
2716 bool exact_trip_count_known;
2717
2718 /* Unroll the loop regardless of its size */
2719 bool force_unroll;
2720
2721 /* Does the loop contain complex loop terminators, continues or other
2722 * complex behaviours? If this is true we can't rely on
2723 * loop_terminator_list to be complete or accurate.
2724 */
2725 bool complex_loop;
2726
2727 nir_loop_terminator *limiting_terminator;
2728
2729 /* A list of loop_terminators terminating this loop. */
2730 struct list_head loop_terminator_list;
2731 } nir_loop_info;
2732
2733 typedef enum {
2734 nir_loop_control_none = 0x0,
2735 nir_loop_control_unroll = 0x1,
2736 nir_loop_control_dont_unroll = 0x2,
2737 } nir_loop_control;
2738
2739 typedef struct {
2740 nir_cf_node cf_node;
2741
2742 struct exec_list body; /** < list of nir_cf_node */
2743
2744 nir_loop_info *info;
2745 nir_loop_control control;
2746 bool partially_unrolled;
2747 } nir_loop;
2748
2749 /**
2750 * Various bits of metadata that can may be created or required by
2751 * optimization and analysis passes
2752 */
2753 typedef enum {
2754 nir_metadata_none = 0x0,
2755
2756 /** Indicates that nir_block::index values are valid.
2757 *
2758 * The start block has index 0 and they increase through a natural walk of
2759 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2760 * every block index is in the range [0, nir_function_impl::num_blocks].
2761 *
2762 * A pass can preserve this metadata type if it doesn't touch the CFG.
2763 */
2764 nir_metadata_block_index = 0x1,
2765
2766 /** Indicates that block dominance information is valid
2767 *
2768 * This includes:
2769 *
2770 * - nir_block::num_dom_children
2771 * - nir_block::dom_children
2772 * - nir_block::dom_frontier
2773 * - nir_block::dom_pre_index
2774 * - nir_block::dom_post_index
2775 *
2776 * A pass can preserve this metadata type if it doesn't touch the CFG.
2777 */
2778 nir_metadata_dominance = 0x2,
2779
2780 /** Indicates that SSA def data-flow liveness information is valid
2781 *
2782 * This includes:
2783 *
2784 * - nir_ssa_def::live_index
2785 * - nir_block::live_in
2786 * - nir_block::live_out
2787 *
2788 * A pass can preserve this metadata type if it never adds or removes any
2789 * SSA defs (most passes shouldn't preserve this metadata type).
2790 */
2791 nir_metadata_live_ssa_defs = 0x4,
2792
2793 /** A dummy metadata value to track when a pass forgot to call
2794 * nir_metadata_preserve.
2795 *
2796 * A pass should always clear this value even if it doesn't make any
2797 * progress to indicate that it thought about preserving metadata.
2798 */
2799 nir_metadata_not_properly_reset = 0x8,
2800
2801 /** Indicates that loop analysis information is valid.
2802 *
2803 * This includes everything pointed to by nir_loop::info.
2804 *
2805 * A pass can preserve this metadata type if it is guaranteed to not affect
2806 * any loop metadata. However, since loop metadata includes things like
2807 * loop counts which depend on arithmetic in the loop, this is very hard to
2808 * determine. Most passes shouldn't preserve this metadata type.
2809 */
2810 nir_metadata_loop_analysis = 0x10,
2811
2812 /** All metadata
2813 *
2814 * This includes all nir_metadata flags except not_properly_reset. Passes
2815 * which do not change the shader in any way should call
2816 *
2817 * nir_metadata_preserve(impl, nir_metadata_all);
2818 */
2819 nir_metadata_all = ~nir_metadata_not_properly_reset,
2820 } nir_metadata;
2821
2822 typedef struct {
2823 nir_cf_node cf_node;
2824
2825 /** pointer to the function of which this is an implementation */
2826 struct nir_function *function;
2827
2828 struct exec_list body; /** < list of nir_cf_node */
2829
2830 nir_block *end_block;
2831
2832 /** list for all local variables in the function */
2833 struct exec_list locals;
2834
2835 /** list of local registers in the function */
2836 struct exec_list registers;
2837
2838 /** next available local register index */
2839 unsigned reg_alloc;
2840
2841 /** next available SSA value index */
2842 unsigned ssa_alloc;
2843
2844 /* total number of basic blocks, only valid when block_index_dirty = false */
2845 unsigned num_blocks;
2846
2847 /** True if this nir_function_impl uses structured control-flow
2848 *
2849 * Structured nir_function_impls have different validation rules.
2850 */
2851 bool structured;
2852
2853 nir_metadata valid_metadata;
2854 } nir_function_impl;
2855
2856 #define nir_foreach_function_temp_variable(var, impl) \
2857 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2858
2859 #define nir_foreach_function_temp_variable_safe(var, impl) \
2860 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2861
2862 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2863 nir_start_block(nir_function_impl *impl)
2864 {
2865 return (nir_block *) impl->body.head_sentinel.next;
2866 }
2867
2868 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2869 nir_impl_last_block(nir_function_impl *impl)
2870 {
2871 return (nir_block *) impl->body.tail_sentinel.prev;
2872 }
2873
2874 static inline nir_cf_node *
2875 nir_cf_node_next(nir_cf_node *node)
2876 {
2877 struct exec_node *next = exec_node_get_next(&node->node);
2878 if (exec_node_is_tail_sentinel(next))
2879 return NULL;
2880 else
2881 return exec_node_data(nir_cf_node, next, node);
2882 }
2883
2884 static inline nir_cf_node *
2885 nir_cf_node_prev(nir_cf_node *node)
2886 {
2887 struct exec_node *prev = exec_node_get_prev(&node->node);
2888 if (exec_node_is_head_sentinel(prev))
2889 return NULL;
2890 else
2891 return exec_node_data(nir_cf_node, prev, node);
2892 }
2893
2894 static inline bool
2895 nir_cf_node_is_first(const nir_cf_node *node)
2896 {
2897 return exec_node_is_head_sentinel(node->node.prev);
2898 }
2899
2900 static inline bool
2901 nir_cf_node_is_last(const nir_cf_node *node)
2902 {
2903 return exec_node_is_tail_sentinel(node->node.next);
2904 }
2905
2906 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2907 type, nir_cf_node_block)
2908 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2909 type, nir_cf_node_if)
2910 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2911 type, nir_cf_node_loop)
2912 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2913 nir_function_impl, cf_node, type, nir_cf_node_function)
2914
2915 static inline nir_block *
2916 nir_if_first_then_block(nir_if *if_stmt)
2917 {
2918 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2919 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2920 }
2921
2922 static inline nir_block *
2923 nir_if_last_then_block(nir_if *if_stmt)
2924 {
2925 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2926 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2927 }
2928
2929 static inline nir_block *
2930 nir_if_first_else_block(nir_if *if_stmt)
2931 {
2932 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2933 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2934 }
2935
2936 static inline nir_block *
2937 nir_if_last_else_block(nir_if *if_stmt)
2938 {
2939 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2940 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2941 }
2942
2943 static inline nir_block *
2944 nir_loop_first_block(nir_loop *loop)
2945 {
2946 struct exec_node *head = exec_list_get_head(&loop->body);
2947 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2948 }
2949
2950 static inline nir_block *
2951 nir_loop_last_block(nir_loop *loop)
2952 {
2953 struct exec_node *tail = exec_list_get_tail(&loop->body);
2954 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2955 }
2956
2957 /**
2958 * Return true if this list of cf_nodes contains a single empty block.
2959 */
2960 static inline bool
2961 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2962 {
2963 if (exec_list_is_singular(cf_list)) {
2964 struct exec_node *head = exec_list_get_head(cf_list);
2965 nir_block *block =
2966 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2967 return exec_list_is_empty(&block->instr_list);
2968 }
2969 return false;
2970 }
2971
2972 typedef struct {
2973 uint8_t num_components;
2974 uint8_t bit_size;
2975 } nir_parameter;
2976
2977 typedef struct nir_function {
2978 struct exec_node node;
2979
2980 const char *name;
2981 struct nir_shader *shader;
2982
2983 unsigned num_params;
2984 nir_parameter *params;
2985
2986 /** The implementation of this function.
2987 *
2988 * If the function is only declared and not implemented, this is NULL.
2989 */
2990 nir_function_impl *impl;
2991
2992 bool is_entrypoint;
2993 } nir_function;
2994
2995 typedef enum {
2996 nir_lower_imul64 = (1 << 0),
2997 nir_lower_isign64 = (1 << 1),
2998 /** Lower all int64 modulus and division opcodes */
2999 nir_lower_divmod64 = (1 << 2),
3000 /** Lower all 64-bit umul_high and imul_high opcodes */
3001 nir_lower_imul_high64 = (1 << 3),
3002 nir_lower_mov64 = (1 << 4),
3003 nir_lower_icmp64 = (1 << 5),
3004 nir_lower_iadd64 = (1 << 6),
3005 nir_lower_iabs64 = (1 << 7),
3006 nir_lower_ineg64 = (1 << 8),
3007 nir_lower_logic64 = (1 << 9),
3008 nir_lower_minmax64 = (1 << 10),
3009 nir_lower_shift64 = (1 << 11),
3010 nir_lower_imul_2x32_64 = (1 << 12),
3011 nir_lower_extract64 = (1 << 13),
3012 nir_lower_ufind_msb64 = (1 << 14),
3013 nir_lower_bit_count64 = (1 << 15),
3014 } nir_lower_int64_options;
3015
3016 typedef enum {
3017 nir_lower_drcp = (1 << 0),
3018 nir_lower_dsqrt = (1 << 1),
3019 nir_lower_drsq = (1 << 2),
3020 nir_lower_dtrunc = (1 << 3),
3021 nir_lower_dfloor = (1 << 4),
3022 nir_lower_dceil = (1 << 5),
3023 nir_lower_dfract = (1 << 6),
3024 nir_lower_dround_even = (1 << 7),
3025 nir_lower_dmod = (1 << 8),
3026 nir_lower_dsub = (1 << 9),
3027 nir_lower_ddiv = (1 << 10),
3028 nir_lower_fp64_full_software = (1 << 11),
3029 } nir_lower_doubles_options;
3030
3031 typedef enum {
3032 nir_divergence_single_prim_per_subgroup = (1 << 0),
3033 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
3034 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
3035 nir_divergence_view_index_uniform = (1 << 3),
3036 } nir_divergence_options;
3037
3038 typedef struct nir_shader_compiler_options {
3039 bool lower_fdiv;
3040 bool lower_ffma;
3041 bool fuse_ffma;
3042 bool lower_flrp16;
3043 bool lower_flrp32;
3044 /** Lowers flrp when it does not support doubles */
3045 bool lower_flrp64;
3046 bool lower_fpow;
3047 bool lower_fsat;
3048 bool lower_fsqrt;
3049 bool lower_sincos;
3050 bool lower_fmod;
3051 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
3052 bool lower_bitfield_extract;
3053 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
3054 bool lower_bitfield_extract_to_shifts;
3055 /** Lowers bitfield_insert to bfi/bfm */
3056 bool lower_bitfield_insert;
3057 /** Lowers bitfield_insert to compares, and shifts. */
3058 bool lower_bitfield_insert_to_shifts;
3059 /** Lowers bitfield_insert to bfm/bitfield_select. */
3060 bool lower_bitfield_insert_to_bitfield_select;
3061 /** Lowers bitfield_reverse to shifts. */
3062 bool lower_bitfield_reverse;
3063 /** Lowers bit_count to shifts. */
3064 bool lower_bit_count;
3065 /** Lowers ifind_msb to compare and ufind_msb */
3066 bool lower_ifind_msb;
3067 /** Lowers find_lsb to ufind_msb and logic ops */
3068 bool lower_find_lsb;
3069 bool lower_uadd_carry;
3070 bool lower_usub_borrow;
3071 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
3072 bool lower_mul_high;
3073 /** lowers fneg and ineg to fsub and isub. */
3074 bool lower_negate;
3075 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
3076 bool lower_sub;
3077
3078 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fneu} + b2f: */
3079 bool lower_scmp;
3080
3081 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
3082 bool lower_vector_cmp;
3083
3084 /** enables rules to lower idiv by power-of-two: */
3085 bool lower_idiv;
3086
3087 /** enable rules to avoid bit ops */
3088 bool lower_bitops;
3089
3090 /** enables rules to lower isign to imin+imax */
3091 bool lower_isign;
3092
3093 /** enables rules to lower fsign to fsub and flt */
3094 bool lower_fsign;
3095
3096 /** enables rules to lower iabs to ineg+imax */
3097 bool lower_iabs;
3098
3099 /* lower fdph to fdot4 */
3100 bool lower_fdph;
3101
3102 /** lower fdot to fmul and fsum/fadd. */
3103 bool lower_fdot;
3104
3105 /* Does the native fdot instruction replicate its result for four
3106 * components? If so, then opt_algebraic_late will turn all fdotN
3107 * instructions into fdot_replicatedN instructions.
3108 */
3109 bool fdot_replicates;
3110
3111 /** lowers ffloor to fsub+ffract: */
3112 bool lower_ffloor;
3113
3114 /** lowers ffract to fsub+ffloor: */
3115 bool lower_ffract;
3116
3117 /** lowers fceil to fneg+ffloor+fneg: */
3118 bool lower_fceil;
3119
3120 bool lower_ftrunc;
3121
3122 bool lower_ldexp;
3123
3124 bool lower_pack_half_2x16;
3125 bool lower_pack_unorm_2x16;
3126 bool lower_pack_snorm_2x16;
3127 bool lower_pack_unorm_4x8;
3128 bool lower_pack_snorm_4x8;
3129 bool lower_pack_64_2x32_split;
3130 bool lower_pack_32_2x16_split;
3131 bool lower_unpack_half_2x16;
3132 bool lower_unpack_unorm_2x16;
3133 bool lower_unpack_snorm_2x16;
3134 bool lower_unpack_unorm_4x8;
3135 bool lower_unpack_snorm_4x8;
3136 bool lower_unpack_64_2x32_split;
3137 bool lower_unpack_32_2x16_split;
3138
3139 bool lower_pack_split;
3140
3141 bool lower_extract_byte;
3142 bool lower_extract_word;
3143
3144 bool lower_all_io_to_temps;
3145 bool lower_all_io_to_elements;
3146
3147 /* Indicates that the driver only has zero-based vertex id */
3148 bool vertex_id_zero_based;
3149
3150 /**
3151 * If enabled, gl_BaseVertex will be lowered as:
3152 * is_indexed_draw (~0/0) & firstvertex
3153 */
3154 bool lower_base_vertex;
3155
3156 /**
3157 * If enabled, gl_HelperInvocation will be lowered as:
3158 *
3159 * !((1 << sample_id) & sample_mask_in))
3160 *
3161 * This depends on some possibly hw implementation details, which may
3162 * not be true for all hw. In particular that the FS is only executed
3163 * for covered samples or for helper invocations. So, do not blindly
3164 * enable this option.
3165 *
3166 * Note: See also issue #22 in ARB_shader_image_load_store
3167 */
3168 bool lower_helper_invocation;
3169
3170 /**
3171 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3172 *
3173 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3174 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3175 */
3176 bool optimize_sample_mask_in;
3177
3178 bool lower_cs_local_index_from_id;
3179 bool lower_cs_local_id_from_index;
3180
3181 /* Prevents lowering global_invocation_id to be in terms of work_group_id */
3182 bool has_cs_global_id;
3183
3184 bool lower_device_index_to_zero;
3185
3186 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3187 bool lower_wpos_pntc;
3188
3189 /**
3190 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3191 * lowered to simple arithmetic.
3192 *
3193 * If this flag is set, the lowering will be applied to all bit-sizes of
3194 * these instructions.
3195 *
3196 * \sa ::lower_hadd64
3197 */
3198 bool lower_hadd;
3199
3200 /**
3201 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3202 * should be lowered to simple arithmetic.
3203 *
3204 * If this flag is set, the lowering will be applied to only 64-bit
3205 * versions of these instructions.
3206 *
3207 * \sa ::lower_hadd
3208 */
3209 bool lower_hadd64;
3210
3211 /**
3212 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3213 * arithmetic.
3214 *
3215 * If this flag is set, the lowering will be applied to all bit-sizes of
3216 * these instructions.
3217 *
3218 * \sa ::lower_usub_sat64
3219 */
3220 bool lower_add_sat;
3221
3222 /**
3223 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3224 * arithmetic.
3225 *
3226 * \sa ::lower_add_sat
3227 */
3228 bool lower_usub_sat64;
3229
3230 /**
3231 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3232 * for IO purposes and would prefer loads/stores be vectorized.
3233 */
3234 bool vectorize_io;
3235 bool lower_to_scalar;
3236
3237 /**
3238 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3239 */
3240 bool vectorize_vec2_16bit;
3241
3242 /**
3243 * Should the linker unify inputs_read/outputs_written between adjacent
3244 * shader stages which are linked into a single program?
3245 */
3246 bool unify_interfaces;
3247
3248 /**
3249 * Should nir_lower_io() create load_interpolated_input intrinsics?
3250 *
3251 * If not, it generates regular load_input intrinsics and interpolation
3252 * information must be inferred from the list of input nir_variables.
3253 */
3254 bool use_interpolated_input_intrinsics;
3255
3256 /* Lowers when 32x32->64 bit multiplication is not supported */
3257 bool lower_mul_2x32_64;
3258
3259 /* Lowers when rotate instruction is not supported */
3260 bool lower_rotate;
3261
3262 /**
3263 * Backend supports imul24, and would like to use it (when possible)
3264 * for address/offset calculation. If true, driver should call
3265 * nir_lower_amul(). (If not set, amul will automatically be lowered
3266 * to imul.)
3267 */
3268 bool has_imul24;
3269
3270 /** Backend supports umul24, if not set umul24 will automatically be lowered
3271 * to imul with masked inputs */
3272 bool has_umul24;
3273
3274 /** Backend supports umad24, if not set umad24 will automatically be lowered
3275 * to imul with masked inputs and iadd */
3276 bool has_umad24;
3277
3278 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3279 * memory and control barrier intrinsics based on GLSL.
3280 */
3281 bool use_scoped_barrier;
3282
3283 /**
3284 * Is this the Intel vec4 backend?
3285 *
3286 * Used to inhibit algebraic optimizations that are known to be harmful on
3287 * the Intel vec4 backend. This is generally applicable to any
3288 * optimization that might cause more immediate values to be used in
3289 * 3-source (e.g., ffma and flrp) instructions.
3290 */
3291 bool intel_vec4;
3292
3293 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3294 bool lower_bfe_with_two_constants;
3295
3296 /** Whether 8-bit ALU is supported. */
3297 bool support_8bit_alu;
3298
3299 /** Whether 16-bit ALU is supported. */
3300 bool support_16bit_alu;
3301
3302 unsigned max_unroll_iterations;
3303
3304 nir_lower_int64_options lower_int64_options;
3305 nir_lower_doubles_options lower_doubles_options;
3306 } nir_shader_compiler_options;
3307
3308 typedef struct nir_shader {
3309 /** list of uniforms (nir_variable) */
3310 struct exec_list variables;
3311
3312 /** Set of driver-specific options for the shader.
3313 *
3314 * The memory for the options is expected to be kept in a single static
3315 * copy by the driver.
3316 */
3317 const struct nir_shader_compiler_options *options;
3318
3319 /** Various bits of compile-time information about a given shader */
3320 struct shader_info info;
3321
3322 struct exec_list functions; /** < list of nir_function */
3323
3324 /**
3325 * The size of the variable space for load_input_*, load_uniform_*, etc.
3326 * intrinsics. This is in back-end specific units which is likely one of
3327 * bytes, dwords, or vec4s depending on context and back-end.
3328 */
3329 unsigned num_inputs, num_uniforms, num_outputs;
3330
3331 /** Size in bytes of required shared memory */
3332 unsigned shared_size;
3333
3334 /** Size in bytes of required scratch space */
3335 unsigned scratch_size;
3336
3337 /** Constant data associated with this shader.
3338 *
3339 * Constant data is loaded through load_constant intrinsics (as compared to
3340 * the NIR load_const instructions which have the constant value inlined
3341 * into them). This is usually generated by nir_opt_large_constants (so
3342 * shaders don't have to load_const into a temporary array when they want
3343 * to indirect on a const array).
3344 */
3345 void *constant_data;
3346 /** Size of the constant data associated with the shader, in bytes */
3347 unsigned constant_data_size;
3348 } nir_shader;
3349
3350 #define nir_foreach_function(func, shader) \
3351 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3352
3353 static inline nir_function_impl *
3354 nir_shader_get_entrypoint(nir_shader *shader)
3355 {
3356 nir_function *func = NULL;
3357
3358 nir_foreach_function(function, shader) {
3359 assert(func == NULL);
3360 if (function->is_entrypoint) {
3361 func = function;
3362 #ifndef NDEBUG
3363 break;
3364 #endif
3365 }
3366 }
3367
3368 if (!func)
3369 return NULL;
3370
3371 assert(func->num_params == 0);
3372 assert(func->impl);
3373 return func->impl;
3374 }
3375
3376 nir_shader *nir_shader_create(void *mem_ctx,
3377 gl_shader_stage stage,
3378 const nir_shader_compiler_options *options,
3379 shader_info *si);
3380
3381 nir_register *nir_local_reg_create(nir_function_impl *impl);
3382
3383 void nir_reg_remove(nir_register *reg);
3384
3385 /** Adds a variable to the appropriate list in nir_shader */
3386 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3387
3388 static inline void
3389 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3390 {
3391 assert(var->data.mode == nir_var_function_temp);
3392 exec_list_push_tail(&impl->locals, &var->node);
3393 }
3394
3395 /** creates a variable, sets a few defaults, and adds it to the list */
3396 nir_variable *nir_variable_create(nir_shader *shader,
3397 nir_variable_mode mode,
3398 const struct glsl_type *type,
3399 const char *name);
3400 /** creates a local variable and adds it to the list */
3401 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3402 const struct glsl_type *type,
3403 const char *name);
3404
3405 nir_variable *nir_find_variable_with_location(nir_shader *shader,
3406 nir_variable_mode mode,
3407 unsigned location);
3408
3409 nir_variable *nir_find_variable_with_driver_location(nir_shader *shader,
3410 nir_variable_mode mode,
3411 unsigned location);
3412
3413 /** creates a function and adds it to the shader's list of functions */
3414 nir_function *nir_function_create(nir_shader *shader, const char *name);
3415
3416 nir_function_impl *nir_function_impl_create(nir_function *func);
3417 /** creates a function_impl that isn't tied to any particular function */
3418 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3419
3420 nir_block *nir_block_create(nir_shader *shader);
3421 nir_if *nir_if_create(nir_shader *shader);
3422 nir_loop *nir_loop_create(nir_shader *shader);
3423
3424 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3425
3426 /** requests that the given pieces of metadata be generated */
3427 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3428 /** dirties all but the preserved metadata */
3429 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3430 /** Preserves all metadata for the given shader */
3431 void nir_shader_preserve_all_metadata(nir_shader *shader);
3432
3433 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3434 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3435
3436 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3437 nir_deref_type deref_type);
3438
3439 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3440
3441 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3442 unsigned num_components,
3443 unsigned bit_size);
3444
3445 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3446 nir_intrinsic_op op);
3447
3448 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3449 nir_function *callee);
3450
3451 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3452
3453 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3454
3455 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3456
3457 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3458 unsigned num_components,
3459 unsigned bit_size);
3460
3461 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3462
3463 /**
3464 * NIR Cursors and Instruction Insertion API
3465 * @{
3466 *
3467 * A tiny struct representing a point to insert/extract instructions or
3468 * control flow nodes. Helps reduce the combinatorial explosion of possible
3469 * points to insert/extract.
3470 *
3471 * \sa nir_control_flow.h
3472 */
3473 typedef enum {
3474 nir_cursor_before_block,
3475 nir_cursor_after_block,
3476 nir_cursor_before_instr,
3477 nir_cursor_after_instr,
3478 } nir_cursor_option;
3479
3480 typedef struct {
3481 nir_cursor_option option;
3482 union {
3483 nir_block *block;
3484 nir_instr *instr;
3485 };
3486 } nir_cursor;
3487
3488 static inline nir_block *
3489 nir_cursor_current_block(nir_cursor cursor)
3490 {
3491 if (cursor.option == nir_cursor_before_instr ||
3492 cursor.option == nir_cursor_after_instr) {
3493 return cursor.instr->block;
3494 } else {
3495 return cursor.block;
3496 }
3497 }
3498
3499 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3500
3501 static inline nir_cursor
3502 nir_before_block(nir_block *block)
3503 {
3504 nir_cursor cursor;
3505 cursor.option = nir_cursor_before_block;
3506 cursor.block = block;
3507 return cursor;
3508 }
3509
3510 static inline nir_cursor
3511 nir_after_block(nir_block *block)
3512 {
3513 nir_cursor cursor;
3514 cursor.option = nir_cursor_after_block;
3515 cursor.block = block;
3516 return cursor;
3517 }
3518
3519 static inline nir_cursor
3520 nir_before_instr(nir_instr *instr)
3521 {
3522 nir_cursor cursor;
3523 cursor.option = nir_cursor_before_instr;
3524 cursor.instr = instr;
3525 return cursor;
3526 }
3527
3528 static inline nir_cursor
3529 nir_after_instr(nir_instr *instr)
3530 {
3531 nir_cursor cursor;
3532 cursor.option = nir_cursor_after_instr;
3533 cursor.instr = instr;
3534 return cursor;
3535 }
3536
3537 static inline nir_cursor
3538 nir_after_block_before_jump(nir_block *block)
3539 {
3540 nir_instr *last_instr = nir_block_last_instr(block);
3541 if (last_instr && last_instr->type == nir_instr_type_jump) {
3542 return nir_before_instr(last_instr);
3543 } else {
3544 return nir_after_block(block);
3545 }
3546 }
3547
3548 static inline nir_cursor
3549 nir_before_src(nir_src *src, bool is_if_condition)
3550 {
3551 if (is_if_condition) {
3552 nir_block *prev_block =
3553 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3554 assert(!nir_block_ends_in_jump(prev_block));
3555 return nir_after_block(prev_block);
3556 } else if (src->parent_instr->type == nir_instr_type_phi) {
3557 #ifndef NDEBUG
3558 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3559 bool found = false;
3560 nir_foreach_phi_src(phi_src, cond_phi) {
3561 if (phi_src->src.ssa == src->ssa) {
3562 found = true;
3563 break;
3564 }
3565 }
3566 assert(found);
3567 #endif
3568 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3569 * to have a more specific name.
3570 */
3571 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3572 return nir_after_block_before_jump(phi_src->pred);
3573 } else {
3574 return nir_before_instr(src->parent_instr);
3575 }
3576 }
3577
3578 static inline nir_cursor
3579 nir_before_cf_node(nir_cf_node *node)
3580 {
3581 if (node->type == nir_cf_node_block)
3582 return nir_before_block(nir_cf_node_as_block(node));
3583
3584 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3585 }
3586
3587 static inline nir_cursor
3588 nir_after_cf_node(nir_cf_node *node)
3589 {
3590 if (node->type == nir_cf_node_block)
3591 return nir_after_block(nir_cf_node_as_block(node));
3592
3593 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3594 }
3595
3596 static inline nir_cursor
3597 nir_after_phis(nir_block *block)
3598 {
3599 nir_foreach_instr(instr, block) {
3600 if (instr->type != nir_instr_type_phi)
3601 return nir_before_instr(instr);
3602 }
3603 return nir_after_block(block);
3604 }
3605
3606 static inline nir_cursor
3607 nir_after_cf_node_and_phis(nir_cf_node *node)
3608 {
3609 if (node->type == nir_cf_node_block)
3610 return nir_after_block(nir_cf_node_as_block(node));
3611
3612 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3613
3614 return nir_after_phis(block);
3615 }