2 * Copyright © 2014 Connor Abbott
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/enum_operators.h"
40 #include "util/macros.h"
41 #include "util/format/u_format.h"
42 #include "compiler/nir_types.h"
43 #include "compiler/shader_enums.h"
44 #include "compiler/shader_info.h"
45 #define XXH_INLINE_ALL
46 #include "util/xxhash.h"
50 #include "util/debug.h"
53 #include "nir_opcodes.h"
55 #if defined(_WIN32) && !defined(snprintf)
56 #define snprintf _snprintf
64 #define NIR_TRUE (~0u)
65 #define NIR_MAX_VEC_COMPONENTS 16
66 #define NIR_MAX_MATRIX_COLUMNS 4
67 #define NIR_STREAM_PACKED (1 << 8)
68 typedef uint16_t nir_component_mask_t
;
71 nir_num_components_valid(unsigned num_components
)
73 return (num_components
>= 1 &&
74 num_components
<= 4) ||
75 num_components
== 8 ||
79 /** Defines a cast function
81 * This macro defines a cast function from in_type to out_type where
82 * out_type is some structure type that contains a field of type out_type.
84 * Note that you have to be a bit careful as the generated cast function
87 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
88 type_field, type_value) \
89 static inline out_type * \
90 name(const in_type *parent) \
92 assert(parent && parent->type_field == type_value); \
93 return exec_node_data(out_type, parent, field); \
103 * Description of built-in state associated with a uniform
105 * \sa nir_variable::state_slots
108 gl_state_index16 tokens
[STATE_LENGTH
];
113 nir_var_shader_in
= (1 << 0),
114 nir_var_shader_out
= (1 << 1),
115 nir_var_shader_temp
= (1 << 2),
116 nir_var_function_temp
= (1 << 3),
117 nir_var_uniform
= (1 << 4),
118 nir_var_mem_ubo
= (1 << 5),
119 nir_var_system_value
= (1 << 6),
120 nir_var_mem_ssbo
= (1 << 7),
121 nir_var_mem_shared
= (1 << 8),
122 nir_var_mem_global
= (1 << 9),
123 nir_var_mem_push_const
= (1 << 10), /* not actually used for variables */
124 nir_num_variable_modes
= 11,
125 nir_var_all
= (1 << nir_num_variable_modes
) - 1,
127 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_variable_mode
)
133 nir_rounding_mode_undef
= 0,
134 nir_rounding_mode_rtne
= 1, /* round to nearest even */
135 nir_rounding_mode_ru
= 2, /* round up */
136 nir_rounding_mode_rd
= 3, /* round down */
137 nir_rounding_mode_rtz
= 4, /* round towards zero */
154 #define nir_const_value_to_array(arr, c, components, m) \
156 for (unsigned i = 0; i < components; ++i) \
160 static inline nir_const_value
161 nir_const_value_for_raw_uint(uint64_t x
, unsigned bit_size
)
164 memset(&v
, 0, sizeof(v
));
167 case 1: v
.b
= x
; break;
168 case 8: v
.u8
= x
; break;
169 case 16: v
.u16
= x
; break;
170 case 32: v
.u32
= x
; break;
171 case 64: v
.u64
= x
; break;
173 unreachable("Invalid bit size");
179 static inline nir_const_value
180 nir_const_value_for_int(int64_t i
, unsigned bit_size
)
183 memset(&v
, 0, sizeof(v
));
185 assert(bit_size
<= 64);
187 assert(i
>= (-(1ll << (bit_size
- 1))));
188 assert(i
< (1ll << (bit_size
- 1)));
191 return nir_const_value_for_raw_uint(i
, bit_size
);
194 static inline nir_const_value
195 nir_const_value_for_uint(uint64_t u
, unsigned bit_size
)
198 memset(&v
, 0, sizeof(v
));
200 assert(bit_size
<= 64);
202 assert(u
< (1ull << bit_size
));
204 return nir_const_value_for_raw_uint(u
, bit_size
);
207 static inline nir_const_value
208 nir_const_value_for_bool(bool b
, unsigned bit_size
)
210 /* Booleans use a 0/-1 convention */
211 return nir_const_value_for_int(-(int)b
, bit_size
);
214 /* This one isn't inline because it requires half-float conversion */
215 nir_const_value
nir_const_value_for_float(double b
, unsigned bit_size
);
217 static inline int64_t
218 nir_const_value_as_int(nir_const_value value
, unsigned bit_size
)
221 /* int1_t uses 0/-1 convention */
222 case 1: return -(int)value
.b
;
223 case 8: return value
.i8
;
224 case 16: return value
.i16
;
225 case 32: return value
.i32
;
226 case 64: return value
.i64
;
228 unreachable("Invalid bit size");
232 static inline uint64_t
233 nir_const_value_as_uint(nir_const_value value
, unsigned bit_size
)
236 case 1: return value
.b
;
237 case 8: return value
.u8
;
238 case 16: return value
.u16
;
239 case 32: return value
.u32
;
240 case 64: return value
.u64
;
242 unreachable("Invalid bit size");
247 nir_const_value_as_bool(nir_const_value value
, unsigned bit_size
)
249 int64_t i
= nir_const_value_as_int(value
, bit_size
);
251 /* Booleans of any size use 0/-1 convention */
252 assert(i
== 0 || i
== -1);
257 /* This one isn't inline because it requires half-float conversion */
258 double nir_const_value_as_float(nir_const_value value
, unsigned bit_size
);
260 typedef struct nir_constant
{
262 * Value of the constant.
264 * The field used to back the values supplied by the constant is determined
265 * by the type associated with the \c nir_variable. Constants may be
266 * scalars, vectors, or matrices.
268 nir_const_value values
[NIR_MAX_VEC_COMPONENTS
];
270 /* we could get this from the var->type but makes clone *much* easier to
271 * not have to care about the type.
273 unsigned num_elements
;
275 /* Array elements / Structure Fields */
276 struct nir_constant
**elements
;
280 * \brief Layout qualifiers for gl_FragDepth.
282 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
283 * with a layout qualifier.
286 nir_depth_layout_none
, /**< No depth layout is specified. */
287 nir_depth_layout_any
,
288 nir_depth_layout_greater
,
289 nir_depth_layout_less
,
290 nir_depth_layout_unchanged
294 * Enum keeping track of how a variable was declared.
298 * Normal declaration.
300 nir_var_declared_normally
= 0,
303 * Variable is implicitly generated by the compiler and should not be
304 * visible via the API.
307 } nir_var_declaration_type
;
310 * Either a uniform, global variable, shader input, or shader output. Based on
311 * ir_variable - it should be easy to translate between the two.
314 typedef struct nir_variable
{
315 struct exec_node node
;
318 * Declared type of the variable
320 const struct glsl_type
*type
;
323 * Declared name of the variable
327 struct nir_variable_data
{
329 * Storage class of the variable.
331 * \sa nir_variable_mode
336 * Is the variable read-only?
338 * This is set for variables declared as \c const, shader inputs,
341 unsigned read_only
:1;
345 unsigned invariant
:1;
348 * Precision qualifier.
350 * In desktop GLSL we do not care about precision qualifiers at all, in
351 * fact, the spec says that precision qualifiers are ignored.
353 * To make things easy, we make it so that this field is always
354 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
355 * have the same precision value and the checks we add in the compiler
356 * for this field will never break a desktop shader compile.
358 unsigned precision
:2;
361 * Can this variable be coalesced with another?
363 * This is set by nir_lower_io_to_temporaries to say that any
364 * copies involving this variable should stay put. Propagating it can
365 * duplicate the resulting load/store, which is not wanted, and may
366 * result in a load/store of the variable with an indirect offset which
367 * the backend may not be able to handle.
369 unsigned cannot_coalesce
:1;
372 * When separate shader programs are enabled, only input/outputs between
373 * the stages of a multi-stage separate program can be safely removed
374 * from the shader interface. Other input/outputs must remains active.
376 * This is also used to make sure xfb varyings that are unused by the
377 * fragment shader are not removed.
379 unsigned always_active_io
:1;
382 * Interpolation mode for shader inputs / outputs
384 * \sa glsl_interp_mode
386 unsigned interpolation
:3;
389 * If non-zero, then this variable may be packed along with other variables
390 * into a single varying slot, so this offset should be applied when
391 * accessing components. For example, an offset of 1 means that the x
392 * component of this variable is actually stored in component y of the
393 * location specified by \c location.
395 unsigned location_frac
:2;
398 * If true, this variable represents an array of scalars that should
399 * be tightly packed. In other words, consecutive array elements
400 * should be stored one component apart, rather than one slot apart.
405 * Whether this is a fragment shader output implicitly initialized with
406 * the previous contents of the specified render target at the
407 * framebuffer location corresponding to this shader invocation.
409 unsigned fb_fetch_output
:1;
412 * Non-zero if this variable is considered bindless as defined by
413 * ARB_bindless_texture.
418 * Was an explicit binding set in the shader?
420 unsigned explicit_binding
:1;
423 * Was the location explicitly set in the shader?
425 * If the location is explicitly set in the shader, it \b cannot be changed
426 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
429 unsigned explicit_location
:1;
432 * Was a transfer feedback buffer set in the shader?
434 unsigned explicit_xfb_buffer
:1;
437 * Was a transfer feedback stride set in the shader?
439 unsigned explicit_xfb_stride
:1;
442 * Was an explicit offset set in the shader?
444 unsigned explicit_offset
:1;
447 * Layout of the matrix. Uses glsl_matrix_layout values.
449 unsigned matrix_layout
:2;
452 * Non-zero if this variable was created by lowering a named interface
455 unsigned from_named_ifc_block
:1;
458 * How the variable was declared. See nir_var_declaration_type.
460 * This is used to detect variables generated by the compiler, so should
461 * not be visible via the API.
463 unsigned how_declared
:2;
466 * Is this variable per-view? If so, we know it must be an array with
467 * size corresponding to the number of views.
472 * \brief Layout qualifier for gl_FragDepth. See nir_depth_layout.
474 * This is not equal to \c ir_depth_layout_none if and only if this
475 * variable is \c gl_FragDepth and a layout qualifier is specified.
477 unsigned depth_layout
:3;
480 * Vertex stream output identifier.
482 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
483 * indicate the stream of the i-th component.
488 * See gl_access_qualifier.
490 * Access flags for memory variables (SSBO/global), image uniforms, and
491 * bindless images in uniforms/inputs/outputs.
496 * Descriptor set binding for sampler or UBO.
498 unsigned descriptor_set
:5;
501 * output index for dual source blending.
506 * Initial binding point for a sampler or UBO.
508 * For array types, this represents the binding point for the first element.
513 * Storage location of the base of this variable
515 * The precise meaning of this field depends on the nature of the variable.
517 * - Vertex shader input: one of the values from \c gl_vert_attrib.
518 * - Vertex shader output: one of the values from \c gl_varying_slot.
519 * - Geometry shader input: one of the values from \c gl_varying_slot.
520 * - Geometry shader output: one of the values from \c gl_varying_slot.
521 * - Fragment shader input: one of the values from \c gl_varying_slot.
522 * - Fragment shader output: one of the values from \c gl_frag_result.
523 * - Uniforms: Per-stage uniform slot number for default uniform block.
524 * - Uniforms: Index within the uniform block definition for UBO members.
525 * - Non-UBO Uniforms: uniform slot number.
526 * - Other: This field is not currently used.
528 * If the variable is a uniform, shader input, or shader output, and the
529 * slot has not been assigned, the value will be -1.
534 * The actual location of the variable in the IR. Only valid for inputs,
535 * outputs, and uniforms (including samplers and images).
537 unsigned driver_location
;
540 * Location an atomic counter or transform feedback is stored at.
546 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
547 enum pipe_format format
;
552 * For OpenCL inline samplers. See cl_sampler_addressing_mode and cl_sampler_filter_mode
554 unsigned is_inline_sampler
: 1;
555 unsigned addressing_mode
: 3;
556 unsigned normalized_coordinates
: 1;
557 unsigned filter_mode
: 1;
562 * Transform feedback buffer.
567 * Transform feedback stride.
575 * Identifier for this variable generated by nir_index_vars() that is unique
576 * among other variables in the same exec_list.
580 /* Number of nir_variable_data members */
581 uint16_t num_members
;
584 * Built-in state that backs this uniform
586 * Once set at variable creation, \c state_slots must remain invariant.
587 * This is because, ideally, this array would be shared by all clones of
588 * this variable in the IR tree. In other words, we'd really like for it
589 * to be a fly-weight.
591 * If the variable is not a uniform, \c num_state_slots will be zero and
592 * \c state_slots will be \c NULL.
595 uint16_t num_state_slots
; /**< Number of state slots used */
596 nir_state_slot
*state_slots
; /**< State descriptors. */
600 * Constant expression assigned in the initializer of the variable
602 * This field should only be used temporarily by creators of NIR shaders
603 * and then lower_constant_initializers can be used to get rid of them.
604 * Most of the rest of NIR ignores this field or asserts that it's NULL.
606 nir_constant
*constant_initializer
;
609 * Global variable assigned in the initializer of the variable
610 * This field should only be used temporarily by creators of NIR shaders
611 * and then lower_constant_initializers can be used to get rid of them.
612 * Most of the rest of NIR ignores this field or asserts that it's NULL.
614 struct nir_variable
*pointer_initializer
;
617 * For variables that are in an interface block or are an instance of an
618 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
620 * \sa ir_variable::location
622 const struct glsl_type
*interface_type
;
625 * Description of per-member data for per-member struct variables
627 * This is used for variables which are actually an amalgamation of
628 * multiple entities such as a struct of built-in values or a struct of
629 * inputs each with their own layout specifier. This is only allowed on
630 * variables with a struct or array of array of struct type.
632 struct nir_variable_data
*members
;
636 _nir_shader_variable_has_mode(nir_variable
*var
, unsigned modes
)
638 /* This isn't a shader variable */
639 assert(!(modes
& nir_var_function_temp
));
640 return var
->data
.mode
& modes
;
643 #define nir_foreach_variable_in_list(var, var_list) \
644 foreach_list_typed(nir_variable, var, node, var_list)
646 #define nir_foreach_variable_in_list_safe(var, var_list) \
647 foreach_list_typed_safe(nir_variable, var, node, var_list)
649 #define nir_foreach_variable_in_shader(var, shader) \
650 nir_foreach_variable_in_list(var, &(shader)->variables)
652 #define nir_foreach_variable_in_shader_safe(var, shader) \
653 nir_foreach_variable_in_list_safe(var, &(shader)->variables)
655 #define nir_foreach_variable_with_modes(var, shader, modes) \
656 nir_foreach_variable_in_shader(var, shader) \
657 if (_nir_shader_variable_has_mode(var, modes))
659 #define nir_foreach_variable_with_modes_safe(var, shader, modes) \
660 nir_foreach_variable_in_shader_safe(var, shader) \
661 if (_nir_shader_variable_has_mode(var, modes))
663 #define nir_foreach_shader_in_variable(var, shader) \
664 nir_foreach_variable_with_modes(var, shader, nir_var_shader_in)
666 #define nir_foreach_shader_in_variable_safe(var, shader) \
667 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_in)
669 #define nir_foreach_shader_out_variable(var, shader) \
670 nir_foreach_variable_with_modes(var, shader, nir_var_shader_out)
672 #define nir_foreach_shader_out_variable_safe(var, shader) \
673 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_out)
675 #define nir_foreach_uniform_variable(var, shader) \
676 nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
678 #define nir_foreach_uniform_variable_safe(var, shader) \
679 nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
682 nir_variable_is_global(const nir_variable
*var
)
684 return var
->data
.mode
!= nir_var_function_temp
;
687 typedef struct nir_register
{
688 struct exec_node node
;
690 unsigned num_components
; /** < number of vector components */
691 unsigned num_array_elems
; /** < size of array (0 for no array) */
693 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
696 /** generic register index. */
699 /** only for debug purposes, can be NULL */
702 /** set of nir_srcs where this register is used (read from) */
703 struct list_head uses
;
705 /** set of nir_dests where this register is defined (written to) */
706 struct list_head defs
;
708 /** set of nir_ifs where this register is used as a condition */
709 struct list_head if_uses
;
712 #define nir_foreach_register(reg, reg_list) \
713 foreach_list_typed(nir_register, reg, node, reg_list)
714 #define nir_foreach_register_safe(reg, reg_list) \
715 foreach_list_typed_safe(nir_register, reg, node, reg_list)
717 typedef enum PACKED
{
719 nir_instr_type_deref
,
722 nir_instr_type_intrinsic
,
723 nir_instr_type_load_const
,
725 nir_instr_type_ssa_undef
,
727 nir_instr_type_parallel_copy
,
730 typedef struct nir_instr
{
731 struct exec_node node
;
732 struct nir_block
*block
;
735 /* A temporary for optimization and analysis passes to use for storing
736 * flags. For instance, DCE uses this to store the "dead/live" info.
740 /** generic instruction index. */
744 static inline nir_instr
*
745 nir_instr_next(nir_instr
*instr
)
747 struct exec_node
*next
= exec_node_get_next(&instr
->node
);
748 if (exec_node_is_tail_sentinel(next
))
751 return exec_node_data(nir_instr
, next
, node
);
754 static inline nir_instr
*
755 nir_instr_prev(nir_instr
*instr
)
757 struct exec_node
*prev
= exec_node_get_prev(&instr
->node
);
758 if (exec_node_is_head_sentinel(prev
))
761 return exec_node_data(nir_instr
, prev
, node
);
765 nir_instr_is_first(const nir_instr
*instr
)
767 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr
->node
));
771 nir_instr_is_last(const nir_instr
*instr
)
773 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr
->node
));
776 typedef struct nir_ssa_def
{
777 /** for debugging only, can be NULL */
780 /** generic SSA definition index. */
783 /** Ordered SSA definition index used by nir_liveness. */
786 /** Instruction which produces this SSA value. */
787 nir_instr
*parent_instr
;
789 /** set of nir_instrs where this register is used (read from) */
790 struct list_head uses
;
792 /** set of nir_ifs where this register is used as a condition */
793 struct list_head if_uses
;
795 uint8_t num_components
;
797 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
801 * True if this SSA value may have different values in different SIMD
802 * invocations of the shader. This is set by nir_divergence_analysis.
811 struct nir_src
*indirect
; /** < NULL for no indirect offset */
812 unsigned base_offset
;
814 /* TODO use-def chain goes here */
818 nir_instr
*parent_instr
;
819 struct list_head def_link
;
822 struct nir_src
*indirect
; /** < NULL for no indirect offset */
823 unsigned base_offset
;
825 /* TODO def-use chain goes here */
830 typedef struct nir_src
{
832 /** Instruction that consumes this value as a source. */
833 nir_instr
*parent_instr
;
834 struct nir_if
*parent_if
;
837 struct list_head use_link
;
847 static inline nir_src
850 nir_src src
= { { NULL
} };
854 #define NIR_SRC_INIT nir_src_init()
856 #define nir_foreach_use(src, reg_or_ssa_def) \
857 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
859 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
860 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
862 #define nir_foreach_if_use(src, reg_or_ssa_def) \
863 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
865 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
866 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
877 static inline nir_dest
880 nir_dest dest
= { { { NULL
} } };
884 #define NIR_DEST_INIT nir_dest_init()
886 #define nir_foreach_def(dest, reg) \
887 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
889 #define nir_foreach_def_safe(dest, reg) \
890 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
892 static inline nir_src
893 nir_src_for_ssa(nir_ssa_def
*def
)
895 nir_src src
= NIR_SRC_INIT
;
903 static inline nir_src
904 nir_src_for_reg(nir_register
*reg
)
906 nir_src src
= NIR_SRC_INIT
;
910 src
.reg
.indirect
= NULL
;
911 src
.reg
.base_offset
= 0;
916 static inline nir_dest
917 nir_dest_for_reg(nir_register
*reg
)
919 nir_dest dest
= NIR_DEST_INIT
;
926 static inline unsigned
927 nir_src_bit_size(nir_src src
)
929 return src
.is_ssa
? src
.ssa
->bit_size
: src
.reg
.reg
->bit_size
;
932 static inline unsigned
933 nir_src_num_components(nir_src src
)
935 return src
.is_ssa
? src
.ssa
->num_components
: src
.reg
.reg
->num_components
;
939 nir_src_is_const(nir_src src
)
942 src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
;
946 nir_src_is_divergent(nir_src src
)
949 return src
.ssa
->divergent
;
952 static inline unsigned
953 nir_dest_bit_size(nir_dest dest
)
955 return dest
.is_ssa
? dest
.ssa
.bit_size
: dest
.reg
.reg
->bit_size
;
958 static inline unsigned
959 nir_dest_num_components(nir_dest dest
)
961 return dest
.is_ssa
? dest
.ssa
.num_components
: dest
.reg
.reg
->num_components
;
965 nir_dest_is_divergent(nir_dest dest
)
968 return dest
.ssa
.divergent
;
971 /* Are all components the same, ie. .xxxx */
973 nir_is_same_comp_swizzle(uint8_t *swiz
, unsigned nr_comp
)
975 for (unsigned i
= 1; i
< nr_comp
; i
++)
976 if (swiz
[i
] != swiz
[0])
981 /* Are all components sequential, ie. .yzw */
983 nir_is_sequential_comp_swizzle(uint8_t *swiz
, unsigned nr_comp
)
985 for (unsigned i
= 1; i
< nr_comp
; i
++)
986 if (swiz
[i
] != (swiz
[0] + i
))
991 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *instr_or_if
);
992 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
);
998 * \name input modifiers
1002 * For inputs interpreted as floating point, flips the sign bit. For
1003 * inputs interpreted as integers, performs the two's complement negation.
1008 * Clears the sign bit for floating point values, and computes the integer
1009 * absolute value for integers. Note that the negate modifier acts after
1010 * the absolute value modifier, therefore if both are set then all inputs
1011 * will become negative.
1017 * For each input component, says which component of the register it is
1018 * chosen from. Note that which elements of the swizzle are used and which
1019 * are ignored are based on the write mask for most opcodes - for example,
1020 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
1021 * a swizzle of {2, x, 1, 0} where x means "don't care."
1023 uint8_t swizzle
[NIR_MAX_VEC_COMPONENTS
];
1030 * \name saturate output modifier
1032 * Only valid for opcodes that output floating-point numbers. Clamps the
1033 * output to between 0.0 and 1.0 inclusive.
1038 unsigned write_mask
: NIR_MAX_VEC_COMPONENTS
; /* ignored if dest.is_ssa is true */
1041 /** NIR sized and unsized types
1043 * The values in this enum are carefully chosen so that the sized type is
1044 * just the unsized type OR the number of bits.
1046 typedef enum PACKED
{
1047 nir_type_invalid
= 0, /* Not a valid type */
1051 nir_type_float
= 128,
1052 nir_type_bool1
= 1 | nir_type_bool
,
1053 nir_type_bool8
= 8 | nir_type_bool
,
1054 nir_type_bool16
= 16 | nir_type_bool
,
1055 nir_type_bool32
= 32 | nir_type_bool
,
1056 nir_type_int1
= 1 | nir_type_int
,
1057 nir_type_int8
= 8 | nir_type_int
,
1058 nir_type_int16
= 16 | nir_type_int
,
1059 nir_type_int32
= 32 | nir_type_int
,
1060 nir_type_int64
= 64 | nir_type_int
,
1061 nir_type_uint1
= 1 | nir_type_uint
,
1062 nir_type_uint8
= 8 | nir_type_uint
,
1063 nir_type_uint16
= 16 | nir_type_uint
,
1064 nir_type_uint32
= 32 | nir_type_uint
,
1065 nir_type_uint64
= 64 | nir_type_uint
,
1066 nir_type_float16
= 16 | nir_type_float
,
1067 nir_type_float32
= 32 | nir_type_float
,
1068 nir_type_float64
= 64 | nir_type_float
,
1071 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1072 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1074 static inline unsigned
1075 nir_alu_type_get_type_size(nir_alu_type type
)
1077 return type
& NIR_ALU_TYPE_SIZE_MASK
;
1080 static inline nir_alu_type
1081 nir_alu_type_get_base_type(nir_alu_type type
)
1083 return (nir_alu_type
)(type
& NIR_ALU_TYPE_BASE_TYPE_MASK
);
1086 static inline nir_alu_type
1087 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type
)
1089 switch (base_type
) {
1090 case GLSL_TYPE_BOOL
:
1091 return nir_type_bool1
;
1093 case GLSL_TYPE_UINT
:
1094 return nir_type_uint32
;
1097 return nir_type_int32
;
1099 case GLSL_TYPE_UINT16
:
1100 return nir_type_uint16
;
1102 case GLSL_TYPE_INT16
:
1103 return nir_type_int16
;
1105 case GLSL_TYPE_UINT8
:
1106 return nir_type_uint8
;
1107 case GLSL_TYPE_INT8
:
1108 return nir_type_int8
;
1109 case GLSL_TYPE_UINT64
:
1110 return nir_type_uint64
;
1112 case GLSL_TYPE_INT64
:
1113 return nir_type_int64
;
1115 case GLSL_TYPE_FLOAT
:
1116 return nir_type_float32
;
1118 case GLSL_TYPE_FLOAT16
:
1119 return nir_type_float16
;
1121 case GLSL_TYPE_DOUBLE
:
1122 return nir_type_float64
;
1125 case GLSL_TYPE_SAMPLER
:
1126 case GLSL_TYPE_IMAGE
:
1127 case GLSL_TYPE_ATOMIC_UINT
:
1128 case GLSL_TYPE_STRUCT
:
1129 case GLSL_TYPE_INTERFACE
:
1130 case GLSL_TYPE_ARRAY
:
1131 case GLSL_TYPE_VOID
:
1132 case GLSL_TYPE_SUBROUTINE
:
1133 case GLSL_TYPE_FUNCTION
:
1134 case GLSL_TYPE_ERROR
:
1135 return nir_type_invalid
;
1138 unreachable("unknown type");
1141 static inline nir_alu_type
1142 nir_get_nir_type_for_glsl_type(const struct glsl_type
*type
)
1144 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type
));
1147 nir_op
nir_type_conversion_op(nir_alu_type src
, nir_alu_type dst
,
1148 nir_rounding_mode rnd
);
1150 static inline nir_op
1151 nir_op_vec(unsigned components
)
1153 switch (components
) {
1154 case 1: return nir_op_mov
;
1155 case 2: return nir_op_vec2
;
1156 case 3: return nir_op_vec3
;
1157 case 4: return nir_op_vec4
;
1158 case 8: return nir_op_vec8
;
1159 case 16: return nir_op_vec16
;
1160 default: unreachable("bad component count");
1165 nir_op_is_vec(nir_op op
)
1181 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode
, unsigned bit_size
)
1183 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16
) ||
1184 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32
) ||
1185 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64
);
1189 nir_is_denorm_flush_to_zero(unsigned execution_mode
, unsigned bit_size
)
1191 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16
) ||
1192 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32
) ||
1193 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64
);
1197 nir_is_denorm_preserve(unsigned execution_mode
, unsigned bit_size
)
1199 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP16
) ||
1200 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP32
) ||
1201 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP64
);
1205 nir_is_rounding_mode_rtne(unsigned execution_mode
, unsigned bit_size
)
1207 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1208 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1209 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1213 nir_is_rounding_mode_rtz(unsigned execution_mode
, unsigned bit_size
)
1215 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1216 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1217 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1221 nir_has_any_rounding_mode_rtz(unsigned execution_mode
)
1223 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1224 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1225 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1229 nir_has_any_rounding_mode_rtne(unsigned execution_mode
)
1231 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1232 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1233 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1236 static inline nir_rounding_mode
1237 nir_get_rounding_mode_from_float_controls(unsigned execution_mode
,
1240 if (nir_alu_type_get_base_type(type
) != nir_type_float
)
1241 return nir_rounding_mode_undef
;
1243 unsigned bit_size
= nir_alu_type_get_type_size(type
);
1245 if (nir_is_rounding_mode_rtz(execution_mode
, bit_size
))
1246 return nir_rounding_mode_rtz
;
1247 if (nir_is_rounding_mode_rtne(execution_mode
, bit_size
))
1248 return nir_rounding_mode_rtne
;
1249 return nir_rounding_mode_undef
;
1253 nir_has_any_rounding_mode_enabled(unsigned execution_mode
)
1256 nir_has_any_rounding_mode_rtne(execution_mode
) ||
1257 nir_has_any_rounding_mode_rtz(execution_mode
);
1263 * Operation where the first two sources are commutative.
1265 * For 2-source operations, this just mathematical commutativity. Some
1266 * 3-source operations, like ffma, are only commutative in the first two
1269 NIR_OP_IS_2SRC_COMMUTATIVE
= (1 << 0),
1270 NIR_OP_IS_ASSOCIATIVE
= (1 << 1),
1271 } nir_op_algebraic_property
;
1279 * The number of components in the output
1281 * If non-zero, this is the size of the output and input sizes are
1282 * explicitly given; swizzle and writemask are still in effect, but if
1283 * the output component is masked out, then the input component may
1286 * If zero, the opcode acts in the standard, per-component manner; the
1287 * operation is performed on each component (except the ones that are
1288 * masked out) with the input being taken from the input swizzle for
1291 * The size of some of the inputs may be given (i.e. non-zero) even
1292 * though output_size is zero; in that case, the inputs with a zero
1293 * size act per-component, while the inputs with non-zero size don't.
1295 uint8_t output_size
;
1298 * The type of vector that the instruction outputs. Note that the
1299 * staurate modifier is only allowed on outputs with the float type.
1302 nir_alu_type output_type
;
1305 * The number of components in each input
1307 uint8_t input_sizes
[NIR_MAX_VEC_COMPONENTS
];
1310 * The type of vector that each input takes. Note that negate and
1311 * absolute value are only allowed on inputs with int or float type and
1312 * behave differently on the two.
1314 nir_alu_type input_types
[NIR_MAX_VEC_COMPONENTS
];
1316 nir_op_algebraic_property algebraic_properties
;
1318 /* Whether this represents a numeric conversion opcode */
1322 extern const nir_op_info nir_op_infos
[nir_num_opcodes
];
1324 typedef struct nir_alu_instr
{
1328 /** Indicates that this ALU instruction generates an exact value
1330 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1331 * really equivalent to either. This indicates that the value generated by
1332 * this operation is high-precision and any code transformations that touch
1333 * it must ensure that the resulting value is bit-for-bit identical to the
1339 * Indicates that this instruction do not cause wrapping to occur, in the
1340 * form of overflow or underflow.
1342 bool no_signed_wrap
:1;
1343 bool no_unsigned_wrap
:1;
1349 void nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
1350 nir_alu_instr
*instr
);
1351 void nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
1352 nir_alu_instr
*instr
);
1354 /* is this source channel used? */
1356 nir_alu_instr_channel_used(const nir_alu_instr
*instr
, unsigned src
,
1359 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1360 return channel
< nir_op_infos
[instr
->op
].input_sizes
[src
];
1362 return (instr
->dest
.write_mask
>> channel
) & 1;
1365 static inline nir_component_mask_t
1366 nir_alu_instr_src_read_mask(const nir_alu_instr
*instr
, unsigned src
)
1368 nir_component_mask_t read_mask
= 0;
1369 for (unsigned c
= 0; c
< NIR_MAX_VEC_COMPONENTS
; c
++) {
1370 if (!nir_alu_instr_channel_used(instr
, src
, c
))
1373 read_mask
|= (1 << instr
->src
[src
].swizzle
[c
]);
1379 * Get the number of channels used for a source
1381 static inline unsigned
1382 nir_ssa_alu_instr_src_components(const nir_alu_instr
*instr
, unsigned src
)
1384 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1385 return nir_op_infos
[instr
->op
].input_sizes
[src
];
1387 return nir_dest_num_components(instr
->dest
.dest
);
1391 nir_alu_instr_is_comparison(const nir_alu_instr
*instr
)
1393 switch (instr
->op
) {
1413 bool nir_const_value_negative_equal(nir_const_value c1
, nir_const_value c2
,
1414 nir_alu_type full_type
);
1416 bool nir_alu_srcs_equal(const nir_alu_instr
*alu1
, const nir_alu_instr
*alu2
,
1417 unsigned src1
, unsigned src2
);
1419 bool nir_alu_srcs_negative_equal(const nir_alu_instr
*alu1
,
1420 const nir_alu_instr
*alu2
,
1421 unsigned src1
, unsigned src2
);
1425 nir_deref_type_array
,
1426 nir_deref_type_array_wildcard
,
1427 nir_deref_type_ptr_as_array
,
1428 nir_deref_type_struct
,
1429 nir_deref_type_cast
,
1435 /** The type of this deref instruction */
1436 nir_deref_type deref_type
;
1438 /** The mode of the underlying variable */
1439 nir_variable_mode mode
;
1441 /** The dereferenced type of the resulting pointer value */
1442 const struct glsl_type
*type
;
1445 /** Variable being dereferenced if deref_type is a deref_var */
1448 /** Parent deref if deref_type is not deref_var */
1452 /** Additional deref parameters */
1463 unsigned ptr_stride
;
1467 /** Destination to store the resulting "pointer" */
1471 static inline nir_deref_instr
*nir_src_as_deref(nir_src src
);
1473 static inline nir_deref_instr
*
1474 nir_deref_instr_parent(const nir_deref_instr
*instr
)
1476 if (instr
->deref_type
== nir_deref_type_var
)
1479 return nir_src_as_deref(instr
->parent
);
1482 static inline nir_variable
*
1483 nir_deref_instr_get_variable(const nir_deref_instr
*instr
)
1485 while (instr
->deref_type
!= nir_deref_type_var
) {
1486 if (instr
->deref_type
== nir_deref_type_cast
)
1489 instr
= nir_deref_instr_parent(instr
);
1495 bool nir_deref_instr_has_indirect(nir_deref_instr
*instr
);
1496 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr
*instr
);
1497 bool nir_deref_instr_has_complex_use(nir_deref_instr
*instr
);
1499 bool nir_deref_instr_remove_if_unused(nir_deref_instr
*instr
);
1501 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr
*instr
);
1506 struct nir_function
*callee
;
1508 unsigned num_params
;
1512 #include "nir_intrinsics.h"
1514 #define NIR_INTRINSIC_MAX_CONST_INDEX 5
1516 /** Represents an intrinsic
1518 * An intrinsic is an instruction type for handling things that are
1519 * more-or-less regular operations but don't just consume and produce SSA
1520 * values like ALU operations do. Intrinsics are not for things that have
1521 * special semantic meaning such as phi nodes and parallel copies.
1522 * Examples of intrinsics include variable load/store operations, system
1523 * value loads, and the like. Even though texturing more-or-less falls
1524 * under this category, texturing is its own instruction type because
1525 * trying to represent texturing with intrinsics would lead to a
1526 * combinatorial explosion of intrinsic opcodes.
1528 * By having a single instruction type for handling a lot of different
1529 * cases, optimization passes can look for intrinsics and, for the most
1530 * part, completely ignore them. Each intrinsic type also has a few
1531 * possible flags that govern whether or not they can be reordered or
1532 * eliminated. That way passes like dead code elimination can still work
1533 * on intrisics without understanding the meaning of each.
1535 * Each intrinsic has some number of constant indices, some number of
1536 * variables, and some number of sources. What these sources, variables,
1537 * and indices mean depends on the intrinsic and is documented with the
1538 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1539 * instructions are the only types of instruction that can operate on
1545 nir_intrinsic_op intrinsic
;
1549 /** number of components if this is a vectorized intrinsic
1551 * Similarly to ALU operations, some intrinsics are vectorized.
1552 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1553 * For vectorized intrinsics, the num_components field specifies the
1554 * number of destination components and the number of source components
1555 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1557 uint8_t num_components
;
1559 int const_index
[NIR_INTRINSIC_MAX_CONST_INDEX
];
1562 } nir_intrinsic_instr
;
1564 static inline nir_variable
*
1565 nir_intrinsic_get_var(nir_intrinsic_instr
*intrin
, unsigned i
)
1567 return nir_deref_instr_get_variable(nir_src_as_deref(intrin
->src
[i
]));
1571 /* Memory ordering. */
1572 NIR_MEMORY_ACQUIRE
= 1 << 0,
1573 NIR_MEMORY_RELEASE
= 1 << 1,
1574 NIR_MEMORY_ACQ_REL
= NIR_MEMORY_ACQUIRE
| NIR_MEMORY_RELEASE
,
1576 /* Memory visibility operations. */
1577 NIR_MEMORY_MAKE_AVAILABLE
= 1 << 2,
1578 NIR_MEMORY_MAKE_VISIBLE
= 1 << 3,
1579 } nir_memory_semantics
;
1583 NIR_SCOPE_INVOCATION
,
1585 NIR_SCOPE_WORKGROUP
,
1586 NIR_SCOPE_QUEUE_FAMILY
,
1591 * \name NIR intrinsics semantic flags
1593 * information about what the compiler can do with the intrinsics.
1595 * \sa nir_intrinsic_info::flags
1599 * whether the intrinsic can be safely eliminated if none of its output
1600 * value is not being used.
1602 NIR_INTRINSIC_CAN_ELIMINATE
= (1 << 0),
1605 * Whether the intrinsic can be reordered with respect to any other
1606 * intrinsic, i.e. whether the only reordering dependencies of the
1607 * intrinsic are due to the register reads/writes.
1609 NIR_INTRINSIC_CAN_REORDER
= (1 << 1),
1610 } nir_intrinsic_semantic_flag
;
1613 * \name NIR intrinsics const-index flag
1615 * Indicates the usage of a const_index slot.
1617 * \sa nir_intrinsic_info::index_map
1621 * Generally instructions that take a offset src argument, can encode
1622 * a constant 'base' value which is added to the offset.
1624 NIR_INTRINSIC_BASE
= 1,
1627 * For store instructions, a writemask for the store.
1629 NIR_INTRINSIC_WRMASK
,
1632 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1634 NIR_INTRINSIC_STREAM_ID
,
1637 * The clip-plane id for load_user_clip_plane intrinsic.
1639 NIR_INTRINSIC_UCP_ID
,
1642 * The amount of data, starting from BASE, that this instruction may
1643 * access. This is used to provide bounds if the offset is not constant.
1645 NIR_INTRINSIC_RANGE
,
1648 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1650 NIR_INTRINSIC_DESC_SET
,
1653 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1655 NIR_INTRINSIC_BINDING
,
1660 NIR_INTRINSIC_COMPONENT
,
1663 * Interpolation mode (only meaningful for FS inputs).
1665 NIR_INTRINSIC_INTERP_MODE
,
1668 * A binary nir_op to use when performing a reduction or scan operation
1670 NIR_INTRINSIC_REDUCTION_OP
,
1673 * Cluster size for reduction operations
1675 NIR_INTRINSIC_CLUSTER_SIZE
,
1678 * Parameter index for a load_param intrinsic
1680 NIR_INTRINSIC_PARAM_IDX
,
1683 * Image dimensionality for image intrinsics
1685 * One of GLSL_SAMPLER_DIM_*
1687 NIR_INTRINSIC_IMAGE_DIM
,
1690 * Non-zero if we are accessing an array image
1692 NIR_INTRINSIC_IMAGE_ARRAY
,
1695 * Image format for image intrinsics
1697 NIR_INTRINSIC_FORMAT
,
1700 * Access qualifiers for image and memory access intrinsics
1702 NIR_INTRINSIC_ACCESS
,
1705 * Alignment for offsets and addresses
1707 * These two parameters, specify an alignment in terms of a multiplier and
1708 * an offset. The offset or address parameter X of the intrinsic is
1709 * guaranteed to satisfy the following:
1711 * (X - align_offset) % align_mul == 0
1713 NIR_INTRINSIC_ALIGN_MUL
,
1714 NIR_INTRINSIC_ALIGN_OFFSET
,
1717 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1719 NIR_INTRINSIC_DESC_TYPE
,
1722 * The nir_alu_type of a uniform/input/output
1727 * The swizzle mask for the instructions
1728 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1730 NIR_INTRINSIC_SWIZZLE_MASK
,
1732 /* Separate source/dest access flags for copies */
1733 NIR_INTRINSIC_SRC_ACCESS
,
1734 NIR_INTRINSIC_DST_ACCESS
,
1736 /* Driver location for nir_load_patch_location_ir3 */
1737 NIR_INTRINSIC_DRIVER_LOCATION
,
1740 * Mask of nir_memory_semantics, includes ordering and visibility.
1742 NIR_INTRINSIC_MEMORY_SEMANTICS
,
1745 * Mask of nir_variable_modes affected by the memory operation.
1747 NIR_INTRINSIC_MEMORY_MODES
,
1750 * Value of nir_scope.
1752 NIR_INTRINSIC_MEMORY_SCOPE
,
1755 * Value of nir_scope.
1757 NIR_INTRINSIC_EXECUTION_SCOPE
,
1760 * Value of nir_io_semantics.
1762 NIR_INTRINSIC_IO_SEMANTICS
,
1764 NIR_INTRINSIC_NUM_INDEX_FLAGS
,
1766 } nir_intrinsic_index_flag
;
1769 unsigned location
:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
1770 unsigned num_slots
:6; /* max 32, may be pessimistic with const indexing */
1771 unsigned dual_source_blend_index
:1;
1772 unsigned fb_fetch_output
:1; /* for GL_KHR_blend_equation_advanced */
1773 unsigned gs_streams
:8; /* xxyyzzww: 2-bit stream index for each component */
1777 #define NIR_INTRINSIC_MAX_INPUTS 5
1782 uint8_t num_srcs
; /** < number of register/SSA inputs */
1784 /** number of components of each input register
1786 * If this value is 0, the number of components is given by the
1787 * num_components field of nir_intrinsic_instr. If this value is -1, the
1788 * intrinsic consumes however many components are provided and it is not
1791 int8_t src_components
[NIR_INTRINSIC_MAX_INPUTS
];
1795 /** number of components of the output register
1797 * If this value is 0, the number of components is given by the
1798 * num_components field of nir_intrinsic_instr.
1800 uint8_t dest_components
;
1802 /** bitfield of legal bit sizes */
1803 uint8_t dest_bit_sizes
;
1805 /** the number of constant indices used by the intrinsic */
1806 uint8_t num_indices
;
1808 /** indicates the usage of intr->const_index[n] */
1809 uint8_t index_map
[NIR_INTRINSIC_NUM_INDEX_FLAGS
];
1811 /** semantic flags for calls to this intrinsic */
1812 nir_intrinsic_semantic_flag flags
;
1813 } nir_intrinsic_info
;
1815 extern const nir_intrinsic_info nir_intrinsic_infos
[nir_num_intrinsics
];
1817 static inline unsigned
1818 nir_intrinsic_src_components(const nir_intrinsic_instr
*intr
, unsigned srcn
)
1820 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1821 assert(srcn
< info
->num_srcs
);
1822 if (info
->src_components
[srcn
] > 0)
1823 return info
->src_components
[srcn
];
1824 else if (info
->src_components
[srcn
] == 0)
1825 return intr
->num_components
;
1827 return nir_src_num_components(intr
->src
[srcn
]);
1830 static inline unsigned
1831 nir_intrinsic_dest_components(nir_intrinsic_instr
*intr
)
1833 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1834 if (!info
->has_dest
)
1836 else if (info
->dest_components
)
1837 return info
->dest_components
;
1839 return intr
->num_components
;
1843 * Helper to copy const_index[] from src to dst, without assuming they
1847 nir_intrinsic_copy_const_indices(nir_intrinsic_instr
*dst
, nir_intrinsic_instr
*src
)
1849 if (src
->intrinsic
== dst
->intrinsic
) {
1850 memcpy(dst
->const_index
, src
->const_index
, sizeof(dst
->const_index
));
1854 const nir_intrinsic_info
*src_info
= &nir_intrinsic_infos
[src
->intrinsic
];
1855 const nir_intrinsic_info
*dst_info
= &nir_intrinsic_infos
[dst
->intrinsic
];
1857 for (unsigned i
= 0; i
< NIR_INTRINSIC_NUM_INDEX_FLAGS
; i
++) {
1858 if (src_info
->index_map
[i
] == 0)
1861 /* require that dst instruction also uses the same const_index[]: */
1862 assert(dst_info
->index_map
[i
] > 0);
1864 dst
->const_index
[dst_info
->index_map
[i
] - 1] =
1865 src
->const_index
[src_info
->index_map
[i
] - 1];
1869 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1870 static inline type \
1871 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1873 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1874 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1875 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1877 static inline void \
1878 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1880 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1881 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1882 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1884 static inline bool \
1885 nir_intrinsic_has_##name(nir_intrinsic_instr *instr) \
1887 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1888 return info->index_map[NIR_INTRINSIC_##flag] > 0; \
1891 INTRINSIC_IDX_ACCESSORS(write_mask
, WRMASK
, unsigned)
1892 INTRINSIC_IDX_ACCESSORS(base
, BASE
, int)
1893 INTRINSIC_IDX_ACCESSORS(stream_id
, STREAM_ID
, unsigned)
1894 INTRINSIC_IDX_ACCESSORS(ucp_id
, UCP_ID
, unsigned)
1895 INTRINSIC_IDX_ACCESSORS(range
, RANGE
, unsigned)
1896 INTRINSIC_IDX_ACCESSORS(desc_set
, DESC_SET
, unsigned)
1897 INTRINSIC_IDX_ACCESSORS(binding
, BINDING
, unsigned)
1898 INTRINSIC_IDX_ACCESSORS(component
, COMPONENT
, unsigned)
1899 INTRINSIC_IDX_ACCESSORS(interp_mode
, INTERP_MODE
, unsigned)
1900 INTRINSIC_IDX_ACCESSORS(reduction_op
, REDUCTION_OP
, unsigned)
1901 INTRINSIC_IDX_ACCESSORS(cluster_size
, CLUSTER_SIZE
, unsigned)
1902 INTRINSIC_IDX_ACCESSORS(param_idx
, PARAM_IDX
, unsigned)
1903 INTRINSIC_IDX_ACCESSORS(image_dim
, IMAGE_DIM
, enum glsl_sampler_dim
)
1904 INTRINSIC_IDX_ACCESSORS(image_array
, IMAGE_ARRAY
, bool)
1905 INTRINSIC_IDX_ACCESSORS(access
, ACCESS
, enum gl_access_qualifier
)
1906 INTRINSIC_IDX_ACCESSORS(src_access
, SRC_ACCESS
, enum gl_access_qualifier
)
1907 INTRINSIC_IDX_ACCESSORS(dst_access
, DST_ACCESS
, enum gl_access_qualifier
)
1908 INTRINSIC_IDX_ACCESSORS(format
, FORMAT
, enum pipe_format
)
1909 INTRINSIC_IDX_ACCESSORS(align_mul
, ALIGN_MUL
, unsigned)
1910 INTRINSIC_IDX_ACCESSORS(align_offset
, ALIGN_OFFSET
, unsigned)
1911 INTRINSIC_IDX_ACCESSORS(desc_type
, DESC_TYPE
, unsigned)
1912 INTRINSIC_IDX_ACCESSORS(type
, TYPE
, nir_alu_type
)
1913 INTRINSIC_IDX_ACCESSORS(swizzle_mask
, SWIZZLE_MASK
, unsigned)
1914 INTRINSIC_IDX_ACCESSORS(driver_location
, DRIVER_LOCATION
, unsigned)
1915 INTRINSIC_IDX_ACCESSORS(memory_semantics
, MEMORY_SEMANTICS
, nir_memory_semantics
)
1916 INTRINSIC_IDX_ACCESSORS(memory_modes
, MEMORY_MODES
, nir_variable_mode
)
1917 INTRINSIC_IDX_ACCESSORS(memory_scope
, MEMORY_SCOPE
, nir_scope
)
1918 INTRINSIC_IDX_ACCESSORS(execution_scope
, EXECUTION_SCOPE
, nir_scope
)
1921 nir_intrinsic_set_align(nir_intrinsic_instr
*intrin
,
1922 unsigned align_mul
, unsigned align_offset
)
1924 assert(util_is_power_of_two_nonzero(align_mul
));
1925 assert(align_offset
< align_mul
);
1926 nir_intrinsic_set_align_mul(intrin
, align_mul
);
1927 nir_intrinsic_set_align_offset(intrin
, align_offset
);
1930 /** Returns a simple alignment for a load/store intrinsic offset
1932 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1933 * and ALIGN_OFFSET parameters, this helper takes both into account and
1934 * provides a single simple alignment parameter. The offset X is guaranteed
1935 * to satisfy X % align == 0.
1937 static inline unsigned
1938 nir_intrinsic_align(const nir_intrinsic_instr
*intrin
)
1940 const unsigned align_mul
= nir_intrinsic_align_mul(intrin
);
1941 const unsigned align_offset
= nir_intrinsic_align_offset(intrin
);
1942 assert(align_offset
< align_mul
);
1943 return align_offset
? 1 << (ffs(align_offset
) - 1) : align_mul
;
1947 nir_intrinsic_set_io_semantics(nir_intrinsic_instr
*intrin
,
1948 nir_io_semantics semantics
)
1950 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intrin
->intrinsic
];
1951 assert(info
->index_map
[NIR_INTRINSIC_IO_SEMANTICS
] > 0);
1952 STATIC_ASSERT(sizeof(nir_io_semantics
) == sizeof(intrin
->const_index
[0]));
1953 semantics
._pad
= 0; /* clear padding bits */
1954 memcpy(&intrin
->const_index
[info
->index_map
[NIR_INTRINSIC_IO_SEMANTICS
] - 1],
1955 &semantics
, sizeof(semantics
));
1958 static inline nir_io_semantics
1959 nir_intrinsic_io_semantics(const nir_intrinsic_instr
*intrin
)
1961 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intrin
->intrinsic
];
1962 assert(info
->index_map
[NIR_INTRINSIC_IO_SEMANTICS
] > 0);
1963 nir_io_semantics semantics
;
1965 &intrin
->const_index
[info
->index_map
[NIR_INTRINSIC_IO_SEMANTICS
] - 1],
1971 nir_image_intrinsic_coord_components(const nir_intrinsic_instr
*instr
);
1973 /* Converts a image_deref_* intrinsic into a image_* one */
1974 void nir_rewrite_image_intrinsic(nir_intrinsic_instr
*instr
,
1975 nir_ssa_def
*handle
, bool bindless
);
1977 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1979 nir_intrinsic_can_reorder(nir_intrinsic_instr
*instr
)
1981 if (instr
->intrinsic
== nir_intrinsic_load_deref
||
1982 instr
->intrinsic
== nir_intrinsic_load_ssbo
||
1983 instr
->intrinsic
== nir_intrinsic_bindless_image_load
||
1984 instr
->intrinsic
== nir_intrinsic_image_deref_load
||
1985 instr
->intrinsic
== nir_intrinsic_image_load
) {
1986 return nir_intrinsic_access(instr
) & ACCESS_CAN_REORDER
;
1988 const nir_intrinsic_info
*info
=
1989 &nir_intrinsic_infos
[instr
->intrinsic
];
1990 return (info
->flags
& NIR_INTRINSIC_CAN_ELIMINATE
) &&
1991 (info
->flags
& NIR_INTRINSIC_CAN_REORDER
);
1996 * \group texture information
1998 * This gives semantic information about textures which is useful to the
1999 * frontend, the backend, and lowering passes, but not the optimizer.
2004 nir_tex_src_projector
,
2005 nir_tex_src_comparator
, /* shadow comparator */
2009 nir_tex_src_min_lod
,
2010 nir_tex_src_ms_index
, /* MSAA sample index */
2011 nir_tex_src_ms_mcs
, /* MSAA compression value */
2014 nir_tex_src_texture_deref
, /* < deref pointing to the texture */
2015 nir_tex_src_sampler_deref
, /* < deref pointing to the sampler */
2016 nir_tex_src_texture_offset
, /* < dynamically uniform indirect offset */
2017 nir_tex_src_sampler_offset
, /* < dynamically uniform indirect offset */
2018 nir_tex_src_texture_handle
, /* < bindless texture handle */
2019 nir_tex_src_sampler_handle
, /* < bindless sampler handle */
2020 nir_tex_src_plane
, /* < selects plane for planar textures */
2021 nir_num_tex_src_types
2026 nir_tex_src_type src_type
;
2030 nir_texop_tex
, /**< Regular texture look-up */
2031 nir_texop_txb
, /**< Texture look-up with LOD bias */
2032 nir_texop_txl
, /**< Texture look-up with explicit LOD */
2033 nir_texop_txd
, /**< Texture look-up with partial derivatives */
2034 nir_texop_txf
, /**< Texel fetch with explicit LOD */
2035 nir_texop_txf_ms
, /**< Multisample texture fetch */
2036 nir_texop_txf_ms_fb
, /**< Multisample texture fetch from framebuffer */
2037 nir_texop_txf_ms_mcs
, /**< Multisample compression value fetch */
2038 nir_texop_txs
, /**< Texture size */
2039 nir_texop_lod
, /**< Texture lod query */
2040 nir_texop_tg4
, /**< Texture gather */
2041 nir_texop_query_levels
, /**< Texture levels query */
2042 nir_texop_texture_samples
, /**< Texture samples query */
2043 nir_texop_samples_identical
, /**< Query whether all samples are definitely
2046 nir_texop_tex_prefetch
, /**< Regular texture look-up, eligible for pre-dispatch */
2047 nir_texop_fragment_fetch
, /**< Multisample fragment color texture fetch */
2048 nir_texop_fragment_mask_fetch
,/**< Multisample fragment mask texture fetch */
2054 enum glsl_sampler_dim sampler_dim
;
2055 nir_alu_type dest_type
;
2060 unsigned num_srcs
, coord_components
;
2061 bool is_array
, is_shadow
;
2064 * If is_shadow is true, whether this is the old-style shadow that outputs 4
2065 * components or the new-style shadow that outputs 1 component.
2067 bool is_new_style_shadow
;
2069 /* gather component selector */
2070 unsigned component
: 2;
2072 /* gather offsets */
2073 int8_t tg4_offsets
[4][2];
2075 /* True if the texture index or handle is not dynamically uniform */
2076 bool texture_non_uniform
;
2078 /* True if the sampler index or handle is not dynamically uniform */
2079 bool sampler_non_uniform
;
2081 /** The texture index
2083 * If this texture instruction has a nir_tex_src_texture_offset source,
2084 * then the texture index is given by texture_index + texture_offset.
2086 unsigned texture_index
;
2088 /** The sampler index
2090 * The following operations do not require a sampler and, as such, this
2091 * field should be ignored:
2093 * - nir_texop_txf_ms
2096 * - nir_texop_query_levels
2097 * - nir_texop_texture_samples
2098 * - nir_texop_samples_identical
2100 * If this texture instruction has a nir_tex_src_sampler_offset source,
2101 * then the sampler index is given by sampler_index + sampler_offset.
2103 unsigned sampler_index
;
2107 * Returns true if the texture operation requires a sampler as a general rule,
2108 * see the documentation of sampler_index.
2110 * Note that the specific hw/driver backend could require to a sampler
2111 * object/configuration packet in any case, for some other reason.
2114 nir_tex_instr_need_sampler(const nir_tex_instr
*instr
)
2116 switch (instr
->op
) {
2118 case nir_texop_txf_ms
:
2121 case nir_texop_query_levels
:
2122 case nir_texop_texture_samples
:
2123 case nir_texop_samples_identical
:
2130 static inline unsigned
2131 nir_tex_instr_dest_size(const nir_tex_instr
*instr
)
2133 switch (instr
->op
) {
2134 case nir_texop_txs
: {
2136 switch (instr
->sampler_dim
) {
2137 case GLSL_SAMPLER_DIM_1D
:
2138 case GLSL_SAMPLER_DIM_BUF
:
2141 case GLSL_SAMPLER_DIM_2D
:
2142 case GLSL_SAMPLER_DIM_CUBE
:
2143 case GLSL_SAMPLER_DIM_MS
:
2144 case GLSL_SAMPLER_DIM_RECT
:
2145 case GLSL_SAMPLER_DIM_EXTERNAL
:
2146 case GLSL_SAMPLER_DIM_SUBPASS
:
2149 case GLSL_SAMPLER_DIM_3D
:
2153 unreachable("not reached");
2155 if (instr
->is_array
)
2163 case nir_texop_texture_samples
:
2164 case nir_texop_query_levels
:
2165 case nir_texop_samples_identical
:
2166 case nir_texop_fragment_mask_fetch
:
2170 if (instr
->is_shadow
&& instr
->is_new_style_shadow
)
2177 /* Returns true if this texture operation queries something about the texture
2178 * rather than actually sampling it.
2181 nir_tex_instr_is_query(const nir_tex_instr
*instr
)
2183 switch (instr
->op
) {
2186 case nir_texop_texture_samples
:
2187 case nir_texop_query_levels
:
2188 case nir_texop_txf_ms_mcs
:
2195 case nir_texop_txf_ms
:
2196 case nir_texop_txf_ms_fb
:
2200 unreachable("Invalid texture opcode");
2205 nir_tex_instr_has_implicit_derivative(const nir_tex_instr
*instr
)
2207 switch (instr
->op
) {
2217 static inline nir_alu_type
2218 nir_tex_instr_src_type(const nir_tex_instr
*instr
, unsigned src
)
2220 switch (instr
->src
[src
].src_type
) {
2221 case nir_tex_src_coord
:
2222 switch (instr
->op
) {
2224 case nir_texop_txf_ms
:
2225 case nir_texop_txf_ms_fb
:
2226 case nir_texop_txf_ms_mcs
:
2227 case nir_texop_samples_identical
:
2228 return nir_type_int
;
2231 return nir_type_float
;
2234 case nir_tex_src_lod
:
2235 switch (instr
->op
) {
2238 return nir_type_int
;
2241 return nir_type_float
;
2244 case nir_tex_src_projector
:
2245 case nir_tex_src_comparator
:
2246 case nir_tex_src_bias
:
2247 case nir_tex_src_min_lod
:
2248 case nir_tex_src_ddx
:
2249 case nir_tex_src_ddy
:
2250 return nir_type_float
;
2252 case nir_tex_src_offset
:
2253 case nir_tex_src_ms_index
:
2254 case nir_tex_src_plane
:
2255 return nir_type_int
;
2257 case nir_tex_src_ms_mcs
:
2258 case nir_tex_src_texture_deref
:
2259 case nir_tex_src_sampler_deref
:
2260 case nir_tex_src_texture_offset
:
2261 case nir_tex_src_sampler_offset
:
2262 case nir_tex_src_texture_handle
:
2263 case nir_tex_src_sampler_handle
:
2264 return nir_type_uint
;
2266 case nir_num_tex_src_types
:
2267 unreachable("nir_num_tex_src_types is not a valid source type");
2270 unreachable("Invalid texture source type");
2273 static inline unsigned
2274 nir_tex_instr_src_size(const nir_tex_instr
*instr
, unsigned src
)
2276 if (instr
->src
[src
].src_type
== nir_tex_src_coord
)
2277 return instr
->coord_components
;
2279 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2280 if (instr
->src
[src
].src_type
== nir_tex_src_ms_mcs
)
2283 if (instr
->src
[src
].src_type
== nir_tex_src_ddx
||
2284 instr
->src
[src
].src_type
== nir_tex_src_ddy
) {
2285 if (instr
->is_array
)
2286 return instr
->coord_components
- 1;
2288 return instr
->coord_components
;
2291 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2292 * the offset, since a cube maps to a single face.
2294 if (instr
->src
[src
].src_type
== nir_tex_src_offset
) {
2295 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
)
2297 else if (instr
->is_array
)
2298 return instr
->coord_components
- 1;
2300 return instr
->coord_components
;
2307 nir_tex_instr_src_index(const nir_tex_instr
*instr
, nir_tex_src_type type
)
2309 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++)
2310 if (instr
->src
[i
].src_type
== type
)
2316 void nir_tex_instr_add_src(nir_tex_instr
*tex
,
2317 nir_tex_src_type src_type
,
2320 void nir_tex_instr_remove_src(nir_tex_instr
*tex
, unsigned src_idx
);
2322 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr
*tex
);
2329 nir_const_value value
[];
2330 } nir_load_const_instr
;
2333 /** Return from a function
2335 * This instruction is a classic function return. It jumps to
2336 * nir_function_impl::end_block. No return value is provided in this
2337 * instruction. Instead, the function is expected to write any return
2338 * data to a deref passed in from the caller.
2342 /** Break out of the inner-most loop
2344 * This has the same semantics as C's "break" statement.
2348 /** Jump back to the top of the inner-most loop
2350 * This has the same semantics as C's "continue" statement assuming that a
2351 * NIR loop is implemented as "while (1) { body }".
2355 /** Jumps for unstructured CFG.
2357 * As within an unstructured CFG we can't rely on block ordering we need to
2358 * place explicit jumps at the end of every block.
2368 struct nir_block
*target
;
2369 struct nir_block
*else_target
;
2372 /* creates a new SSA variable in an undefined state */
2377 } nir_ssa_undef_instr
;
2380 struct exec_node node
;
2382 /* The predecessor block corresponding to this source */
2383 struct nir_block
*pred
;
2388 #define nir_foreach_phi_src(phi_src, phi) \
2389 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2390 #define nir_foreach_phi_src_safe(phi_src, phi) \
2391 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2396 struct exec_list srcs
; /** < list of nir_phi_src */
2402 struct exec_node node
;
2405 } nir_parallel_copy_entry
;
2407 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2408 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2413 /* A list of nir_parallel_copy_entrys. The sources of all of the
2414 * entries are copied to the corresponding destinations "in parallel".
2415 * In other words, if we have two entries: a -> b and b -> a, the values
2418 struct exec_list entries
;
2419 } nir_parallel_copy_instr
;
2421 NIR_DEFINE_CAST(nir_instr_as_alu
, nir_instr
, nir_alu_instr
, instr
,
2422 type
, nir_instr_type_alu
)
2423 NIR_DEFINE_CAST(nir_instr_as_deref
, nir_instr
, nir_deref_instr
, instr
,
2424 type
, nir_instr_type_deref
)
2425 NIR_DEFINE_CAST(nir_instr_as_call
, nir_instr
, nir_call_instr
, instr
,
2426 type
, nir_instr_type_call
)
2427 NIR_DEFINE_CAST(nir_instr_as_jump
, nir_instr
, nir_jump_instr
, instr
,
2428 type
, nir_instr_type_jump
)
2429 NIR_DEFINE_CAST(nir_instr_as_tex
, nir_instr
, nir_tex_instr
, instr
,
2430 type
, nir_instr_type_tex
)
2431 NIR_DEFINE_CAST(nir_instr_as_intrinsic
, nir_instr
, nir_intrinsic_instr
, instr
,
2432 type
, nir_instr_type_intrinsic
)
2433 NIR_DEFINE_CAST(nir_instr_as_load_const
, nir_instr
, nir_load_const_instr
, instr
,
2434 type
, nir_instr_type_load_const
)
2435 NIR_DEFINE_CAST(nir_instr_as_ssa_undef
, nir_instr
, nir_ssa_undef_instr
, instr
,
2436 type
, nir_instr_type_ssa_undef
)
2437 NIR_DEFINE_CAST(nir_instr_as_phi
, nir_instr
, nir_phi_instr
, instr
,
2438 type
, nir_instr_type_phi
)
2439 NIR_DEFINE_CAST(nir_instr_as_parallel_copy
, nir_instr
,
2440 nir_parallel_copy_instr
, instr
,
2441 type
, nir_instr_type_parallel_copy
)
2444 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2445 static inline type \
2446 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2448 assert(nir_src_is_const(src)); \
2449 nir_load_const_instr *load = \
2450 nir_instr_as_load_const(src.ssa->parent_instr); \
2451 assert(comp < load->def.num_components); \
2452 return nir_const_value_as_##suffix(load->value[comp], \
2453 load->def.bit_size); \
2456 static inline type \
2457 nir_src_as_##suffix(nir_src src) \
2459 assert(nir_src_num_components(src) == 1); \
2460 return nir_src_comp_as_##suffix(src, 0); \
2463 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2464 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint
)
2465 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2466 NIR_DEFINE_SRC_AS_CONST(double, float)
2468 #undef NIR_DEFINE_SRC_AS_CONST
2477 nir_ssa_scalar_is_const(nir_ssa_scalar s
)
2479 return s
.def
->parent_instr
->type
== nir_instr_type_load_const
;
2482 static inline nir_const_value
2483 nir_ssa_scalar_as_const_value(nir_ssa_scalar s
)
2485 assert(s
.comp
< s
.def
->num_components
);
2486 nir_load_const_instr
*load
= nir_instr_as_load_const(s
.def
->parent_instr
);
2487 return load
->value
[s
.comp
];
2490 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2491 static inline type \
2492 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2494 return nir_const_value_as_##suffix( \
2495 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2498 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2499 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint
)
2500 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2501 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2503 #undef NIR_DEFINE_SCALAR_AS_CONST
2506 nir_ssa_scalar_is_alu(nir_ssa_scalar s
)
2508 return s
.def
->parent_instr
->type
== nir_instr_type_alu
;
2511 static inline nir_op
2512 nir_ssa_scalar_alu_op(nir_ssa_scalar s
)
2514 return nir_instr_as_alu(s
.def
->parent_instr
)->op
;
2517 static inline nir_ssa_scalar
2518 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s
, unsigned alu_src_idx
)
2520 nir_ssa_scalar out
= { NULL
, 0 };
2522 nir_alu_instr
*alu
= nir_instr_as_alu(s
.def
->parent_instr
);
2523 assert(alu_src_idx
< nir_op_infos
[alu
->op
].num_inputs
);
2525 /* Our component must be written */
2526 assert(s
.comp
< s
.def
->num_components
);
2527 assert(alu
->dest
.write_mask
& (1u << s
.comp
));
2529 assert(alu
->src
[alu_src_idx
].src
.is_ssa
);
2530 out
.def
= alu
->src
[alu_src_idx
].src
.ssa
;
2532 if (nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 0) {
2533 /* The ALU src is unsized so the source component follows the
2534 * destination component.
2536 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[s
.comp
];
2538 /* This is a sized source so all source components work together to
2539 * produce all the destination components. Since we need to return a
2540 * scalar, this only works if the source is a scalar.
2542 assert(nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 1);
2543 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[0];
2545 assert(out
.comp
< out
.def
->num_components
);
2554 * Control flow consists of a tree of control flow nodes, which include
2555 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2556 * instructions that always run start-to-finish. Each basic block also keeps
2557 * track of its successors (blocks which may run immediately after the current
2558 * block) and predecessors (blocks which could have run immediately before the
2559 * current block). Each function also has a start block and an end block which
2560 * all return statements point to (which is always empty). Together, all the
2561 * blocks with their predecessors and successors make up the control flow
2562 * graph (CFG) of the function. There are helpers that modify the tree of
2563 * control flow nodes while modifying the CFG appropriately; these should be
2564 * used instead of modifying the tree directly.
2571 nir_cf_node_function
2574 typedef struct nir_cf_node
{
2575 struct exec_node node
;
2576 nir_cf_node_type type
;
2577 struct nir_cf_node
*parent
;
2580 typedef struct nir_block
{
2581 nir_cf_node cf_node
;
2583 struct exec_list instr_list
; /** < list of nir_instr */
2585 /** generic block index; generated by nir_index_blocks */
2589 * Each block can only have up to 2 successors, so we put them in a simple
2590 * array - no need for anything more complicated.
2592 struct nir_block
*successors
[2];
2594 /* Set of nir_block predecessors in the CFG */
2595 struct set
*predecessors
;
2598 * this node's immediate dominator in the dominance tree - set to NULL for
2601 struct nir_block
*imm_dom
;
2603 /* This node's children in the dominance tree */
2604 unsigned num_dom_children
;
2605 struct nir_block
**dom_children
;
2607 /* Set of nir_blocks on the dominance frontier of this block */
2608 struct set
*dom_frontier
;
2611 * These two indices have the property that dom_{pre,post}_index for each
2612 * child of this block in the dominance tree will always be between
2613 * dom_pre_index and dom_post_index for this block, which makes testing if
2614 * a given block is dominated by another block an O(1) operation.
2616 int16_t dom_pre_index
, dom_post_index
;
2618 /* SSA def live in and out for this block; used for liveness analysis.
2619 * Indexed by ssa_def->index
2621 BITSET_WORD
*live_in
;
2622 BITSET_WORD
*live_out
;
2626 nir_block_is_reachable(nir_block
*b
)
2628 /* See also nir_block_dominates */
2629 return b
->dom_post_index
!= -1;
2632 static inline nir_instr
*
2633 nir_block_first_instr(nir_block
*block
)
2635 struct exec_node
*head
= exec_list_get_head(&block
->instr_list
);
2636 return exec_node_data(nir_instr
, head
, node
);
2639 static inline nir_instr
*
2640 nir_block_last_instr(nir_block
*block
)
2642 struct exec_node
*tail
= exec_list_get_tail(&block
->instr_list
);
2643 return exec_node_data(nir_instr
, tail
, node
);
2647 nir_block_ends_in_jump(nir_block
*block
)
2649 return !exec_list_is_empty(&block
->instr_list
) &&
2650 nir_block_last_instr(block
)->type
== nir_instr_type_jump
;
2653 #define nir_foreach_instr(instr, block) \
2654 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2655 #define nir_foreach_instr_reverse(instr, block) \
2656 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2657 #define nir_foreach_instr_safe(instr, block) \
2658 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2659 #define nir_foreach_instr_reverse_safe(instr, block) \
2660 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2663 nir_selection_control_none
= 0x0,
2664 nir_selection_control_flatten
= 0x1,
2665 nir_selection_control_dont_flatten
= 0x2,
2666 } nir_selection_control
;
2668 typedef struct nir_if
{
2669 nir_cf_node cf_node
;
2671 nir_selection_control control
;
2673 struct exec_list then_list
; /** < list of nir_cf_node */
2674 struct exec_list else_list
; /** < list of nir_cf_node */
2680 /** Instruction that generates nif::condition. */
2681 nir_instr
*conditional_instr
;
2683 /** Block within ::nif that has the break instruction. */
2684 nir_block
*break_block
;
2686 /** Last block for the then- or else-path that does not contain the break. */
2687 nir_block
*continue_from_block
;
2689 /** True when ::break_block is in the else-path of ::nif. */
2690 bool continue_from_then
;
2693 /* This is true if the terminators exact trip count is unknown. For
2696 * for (int i = 0; i < imin(x, 4); i++)
2699 * Here loop analysis would have set a max_trip_count of 4 however we dont
2700 * know for sure that this is the exact trip count.
2702 bool exact_trip_count_unknown
;
2704 struct list_head loop_terminator_link
;
2705 } nir_loop_terminator
;
2708 /* Estimated cost (in number of instructions) of the loop */
2709 unsigned instr_cost
;
2711 /* Guessed trip count based on array indexing */
2712 unsigned guessed_trip_count
;
2714 /* Maximum number of times the loop is run (if known) */
2715 unsigned max_trip_count
;
2717 /* Do we know the exact number of times the loop will be run */
2718 bool exact_trip_count_known
;
2720 /* Unroll the loop regardless of its size */
2723 /* Does the loop contain complex loop terminators, continues or other
2724 * complex behaviours? If this is true we can't rely on
2725 * loop_terminator_list to be complete or accurate.
2729 nir_loop_terminator
*limiting_terminator
;
2731 /* A list of loop_terminators terminating this loop. */
2732 struct list_head loop_terminator_list
;
2736 nir_loop_control_none
= 0x0,
2737 nir_loop_control_unroll
= 0x1,
2738 nir_loop_control_dont_unroll
= 0x2,
2742 nir_cf_node cf_node
;
2744 struct exec_list body
; /** < list of nir_cf_node */
2746 nir_loop_info
*info
;
2747 nir_loop_control control
;
2748 bool partially_unrolled
;
2752 * Various bits of metadata that can may be created or required by
2753 * optimization and analysis passes
2756 nir_metadata_none
= 0x0,
2758 /** Indicates that nir_block::index values are valid.
2760 * The start block has index 0 and they increase through a natural walk of
2761 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2762 * every block index is in the range [0, nir_function_impl::num_blocks].
2764 * A pass can preserve this metadata type if it doesn't touch the CFG.
2766 nir_metadata_block_index
= 0x1,
2768 /** Indicates that block dominance information is valid
2772 * - nir_block::num_dom_children
2773 * - nir_block::dom_children
2774 * - nir_block::dom_frontier
2775 * - nir_block::dom_pre_index
2776 * - nir_block::dom_post_index
2778 * A pass can preserve this metadata type if it doesn't touch the CFG.
2780 nir_metadata_dominance
= 0x2,
2782 /** Indicates that SSA def data-flow liveness information is valid
2786 * - nir_ssa_def::live_index
2787 * - nir_block::live_in
2788 * - nir_block::live_out
2790 * A pass can preserve this metadata type if it never adds or removes any
2791 * SSA defs (most passes shouldn't preserve this metadata type).
2793 nir_metadata_live_ssa_defs
= 0x4,
2795 /** A dummy metadata value to track when a pass forgot to call
2796 * nir_metadata_preserve.
2798 * A pass should always clear this value even if it doesn't make any
2799 * progress to indicate that it thought about preserving metadata.
2801 nir_metadata_not_properly_reset
= 0x8,
2803 /** Indicates that loop analysis information is valid.
2805 * This includes everything pointed to by nir_loop::info.
2807 * A pass can preserve this metadata type if it is guaranteed to not affect
2808 * any loop metadata. However, since loop metadata includes things like
2809 * loop counts which depend on arithmetic in the loop, this is very hard to
2810 * determine. Most passes shouldn't preserve this metadata type.
2812 nir_metadata_loop_analysis
= 0x10,
2816 * This includes all nir_metadata flags except not_properly_reset. Passes
2817 * which do not change the shader in any way should call
2819 * nir_metadata_preserve(impl, nir_metadata_all);
2821 nir_metadata_all
= ~nir_metadata_not_properly_reset
,
2823 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_metadata
)
2826 nir_cf_node cf_node
;
2828 /** pointer to the function of which this is an implementation */
2829 struct nir_function
*function
;
2831 struct exec_list body
; /** < list of nir_cf_node */
2833 nir_block
*end_block
;
2835 /** list for all local variables in the function */
2836 struct exec_list locals
;
2838 /** list of local registers in the function */
2839 struct exec_list registers
;
2841 /** next available local register index */
2844 /** next available SSA value index */
2847 /* total number of basic blocks, only valid when block_index_dirty = false */
2848 unsigned num_blocks
;
2850 /** True if this nir_function_impl uses structured control-flow
2852 * Structured nir_function_impls have different validation rules.
2856 nir_metadata valid_metadata
;
2857 } nir_function_impl
;
2859 #define nir_foreach_function_temp_variable(var, impl) \
2860 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2862 #define nir_foreach_function_temp_variable_safe(var, impl) \
2863 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2865 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2866 nir_start_block(nir_function_impl
*impl
)
2868 return (nir_block
*) impl
->body
.head_sentinel
.next
;
2871 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2872 nir_impl_last_block(nir_function_impl
*impl
)
2874 return (nir_block
*) impl
->body
.tail_sentinel
.prev
;
2877 static inline nir_cf_node
*
2878 nir_cf_node_next(nir_cf_node
*node
)
2880 struct exec_node
*next
= exec_node_get_next(&node
->node
);
2881 if (exec_node_is_tail_sentinel(next
))
2884 return exec_node_data(nir_cf_node
, next
, node
);
2887 static inline nir_cf_node
*
2888 nir_cf_node_prev(nir_cf_node
*node
)
2890 struct exec_node
*prev
= exec_node_get_prev(&node
->node
);
2891 if (exec_node_is_head_sentinel(prev
))
2894 return exec_node_data(nir_cf_node
, prev
, node
);
2898 nir_cf_node_is_first(const nir_cf_node
*node
)
2900 return exec_node_is_head_sentinel(node
->node
.prev
);
2904 nir_cf_node_is_last(const nir_cf_node
*node
)
2906 return exec_node_is_tail_sentinel(node
->node
.next
);
2909 NIR_DEFINE_CAST(nir_cf_node_as_block
, nir_cf_node
, nir_block
, cf_node
,
2910 type
, nir_cf_node_block
)
2911 NIR_DEFINE_CAST(nir_cf_node_as_if
, nir_cf_node
, nir_if
, cf_node
,
2912 type
, nir_cf_node_if
)
2913 NIR_DEFINE_CAST(nir_cf_node_as_loop
, nir_cf_node
, nir_loop
, cf_node
,
2914 type
, nir_cf_node_loop
)
2915 NIR_DEFINE_CAST(nir_cf_node_as_function
, nir_cf_node
,
2916 nir_function_impl
, cf_node
, type
, nir_cf_node_function
)
2918 static inline nir_block
*
2919 nir_if_first_then_block(nir_if
*if_stmt
)
2921 struct exec_node
*head
= exec_list_get_head(&if_stmt
->then_list
);
2922 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2925 static inline nir_block
*
2926 nir_if_last_then_block(nir_if
*if_stmt
)
2928 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->then_list
);
2929 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2932 static inline nir_block
*
2933 nir_if_first_else_block(nir_if
*if_stmt
)
2935 struct exec_node
*head
= exec_list_get_head(&if_stmt
->else_list
);
2936 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2939 static inline nir_block
*
2940 nir_if_last_else_block(nir_if
*if_stmt
)
2942 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->else_list
);
2943 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2946 static inline nir_block
*
2947 nir_loop_first_block(nir_loop
*loop
)
2949 struct exec_node
*head
= exec_list_get_head(&loop
->body
);
2950 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2953 static inline nir_block
*
2954 nir_loop_last_block(nir_loop
*loop
)
2956 struct exec_node
*tail
= exec_list_get_tail(&loop
->body
);
2957 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2961 * Return true if this list of cf_nodes contains a single empty block.
2964 nir_cf_list_is_empty_block(struct exec_list
*cf_list
)
2966 if (exec_list_is_singular(cf_list
)) {
2967 struct exec_node
*head
= exec_list_get_head(cf_list
);
2969 nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2970 return exec_list_is_empty(&block
->instr_list
);
2976 uint8_t num_components
;
2980 typedef struct nir_function
{
2981 struct exec_node node
;
2984 struct nir_shader
*shader
;
2986 unsigned num_params
;
2987 nir_parameter
*params
;
2989 /** The implementation of this function.
2991 * If the function is only declared and not implemented, this is NULL.
2993 nir_function_impl
*impl
;
2999 nir_lower_imul64
= (1 << 0),
3000 nir_lower_isign64
= (1 << 1),
3001 /** Lower all int64 modulus and division opcodes */
3002 nir_lower_divmod64
= (1 << 2),
3003 /** Lower all 64-bit umul_high and imul_high opcodes */
3004 nir_lower_imul_high64
= (1 << 3),
3005 nir_lower_mov64
= (1 << 4),
3006 nir_lower_icmp64
= (1 << 5),
3007 nir_lower_iadd64
= (1 << 6),
3008 nir_lower_iabs64
= (1 << 7),
3009 nir_lower_ineg64
= (1 << 8),
3010 nir_lower_logic64
= (1 << 9),
3011 nir_lower_minmax64
= (1 << 10),
3012 nir_lower_shift64
= (1 << 11),
3013 nir_lower_imul_2x32_64
= (1 << 12),
3014 nir_lower_extract64
= (1 << 13),
3015 nir_lower_ufind_msb64
= (1 << 14),
3016 nir_lower_bit_count64
= (1 << 15),
3017 } nir_lower_int64_options
;
3020 nir_lower_drcp
= (1 << 0),
3021 nir_lower_dsqrt
= (1 << 1),
3022 nir_lower_drsq
= (1 << 2),
3023 nir_lower_dtrunc
= (1 << 3),
3024 nir_lower_dfloor
= (1 << 4),
3025 nir_lower_dceil
= (1 << 5),
3026 nir_lower_dfract
= (1 << 6),
3027 nir_lower_dround_even
= (1 << 7),
3028 nir_lower_dmod
= (1 << 8),
3029 nir_lower_dsub
= (1 << 9),
3030 nir_lower_ddiv
= (1 << 10),
3031 nir_lower_fp64_full_software
= (1 << 11),
3032 } nir_lower_doubles_options
;
3035 nir_divergence_single_prim_per_subgroup
= (1 << 0),
3036 nir_divergence_single_patch_per_tcs_subgroup
= (1 << 1),
3037 nir_divergence_single_patch_per_tes_subgroup
= (1 << 2),
3038 nir_divergence_view_index_uniform
= (1 << 3),
3039 } nir_divergence_options
;
3041 typedef struct nir_shader_compiler_options
{
3047 /** Lowers flrp when it does not support doubles */
3054 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
3055 bool lower_bitfield_extract
;
3056 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
3057 bool lower_bitfield_extract_to_shifts
;
3058 /** Lowers bitfield_insert to bfi/bfm */
3059 bool lower_bitfield_insert
;
3060 /** Lowers bitfield_insert to compares, and shifts. */
3061 bool lower_bitfield_insert_to_shifts
;
3062 /** Lowers bitfield_insert to bfm/bitfield_select. */
3063 bool lower_bitfield_insert_to_bitfield_select
;
3064 /** Lowers bitfield_reverse to shifts. */
3065 bool lower_bitfield_reverse
;
3066 /** Lowers bit_count to shifts. */
3067 bool lower_bit_count
;
3068 /** Lowers ifind_msb to compare and ufind_msb */
3069 bool lower_ifind_msb
;
3070 /** Lowers find_lsb to ufind_msb and logic ops */
3071 bool lower_find_lsb
;
3072 bool lower_uadd_carry
;
3073 bool lower_usub_borrow
;
3074 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
3075 bool lower_mul_high
;
3076 /** lowers fneg and ineg to fsub and isub. */
3078 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
3081 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fneu} + b2f: */
3084 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
3085 bool lower_vector_cmp
;
3087 /** enables rules to lower idiv by power-of-two: */
3090 /** enable rules to avoid bit ops */
3093 /** enables rules to lower isign to imin+imax */
3096 /** enables rules to lower fsign to fsub and flt */
3099 /** enables rules to lower iabs to ineg+imax */
3102 /* lower fdph to fdot4 */
3105 /** lower fdot to fmul and fsum/fadd. */
3108 /* Does the native fdot instruction replicate its result for four
3109 * components? If so, then opt_algebraic_late will turn all fdotN
3110 * instructions into fdot_replicatedN instructions.
3112 bool fdot_replicates
;
3114 /** lowers ffloor to fsub+ffract: */
3117 /** lowers ffract to fsub+ffloor: */
3120 /** lowers fceil to fneg+ffloor+fneg: */
3127 bool lower_pack_half_2x16
;
3128 bool lower_pack_unorm_2x16
;
3129 bool lower_pack_snorm_2x16
;
3130 bool lower_pack_unorm_4x8
;
3131 bool lower_pack_snorm_4x8
;
3132 bool lower_pack_64_2x32_split
;
3133 bool lower_pack_32_2x16_split
;
3134 bool lower_unpack_half_2x16
;
3135 bool lower_unpack_unorm_2x16
;
3136 bool lower_unpack_snorm_2x16
;
3137 bool lower_unpack_unorm_4x8
;
3138 bool lower_unpack_snorm_4x8
;
3139 bool lower_unpack_64_2x32_split
;
3140 bool lower_unpack_32_2x16_split
;
3142 bool lower_pack_split
;
3144 bool lower_extract_byte
;
3145 bool lower_extract_word
;
3147 bool lower_all_io_to_temps
;
3148 bool lower_all_io_to_elements
;
3150 /* Indicates that the driver only has zero-based vertex id */
3151 bool vertex_id_zero_based
;
3154 * If enabled, gl_BaseVertex will be lowered as:
3155 * is_indexed_draw (~0/0) & firstvertex
3157 bool lower_base_vertex
;
3160 * If enabled, gl_HelperInvocation will be lowered as:
3162 * !((1 << sample_id) & sample_mask_in))
3164 * This depends on some possibly hw implementation details, which may
3165 * not be true for all hw. In particular that the FS is only executed
3166 * for covered samples or for helper invocations. So, do not blindly
3167 * enable this option.
3169 * Note: See also issue #22 in ARB_shader_image_load_store
3171 bool lower_helper_invocation
;
3174 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3176 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3177 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3179 bool optimize_sample_mask_in
;
3181 bool lower_cs_local_index_from_id
;
3182 bool lower_cs_local_id_from_index
;
3184 /* Prevents lowering global_invocation_id to be in terms of work_group_id */
3185 bool has_cs_global_id
;
3187 bool lower_device_index_to_zero
;
3189 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3190 bool lower_wpos_pntc
;
3193 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3194 * lowered to simple arithmetic.
3196 * If this flag is set, the lowering will be applied to all bit-sizes of
3197 * these instructions.
3199 * \sa ::lower_hadd64
3204 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3205 * should be lowered to simple arithmetic.
3207 * If this flag is set, the lowering will be applied to only 64-bit
3208 * versions of these instructions.
3215 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3218 * If this flag is set, the lowering will be applied to all bit-sizes of
3219 * these instructions.
3221 * \sa ::lower_usub_sat64
3226 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3229 * \sa ::lower_add_sat
3231 bool lower_usub_sat64
;
3234 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3235 * for IO purposes and would prefer loads/stores be vectorized.
3238 bool lower_to_scalar
;
3241 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3243 bool vectorize_vec2_16bit
;
3246 * Should the linker unify inputs_read/outputs_written between adjacent
3247 * shader stages which are linked into a single program?
3249 bool unify_interfaces
;
3252 * Should nir_lower_io() create load_interpolated_input intrinsics?
3254 * If not, it generates regular load_input intrinsics and interpolation
3255 * information must be inferred from the list of input nir_variables.
3257 bool use_interpolated_input_intrinsics
;
3259 /* Lowers when 32x32->64 bit multiplication is not supported */
3260 bool lower_mul_2x32_64
;
3262 /* Lowers when rotate instruction is not supported */
3266 * Backend supports imul24, and would like to use it (when possible)
3267 * for address/offset calculation. If true, driver should call
3268 * nir_lower_amul(). (If not set, amul will automatically be lowered
3273 /** Backend supports umul24, if not set umul24 will automatically be lowered
3274 * to imul with masked inputs */
3277 /** Backend supports umad24, if not set umad24 will automatically be lowered
3278 * to imul with masked inputs and iadd */
3281 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3282 * memory and control barrier intrinsics based on GLSL.
3284 bool use_scoped_barrier
;
3287 * Is this the Intel vec4 backend?
3289 * Used to inhibit algebraic optimizations that are known to be harmful on
3290 * the Intel vec4 backend. This is generally applicable to any
3291 * optimization that might cause more immediate values to be used in
3292 * 3-source (e.g., ffma and flrp) instructions.
3296 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3297 bool lower_bfe_with_two_constants
;
3299 /** Whether 8-bit ALU is supported. */
3300 bool support_8bit_alu
;
3302 /** Whether 16-bit ALU is supported. */
3303 bool support_16bit_alu
;
3305 unsigned max_unroll_iterations
;
3307 nir_lower_int64_options lower_int64_options
;
3308 nir_lower_doubles_options lower_doubles_options
;
3309 } nir_shader_compiler_options
;
3311 typedef struct nir_shader
{
3312 /** list of uniforms (nir_variable) */
3313 struct exec_list variables
;
3315 /** Set of driver-specific options for the shader.
3317 * The memory for the options is expected to be kept in a single static
3318 * copy by the driver.
3320 const struct nir_shader_compiler_options
*options
;
3322 /** Various bits of compile-time information about a given shader */
3323 struct shader_info info
;
3325 struct exec_list functions
; /** < list of nir_function */
3328 * The size of the variable space for load_input_*, load_uniform_*, etc.
3329 * intrinsics. This is in back-end specific units which is likely one of
3330 * bytes, dwords, or vec4s depending on context and back-end.
3332 unsigned num_inputs
, num_uniforms
, num_outputs
;
3334 /** Size in bytes of required shared memory */
3335 unsigned shared_size
;
3337 /** Size in bytes of required scratch space */
3338 unsigned scratch_size
;
3340 /** Constant data associated with this shader.
3342 * Constant data is loaded through load_constant intrinsics (as compared to
3343 * the NIR load_const instructions which have the constant value inlined
3344 * into them). This is usually generated by nir_opt_large_constants (so
3345 * shaders don't have to load_const into a temporary array when they want
3346 * to indirect on a const array).
3348 void *constant_data
;
3349 /** Size of the constant data associated with the shader, in bytes */
3350 unsigned constant_data_size
;
3353 #define nir_foreach_function(func, shader) \
3354 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3356 static inline nir_function_impl
*
3357 nir_shader_get_entrypoint(nir_shader
*shader
)
3359 nir_function
*func
= NULL
;
3361 nir_foreach_function(function
, shader
) {
3362 assert(func
== NULL
);
3363 if (function
->is_entrypoint
) {
3374 assert(func
->num_params
== 0);
3379 nir_shader
*nir_shader_create(void *mem_ctx
,
3380 gl_shader_stage stage
,
3381 const nir_shader_compiler_options
*options
,
3384 nir_register
*nir_local_reg_create(nir_function_impl
*impl
);
3386 void nir_reg_remove(nir_register
*reg
);
3388 /** Adds a variable to the appropriate list in nir_shader */
3389 void nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
);
3392 nir_function_impl_add_variable(nir_function_impl
*impl
, nir_variable
*var
)
3394 assert(var
->data
.mode
== nir_var_function_temp
);
3395 exec_list_push_tail(&impl
->locals
, &var
->node
);
3398 /** creates a variable, sets a few defaults, and adds it to the list */
3399 nir_variable
*nir_variable_create(nir_shader
*shader
,
3400 nir_variable_mode mode
,
3401 const struct glsl_type
*type
,
3403 /** creates a local variable and adds it to the list */
3404 nir_variable
*nir_local_variable_create(nir_function_impl
*impl
,
3405 const struct glsl_type
*type
,
3408 nir_variable
*nir_find_variable_with_location(nir_shader
*shader
,
3409 nir_variable_mode mode
,
3412 nir_variable
*nir_find_variable_with_driver_location(nir_shader
*shader
,
3413 nir_variable_mode mode
,
3416 /** creates a function and adds it to the shader's list of functions */
3417 nir_function
*nir_function_create(nir_shader
*shader
, const char *name
);
3419 nir_function_impl
*nir_function_impl_create(nir_function
*func
);
3420 /** creates a function_impl that isn't tied to any particular function */
3421 nir_function_impl
*nir_function_impl_create_bare(nir_shader
*shader
);
3423 nir_block
*nir_block_create(nir_shader
*shader
);
3424 nir_if
*nir_if_create(nir_shader
*shader
);
3425 nir_loop
*nir_loop_create(nir_shader
*shader
);
3427 nir_function_impl
*nir_cf_node_get_function(nir_cf_node
*node
);
3429 /** requests that the given pieces of metadata be generated */
3430 void nir_metadata_require(nir_function_impl
*impl
, nir_metadata required
, ...);
3431 /** dirties all but the preserved metadata */
3432 void nir_metadata_preserve(nir_function_impl
*impl
, nir_metadata preserved
);
3433 /** Preserves all metadata for the given shader */
3434 void nir_shader_preserve_all_metadata(nir_shader
*shader
);
3436 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3437 nir_alu_instr
*nir_alu_instr_create(nir_shader
*shader
, nir_op op
);
3439 nir_deref_instr
*nir_deref_instr_create(nir_shader
*shader
,
3440 nir_deref_type deref_type
);
3442 nir_jump_instr
*nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
);
3444 nir_load_const_instr
*nir_load_const_instr_create(nir_shader
*shader
,
3445 unsigned num_components
,
3448 nir_intrinsic_instr
*nir_intrinsic_instr_create(nir_shader
*shader
,
3449 nir_intrinsic_op op
);
3451 nir_call_instr
*nir_call_instr_create(nir_shader
*shader
,
3452 nir_function
*callee
);
3454 nir_tex_instr
*nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
);
3456 nir_phi_instr
*nir_phi_instr_create(nir_shader
*shader
);
3458 nir_parallel_copy_instr
*nir_parallel_copy_instr_create(nir_shader
*shader
);
3460 nir_ssa_undef_instr
*nir_ssa_undef_instr_create(nir_shader
*shader
,
3461 unsigned num_components
,
3464 nir_const_value
nir_alu_binop_identity(nir_op binop
, unsigned bit_size
);
3467 * NIR Cursors and Instruction Insertion API
3470 * A tiny struct representing a point to insert/extract instructions or
3471 * control flow nodes. Helps reduce the combinatorial explosion of possible
3472 * points to insert/extract.
3474 * \sa nir_control_flow.h
3477 nir_cursor_before_block
,
3478 nir_cursor_after_block
,
3479 nir_cursor_before_instr
,
3480 nir_cursor_after_instr
,
3481 } nir_cursor_option
;
3484 nir_cursor_option option
;
3491 static inline nir_block
*
3492 nir_cursor_current_block(nir_cursor cursor
)
3494 if (cursor
.option
== nir_cursor_before_instr
||
3495 cursor
.option
== nir_cursor_after_instr
) {
3496 return cursor
.instr
->block
;
3498 return cursor
.block
;
3502 bool nir_cursors_equal(nir_cursor a
, nir_cursor b
);
3504 static inline nir_cursor
3505 nir_before_block(nir_block
*block
)
3508 cursor
.option
= nir_cursor_before_block
;
3509 cursor
.block
= block
;
3513 static inline nir_cursor
3514 nir_after_block(nir_block
*block
)
3517 cursor
.option
= nir_cursor_after_block
;
3518 cursor
.block
= block
;
3522 static inline nir_cursor
3523 nir_before_instr(nir_instr
*instr
)
3526 cursor
.option
= nir_cursor_before_instr
;
3527 cursor
.instr
= instr
;
3531 static inline nir_cursor
3532 nir_after_instr(nir_instr
*instr
)
3535 cursor
.option
= nir_cursor_after_instr
;
3536 cursor
.instr
= instr
;
3540 static inline nir_cursor
3541 nir_after_block_before_jump(nir_block
*block
)
3543 nir_instr
*last_instr
= nir_block_last_instr(block
);
3544 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
) {
3545 return nir_before_instr(last_instr
);
3547 return nir_after_block(block
);
3551 static inline nir_cursor
3552 nir_before_src(nir_src
*src
, bool is_if_condition
)
3554 if (is_if_condition
) {
3555 nir_block
*prev_block
=
3556 nir_cf_node_as_block(nir_cf_node_prev(&src
->parent_if
->cf_node
));
3557 assert(!nir_block_ends_in_jump(prev_block
));
3558 return nir_after_block(prev_block
);
3559 } else if (src
->parent_instr
->type
== nir_instr_type_phi
) {
3561 nir_phi_instr
*cond_phi
= nir_instr_as_phi(src
->parent_instr
);
3563 nir_foreach_phi_src(phi_src
, cond_phi
) {
3564 if (phi_src
->src
.ssa
== src
->ssa
) {
3571 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3572 * to have a more specific name.
3574 nir_phi_src
*phi_src
= LIST_ENTRY(nir_phi_src
, src
, src
);
3575 return nir_after_block_before_jump(phi_src
->pred
);
3577 return nir_before_instr(src
->parent_instr
);
3581 static inline nir_cursor
3582 nir_before_cf_node(nir_cf_node
*node
)
3584 if (node
->type
== nir_cf_node_block
)
3585 return nir_before_block(nir_cf_node_as_block(node
));
3587 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node
)));
3590 static inline nir_cursor
3591 nir_after_cf_node(nir_cf_node
*node
)
3593 if (node
->type
== nir_cf_node_block
)
3594 return nir_after_block(nir_cf_node_as_block(node
));
3596 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node
)));
3599 static inline nir_cursor
3600 nir_after_phis(nir_block
*block
)
3602 nir_foreach_instr(instr
, block
) {
3603 if (instr
->type
!= nir_instr_type_phi
)
3604 return nir_before_instr(instr
);
3606 return nir_after_block(block
);
3609 static inline nir_cursor
3610 nir_after_cf_node_and_phis(nir_cf_node
*node
)
3612 if (node
->type
== nir_cf_node_block
)
3613 return nir_after_block(nir_cf_node_as_block(node
));
3615 nir_block
*block
= nir_cf_node_as_block(nir_cf_node_next(node
));
3617 return nir_after_phis(block
);
3620 static inline nir_cursor
3621 nir_before_cf_list(struct exec_list
*cf_list
)
3623 nir_cf_node
*first_node
= exec_node_data(nir_cf_node
,
3624 exec_list_get_head(cf_list
), node
);
3625 return nir_before_cf_node(first_node
);
3628 static inline nir_cursor
3629 nir_after_cf_list(struct exec_list
*cf_list
)
3631 nir_cf_node
*last_node
= exec_node_data(nir_cf_node
,
3632 exec_list_get_tail(cf_list
), node
);
3633 return nir_after_cf_node(last_node
);
3637 * Insert a NIR instruction at the given cursor.
3639 * Note: This does not update the cursor.
3641 void nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
);
3644 nir_instr_insert_before(nir_instr
*instr
, nir_instr
*before
)
3646 nir_instr_insert(nir_before_instr(instr
), before
);
3650 nir_instr_insert_after(nir_instr
*instr
, nir_instr
*after
)
3652 nir_instr_insert(nir_after_instr(instr
), after
);
3656 nir_instr_insert_before_block(nir_block
*block
, nir_instr
*before
)
3658 nir_instr_insert(nir_before_block(block
), before
);
3662 nir_instr_insert_after_block(nir_block
*block
, nir_instr
*after
)
3664 nir_instr_insert(nir_after_block(block
), after
);
3668 nir_instr_insert_before_cf(nir_cf_node
*node
, nir_instr
*before
)
3670 nir_instr_insert(nir_before_cf_node(node
), before
);
3674 nir_instr_insert_after_cf(nir_cf_node
*node
, nir_instr
*after
)
3676 nir_instr_insert(nir_after_cf_node(node
), after
);
3680 nir_instr_insert_before_cf_list(struct exec_list
*list
, nir_instr
*before
)
3682 nir_instr_insert(nir_before_cf_list(list
), before
);
3686 nir_instr_insert_after_cf_list(struct exec_list
*list
, nir_instr
*after
)
3688 nir_instr_insert(nir_after_cf_list(list
), after
);
3691 void nir_instr_remove_v(nir_instr
*instr
);
3693 static inline nir_cursor
3694 nir_instr_remove(nir_instr
*instr
)
3697 nir_instr
*prev
= nir_instr_prev(instr
);
3699 cursor
= nir_after_instr(prev
);
3701 cursor
= nir_before_block(instr
->block
);
3703 nir_instr_remove_v(instr
);
3709 nir_ssa_def
*nir_instr_ssa_def(nir_instr
*instr
);
3711 typedef bool (*nir_foreach_ssa_def_cb
)(nir_ssa_def
*def
, void *state
);
3712 typedef bool (*nir_foreach_dest_cb
)(nir_dest
*dest
, void *state
);
3713 typedef bool (*nir_foreach_src_cb
)(nir_src
*src
, void *state
);
3714 bool nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
,
3716 bool nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
);
3717 bool nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
);
3718 bool nir_foreach_phi_src_leaving_block(nir_block
*instr
,
3719 nir_foreach_src_cb cb
,
3722 nir_const_value
*nir_src_as_const_value(nir_src src
);
3724 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3725 static inline c_type * \
3726 nir_src_as_ ## name (nir_src src) \
3728 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3729 ? cast_macro(src.ssa->parent_instr) : NULL; \
3732 NIR_SRC_AS_(alu_instr
, nir_alu_instr
, nir_instr_type_alu
, nir_instr_as_alu
)
3733 NIR_SRC_AS_(intrinsic
, nir_intrinsic_instr
,
3734 nir_instr_type_intrinsic
, nir_instr_as_intrinsic
)
3735 NIR_SRC_AS_(deref
, nir_deref_instr
, nir_instr_type_deref
, nir_instr_as_deref
)
3737 bool nir_src_is_dynamically_uniform(nir_src src
);
3738 bool nir_srcs_equal(nir_src src1
, nir_src src2
);
3739 bool nir_instrs_equal(const nir_instr
*instr1
, const nir_instr
*instr2
);
3740 void nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
);
3741 void nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
);
3742 void nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
);
3743 void nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
,
3746 void nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
3747 unsigned num_components
, unsigned bit_size
,
3749 void nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
3750 unsigned num_components
, unsigned bit_size
,
3753 nir_ssa_dest_init_for_type(nir_instr
*instr
, nir_dest
*dest
,
3754 const struct glsl_type
*type
,
3757 assert(glsl_type_is_vector_or_scalar(type
));
3758 nir_ssa_dest_init(instr
, dest
, glsl_get_components(type
),
3759 glsl_get_bit_size(type
), name
);
3761 void nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
);
3762 void nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
3763 nir_instr
*after_me
);
3765 nir_component_mask_t
nir_ssa_def_components_read(const nir_ssa_def
*def
);
3768 /** Returns the next block, disregarding structure
3770 * The ordering is deterministic but has no guarantees beyond that. In
3771 * particular, it is not guaranteed to be dominance-preserving.
3773 nir_block
*nir_block_unstructured_next(nir_block
*block
);
3774 nir_block
*nir_unstructured_start_block(nir_function_impl
*impl
);
3776 #define nir_foreach_block_unstructured(block, impl) \
3777 for (nir_block *block = nir_unstructured_start_block(impl); block != NULL; \
3778 block = nir_block_unstructured_next(block))
3780 #define nir_foreach_block_unstructured_safe(block, impl) \
3781 for (nir_block *block = nir_unstructured_start_block(impl), \
3782 *next = nir_block_unstructured_next(block); \
3784 block = next, next = nir_block_unstructured_next(block))
3787 * finds the next basic block in source-code order, returns NULL if there is
3791 nir_block
*nir_block_cf_tree_next(nir_block
*block
);
3793 /* Performs the opposite of nir_block_cf_tree_next() */
3795 nir_block
*nir_block_cf_tree_prev(nir_block
*block
);
3797 /* Gets the first block in a CF node in source-code order */
3799 nir_block
*nir_cf_node_cf_tree_first(nir_cf_node
*node
);
3801 /* Gets the last block in a CF node in source-code order */
3803 nir_block
*nir_cf_node_cf_tree_last(nir_cf_node
*node
);
3805 /* Gets the next block after a CF node in source-code order */
3807 nir_block
*nir_cf_node_cf_tree_next(nir_cf_node
*node
);
3809 /* Macros for loops that visit blocks in source-code order */
3811 #define nir_foreach_block(block, impl) \
3812 for (nir_block *block = nir_start_block(impl); block != NULL; \
3813 block = nir_block_cf_tree_next(block))
3815 #define nir_foreach_block_safe(block, impl) \
3816 for (nir_block *block = nir_start_block(impl), \
3817 *next = nir_block_cf_tree_next(block); \
3819 block = next, next = nir_block_cf_tree_next(block))
3821 #define nir_foreach_block_reverse(block, impl) \
3822 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3823 block = nir_block_cf_tree_prev(block))
3825 #define nir_foreach_block_reverse_safe(block, impl) \
3826 for (nir_block *block = nir_impl_last_block(impl), \
3827 *prev = nir_block_cf_tree_prev(block); \
3829 block = prev, prev = nir_block_cf_tree_prev(block))
3831 #define nir_foreach_block_in_cf_node(block, node) \
3832 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3833 block != nir_cf_node_cf_tree_next(node); \
3834 block = nir_block_cf_tree_next(block))
3836 /* If the following CF node is an if, this function returns that if.
3837 * Otherwise, it returns NULL.
3839 nir_if
*nir_block_get_following_if(nir_block
*block
);
3841 nir_loop
*nir_block_get_following_loop(nir_block
*block
);
3843 void nir_index_local_regs(nir_function_impl
*impl
);
3844 void nir_index_ssa_defs(nir_function_impl
*impl
);
3845 unsigned nir_index_instrs(nir_function_impl
*impl
);
3847 void nir_index_blocks(nir_function_impl
*impl
);
3849 unsigned nir_shader_index_vars(nir_shader
*shader
, nir_variable_mode modes
);
3850 unsigned nir_function_impl_index_vars(nir_function_impl
*impl
);
3852 void nir_print_shader(nir_shader
*shader
, FILE *fp
);
3853 void nir_print_shader_annotated(nir_shader
*shader
, FILE *fp
, struct hash_table
*errors
);
3854 void nir_print_instr(const nir_instr
*instr
, FILE *fp
);
3855 void nir_print_deref(const nir_deref_instr
*deref
, FILE *fp
);
3857 /** Shallow clone of a single ALU instruction. */
3858 nir_alu_instr
*nir_alu_instr_clone(nir_shader
*s
, const nir_alu_instr
*orig
);
3860 nir_shader
*nir_shader_clone(void *mem_ctx
, const nir_shader
*s
);
3861 nir_function_impl
*nir_function_impl_clone(nir_shader
*shader
,
3862 const nir_function_impl
*fi
);
3863 nir_constant
*nir_constant_clone(const nir_constant
*c
, nir_variable
*var
);
3864 nir_variable
*nir_variable_clone(const nir_variable
*c
, nir_shader
*shader
);
3866 void nir_shader_replace(nir_shader
*dest
, nir_shader
*src
);
3868 void nir_shader_serialize_deserialize(nir_shader
*s
);
3871 void nir_validate_shader(nir_shader
*shader
, const char *when
);
3872 void nir_metadata_set_validation_flag(nir_shader
*shader
);
3873 void nir_metadata_check_validation_flag(nir_shader
*shader
);
3876 should_skip_nir(const char *name
)
3878 static const char *list
= NULL
;
3880 /* Comma separated list of names to skip. */
3881 list
= getenv("NIR_SKIP");
3889 return comma_separated_list_contains(list
, name
);
3893 should_clone_nir(void)
3895 static int should_clone
= -1;
3896 if (should_clone
< 0)
3897 should_clone
= env_var_as_boolean("NIR_TEST_CLONE", false);
3899 return should_clone
;
3903 should_serialize_deserialize_nir(void)
3905 static int test_serialize
= -1;
3906 if (test_serialize
< 0)
3907 test_serialize
= env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3909 return test_serialize
;
3913 should_print_nir(void)
3915 static int should_print
= -1;
3916 if (should_print
< 0)
3917 should_print
= env_var_as_boolean("NIR_PRINT", false);
3919 return should_print
;
3922 static inline void nir_validate_shader(nir_shader
*shader
, const char *when
) { (void) shader
; (void)when
; }
3923 static inline void nir_metadata_set_validation_flag(nir_shader
*shader
) { (void) shader
; }
3924 static inline void nir_metadata_check_validation_flag(nir_shader
*shader
) { (void) shader
; }
3925 static inline bool should_skip_nir(UNUSED
const char *pass_name
) { return false; }
3926 static inline bool should_clone_nir(void) { return false; }
3927 static inline bool should_serialize_deserialize_nir(void) { return false; }
3928 static inline bool should_print_nir(void) { return false; }
3931 #define _PASS(pass, nir, do_pass) do { \
3932 if (should_skip_nir(#pass)) { \
3933 printf("skipping %s\n", #pass); \
3937 nir_validate_shader(nir, "after " #pass); \
3938 if (should_clone_nir()) { \
3939 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3940 nir_shader_replace(nir, clone); \
3942 if (should_serialize_deserialize_nir()) { \
3943 nir_shader_serialize_deserialize(nir); \
3947 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3948 nir_metadata_set_validation_flag(nir); \
3949 if (should_print_nir()) \
3950 printf("%s\n", #pass); \
3951 if (pass(nir, ##__VA_ARGS__)) { \
3953 if (should_print_nir()) \
3954 nir_print_shader(nir, stdout); \
3955 nir_metadata_check_validation_flag(nir); \
3959 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3960 if (should_print_nir()) \
3961 printf("%s\n", #pass); \
3962 pass(nir, ##__VA_ARGS__); \
3963 if (should_print_nir()) \
3964 nir_print_shader(nir, stdout); \
3967 #define NIR_SKIP(name) should_skip_nir(#name)
3969 /** An instruction filtering callback
3971 * Returns true if the instruction should be processed and false otherwise.
3973 typedef bool (*nir_instr_filter_cb
)(const nir_instr
*, const void *);
3975 /** A simple instruction lowering callback
3977 * Many instruction lowering passes can be written as a simple function which
3978 * takes an instruction as its input and returns a sequence of instructions
3979 * that implement the consumed instruction. This function type represents
3980 * such a lowering function. When called, a function with this prototype
3981 * should either return NULL indicating that no lowering needs to be done or
3982 * emit a sequence of instructions using the provided builder (whose cursor
3983 * will already be placed after the instruction to be lowered) and return the
3984 * resulting nir_ssa_def.
3986 typedef nir_ssa_def
*(*nir_lower_instr_cb
)(struct nir_builder
*,
3987 nir_instr
*, void *);
3990 * Special return value for nir_lower_instr_cb when some progress occurred
3991 * (like changing an input to the instr) that didn't result in a replacement
3992 * SSA def being generated.
3994 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3996 /** Iterate over all the instructions in a nir_function_impl and lower them
3997 * using the provided callbacks
3999 * This function implements the guts of a standard lowering pass for you. It
4000 * iterates over all of the instructions in a nir_function_impl and calls the
4001 * filter callback on each one. If the filter callback returns true, it then
4002 * calls the lowering call back on the instruction. (Splitting it this way
4003 * allows us to avoid some save/restore work for instructions we know won't be
4004 * lowered.) If the instruction is dead after the lowering is complete, it
4005 * will be removed. If new instructions are added, the lowering callback will
4006 * also be called on them in case multiple lowerings are required.
4008 * The metadata for the nir_function_impl will also be updated. If any blocks
4009 * are added (they cannot be removed), dominance and block indices will be
4012 bool nir_function_impl_lower_instructions(nir_function_impl
*impl
,
4013 nir_instr_filter_cb filter
,
4014 nir_lower_instr_cb lower
,
4016 bool nir_shader_lower_instructions(nir_shader
*shader
,
4017 nir_instr_filter_cb filter
,
4018 nir_lower_instr_cb lower
,
4021 void nir_calc_dominance_impl(nir_function_impl
*impl
);
4022 void nir_calc_dominance(nir_shader
*shader
);
4024 nir_block
*nir_dominance_lca(nir_block
*b1
, nir_block
*b2
);
4025 bool nir_block_dominates(nir_block
*parent
, nir_block
*child
);
4026 bool nir_block_is_unreachable(nir_block
*block
);
4028 void nir_dump_dom_tree_impl(nir_function_impl
*impl
, FILE *fp
);
4029 void nir_dump_dom_tree(nir_shader
*shader
, FILE *fp
);
4031 void nir_dump_dom_frontier_impl(nir_function_impl
*impl
, FILE *fp
);
4032 void nir_dump_dom_frontier(nir_shader
*shader
, FILE *fp
);
4034 void nir_dump_cfg_impl(nir_function_impl
*impl
, FILE *fp
);
4035 void nir_dump_cfg(nir_shader
*shader
, FILE *fp
);
4037 int nir_gs_count_vertices(const nir_shader
*shader
);
4039 bool nir_shrink_vec_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
4040 bool nir_split_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
4041 bool nir_split_var_copies(nir_shader
*shader
);
4042 bool nir_split_per_member_structs(nir_shader
*shader
);
4043 bool nir_split_struct_vars(nir_shader
*shader
, nir_variable_mode modes
);
4045 bool nir_lower_returns_impl(nir_function_impl
*impl
);
4046 bool nir_lower_returns(nir_shader
*shader
);
4048 void nir_inline_function_impl(struct nir_builder
*b
,
4049 const nir_function_impl
*impl
,
4050 nir_ssa_def
**params
,
4051 struct hash_table
*shader_var_remap
);
4052 bool nir_inline_functions(nir_shader
*shader
);
4054 bool nir_propagate_invariant(nir_shader
*shader
);
4056 void nir_lower_var_copy_instr(nir_intrinsic_instr
*copy
, nir_shader
*shader
);
4057 void nir_lower_deref_copy_instr(struct nir_builder
*b
,
4058 nir_intrinsic_instr
*copy
);
4059 bool nir_lower_var_copies(nir_shader
*shader
);
4061 void nir_fixup_deref_modes(nir_shader
*shader
);
4063 bool nir_lower_global_vars_to_local(nir_shader
*shader
);
4066 nir_lower_direct_array_deref_of_vec_load
= (1 << 0),
4067 nir_lower_indirect_array_deref_of_vec_load
= (1 << 1),
4068 nir_lower_direct_array_deref_of_vec_store
= (1 << 2),
4069 nir_lower_indirect_array_deref_of_vec_store
= (1 << 3),
4070 } nir_lower_array_deref_of_vec_options
;
4072 bool nir_lower_array_deref_of_vec(nir_shader
*shader
, nir_variable_mode modes
,
4073 nir_lower_array_deref_of_vec_options options
);
4075 bool nir_lower_indirect_derefs(nir_shader
*shader
, nir_variable_mode modes
);
4077 bool nir_lower_locals_to_regs(nir_shader
*shader
);
4079 void nir_lower_io_to_temporaries(nir_shader
*shader
,
4080 nir_function_impl
*entrypoint
,
4081 bool outputs
, bool inputs
);
4083 bool nir_lower_vars_to_scratch(nir_shader
*shader
,
4084 nir_variable_mode modes
,
4086 glsl_type_size_align_func size_align
);
4088 void nir_lower_clip_halfz(nir_shader
*shader
);
4090 void nir_shader_gather_info(nir_shader
*shader
, nir_function_impl
*entrypoint
);
4092 void nir_gather_ssa_types(nir_function_impl
*impl
,
4093 BITSET_WORD
*float_types
,
4094 BITSET_WORD
*int_types
);
4096 void nir_assign_var_locations(nir_shader
*shader
, nir_variable_mode mode
,
4098 int (*type_size
)(const struct glsl_type
*, bool));
4100 /* Some helpers to do very simple linking */
4101 bool nir_remove_unused_varyings(nir_shader
*producer
, nir_shader
*consumer
);
4102 bool nir_remove_unused_io_vars(nir_shader
*shader
, nir_variable_mode mode
,
4103 uint64_t *used_by_other_stage
,
4104 uint64_t *used_by_other_stage_patches
);
4105 void nir_compact_varyings(nir_shader
*producer
, nir_shader
*consumer
,
4106 bool default_to_smooth_interp
);
4107 void nir_link_xfb_varyings(nir_shader
*producer
, nir_shader
*consumer
);
4108 bool nir_link_opt_varyings(nir_shader
*producer
, nir_shader
*consumer
);
4110 bool nir_lower_amul(nir_shader
*shader
,
4111 int (*type_size
)(const struct glsl_type
*, bool));
4113 bool nir_lower_ubo_vec4(nir_shader
*shader
);
4115 void nir_assign_io_var_locations(nir_shader
*shader
,
4116 nir_variable_mode mode
,
4118 gl_shader_stage stage
);
4121 uint8_t num_linked_io_vars
;
4122 uint8_t num_linked_patch_io_vars
;
4123 } nir_linked_io_var_info
;
4125 nir_linked_io_var_info
4126 nir_assign_linked_io_var_locations(nir_shader
*producer
,
4127 nir_shader
*consumer
);
4130 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
4131 * to 32-bit operations. This is only valid for nir_var_shader_in/out
4134 nir_lower_io_lower_64bit_to_32
= (1 << 0),
4136 /* If set, this forces all non-flat fragment shader inputs to be
4137 * interpolated as if with the "sample" qualifier. This requires
4138 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
4140 nir_lower_io_force_sample_interpolation
= (1 << 1),
4141 } nir_lower_io_options
;
4142 bool nir_lower_io(nir_shader
*shader
,
4143 nir_variable_mode modes
,
4144 int (*type_size
)(const struct glsl_type
*, bool),
4145 nir_lower_io_options
);
4147 bool nir_io_add_const_offset_to_base(nir_shader
*nir
, nir_variable_mode mode
);
4150 nir_lower_vars_to_explicit_types(nir_shader
*shader
,
4151 nir_variable_mode modes
,
4152 glsl_type_size_align_func type_info
);
4156 * An address format which is a simple 32-bit global GPU address.
4158 nir_address_format_32bit_global
,
4161 * An address format which is a simple 64-bit global GPU address.
4163 nir_address_format_64bit_global
,
4166 * An address format which is a bounds-checked 64-bit global GPU address.
4168 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
4169 * address stored with the low bits in .x and high bits in .y, .z is a
4170 * size, and .w is an offset. When the final I/O operation is lowered, .w
4171 * is checked against .z and the operation is predicated on the result.
4173 nir_address_format_64bit_bounded_global
,
4176 * An address format which is comprised of a vec2 where the first
4177 * component is a buffer index and the second is an offset.
4179 nir_address_format_32bit_index_offset
,
4182 * An address format which is a 64-bit value, where the high 32 bits
4183 * are a buffer index, and the low 32 bits are an offset.
4185 nir_address_format_32bit_index_offset_pack64
,
4188 * An address format which is comprised of a vec3 where the first two
4189 * components specify the buffer and the third is an offset.
4191 nir_address_format_vec2_index_32bit_offset
,
4194 * An address format which is a simple 32-bit offset.
4196 nir_address_format_32bit_offset
,
4199 * An address format which is a simple 32-bit offset cast to 64-bit.
4201 nir_address_format_32bit_offset_as_64bit
,
4204 * An address format representing a purely logical addressing model. In
4205 * this model, all deref chains must be complete from the dereference
4206 * operation to the variable. Cast derefs are not allowed. These
4207 * addresses will be 32-bit scalars but the format is immaterial because
4208 * you can always chase the chain.
4210 nir_address_format_logical
,
4211 } nir_address_format
;
4213 static inline unsigned
4214 nir_address_format_bit_size(nir_address_format addr_format
)
4216 switch (addr_format
) {
4217 case nir_address_format_32bit_global
: return 32;
4218 case nir_address_format_64bit_global
: return 64;
4219 case nir_address_format_64bit_bounded_global
: return 32;
4220 case nir_address_format_32bit_index_offset
: return 32;
4221 case nir_address_format_32bit_index_offset_pack64
: return 64;
4222 case nir_address_format_vec2_index_32bit_offset
: return 32;
4223 case nir_address_format_32bit_offset
: return 32;
4224 case nir_address_format_32bit_offset_as_64bit
: return 64;
4225 case nir_address_format_logical
: return 32;
4227 unreachable("Invalid address format");
4230 static inline unsigned
4231 nir_address_format_num_components(nir_address_format addr_format
)
4233 switch (addr_format
) {
4234 case nir_address_format_32bit_global
: return 1;
4235 case nir_address_format_64bit_global
: return 1;
4236 case nir_address_format_64bit_bounded_global
: return 4;
4237 case nir_address_format_32bit_index_offset
: return 2;
4238 case nir_address_format_32bit_index_offset_pack64
: return 1;
4239 case nir_address_format_vec2_index_32bit_offset
: return 3;
4240 case nir_address_format_32bit_offset
: return 1;
4241 case nir_address_format_32bit_offset_as_64bit
: return 1;
4242 case nir_address_format_logical
: return 1;
4244 unreachable("Invalid address format");
4247 static inline const struct glsl_type
*
4248 nir_address_format_to_glsl_type(nir_address_format addr_format
)
4250 unsigned bit_size
= nir_address_format_bit_size(addr_format
);
4251 assert(bit_size
== 32 || bit_size
== 64);
4252 return glsl_vector_type(bit_size
== 32 ? GLSL_TYPE_UINT
: GLSL_TYPE_UINT64
,
4253 nir_address_format_num_components(addr_format
));
4256 const nir_const_value
*nir_address_format_null_value(nir_address_format addr_format
);
4258 nir_ssa_def
*nir_build_addr_ieq(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
4259 nir_address_format addr_format
);
4261 nir_ssa_def
*nir_build_addr_isub(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
4262 nir_address_format addr_format
);
4264 nir_ssa_def
* nir_explicit_io_address_from_deref(struct nir_builder
*b
,
4265 nir_deref_instr
*deref
,
4266 nir_ssa_def
*base_addr
,
4267 nir_address_format addr_format
);
4268 void nir_lower_explicit_io_instr(struct nir_builder
*b
,
4269 nir_intrinsic_instr
*io_instr
,
4271 nir_address_format addr_format
);
4273 bool nir_lower_explicit_io(nir_shader
*shader
,
4274 nir_variable_mode modes
,
4275 nir_address_format
);
4277 nir_src
*nir_get_io_offset_src(nir_intrinsic_instr
*instr
);
4278 nir_src
*nir_get_io_vertex_index_src(nir_intrinsic_instr
*instr
);
4280 bool nir_is_per_vertex_io(const nir_variable
*var
, gl_shader_stage stage
);
4282 bool nir_lower_regs_to_ssa_impl(nir_function_impl
*impl
);
4283 bool nir_lower_regs_to_ssa(nir_shader
*shader
);
4284 bool nir_lower_vars_to_ssa(nir_shader
*shader
);
4286 bool nir_remove_dead_derefs(nir_shader
*shader
);
4287 bool nir_remove_dead_derefs_impl(nir_function_impl
*impl
);
4288 bool nir_remove_dead_variables(nir_shader
*shader
, nir_variable_mode modes
,
4289 bool (*can_remove_var
)(nir_variable
*var
));
4290 bool nir_lower_variable_initializers(nir_shader
*shader
,
4291 nir_variable_mode modes
);
4293 bool nir_move_vec_src_uses_to_dest(nir_shader
*shader
);
4294 bool nir_lower_vec_to_movs(nir_shader
*shader
);
4295 void nir_lower_alpha_test(nir_shader
*shader
, enum compare_func func
,
4297 const gl_state_index16
*alpha_ref_state_tokens
);
4298 bool nir_lower_alu(nir_shader
*shader
);
4300 bool nir_lower_flrp(nir_shader
*shader
, unsigned lowering_mask
,
4301 bool always_precise
, bool have_ffma
);
4303 bool nir_lower_alu_to_scalar(nir_shader
*shader
, nir_instr_filter_cb cb
, const void *data
);
4304 bool nir_lower_bool_to_bitsize(nir_shader
*shader
);
4305 bool nir_lower_bool_to_float(nir_shader
*shader
);
4306 bool nir_lower_bool_to_int32(nir_shader
*shader
);
4307 bool nir_lower_int_to_float(nir_shader
*shader
);
4308 bool nir_lower_load_const_to_scalar(nir_shader
*shader
);
4309 bool nir_lower_read_invocation_to_scalar(nir_shader
*shader
);
4310 bool nir_lower_phis_to_scalar(nir_shader
*shader
);
4311 void nir_lower_io_arrays_to_elements(nir_shader
*producer
, nir_shader
*consumer
);
4312 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader
*shader
,
4314 void nir_lower_io_to_scalar(nir_shader
*shader
, nir_variable_mode mask
);
4315 void nir_lower_io_to_scalar_early(nir_shader
*shader
, nir_variable_mode mask
);
4316 bool nir_lower_io_to_vector(nir_shader
*shader
, nir_variable_mode mask
);
4318 bool nir_lower_fragcolor(nir_shader
*shader
);
4319 bool nir_lower_fragcoord_wtrans(nir_shader
*shader
);
4320 void nir_lower_viewport_transform(nir_shader
*shader
);
4321 bool nir_lower_uniforms_to_ubo(nir_shader
*shader
, int multiplier
);
4323 typedef struct nir_lower_subgroups_options
{
4324 uint8_t subgroup_size
;
4325 uint8_t ballot_bit_size
;
4326 bool lower_to_scalar
:1;
4327 bool lower_vote_trivial
:1;
4328 bool lower_vote_eq_to_ballot
:1;
4329 bool lower_subgroup_masks
:1;
4330 bool lower_shuffle
:1;
4331 bool lower_shuffle_to_32bit
:1;
4332 bool lower_shuffle_to_swizzle_amd
:1;
4334 bool lower_quad_broadcast_dynamic
:1;
4335 bool lower_quad_broadcast_dynamic_to_const
:1;
4336 } nir_lower_subgroups_options
;
4338 bool nir_lower_subgroups(nir_shader
*shader
,
4339 const nir_lower_subgroups_options
*options
);
4341 bool nir_lower_system_values(nir_shader
*shader
);
4343 typedef struct nir_lower_compute_system_values_options
{
4344 bool has_base_global_invocation_id
:1;
4345 bool has_base_work_group_id
:1;
4346 } nir_lower_compute_system_values_options
;
4348 bool nir_lower_compute_system_values(nir_shader
*shader
,
4349 const nir_lower_compute_system_values_options
*options
);
4351 enum PACKED nir_lower_tex_packing
{
4352 nir_lower_tex_packing_none
= 0,
4353 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
4354 * or unsigned ints based on the sampler type
4356 nir_lower_tex_packing_16
,
4357 /* The sampler returns 1 32-bit word of 4x8 unorm */
4358 nir_lower_tex_packing_8
,
4361 typedef struct nir_lower_tex_options
{
4363 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4364 * sampler types a texture projector is lowered.
4369 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4371 bool lower_txf_offset
;
4374 * If true, lower away nir_tex_src_offset for all rect textures.
4376 bool lower_rect_offset
;
4379 * If true, lower rect textures to 2D, using txs to fetch the
4380 * texture dimensions and dividing the texture coords by the
4381 * texture dims to normalize.
4386 * If true, convert yuv to rgb.
4388 unsigned lower_y_uv_external
;
4389 unsigned lower_y_u_v_external
;
4390 unsigned lower_yx_xuxv_external
;
4391 unsigned lower_xy_uxvx_external
;
4392 unsigned lower_ayuv_external
;
4393 unsigned lower_xyuv_external
;
4394 unsigned bt709_external
;
4395 unsigned bt2020_external
;
4398 * To emulate certain texture wrap modes, this can be used
4399 * to saturate the specified tex coord to [0.0, 1.0]. The
4400 * bits are according to sampler #, ie. if, for example:
4402 * (conf->saturate_s & (1 << n))
4404 * is true, then the s coord for sampler n is saturated.
4406 * Note that clamping must happen *after* projector lowering
4407 * so any projected texture sample instruction with a clamped
4408 * coordinate gets automatically lowered, regardless of the
4409 * 'lower_txp' setting.
4411 unsigned saturate_s
;
4412 unsigned saturate_t
;
4413 unsigned saturate_r
;
4415 /* Bitmask of textures that need swizzling.
4417 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4418 * swizzles[texture_index] is applied to the result of the texturing
4421 unsigned swizzle_result
;
4423 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4424 * while 4 and 5 represent 0 and 1 respectively.
4426 uint8_t swizzles
[32][4];
4428 /* Can be used to scale sampled values in range required by the format. */
4429 float scale_factors
[32];
4432 * Bitmap of textures that need srgb to linear conversion. If
4433 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4434 * of the texture are lowered to linear.
4436 unsigned lower_srgb
;
4439 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4440 * LODs to nir_texop_txl.
4442 bool lower_tex_without_implicit_lod
;
4445 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4447 bool lower_txd_cube_map
;
4450 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4455 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4456 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4457 * with lower_txd_cube_map.
4459 bool lower_txd_shadow
;
4462 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4463 * Implies lower_txd_cube_map and lower_txd_shadow.
4468 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4469 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4471 bool lower_txb_shadow_clamp
;
4474 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4475 * with nir_texop_txl. This includes cube maps.
4477 bool lower_txd_shadow_clamp
;
4480 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4481 * with nir_texop_txl. This includes cube maps.
4483 bool lower_txd_offset_clamp
;
4486 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4487 * sampler is bindless.
4489 bool lower_txd_clamp_bindless_sampler
;
4492 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4493 * sampler index is not statically determinable to be less than 16.
4495 bool lower_txd_clamp_if_sampler_index_not_lt_16
;
4498 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4499 * 0-lod followed by a nir_ishr.
4504 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4505 * mixed-up tg4 locations.
4507 bool lower_tg4_broadcom_swizzle
;
4510 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4512 bool lower_tg4_offsets
;
4514 enum nir_lower_tex_packing lower_tex_packing
[32];
4515 } nir_lower_tex_options
;
4517 bool nir_lower_tex(nir_shader
*shader
,
4518 const nir_lower_tex_options
*options
);
4520 enum nir_lower_non_uniform_access_type
{
4521 nir_lower_non_uniform_ubo_access
= (1 << 0),
4522 nir_lower_non_uniform_ssbo_access
= (1 << 1),
4523 nir_lower_non_uniform_texture_access
= (1 << 2),
4524 nir_lower_non_uniform_image_access
= (1 << 3),
4527 bool nir_lower_non_uniform_access(nir_shader
*shader
,
4528 enum nir_lower_non_uniform_access_type
);
4530 enum nir_lower_idiv_path
{
4531 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4532 * the two but it is not exact in some cases (for example, 1091317713u /
4533 * 1034u gives 5209173 instead of 1055432) */
4534 nir_lower_idiv_fast
,
4535 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4536 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4537 * the nv50 path and many of them are integer multiplications, so it is
4538 * probably slower. It should always return the correct result, though. */
4539 nir_lower_idiv_precise
,
4542 bool nir_lower_idiv(nir_shader
*shader
, enum nir_lower_idiv_path path
);
4544 typedef struct nir_input_attachment_options
{
4545 bool use_fragcoord_sysval
;
4546 bool use_layer_id_sysval
;
4547 bool use_view_id_for_layer
;
4548 } nir_input_attachment_options
;
4550 bool nir_lower_input_attachments(nir_shader
*shader
,
4551 const nir_input_attachment_options
*options
);
4553 bool nir_lower_clip_vs(nir_shader
*shader
, unsigned ucp_enables
,
4555 bool use_clipdist_array
,
4556 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4557 bool nir_lower_clip_gs(nir_shader
*shader
, unsigned ucp_enables
,
4558 bool use_clipdist_array
,
4559 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4560 bool nir_lower_clip_fs(nir_shader
*shader
, unsigned ucp_enables
,
4561 bool use_clipdist_array
);
4562 bool nir_lower_clip_cull_distance_arrays(nir_shader
*nir
);
4563 bool nir_lower_clip_disable(nir_shader
*shader
, unsigned clip_plane_enable
);
4565 void nir_lower_point_size_mov(nir_shader
*shader
,
4566 const gl_state_index16
*pointsize_state_tokens
);
4568 bool nir_lower_frexp(nir_shader
*nir
);
4570 void nir_lower_two_sided_color(nir_shader
*shader
, bool face_sysval
);
4572 bool nir_lower_clamp_color_outputs(nir_shader
*shader
);
4574 bool nir_lower_flatshade(nir_shader
*shader
);
4576 void nir_lower_passthrough_edgeflags(nir_shader
*shader
);
4577 bool nir_lower_patch_vertices(nir_shader
*nir
, unsigned static_count
,
4578 const gl_state_index16
*uniform_state_tokens
);
4580 typedef struct nir_lower_wpos_ytransform_options
{
4581 gl_state_index16 state_tokens
[STATE_LENGTH
];
4582 bool fs_coord_origin_upper_left
:1;
4583 bool fs_coord_origin_lower_left
:1;
4584 bool fs_coord_pixel_center_integer
:1;
4585 bool fs_coord_pixel_center_half_integer
:1;
4586 } nir_lower_wpos_ytransform_options
;
4588 bool nir_lower_wpos_ytransform(nir_shader
*shader
,
4589 const nir_lower_wpos_ytransform_options
*options
);
4590 bool nir_lower_wpos_center(nir_shader
*shader
, const bool for_sample_shading
);
4592 bool nir_lower_wrmasks(nir_shader
*shader
, nir_instr_filter_cb cb
, const void *data
);
4594 bool nir_lower_fb_read(nir_shader
*shader
);
4596 typedef struct nir_lower_drawpixels_options
{
4597 gl_state_index16 texcoord_state_tokens
[STATE_LENGTH
];
4598 gl_state_index16 scale_state_tokens
[STATE_LENGTH
];
4599 gl_state_index16 bias_state_tokens
[STATE_LENGTH
];
4600 unsigned drawpix_sampler
;
4601 unsigned pixelmap_sampler
;
4603 bool scale_and_bias
:1;
4604 } nir_lower_drawpixels_options
;
4606 void nir_lower_drawpixels(nir_shader
*shader
,
4607 const nir_lower_drawpixels_options
*options
);
4609 typedef struct nir_lower_bitmap_options
{
4612 } nir_lower_bitmap_options
;
4614 void nir_lower_bitmap(nir_shader
*shader
, const nir_lower_bitmap_options
*options
);
4616 bool nir_lower_atomics_to_ssbo(nir_shader
*shader
);
4619 nir_lower_int_source_mods
= 1 << 0,
4620 nir_lower_float_source_mods
= 1 << 1,
4621 nir_lower_triop_abs
= 1 << 2,
4622 nir_lower_all_source_mods
= (1 << 3) - 1
4623 } nir_lower_to_source_mods_flags
;
4626 bool nir_lower_to_source_mods(nir_shader
*shader
, nir_lower_to_source_mods_flags options
);
4628 bool nir_lower_gs_intrinsics(nir_shader
*shader
, bool per_stream
);
4630 typedef unsigned (*nir_lower_bit_size_callback
)(const nir_alu_instr
*, void *);
4632 bool nir_lower_bit_size(nir_shader
*shader
,
4633 nir_lower_bit_size_callback callback
,
4634 void *callback_data
);
4635 bool nir_lower_64bit_phis(nir_shader
*shader
);
4637 nir_lower_int64_options
nir_lower_int64_op_to_options_mask(nir_op opcode
);
4638 bool nir_lower_int64(nir_shader
*shader
);
4640 nir_lower_doubles_options
nir_lower_doubles_op_to_options_mask(nir_op opcode
);
4641 bool nir_lower_doubles(nir_shader
*shader
, const nir_shader
*softfp64
,
4642 nir_lower_doubles_options options
);
4643 bool nir_lower_pack(nir_shader
*shader
);
4645 void nir_lower_mediump_outputs(nir_shader
*nir
);
4647 bool nir_lower_point_size(nir_shader
*shader
, float min
, float max
);
4650 nir_lower_interpolation_at_sample
= (1 << 1),
4651 nir_lower_interpolation_at_offset
= (1 << 2),
4652 nir_lower_interpolation_centroid
= (1 << 3),
4653 nir_lower_interpolation_pixel
= (1 << 4),
4654 nir_lower_interpolation_sample
= (1 << 5),
4655 } nir_lower_interpolation_options
;
4657 bool nir_lower_interpolation(nir_shader
*shader
,
4658 nir_lower_interpolation_options options
);
4660 bool nir_lower_discard_to_demote(nir_shader
*shader
);
4662 bool nir_lower_memory_model(nir_shader
*shader
);
4664 bool nir_lower_goto_ifs(nir_shader
*shader
);
4666 bool nir_normalize_cubemap_coords(nir_shader
*shader
);
4668 void nir_live_ssa_defs_impl(nir_function_impl
*impl
);
4670 void nir_loop_analyze_impl(nir_function_impl
*impl
,
4671 nir_variable_mode indirect_mask
);
4673 bool nir_ssa_defs_interfere(nir_ssa_def
*a
, nir_ssa_def
*b
);
4675 bool nir_repair_ssa_impl(nir_function_impl
*impl
);
4676 bool nir_repair_ssa(nir_shader
*shader
);
4678 void nir_convert_loop_to_lcssa(nir_loop
*loop
);
4679 bool nir_convert_to_lcssa(nir_shader
*shader
, bool skip_invariants
, bool skip_bool_invariants
);
4680 void nir_divergence_analysis(nir_shader
*shader
, nir_divergence_options options
);
4682 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4683 * registers. If false, convert all values (even those not involved in a phi
4684 * node) to registers.
4686 bool nir_convert_from_ssa(nir_shader
*shader
, bool phi_webs_only
);
4688 bool nir_lower_phis_to_regs_block(nir_block
*block
);
4689 bool nir_lower_ssa_defs_to_regs_block(nir_block
*block
);
4690 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl
*impl
);
4692 bool nir_lower_samplers(nir_shader
*shader
);
4693 bool nir_lower_ssbo(nir_shader
*shader
);
4695 /* This is here for unit tests. */
4696 bool nir_opt_comparison_pre_impl(nir_function_impl
*impl
);
4698 bool nir_opt_comparison_pre(nir_shader
*shader
);
4700 bool nir_opt_access(nir_shader
*shader
);
4701 bool nir_opt_algebraic(nir_shader
*shader
);
4702 bool nir_opt_algebraic_before_ffma(nir_shader
*shader
);
4703 bool nir_opt_algebraic_late(nir_shader
*shader
);
4704 bool nir_opt_algebraic_distribute_src_mods(nir_shader
*shader
);
4705 bool nir_opt_constant_folding(nir_shader
*shader
);
4707 /* Try to combine a and b into a. Return true if combination was possible,
4708 * which will result in b being removed by the pass. Return false if
4709 * combination wasn't possible.
4711 typedef bool (*nir_combine_memory_barrier_cb
)(
4712 nir_intrinsic_instr
*a
, nir_intrinsic_instr
*b
, void *data
);
4714 bool nir_opt_combine_memory_barriers(nir_shader
*shader
,
4715 nir_combine_memory_barrier_cb combine_cb
,
4718 bool nir_opt_combine_stores(nir_shader
*shader
, nir_variable_mode modes
);
4720 bool nir_copy_prop(nir_shader
*shader
);
4722 bool nir_opt_copy_prop_vars(nir_shader
*shader
);
4724 bool nir_opt_cse(nir_shader
*shader
);
4726 bool nir_opt_dce(nir_shader
*shader
);
4728 bool nir_opt_dead_cf(nir_shader
*shader
);
4730 bool nir_opt_dead_write_vars(nir_shader
*shader
);
4732 bool nir_opt_deref_impl(nir_function_impl
*impl
);
4733 bool nir_opt_deref(nir_shader
*shader
);
4735 bool nir_opt_find_array_copies(nir_shader
*shader
);
4737 bool nir_opt_gcm(nir_shader
*shader
, bool value_number
);
4739 bool nir_opt_idiv_const(nir_shader
*shader
, unsigned min_bit_size
);
4741 bool nir_opt_if(nir_shader
*shader
, bool aggressive_last_continue
);
4743 bool nir_opt_intrinsics(nir_shader
*shader
);
4745 bool nir_opt_large_constants(nir_shader
*shader
,
4746 glsl_type_size_align_func size_align
,
4747 unsigned threshold
);
4749 bool nir_opt_loop_unroll(nir_shader
*shader
, nir_variable_mode indirect_mask
);
4752 nir_move_const_undef
= (1 << 0),
4753 nir_move_load_ubo
= (1 << 1),
4754 nir_move_load_input
= (1 << 2),
4755 nir_move_comparisons
= (1 << 3),
4756 nir_move_copies
= (1 << 4),
4759 bool nir_can_move_instr(nir_instr
*instr
, nir_move_options options
);
4761 bool nir_opt_sink(nir_shader
*shader
, nir_move_options options
);
4763 bool nir_opt_move(nir_shader
*shader
, nir_move_options options
);
4765 bool nir_opt_peephole_select(nir_shader
*shader
, unsigned limit
,
4766 bool indirect_load_ok
, bool expensive_alu_ok
);
4768 bool nir_opt_rematerialize_compares(nir_shader
*shader
);
4770 bool nir_opt_remove_phis(nir_shader
*shader
);
4771 bool nir_opt_remove_phis_block(nir_block
*block
);
4773 bool nir_opt_shrink_vectors(nir_shader
*shader
);
4775 bool nir_opt_trivial_continues(nir_shader
*shader
);
4777 bool nir_opt_undef(nir_shader
*shader
);
4779 bool nir_opt_vectorize(nir_shader
*shader
);
4781 bool nir_opt_conditional_discard(nir_shader
*shader
);
4783 typedef bool (*nir_should_vectorize_mem_func
)(unsigned align
, unsigned bit_size
,
4784 unsigned num_components
, unsigned high_offset
,
4785 nir_intrinsic_instr
*low
, nir_intrinsic_instr
*high
);
4787 bool nir_opt_load_store_vectorize(nir_shader
*shader
, nir_variable_mode modes
,
4788 nir_should_vectorize_mem_func callback
,
4789 nir_variable_mode robust_modes
);
4791 void nir_sweep(nir_shader
*shader
);
4793 void nir_remap_dual_slot_attributes(nir_shader
*shader
,
4794 uint64_t *dual_slot_inputs
);
4795 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs
, uint64_t dual_slot
);
4797 nir_intrinsic_op
nir_intrinsic_from_system_value(gl_system_value val
);
4798 gl_system_value
nir_system_value_from_intrinsic(nir_intrinsic_op intrin
);
4801 nir_variable_is_in_ubo(const nir_variable
*var
)
4803 return (var
->data
.mode
== nir_var_mem_ubo
&&
4804 var
->interface_type
!= NULL
);
4808 nir_variable_is_in_ssbo(const nir_variable
*var
)
4810 return (var
->data
.mode
== nir_var_mem_ssbo
&&
4811 var
->interface_type
!= NULL
);
4815 nir_variable_is_in_block(const nir_variable
*var
)
4817 return nir_variable_is_in_ubo(var
) || nir_variable_is_in_ssbo(var
);
4820 typedef struct nir_unsigned_upper_bound_config
{
4821 unsigned min_subgroup_size
;
4822 unsigned max_subgroup_size
;
4823 unsigned max_work_group_invocations
;
4824 unsigned max_work_group_count
[3];
4825 unsigned max_work_group_size
[3];
4827 uint32_t vertex_attrib_max
[32];
4828 } nir_unsigned_upper_bound_config
;
4831 nir_unsigned_upper_bound(nir_shader
*shader
, struct hash_table
*range_ht
,
4832 nir_ssa_scalar scalar
,
4833 const nir_unsigned_upper_bound_config
*config
);
4836 nir_addition_might_overflow(nir_shader
*shader
, struct hash_table
*range_ht
,
4837 nir_ssa_scalar ssa
, unsigned const_val
,
4838 const nir_unsigned_upper_bound_config
*config
);