nir: use enum operator helper for nir_variable_mode and nir_metadata
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/enum_operators.h"
40 #include "util/macros.h"
41 #include "util/format/u_format.h"
42 #include "compiler/nir_types.h"
43 #include "compiler/shader_enums.h"
44 #include "compiler/shader_info.h"
45 #define XXH_INLINE_ALL
46 #include "util/xxhash.h"
47 #include <stdio.h>
48
49 #ifndef NDEBUG
50 #include "util/debug.h"
51 #endif /* NDEBUG */
52
53 #include "nir_opcodes.h"
54
55 #if defined(_WIN32) && !defined(snprintf)
56 #define snprintf _snprintf
57 #endif
58
59 #ifdef __cplusplus
60 extern "C" {
61 #endif
62
63 #define NIR_FALSE 0u
64 #define NIR_TRUE (~0u)
65 #define NIR_MAX_VEC_COMPONENTS 16
66 #define NIR_MAX_MATRIX_COLUMNS 4
67 #define NIR_STREAM_PACKED (1 << 8)
68 typedef uint16_t nir_component_mask_t;
69
70 static inline bool
71 nir_num_components_valid(unsigned num_components)
72 {
73 return (num_components >= 1 &&
74 num_components <= 4) ||
75 num_components == 8 ||
76 num_components == 16;
77 }
78
79 /** Defines a cast function
80 *
81 * This macro defines a cast function from in_type to out_type where
82 * out_type is some structure type that contains a field of type out_type.
83 *
84 * Note that you have to be a bit careful as the generated cast function
85 * destroys constness.
86 */
87 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
88 type_field, type_value) \
89 static inline out_type * \
90 name(const in_type *parent) \
91 { \
92 assert(parent && parent->type_field == type_value); \
93 return exec_node_data(out_type, parent, field); \
94 }
95
96 struct nir_function;
97 struct nir_shader;
98 struct nir_instr;
99 struct nir_builder;
100
101
102 /**
103 * Description of built-in state associated with a uniform
104 *
105 * \sa nir_variable::state_slots
106 */
107 typedef struct {
108 gl_state_index16 tokens[STATE_LENGTH];
109 uint16_t swizzle;
110 } nir_state_slot;
111
112 typedef enum {
113 nir_var_shader_in = (1 << 0),
114 nir_var_shader_out = (1 << 1),
115 nir_var_shader_temp = (1 << 2),
116 nir_var_function_temp = (1 << 3),
117 nir_var_uniform = (1 << 4),
118 nir_var_mem_ubo = (1 << 5),
119 nir_var_system_value = (1 << 6),
120 nir_var_mem_ssbo = (1 << 7),
121 nir_var_mem_shared = (1 << 8),
122 nir_var_mem_global = (1 << 9),
123 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
124 nir_num_variable_modes = 11,
125 nir_var_all = (1 << nir_num_variable_modes) - 1,
126 } nir_variable_mode;
127 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_variable_mode)
128
129 /**
130 * Rounding modes.
131 */
132 typedef enum {
133 nir_rounding_mode_undef = 0,
134 nir_rounding_mode_rtne = 1, /* round to nearest even */
135 nir_rounding_mode_ru = 2, /* round up */
136 nir_rounding_mode_rd = 3, /* round down */
137 nir_rounding_mode_rtz = 4, /* round towards zero */
138 } nir_rounding_mode;
139
140 typedef union {
141 bool b;
142 float f32;
143 double f64;
144 int8_t i8;
145 uint8_t u8;
146 int16_t i16;
147 uint16_t u16;
148 int32_t i32;
149 uint32_t u32;
150 int64_t i64;
151 uint64_t u64;
152 } nir_const_value;
153
154 #define nir_const_value_to_array(arr, c, components, m) \
155 { \
156 for (unsigned i = 0; i < components; ++i) \
157 arr[i] = c[i].m; \
158 } while (false)
159
160 static inline nir_const_value
161 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
162 {
163 nir_const_value v;
164 memset(&v, 0, sizeof(v));
165
166 switch (bit_size) {
167 case 1: v.b = x; break;
168 case 8: v.u8 = x; break;
169 case 16: v.u16 = x; break;
170 case 32: v.u32 = x; break;
171 case 64: v.u64 = x; break;
172 default:
173 unreachable("Invalid bit size");
174 }
175
176 return v;
177 }
178
179 static inline nir_const_value
180 nir_const_value_for_int(int64_t i, unsigned bit_size)
181 {
182 nir_const_value v;
183 memset(&v, 0, sizeof(v));
184
185 assert(bit_size <= 64);
186 if (bit_size < 64) {
187 assert(i >= (-(1ll << (bit_size - 1))));
188 assert(i < (1ll << (bit_size - 1)));
189 }
190
191 return nir_const_value_for_raw_uint(i, bit_size);
192 }
193
194 static inline nir_const_value
195 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
196 {
197 nir_const_value v;
198 memset(&v, 0, sizeof(v));
199
200 assert(bit_size <= 64);
201 if (bit_size < 64)
202 assert(u < (1ull << bit_size));
203
204 return nir_const_value_for_raw_uint(u, bit_size);
205 }
206
207 static inline nir_const_value
208 nir_const_value_for_bool(bool b, unsigned bit_size)
209 {
210 /* Booleans use a 0/-1 convention */
211 return nir_const_value_for_int(-(int)b, bit_size);
212 }
213
214 /* This one isn't inline because it requires half-float conversion */
215 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
216
217 static inline int64_t
218 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
219 {
220 switch (bit_size) {
221 /* int1_t uses 0/-1 convention */
222 case 1: return -(int)value.b;
223 case 8: return value.i8;
224 case 16: return value.i16;
225 case 32: return value.i32;
226 case 64: return value.i64;
227 default:
228 unreachable("Invalid bit size");
229 }
230 }
231
232 static inline uint64_t
233 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
234 {
235 switch (bit_size) {
236 case 1: return value.b;
237 case 8: return value.u8;
238 case 16: return value.u16;
239 case 32: return value.u32;
240 case 64: return value.u64;
241 default:
242 unreachable("Invalid bit size");
243 }
244 }
245
246 static inline bool
247 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
248 {
249 int64_t i = nir_const_value_as_int(value, bit_size);
250
251 /* Booleans of any size use 0/-1 convention */
252 assert(i == 0 || i == -1);
253
254 return i;
255 }
256
257 /* This one isn't inline because it requires half-float conversion */
258 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
259
260 typedef struct nir_constant {
261 /**
262 * Value of the constant.
263 *
264 * The field used to back the values supplied by the constant is determined
265 * by the type associated with the \c nir_variable. Constants may be
266 * scalars, vectors, or matrices.
267 */
268 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
269
270 /* we could get this from the var->type but makes clone *much* easier to
271 * not have to care about the type.
272 */
273 unsigned num_elements;
274
275 /* Array elements / Structure Fields */
276 struct nir_constant **elements;
277 } nir_constant;
278
279 /**
280 * \brief Layout qualifiers for gl_FragDepth.
281 *
282 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
283 * with a layout qualifier.
284 */
285 typedef enum {
286 nir_depth_layout_none, /**< No depth layout is specified. */
287 nir_depth_layout_any,
288 nir_depth_layout_greater,
289 nir_depth_layout_less,
290 nir_depth_layout_unchanged
291 } nir_depth_layout;
292
293 /**
294 * Enum keeping track of how a variable was declared.
295 */
296 typedef enum {
297 /**
298 * Normal declaration.
299 */
300 nir_var_declared_normally = 0,
301
302 /**
303 * Variable is implicitly generated by the compiler and should not be
304 * visible via the API.
305 */
306 nir_var_hidden,
307 } nir_var_declaration_type;
308
309 /**
310 * Either a uniform, global variable, shader input, or shader output. Based on
311 * ir_variable - it should be easy to translate between the two.
312 */
313
314 typedef struct nir_variable {
315 struct exec_node node;
316
317 /**
318 * Declared type of the variable
319 */
320 const struct glsl_type *type;
321
322 /**
323 * Declared name of the variable
324 */
325 char *name;
326
327 struct nir_variable_data {
328 /**
329 * Storage class of the variable.
330 *
331 * \sa nir_variable_mode
332 */
333 unsigned mode:11;
334
335 /**
336 * Is the variable read-only?
337 *
338 * This is set for variables declared as \c const, shader inputs,
339 * and uniforms.
340 */
341 unsigned read_only:1;
342 unsigned centroid:1;
343 unsigned sample:1;
344 unsigned patch:1;
345 unsigned invariant:1;
346
347 /**
348 * Precision qualifier.
349 *
350 * In desktop GLSL we do not care about precision qualifiers at all, in
351 * fact, the spec says that precision qualifiers are ignored.
352 *
353 * To make things easy, we make it so that this field is always
354 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
355 * have the same precision value and the checks we add in the compiler
356 * for this field will never break a desktop shader compile.
357 */
358 unsigned precision:2;
359
360 /**
361 * Can this variable be coalesced with another?
362 *
363 * This is set by nir_lower_io_to_temporaries to say that any
364 * copies involving this variable should stay put. Propagating it can
365 * duplicate the resulting load/store, which is not wanted, and may
366 * result in a load/store of the variable with an indirect offset which
367 * the backend may not be able to handle.
368 */
369 unsigned cannot_coalesce:1;
370
371 /**
372 * When separate shader programs are enabled, only input/outputs between
373 * the stages of a multi-stage separate program can be safely removed
374 * from the shader interface. Other input/outputs must remains active.
375 *
376 * This is also used to make sure xfb varyings that are unused by the
377 * fragment shader are not removed.
378 */
379 unsigned always_active_io:1;
380
381 /**
382 * Interpolation mode for shader inputs / outputs
383 *
384 * \sa glsl_interp_mode
385 */
386 unsigned interpolation:3;
387
388 /**
389 * If non-zero, then this variable may be packed along with other variables
390 * into a single varying slot, so this offset should be applied when
391 * accessing components. For example, an offset of 1 means that the x
392 * component of this variable is actually stored in component y of the
393 * location specified by \c location.
394 */
395 unsigned location_frac:2;
396
397 /**
398 * If true, this variable represents an array of scalars that should
399 * be tightly packed. In other words, consecutive array elements
400 * should be stored one component apart, rather than one slot apart.
401 */
402 unsigned compact:1;
403
404 /**
405 * Whether this is a fragment shader output implicitly initialized with
406 * the previous contents of the specified render target at the
407 * framebuffer location corresponding to this shader invocation.
408 */
409 unsigned fb_fetch_output:1;
410
411 /**
412 * Non-zero if this variable is considered bindless as defined by
413 * ARB_bindless_texture.
414 */
415 unsigned bindless:1;
416
417 /**
418 * Was an explicit binding set in the shader?
419 */
420 unsigned explicit_binding:1;
421
422 /**
423 * Was the location explicitly set in the shader?
424 *
425 * If the location is explicitly set in the shader, it \b cannot be changed
426 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
427 * no effect).
428 */
429 unsigned explicit_location:1;
430
431 /**
432 * Was a transfer feedback buffer set in the shader?
433 */
434 unsigned explicit_xfb_buffer:1;
435
436 /**
437 * Was a transfer feedback stride set in the shader?
438 */
439 unsigned explicit_xfb_stride:1;
440
441 /**
442 * Was an explicit offset set in the shader?
443 */
444 unsigned explicit_offset:1;
445
446 /**
447 * Layout of the matrix. Uses glsl_matrix_layout values.
448 */
449 unsigned matrix_layout:2;
450
451 /**
452 * Non-zero if this variable was created by lowering a named interface
453 * block.
454 */
455 unsigned from_named_ifc_block:1;
456
457 /**
458 * How the variable was declared. See nir_var_declaration_type.
459 *
460 * This is used to detect variables generated by the compiler, so should
461 * not be visible via the API.
462 */
463 unsigned how_declared:2;
464
465 /**
466 * Is this variable per-view? If so, we know it must be an array with
467 * size corresponding to the number of views.
468 */
469 unsigned per_view:1;
470
471 /**
472 * \brief Layout qualifier for gl_FragDepth. See nir_depth_layout.
473 *
474 * This is not equal to \c ir_depth_layout_none if and only if this
475 * variable is \c gl_FragDepth and a layout qualifier is specified.
476 */
477 unsigned depth_layout:3;
478
479 /**
480 * Vertex stream output identifier.
481 *
482 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
483 * indicate the stream of the i-th component.
484 */
485 unsigned stream:9;
486
487 /**
488 * See gl_access_qualifier.
489 *
490 * Access flags for memory variables (SSBO/global), image uniforms, and
491 * bindless images in uniforms/inputs/outputs.
492 */
493 unsigned access:8;
494
495 /**
496 * Descriptor set binding for sampler or UBO.
497 */
498 unsigned descriptor_set:5;
499
500 /**
501 * output index for dual source blending.
502 */
503 unsigned index;
504
505 /**
506 * Initial binding point for a sampler or UBO.
507 *
508 * For array types, this represents the binding point for the first element.
509 */
510 unsigned binding;
511
512 /**
513 * Storage location of the base of this variable
514 *
515 * The precise meaning of this field depends on the nature of the variable.
516 *
517 * - Vertex shader input: one of the values from \c gl_vert_attrib.
518 * - Vertex shader output: one of the values from \c gl_varying_slot.
519 * - Geometry shader input: one of the values from \c gl_varying_slot.
520 * - Geometry shader output: one of the values from \c gl_varying_slot.
521 * - Fragment shader input: one of the values from \c gl_varying_slot.
522 * - Fragment shader output: one of the values from \c gl_frag_result.
523 * - Uniforms: Per-stage uniform slot number for default uniform block.
524 * - Uniforms: Index within the uniform block definition for UBO members.
525 * - Non-UBO Uniforms: uniform slot number.
526 * - Other: This field is not currently used.
527 *
528 * If the variable is a uniform, shader input, or shader output, and the
529 * slot has not been assigned, the value will be -1.
530 */
531 int location;
532
533 /**
534 * The actual location of the variable in the IR. Only valid for inputs,
535 * outputs, and uniforms (including samplers and images).
536 */
537 unsigned driver_location;
538
539 /**
540 * Location an atomic counter or transform feedback is stored at.
541 */
542 unsigned offset;
543
544 union {
545 struct {
546 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
547 enum pipe_format format;
548 } image;
549
550 struct {
551 /**
552 * For OpenCL inline samplers. See cl_sampler_addressing_mode and cl_sampler_filter_mode
553 */
554 unsigned is_inline_sampler : 1;
555 unsigned addressing_mode : 3;
556 unsigned normalized_coordinates : 1;
557 unsigned filter_mode : 1;
558 } sampler;
559
560 struct {
561 /**
562 * Transform feedback buffer.
563 */
564 uint16_t buffer:2;
565
566 /**
567 * Transform feedback stride.
568 */
569 uint16_t stride;
570 } xfb;
571 };
572 } data;
573
574 /**
575 * Identifier for this variable generated by nir_index_vars() that is unique
576 * among other variables in the same exec_list.
577 */
578 unsigned index;
579
580 /* Number of nir_variable_data members */
581 uint16_t num_members;
582
583 /**
584 * Built-in state that backs this uniform
585 *
586 * Once set at variable creation, \c state_slots must remain invariant.
587 * This is because, ideally, this array would be shared by all clones of
588 * this variable in the IR tree. In other words, we'd really like for it
589 * to be a fly-weight.
590 *
591 * If the variable is not a uniform, \c num_state_slots will be zero and
592 * \c state_slots will be \c NULL.
593 */
594 /*@{*/
595 uint16_t num_state_slots; /**< Number of state slots used */
596 nir_state_slot *state_slots; /**< State descriptors. */
597 /*@}*/
598
599 /**
600 * Constant expression assigned in the initializer of the variable
601 *
602 * This field should only be used temporarily by creators of NIR shaders
603 * and then lower_constant_initializers can be used to get rid of them.
604 * Most of the rest of NIR ignores this field or asserts that it's NULL.
605 */
606 nir_constant *constant_initializer;
607
608 /**
609 * Global variable assigned in the initializer of the variable
610 * This field should only be used temporarily by creators of NIR shaders
611 * and then lower_constant_initializers can be used to get rid of them.
612 * Most of the rest of NIR ignores this field or asserts that it's NULL.
613 */
614 struct nir_variable *pointer_initializer;
615
616 /**
617 * For variables that are in an interface block or are an instance of an
618 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
619 *
620 * \sa ir_variable::location
621 */
622 const struct glsl_type *interface_type;
623
624 /**
625 * Description of per-member data for per-member struct variables
626 *
627 * This is used for variables which are actually an amalgamation of
628 * multiple entities such as a struct of built-in values or a struct of
629 * inputs each with their own layout specifier. This is only allowed on
630 * variables with a struct or array of array of struct type.
631 */
632 struct nir_variable_data *members;
633 } nir_variable;
634
635 static inline bool
636 _nir_shader_variable_has_mode(nir_variable *var, unsigned modes)
637 {
638 /* This isn't a shader variable */
639 assert(!(modes & nir_var_function_temp));
640 return var->data.mode & modes;
641 }
642
643 #define nir_foreach_variable_in_list(var, var_list) \
644 foreach_list_typed(nir_variable, var, node, var_list)
645
646 #define nir_foreach_variable_in_list_safe(var, var_list) \
647 foreach_list_typed_safe(nir_variable, var, node, var_list)
648
649 #define nir_foreach_variable_in_shader(var, shader) \
650 nir_foreach_variable_in_list(var, &(shader)->variables)
651
652 #define nir_foreach_variable_in_shader_safe(var, shader) \
653 nir_foreach_variable_in_list_safe(var, &(shader)->variables)
654
655 #define nir_foreach_variable_with_modes(var, shader, modes) \
656 nir_foreach_variable_in_shader(var, shader) \
657 if (_nir_shader_variable_has_mode(var, modes))
658
659 #define nir_foreach_variable_with_modes_safe(var, shader, modes) \
660 nir_foreach_variable_in_shader_safe(var, shader) \
661 if (_nir_shader_variable_has_mode(var, modes))
662
663 #define nir_foreach_shader_in_variable(var, shader) \
664 nir_foreach_variable_with_modes(var, shader, nir_var_shader_in)
665
666 #define nir_foreach_shader_in_variable_safe(var, shader) \
667 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_in)
668
669 #define nir_foreach_shader_out_variable(var, shader) \
670 nir_foreach_variable_with_modes(var, shader, nir_var_shader_out)
671
672 #define nir_foreach_shader_out_variable_safe(var, shader) \
673 nir_foreach_variable_with_modes_safe(var, shader, nir_var_shader_out)
674
675 #define nir_foreach_uniform_variable(var, shader) \
676 nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
677
678 #define nir_foreach_uniform_variable_safe(var, shader) \
679 nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
680
681 static inline bool
682 nir_variable_is_global(const nir_variable *var)
683 {
684 return var->data.mode != nir_var_function_temp;
685 }
686
687 typedef struct nir_register {
688 struct exec_node node;
689
690 unsigned num_components; /** < number of vector components */
691 unsigned num_array_elems; /** < size of array (0 for no array) */
692
693 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
694 uint8_t bit_size;
695
696 /** generic register index. */
697 unsigned index;
698
699 /** only for debug purposes, can be NULL */
700 const char *name;
701
702 /** set of nir_srcs where this register is used (read from) */
703 struct list_head uses;
704
705 /** set of nir_dests where this register is defined (written to) */
706 struct list_head defs;
707
708 /** set of nir_ifs where this register is used as a condition */
709 struct list_head if_uses;
710 } nir_register;
711
712 #define nir_foreach_register(reg, reg_list) \
713 foreach_list_typed(nir_register, reg, node, reg_list)
714 #define nir_foreach_register_safe(reg, reg_list) \
715 foreach_list_typed_safe(nir_register, reg, node, reg_list)
716
717 typedef enum PACKED {
718 nir_instr_type_alu,
719 nir_instr_type_deref,
720 nir_instr_type_call,
721 nir_instr_type_tex,
722 nir_instr_type_intrinsic,
723 nir_instr_type_load_const,
724 nir_instr_type_jump,
725 nir_instr_type_ssa_undef,
726 nir_instr_type_phi,
727 nir_instr_type_parallel_copy,
728 } nir_instr_type;
729
730 typedef struct nir_instr {
731 struct exec_node node;
732 struct nir_block *block;
733 nir_instr_type type;
734
735 /* A temporary for optimization and analysis passes to use for storing
736 * flags. For instance, DCE uses this to store the "dead/live" info.
737 */
738 uint8_t pass_flags;
739
740 /** generic instruction index. */
741 unsigned index;
742 } nir_instr;
743
744 static inline nir_instr *
745 nir_instr_next(nir_instr *instr)
746 {
747 struct exec_node *next = exec_node_get_next(&instr->node);
748 if (exec_node_is_tail_sentinel(next))
749 return NULL;
750 else
751 return exec_node_data(nir_instr, next, node);
752 }
753
754 static inline nir_instr *
755 nir_instr_prev(nir_instr *instr)
756 {
757 struct exec_node *prev = exec_node_get_prev(&instr->node);
758 if (exec_node_is_head_sentinel(prev))
759 return NULL;
760 else
761 return exec_node_data(nir_instr, prev, node);
762 }
763
764 static inline bool
765 nir_instr_is_first(const nir_instr *instr)
766 {
767 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
768 }
769
770 static inline bool
771 nir_instr_is_last(const nir_instr *instr)
772 {
773 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
774 }
775
776 typedef struct nir_ssa_def {
777 /** for debugging only, can be NULL */
778 const char* name;
779
780 /** generic SSA definition index. */
781 unsigned index;
782
783 /** Ordered SSA definition index used by nir_liveness. */
784 unsigned live_index;
785
786 /** Instruction which produces this SSA value. */
787 nir_instr *parent_instr;
788
789 /** set of nir_instrs where this register is used (read from) */
790 struct list_head uses;
791
792 /** set of nir_ifs where this register is used as a condition */
793 struct list_head if_uses;
794
795 uint8_t num_components;
796
797 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
798 uint8_t bit_size;
799
800 /**
801 * True if this SSA value may have different values in different SIMD
802 * invocations of the shader. This is set by nir_divergence_analysis.
803 */
804 bool divergent;
805 } nir_ssa_def;
806
807 struct nir_src;
808
809 typedef struct {
810 nir_register *reg;
811 struct nir_src *indirect; /** < NULL for no indirect offset */
812 unsigned base_offset;
813
814 /* TODO use-def chain goes here */
815 } nir_reg_src;
816
817 typedef struct {
818 nir_instr *parent_instr;
819 struct list_head def_link;
820
821 nir_register *reg;
822 struct nir_src *indirect; /** < NULL for no indirect offset */
823 unsigned base_offset;
824
825 /* TODO def-use chain goes here */
826 } nir_reg_dest;
827
828 struct nir_if;
829
830 typedef struct nir_src {
831 union {
832 /** Instruction that consumes this value as a source. */
833 nir_instr *parent_instr;
834 struct nir_if *parent_if;
835 };
836
837 struct list_head use_link;
838
839 union {
840 nir_reg_src reg;
841 nir_ssa_def *ssa;
842 };
843
844 bool is_ssa;
845 } nir_src;
846
847 static inline nir_src
848 nir_src_init(void)
849 {
850 nir_src src = { { NULL } };
851 return src;
852 }
853
854 #define NIR_SRC_INIT nir_src_init()
855
856 #define nir_foreach_use(src, reg_or_ssa_def) \
857 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
858
859 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
860 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
861
862 #define nir_foreach_if_use(src, reg_or_ssa_def) \
863 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
864
865 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
866 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
867
868 typedef struct {
869 union {
870 nir_reg_dest reg;
871 nir_ssa_def ssa;
872 };
873
874 bool is_ssa;
875 } nir_dest;
876
877 static inline nir_dest
878 nir_dest_init(void)
879 {
880 nir_dest dest = { { { NULL } } };
881 return dest;
882 }
883
884 #define NIR_DEST_INIT nir_dest_init()
885
886 #define nir_foreach_def(dest, reg) \
887 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
888
889 #define nir_foreach_def_safe(dest, reg) \
890 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
891
892 static inline nir_src
893 nir_src_for_ssa(nir_ssa_def *def)
894 {
895 nir_src src = NIR_SRC_INIT;
896
897 src.is_ssa = true;
898 src.ssa = def;
899
900 return src;
901 }
902
903 static inline nir_src
904 nir_src_for_reg(nir_register *reg)
905 {
906 nir_src src = NIR_SRC_INIT;
907
908 src.is_ssa = false;
909 src.reg.reg = reg;
910 src.reg.indirect = NULL;
911 src.reg.base_offset = 0;
912
913 return src;
914 }
915
916 static inline nir_dest
917 nir_dest_for_reg(nir_register *reg)
918 {
919 nir_dest dest = NIR_DEST_INIT;
920
921 dest.reg.reg = reg;
922
923 return dest;
924 }
925
926 static inline unsigned
927 nir_src_bit_size(nir_src src)
928 {
929 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
930 }
931
932 static inline unsigned
933 nir_src_num_components(nir_src src)
934 {
935 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
936 }
937
938 static inline bool
939 nir_src_is_const(nir_src src)
940 {
941 return src.is_ssa &&
942 src.ssa->parent_instr->type == nir_instr_type_load_const;
943 }
944
945 static inline bool
946 nir_src_is_divergent(nir_src src)
947 {
948 assert(src.is_ssa);
949 return src.ssa->divergent;
950 }
951
952 static inline unsigned
953 nir_dest_bit_size(nir_dest dest)
954 {
955 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
956 }
957
958 static inline unsigned
959 nir_dest_num_components(nir_dest dest)
960 {
961 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
962 }
963
964 static inline bool
965 nir_dest_is_divergent(nir_dest dest)
966 {
967 assert(dest.is_ssa);
968 return dest.ssa.divergent;
969 }
970
971 /* Are all components the same, ie. .xxxx */
972 static inline bool
973 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
974 {
975 for (unsigned i = 1; i < nr_comp; i++)
976 if (swiz[i] != swiz[0])
977 return false;
978 return true;
979 }
980
981 /* Are all components sequential, ie. .yzw */
982 static inline bool
983 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
984 {
985 for (unsigned i = 1; i < nr_comp; i++)
986 if (swiz[i] != (swiz[0] + i))
987 return false;
988 return true;
989 }
990
991 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
992 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
993
994 typedef struct {
995 nir_src src;
996
997 /**
998 * \name input modifiers
999 */
1000 /*@{*/
1001 /**
1002 * For inputs interpreted as floating point, flips the sign bit. For
1003 * inputs interpreted as integers, performs the two's complement negation.
1004 */
1005 bool negate;
1006
1007 /**
1008 * Clears the sign bit for floating point values, and computes the integer
1009 * absolute value for integers. Note that the negate modifier acts after
1010 * the absolute value modifier, therefore if both are set then all inputs
1011 * will become negative.
1012 */
1013 bool abs;
1014 /*@}*/
1015
1016 /**
1017 * For each input component, says which component of the register it is
1018 * chosen from. Note that which elements of the swizzle are used and which
1019 * are ignored are based on the write mask for most opcodes - for example,
1020 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
1021 * a swizzle of {2, x, 1, 0} where x means "don't care."
1022 */
1023 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
1024 } nir_alu_src;
1025
1026 typedef struct {
1027 nir_dest dest;
1028
1029 /**
1030 * \name saturate output modifier
1031 *
1032 * Only valid for opcodes that output floating-point numbers. Clamps the
1033 * output to between 0.0 and 1.0 inclusive.
1034 */
1035
1036 bool saturate;
1037
1038 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
1039 } nir_alu_dest;
1040
1041 /** NIR sized and unsized types
1042 *
1043 * The values in this enum are carefully chosen so that the sized type is
1044 * just the unsized type OR the number of bits.
1045 */
1046 typedef enum PACKED {
1047 nir_type_invalid = 0, /* Not a valid type */
1048 nir_type_int = 2,
1049 nir_type_uint = 4,
1050 nir_type_bool = 6,
1051 nir_type_float = 128,
1052 nir_type_bool1 = 1 | nir_type_bool,
1053 nir_type_bool8 = 8 | nir_type_bool,
1054 nir_type_bool16 = 16 | nir_type_bool,
1055 nir_type_bool32 = 32 | nir_type_bool,
1056 nir_type_int1 = 1 | nir_type_int,
1057 nir_type_int8 = 8 | nir_type_int,
1058 nir_type_int16 = 16 | nir_type_int,
1059 nir_type_int32 = 32 | nir_type_int,
1060 nir_type_int64 = 64 | nir_type_int,
1061 nir_type_uint1 = 1 | nir_type_uint,
1062 nir_type_uint8 = 8 | nir_type_uint,
1063 nir_type_uint16 = 16 | nir_type_uint,
1064 nir_type_uint32 = 32 | nir_type_uint,
1065 nir_type_uint64 = 64 | nir_type_uint,
1066 nir_type_float16 = 16 | nir_type_float,
1067 nir_type_float32 = 32 | nir_type_float,
1068 nir_type_float64 = 64 | nir_type_float,
1069 } nir_alu_type;
1070
1071 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1072 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1073
1074 static inline unsigned
1075 nir_alu_type_get_type_size(nir_alu_type type)
1076 {
1077 return type & NIR_ALU_TYPE_SIZE_MASK;
1078 }
1079
1080 static inline nir_alu_type
1081 nir_alu_type_get_base_type(nir_alu_type type)
1082 {
1083 return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
1084 }
1085
1086 static inline nir_alu_type
1087 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1088 {
1089 switch (base_type) {
1090 case GLSL_TYPE_BOOL:
1091 return nir_type_bool1;
1092 break;
1093 case GLSL_TYPE_UINT:
1094 return nir_type_uint32;
1095 break;
1096 case GLSL_TYPE_INT:
1097 return nir_type_int32;
1098 break;
1099 case GLSL_TYPE_UINT16:
1100 return nir_type_uint16;
1101 break;
1102 case GLSL_TYPE_INT16:
1103 return nir_type_int16;
1104 break;
1105 case GLSL_TYPE_UINT8:
1106 return nir_type_uint8;
1107 case GLSL_TYPE_INT8:
1108 return nir_type_int8;
1109 case GLSL_TYPE_UINT64:
1110 return nir_type_uint64;
1111 break;
1112 case GLSL_TYPE_INT64:
1113 return nir_type_int64;
1114 break;
1115 case GLSL_TYPE_FLOAT:
1116 return nir_type_float32;
1117 break;
1118 case GLSL_TYPE_FLOAT16:
1119 return nir_type_float16;
1120 break;
1121 case GLSL_TYPE_DOUBLE:
1122 return nir_type_float64;
1123 break;
1124
1125 case GLSL_TYPE_SAMPLER:
1126 case GLSL_TYPE_IMAGE:
1127 case GLSL_TYPE_ATOMIC_UINT:
1128 case GLSL_TYPE_STRUCT:
1129 case GLSL_TYPE_INTERFACE:
1130 case GLSL_TYPE_ARRAY:
1131 case GLSL_TYPE_VOID:
1132 case GLSL_TYPE_SUBROUTINE:
1133 case GLSL_TYPE_FUNCTION:
1134 case GLSL_TYPE_ERROR:
1135 return nir_type_invalid;
1136 }
1137
1138 unreachable("unknown type");
1139 }
1140
1141 static inline nir_alu_type
1142 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1143 {
1144 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1145 }
1146
1147 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1148 nir_rounding_mode rnd);
1149
1150 static inline nir_op
1151 nir_op_vec(unsigned components)
1152 {
1153 switch (components) {
1154 case 1: return nir_op_mov;
1155 case 2: return nir_op_vec2;
1156 case 3: return nir_op_vec3;
1157 case 4: return nir_op_vec4;
1158 case 8: return nir_op_vec8;
1159 case 16: return nir_op_vec16;
1160 default: unreachable("bad component count");
1161 }
1162 }
1163
1164 static inline bool
1165 nir_op_is_vec(nir_op op)
1166 {
1167 switch (op) {
1168 case nir_op_mov:
1169 case nir_op_vec2:
1170 case nir_op_vec3:
1171 case nir_op_vec4:
1172 case nir_op_vec8:
1173 case nir_op_vec16:
1174 return true;
1175 default:
1176 return false;
1177 }
1178 }
1179
1180 static inline bool
1181 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1182 {
1183 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1184 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1185 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1186 }
1187
1188 static inline bool
1189 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1190 {
1191 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1192 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1193 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1194 }
1195
1196 static inline bool
1197 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1198 {
1199 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1200 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1201 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1202 }
1203
1204 static inline bool
1205 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1206 {
1207 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1208 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1209 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1210 }
1211
1212 static inline bool
1213 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1214 {
1215 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1216 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1217 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1218 }
1219
1220 static inline bool
1221 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1222 {
1223 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1224 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1225 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1226 }
1227
1228 static inline bool
1229 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1230 {
1231 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1232 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1233 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1234 }
1235
1236 static inline nir_rounding_mode
1237 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1238 nir_alu_type type)
1239 {
1240 if (nir_alu_type_get_base_type(type) != nir_type_float)
1241 return nir_rounding_mode_undef;
1242
1243 unsigned bit_size = nir_alu_type_get_type_size(type);
1244
1245 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1246 return nir_rounding_mode_rtz;
1247 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1248 return nir_rounding_mode_rtne;
1249 return nir_rounding_mode_undef;
1250 }
1251
1252 static inline bool
1253 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1254 {
1255 bool result =
1256 nir_has_any_rounding_mode_rtne(execution_mode) ||
1257 nir_has_any_rounding_mode_rtz(execution_mode);
1258 return result;
1259 }
1260
1261 typedef enum {
1262 /**
1263 * Operation where the first two sources are commutative.
1264 *
1265 * For 2-source operations, this just mathematical commutativity. Some
1266 * 3-source operations, like ffma, are only commutative in the first two
1267 * sources.
1268 */
1269 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1270 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1271 } nir_op_algebraic_property;
1272
1273 typedef struct {
1274 const char *name;
1275
1276 uint8_t num_inputs;
1277
1278 /**
1279 * The number of components in the output
1280 *
1281 * If non-zero, this is the size of the output and input sizes are
1282 * explicitly given; swizzle and writemask are still in effect, but if
1283 * the output component is masked out, then the input component may
1284 * still be in use.
1285 *
1286 * If zero, the opcode acts in the standard, per-component manner; the
1287 * operation is performed on each component (except the ones that are
1288 * masked out) with the input being taken from the input swizzle for
1289 * that component.
1290 *
1291 * The size of some of the inputs may be given (i.e. non-zero) even
1292 * though output_size is zero; in that case, the inputs with a zero
1293 * size act per-component, while the inputs with non-zero size don't.
1294 */
1295 uint8_t output_size;
1296
1297 /**
1298 * The type of vector that the instruction outputs. Note that the
1299 * staurate modifier is only allowed on outputs with the float type.
1300 */
1301
1302 nir_alu_type output_type;
1303
1304 /**
1305 * The number of components in each input
1306 */
1307 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1308
1309 /**
1310 * The type of vector that each input takes. Note that negate and
1311 * absolute value are only allowed on inputs with int or float type and
1312 * behave differently on the two.
1313 */
1314 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1315
1316 nir_op_algebraic_property algebraic_properties;
1317
1318 /* Whether this represents a numeric conversion opcode */
1319 bool is_conversion;
1320 } nir_op_info;
1321
1322 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1323
1324 typedef struct nir_alu_instr {
1325 nir_instr instr;
1326 nir_op op;
1327
1328 /** Indicates that this ALU instruction generates an exact value
1329 *
1330 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1331 * really equivalent to either. This indicates that the value generated by
1332 * this operation is high-precision and any code transformations that touch
1333 * it must ensure that the resulting value is bit-for-bit identical to the
1334 * original.
1335 */
1336 bool exact:1;
1337
1338 /**
1339 * Indicates that this instruction do not cause wrapping to occur, in the
1340 * form of overflow or underflow.
1341 */
1342 bool no_signed_wrap:1;
1343 bool no_unsigned_wrap:1;
1344
1345 nir_alu_dest dest;
1346 nir_alu_src src[];
1347 } nir_alu_instr;
1348
1349 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1350 nir_alu_instr *instr);
1351 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1352 nir_alu_instr *instr);
1353
1354 /* is this source channel used? */
1355 static inline bool
1356 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1357 unsigned channel)
1358 {
1359 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1360 return channel < nir_op_infos[instr->op].input_sizes[src];
1361
1362 return (instr->dest.write_mask >> channel) & 1;
1363 }
1364
1365 static inline nir_component_mask_t
1366 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1367 {
1368 nir_component_mask_t read_mask = 0;
1369 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1370 if (!nir_alu_instr_channel_used(instr, src, c))
1371 continue;
1372
1373 read_mask |= (1 << instr->src[src].swizzle[c]);
1374 }
1375 return read_mask;
1376 }
1377
1378 /**
1379 * Get the number of channels used for a source
1380 */
1381 static inline unsigned
1382 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1383 {
1384 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1385 return nir_op_infos[instr->op].input_sizes[src];
1386
1387 return nir_dest_num_components(instr->dest.dest);
1388 }
1389
1390 static inline bool
1391 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1392 {
1393 switch (instr->op) {
1394 case nir_op_flt:
1395 case nir_op_fge:
1396 case nir_op_feq:
1397 case nir_op_fneu:
1398 case nir_op_ilt:
1399 case nir_op_ult:
1400 case nir_op_ige:
1401 case nir_op_uge:
1402 case nir_op_ieq:
1403 case nir_op_ine:
1404 case nir_op_i2b1:
1405 case nir_op_f2b1:
1406 case nir_op_inot:
1407 return true;
1408 default:
1409 return false;
1410 }
1411 }
1412
1413 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1414 nir_alu_type full_type);
1415
1416 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1417 unsigned src1, unsigned src2);
1418
1419 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1420 const nir_alu_instr *alu2,
1421 unsigned src1, unsigned src2);
1422
1423 typedef enum {
1424 nir_deref_type_var,
1425 nir_deref_type_array,
1426 nir_deref_type_array_wildcard,
1427 nir_deref_type_ptr_as_array,
1428 nir_deref_type_struct,
1429 nir_deref_type_cast,
1430 } nir_deref_type;
1431
1432 typedef struct {
1433 nir_instr instr;
1434
1435 /** The type of this deref instruction */
1436 nir_deref_type deref_type;
1437
1438 /** The mode of the underlying variable */
1439 nir_variable_mode mode;
1440
1441 /** The dereferenced type of the resulting pointer value */
1442 const struct glsl_type *type;
1443
1444 union {
1445 /** Variable being dereferenced if deref_type is a deref_var */
1446 nir_variable *var;
1447
1448 /** Parent deref if deref_type is not deref_var */
1449 nir_src parent;
1450 };
1451
1452 /** Additional deref parameters */
1453 union {
1454 struct {
1455 nir_src index;
1456 } arr;
1457
1458 struct {
1459 unsigned index;
1460 } strct;
1461
1462 struct {
1463 unsigned ptr_stride;
1464 } cast;
1465 };
1466
1467 /** Destination to store the resulting "pointer" */
1468 nir_dest dest;
1469 } nir_deref_instr;
1470
1471 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1472
1473 static inline nir_deref_instr *
1474 nir_deref_instr_parent(const nir_deref_instr *instr)
1475 {
1476 if (instr->deref_type == nir_deref_type_var)
1477 return NULL;
1478 else
1479 return nir_src_as_deref(instr->parent);
1480 }
1481
1482 static inline nir_variable *
1483 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1484 {
1485 while (instr->deref_type != nir_deref_type_var) {
1486 if (instr->deref_type == nir_deref_type_cast)
1487 return NULL;
1488
1489 instr = nir_deref_instr_parent(instr);
1490 }
1491
1492 return instr->var;
1493 }
1494
1495 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1496 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1497 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1498
1499 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1500
1501 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1502
1503 typedef struct {
1504 nir_instr instr;
1505
1506 struct nir_function *callee;
1507
1508 unsigned num_params;
1509 nir_src params[];
1510 } nir_call_instr;
1511
1512 #include "nir_intrinsics.h"
1513
1514 #define NIR_INTRINSIC_MAX_CONST_INDEX 5
1515
1516 /** Represents an intrinsic
1517 *
1518 * An intrinsic is an instruction type for handling things that are
1519 * more-or-less regular operations but don't just consume and produce SSA
1520 * values like ALU operations do. Intrinsics are not for things that have
1521 * special semantic meaning such as phi nodes and parallel copies.
1522 * Examples of intrinsics include variable load/store operations, system
1523 * value loads, and the like. Even though texturing more-or-less falls
1524 * under this category, texturing is its own instruction type because
1525 * trying to represent texturing with intrinsics would lead to a
1526 * combinatorial explosion of intrinsic opcodes.
1527 *
1528 * By having a single instruction type for handling a lot of different
1529 * cases, optimization passes can look for intrinsics and, for the most
1530 * part, completely ignore them. Each intrinsic type also has a few
1531 * possible flags that govern whether or not they can be reordered or
1532 * eliminated. That way passes like dead code elimination can still work
1533 * on intrisics without understanding the meaning of each.
1534 *
1535 * Each intrinsic has some number of constant indices, some number of
1536 * variables, and some number of sources. What these sources, variables,
1537 * and indices mean depends on the intrinsic and is documented with the
1538 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1539 * instructions are the only types of instruction that can operate on
1540 * variables.
1541 */
1542 typedef struct {
1543 nir_instr instr;
1544
1545 nir_intrinsic_op intrinsic;
1546
1547 nir_dest dest;
1548
1549 /** number of components if this is a vectorized intrinsic
1550 *
1551 * Similarly to ALU operations, some intrinsics are vectorized.
1552 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1553 * For vectorized intrinsics, the num_components field specifies the
1554 * number of destination components and the number of source components
1555 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1556 */
1557 uint8_t num_components;
1558
1559 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1560
1561 nir_src src[];
1562 } nir_intrinsic_instr;
1563
1564 static inline nir_variable *
1565 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1566 {
1567 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1568 }
1569
1570 typedef enum {
1571 /* Memory ordering. */
1572 NIR_MEMORY_ACQUIRE = 1 << 0,
1573 NIR_MEMORY_RELEASE = 1 << 1,
1574 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1575
1576 /* Memory visibility operations. */
1577 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1578 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1579 } nir_memory_semantics;
1580
1581 typedef enum {
1582 NIR_SCOPE_NONE,
1583 NIR_SCOPE_INVOCATION,
1584 NIR_SCOPE_SUBGROUP,
1585 NIR_SCOPE_WORKGROUP,
1586 NIR_SCOPE_QUEUE_FAMILY,
1587 NIR_SCOPE_DEVICE,
1588 } nir_scope;
1589
1590 /**
1591 * \name NIR intrinsics semantic flags
1592 *
1593 * information about what the compiler can do with the intrinsics.
1594 *
1595 * \sa nir_intrinsic_info::flags
1596 */
1597 typedef enum {
1598 /**
1599 * whether the intrinsic can be safely eliminated if none of its output
1600 * value is not being used.
1601 */
1602 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1603
1604 /**
1605 * Whether the intrinsic can be reordered with respect to any other
1606 * intrinsic, i.e. whether the only reordering dependencies of the
1607 * intrinsic are due to the register reads/writes.
1608 */
1609 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1610 } nir_intrinsic_semantic_flag;
1611
1612 /**
1613 * \name NIR intrinsics const-index flag
1614 *
1615 * Indicates the usage of a const_index slot.
1616 *
1617 * \sa nir_intrinsic_info::index_map
1618 */
1619 typedef enum {
1620 /**
1621 * Generally instructions that take a offset src argument, can encode
1622 * a constant 'base' value which is added to the offset.
1623 */
1624 NIR_INTRINSIC_BASE = 1,
1625
1626 /**
1627 * For store instructions, a writemask for the store.
1628 */
1629 NIR_INTRINSIC_WRMASK,
1630
1631 /**
1632 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1633 */
1634 NIR_INTRINSIC_STREAM_ID,
1635
1636 /**
1637 * The clip-plane id for load_user_clip_plane intrinsic.
1638 */
1639 NIR_INTRINSIC_UCP_ID,
1640
1641 /**
1642 * The amount of data, starting from BASE, that this instruction may
1643 * access. This is used to provide bounds if the offset is not constant.
1644 */
1645 NIR_INTRINSIC_RANGE,
1646
1647 /**
1648 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1649 */
1650 NIR_INTRINSIC_DESC_SET,
1651
1652 /**
1653 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1654 */
1655 NIR_INTRINSIC_BINDING,
1656
1657 /**
1658 * Component offset.
1659 */
1660 NIR_INTRINSIC_COMPONENT,
1661
1662 /**
1663 * Interpolation mode (only meaningful for FS inputs).
1664 */
1665 NIR_INTRINSIC_INTERP_MODE,
1666
1667 /**
1668 * A binary nir_op to use when performing a reduction or scan operation
1669 */
1670 NIR_INTRINSIC_REDUCTION_OP,
1671
1672 /**
1673 * Cluster size for reduction operations
1674 */
1675 NIR_INTRINSIC_CLUSTER_SIZE,
1676
1677 /**
1678 * Parameter index for a load_param intrinsic
1679 */
1680 NIR_INTRINSIC_PARAM_IDX,
1681
1682 /**
1683 * Image dimensionality for image intrinsics
1684 *
1685 * One of GLSL_SAMPLER_DIM_*
1686 */
1687 NIR_INTRINSIC_IMAGE_DIM,
1688
1689 /**
1690 * Non-zero if we are accessing an array image
1691 */
1692 NIR_INTRINSIC_IMAGE_ARRAY,
1693
1694 /**
1695 * Image format for image intrinsics
1696 */
1697 NIR_INTRINSIC_FORMAT,
1698
1699 /**
1700 * Access qualifiers for image and memory access intrinsics
1701 */
1702 NIR_INTRINSIC_ACCESS,
1703
1704 /**
1705 * Alignment for offsets and addresses
1706 *
1707 * These two parameters, specify an alignment in terms of a multiplier and
1708 * an offset. The offset or address parameter X of the intrinsic is
1709 * guaranteed to satisfy the following:
1710 *
1711 * (X - align_offset) % align_mul == 0
1712 */
1713 NIR_INTRINSIC_ALIGN_MUL,
1714 NIR_INTRINSIC_ALIGN_OFFSET,
1715
1716 /**
1717 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1718 */
1719 NIR_INTRINSIC_DESC_TYPE,
1720
1721 /**
1722 * The nir_alu_type of a uniform/input/output
1723 */
1724 NIR_INTRINSIC_TYPE,
1725
1726 /**
1727 * The swizzle mask for the instructions
1728 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1729 */
1730 NIR_INTRINSIC_SWIZZLE_MASK,
1731
1732 /* Separate source/dest access flags for copies */
1733 NIR_INTRINSIC_SRC_ACCESS,
1734 NIR_INTRINSIC_DST_ACCESS,
1735
1736 /* Driver location for nir_load_patch_location_ir3 */
1737 NIR_INTRINSIC_DRIVER_LOCATION,
1738
1739 /**
1740 * Mask of nir_memory_semantics, includes ordering and visibility.
1741 */
1742 NIR_INTRINSIC_MEMORY_SEMANTICS,
1743
1744 /**
1745 * Mask of nir_variable_modes affected by the memory operation.
1746 */
1747 NIR_INTRINSIC_MEMORY_MODES,
1748
1749 /**
1750 * Value of nir_scope.
1751 */
1752 NIR_INTRINSIC_MEMORY_SCOPE,
1753
1754 /**
1755 * Value of nir_scope.
1756 */
1757 NIR_INTRINSIC_EXECUTION_SCOPE,
1758
1759 /**
1760 * Value of nir_io_semantics.
1761 */
1762 NIR_INTRINSIC_IO_SEMANTICS,
1763
1764 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1765
1766 } nir_intrinsic_index_flag;
1767
1768 typedef struct {
1769 unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
1770 unsigned num_slots:6; /* max 32, may be pessimistic with const indexing */
1771 unsigned dual_source_blend_index:1;
1772 unsigned fb_fetch_output:1; /* for GL_KHR_blend_equation_advanced */
1773 unsigned gs_streams:8; /* xxyyzzww: 2-bit stream index for each component */
1774 unsigned _pad:9;
1775 } nir_io_semantics;
1776
1777 #define NIR_INTRINSIC_MAX_INPUTS 5
1778
1779 typedef struct {
1780 const char *name;
1781
1782 uint8_t num_srcs; /** < number of register/SSA inputs */
1783
1784 /** number of components of each input register
1785 *
1786 * If this value is 0, the number of components is given by the
1787 * num_components field of nir_intrinsic_instr. If this value is -1, the
1788 * intrinsic consumes however many components are provided and it is not
1789 * validated at all.
1790 */
1791 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1792
1793 bool has_dest;
1794
1795 /** number of components of the output register
1796 *
1797 * If this value is 0, the number of components is given by the
1798 * num_components field of nir_intrinsic_instr.
1799 */
1800 uint8_t dest_components;
1801
1802 /** bitfield of legal bit sizes */
1803 uint8_t dest_bit_sizes;
1804
1805 /** the number of constant indices used by the intrinsic */
1806 uint8_t num_indices;
1807
1808 /** indicates the usage of intr->const_index[n] */
1809 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1810
1811 /** semantic flags for calls to this intrinsic */
1812 nir_intrinsic_semantic_flag flags;
1813 } nir_intrinsic_info;
1814
1815 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1816
1817 static inline unsigned
1818 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1819 {
1820 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1821 assert(srcn < info->num_srcs);
1822 if (info->src_components[srcn] > 0)
1823 return info->src_components[srcn];
1824 else if (info->src_components[srcn] == 0)
1825 return intr->num_components;
1826 else
1827 return nir_src_num_components(intr->src[srcn]);
1828 }
1829
1830 static inline unsigned
1831 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1832 {
1833 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1834 if (!info->has_dest)
1835 return 0;
1836 else if (info->dest_components)
1837 return info->dest_components;
1838 else
1839 return intr->num_components;
1840 }
1841
1842 /**
1843 * Helper to copy const_index[] from src to dst, without assuming they
1844 * match in order.
1845 */
1846 static inline void
1847 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1848 {
1849 if (src->intrinsic == dst->intrinsic) {
1850 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1851 return;
1852 }
1853
1854 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1855 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1856
1857 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1858 if (src_info->index_map[i] == 0)
1859 continue;
1860
1861 /* require that dst instruction also uses the same const_index[]: */
1862 assert(dst_info->index_map[i] > 0);
1863
1864 dst->const_index[dst_info->index_map[i] - 1] =
1865 src->const_index[src_info->index_map[i] - 1];
1866 }
1867 }
1868
1869 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1870 static inline type \
1871 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1872 { \
1873 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1874 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1875 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1876 } \
1877 static inline void \
1878 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1879 { \
1880 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1881 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1882 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1883 } \
1884 static inline bool \
1885 nir_intrinsic_has_##name(nir_intrinsic_instr *instr) \
1886 { \
1887 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1888 return info->index_map[NIR_INTRINSIC_##flag] > 0; \
1889 }
1890
1891 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1892 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1893 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1894 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1895 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1896 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1897 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1898 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1899 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1900 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1901 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1902 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1903 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1904 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1905 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1906 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1907 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1908 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1909 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1910 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1911 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1912 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1913 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1914 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1915 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1916 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1917 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1918 INTRINSIC_IDX_ACCESSORS(execution_scope, EXECUTION_SCOPE, nir_scope)
1919
1920 static inline void
1921 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1922 unsigned align_mul, unsigned align_offset)
1923 {
1924 assert(util_is_power_of_two_nonzero(align_mul));
1925 assert(align_offset < align_mul);
1926 nir_intrinsic_set_align_mul(intrin, align_mul);
1927 nir_intrinsic_set_align_offset(intrin, align_offset);
1928 }
1929
1930 /** Returns a simple alignment for a load/store intrinsic offset
1931 *
1932 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1933 * and ALIGN_OFFSET parameters, this helper takes both into account and
1934 * provides a single simple alignment parameter. The offset X is guaranteed
1935 * to satisfy X % align == 0.
1936 */
1937 static inline unsigned
1938 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1939 {
1940 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1941 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1942 assert(align_offset < align_mul);
1943 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1944 }
1945
1946 static inline void
1947 nir_intrinsic_set_io_semantics(nir_intrinsic_instr *intrin,
1948 nir_io_semantics semantics)
1949 {
1950 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1951 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1952 STATIC_ASSERT(sizeof(nir_io_semantics) == sizeof(intrin->const_index[0]));
1953 semantics._pad = 0; /* clear padding bits */
1954 memcpy(&intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1955 &semantics, sizeof(semantics));
1956 }
1957
1958 static inline nir_io_semantics
1959 nir_intrinsic_io_semantics(const nir_intrinsic_instr *intrin)
1960 {
1961 const nir_intrinsic_info *info = &nir_intrinsic_infos[intrin->intrinsic];
1962 assert(info->index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0);
1963 nir_io_semantics semantics;
1964 memcpy(&semantics,
1965 &intrin->const_index[info->index_map[NIR_INTRINSIC_IO_SEMANTICS] - 1],
1966 sizeof(semantics));
1967 return semantics;
1968 }
1969
1970 unsigned
1971 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1972
1973 /* Converts a image_deref_* intrinsic into a image_* one */
1974 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1975 nir_ssa_def *handle, bool bindless);
1976
1977 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1978 static inline bool
1979 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1980 {
1981 if (instr->intrinsic == nir_intrinsic_load_deref ||
1982 instr->intrinsic == nir_intrinsic_load_ssbo ||
1983 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1984 instr->intrinsic == nir_intrinsic_image_deref_load ||
1985 instr->intrinsic == nir_intrinsic_image_load) {
1986 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1987 } else {
1988 const nir_intrinsic_info *info =
1989 &nir_intrinsic_infos[instr->intrinsic];
1990 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1991 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1992 }
1993 }
1994
1995 /**
1996 * \group texture information
1997 *
1998 * This gives semantic information about textures which is useful to the
1999 * frontend, the backend, and lowering passes, but not the optimizer.
2000 */
2001
2002 typedef enum {
2003 nir_tex_src_coord,
2004 nir_tex_src_projector,
2005 nir_tex_src_comparator, /* shadow comparator */
2006 nir_tex_src_offset,
2007 nir_tex_src_bias,
2008 nir_tex_src_lod,
2009 nir_tex_src_min_lod,
2010 nir_tex_src_ms_index, /* MSAA sample index */
2011 nir_tex_src_ms_mcs, /* MSAA compression value */
2012 nir_tex_src_ddx,
2013 nir_tex_src_ddy,
2014 nir_tex_src_texture_deref, /* < deref pointing to the texture */
2015 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
2016 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
2017 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
2018 nir_tex_src_texture_handle, /* < bindless texture handle */
2019 nir_tex_src_sampler_handle, /* < bindless sampler handle */
2020 nir_tex_src_plane, /* < selects plane for planar textures */
2021 nir_num_tex_src_types
2022 } nir_tex_src_type;
2023
2024 typedef struct {
2025 nir_src src;
2026 nir_tex_src_type src_type;
2027 } nir_tex_src;
2028
2029 typedef enum {
2030 nir_texop_tex, /**< Regular texture look-up */
2031 nir_texop_txb, /**< Texture look-up with LOD bias */
2032 nir_texop_txl, /**< Texture look-up with explicit LOD */
2033 nir_texop_txd, /**< Texture look-up with partial derivatives */
2034 nir_texop_txf, /**< Texel fetch with explicit LOD */
2035 nir_texop_txf_ms, /**< Multisample texture fetch */
2036 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
2037 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
2038 nir_texop_txs, /**< Texture size */
2039 nir_texop_lod, /**< Texture lod query */
2040 nir_texop_tg4, /**< Texture gather */
2041 nir_texop_query_levels, /**< Texture levels query */
2042 nir_texop_texture_samples, /**< Texture samples query */
2043 nir_texop_samples_identical, /**< Query whether all samples are definitely
2044 * identical.
2045 */
2046 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
2047 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
2048 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
2049 } nir_texop;
2050
2051 typedef struct {
2052 nir_instr instr;
2053
2054 enum glsl_sampler_dim sampler_dim;
2055 nir_alu_type dest_type;
2056
2057 nir_texop op;
2058 nir_dest dest;
2059 nir_tex_src *src;
2060 unsigned num_srcs, coord_components;
2061 bool is_array, is_shadow;
2062
2063 /**
2064 * If is_shadow is true, whether this is the old-style shadow that outputs 4
2065 * components or the new-style shadow that outputs 1 component.
2066 */
2067 bool is_new_style_shadow;
2068
2069 /* gather component selector */
2070 unsigned component : 2;
2071
2072 /* gather offsets */
2073 int8_t tg4_offsets[4][2];
2074
2075 /* True if the texture index or handle is not dynamically uniform */
2076 bool texture_non_uniform;
2077
2078 /* True if the sampler index or handle is not dynamically uniform */
2079 bool sampler_non_uniform;
2080
2081 /** The texture index
2082 *
2083 * If this texture instruction has a nir_tex_src_texture_offset source,
2084 * then the texture index is given by texture_index + texture_offset.
2085 */
2086 unsigned texture_index;
2087
2088 /** The sampler index
2089 *
2090 * The following operations do not require a sampler and, as such, this
2091 * field should be ignored:
2092 * - nir_texop_txf
2093 * - nir_texop_txf_ms
2094 * - nir_texop_txs
2095 * - nir_texop_lod
2096 * - nir_texop_query_levels
2097 * - nir_texop_texture_samples
2098 * - nir_texop_samples_identical
2099 *
2100 * If this texture instruction has a nir_tex_src_sampler_offset source,
2101 * then the sampler index is given by sampler_index + sampler_offset.
2102 */
2103 unsigned sampler_index;
2104 } nir_tex_instr;
2105
2106 /*
2107 * Returns true if the texture operation requires a sampler as a general rule,
2108 * see the documentation of sampler_index.
2109 *
2110 * Note that the specific hw/driver backend could require to a sampler
2111 * object/configuration packet in any case, for some other reason.
2112 */
2113 static inline bool
2114 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2115 {
2116 switch (instr->op) {
2117 case nir_texop_txf:
2118 case nir_texop_txf_ms:
2119 case nir_texop_txs:
2120 case nir_texop_lod:
2121 case nir_texop_query_levels:
2122 case nir_texop_texture_samples:
2123 case nir_texop_samples_identical:
2124 return false;
2125 default:
2126 return true;
2127 }
2128 }
2129
2130 static inline unsigned
2131 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2132 {
2133 switch (instr->op) {
2134 case nir_texop_txs: {
2135 unsigned ret;
2136 switch (instr->sampler_dim) {
2137 case GLSL_SAMPLER_DIM_1D:
2138 case GLSL_SAMPLER_DIM_BUF:
2139 ret = 1;
2140 break;
2141 case GLSL_SAMPLER_DIM_2D:
2142 case GLSL_SAMPLER_DIM_CUBE:
2143 case GLSL_SAMPLER_DIM_MS:
2144 case GLSL_SAMPLER_DIM_RECT:
2145 case GLSL_SAMPLER_DIM_EXTERNAL:
2146 case GLSL_SAMPLER_DIM_SUBPASS:
2147 ret = 2;
2148 break;
2149 case GLSL_SAMPLER_DIM_3D:
2150 ret = 3;
2151 break;
2152 default:
2153 unreachable("not reached");
2154 }
2155 if (instr->is_array)
2156 ret++;
2157 return ret;
2158 }
2159
2160 case nir_texop_lod:
2161 return 2;
2162
2163 case nir_texop_texture_samples:
2164 case nir_texop_query_levels:
2165 case nir_texop_samples_identical:
2166 case nir_texop_fragment_mask_fetch:
2167 return 1;
2168
2169 default:
2170 if (instr->is_shadow && instr->is_new_style_shadow)
2171 return 1;
2172
2173 return 4;
2174 }
2175 }
2176
2177 /* Returns true if this texture operation queries something about the texture
2178 * rather than actually sampling it.
2179 */
2180 static inline bool
2181 nir_tex_instr_is_query(const nir_tex_instr *instr)
2182 {
2183 switch (instr->op) {
2184 case nir_texop_txs:
2185 case nir_texop_lod:
2186 case nir_texop_texture_samples:
2187 case nir_texop_query_levels:
2188 case nir_texop_txf_ms_mcs:
2189 return true;
2190 case nir_texop_tex:
2191 case nir_texop_txb:
2192 case nir_texop_txl:
2193 case nir_texop_txd:
2194 case nir_texop_txf:
2195 case nir_texop_txf_ms:
2196 case nir_texop_txf_ms_fb:
2197 case nir_texop_tg4:
2198 return false;
2199 default:
2200 unreachable("Invalid texture opcode");
2201 }
2202 }
2203
2204 static inline bool
2205 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2206 {
2207 switch (instr->op) {
2208 case nir_texop_tex:
2209 case nir_texop_txb:
2210 case nir_texop_lod:
2211 return true;
2212 default:
2213 return false;
2214 }
2215 }
2216
2217 static inline nir_alu_type
2218 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2219 {
2220 switch (instr->src[src].src_type) {
2221 case nir_tex_src_coord:
2222 switch (instr->op) {
2223 case nir_texop_txf:
2224 case nir_texop_txf_ms:
2225 case nir_texop_txf_ms_fb:
2226 case nir_texop_txf_ms_mcs:
2227 case nir_texop_samples_identical:
2228 return nir_type_int;
2229
2230 default:
2231 return nir_type_float;
2232 }
2233
2234 case nir_tex_src_lod:
2235 switch (instr->op) {
2236 case nir_texop_txs:
2237 case nir_texop_txf:
2238 return nir_type_int;
2239
2240 default:
2241 return nir_type_float;
2242 }
2243
2244 case nir_tex_src_projector:
2245 case nir_tex_src_comparator:
2246 case nir_tex_src_bias:
2247 case nir_tex_src_min_lod:
2248 case nir_tex_src_ddx:
2249 case nir_tex_src_ddy:
2250 return nir_type_float;
2251
2252 case nir_tex_src_offset:
2253 case nir_tex_src_ms_index:
2254 case nir_tex_src_plane:
2255 return nir_type_int;
2256
2257 case nir_tex_src_ms_mcs:
2258 case nir_tex_src_texture_deref:
2259 case nir_tex_src_sampler_deref:
2260 case nir_tex_src_texture_offset:
2261 case nir_tex_src_sampler_offset:
2262 case nir_tex_src_texture_handle:
2263 case nir_tex_src_sampler_handle:
2264 return nir_type_uint;
2265
2266 case nir_num_tex_src_types:
2267 unreachable("nir_num_tex_src_types is not a valid source type");
2268 }
2269
2270 unreachable("Invalid texture source type");
2271 }
2272
2273 static inline unsigned
2274 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2275 {
2276 if (instr->src[src].src_type == nir_tex_src_coord)
2277 return instr->coord_components;
2278
2279 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2280 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2281 return 4;
2282
2283 if (instr->src[src].src_type == nir_tex_src_ddx ||
2284 instr->src[src].src_type == nir_tex_src_ddy) {
2285 if (instr->is_array)
2286 return instr->coord_components - 1;
2287 else
2288 return instr->coord_components;
2289 }
2290
2291 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2292 * the offset, since a cube maps to a single face.
2293 */
2294 if (instr->src[src].src_type == nir_tex_src_offset) {
2295 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2296 return 2;
2297 else if (instr->is_array)
2298 return instr->coord_components - 1;
2299 else
2300 return instr->coord_components;
2301 }
2302
2303 return 1;
2304 }
2305
2306 static inline int
2307 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2308 {
2309 for (unsigned i = 0; i < instr->num_srcs; i++)
2310 if (instr->src[i].src_type == type)
2311 return (int) i;
2312
2313 return -1;
2314 }
2315
2316 void nir_tex_instr_add_src(nir_tex_instr *tex,
2317 nir_tex_src_type src_type,
2318 nir_src src);
2319
2320 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2321
2322 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2323
2324 typedef struct {
2325 nir_instr instr;
2326
2327 nir_ssa_def def;
2328
2329 nir_const_value value[];
2330 } nir_load_const_instr;
2331
2332 typedef enum {
2333 /** Return from a function
2334 *
2335 * This instruction is a classic function return. It jumps to
2336 * nir_function_impl::end_block. No return value is provided in this
2337 * instruction. Instead, the function is expected to write any return
2338 * data to a deref passed in from the caller.
2339 */
2340 nir_jump_return,
2341
2342 /** Break out of the inner-most loop
2343 *
2344 * This has the same semantics as C's "break" statement.
2345 */
2346 nir_jump_break,
2347
2348 /** Jump back to the top of the inner-most loop
2349 *
2350 * This has the same semantics as C's "continue" statement assuming that a
2351 * NIR loop is implemented as "while (1) { body }".
2352 */
2353 nir_jump_continue,
2354
2355 /** Jumps for unstructured CFG.
2356 *
2357 * As within an unstructured CFG we can't rely on block ordering we need to
2358 * place explicit jumps at the end of every block.
2359 */
2360 nir_jump_goto,
2361 nir_jump_goto_if,
2362 } nir_jump_type;
2363
2364 typedef struct {
2365 nir_instr instr;
2366 nir_jump_type type;
2367 nir_src condition;
2368 struct nir_block *target;
2369 struct nir_block *else_target;
2370 } nir_jump_instr;
2371
2372 /* creates a new SSA variable in an undefined state */
2373
2374 typedef struct {
2375 nir_instr instr;
2376 nir_ssa_def def;
2377 } nir_ssa_undef_instr;
2378
2379 typedef struct {
2380 struct exec_node node;
2381
2382 /* The predecessor block corresponding to this source */
2383 struct nir_block *pred;
2384
2385 nir_src src;
2386 } nir_phi_src;
2387
2388 #define nir_foreach_phi_src(phi_src, phi) \
2389 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2390 #define nir_foreach_phi_src_safe(phi_src, phi) \
2391 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2392
2393 typedef struct {
2394 nir_instr instr;
2395
2396 struct exec_list srcs; /** < list of nir_phi_src */
2397
2398 nir_dest dest;
2399 } nir_phi_instr;
2400
2401 typedef struct {
2402 struct exec_node node;
2403 nir_src src;
2404 nir_dest dest;
2405 } nir_parallel_copy_entry;
2406
2407 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2408 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2409
2410 typedef struct {
2411 nir_instr instr;
2412
2413 /* A list of nir_parallel_copy_entrys. The sources of all of the
2414 * entries are copied to the corresponding destinations "in parallel".
2415 * In other words, if we have two entries: a -> b and b -> a, the values
2416 * get swapped.
2417 */
2418 struct exec_list entries;
2419 } nir_parallel_copy_instr;
2420
2421 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2422 type, nir_instr_type_alu)
2423 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2424 type, nir_instr_type_deref)
2425 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2426 type, nir_instr_type_call)
2427 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2428 type, nir_instr_type_jump)
2429 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2430 type, nir_instr_type_tex)
2431 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2432 type, nir_instr_type_intrinsic)
2433 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2434 type, nir_instr_type_load_const)
2435 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2436 type, nir_instr_type_ssa_undef)
2437 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2438 type, nir_instr_type_phi)
2439 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2440 nir_parallel_copy_instr, instr,
2441 type, nir_instr_type_parallel_copy)
2442
2443
2444 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2445 static inline type \
2446 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2447 { \
2448 assert(nir_src_is_const(src)); \
2449 nir_load_const_instr *load = \
2450 nir_instr_as_load_const(src.ssa->parent_instr); \
2451 assert(comp < load->def.num_components); \
2452 return nir_const_value_as_##suffix(load->value[comp], \
2453 load->def.bit_size); \
2454 } \
2455 \
2456 static inline type \
2457 nir_src_as_##suffix(nir_src src) \
2458 { \
2459 assert(nir_src_num_components(src) == 1); \
2460 return nir_src_comp_as_##suffix(src, 0); \
2461 }
2462
2463 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2464 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2465 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2466 NIR_DEFINE_SRC_AS_CONST(double, float)
2467
2468 #undef NIR_DEFINE_SRC_AS_CONST
2469
2470
2471 typedef struct {
2472 nir_ssa_def *def;
2473 unsigned comp;
2474 } nir_ssa_scalar;
2475
2476 static inline bool
2477 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2478 {
2479 return s.def->parent_instr->type == nir_instr_type_load_const;
2480 }
2481
2482 static inline nir_const_value
2483 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2484 {
2485 assert(s.comp < s.def->num_components);
2486 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2487 return load->value[s.comp];
2488 }
2489
2490 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2491 static inline type \
2492 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2493 { \
2494 return nir_const_value_as_##suffix( \
2495 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2496 }
2497
2498 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2499 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2500 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2501 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2502
2503 #undef NIR_DEFINE_SCALAR_AS_CONST
2504
2505 static inline bool
2506 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2507 {
2508 return s.def->parent_instr->type == nir_instr_type_alu;
2509 }
2510
2511 static inline nir_op
2512 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2513 {
2514 return nir_instr_as_alu(s.def->parent_instr)->op;
2515 }
2516
2517 static inline nir_ssa_scalar
2518 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2519 {
2520 nir_ssa_scalar out = { NULL, 0 };
2521
2522 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2523 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2524
2525 /* Our component must be written */
2526 assert(s.comp < s.def->num_components);
2527 assert(alu->dest.write_mask & (1u << s.comp));
2528
2529 assert(alu->src[alu_src_idx].src.is_ssa);
2530 out.def = alu->src[alu_src_idx].src.ssa;
2531
2532 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2533 /* The ALU src is unsized so the source component follows the
2534 * destination component.
2535 */
2536 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2537 } else {
2538 /* This is a sized source so all source components work together to
2539 * produce all the destination components. Since we need to return a
2540 * scalar, this only works if the source is a scalar.
2541 */
2542 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2543 out.comp = alu->src[alu_src_idx].swizzle[0];
2544 }
2545 assert(out.comp < out.def->num_components);
2546
2547 return out;
2548 }
2549
2550
2551 /*
2552 * Control flow
2553 *
2554 * Control flow consists of a tree of control flow nodes, which include
2555 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2556 * instructions that always run start-to-finish. Each basic block also keeps
2557 * track of its successors (blocks which may run immediately after the current
2558 * block) and predecessors (blocks which could have run immediately before the
2559 * current block). Each function also has a start block and an end block which
2560 * all return statements point to (which is always empty). Together, all the
2561 * blocks with their predecessors and successors make up the control flow
2562 * graph (CFG) of the function. There are helpers that modify the tree of
2563 * control flow nodes while modifying the CFG appropriately; these should be
2564 * used instead of modifying the tree directly.
2565 */
2566
2567 typedef enum {
2568 nir_cf_node_block,
2569 nir_cf_node_if,
2570 nir_cf_node_loop,
2571 nir_cf_node_function
2572 } nir_cf_node_type;
2573
2574 typedef struct nir_cf_node {
2575 struct exec_node node;
2576 nir_cf_node_type type;
2577 struct nir_cf_node *parent;
2578 } nir_cf_node;
2579
2580 typedef struct nir_block {
2581 nir_cf_node cf_node;
2582
2583 struct exec_list instr_list; /** < list of nir_instr */
2584
2585 /** generic block index; generated by nir_index_blocks */
2586 unsigned index;
2587
2588 /*
2589 * Each block can only have up to 2 successors, so we put them in a simple
2590 * array - no need for anything more complicated.
2591 */
2592 struct nir_block *successors[2];
2593
2594 /* Set of nir_block predecessors in the CFG */
2595 struct set *predecessors;
2596
2597 /*
2598 * this node's immediate dominator in the dominance tree - set to NULL for
2599 * the start block.
2600 */
2601 struct nir_block *imm_dom;
2602
2603 /* This node's children in the dominance tree */
2604 unsigned num_dom_children;
2605 struct nir_block **dom_children;
2606
2607 /* Set of nir_blocks on the dominance frontier of this block */
2608 struct set *dom_frontier;
2609
2610 /*
2611 * These two indices have the property that dom_{pre,post}_index for each
2612 * child of this block in the dominance tree will always be between
2613 * dom_pre_index and dom_post_index for this block, which makes testing if
2614 * a given block is dominated by another block an O(1) operation.
2615 */
2616 int16_t dom_pre_index, dom_post_index;
2617
2618 /* SSA def live in and out for this block; used for liveness analysis.
2619 * Indexed by ssa_def->index
2620 */
2621 BITSET_WORD *live_in;
2622 BITSET_WORD *live_out;
2623 } nir_block;
2624
2625 static inline bool
2626 nir_block_is_reachable(nir_block *b)
2627 {
2628 /* See also nir_block_dominates */
2629 return b->dom_post_index != -1;
2630 }
2631
2632 static inline nir_instr *
2633 nir_block_first_instr(nir_block *block)
2634 {
2635 struct exec_node *head = exec_list_get_head(&block->instr_list);
2636 return exec_node_data(nir_instr, head, node);
2637 }
2638
2639 static inline nir_instr *
2640 nir_block_last_instr(nir_block *block)
2641 {
2642 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2643 return exec_node_data(nir_instr, tail, node);
2644 }
2645
2646 static inline bool
2647 nir_block_ends_in_jump(nir_block *block)
2648 {
2649 return !exec_list_is_empty(&block->instr_list) &&
2650 nir_block_last_instr(block)->type == nir_instr_type_jump;
2651 }
2652
2653 #define nir_foreach_instr(instr, block) \
2654 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2655 #define nir_foreach_instr_reverse(instr, block) \
2656 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2657 #define nir_foreach_instr_safe(instr, block) \
2658 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2659 #define nir_foreach_instr_reverse_safe(instr, block) \
2660 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2661
2662 typedef enum {
2663 nir_selection_control_none = 0x0,
2664 nir_selection_control_flatten = 0x1,
2665 nir_selection_control_dont_flatten = 0x2,
2666 } nir_selection_control;
2667
2668 typedef struct nir_if {
2669 nir_cf_node cf_node;
2670 nir_src condition;
2671 nir_selection_control control;
2672
2673 struct exec_list then_list; /** < list of nir_cf_node */
2674 struct exec_list else_list; /** < list of nir_cf_node */
2675 } nir_if;
2676
2677 typedef struct {
2678 nir_if *nif;
2679
2680 /** Instruction that generates nif::condition. */
2681 nir_instr *conditional_instr;
2682
2683 /** Block within ::nif that has the break instruction. */
2684 nir_block *break_block;
2685
2686 /** Last block for the then- or else-path that does not contain the break. */
2687 nir_block *continue_from_block;
2688
2689 /** True when ::break_block is in the else-path of ::nif. */
2690 bool continue_from_then;
2691 bool induction_rhs;
2692
2693 /* This is true if the terminators exact trip count is unknown. For
2694 * example:
2695 *
2696 * for (int i = 0; i < imin(x, 4); i++)
2697 * ...
2698 *
2699 * Here loop analysis would have set a max_trip_count of 4 however we dont
2700 * know for sure that this is the exact trip count.
2701 */
2702 bool exact_trip_count_unknown;
2703
2704 struct list_head loop_terminator_link;
2705 } nir_loop_terminator;
2706
2707 typedef struct {
2708 /* Estimated cost (in number of instructions) of the loop */
2709 unsigned instr_cost;
2710
2711 /* Guessed trip count based on array indexing */
2712 unsigned guessed_trip_count;
2713
2714 /* Maximum number of times the loop is run (if known) */
2715 unsigned max_trip_count;
2716
2717 /* Do we know the exact number of times the loop will be run */
2718 bool exact_trip_count_known;
2719
2720 /* Unroll the loop regardless of its size */
2721 bool force_unroll;
2722
2723 /* Does the loop contain complex loop terminators, continues or other
2724 * complex behaviours? If this is true we can't rely on
2725 * loop_terminator_list to be complete or accurate.
2726 */
2727 bool complex_loop;
2728
2729 nir_loop_terminator *limiting_terminator;
2730
2731 /* A list of loop_terminators terminating this loop. */
2732 struct list_head loop_terminator_list;
2733 } nir_loop_info;
2734
2735 typedef enum {
2736 nir_loop_control_none = 0x0,
2737 nir_loop_control_unroll = 0x1,
2738 nir_loop_control_dont_unroll = 0x2,
2739 } nir_loop_control;
2740
2741 typedef struct {
2742 nir_cf_node cf_node;
2743
2744 struct exec_list body; /** < list of nir_cf_node */
2745
2746 nir_loop_info *info;
2747 nir_loop_control control;
2748 bool partially_unrolled;
2749 } nir_loop;
2750
2751 /**
2752 * Various bits of metadata that can may be created or required by
2753 * optimization and analysis passes
2754 */
2755 typedef enum {
2756 nir_metadata_none = 0x0,
2757
2758 /** Indicates that nir_block::index values are valid.
2759 *
2760 * The start block has index 0 and they increase through a natural walk of
2761 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2762 * every block index is in the range [0, nir_function_impl::num_blocks].
2763 *
2764 * A pass can preserve this metadata type if it doesn't touch the CFG.
2765 */
2766 nir_metadata_block_index = 0x1,
2767
2768 /** Indicates that block dominance information is valid
2769 *
2770 * This includes:
2771 *
2772 * - nir_block::num_dom_children
2773 * - nir_block::dom_children
2774 * - nir_block::dom_frontier
2775 * - nir_block::dom_pre_index
2776 * - nir_block::dom_post_index
2777 *
2778 * A pass can preserve this metadata type if it doesn't touch the CFG.
2779 */
2780 nir_metadata_dominance = 0x2,
2781
2782 /** Indicates that SSA def data-flow liveness information is valid
2783 *
2784 * This includes:
2785 *
2786 * - nir_ssa_def::live_index
2787 * - nir_block::live_in
2788 * - nir_block::live_out
2789 *
2790 * A pass can preserve this metadata type if it never adds or removes any
2791 * SSA defs (most passes shouldn't preserve this metadata type).
2792 */
2793 nir_metadata_live_ssa_defs = 0x4,
2794
2795 /** A dummy metadata value to track when a pass forgot to call
2796 * nir_metadata_preserve.
2797 *
2798 * A pass should always clear this value even if it doesn't make any
2799 * progress to indicate that it thought about preserving metadata.
2800 */
2801 nir_metadata_not_properly_reset = 0x8,
2802
2803 /** Indicates that loop analysis information is valid.
2804 *
2805 * This includes everything pointed to by nir_loop::info.
2806 *
2807 * A pass can preserve this metadata type if it is guaranteed to not affect
2808 * any loop metadata. However, since loop metadata includes things like
2809 * loop counts which depend on arithmetic in the loop, this is very hard to
2810 * determine. Most passes shouldn't preserve this metadata type.
2811 */
2812 nir_metadata_loop_analysis = 0x10,
2813
2814 /** All metadata
2815 *
2816 * This includes all nir_metadata flags except not_properly_reset. Passes
2817 * which do not change the shader in any way should call
2818 *
2819 * nir_metadata_preserve(impl, nir_metadata_all);
2820 */
2821 nir_metadata_all = ~nir_metadata_not_properly_reset,
2822 } nir_metadata;
2823 MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_metadata)
2824
2825 typedef struct {
2826 nir_cf_node cf_node;
2827
2828 /** pointer to the function of which this is an implementation */
2829 struct nir_function *function;
2830
2831 struct exec_list body; /** < list of nir_cf_node */
2832
2833 nir_block *end_block;
2834
2835 /** list for all local variables in the function */
2836 struct exec_list locals;
2837
2838 /** list of local registers in the function */
2839 struct exec_list registers;
2840
2841 /** next available local register index */
2842 unsigned reg_alloc;
2843
2844 /** next available SSA value index */
2845 unsigned ssa_alloc;
2846
2847 /* total number of basic blocks, only valid when block_index_dirty = false */
2848 unsigned num_blocks;
2849
2850 /** True if this nir_function_impl uses structured control-flow
2851 *
2852 * Structured nir_function_impls have different validation rules.
2853 */
2854 bool structured;
2855
2856 nir_metadata valid_metadata;
2857 } nir_function_impl;
2858
2859 #define nir_foreach_function_temp_variable(var, impl) \
2860 foreach_list_typed(nir_variable, var, node, &(impl)->locals)
2861
2862 #define nir_foreach_function_temp_variable_safe(var, impl) \
2863 foreach_list_typed_safe(nir_variable, var, node, &(impl)->locals)
2864
2865 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2866 nir_start_block(nir_function_impl *impl)
2867 {
2868 return (nir_block *) impl->body.head_sentinel.next;
2869 }
2870
2871 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2872 nir_impl_last_block(nir_function_impl *impl)
2873 {
2874 return (nir_block *) impl->body.tail_sentinel.prev;
2875 }
2876
2877 static inline nir_cf_node *
2878 nir_cf_node_next(nir_cf_node *node)
2879 {
2880 struct exec_node *next = exec_node_get_next(&node->node);
2881 if (exec_node_is_tail_sentinel(next))
2882 return NULL;
2883 else
2884 return exec_node_data(nir_cf_node, next, node);
2885 }
2886
2887 static inline nir_cf_node *
2888 nir_cf_node_prev(nir_cf_node *node)
2889 {
2890 struct exec_node *prev = exec_node_get_prev(&node->node);
2891 if (exec_node_is_head_sentinel(prev))
2892 return NULL;
2893 else
2894 return exec_node_data(nir_cf_node, prev, node);
2895 }
2896
2897 static inline bool
2898 nir_cf_node_is_first(const nir_cf_node *node)
2899 {
2900 return exec_node_is_head_sentinel(node->node.prev);
2901 }
2902
2903 static inline bool
2904 nir_cf_node_is_last(const nir_cf_node *node)
2905 {
2906 return exec_node_is_tail_sentinel(node->node.next);
2907 }
2908
2909 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2910 type, nir_cf_node_block)
2911 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2912 type, nir_cf_node_if)
2913 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2914 type, nir_cf_node_loop)
2915 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2916 nir_function_impl, cf_node, type, nir_cf_node_function)
2917
2918 static inline nir_block *
2919 nir_if_first_then_block(nir_if *if_stmt)
2920 {
2921 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2922 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2923 }
2924
2925 static inline nir_block *
2926 nir_if_last_then_block(nir_if *if_stmt)
2927 {
2928 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2929 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2930 }
2931
2932 static inline nir_block *
2933 nir_if_first_else_block(nir_if *if_stmt)
2934 {
2935 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2936 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2937 }
2938
2939 static inline nir_block *
2940 nir_if_last_else_block(nir_if *if_stmt)
2941 {
2942 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2943 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2944 }
2945
2946 static inline nir_block *
2947 nir_loop_first_block(nir_loop *loop)
2948 {
2949 struct exec_node *head = exec_list_get_head(&loop->body);
2950 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2951 }
2952
2953 static inline nir_block *
2954 nir_loop_last_block(nir_loop *loop)
2955 {
2956 struct exec_node *tail = exec_list_get_tail(&loop->body);
2957 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2958 }
2959
2960 /**
2961 * Return true if this list of cf_nodes contains a single empty block.
2962 */
2963 static inline bool
2964 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2965 {
2966 if (exec_list_is_singular(cf_list)) {
2967 struct exec_node *head = exec_list_get_head(cf_list);
2968 nir_block *block =
2969 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2970 return exec_list_is_empty(&block->instr_list);
2971 }
2972 return false;
2973 }
2974
2975 typedef struct {
2976 uint8_t num_components;
2977 uint8_t bit_size;
2978 } nir_parameter;
2979
2980 typedef struct nir_function {
2981 struct exec_node node;
2982
2983 const char *name;
2984 struct nir_shader *shader;
2985
2986 unsigned num_params;
2987 nir_parameter *params;
2988
2989 /** The implementation of this function.
2990 *
2991 * If the function is only declared and not implemented, this is NULL.
2992 */
2993 nir_function_impl *impl;
2994
2995 bool is_entrypoint;
2996 } nir_function;
2997
2998 typedef enum {
2999 nir_lower_imul64 = (1 << 0),
3000 nir_lower_isign64 = (1 << 1),
3001 /** Lower all int64 modulus and division opcodes */
3002 nir_lower_divmod64 = (1 << 2),
3003 /** Lower all 64-bit umul_high and imul_high opcodes */
3004 nir_lower_imul_high64 = (1 << 3),
3005 nir_lower_mov64 = (1 << 4),
3006 nir_lower_icmp64 = (1 << 5),
3007 nir_lower_iadd64 = (1 << 6),
3008 nir_lower_iabs64 = (1 << 7),
3009 nir_lower_ineg64 = (1 << 8),
3010 nir_lower_logic64 = (1 << 9),
3011 nir_lower_minmax64 = (1 << 10),
3012 nir_lower_shift64 = (1 << 11),
3013 nir_lower_imul_2x32_64 = (1 << 12),
3014 nir_lower_extract64 = (1 << 13),
3015 nir_lower_ufind_msb64 = (1 << 14),
3016 nir_lower_bit_count64 = (1 << 15),
3017 } nir_lower_int64_options;
3018
3019 typedef enum {
3020 nir_lower_drcp = (1 << 0),
3021 nir_lower_dsqrt = (1 << 1),
3022 nir_lower_drsq = (1 << 2),
3023 nir_lower_dtrunc = (1 << 3),
3024 nir_lower_dfloor = (1 << 4),
3025 nir_lower_dceil = (1 << 5),
3026 nir_lower_dfract = (1 << 6),
3027 nir_lower_dround_even = (1 << 7),
3028 nir_lower_dmod = (1 << 8),
3029 nir_lower_dsub = (1 << 9),
3030 nir_lower_ddiv = (1 << 10),
3031 nir_lower_fp64_full_software = (1 << 11),
3032 } nir_lower_doubles_options;
3033
3034 typedef enum {
3035 nir_divergence_single_prim_per_subgroup = (1 << 0),
3036 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
3037 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
3038 nir_divergence_view_index_uniform = (1 << 3),
3039 } nir_divergence_options;
3040
3041 typedef struct nir_shader_compiler_options {
3042 bool lower_fdiv;
3043 bool lower_ffma;
3044 bool fuse_ffma;
3045 bool lower_flrp16;
3046 bool lower_flrp32;
3047 /** Lowers flrp when it does not support doubles */
3048 bool lower_flrp64;
3049 bool lower_fpow;
3050 bool lower_fsat;
3051 bool lower_fsqrt;
3052 bool lower_sincos;
3053 bool lower_fmod;
3054 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
3055 bool lower_bitfield_extract;
3056 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
3057 bool lower_bitfield_extract_to_shifts;
3058 /** Lowers bitfield_insert to bfi/bfm */
3059 bool lower_bitfield_insert;
3060 /** Lowers bitfield_insert to compares, and shifts. */
3061 bool lower_bitfield_insert_to_shifts;
3062 /** Lowers bitfield_insert to bfm/bitfield_select. */
3063 bool lower_bitfield_insert_to_bitfield_select;
3064 /** Lowers bitfield_reverse to shifts. */
3065 bool lower_bitfield_reverse;
3066 /** Lowers bit_count to shifts. */
3067 bool lower_bit_count;
3068 /** Lowers ifind_msb to compare and ufind_msb */
3069 bool lower_ifind_msb;
3070 /** Lowers find_lsb to ufind_msb and logic ops */
3071 bool lower_find_lsb;
3072 bool lower_uadd_carry;
3073 bool lower_usub_borrow;
3074 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
3075 bool lower_mul_high;
3076 /** lowers fneg and ineg to fsub and isub. */
3077 bool lower_negate;
3078 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
3079 bool lower_sub;
3080
3081 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fneu} + b2f: */
3082 bool lower_scmp;
3083
3084 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
3085 bool lower_vector_cmp;
3086
3087 /** enables rules to lower idiv by power-of-two: */
3088 bool lower_idiv;
3089
3090 /** enable rules to avoid bit ops */
3091 bool lower_bitops;
3092
3093 /** enables rules to lower isign to imin+imax */
3094 bool lower_isign;
3095
3096 /** enables rules to lower fsign to fsub and flt */
3097 bool lower_fsign;
3098
3099 /** enables rules to lower iabs to ineg+imax */
3100 bool lower_iabs;
3101
3102 /* lower fdph to fdot4 */
3103 bool lower_fdph;
3104
3105 /** lower fdot to fmul and fsum/fadd. */
3106 bool lower_fdot;
3107
3108 /* Does the native fdot instruction replicate its result for four
3109 * components? If so, then opt_algebraic_late will turn all fdotN
3110 * instructions into fdot_replicatedN instructions.
3111 */
3112 bool fdot_replicates;
3113
3114 /** lowers ffloor to fsub+ffract: */
3115 bool lower_ffloor;
3116
3117 /** lowers ffract to fsub+ffloor: */
3118 bool lower_ffract;
3119
3120 /** lowers fceil to fneg+ffloor+fneg: */
3121 bool lower_fceil;
3122
3123 bool lower_ftrunc;
3124
3125 bool lower_ldexp;
3126
3127 bool lower_pack_half_2x16;
3128 bool lower_pack_unorm_2x16;
3129 bool lower_pack_snorm_2x16;
3130 bool lower_pack_unorm_4x8;
3131 bool lower_pack_snorm_4x8;
3132 bool lower_pack_64_2x32_split;
3133 bool lower_pack_32_2x16_split;
3134 bool lower_unpack_half_2x16;
3135 bool lower_unpack_unorm_2x16;
3136 bool lower_unpack_snorm_2x16;
3137 bool lower_unpack_unorm_4x8;
3138 bool lower_unpack_snorm_4x8;
3139 bool lower_unpack_64_2x32_split;
3140 bool lower_unpack_32_2x16_split;
3141
3142 bool lower_pack_split;
3143
3144 bool lower_extract_byte;
3145 bool lower_extract_word;
3146
3147 bool lower_all_io_to_temps;
3148 bool lower_all_io_to_elements;
3149
3150 /* Indicates that the driver only has zero-based vertex id */
3151 bool vertex_id_zero_based;
3152
3153 /**
3154 * If enabled, gl_BaseVertex will be lowered as:
3155 * is_indexed_draw (~0/0) & firstvertex
3156 */
3157 bool lower_base_vertex;
3158
3159 /**
3160 * If enabled, gl_HelperInvocation will be lowered as:
3161 *
3162 * !((1 << sample_id) & sample_mask_in))
3163 *
3164 * This depends on some possibly hw implementation details, which may
3165 * not be true for all hw. In particular that the FS is only executed
3166 * for covered samples or for helper invocations. So, do not blindly
3167 * enable this option.
3168 *
3169 * Note: See also issue #22 in ARB_shader_image_load_store
3170 */
3171 bool lower_helper_invocation;
3172
3173 /**
3174 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3175 *
3176 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3177 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3178 */
3179 bool optimize_sample_mask_in;
3180
3181 bool lower_cs_local_index_from_id;
3182 bool lower_cs_local_id_from_index;
3183
3184 /* Prevents lowering global_invocation_id to be in terms of work_group_id */
3185 bool has_cs_global_id;
3186
3187 bool lower_device_index_to_zero;
3188
3189 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3190 bool lower_wpos_pntc;
3191
3192 /**
3193 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3194 * lowered to simple arithmetic.
3195 *
3196 * If this flag is set, the lowering will be applied to all bit-sizes of
3197 * these instructions.
3198 *
3199 * \sa ::lower_hadd64
3200 */
3201 bool lower_hadd;
3202
3203 /**
3204 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3205 * should be lowered to simple arithmetic.
3206 *
3207 * If this flag is set, the lowering will be applied to only 64-bit
3208 * versions of these instructions.
3209 *
3210 * \sa ::lower_hadd
3211 */
3212 bool lower_hadd64;
3213
3214 /**
3215 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3216 * arithmetic.
3217 *
3218 * If this flag is set, the lowering will be applied to all bit-sizes of
3219 * these instructions.
3220 *
3221 * \sa ::lower_usub_sat64
3222 */
3223 bool lower_add_sat;
3224
3225 /**
3226 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3227 * arithmetic.
3228 *
3229 * \sa ::lower_add_sat
3230 */
3231 bool lower_usub_sat64;
3232
3233 /**
3234 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3235 * for IO purposes and would prefer loads/stores be vectorized.
3236 */
3237 bool vectorize_io;
3238 bool lower_to_scalar;
3239
3240 /**
3241 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3242 */
3243 bool vectorize_vec2_16bit;
3244
3245 /**
3246 * Should the linker unify inputs_read/outputs_written between adjacent
3247 * shader stages which are linked into a single program?
3248 */
3249 bool unify_interfaces;
3250
3251 /**
3252 * Should nir_lower_io() create load_interpolated_input intrinsics?
3253 *
3254 * If not, it generates regular load_input intrinsics and interpolation
3255 * information must be inferred from the list of input nir_variables.
3256 */
3257 bool use_interpolated_input_intrinsics;
3258
3259 /* Lowers when 32x32->64 bit multiplication is not supported */
3260 bool lower_mul_2x32_64;
3261
3262 /* Lowers when rotate instruction is not supported */
3263 bool lower_rotate;
3264
3265 /**
3266 * Backend supports imul24, and would like to use it (when possible)
3267 * for address/offset calculation. If true, driver should call
3268 * nir_lower_amul(). (If not set, amul will automatically be lowered
3269 * to imul.)
3270 */
3271 bool has_imul24;
3272
3273 /** Backend supports umul24, if not set umul24 will automatically be lowered
3274 * to imul with masked inputs */
3275 bool has_umul24;
3276
3277 /** Backend supports umad24, if not set umad24 will automatically be lowered
3278 * to imul with masked inputs and iadd */
3279 bool has_umad24;
3280
3281 /* Whether to generate only scoped_barrier intrinsics instead of the set of
3282 * memory and control barrier intrinsics based on GLSL.
3283 */
3284 bool use_scoped_barrier;
3285
3286 /**
3287 * Is this the Intel vec4 backend?
3288 *
3289 * Used to inhibit algebraic optimizations that are known to be harmful on
3290 * the Intel vec4 backend. This is generally applicable to any
3291 * optimization that might cause more immediate values to be used in
3292 * 3-source (e.g., ffma and flrp) instructions.
3293 */
3294 bool intel_vec4;
3295
3296 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3297 bool lower_bfe_with_two_constants;
3298
3299 /** Whether 8-bit ALU is supported. */
3300 bool support_8bit_alu;
3301
3302 /** Whether 16-bit ALU is supported. */
3303 bool support_16bit_alu;
3304
3305 unsigned max_unroll_iterations;
3306
3307 nir_lower_int64_options lower_int64_options;
3308 nir_lower_doubles_options lower_doubles_options;
3309 } nir_shader_compiler_options;
3310
3311 typedef struct nir_shader {
3312 /** list of uniforms (nir_variable) */
3313 struct exec_list variables;
3314
3315 /** Set of driver-specific options for the shader.
3316 *
3317 * The memory for the options is expected to be kept in a single static
3318 * copy by the driver.
3319 */
3320 const struct nir_shader_compiler_options *options;
3321
3322 /** Various bits of compile-time information about a given shader */
3323 struct shader_info info;
3324
3325 struct exec_list functions; /** < list of nir_function */
3326
3327 /**
3328 * The size of the variable space for load_input_*, load_uniform_*, etc.
3329 * intrinsics. This is in back-end specific units which is likely one of
3330 * bytes, dwords, or vec4s depending on context and back-end.
3331 */
3332 unsigned num_inputs, num_uniforms, num_outputs;
3333
3334 /** Size in bytes of required shared memory */
3335 unsigned shared_size;
3336
3337 /** Size in bytes of required scratch space */
3338 unsigned scratch_size;
3339
3340 /** Constant data associated with this shader.
3341 *
3342 * Constant data is loaded through load_constant intrinsics (as compared to
3343 * the NIR load_const instructions which have the constant value inlined
3344 * into them). This is usually generated by nir_opt_large_constants (so
3345 * shaders don't have to load_const into a temporary array when they want
3346 * to indirect on a const array).
3347 */
3348 void *constant_data;
3349 /** Size of the constant data associated with the shader, in bytes */
3350 unsigned constant_data_size;
3351 } nir_shader;
3352
3353 #define nir_foreach_function(func, shader) \
3354 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3355
3356 static inline nir_function_impl *
3357 nir_shader_get_entrypoint(nir_shader *shader)
3358 {
3359 nir_function *func = NULL;
3360
3361 nir_foreach_function(function, shader) {
3362 assert(func == NULL);
3363 if (function->is_entrypoint) {
3364 func = function;
3365 #ifndef NDEBUG
3366 break;
3367 #endif
3368 }
3369 }
3370
3371 if (!func)
3372 return NULL;
3373
3374 assert(func->num_params == 0);
3375 assert(func->impl);
3376 return func->impl;
3377 }
3378
3379 nir_shader *nir_shader_create(void *mem_ctx,
3380 gl_shader_stage stage,
3381 const nir_shader_compiler_options *options,
3382 shader_info *si);
3383
3384 nir_register *nir_local_reg_create(nir_function_impl *impl);
3385
3386 void nir_reg_remove(nir_register *reg);
3387
3388 /** Adds a variable to the appropriate list in nir_shader */
3389 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3390
3391 static inline void
3392 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3393 {
3394 assert(var->data.mode == nir_var_function_temp);
3395 exec_list_push_tail(&impl->locals, &var->node);
3396 }
3397
3398 /** creates a variable, sets a few defaults, and adds it to the list */
3399 nir_variable *nir_variable_create(nir_shader *shader,
3400 nir_variable_mode mode,
3401 const struct glsl_type *type,
3402 const char *name);
3403 /** creates a local variable and adds it to the list */
3404 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3405 const struct glsl_type *type,
3406 const char *name);
3407
3408 nir_variable *nir_find_variable_with_location(nir_shader *shader,
3409 nir_variable_mode mode,
3410 unsigned location);
3411
3412 nir_variable *nir_find_variable_with_driver_location(nir_shader *shader,
3413 nir_variable_mode mode,
3414 unsigned location);
3415
3416 /** creates a function and adds it to the shader's list of functions */
3417 nir_function *nir_function_create(nir_shader *shader, const char *name);
3418
3419 nir_function_impl *nir_function_impl_create(nir_function *func);
3420 /** creates a function_impl that isn't tied to any particular function */
3421 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3422
3423 nir_block *nir_block_create(nir_shader *shader);
3424 nir_if *nir_if_create(nir_shader *shader);
3425 nir_loop *nir_loop_create(nir_shader *shader);
3426
3427 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3428
3429 /** requests that the given pieces of metadata be generated */
3430 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3431 /** dirties all but the preserved metadata */
3432 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3433 /** Preserves all metadata for the given shader */
3434 void nir_shader_preserve_all_metadata(nir_shader *shader);
3435
3436 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3437 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3438
3439 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3440 nir_deref_type deref_type);
3441
3442 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3443
3444 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3445 unsigned num_components,
3446 unsigned bit_size);
3447
3448 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3449 nir_intrinsic_op op);
3450
3451 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3452 nir_function *callee);
3453
3454 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3455
3456 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3457
3458 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3459
3460 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3461 unsigned num_components,
3462 unsigned bit_size);
3463
3464 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3465
3466 /**
3467 * NIR Cursors and Instruction Insertion API
3468 * @{
3469 *
3470 * A tiny struct representing a point to insert/extract instructions or
3471 * control flow nodes. Helps reduce the combinatorial explosion of possible
3472 * points to insert/extract.
3473 *
3474 * \sa nir_control_flow.h
3475 */
3476 typedef enum {
3477 nir_cursor_before_block,
3478 nir_cursor_after_block,
3479 nir_cursor_before_instr,
3480 nir_cursor_after_instr,
3481 } nir_cursor_option;
3482
3483 typedef struct {
3484 nir_cursor_option option;
3485 union {
3486 nir_block *block;
3487 nir_instr *instr;
3488 };
3489 } nir_cursor;
3490
3491 static inline nir_block *
3492 nir_cursor_current_block(nir_cursor cursor)
3493 {
3494 if (cursor.option == nir_cursor_before_instr ||
3495 cursor.option == nir_cursor_after_instr) {
3496 return cursor.instr->block;
3497 } else {
3498 return cursor.block;
3499 }
3500 }
3501
3502 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3503
3504 static inline nir_cursor
3505 nir_before_block(nir_block *block)
3506 {
3507 nir_cursor cursor;
3508 cursor.option = nir_cursor_before_block;
3509 cursor.block = block;
3510 return cursor;
3511 }
3512
3513 static inline nir_cursor
3514 nir_after_block(nir_block *block)
3515 {
3516 nir_cursor cursor;
3517 cursor.option = nir_cursor_after_block;
3518 cursor.block = block;
3519 return cursor;
3520 }
3521
3522 static inline nir_cursor
3523 nir_before_instr(nir_instr *instr)
3524 {
3525 nir_cursor cursor;
3526 cursor.option = nir_cursor_before_instr;
3527 cursor.instr = instr;
3528 return cursor;
3529 }
3530
3531 static inline nir_cursor
3532 nir_after_instr(nir_instr *instr)
3533 {
3534 nir_cursor cursor;
3535 cursor.option = nir_cursor_after_instr;
3536 cursor.instr = instr;
3537 return cursor;
3538 }
3539
3540 static inline nir_cursor
3541 nir_after_block_before_jump(nir_block *block)
3542 {
3543 nir_instr *last_instr = nir_block_last_instr(block);
3544 if (last_instr && last_instr->type == nir_instr_type_jump) {
3545 return nir_before_instr(last_instr);
3546 } else {
3547 return nir_after_block(block);
3548 }
3549 }
3550
3551 static inline nir_cursor
3552 nir_before_src(nir_src *src, bool is_if_condition)
3553 {
3554 if (is_if_condition) {
3555 nir_block *prev_block =
3556 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3557 assert(!nir_block_ends_in_jump(prev_block));
3558 return nir_after_block(prev_block);
3559 } else if (src->parent_instr->type == nir_instr_type_phi) {
3560 #ifndef NDEBUG
3561 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3562 bool found = false;
3563 nir_foreach_phi_src(phi_src, cond_phi) {
3564 if (phi_src->src.ssa == src->ssa) {
3565 found = true;
3566 break;
3567 }
3568 }
3569 assert(found);
3570 #endif
3571 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3572 * to have a more specific name.
3573 */
3574 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3575 return nir_after_block_before_jump(phi_src->pred);
3576 } else {
3577 return nir_before_instr(src->parent_instr);
3578 }
3579 }
3580
3581 static inline nir_cursor
3582 nir_before_cf_node(nir_cf_node *node)
3583 {
3584 if (node->type == nir_cf_node_block)
3585 return nir_before_block(nir_cf_node_as_block(node));
3586
3587 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3588 }
3589
3590 static inline nir_cursor
3591 nir_after_cf_node(nir_cf_node *node)
3592 {
3593 if (node->type == nir_cf_node_block)
3594 return nir_after_block(nir_cf_node_as_block(node));
3595
3596 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3597 }
3598
3599 static inline nir_cursor
3600 nir_after_phis(nir_block *block)
3601 {
3602 nir_foreach_instr(instr, block) {
3603 if (instr->type != nir_instr_type_phi)
3604 return nir_before_instr(instr);
3605 }
3606 return nir_after_block(block);
3607 }
3608
3609 static inline nir_cursor
3610 nir_after_cf_node_and_phis(nir_cf_node *node)
3611 {
3612 if (node->type == nir_cf_node_block)
3613 return nir_after_block(nir_cf_node_as_block(node));
3614
3615 nir_blo