nir: add options::vectorize_vec2_16bit to limit vectorization to vec2 16
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #define XXH_INLINE_ALL
45 #include "util/xxhash.h"
46 #include <stdio.h>
47
48 #ifndef NDEBUG
49 #include "util/debug.h"
50 #endif /* NDEBUG */
51
52 #include "nir_opcodes.h"
53
54 #if defined(_WIN32) && !defined(snprintf)
55 #define snprintf _snprintf
56 #endif
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #define NIR_FALSE 0u
63 #define NIR_TRUE (~0u)
64 #define NIR_MAX_VEC_COMPONENTS 16
65 #define NIR_MAX_MATRIX_COLUMNS 4
66 #define NIR_STREAM_PACKED (1 << 8)
67 typedef uint16_t nir_component_mask_t;
68
69 static inline bool
70 nir_num_components_valid(unsigned num_components)
71 {
72 return (num_components >= 1 &&
73 num_components <= 4) ||
74 num_components == 8 ||
75 num_components == 16;
76 }
77
78 /** Defines a cast function
79 *
80 * This macro defines a cast function from in_type to out_type where
81 * out_type is some structure type that contains a field of type out_type.
82 *
83 * Note that you have to be a bit careful as the generated cast function
84 * destroys constness.
85 */
86 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
87 type_field, type_value) \
88 static inline out_type * \
89 name(const in_type *parent) \
90 { \
91 assert(parent && parent->type_field == type_value); \
92 return exec_node_data(out_type, parent, field); \
93 }
94
95 struct nir_function;
96 struct nir_shader;
97 struct nir_instr;
98 struct nir_builder;
99
100
101 /**
102 * Description of built-in state associated with a uniform
103 *
104 * \sa nir_variable::state_slots
105 */
106 typedef struct {
107 gl_state_index16 tokens[STATE_LENGTH];
108 uint16_t swizzle;
109 } nir_state_slot;
110
111 typedef enum {
112 nir_var_shader_in = (1 << 0),
113 nir_var_shader_out = (1 << 1),
114 nir_var_shader_temp = (1 << 2),
115 nir_var_function_temp = (1 << 3),
116 nir_var_uniform = (1 << 4),
117 nir_var_mem_ubo = (1 << 5),
118 nir_var_system_value = (1 << 6),
119 nir_var_mem_ssbo = (1 << 7),
120 nir_var_mem_shared = (1 << 8),
121 nir_var_mem_global = (1 << 9),
122 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
123 nir_num_variable_modes = 11,
124 nir_var_all = (1 << nir_num_variable_modes) - 1,
125 } nir_variable_mode;
126
127 /**
128 * Rounding modes.
129 */
130 typedef enum {
131 nir_rounding_mode_undef = 0,
132 nir_rounding_mode_rtne = 1, /* round to nearest even */
133 nir_rounding_mode_ru = 2, /* round up */
134 nir_rounding_mode_rd = 3, /* round down */
135 nir_rounding_mode_rtz = 4, /* round towards zero */
136 } nir_rounding_mode;
137
138 typedef union {
139 bool b;
140 float f32;
141 double f64;
142 int8_t i8;
143 uint8_t u8;
144 int16_t i16;
145 uint16_t u16;
146 int32_t i32;
147 uint32_t u32;
148 int64_t i64;
149 uint64_t u64;
150 } nir_const_value;
151
152 #define nir_const_value_to_array(arr, c, components, m) \
153 { \
154 for (unsigned i = 0; i < components; ++i) \
155 arr[i] = c[i].m; \
156 } while (false)
157
158 static inline nir_const_value
159 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
160 {
161 nir_const_value v;
162 memset(&v, 0, sizeof(v));
163
164 switch (bit_size) {
165 case 1: v.b = x; break;
166 case 8: v.u8 = x; break;
167 case 16: v.u16 = x; break;
168 case 32: v.u32 = x; break;
169 case 64: v.u64 = x; break;
170 default:
171 unreachable("Invalid bit size");
172 }
173
174 return v;
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_int(int64_t i, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64) {
185 assert(i >= (-(1ll << (bit_size - 1))));
186 assert(i < (1ll << (bit_size - 1)));
187 }
188
189 return nir_const_value_for_raw_uint(i, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
194 {
195 nir_const_value v;
196 memset(&v, 0, sizeof(v));
197
198 assert(bit_size <= 64);
199 if (bit_size < 64)
200 assert(u < (1ull << bit_size));
201
202 return nir_const_value_for_raw_uint(u, bit_size);
203 }
204
205 static inline nir_const_value
206 nir_const_value_for_bool(bool b, unsigned bit_size)
207 {
208 /* Booleans use a 0/-1 convention */
209 return nir_const_value_for_int(-(int)b, bit_size);
210 }
211
212 /* This one isn't inline because it requires half-float conversion */
213 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
214
215 static inline int64_t
216 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 /* int1_t uses 0/-1 convention */
220 case 1: return -(int)value.b;
221 case 8: return value.i8;
222 case 16: return value.i16;
223 case 32: return value.i32;
224 case 64: return value.i64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline uint64_t
231 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
232 {
233 switch (bit_size) {
234 case 1: return value.b;
235 case 8: return value.u8;
236 case 16: return value.u16;
237 case 32: return value.u32;
238 case 64: return value.u64;
239 default:
240 unreachable("Invalid bit size");
241 }
242 }
243
244 static inline bool
245 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
246 {
247 int64_t i = nir_const_value_as_int(value, bit_size);
248
249 /* Booleans of any size use 0/-1 convention */
250 assert(i == 0 || i == -1);
251
252 return i;
253 }
254
255 /* This one isn't inline because it requires half-float conversion */
256 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
257
258 typedef struct nir_constant {
259 /**
260 * Value of the constant.
261 *
262 * The field used to back the values supplied by the constant is determined
263 * by the type associated with the \c nir_variable. Constants may be
264 * scalars, vectors, or matrices.
265 */
266 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
267
268 /* we could get this from the var->type but makes clone *much* easier to
269 * not have to care about the type.
270 */
271 unsigned num_elements;
272
273 /* Array elements / Structure Fields */
274 struct nir_constant **elements;
275 } nir_constant;
276
277 /**
278 * \brief Layout qualifiers for gl_FragDepth.
279 *
280 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
281 * with a layout qualifier.
282 */
283 typedef enum {
284 nir_depth_layout_none, /**< No depth layout is specified. */
285 nir_depth_layout_any,
286 nir_depth_layout_greater,
287 nir_depth_layout_less,
288 nir_depth_layout_unchanged
289 } nir_depth_layout;
290
291 /**
292 * Enum keeping track of how a variable was declared.
293 */
294 typedef enum {
295 /**
296 * Normal declaration.
297 */
298 nir_var_declared_normally = 0,
299
300 /**
301 * Variable is implicitly generated by the compiler and should not be
302 * visible via the API.
303 */
304 nir_var_hidden,
305 } nir_var_declaration_type;
306
307 /**
308 * Either a uniform, global variable, shader input, or shader output. Based on
309 * ir_variable - it should be easy to translate between the two.
310 */
311
312 typedef struct nir_variable {
313 struct exec_node node;
314
315 /**
316 * Declared type of the variable
317 */
318 const struct glsl_type *type;
319
320 /**
321 * Declared name of the variable
322 */
323 char *name;
324
325 struct nir_variable_data {
326 /**
327 * Storage class of the variable.
328 *
329 * \sa nir_variable_mode
330 */
331 nir_variable_mode mode:11;
332
333 /**
334 * Is the variable read-only?
335 *
336 * This is set for variables declared as \c const, shader inputs,
337 * and uniforms.
338 */
339 unsigned read_only:1;
340 unsigned centroid:1;
341 unsigned sample:1;
342 unsigned patch:1;
343 unsigned invariant:1;
344
345 /**
346 * Precision qualifier.
347 *
348 * In desktop GLSL we do not care about precision qualifiers at all, in
349 * fact, the spec says that precision qualifiers are ignored.
350 *
351 * To make things easy, we make it so that this field is always
352 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
353 * have the same precision value and the checks we add in the compiler
354 * for this field will never break a desktop shader compile.
355 */
356 unsigned precision:2;
357
358 /**
359 * Can this variable be coalesced with another?
360 *
361 * This is set by nir_lower_io_to_temporaries to say that any
362 * copies involving this variable should stay put. Propagating it can
363 * duplicate the resulting load/store, which is not wanted, and may
364 * result in a load/store of the variable with an indirect offset which
365 * the backend may not be able to handle.
366 */
367 unsigned cannot_coalesce:1;
368
369 /**
370 * When separate shader programs are enabled, only input/outputs between
371 * the stages of a multi-stage separate program can be safely removed
372 * from the shader interface. Other input/outputs must remains active.
373 *
374 * This is also used to make sure xfb varyings that are unused by the
375 * fragment shader are not removed.
376 */
377 unsigned always_active_io:1;
378
379 /**
380 * Interpolation mode for shader inputs / outputs
381 *
382 * \sa glsl_interp_mode
383 */
384 unsigned interpolation:3;
385
386 /**
387 * If non-zero, then this variable may be packed along with other variables
388 * into a single varying slot, so this offset should be applied when
389 * accessing components. For example, an offset of 1 means that the x
390 * component of this variable is actually stored in component y of the
391 * location specified by \c location.
392 */
393 unsigned location_frac:2;
394
395 /**
396 * If true, this variable represents an array of scalars that should
397 * be tightly packed. In other words, consecutive array elements
398 * should be stored one component apart, rather than one slot apart.
399 */
400 unsigned compact:1;
401
402 /**
403 * Whether this is a fragment shader output implicitly initialized with
404 * the previous contents of the specified render target at the
405 * framebuffer location corresponding to this shader invocation.
406 */
407 unsigned fb_fetch_output:1;
408
409 /**
410 * Non-zero if this variable is considered bindless as defined by
411 * ARB_bindless_texture.
412 */
413 unsigned bindless:1;
414
415 /**
416 * Was an explicit binding set in the shader?
417 */
418 unsigned explicit_binding:1;
419
420 /**
421 * Was the location explicitly set in the shader?
422 *
423 * If the location is explicitly set in the shader, it \b cannot be changed
424 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 * no effect).
426 */
427 unsigned explicit_location:1;
428
429 /**
430 * Was a transfer feedback buffer set in the shader?
431 */
432 unsigned explicit_xfb_buffer:1;
433
434 /**
435 * Was a transfer feedback stride set in the shader?
436 */
437 unsigned explicit_xfb_stride:1;
438
439 /**
440 * Was an explicit offset set in the shader?
441 */
442 unsigned explicit_offset:1;
443
444 /**
445 * Layout of the matrix. Uses glsl_matrix_layout values.
446 */
447 unsigned matrix_layout:2;
448
449 /**
450 * Non-zero if this variable was created by lowering a named interface
451 * block.
452 */
453 unsigned from_named_ifc_block:1;
454
455 /**
456 * How the variable was declared. See nir_var_declaration_type.
457 *
458 * This is used to detect variables generated by the compiler, so should
459 * not be visible via the API.
460 */
461 unsigned how_declared:2;
462
463 /**
464 * Is this variable per-view? If so, we know it must be an array with
465 * size corresponding to the number of views.
466 */
467 unsigned per_view:1;
468
469 /**
470 * \brief Layout qualifier for gl_FragDepth.
471 *
472 * This is not equal to \c ir_depth_layout_none if and only if this
473 * variable is \c gl_FragDepth and a layout qualifier is specified.
474 */
475 nir_depth_layout depth_layout:3;
476
477 /**
478 * Vertex stream output identifier.
479 *
480 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
481 * indicate the stream of the i-th component.
482 */
483 unsigned stream:9;
484
485 /**
486 * Access flags for memory variables (SSBO/global), image uniforms, and
487 * bindless images in uniforms/inputs/outputs.
488 */
489 enum gl_access_qualifier access:8;
490
491 /**
492 * Descriptor set binding for sampler or UBO.
493 */
494 unsigned descriptor_set:5;
495
496 /**
497 * output index for dual source blending.
498 */
499 unsigned index;
500
501 /**
502 * Initial binding point for a sampler or UBO.
503 *
504 * For array types, this represents the binding point for the first element.
505 */
506 unsigned binding;
507
508 /**
509 * Storage location of the base of this variable
510 *
511 * The precise meaning of this field depends on the nature of the variable.
512 *
513 * - Vertex shader input: one of the values from \c gl_vert_attrib.
514 * - Vertex shader output: one of the values from \c gl_varying_slot.
515 * - Geometry shader input: one of the values from \c gl_varying_slot.
516 * - Geometry shader output: one of the values from \c gl_varying_slot.
517 * - Fragment shader input: one of the values from \c gl_varying_slot.
518 * - Fragment shader output: one of the values from \c gl_frag_result.
519 * - Uniforms: Per-stage uniform slot number for default uniform block.
520 * - Uniforms: Index within the uniform block definition for UBO members.
521 * - Non-UBO Uniforms: uniform slot number.
522 * - Other: This field is not currently used.
523 *
524 * If the variable is a uniform, shader input, or shader output, and the
525 * slot has not been assigned, the value will be -1.
526 */
527 int location;
528
529 /**
530 * The actual location of the variable in the IR. Only valid for inputs,
531 * outputs, and uniforms (including samplers and images).
532 */
533 unsigned driver_location;
534
535 /**
536 * Location an atomic counter or transform feedback is stored at.
537 */
538 unsigned offset;
539
540 union {
541 struct {
542 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
543 enum pipe_format format;
544 } image;
545
546 struct {
547 /**
548 * Transform feedback buffer.
549 */
550 uint16_t buffer:2;
551
552 /**
553 * Transform feedback stride.
554 */
555 uint16_t stride;
556 } xfb;
557 };
558 } data;
559
560 /**
561 * Identifier for this variable generated by nir_index_vars() that is unique
562 * among other variables in the same exec_list.
563 */
564 unsigned index;
565
566 /* Number of nir_variable_data members */
567 uint16_t num_members;
568
569 /**
570 * Built-in state that backs this uniform
571 *
572 * Once set at variable creation, \c state_slots must remain invariant.
573 * This is because, ideally, this array would be shared by all clones of
574 * this variable in the IR tree. In other words, we'd really like for it
575 * to be a fly-weight.
576 *
577 * If the variable is not a uniform, \c num_state_slots will be zero and
578 * \c state_slots will be \c NULL.
579 */
580 /*@{*/
581 uint16_t num_state_slots; /**< Number of state slots used */
582 nir_state_slot *state_slots; /**< State descriptors. */
583 /*@}*/
584
585 /**
586 * Constant expression assigned in the initializer of the variable
587 *
588 * This field should only be used temporarily by creators of NIR shaders
589 * and then lower_constant_initializers can be used to get rid of them.
590 * Most of the rest of NIR ignores this field or asserts that it's NULL.
591 */
592 nir_constant *constant_initializer;
593
594 /**
595 * Global variable assigned in the initializer of the variable
596 * This field should only be used temporarily by creators of NIR shaders
597 * and then lower_constant_initializers can be used to get rid of them.
598 * Most of the rest of NIR ignores this field or asserts that it's NULL.
599 */
600 struct nir_variable *pointer_initializer;
601
602 /**
603 * For variables that are in an interface block or are an instance of an
604 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
605 *
606 * \sa ir_variable::location
607 */
608 const struct glsl_type *interface_type;
609
610 /**
611 * Description of per-member data for per-member struct variables
612 *
613 * This is used for variables which are actually an amalgamation of
614 * multiple entities such as a struct of built-in values or a struct of
615 * inputs each with their own layout specifier. This is only allowed on
616 * variables with a struct or array of array of struct type.
617 */
618 struct nir_variable_data *members;
619 } nir_variable;
620
621 #define nir_foreach_variable(var, var_list) \
622 foreach_list_typed(nir_variable, var, node, var_list)
623
624 #define nir_foreach_variable_safe(var, var_list) \
625 foreach_list_typed_safe(nir_variable, var, node, var_list)
626
627 static inline bool
628 nir_variable_is_global(const nir_variable *var)
629 {
630 return var->data.mode != nir_var_function_temp;
631 }
632
633 typedef struct nir_register {
634 struct exec_node node;
635
636 unsigned num_components; /** < number of vector components */
637 unsigned num_array_elems; /** < size of array (0 for no array) */
638
639 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
640 uint8_t bit_size;
641
642 /** generic register index. */
643 unsigned index;
644
645 /** only for debug purposes, can be NULL */
646 const char *name;
647
648 /** set of nir_srcs where this register is used (read from) */
649 struct list_head uses;
650
651 /** set of nir_dests where this register is defined (written to) */
652 struct list_head defs;
653
654 /** set of nir_ifs where this register is used as a condition */
655 struct list_head if_uses;
656 } nir_register;
657
658 #define nir_foreach_register(reg, reg_list) \
659 foreach_list_typed(nir_register, reg, node, reg_list)
660 #define nir_foreach_register_safe(reg, reg_list) \
661 foreach_list_typed_safe(nir_register, reg, node, reg_list)
662
663 typedef enum PACKED {
664 nir_instr_type_alu,
665 nir_instr_type_deref,
666 nir_instr_type_call,
667 nir_instr_type_tex,
668 nir_instr_type_intrinsic,
669 nir_instr_type_load_const,
670 nir_instr_type_jump,
671 nir_instr_type_ssa_undef,
672 nir_instr_type_phi,
673 nir_instr_type_parallel_copy,
674 } nir_instr_type;
675
676 typedef struct nir_instr {
677 struct exec_node node;
678 struct nir_block *block;
679 nir_instr_type type;
680
681 /* A temporary for optimization and analysis passes to use for storing
682 * flags. For instance, DCE uses this to store the "dead/live" info.
683 */
684 uint8_t pass_flags;
685
686 /** generic instruction index. */
687 unsigned index;
688 } nir_instr;
689
690 static inline nir_instr *
691 nir_instr_next(nir_instr *instr)
692 {
693 struct exec_node *next = exec_node_get_next(&instr->node);
694 if (exec_node_is_tail_sentinel(next))
695 return NULL;
696 else
697 return exec_node_data(nir_instr, next, node);
698 }
699
700 static inline nir_instr *
701 nir_instr_prev(nir_instr *instr)
702 {
703 struct exec_node *prev = exec_node_get_prev(&instr->node);
704 if (exec_node_is_head_sentinel(prev))
705 return NULL;
706 else
707 return exec_node_data(nir_instr, prev, node);
708 }
709
710 static inline bool
711 nir_instr_is_first(const nir_instr *instr)
712 {
713 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
714 }
715
716 static inline bool
717 nir_instr_is_last(const nir_instr *instr)
718 {
719 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
720 }
721
722 typedef struct nir_ssa_def {
723 /** for debugging only, can be NULL */
724 const char* name;
725
726 /** generic SSA definition index. */
727 unsigned index;
728
729 /** Index into the live_in and live_out bitfields */
730 unsigned live_index;
731
732 /** Instruction which produces this SSA value. */
733 nir_instr *parent_instr;
734
735 /** set of nir_instrs where this register is used (read from) */
736 struct list_head uses;
737
738 /** set of nir_ifs where this register is used as a condition */
739 struct list_head if_uses;
740
741 uint8_t num_components;
742
743 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
744 uint8_t bit_size;
745
746 /**
747 * True if this SSA value may have different values in different SIMD
748 * invocations of the shader. This is set by nir_divergence_analysis.
749 */
750 bool divergent;
751 } nir_ssa_def;
752
753 struct nir_src;
754
755 typedef struct {
756 nir_register *reg;
757 struct nir_src *indirect; /** < NULL for no indirect offset */
758 unsigned base_offset;
759
760 /* TODO use-def chain goes here */
761 } nir_reg_src;
762
763 typedef struct {
764 nir_instr *parent_instr;
765 struct list_head def_link;
766
767 nir_register *reg;
768 struct nir_src *indirect; /** < NULL for no indirect offset */
769 unsigned base_offset;
770
771 /* TODO def-use chain goes here */
772 } nir_reg_dest;
773
774 struct nir_if;
775
776 typedef struct nir_src {
777 union {
778 /** Instruction that consumes this value as a source. */
779 nir_instr *parent_instr;
780 struct nir_if *parent_if;
781 };
782
783 struct list_head use_link;
784
785 union {
786 nir_reg_src reg;
787 nir_ssa_def *ssa;
788 };
789
790 bool is_ssa;
791 } nir_src;
792
793 static inline nir_src
794 nir_src_init(void)
795 {
796 nir_src src = { { NULL } };
797 return src;
798 }
799
800 #define NIR_SRC_INIT nir_src_init()
801
802 #define nir_foreach_use(src, reg_or_ssa_def) \
803 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
804
805 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
806 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
807
808 #define nir_foreach_if_use(src, reg_or_ssa_def) \
809 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
810
811 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
812 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
813
814 typedef struct {
815 union {
816 nir_reg_dest reg;
817 nir_ssa_def ssa;
818 };
819
820 bool is_ssa;
821 } nir_dest;
822
823 static inline nir_dest
824 nir_dest_init(void)
825 {
826 nir_dest dest = { { { NULL } } };
827 return dest;
828 }
829
830 #define NIR_DEST_INIT nir_dest_init()
831
832 #define nir_foreach_def(dest, reg) \
833 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
834
835 #define nir_foreach_def_safe(dest, reg) \
836 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
837
838 static inline nir_src
839 nir_src_for_ssa(nir_ssa_def *def)
840 {
841 nir_src src = NIR_SRC_INIT;
842
843 src.is_ssa = true;
844 src.ssa = def;
845
846 return src;
847 }
848
849 static inline nir_src
850 nir_src_for_reg(nir_register *reg)
851 {
852 nir_src src = NIR_SRC_INIT;
853
854 src.is_ssa = false;
855 src.reg.reg = reg;
856 src.reg.indirect = NULL;
857 src.reg.base_offset = 0;
858
859 return src;
860 }
861
862 static inline nir_dest
863 nir_dest_for_reg(nir_register *reg)
864 {
865 nir_dest dest = NIR_DEST_INIT;
866
867 dest.reg.reg = reg;
868
869 return dest;
870 }
871
872 static inline unsigned
873 nir_src_bit_size(nir_src src)
874 {
875 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
876 }
877
878 static inline unsigned
879 nir_src_num_components(nir_src src)
880 {
881 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
882 }
883
884 static inline bool
885 nir_src_is_const(nir_src src)
886 {
887 return src.is_ssa &&
888 src.ssa->parent_instr->type == nir_instr_type_load_const;
889 }
890
891 static inline bool
892 nir_src_is_divergent(nir_src src)
893 {
894 assert(src.is_ssa);
895 return src.ssa->divergent;
896 }
897
898 static inline unsigned
899 nir_dest_bit_size(nir_dest dest)
900 {
901 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
902 }
903
904 static inline unsigned
905 nir_dest_num_components(nir_dest dest)
906 {
907 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
908 }
909
910 static inline bool
911 nir_dest_is_divergent(nir_dest dest)
912 {
913 assert(dest.is_ssa);
914 return dest.ssa.divergent;
915 }
916
917 /* Are all components the same, ie. .xxxx */
918 static inline bool
919 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
920 {
921 for (unsigned i = 1; i < nr_comp; i++)
922 if (swiz[i] != swiz[0])
923 return false;
924 return true;
925 }
926
927 /* Are all components sequential, ie. .yzw */
928 static inline bool
929 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
930 {
931 for (unsigned i = 1; i < nr_comp; i++)
932 if (swiz[i] != (swiz[0] + i))
933 return false;
934 return true;
935 }
936
937 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
938 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
939
940 typedef struct {
941 nir_src src;
942
943 /**
944 * \name input modifiers
945 */
946 /*@{*/
947 /**
948 * For inputs interpreted as floating point, flips the sign bit. For
949 * inputs interpreted as integers, performs the two's complement negation.
950 */
951 bool negate;
952
953 /**
954 * Clears the sign bit for floating point values, and computes the integer
955 * absolute value for integers. Note that the negate modifier acts after
956 * the absolute value modifier, therefore if both are set then all inputs
957 * will become negative.
958 */
959 bool abs;
960 /*@}*/
961
962 /**
963 * For each input component, says which component of the register it is
964 * chosen from. Note that which elements of the swizzle are used and which
965 * are ignored are based on the write mask for most opcodes - for example,
966 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
967 * a swizzle of {2, x, 1, 0} where x means "don't care."
968 */
969 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
970 } nir_alu_src;
971
972 typedef struct {
973 nir_dest dest;
974
975 /**
976 * \name saturate output modifier
977 *
978 * Only valid for opcodes that output floating-point numbers. Clamps the
979 * output to between 0.0 and 1.0 inclusive.
980 */
981
982 bool saturate;
983
984 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
985 } nir_alu_dest;
986
987 /** NIR sized and unsized types
988 *
989 * The values in this enum are carefully chosen so that the sized type is
990 * just the unsized type OR the number of bits.
991 */
992 typedef enum PACKED {
993 nir_type_invalid = 0, /* Not a valid type */
994 nir_type_int = 2,
995 nir_type_uint = 4,
996 nir_type_bool = 6,
997 nir_type_float = 128,
998 nir_type_bool1 = 1 | nir_type_bool,
999 nir_type_bool8 = 8 | nir_type_bool,
1000 nir_type_bool16 = 16 | nir_type_bool,
1001 nir_type_bool32 = 32 | nir_type_bool,
1002 nir_type_int1 = 1 | nir_type_int,
1003 nir_type_int8 = 8 | nir_type_int,
1004 nir_type_int16 = 16 | nir_type_int,
1005 nir_type_int32 = 32 | nir_type_int,
1006 nir_type_int64 = 64 | nir_type_int,
1007 nir_type_uint1 = 1 | nir_type_uint,
1008 nir_type_uint8 = 8 | nir_type_uint,
1009 nir_type_uint16 = 16 | nir_type_uint,
1010 nir_type_uint32 = 32 | nir_type_uint,
1011 nir_type_uint64 = 64 | nir_type_uint,
1012 nir_type_float16 = 16 | nir_type_float,
1013 nir_type_float32 = 32 | nir_type_float,
1014 nir_type_float64 = 64 | nir_type_float,
1015 } nir_alu_type;
1016
1017 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1018 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1019
1020 static inline unsigned
1021 nir_alu_type_get_type_size(nir_alu_type type)
1022 {
1023 return type & NIR_ALU_TYPE_SIZE_MASK;
1024 }
1025
1026 static inline unsigned
1027 nir_alu_type_get_base_type(nir_alu_type type)
1028 {
1029 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
1030 }
1031
1032 static inline nir_alu_type
1033 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1034 {
1035 switch (base_type) {
1036 case GLSL_TYPE_BOOL:
1037 return nir_type_bool1;
1038 break;
1039 case GLSL_TYPE_UINT:
1040 return nir_type_uint32;
1041 break;
1042 case GLSL_TYPE_INT:
1043 return nir_type_int32;
1044 break;
1045 case GLSL_TYPE_UINT16:
1046 return nir_type_uint16;
1047 break;
1048 case GLSL_TYPE_INT16:
1049 return nir_type_int16;
1050 break;
1051 case GLSL_TYPE_UINT8:
1052 return nir_type_uint8;
1053 case GLSL_TYPE_INT8:
1054 return nir_type_int8;
1055 case GLSL_TYPE_UINT64:
1056 return nir_type_uint64;
1057 break;
1058 case GLSL_TYPE_INT64:
1059 return nir_type_int64;
1060 break;
1061 case GLSL_TYPE_FLOAT:
1062 return nir_type_float32;
1063 break;
1064 case GLSL_TYPE_FLOAT16:
1065 return nir_type_float16;
1066 break;
1067 case GLSL_TYPE_DOUBLE:
1068 return nir_type_float64;
1069 break;
1070
1071 case GLSL_TYPE_SAMPLER:
1072 case GLSL_TYPE_IMAGE:
1073 case GLSL_TYPE_ATOMIC_UINT:
1074 case GLSL_TYPE_STRUCT:
1075 case GLSL_TYPE_INTERFACE:
1076 case GLSL_TYPE_ARRAY:
1077 case GLSL_TYPE_VOID:
1078 case GLSL_TYPE_SUBROUTINE:
1079 case GLSL_TYPE_FUNCTION:
1080 case GLSL_TYPE_ERROR:
1081 return nir_type_invalid;
1082 }
1083
1084 unreachable("unknown type");
1085 }
1086
1087 static inline nir_alu_type
1088 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1089 {
1090 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1091 }
1092
1093 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1094 nir_rounding_mode rnd);
1095
1096 static inline nir_op
1097 nir_op_vec(unsigned components)
1098 {
1099 switch (components) {
1100 case 1: return nir_op_mov;
1101 case 2: return nir_op_vec2;
1102 case 3: return nir_op_vec3;
1103 case 4: return nir_op_vec4;
1104 case 8: return nir_op_vec8;
1105 case 16: return nir_op_vec16;
1106 default: unreachable("bad component count");
1107 }
1108 }
1109
1110 static inline bool
1111 nir_op_is_vec(nir_op op)
1112 {
1113 switch (op) {
1114 case nir_op_mov:
1115 case nir_op_vec2:
1116 case nir_op_vec3:
1117 case nir_op_vec4:
1118 case nir_op_vec8:
1119 case nir_op_vec16:
1120 return true;
1121 default:
1122 return false;
1123 }
1124 }
1125
1126 static inline bool
1127 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1128 {
1129 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1130 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1131 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1132 }
1133
1134 static inline bool
1135 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1136 {
1137 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1138 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1139 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1140 }
1141
1142 static inline bool
1143 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1144 {
1145 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1146 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1147 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1148 }
1149
1150 static inline bool
1151 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1152 {
1153 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1154 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1155 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1156 }
1157
1158 static inline bool
1159 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1160 {
1161 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1162 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1163 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1164 }
1165
1166 static inline bool
1167 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1168 {
1169 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1170 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1171 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1172 }
1173
1174 static inline bool
1175 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1176 {
1177 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1178 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1179 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1180 }
1181
1182 static inline nir_rounding_mode
1183 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1184 nir_alu_type type)
1185 {
1186 if (nir_alu_type_get_base_type(type) != nir_type_float)
1187 return nir_rounding_mode_undef;
1188
1189 unsigned bit_size = nir_alu_type_get_type_size(type);
1190
1191 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1192 return nir_rounding_mode_rtz;
1193 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1194 return nir_rounding_mode_rtne;
1195 return nir_rounding_mode_undef;
1196 }
1197
1198 static inline bool
1199 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1200 {
1201 bool result =
1202 nir_has_any_rounding_mode_rtne(execution_mode) ||
1203 nir_has_any_rounding_mode_rtz(execution_mode);
1204 return result;
1205 }
1206
1207 typedef enum {
1208 /**
1209 * Operation where the first two sources are commutative.
1210 *
1211 * For 2-source operations, this just mathematical commutativity. Some
1212 * 3-source operations, like ffma, are only commutative in the first two
1213 * sources.
1214 */
1215 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1216 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1217 } nir_op_algebraic_property;
1218
1219 typedef struct {
1220 const char *name;
1221
1222 uint8_t num_inputs;
1223
1224 /**
1225 * The number of components in the output
1226 *
1227 * If non-zero, this is the size of the output and input sizes are
1228 * explicitly given; swizzle and writemask are still in effect, but if
1229 * the output component is masked out, then the input component may
1230 * still be in use.
1231 *
1232 * If zero, the opcode acts in the standard, per-component manner; the
1233 * operation is performed on each component (except the ones that are
1234 * masked out) with the input being taken from the input swizzle for
1235 * that component.
1236 *
1237 * The size of some of the inputs may be given (i.e. non-zero) even
1238 * though output_size is zero; in that case, the inputs with a zero
1239 * size act per-component, while the inputs with non-zero size don't.
1240 */
1241 uint8_t output_size;
1242
1243 /**
1244 * The type of vector that the instruction outputs. Note that the
1245 * staurate modifier is only allowed on outputs with the float type.
1246 */
1247
1248 nir_alu_type output_type;
1249
1250 /**
1251 * The number of components in each input
1252 */
1253 uint8_t input_sizes[NIR_MAX_VEC_COMPONENTS];
1254
1255 /**
1256 * The type of vector that each input takes. Note that negate and
1257 * absolute value are only allowed on inputs with int or float type and
1258 * behave differently on the two.
1259 */
1260 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1261
1262 nir_op_algebraic_property algebraic_properties;
1263
1264 /* Whether this represents a numeric conversion opcode */
1265 bool is_conversion;
1266 } nir_op_info;
1267
1268 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1269
1270 typedef struct nir_alu_instr {
1271 nir_instr instr;
1272 nir_op op;
1273
1274 /** Indicates that this ALU instruction generates an exact value
1275 *
1276 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1277 * really equivalent to either. This indicates that the value generated by
1278 * this operation is high-precision and any code transformations that touch
1279 * it must ensure that the resulting value is bit-for-bit identical to the
1280 * original.
1281 */
1282 bool exact:1;
1283
1284 /**
1285 * Indicates that this instruction do not cause wrapping to occur, in the
1286 * form of overflow or underflow.
1287 */
1288 bool no_signed_wrap:1;
1289 bool no_unsigned_wrap:1;
1290
1291 nir_alu_dest dest;
1292 nir_alu_src src[];
1293 } nir_alu_instr;
1294
1295 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1296 nir_alu_instr *instr);
1297 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1298 nir_alu_instr *instr);
1299
1300 /* is this source channel used? */
1301 static inline bool
1302 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1303 unsigned channel)
1304 {
1305 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1306 return channel < nir_op_infos[instr->op].input_sizes[src];
1307
1308 return (instr->dest.write_mask >> channel) & 1;
1309 }
1310
1311 static inline nir_component_mask_t
1312 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1313 {
1314 nir_component_mask_t read_mask = 0;
1315 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1316 if (!nir_alu_instr_channel_used(instr, src, c))
1317 continue;
1318
1319 read_mask |= (1 << instr->src[src].swizzle[c]);
1320 }
1321 return read_mask;
1322 }
1323
1324 /**
1325 * Get the number of channels used for a source
1326 */
1327 static inline unsigned
1328 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1329 {
1330 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1331 return nir_op_infos[instr->op].input_sizes[src];
1332
1333 return nir_dest_num_components(instr->dest.dest);
1334 }
1335
1336 static inline bool
1337 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1338 {
1339 switch (instr->op) {
1340 case nir_op_flt:
1341 case nir_op_fge:
1342 case nir_op_feq:
1343 case nir_op_fne:
1344 case nir_op_ilt:
1345 case nir_op_ult:
1346 case nir_op_ige:
1347 case nir_op_uge:
1348 case nir_op_ieq:
1349 case nir_op_ine:
1350 case nir_op_i2b1:
1351 case nir_op_f2b1:
1352 case nir_op_inot:
1353 return true;
1354 default:
1355 return false;
1356 }
1357 }
1358
1359 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1360 nir_alu_type full_type);
1361
1362 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1363 unsigned src1, unsigned src2);
1364
1365 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1366 const nir_alu_instr *alu2,
1367 unsigned src1, unsigned src2);
1368
1369 typedef enum {
1370 nir_deref_type_var,
1371 nir_deref_type_array,
1372 nir_deref_type_array_wildcard,
1373 nir_deref_type_ptr_as_array,
1374 nir_deref_type_struct,
1375 nir_deref_type_cast,
1376 } nir_deref_type;
1377
1378 typedef struct {
1379 nir_instr instr;
1380
1381 /** The type of this deref instruction */
1382 nir_deref_type deref_type;
1383
1384 /** The mode of the underlying variable */
1385 nir_variable_mode mode;
1386
1387 /** The dereferenced type of the resulting pointer value */
1388 const struct glsl_type *type;
1389
1390 union {
1391 /** Variable being dereferenced if deref_type is a deref_var */
1392 nir_variable *var;
1393
1394 /** Parent deref if deref_type is not deref_var */
1395 nir_src parent;
1396 };
1397
1398 /** Additional deref parameters */
1399 union {
1400 struct {
1401 nir_src index;
1402 } arr;
1403
1404 struct {
1405 unsigned index;
1406 } strct;
1407
1408 struct {
1409 unsigned ptr_stride;
1410 } cast;
1411 };
1412
1413 /** Destination to store the resulting "pointer" */
1414 nir_dest dest;
1415 } nir_deref_instr;
1416
1417 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1418
1419 static inline nir_deref_instr *
1420 nir_deref_instr_parent(const nir_deref_instr *instr)
1421 {
1422 if (instr->deref_type == nir_deref_type_var)
1423 return NULL;
1424 else
1425 return nir_src_as_deref(instr->parent);
1426 }
1427
1428 static inline nir_variable *
1429 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1430 {
1431 while (instr->deref_type != nir_deref_type_var) {
1432 if (instr->deref_type == nir_deref_type_cast)
1433 return NULL;
1434
1435 instr = nir_deref_instr_parent(instr);
1436 }
1437
1438 return instr->var;
1439 }
1440
1441 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1442 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1443 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1444
1445 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1446
1447 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1448
1449 typedef struct {
1450 nir_instr instr;
1451
1452 struct nir_function *callee;
1453
1454 unsigned num_params;
1455 nir_src params[];
1456 } nir_call_instr;
1457
1458 #include "nir_intrinsics.h"
1459
1460 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1461
1462 /** Represents an intrinsic
1463 *
1464 * An intrinsic is an instruction type for handling things that are
1465 * more-or-less regular operations but don't just consume and produce SSA
1466 * values like ALU operations do. Intrinsics are not for things that have
1467 * special semantic meaning such as phi nodes and parallel copies.
1468 * Examples of intrinsics include variable load/store operations, system
1469 * value loads, and the like. Even though texturing more-or-less falls
1470 * under this category, texturing is its own instruction type because
1471 * trying to represent texturing with intrinsics would lead to a
1472 * combinatorial explosion of intrinsic opcodes.
1473 *
1474 * By having a single instruction type for handling a lot of different
1475 * cases, optimization passes can look for intrinsics and, for the most
1476 * part, completely ignore them. Each intrinsic type also has a few
1477 * possible flags that govern whether or not they can be reordered or
1478 * eliminated. That way passes like dead code elimination can still work
1479 * on intrisics without understanding the meaning of each.
1480 *
1481 * Each intrinsic has some number of constant indices, some number of
1482 * variables, and some number of sources. What these sources, variables,
1483 * and indices mean depends on the intrinsic and is documented with the
1484 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1485 * instructions are the only types of instruction that can operate on
1486 * variables.
1487 */
1488 typedef struct {
1489 nir_instr instr;
1490
1491 nir_intrinsic_op intrinsic;
1492
1493 nir_dest dest;
1494
1495 /** number of components if this is a vectorized intrinsic
1496 *
1497 * Similarly to ALU operations, some intrinsics are vectorized.
1498 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1499 * For vectorized intrinsics, the num_components field specifies the
1500 * number of destination components and the number of source components
1501 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1502 */
1503 uint8_t num_components;
1504
1505 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1506
1507 nir_src src[];
1508 } nir_intrinsic_instr;
1509
1510 static inline nir_variable *
1511 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1512 {
1513 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1514 }
1515
1516 typedef enum {
1517 /* Memory ordering. */
1518 NIR_MEMORY_ACQUIRE = 1 << 0,
1519 NIR_MEMORY_RELEASE = 1 << 1,
1520 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1521
1522 /* Memory visibility operations. */
1523 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1524 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1525 } nir_memory_semantics;
1526
1527 typedef enum {
1528 NIR_SCOPE_INVOCATION,
1529 NIR_SCOPE_SUBGROUP,
1530 NIR_SCOPE_WORKGROUP,
1531 NIR_SCOPE_QUEUE_FAMILY,
1532 NIR_SCOPE_DEVICE,
1533 } nir_scope;
1534
1535 /**
1536 * \name NIR intrinsics semantic flags
1537 *
1538 * information about what the compiler can do with the intrinsics.
1539 *
1540 * \sa nir_intrinsic_info::flags
1541 */
1542 typedef enum {
1543 /**
1544 * whether the intrinsic can be safely eliminated if none of its output
1545 * value is not being used.
1546 */
1547 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1548
1549 /**
1550 * Whether the intrinsic can be reordered with respect to any other
1551 * intrinsic, i.e. whether the only reordering dependencies of the
1552 * intrinsic are due to the register reads/writes.
1553 */
1554 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1555 } nir_intrinsic_semantic_flag;
1556
1557 /**
1558 * \name NIR intrinsics const-index flag
1559 *
1560 * Indicates the usage of a const_index slot.
1561 *
1562 * \sa nir_intrinsic_info::index_map
1563 */
1564 typedef enum {
1565 /**
1566 * Generally instructions that take a offset src argument, can encode
1567 * a constant 'base' value which is added to the offset.
1568 */
1569 NIR_INTRINSIC_BASE = 1,
1570
1571 /**
1572 * For store instructions, a writemask for the store.
1573 */
1574 NIR_INTRINSIC_WRMASK,
1575
1576 /**
1577 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1578 */
1579 NIR_INTRINSIC_STREAM_ID,
1580
1581 /**
1582 * The clip-plane id for load_user_clip_plane intrinsic.
1583 */
1584 NIR_INTRINSIC_UCP_ID,
1585
1586 /**
1587 * The amount of data, starting from BASE, that this instruction may
1588 * access. This is used to provide bounds if the offset is not constant.
1589 */
1590 NIR_INTRINSIC_RANGE,
1591
1592 /**
1593 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1594 */
1595 NIR_INTRINSIC_DESC_SET,
1596
1597 /**
1598 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1599 */
1600 NIR_INTRINSIC_BINDING,
1601
1602 /**
1603 * Component offset.
1604 */
1605 NIR_INTRINSIC_COMPONENT,
1606
1607 /**
1608 * Interpolation mode (only meaningful for FS inputs).
1609 */
1610 NIR_INTRINSIC_INTERP_MODE,
1611
1612 /**
1613 * A binary nir_op to use when performing a reduction or scan operation
1614 */
1615 NIR_INTRINSIC_REDUCTION_OP,
1616
1617 /**
1618 * Cluster size for reduction operations
1619 */
1620 NIR_INTRINSIC_CLUSTER_SIZE,
1621
1622 /**
1623 * Parameter index for a load_param intrinsic
1624 */
1625 NIR_INTRINSIC_PARAM_IDX,
1626
1627 /**
1628 * Image dimensionality for image intrinsics
1629 *
1630 * One of GLSL_SAMPLER_DIM_*
1631 */
1632 NIR_INTRINSIC_IMAGE_DIM,
1633
1634 /**
1635 * Non-zero if we are accessing an array image
1636 */
1637 NIR_INTRINSIC_IMAGE_ARRAY,
1638
1639 /**
1640 * Image format for image intrinsics
1641 */
1642 NIR_INTRINSIC_FORMAT,
1643
1644 /**
1645 * Access qualifiers for image and memory access intrinsics
1646 */
1647 NIR_INTRINSIC_ACCESS,
1648
1649 /**
1650 * Alignment for offsets and addresses
1651 *
1652 * These two parameters, specify an alignment in terms of a multiplier and
1653 * an offset. The offset or address parameter X of the intrinsic is
1654 * guaranteed to satisfy the following:
1655 *
1656 * (X - align_offset) % align_mul == 0
1657 */
1658 NIR_INTRINSIC_ALIGN_MUL,
1659 NIR_INTRINSIC_ALIGN_OFFSET,
1660
1661 /**
1662 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1663 */
1664 NIR_INTRINSIC_DESC_TYPE,
1665
1666 /**
1667 * The nir_alu_type of a uniform/input/output
1668 */
1669 NIR_INTRINSIC_TYPE,
1670
1671 /**
1672 * The swizzle mask for the instructions
1673 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1674 */
1675 NIR_INTRINSIC_SWIZZLE_MASK,
1676
1677 /* Separate source/dest access flags for copies */
1678 NIR_INTRINSIC_SRC_ACCESS,
1679 NIR_INTRINSIC_DST_ACCESS,
1680
1681 /* Driver location for nir_load_patch_location_ir3 */
1682 NIR_INTRINSIC_DRIVER_LOCATION,
1683
1684 /**
1685 * Mask of nir_memory_semantics, includes ordering and visibility.
1686 */
1687 NIR_INTRINSIC_MEMORY_SEMANTICS,
1688
1689 /**
1690 * Mask of nir_variable_modes affected by the memory operation.
1691 */
1692 NIR_INTRINSIC_MEMORY_MODES,
1693
1694 /**
1695 * Value of nir_scope.
1696 */
1697 NIR_INTRINSIC_MEMORY_SCOPE,
1698
1699 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1700
1701 } nir_intrinsic_index_flag;
1702
1703 #define NIR_INTRINSIC_MAX_INPUTS 5
1704
1705 typedef struct {
1706 const char *name;
1707
1708 uint8_t num_srcs; /** < number of register/SSA inputs */
1709
1710 /** number of components of each input register
1711 *
1712 * If this value is 0, the number of components is given by the
1713 * num_components field of nir_intrinsic_instr. If this value is -1, the
1714 * intrinsic consumes however many components are provided and it is not
1715 * validated at all.
1716 */
1717 int8_t src_components[NIR_INTRINSIC_MAX_INPUTS];
1718
1719 bool has_dest;
1720
1721 /** number of components of the output register
1722 *
1723 * If this value is 0, the number of components is given by the
1724 * num_components field of nir_intrinsic_instr.
1725 */
1726 uint8_t dest_components;
1727
1728 /** bitfield of legal bit sizes */
1729 uint8_t dest_bit_sizes;
1730
1731 /** the number of constant indices used by the intrinsic */
1732 uint8_t num_indices;
1733
1734 /** indicates the usage of intr->const_index[n] */
1735 uint8_t index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1736
1737 /** semantic flags for calls to this intrinsic */
1738 nir_intrinsic_semantic_flag flags;
1739 } nir_intrinsic_info;
1740
1741 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1742
1743 static inline unsigned
1744 nir_intrinsic_src_components(const nir_intrinsic_instr *intr, unsigned srcn)
1745 {
1746 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1747 assert(srcn < info->num_srcs);
1748 if (info->src_components[srcn] > 0)
1749 return info->src_components[srcn];
1750 else if (info->src_components[srcn] == 0)
1751 return intr->num_components;
1752 else
1753 return nir_src_num_components(intr->src[srcn]);
1754 }
1755
1756 static inline unsigned
1757 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1758 {
1759 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1760 if (!info->has_dest)
1761 return 0;
1762 else if (info->dest_components)
1763 return info->dest_components;
1764 else
1765 return intr->num_components;
1766 }
1767
1768 /**
1769 * Helper to copy const_index[] from src to dst, without assuming they
1770 * match in order.
1771 */
1772 static inline void
1773 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1774 {
1775 if (src->intrinsic == dst->intrinsic) {
1776 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1777 return;
1778 }
1779
1780 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1781 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1782
1783 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1784 if (src_info->index_map[i] == 0)
1785 continue;
1786
1787 /* require that dst instruction also uses the same const_index[]: */
1788 assert(dst_info->index_map[i] > 0);
1789
1790 dst->const_index[dst_info->index_map[i] - 1] =
1791 src->const_index[src_info->index_map[i] - 1];
1792 }
1793 }
1794
1795 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1796 static inline type \
1797 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1798 { \
1799 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1800 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1801 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1802 } \
1803 static inline void \
1804 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1805 { \
1806 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1807 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1808 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1809 }
1810
1811 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1812 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1813 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1814 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1815 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1816 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1817 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1818 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1819 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1820 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1821 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1822 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1823 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1824 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1825 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1826 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1827 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1828 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1829 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1830 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1831 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1832 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1833 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1834 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1835 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1836 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1837 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1838
1839 static inline void
1840 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1841 unsigned align_mul, unsigned align_offset)
1842 {
1843 assert(util_is_power_of_two_nonzero(align_mul));
1844 assert(align_offset < align_mul);
1845 nir_intrinsic_set_align_mul(intrin, align_mul);
1846 nir_intrinsic_set_align_offset(intrin, align_offset);
1847 }
1848
1849 /** Returns a simple alignment for a load/store intrinsic offset
1850 *
1851 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1852 * and ALIGN_OFFSET parameters, this helper takes both into account and
1853 * provides a single simple alignment parameter. The offset X is guaranteed
1854 * to satisfy X % align == 0.
1855 */
1856 static inline unsigned
1857 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1858 {
1859 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1860 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1861 assert(align_offset < align_mul);
1862 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1863 }
1864
1865 unsigned
1866 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1867
1868 /* Converts a image_deref_* intrinsic into a image_* one */
1869 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1870 nir_ssa_def *handle, bool bindless);
1871
1872 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1873 static inline bool
1874 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1875 {
1876 if (instr->intrinsic == nir_intrinsic_load_deref ||
1877 instr->intrinsic == nir_intrinsic_load_ssbo ||
1878 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1879 instr->intrinsic == nir_intrinsic_image_deref_load ||
1880 instr->intrinsic == nir_intrinsic_image_load) {
1881 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1882 } else {
1883 const nir_intrinsic_info *info =
1884 &nir_intrinsic_infos[instr->intrinsic];
1885 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1886 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1887 }
1888 }
1889
1890 /**
1891 * \group texture information
1892 *
1893 * This gives semantic information about textures which is useful to the
1894 * frontend, the backend, and lowering passes, but not the optimizer.
1895 */
1896
1897 typedef enum {
1898 nir_tex_src_coord,
1899 nir_tex_src_projector,
1900 nir_tex_src_comparator, /* shadow comparator */
1901 nir_tex_src_offset,
1902 nir_tex_src_bias,
1903 nir_tex_src_lod,
1904 nir_tex_src_min_lod,
1905 nir_tex_src_ms_index, /* MSAA sample index */
1906 nir_tex_src_ms_mcs, /* MSAA compression value */
1907 nir_tex_src_ddx,
1908 nir_tex_src_ddy,
1909 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1910 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1911 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1912 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1913 nir_tex_src_texture_handle, /* < bindless texture handle */
1914 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1915 nir_tex_src_plane, /* < selects plane for planar textures */
1916 nir_num_tex_src_types
1917 } nir_tex_src_type;
1918
1919 typedef struct {
1920 nir_src src;
1921 nir_tex_src_type src_type;
1922 } nir_tex_src;
1923
1924 typedef enum {
1925 nir_texop_tex, /**< Regular texture look-up */
1926 nir_texop_txb, /**< Texture look-up with LOD bias */
1927 nir_texop_txl, /**< Texture look-up with explicit LOD */
1928 nir_texop_txd, /**< Texture look-up with partial derivatives */
1929 nir_texop_txf, /**< Texel fetch with explicit LOD */
1930 nir_texop_txf_ms, /**< Multisample texture fetch */
1931 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1932 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1933 nir_texop_txs, /**< Texture size */
1934 nir_texop_lod, /**< Texture lod query */
1935 nir_texop_tg4, /**< Texture gather */
1936 nir_texop_query_levels, /**< Texture levels query */
1937 nir_texop_texture_samples, /**< Texture samples query */
1938 nir_texop_samples_identical, /**< Query whether all samples are definitely
1939 * identical.
1940 */
1941 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1942 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1943 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1944 } nir_texop;
1945
1946 typedef struct {
1947 nir_instr instr;
1948
1949 enum glsl_sampler_dim sampler_dim;
1950 nir_alu_type dest_type;
1951
1952 nir_texop op;
1953 nir_dest dest;
1954 nir_tex_src *src;
1955 unsigned num_srcs, coord_components;
1956 bool is_array, is_shadow;
1957
1958 /**
1959 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1960 * components or the new-style shadow that outputs 1 component.
1961 */
1962 bool is_new_style_shadow;
1963
1964 /* gather component selector */
1965 unsigned component : 2;
1966
1967 /* gather offsets */
1968 int8_t tg4_offsets[4][2];
1969
1970 /* True if the texture index or handle is not dynamically uniform */
1971 bool texture_non_uniform;
1972
1973 /* True if the sampler index or handle is not dynamically uniform */
1974 bool sampler_non_uniform;
1975
1976 /** The texture index
1977 *
1978 * If this texture instruction has a nir_tex_src_texture_offset source,
1979 * then the texture index is given by texture_index + texture_offset.
1980 */
1981 unsigned texture_index;
1982
1983 /** The sampler index
1984 *
1985 * The following operations do not require a sampler and, as such, this
1986 * field should be ignored:
1987 * - nir_texop_txf
1988 * - nir_texop_txf_ms
1989 * - nir_texop_txs
1990 * - nir_texop_lod
1991 * - nir_texop_query_levels
1992 * - nir_texop_texture_samples
1993 * - nir_texop_samples_identical
1994 *
1995 * If this texture instruction has a nir_tex_src_sampler_offset source,
1996 * then the sampler index is given by sampler_index + sampler_offset.
1997 */
1998 unsigned sampler_index;
1999 } nir_tex_instr;
2000
2001 /*
2002 * Returns true if the texture operation requires a sampler as a general rule,
2003 * see the documentation of sampler_index.
2004 *
2005 * Note that the specific hw/driver backend could require to a sampler
2006 * object/configuration packet in any case, for some other reason.
2007 */
2008 static inline bool
2009 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2010 {
2011 switch (instr->op) {
2012 case nir_texop_txf:
2013 case nir_texop_txf_ms:
2014 case nir_texop_txs:
2015 case nir_texop_lod:
2016 case nir_texop_query_levels:
2017 case nir_texop_texture_samples:
2018 case nir_texop_samples_identical:
2019 return false;
2020 default:
2021 return true;
2022 }
2023 }
2024
2025 static inline unsigned
2026 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2027 {
2028 switch (instr->op) {
2029 case nir_texop_txs: {
2030 unsigned ret;
2031 switch (instr->sampler_dim) {
2032 case GLSL_SAMPLER_DIM_1D:
2033 case GLSL_SAMPLER_DIM_BUF:
2034 ret = 1;
2035 break;
2036 case GLSL_SAMPLER_DIM_2D:
2037 case GLSL_SAMPLER_DIM_CUBE:
2038 case GLSL_SAMPLER_DIM_MS:
2039 case GLSL_SAMPLER_DIM_RECT:
2040 case GLSL_SAMPLER_DIM_EXTERNAL:
2041 case GLSL_SAMPLER_DIM_SUBPASS:
2042 ret = 2;
2043 break;
2044 case GLSL_SAMPLER_DIM_3D:
2045 ret = 3;
2046 break;
2047 default:
2048 unreachable("not reached");
2049 }
2050 if (instr->is_array)
2051 ret++;
2052 return ret;
2053 }
2054
2055 case nir_texop_lod:
2056 return 2;
2057
2058 case nir_texop_texture_samples:
2059 case nir_texop_query_levels:
2060 case nir_texop_samples_identical:
2061 case nir_texop_fragment_mask_fetch:
2062 return 1;
2063
2064 default:
2065 if (instr->is_shadow && instr->is_new_style_shadow)
2066 return 1;
2067
2068 return 4;
2069 }
2070 }
2071
2072 /* Returns true if this texture operation queries something about the texture
2073 * rather than actually sampling it.
2074 */
2075 static inline bool
2076 nir_tex_instr_is_query(const nir_tex_instr *instr)
2077 {
2078 switch (instr->op) {
2079 case nir_texop_txs:
2080 case nir_texop_lod:
2081 case nir_texop_texture_samples:
2082 case nir_texop_query_levels:
2083 case nir_texop_txf_ms_mcs:
2084 return true;
2085 case nir_texop_tex:
2086 case nir_texop_txb:
2087 case nir_texop_txl:
2088 case nir_texop_txd:
2089 case nir_texop_txf:
2090 case nir_texop_txf_ms:
2091 case nir_texop_txf_ms_fb:
2092 case nir_texop_tg4:
2093 return false;
2094 default:
2095 unreachable("Invalid texture opcode");
2096 }
2097 }
2098
2099 static inline bool
2100 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2101 {
2102 switch (instr->op) {
2103 case nir_texop_tex:
2104 case nir_texop_txb:
2105 case nir_texop_lod:
2106 return true;
2107 default:
2108 return false;
2109 }
2110 }
2111
2112 static inline nir_alu_type
2113 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2114 {
2115 switch (instr->src[src].src_type) {
2116 case nir_tex_src_coord:
2117 switch (instr->op) {
2118 case nir_texop_txf:
2119 case nir_texop_txf_ms:
2120 case nir_texop_txf_ms_fb:
2121 case nir_texop_txf_ms_mcs:
2122 case nir_texop_samples_identical:
2123 return nir_type_int;
2124
2125 default:
2126 return nir_type_float;
2127 }
2128
2129 case nir_tex_src_lod:
2130 switch (instr->op) {
2131 case nir_texop_txs:
2132 case nir_texop_txf:
2133 return nir_type_int;
2134
2135 default:
2136 return nir_type_float;
2137 }
2138
2139 case nir_tex_src_projector:
2140 case nir_tex_src_comparator:
2141 case nir_tex_src_bias:
2142 case nir_tex_src_min_lod:
2143 case nir_tex_src_ddx:
2144 case nir_tex_src_ddy:
2145 return nir_type_float;
2146
2147 case nir_tex_src_offset:
2148 case nir_tex_src_ms_index:
2149 case nir_tex_src_plane:
2150 return nir_type_int;
2151
2152 case nir_tex_src_ms_mcs:
2153 case nir_tex_src_texture_deref:
2154 case nir_tex_src_sampler_deref:
2155 case nir_tex_src_texture_offset:
2156 case nir_tex_src_sampler_offset:
2157 case nir_tex_src_texture_handle:
2158 case nir_tex_src_sampler_handle:
2159 return nir_type_uint;
2160
2161 case nir_num_tex_src_types:
2162 unreachable("nir_num_tex_src_types is not a valid source type");
2163 }
2164
2165 unreachable("Invalid texture source type");
2166 }
2167
2168 static inline unsigned
2169 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2170 {
2171 if (instr->src[src].src_type == nir_tex_src_coord)
2172 return instr->coord_components;
2173
2174 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2175 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2176 return 4;
2177
2178 if (instr->src[src].src_type == nir_tex_src_ddx ||
2179 instr->src[src].src_type == nir_tex_src_ddy) {
2180 if (instr->is_array)
2181 return instr->coord_components - 1;
2182 else
2183 return instr->coord_components;
2184 }
2185
2186 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2187 * the offset, since a cube maps to a single face.
2188 */
2189 if (instr->src[src].src_type == nir_tex_src_offset) {
2190 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2191 return 2;
2192 else if (instr->is_array)
2193 return instr->coord_components - 1;
2194 else
2195 return instr->coord_components;
2196 }
2197
2198 return 1;
2199 }
2200
2201 static inline int
2202 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2203 {
2204 for (unsigned i = 0; i < instr->num_srcs; i++)
2205 if (instr->src[i].src_type == type)
2206 return (int) i;
2207
2208 return -1;
2209 }
2210
2211 void nir_tex_instr_add_src(nir_tex_instr *tex,
2212 nir_tex_src_type src_type,
2213 nir_src src);
2214
2215 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2216
2217 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2218
2219 typedef struct {
2220 nir_instr instr;
2221
2222 nir_ssa_def def;
2223
2224 nir_const_value value[];
2225 } nir_load_const_instr;
2226
2227 typedef enum {
2228 /** Return from a function
2229 *
2230 * This instruction is a classic function return. It jumps to
2231 * nir_function_impl::end_block. No return value is provided in this
2232 * instruction. Instead, the function is expected to write any return
2233 * data to a deref passed in from the caller.
2234 */
2235 nir_jump_return,
2236
2237 /** Break out of the inner-most loop
2238 *
2239 * This has the same semantics as C's "break" statement.
2240 */
2241 nir_jump_break,
2242
2243 /** Jump back to the top of the inner-most loop
2244 *
2245 * This has the same semantics as C's "continue" statement assuming that a
2246 * NIR loop is implemented as "while (1) { body }".
2247 */
2248 nir_jump_continue,
2249 } nir_jump_type;
2250
2251 typedef struct {
2252 nir_instr instr;
2253 nir_jump_type type;
2254 } nir_jump_instr;
2255
2256 /* creates a new SSA variable in an undefined state */
2257
2258 typedef struct {
2259 nir_instr instr;
2260 nir_ssa_def def;
2261 } nir_ssa_undef_instr;
2262
2263 typedef struct {
2264 struct exec_node node;
2265
2266 /* The predecessor block corresponding to this source */
2267 struct nir_block *pred;
2268
2269 nir_src src;
2270 } nir_phi_src;
2271
2272 #define nir_foreach_phi_src(phi_src, phi) \
2273 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2274 #define nir_foreach_phi_src_safe(phi_src, phi) \
2275 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2276
2277 typedef struct {
2278 nir_instr instr;
2279
2280 struct exec_list srcs; /** < list of nir_phi_src */
2281
2282 nir_dest dest;
2283 } nir_phi_instr;
2284
2285 typedef struct {
2286 struct exec_node node;
2287 nir_src src;
2288 nir_dest dest;
2289 } nir_parallel_copy_entry;
2290
2291 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2292 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2293
2294 typedef struct {
2295 nir_instr instr;
2296
2297 /* A list of nir_parallel_copy_entrys. The sources of all of the
2298 * entries are copied to the corresponding destinations "in parallel".
2299 * In other words, if we have two entries: a -> b and b -> a, the values
2300 * get swapped.
2301 */
2302 struct exec_list entries;
2303 } nir_parallel_copy_instr;
2304
2305 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2306 type, nir_instr_type_alu)
2307 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2308 type, nir_instr_type_deref)
2309 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2310 type, nir_instr_type_call)
2311 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2312 type, nir_instr_type_jump)
2313 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2314 type, nir_instr_type_tex)
2315 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2316 type, nir_instr_type_intrinsic)
2317 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2318 type, nir_instr_type_load_const)
2319 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2320 type, nir_instr_type_ssa_undef)
2321 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2322 type, nir_instr_type_phi)
2323 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2324 nir_parallel_copy_instr, instr,
2325 type, nir_instr_type_parallel_copy)
2326
2327
2328 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2329 static inline type \
2330 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2331 { \
2332 assert(nir_src_is_const(src)); \
2333 nir_load_const_instr *load = \
2334 nir_instr_as_load_const(src.ssa->parent_instr); \
2335 assert(comp < load->def.num_components); \
2336 return nir_const_value_as_##suffix(load->value[comp], \
2337 load->def.bit_size); \
2338 } \
2339 \
2340 static inline type \
2341 nir_src_as_##suffix(nir_src src) \
2342 { \
2343 assert(nir_src_num_components(src) == 1); \
2344 return nir_src_comp_as_##suffix(src, 0); \
2345 }
2346
2347 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2348 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2349 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2350 NIR_DEFINE_SRC_AS_CONST(double, float)
2351
2352 #undef NIR_DEFINE_SRC_AS_CONST
2353
2354
2355 typedef struct {
2356 nir_ssa_def *def;
2357 unsigned comp;
2358 } nir_ssa_scalar;
2359
2360 static inline bool
2361 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2362 {
2363 return s.def->parent_instr->type == nir_instr_type_load_const;
2364 }
2365
2366 static inline nir_const_value
2367 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2368 {
2369 assert(s.comp < s.def->num_components);
2370 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2371 return load->value[s.comp];
2372 }
2373
2374 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2375 static inline type \
2376 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2377 { \
2378 return nir_const_value_as_##suffix( \
2379 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2380 }
2381
2382 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2383 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2384 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2385 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2386
2387 #undef NIR_DEFINE_SCALAR_AS_CONST
2388
2389 static inline bool
2390 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2391 {
2392 return s.def->parent_instr->type == nir_instr_type_alu;
2393 }
2394
2395 static inline nir_op
2396 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2397 {
2398 return nir_instr_as_alu(s.def->parent_instr)->op;
2399 }
2400
2401 static inline nir_ssa_scalar
2402 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2403 {
2404 nir_ssa_scalar out = { NULL, 0 };
2405
2406 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2407 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2408
2409 /* Our component must be written */
2410 assert(s.comp < s.def->num_components);
2411 assert(alu->dest.write_mask & (1u << s.comp));
2412
2413 assert(alu->src[alu_src_idx].src.is_ssa);
2414 out.def = alu->src[alu_src_idx].src.ssa;
2415
2416 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2417 /* The ALU src is unsized so the source component follows the
2418 * destination component.
2419 */
2420 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2421 } else {
2422 /* This is a sized source so all source components work together to
2423 * produce all the destination components. Since we need to return a
2424 * scalar, this only works if the source is a scalar.
2425 */
2426 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2427 out.comp = alu->src[alu_src_idx].swizzle[0];
2428 }
2429 assert(out.comp < out.def->num_components);
2430
2431 return out;
2432 }
2433
2434
2435 /*
2436 * Control flow
2437 *
2438 * Control flow consists of a tree of control flow nodes, which include
2439 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2440 * instructions that always run start-to-finish. Each basic block also keeps
2441 * track of its successors (blocks which may run immediately after the current
2442 * block) and predecessors (blocks which could have run immediately before the
2443 * current block). Each function also has a start block and an end block which
2444 * all return statements point to (which is always empty). Together, all the
2445 * blocks with their predecessors and successors make up the control flow
2446 * graph (CFG) of the function. There are helpers that modify the tree of
2447 * control flow nodes while modifying the CFG appropriately; these should be
2448 * used instead of modifying the tree directly.
2449 */
2450
2451 typedef enum {
2452 nir_cf_node_block,
2453 nir_cf_node_if,
2454 nir_cf_node_loop,
2455 nir_cf_node_function
2456 } nir_cf_node_type;
2457
2458 typedef struct nir_cf_node {
2459 struct exec_node node;
2460 nir_cf_node_type type;
2461 struct nir_cf_node *parent;
2462 } nir_cf_node;
2463
2464 typedef struct nir_block {
2465 nir_cf_node cf_node;
2466
2467 struct exec_list instr_list; /** < list of nir_instr */
2468
2469 /** generic block index; generated by nir_index_blocks */
2470 unsigned index;
2471
2472 /*
2473 * Each block can only have up to 2 successors, so we put them in a simple
2474 * array - no need for anything more complicated.
2475 */
2476 struct nir_block *successors[2];
2477
2478 /* Set of nir_block predecessors in the CFG */
2479 struct set *predecessors;
2480
2481 /*
2482 * this node's immediate dominator in the dominance tree - set to NULL for
2483 * the start block.
2484 */
2485 struct nir_block *imm_dom;
2486
2487 /* This node's children in the dominance tree */
2488 unsigned num_dom_children;
2489 struct nir_block **dom_children;
2490
2491 /* Set of nir_blocks on the dominance frontier of this block */
2492 struct set *dom_frontier;
2493
2494 /*
2495 * These two indices have the property that dom_{pre,post}_index for each
2496 * child of this block in the dominance tree will always be between
2497 * dom_pre_index and dom_post_index for this block, which makes testing if
2498 * a given block is dominated by another block an O(1) operation.
2499 */
2500 int16_t dom_pre_index, dom_post_index;
2501
2502 /* live in and out for this block; used for liveness analysis */
2503 BITSET_WORD *live_in;
2504 BITSET_WORD *live_out;
2505 } nir_block;
2506
2507 static inline bool
2508 nir_block_is_reachable(nir_block *b)
2509 {
2510 /* See also nir_block_dominates */
2511 return b->dom_post_index != -1;
2512 }
2513
2514 static inline nir_instr *
2515 nir_block_first_instr(nir_block *block)
2516 {
2517 struct exec_node *head = exec_list_get_head(&block->instr_list);
2518 return exec_node_data(nir_instr, head, node);
2519 }
2520
2521 static inline nir_instr *
2522 nir_block_last_instr(nir_block *block)
2523 {
2524 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2525 return exec_node_data(nir_instr, tail, node);
2526 }
2527
2528 static inline bool
2529 nir_block_ends_in_jump(nir_block *block)
2530 {
2531 return !exec_list_is_empty(&block->instr_list) &&
2532 nir_block_last_instr(block)->type == nir_instr_type_jump;
2533 }
2534
2535 #define nir_foreach_instr(instr, block) \
2536 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2537 #define nir_foreach_instr_reverse(instr, block) \
2538 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2539 #define nir_foreach_instr_safe(instr, block) \
2540 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2541 #define nir_foreach_instr_reverse_safe(instr, block) \
2542 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2543
2544 typedef enum {
2545 nir_selection_control_none = 0x0,
2546 nir_selection_control_flatten = 0x1,
2547 nir_selection_control_dont_flatten = 0x2,
2548 } nir_selection_control;
2549
2550 typedef struct nir_if {
2551 nir_cf_node cf_node;
2552 nir_src condition;
2553 nir_selection_control control;
2554
2555 struct exec_list then_list; /** < list of nir_cf_node */
2556 struct exec_list else_list; /** < list of nir_cf_node */
2557 } nir_if;
2558
2559 typedef struct {
2560 nir_if *nif;
2561
2562 /** Instruction that generates nif::condition. */
2563 nir_instr *conditional_instr;
2564
2565 /** Block within ::nif that has the break instruction. */
2566 nir_block *break_block;
2567
2568 /** Last block for the then- or else-path that does not contain the break. */
2569 nir_block *continue_from_block;
2570
2571 /** True when ::break_block is in the else-path of ::nif. */
2572 bool continue_from_then;
2573 bool induction_rhs;
2574
2575 /* This is true if the terminators exact trip count is unknown. For
2576 * example:
2577 *
2578 * for (int i = 0; i < imin(x, 4); i++)
2579 * ...
2580 *
2581 * Here loop analysis would have set a max_trip_count of 4 however we dont
2582 * know for sure that this is the exact trip count.
2583 */
2584 bool exact_trip_count_unknown;
2585
2586 struct list_head loop_terminator_link;
2587 } nir_loop_terminator;
2588
2589 typedef struct {
2590 /* Estimated cost (in number of instructions) of the loop */
2591 unsigned instr_cost;
2592
2593 /* Guessed trip count based on array indexing */
2594 unsigned guessed_trip_count;
2595
2596 /* Maximum number of times the loop is run (if known) */
2597 unsigned max_trip_count;
2598
2599 /* Do we know the exact number of times the loop will be run */
2600 bool exact_trip_count_known;
2601
2602 /* Unroll the loop regardless of its size */
2603 bool force_unroll;
2604
2605 /* Does the loop contain complex loop terminators, continues or other
2606 * complex behaviours? If this is true we can't rely on
2607 * loop_terminator_list to be complete or accurate.
2608 */
2609 bool complex_loop;
2610
2611 nir_loop_terminator *limiting_terminator;
2612
2613 /* A list of loop_terminators terminating this loop. */
2614 struct list_head loop_terminator_list;
2615 } nir_loop_info;
2616
2617 typedef enum {
2618 nir_loop_control_none = 0x0,
2619 nir_loop_control_unroll = 0x1,
2620 nir_loop_control_dont_unroll = 0x2,
2621 } nir_loop_control;
2622
2623 typedef struct {
2624 nir_cf_node cf_node;
2625
2626 struct exec_list body; /** < list of nir_cf_node */
2627
2628 nir_loop_info *info;
2629 nir_loop_control control;
2630 bool partially_unrolled;
2631 } nir_loop;
2632
2633 /**
2634 * Various bits of metadata that can may be created or required by
2635 * optimization and analysis passes
2636 */
2637 typedef enum {
2638 nir_metadata_none = 0x0,
2639
2640 /** Indicates that nir_block::index values are valid.
2641 *
2642 * The start block has index 0 and they increase through a natural walk of
2643 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2644 * every block index is in the range [0, nir_function_impl::num_blocks].
2645 *
2646 * A pass can preserve this metadata type if it doesn't touch the CFG.
2647 */
2648 nir_metadata_block_index = 0x1,
2649
2650 /** Indicates that block dominance information is valid
2651 *
2652 * This includes:
2653 *
2654 * - nir_block::num_dom_children
2655 * - nir_block::dom_children
2656 * - nir_block::dom_frontier
2657 * - nir_block::dom_pre_index
2658 * - nir_block::dom_post_index
2659 *
2660 * A pass can preserve this metadata type if it doesn't touch the CFG.
2661 */
2662 nir_metadata_dominance = 0x2,
2663
2664 /** Indicates that SSA def data-flow liveness information is valid
2665 *
2666 * This includes:
2667 *
2668 * - nir_ssa_def::live_index
2669 * - nir_block::live_in
2670 * - nir_block::live_out
2671 *
2672 * A pass can preserve this metadata type if it never adds or removes any
2673 * SSA defs (most passes shouldn't preserve this metadata type).
2674 */
2675 nir_metadata_live_ssa_defs = 0x4,
2676
2677 /** A dummy metadata value to track when a pass forgot to call
2678 * nir_metadata_preserve.
2679 *
2680 * A pass should always clear this value even if it doesn't make any
2681 * progress to indicate that it thought about preserving metadata.
2682 */
2683 nir_metadata_not_properly_reset = 0x8,
2684
2685 /** Indicates that loop analysis information is valid.
2686 *
2687 * This includes everything pointed to by nir_loop::info.
2688 *
2689 * A pass can preserve this metadata type if it is guaranteed to not affect
2690 * any loop metadata. However, since loop metadata includes things like
2691 * loop counts which depend on arithmetic in the loop, this is very hard to
2692 * determine. Most passes shouldn't preserve this metadata type.
2693 */
2694 nir_metadata_loop_analysis = 0x10,
2695 } nir_metadata;
2696
2697 typedef struct {
2698 nir_cf_node cf_node;
2699
2700 /** pointer to the function of which this is an implementation */
2701 struct nir_function *function;
2702
2703 struct exec_list body; /** < list of nir_cf_node */
2704
2705 nir_block *end_block;
2706
2707 /** list for all local variables in the function */
2708 struct exec_list locals;
2709
2710 /** list of local registers in the function */
2711 struct exec_list registers;
2712
2713 /** next available local register index */
2714 unsigned reg_alloc;
2715
2716 /** next available SSA value index */
2717 unsigned ssa_alloc;
2718
2719 /* total number of basic blocks, only valid when block_index_dirty = false */
2720 unsigned num_blocks;
2721
2722 nir_metadata valid_metadata;
2723 } nir_function_impl;
2724
2725 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2726 nir_start_block(nir_function_impl *impl)
2727 {
2728 return (nir_block *) impl->body.head_sentinel.next;
2729 }
2730
2731 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2732 nir_impl_last_block(nir_function_impl *impl)
2733 {
2734 return (nir_block *) impl->body.tail_sentinel.prev;
2735 }
2736
2737 static inline nir_cf_node *
2738 nir_cf_node_next(nir_cf_node *node)
2739 {
2740 struct exec_node *next = exec_node_get_next(&node->node);
2741 if (exec_node_is_tail_sentinel(next))
2742 return NULL;
2743 else
2744 return exec_node_data(nir_cf_node, next, node);
2745 }
2746
2747 static inline nir_cf_node *
2748 nir_cf_node_prev(nir_cf_node *node)
2749 {
2750 struct exec_node *prev = exec_node_get_prev(&node->node);
2751 if (exec_node_is_head_sentinel(prev))
2752 return NULL;
2753 else
2754 return exec_node_data(nir_cf_node, prev, node);
2755 }
2756
2757 static inline bool
2758 nir_cf_node_is_first(const nir_cf_node *node)
2759 {
2760 return exec_node_is_head_sentinel(node->node.prev);
2761 }
2762
2763 static inline bool
2764 nir_cf_node_is_last(const nir_cf_node *node)
2765 {
2766 return exec_node_is_tail_sentinel(node->node.next);
2767 }
2768
2769 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2770 type, nir_cf_node_block)
2771 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2772 type, nir_cf_node_if)
2773 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2774 type, nir_cf_node_loop)
2775 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2776 nir_function_impl, cf_node, type, nir_cf_node_function)
2777
2778 static inline nir_block *
2779 nir_if_first_then_block(nir_if *if_stmt)
2780 {
2781 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2782 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2783 }
2784
2785 static inline nir_block *
2786 nir_if_last_then_block(nir_if *if_stmt)
2787 {
2788 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2789 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2790 }
2791
2792 static inline nir_block *
2793 nir_if_first_else_block(nir_if *if_stmt)
2794 {
2795 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2796 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2797 }
2798
2799 static inline nir_block *
2800 nir_if_last_else_block(nir_if *if_stmt)
2801 {
2802 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2803 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2804 }
2805
2806 static inline nir_block *
2807 nir_loop_first_block(nir_loop *loop)
2808 {
2809 struct exec_node *head = exec_list_get_head(&loop->body);
2810 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2811 }
2812
2813 static inline nir_block *
2814 nir_loop_last_block(nir_loop *loop)
2815 {
2816 struct exec_node *tail = exec_list_get_tail(&loop->body);
2817 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2818 }
2819
2820 /**
2821 * Return true if this list of cf_nodes contains a single empty block.
2822 */
2823 static inline bool
2824 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2825 {
2826 if (exec_list_is_singular(cf_list)) {
2827 struct exec_node *head = exec_list_get_head(cf_list);
2828 nir_block *block =
2829 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2830 return exec_list_is_empty(&block->instr_list);
2831 }
2832 return false;
2833 }
2834
2835 typedef struct {
2836 uint8_t num_components;
2837 uint8_t bit_size;
2838 } nir_parameter;
2839
2840 typedef struct nir_function {
2841 struct exec_node node;
2842
2843 const char *name;
2844 struct nir_shader *shader;
2845
2846 unsigned num_params;
2847 nir_parameter *params;
2848
2849 /** The implementation of this function.
2850 *
2851 * If the function is only declared and not implemented, this is NULL.
2852 */
2853 nir_function_impl *impl;
2854
2855 bool is_entrypoint;
2856 } nir_function;
2857
2858 typedef enum {
2859 nir_lower_imul64 = (1 << 0),
2860 nir_lower_isign64 = (1 << 1),
2861 /** Lower all int64 modulus and division opcodes */
2862 nir_lower_divmod64 = (1 << 2),
2863 /** Lower all 64-bit umul_high and imul_high opcodes */
2864 nir_lower_imul_high64 = (1 << 3),
2865 nir_lower_mov64 = (1 << 4),
2866 nir_lower_icmp64 = (1 << 5),
2867 nir_lower_iadd64 = (1 << 6),
2868 nir_lower_iabs64 = (1 << 7),
2869 nir_lower_ineg64 = (1 << 8),
2870 nir_lower_logic64 = (1 << 9),
2871 nir_lower_minmax64 = (1 << 10),
2872 nir_lower_shift64 = (1 << 11),
2873 nir_lower_imul_2x32_64 = (1 << 12),
2874 nir_lower_extract64 = (1 << 13),
2875 nir_lower_ufind_msb64 = (1 << 14),
2876 } nir_lower_int64_options;
2877
2878 typedef enum {
2879 nir_lower_drcp = (1 << 0),
2880 nir_lower_dsqrt = (1 << 1),
2881 nir_lower_drsq = (1 << 2),
2882 nir_lower_dtrunc = (1 << 3),
2883 nir_lower_dfloor = (1 << 4),
2884 nir_lower_dceil = (1 << 5),
2885 nir_lower_dfract = (1 << 6),
2886 nir_lower_dround_even = (1 << 7),
2887 nir_lower_dmod = (1 << 8),
2888 nir_lower_dsub = (1 << 9),
2889 nir_lower_ddiv = (1 << 10),
2890 nir_lower_fp64_full_software = (1 << 11),
2891 } nir_lower_doubles_options;
2892
2893 typedef enum {
2894 nir_divergence_single_prim_per_subgroup = (1 << 0),
2895 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2896 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2897 nir_divergence_view_index_uniform = (1 << 3),
2898 } nir_divergence_options;
2899
2900 typedef struct nir_shader_compiler_options {
2901 bool lower_fdiv;
2902 bool lower_ffma;
2903 bool fuse_ffma;
2904 bool lower_flrp16;
2905 bool lower_flrp32;
2906 /** Lowers flrp when it does not support doubles */
2907 bool lower_flrp64;
2908 bool lower_fpow;
2909 bool lower_fsat;
2910 bool lower_fsqrt;
2911 bool lower_sincos;
2912 bool lower_fmod;
2913 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2914 bool lower_bitfield_extract;
2915 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2916 bool lower_bitfield_extract_to_shifts;
2917 /** Lowers bitfield_insert to bfi/bfm */
2918 bool lower_bitfield_insert;
2919 /** Lowers bitfield_insert to compares, and shifts. */
2920 bool lower_bitfield_insert_to_shifts;
2921 /** Lowers bitfield_insert to bfm/bitfield_select. */
2922 bool lower_bitfield_insert_to_bitfield_select;
2923 /** Lowers bitfield_reverse to shifts. */
2924 bool lower_bitfield_reverse;
2925 /** Lowers bit_count to shifts. */
2926 bool lower_bit_count;
2927 /** Lowers ifind_msb to compare and ufind_msb */
2928 bool lower_ifind_msb;
2929 /** Lowers find_lsb to ufind_msb and logic ops */
2930 bool lower_find_lsb;
2931 bool lower_uadd_carry;
2932 bool lower_usub_borrow;
2933 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2934 bool lower_mul_high;
2935 /** lowers fneg and ineg to fsub and isub. */
2936 bool lower_negate;
2937 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2938 bool lower_sub;
2939
2940 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2941 bool lower_scmp;
2942
2943 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2944 bool lower_vector_cmp;
2945
2946 /** enables rules to lower idiv by power-of-two: */
2947 bool lower_idiv;
2948
2949 /** enable rules to avoid bit ops */
2950 bool lower_bitops;
2951
2952 /** enables rules to lower isign to imin+imax */
2953 bool lower_isign;
2954
2955 /** enables rules to lower fsign to fsub and flt */
2956 bool lower_fsign;
2957
2958 /* lower fdph to fdot4 */
2959 bool lower_fdph;
2960
2961 /** lower fdot to fmul and fsum/fadd. */
2962 bool lower_fdot;
2963
2964 /* Does the native fdot instruction replicate its result for four
2965 * components? If so, then opt_algebraic_late will turn all fdotN
2966 * instructions into fdot_replicatedN instructions.
2967 */
2968 bool fdot_replicates;
2969
2970 /** lowers ffloor to fsub+ffract: */
2971 bool lower_ffloor;
2972
2973 /** lowers ffract to fsub+ffloor: */
2974 bool lower_ffract;
2975
2976 /** lowers fceil to fneg+ffloor+fneg: */
2977 bool lower_fceil;
2978
2979 bool lower_ftrunc;
2980
2981 bool lower_ldexp;
2982
2983 bool lower_pack_half_2x16;
2984 bool lower_pack_unorm_2x16;
2985 bool lower_pack_snorm_2x16;
2986 bool lower_pack_unorm_4x8;
2987 bool lower_pack_snorm_4x8;
2988 bool lower_unpack_half_2x16;
2989 bool lower_unpack_unorm_2x16;
2990 bool lower_unpack_snorm_2x16;
2991 bool lower_unpack_unorm_4x8;
2992 bool lower_unpack_snorm_4x8;
2993
2994 bool lower_pack_split;
2995
2996 bool lower_extract_byte;
2997 bool lower_extract_word;
2998
2999 bool lower_all_io_to_temps;
3000 bool lower_all_io_to_elements;
3001
3002 /* Indicates that the driver only has zero-based vertex id */
3003 bool vertex_id_zero_based;
3004
3005 /**
3006 * If enabled, gl_BaseVertex will be lowered as:
3007 * is_indexed_draw (~0/0) & firstvertex
3008 */
3009 bool lower_base_vertex;
3010
3011 /**
3012 * If enabled, gl_HelperInvocation will be lowered as:
3013 *
3014 * !((1 << sample_id) & sample_mask_in))
3015 *
3016 * This depends on some possibly hw implementation details, which may
3017 * not be true for all hw. In particular that the FS is only executed
3018 * for covered samples or for helper invocations. So, do not blindly
3019 * enable this option.
3020 *
3021 * Note: See also issue #22 in ARB_shader_image_load_store
3022 */
3023 bool lower_helper_invocation;
3024
3025 /**
3026 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3027 *
3028 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3029 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3030 */
3031 bool optimize_sample_mask_in;
3032
3033 bool lower_cs_local_index_from_id;
3034 bool lower_cs_local_id_from_index;
3035
3036 bool lower_device_index_to_zero;
3037
3038 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3039 bool lower_wpos_pntc;
3040
3041 /**
3042 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3043 * lowered to simple arithmetic.
3044 *
3045 * If this flag is set, the lowering will be applied to all bit-sizes of
3046 * these instructions.
3047 *
3048 * \sa ::lower_hadd64
3049 */
3050 bool lower_hadd;
3051
3052 /**
3053 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3054 * should be lowered to simple arithmetic.
3055 *
3056 * If this flag is set, the lowering will be applied to only 64-bit
3057 * versions of these instructions.
3058 *
3059 * \sa ::lower_hadd
3060 */
3061 bool lower_hadd64;
3062
3063 /**
3064 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3065 * arithmetic.
3066 *
3067 * If this flag is set, the lowering will be applied to all bit-sizes of
3068 * these instructions.
3069 *
3070 * \sa ::lower_usub_sat64
3071 */
3072 bool lower_add_sat;
3073
3074 /**
3075 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3076 * arithmetic.
3077 *
3078 * \sa ::lower_add_sat
3079 */
3080 bool lower_usub_sat64;
3081
3082 /**
3083 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3084 * for IO purposes and would prefer loads/stores be vectorized.
3085 */
3086 bool vectorize_io;
3087 bool lower_to_scalar;
3088
3089 /**
3090 * Whether nir_opt_vectorize should only create 16-bit 2D vectors.
3091 */
3092 bool vectorize_vec2_16bit;
3093
3094 /**
3095 * Should the linker unify inputs_read/outputs_written between adjacent
3096 * shader stages which are linked into a single program?
3097 */
3098 bool unify_interfaces;
3099
3100 /**
3101 * Should nir_lower_io() create load_interpolated_input intrinsics?
3102 *
3103 * If not, it generates regular load_input intrinsics and interpolation
3104 * information must be inferred from the list of input nir_variables.
3105 */
3106 bool use_interpolated_input_intrinsics;
3107
3108 /* Lowers when 32x32->64 bit multiplication is not supported */
3109 bool lower_mul_2x32_64;
3110
3111 /* Lowers when rotate instruction is not supported */
3112 bool lower_rotate;
3113
3114 /**
3115 * Backend supports imul24, and would like to use it (when possible)
3116 * for address/offset calculation. If true, driver should call
3117 * nir_lower_amul(). (If not set, amul will automatically be lowered
3118 * to imul.)
3119 */
3120 bool has_imul24;
3121
3122 /** Backend supports umul24, if not set umul24 will automatically be lowered
3123 * to imul with masked inputs */
3124 bool has_umul24;
3125
3126 /** Backend supports umad24, if not set umad24 will automatically be lowered
3127 * to imul with masked inputs and iadd */
3128 bool has_umad24;
3129
3130 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
3131 * set of memory barrier intrinsics based on GLSL.
3132 */
3133 bool use_scoped_memory_barrier;
3134
3135 /**
3136 * Is this the Intel vec4 backend?
3137 *
3138 * Used to inhibit algebraic optimizations that are known to be harmful on
3139 * the Intel vec4 backend. This is generally applicable to any
3140 * optimization that might cause more immediate values to be used in
3141 * 3-source (e.g., ffma and flrp) instructions.
3142 */
3143 bool intel_vec4;
3144
3145 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3146 bool lower_bfe_with_two_constants;
3147
3148 /** Whether 8-bit ALU is supported. */
3149 bool support_8bit_alu;
3150
3151 /** Whether 16-bit ALU is supported. */
3152 bool support_16bit_alu;
3153
3154 unsigned max_unroll_iterations;
3155
3156 nir_lower_int64_options lower_int64_options;
3157 nir_lower_doubles_options lower_doubles_options;
3158 } nir_shader_compiler_options;
3159
3160 typedef struct nir_shader {
3161 /** list of uniforms (nir_variable) */
3162 struct exec_list uniforms;
3163
3164 /** list of inputs (nir_variable) */
3165 struct exec_list inputs;
3166
3167 /** list of outputs (nir_variable) */
3168 struct exec_list outputs;
3169
3170 /** list of shared compute variables (nir_variable) */
3171 struct exec_list shared;
3172
3173 /** Set of driver-specific options for the shader.
3174 *
3175 * The memory for the options is expected to be kept in a single static
3176 * copy by the driver.
3177 */
3178 const struct nir_shader_compiler_options *options;
3179
3180 /** Various bits of compile-time information about a given shader */
3181 struct shader_info info;
3182
3183 /** list of global variables in the shader (nir_variable) */
3184 struct exec_list globals;
3185
3186 /** list of system value variables in the shader (nir_variable) */
3187 struct exec_list system_values;
3188
3189 struct exec_list functions; /** < list of nir_function */
3190
3191 /**
3192 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3193 * access plus one
3194 */
3195 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3196
3197 /** Size in bytes of required scratch space */
3198 unsigned scratch_size;
3199
3200 /** Constant data associated with this shader.
3201 *
3202 * Constant data is loaded through load_constant intrinsics. See also
3203 * nir_opt_large_constants.
3204 */
3205 void *constant_data;
3206 unsigned constant_data_size;
3207 } nir_shader;
3208
3209 #define nir_foreach_function(func, shader) \
3210 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3211
3212 static inline nir_function_impl *
3213 nir_shader_get_entrypoint(nir_shader *shader)
3214 {
3215 nir_function *func = NULL;
3216
3217 nir_foreach_function(function, shader) {
3218 assert(func == NULL);
3219 if (function->is_entrypoint) {
3220 func = function;
3221 #ifndef NDEBUG
3222 break;
3223 #endif
3224 }
3225 }
3226
3227 if (!func)
3228 return NULL;
3229
3230 assert(func->num_params == 0);
3231 assert(func->impl);
3232 return func->impl;
3233 }
3234
3235 nir_shader *nir_shader_create(void *mem_ctx,
3236 gl_shader_stage stage,
3237 const nir_shader_compiler_options *options,
3238 shader_info *si);
3239
3240 nir_register *nir_local_reg_create(nir_function_impl *impl);
3241
3242 void nir_reg_remove(nir_register *reg);
3243
3244 /** Adds a variable to the appropriate list in nir_shader */
3245 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3246
3247 static inline void
3248 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3249 {
3250 assert(var->data.mode == nir_var_function_temp);
3251 exec_list_push_tail(&impl->locals, &var->node);
3252 }
3253
3254 /** creates a variable, sets a few defaults, and adds it to the list */
3255 nir_variable *nir_variable_create(nir_shader *shader,
3256 nir_variable_mode mode,
3257 const struct glsl_type *type,
3258 const char *name);
3259 /** creates a local variable and adds it to the list */
3260 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3261 const struct glsl_type *type,
3262 const char *name);
3263
3264 /** creates a function and adds it to the shader's list of functions */
3265 nir_function *nir_function_create(nir_shader *shader, const char *name);
3266
3267 nir_function_impl *nir_function_impl_create(nir_function *func);
3268 /** creates a function_impl that isn't tied to any particular function */
3269 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3270
3271 nir_block *nir_block_create(nir_shader *shader);
3272 nir_if *nir_if_create(nir_shader *shader);
3273 nir_loop *nir_loop_create(nir_shader *shader);
3274
3275 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3276
3277 /** requests that the given pieces of metadata be generated */
3278 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3279 /** dirties all but the preserved metadata */
3280 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3281
3282 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3283 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3284
3285 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3286 nir_deref_type deref_type);
3287
3288 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3289
3290 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3291 unsigned num_components,
3292 unsigned bit_size);
3293
3294 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3295 nir_intrinsic_op op);
3296
3297 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3298 nir_function *callee);
3299
3300 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3301
3302 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3303
3304 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3305
3306 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3307 unsigned num_components,
3308 unsigned bit_size);
3309
3310 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3311
3312 /**
3313 * NIR Cursors and Instruction Insertion API
3314 * @{
3315 *
3316 * A tiny struct representing a point to insert/extract instructions or
3317 * control flow nodes. Helps reduce the combinatorial explosion of possible
3318 * points to insert/extract.
3319 *
3320 * \sa nir_control_flow.h
3321 */
3322 typedef enum {
3323 nir_cursor_before_block,
3324 nir_cursor_after_block,
3325 nir_cursor_before_instr,
3326 nir_cursor_after_instr,
3327 } nir_cursor_option;
3328
3329 typedef struct {
3330 nir_cursor_option option;
3331 union {
3332 nir_block *block;
3333 nir_instr *instr;
3334 };
3335 } nir_cursor;
3336
3337 static inline nir_block *
3338 nir_cursor_current_block(nir_cursor cursor)
3339 {
3340 if (cursor.option == nir_cursor_before_instr ||
3341 cursor.option == nir_cursor_after_instr) {
3342 return cursor.instr->block;
3343 } else {
3344 return cursor.block;
3345 }
3346 }
3347
3348 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3349
3350 static inline nir_cursor
3351 nir_before_block(nir_block *block)
3352 {
3353 nir_cursor cursor;
3354 cursor.option = nir_cursor_before_block;
3355 cursor.block = block;
3356 return cursor;
3357 }
3358
3359 static inline nir_cursor
3360 nir_after_block(nir_block *block)
3361 {
3362 nir_cursor cursor;
3363 cursor.option = nir_cursor_after_block;
3364 cursor.block = block;
3365 return cursor;
3366 }
3367
3368 static inline nir_cursor
3369 nir_before_instr(nir_instr *instr)
3370 {
3371 nir_cursor cursor;
3372 cursor.option = nir_cursor_before_instr;
3373 cursor.instr = instr;
3374 return cursor;
3375 }
3376
3377 static inline nir_cursor
3378 nir_after_instr(nir_instr *instr)
3379 {
3380 nir_cursor cursor;
3381 cursor.option = nir_cursor_after_instr;
3382 cursor.instr = instr;
3383 return cursor;
3384 }
3385
3386 static inline nir_cursor
3387 nir_after_block_before_jump(nir_block *block)
3388 {
3389 nir_instr *last_instr = nir_block_last_instr(block);
3390 if (last_instr && last_instr->type == nir_instr_type_jump) {
3391 return nir_before_instr(last_instr);
3392 } else {
3393 return nir_after_block(block);
3394 }
3395 }
3396
3397 static inline nir_cursor
3398 nir_before_src(nir_src *src, bool is_if_condition)
3399 {
3400 if (is_if_condition) {
3401 nir_block *prev_block =
3402 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3403 assert(!nir_block_ends_in_jump(prev_block));
3404 return nir_after_block(prev_block);
3405 } else if (src->parent_instr->type == nir_instr_type_phi) {
3406 #ifndef NDEBUG
3407 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3408 bool found = false;
3409 nir_foreach_phi_src(phi_src, cond_phi) {
3410 if (phi_src->src.ssa == src->ssa) {
3411 found = true;
3412 break;
3413 }
3414 }
3415 assert(found);
3416 #endif
3417 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3418 * to have a more specific name.
3419 */
3420 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3421 return nir_after_block_before_jump(phi_src->pred);
3422 } else {
3423 return nir_before_instr(src->parent_instr);
3424 }
3425 }
3426
3427 static inline nir_cursor
3428 nir_before_cf_node(nir_cf_node *node)
3429 {
3430 if (node->type == nir_cf_node_block)
3431 return nir_before_block(nir_cf_node_as_block(node));
3432
3433 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3434 }
3435
3436 static inline nir_cursor
3437 nir_after_cf_node(nir_cf_node *node)
3438 {
3439 if (node->type == nir_cf_node_block)
3440 return nir_after_block(nir_cf_node_as_block(node));
3441
3442 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3443 }
3444
3445 static inline nir_cursor
3446 nir_after_phis(nir_block *block)
3447 {
3448 nir_foreach_instr(instr, block) {
3449 if (instr->type != nir_instr_type_phi)
3450 return nir_before_instr(instr);
3451 }
3452 return nir_after_block(block);
3453 }
3454
3455 static inline nir_cursor
3456 nir_after_cf_node_and_phis(nir_cf_node *node)
3457 {
3458 if (node->type == nir_cf_node_block)
3459 return nir_after_block(nir_cf_node_as_block(node));
3460
3461 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3462
3463 return nir_after_phis(block);
3464 }
3465
3466 static inline nir_cursor
3467 nir_before_cf_list(struct exec_list *cf_list)
3468 {
3469 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3470 exec_list_get_head(cf_list), node);
3471 return nir_before_cf_node(first_node);
3472 }
3473
3474 static inline nir_cursor
3475 nir_after_cf_list(struct exec_list *cf_list)
3476 {
3477 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3478 exec_list_get_tail(cf_list), node);
3479 return nir_after_cf_node(last_node);
3480 }
3481
3482 /**
3483 * Insert a NIR instruction at the given cursor.
3484 *
3485 * Note: This does not update the cursor.
3486 */
3487 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3488
3489 static inline void
3490 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3491 {
3492 nir_instr_insert(nir_before_instr(instr), before);
3493 }
3494
3495 static inline void
3496 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3497 {
3498 nir_instr_insert(nir_after_instr(instr), after);
3499 }
3500
3501 static inline void
3502 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3503 {
3504 nir_instr_insert(nir_before_block(block), before);
3505 }
3506
3507 static inline void
3508 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3509 {
3510 nir_instr_insert(nir_after_block(block), after);
3511 }
3512
3513 static inline void
3514 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3515 {
3516 nir_instr_insert(nir_before_cf_node(node), before);
3517 }
3518
3519 static inline void
3520 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3521 {
3522 nir_instr_insert(nir_after_cf_node(node), after);
3523 }
3524
3525 static inline void
3526 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3527 {
3528 nir_instr_insert(nir_before_cf_list(list), before);
3529 }
3530
3531 static inline void
3532 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3533 {
3534 nir_instr_insert(nir_after_cf_list(list), after);
3535 }
3536
3537 void nir_instr_remove_v(nir_instr *instr);
3538
3539 static inline nir_cursor
3540 nir_instr_remove(nir_instr *instr)
3541 {
3542 nir_cursor cursor;
3543 nir_instr *prev = nir_instr_prev(instr);
3544 if (prev) {
3545 cursor = nir_after_instr(prev);
3546 } else {
3547 cursor = nir_before_block(instr->block);
3548 }
3549 nir_instr_remove_v(instr);
3550 return cursor;
3551 }
3552
3553 /** @} */
3554
3555 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3556
3557 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3558 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3559 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3560 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3561 void *state);
3562 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3563 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3564 bool nir_foreach_phi_src_leaving_block(nir_block *instr,
3565 nir_foreach_src_cb cb,
3566 void *state);
3567
3568 nir_const_value *nir_src_as_const_value(nir_src src);
3569
3570 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3571 static inline c_type * \
3572 nir_src_as_ ## name (nir_src src) \
3573 { \
3574 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3575 ? cast_macro(src.ssa->parent_instr) : NULL; \
3576 }
3577
3578 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3579 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3580 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3581 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3582
3583 bool nir_src_is_dynamically_uniform(nir_src src);
3584 bool nir_srcs_equal(nir_src src1, nir_src src2);
3585 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3586 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3587 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3588 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3589 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3590 nir_dest new_dest);
3591
3592 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3593 unsigned num_components, unsigned bit_size,
3594 const char *name);
3595 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3596 unsigned num_components, unsigned bit_size,
3597 const char *name);
3598 static inline void
3599 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3600 const struct glsl_type *type,
3601 const char *name)
3602 {
3603 assert(glsl_type_is_vector_or_scalar(type));
3604 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3605 glsl_get_bit_size(type), name);
3606 }
3607 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3608 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3609 nir_instr *after_me);
3610
3611 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3612
3613 /*
3614 * finds the next basic block in source-code order, returns NULL if there is
3615 * none
3616 */
3617
3618 nir_block *nir_block_cf_tree_next(nir_block *block);
3619
3620 /* Performs the opposite of nir_block_cf_tree_next() */
3621
3622 nir_block *nir_block_cf_tree_prev(nir_block *block);
3623
3624 /* Gets the first block in a CF node in source-code order */
3625
3626 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3627
3628 /* Gets the last block in a CF node in source-code order */
3629
3630 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3631
3632 /* Gets the next block after a CF node in source-code order */
3633
3634 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3635
3636 /* Macros for loops that visit blocks in source-code order */
3637
3638 #define nir_foreach_block(block, impl) \
3639 for (nir_block *block = nir_start_block(impl); block != NULL; \
3640 block = nir_block_cf_tree_next(block))
3641
3642 #define nir_foreach_block_safe(block, impl) \
3643 for (nir_block *block = nir_start_block(impl), \
3644 *next = nir_block_cf_tree_next(block); \
3645 block != NULL; \
3646 block = next, next = nir_block_cf_tree_next(block))
3647
3648 #define nir_foreach_block_reverse(block, impl) \
3649 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3650 block = nir_block_cf_tree_prev(block))
3651
3652 #define nir_foreach_block_reverse_safe(block, impl) \
3653 for (nir_block *block = nir_impl_last_block(impl), \
3654 *prev = nir_block_cf_tree_prev(block); \
3655 block != NULL; \
3656 block = prev, prev = nir_block_cf_tree_prev(block))
3657
3658 #define nir_foreach_block_in_cf_node(block, node) \
3659 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3660 block != nir_cf_node_cf_tree_next(node); \
3661 block = nir_block_cf_tree_next(block))
3662
3663 /* If the following CF node is an if, this function returns that if.
3664 * Otherwise, it returns NULL.
3665 */
3666 nir_if *nir_block_get_following_if(nir_block *block);
3667
3668 nir_loop *nir_block_get_following_loop(nir_block *block);
3669
3670 void nir_index_local_regs(nir_function_impl *impl);
3671 void nir_index_ssa_defs(nir_function_impl *impl);
3672 unsigned nir_index_instrs(nir_function_impl *impl);
3673
3674 void nir_index_blocks(nir_function_impl *impl);
3675
3676 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3677
3678 void nir_print_shader(nir_shader *shader, FILE *fp);
3679 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3680 void nir_print_instr(const nir_instr *instr, FILE *fp);
3681 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3682
3683 /** Shallow clone of a single ALU instruction. */
3684 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3685
3686 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3687 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3688 const nir_function_impl *fi);
3689 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3690 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3691
3692 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3693
3694 void nir_shader_serialize_deserialize(nir_shader *s);
3695
3696 #ifndef NDEBUG
3697 void nir_validate_shader(nir_shader *shader, const char *when);
3698 void nir_metadata_set_validation_flag(nir_shader *shader);
3699 void nir_metadata_check_validation_flag(nir_shader *shader);
3700
3701 static inline bool
3702 should_skip_nir(const char *name)
3703 {
3704 static const char *list = NULL;
3705 if (!list) {
3706 /* Comma separated list of names to skip. */
3707 list = getenv("NIR_SKIP");
3708 if (!list)
3709 list = "";
3710 }
3711
3712 if (!list[0])
3713 return false;
3714
3715 return comma_separated_list_contains(list, name);
3716 }
3717
3718 static inline bool
3719 should_clone_nir(void)
3720 {
3721 static int should_clone = -1;
3722 if (should_clone < 0)
3723 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3724
3725 return should_clone;
3726 }
3727
3728 static inline bool
3729 should_serialize_deserialize_nir(void)
3730 {
3731 static int test_serialize = -1;
3732 if (test_serialize < 0)
3733 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3734
3735 return test_serialize;
3736 }
3737
3738 static inline bool
3739 should_print_nir(void)
3740 {
3741 static int should_print = -1;
3742 if (should_print < 0)
3743 should_print = env_var_as_boolean("NIR_PRINT", false);
3744
3745 return should_print;
3746 }
3747 #else
3748 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3749 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3750 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3751 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3752 static inline bool should_clone_nir(void) { return false; }
3753 static inline bool should_serialize_deserialize_nir(void) { return false; }
3754 static inline bool should_print_nir(void) { return false; }
3755 #endif /* NDEBUG */
3756
3757 #define _PASS(pass, nir, do_pass) do { \
3758 if (should_skip_nir(#pass)) { \
3759 printf("skipping %s\n", #pass); \
3760 break; \
3761 } \
3762 do_pass \
3763 nir_validate_shader(nir, "after " #pass); \
3764 if (should_clone_nir()) { \
3765 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3766 nir_shader_replace(nir, clone); \
3767 } \
3768 if (should_serialize_deserialize_nir()) { \
3769 nir_shader_serialize_deserialize(nir); \
3770 } \
3771 } while (0)
3772
3773 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3774 nir_metadata_set_validation_flag(nir); \
3775 if (should_print_nir()) \
3776 printf("%s\n", #pass); \
3777 if (pass(nir, ##__VA_ARGS__)) { \
3778 progress = true; \
3779 if (should_print_nir()) \
3780 nir_print_shader(nir, stdout); \
3781 nir_metadata_check_validation_flag(nir); \
3782 } \
3783 )
3784
3785 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3786 if (should_print_nir()) \
3787 printf("%s\n", #pass); \
3788 pass(nir, ##__VA_ARGS__); \
3789 if (should_print_nir()) \
3790 nir_print_shader(nir, stdout); \
3791 )
3792
3793 #define NIR_SKIP(name) should_skip_nir(#name)
3794
3795 /** An instruction filtering callback
3796 *
3797 * Returns true if the instruction should be processed and false otherwise.
3798 */
3799 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3800
3801 /** A simple instruction lowering callback
3802 *
3803 * Many instruction lowering passes can be written as a simple function which
3804 * takes an instruction as its input and returns a sequence of instructions
3805 * that implement the consumed instruction. This function type represents
3806 * such a lowering function. When called, a function with this prototype
3807 * should either return NULL indicating that no lowering needs to be done or
3808 * emit a sequence of instructions using the provided builder (whose cursor
3809 * will already be placed after the instruction to be lowered) and return the
3810 * resulting nir_ssa_def.
3811 */
3812 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3813 nir_instr *, void *);
3814
3815 /**
3816 * Special return value for nir_lower_instr_cb when some progress occurred
3817 * (like changing an input to the instr) that didn't result in a replacement
3818 * SSA def being generated.
3819 */
3820 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3821
3822 /** Iterate over all the instructions in a nir_function_impl and lower them
3823 * using the provided callbacks
3824 *
3825 * This function implements the guts of a standard lowering pass for you. It
3826 * iterates over all of the instructions in a nir_function_impl and calls the
3827 * filter callback on each one. If the filter callback returns true, it then
3828 * calls the lowering call back on the instruction. (Splitting it this way
3829 * allows us to avoid some save/restore work for instructions we know won't be
3830 * lowered.) If the instruction is dead after the lowering is complete, it
3831 * will be removed. If new instructions are added, the lowering callback will
3832 * also be called on them in case multiple lowerings are required.
3833 *
3834 * The metadata for the nir_function_impl will also be updated. If any blocks
3835 * are added (they cannot be removed), dominance and block indices will be
3836 * invalidated.
3837 */
3838 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3839 nir_instr_filter_cb filter,
3840 nir_lower_instr_cb lower,
3841 void *cb_data);
3842 bool nir_shader_lower_instructions(nir_shader *shader,
3843 nir_instr_filter_cb filter,
3844 nir_lower_instr_cb lower,
3845 void *cb_data);
3846
3847 void nir_calc_dominance_impl(nir_function_impl *impl);
3848 void nir_calc_dominance(nir_shader *shader);
3849
3850 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3851 bool nir_block_dominates(nir_block *parent, nir_block *child);
3852 bool nir_block_is_unreachable(nir_block *block);
3853
3854 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3855 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3856
3857 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3858 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3859
3860 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3861 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3862
3863 int nir_gs_count_vertices(const nir_shader *shader);
3864
3865 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3866 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3867 bool nir_split_var_copies(nir_shader *shader);
3868 bool nir_split_per_member_structs(nir_shader *shader);
3869 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3870
3871 bool nir_lower_returns_impl(nir_function_impl *impl);
3872 bool nir_lower_returns(nir_shader *shader);
3873
3874 void nir_inline_function_impl(struct nir_builder *b,
3875 const nir_function_impl *impl,
3876 nir_ssa_def **params);
3877 bool nir_inline_functions(nir_shader *shader);
3878
3879 bool nir_propagate_invariant(nir_shader *shader);
3880
3881 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3882 void nir_lower_deref_copy_instr(struct nir_builder *b,
3883 nir_intrinsic_instr *copy);
3884 bool nir_lower_var_copies(nir_shader *shader);
3885
3886 void nir_fixup_deref_modes(nir_shader *shader);
3887
3888 bool nir_lower_global_vars_to_local(nir_shader *shader);
3889
3890 typedef enum {
3891 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3892 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3893 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3894 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3895 } nir_lower_array_deref_of_vec_options;
3896
3897 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3898 nir_lower_array_deref_of_vec_options options);
3899
3900 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3901
3902 bool nir_lower_locals_to_regs(nir_shader *shader);
3903
3904 void nir_lower_io_to_temporaries(nir_shader *shader,
3905 nir_function_impl *entrypoint,
3906 bool outputs, bool inputs);
3907
3908 bool nir_lower_vars_to_scratch(nir_shader *shader,
3909 nir_variable_mode modes,
3910 int size_threshold,
3911 glsl_type_size_align_func size_align);
3912
3913 void nir_lower_clip_halfz(nir_shader *shader);
3914
3915 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3916
3917 void nir_gather_ssa_types(nir_function_impl *impl,
3918 BITSET_WORD *float_types,
3919 BITSET_WORD *int_types);
3920
3921 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3922 int (*type_size)(const struct glsl_type *, bool));
3923
3924 /* Some helpers to do very simple linking */
3925 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3926 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3927 uint64_t *used_by_other_stage,
3928 uint64_t *used_by_other_stage_patches);
3929 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3930 bool default_to_smooth_interp);
3931 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3932 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3933
3934 bool nir_lower_amul(nir_shader *shader,
3935 int (*type_size)(const struct glsl_type *, bool));
3936
3937 void nir_assign_io_var_locations(struct exec_list *var_list,
3938 unsigned *size,
3939 gl_shader_stage stage);
3940
3941 typedef struct {
3942 uint8_t num_linked_io_vars;
3943 uint8_t num_linked_patch_io_vars;
3944 } nir_linked_io_var_info;
3945
3946 nir_linked_io_var_info
3947 nir_assign_linked_io_var_locations(nir_shader *producer,
3948 nir_shader *consumer);
3949
3950 typedef enum {
3951 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3952 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3953 * modes.
3954 */
3955 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3956
3957 /* If set, this forces all non-flat fragment shader inputs to be
3958 * interpolated as if with the "sample" qualifier. This requires
3959 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3960 */
3961 nir_lower_io_force_sample_interpolation = (1 << 1),
3962 } nir_lower_io_options;
3963 bool nir_lower_io(nir_shader *shader,
3964 nir_variable_mode modes,
3965 int (*type_size)(const struct glsl_type *, bool),
3966 nir_lower_io_options);
3967
3968 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3969
3970 bool
3971 nir_lower_vars_to_explicit_types(nir_shader *shader,
3972 nir_variable_mode modes,
3973 glsl_type_size_align_func type_info);
3974
3975 typedef enum {
3976 /**
3977 * An address format which is a simple 32-bit global GPU address.
3978 */
3979 nir_address_format_32bit_global,
3980
3981 /**
3982 * An address format which is a simple 64-bit global GPU address.
3983 */
3984 nir_address_format_64bit_global,
3985
3986 /**
3987 * An address format which is a bounds-checked 64-bit global GPU address.
3988 *
3989 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3990 * address stored with the low bits in .x and high bits in .y, .z is a
3991 * size, and .w is an offset. When the final I/O operation is lowered, .w
3992 * is checked against .z and the operation is predicated on the result.
3993 */
3994 nir_address_format_64bit_bounded_global,
3995
3996 /**
3997 * An address format which is comprised of a vec2 where the first
3998 * component is a buffer index and the second is an offset.
3999 */
4000 nir_address_format_32bit_index_offset,
4001
4002 /**
4003 * An address format which is a simple 32-bit offset.
4004 */
4005 nir_address_format_32bit_offset,
4006
4007 /**
4008 * An address format representing a purely logical addressing model. In
4009 * this model, all deref chains must be complete from the dereference
4010 * operation to the variable. Cast derefs are not allowed. These
4011 * addresses will be 32-bit scalars but the format is immaterial because
4012 * you can always chase the chain.
4013 */
4014 nir_address_format_logical,
4015 } nir_address_format;
4016
4017 static inline unsigned
4018 nir_address_format_bit_size(nir_address_format addr_format)
4019 {
4020 switch (addr_format) {
4021 case nir_address_format_32bit_global: return 32;
4022 case nir_address_format_64bit_global: return 64;
4023 case nir_address_format_64bit_bounded_global: return 32;
4024 case nir_address_format_32bit_index_offset: return 32;
4025 case nir_address_format_32bit_offset: return 32;
4026 case nir_address_format_logical: return 32;
4027 }
4028 unreachable("Invalid address format");
4029 }
4030
4031 static inline unsigned
4032 nir_address_format_num_components(nir_address_format addr_format)
4033 {
4034 switch (addr_format) {
4035 case nir_address_format_32bit_global: return 1;
4036 case nir_address_format_64bit_global: return 1;
4037 case nir_address_format_64bit_bounded_global: return 4;
4038 case nir_address_format_32bit_index_offset: return 2;
4039 case nir_address_format_32bit_offset: return 1;
4040 case nir_address_format_logical: return 1;
4041 }
4042 unreachable("Invalid address format");
4043 }
4044
4045 static inline const struct glsl_type *
4046 nir_address_format_to_glsl_type(nir_address_format addr_format)
4047 {
4048 unsigned bit_size = nir_address_format_bit_size(addr_format);
4049 assert(bit_size == 32 || bit_size == 64);
4050 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
4051 nir_address_format_num_components(addr_format));
4052 }
4053
4054 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
4055
4056 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4057 nir_address_format addr_format);
4058
4059 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4060 nir_address_format addr_format);
4061
4062 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
4063 nir_deref_instr *deref,
4064 nir_ssa_def *base_addr,
4065 nir_address_format addr_format);
4066 void nir_lower_explicit_io_instr(struct nir_builder *b,
4067 nir_intrinsic_instr *io_instr,
4068 nir_ssa_def *addr,
4069 nir_address_format addr_format);
4070
4071 bool nir_lower_explicit_io(nir_shader *shader,
4072 nir_variable_mode modes,
4073 nir_address_format);
4074
4075 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
4076 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
4077
4078 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
4079
4080 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
4081 bool nir_lower_regs_to_ssa(nir_shader *shader);
4082 bool nir_lower_vars_to_ssa(nir_shader *shader);
4083
4084 bool nir_remove_dead_derefs(nir_shader *shader);
4085 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
4086 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
4087 bool nir_lower_variable_initializers(nir_shader *shader,
4088 nir_variable_mode modes);
4089
4090 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
4091 bool nir_lower_vec_to_movs(nir_shader *shader);
4092 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
4093 bool alpha_to_one,
4094 const gl_state_index16 *alpha_ref_state_tokens);
4095 bool nir_lower_alu(nir_shader *shader);
4096
4097 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
4098 bool always_precise, bool have_ffma);
4099
4100 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
4101 bool nir_lower_bool_to_bitsize(nir_shader *shader);
4102 bool nir_lower_bool_to_float(nir_shader *shader);
4103 bool nir_lower_bool_to_int32(nir_shader *shader);
4104 bool nir_lower_int_to_float(nir_shader *shader);
4105 bool nir_lower_load_const_to_scalar(nir_shader *shader);
4106 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
4107 bool nir_lower_phis_to_scalar(nir_shader *shader);
4108 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
4109 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
4110 bool outputs_only);
4111 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
4112 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
4113 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
4114
4115 void nir_lower_fragcoord_wtrans(nir_shader *shader);
4116 void nir_lower_viewport_transform(nir_shader *shader);
4117 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
4118
4119 typedef struct nir_lower_subgroups_options {
4120 uint8_t subgroup_size;
4121 uint8_t ballot_bit_size;
4122 bool lower_to_scalar:1;
4123 bool lower_vote_trivial:1;
4124 bool lower_vote_eq_to_ballot:1;
4125 bool lower_subgroup_masks:1;
4126 bool lower_shuffle:1;
4127 bool lower_shuffle_to_32bit:1;
4128 bool lower_quad:1;
4129 bool lower_quad_broadcast_dynamic:1;
4130 bool lower_quad_broadcast_dynamic_to_const:1;
4131 } nir_lower_subgroups_options;
4132
4133 bool nir_lower_subgroups(nir_shader *shader,
4134 const nir_lower_subgroups_options *options);
4135
4136 bool nir_lower_system_values(nir_shader *shader);
4137
4138 enum PACKED nir_lower_tex_packing {
4139 nir_lower_tex_packing_none = 0,
4140 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
4141 * or unsigned ints based on the sampler type
4142 */
4143 nir_lower_tex_packing_16,
4144 /* The sampler returns 1 32-bit word of 4x8 unorm */
4145 nir_lower_tex_packing_8,
4146 };
4147
4148 typedef struct nir_lower_tex_options {
4149 /**
4150 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4151 * sampler types a texture projector is lowered.
4152 */
4153 unsigned lower_txp;
4154
4155 /**
4156 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4157 */
4158 bool lower_txf_offset;
4159
4160 /**
4161 * If true, lower away nir_tex_src_offset for all rect textures.
4162 */
4163 bool lower_rect_offset;
4164
4165 /**
4166 * If true, lower rect textures to 2D, using txs to fetch the
4167 * texture dimensions and dividing the texture coords by the
4168 * texture dims to normalize.
4169 */
4170 bool lower_rect;
4171
4172 /**
4173 * If true, convert yuv to rgb.
4174 */
4175 unsigned lower_y_uv_external;
4176 unsigned lower_y_u_v_external;
4177 unsigned lower_yx_xuxv_external;
4178 unsigned lower_xy_uxvx_external;
4179 unsigned lower_ayuv_external;
4180 unsigned lower_xyuv_external;
4181
4182 /**
4183 * To emulate certain texture wrap modes, this can be used
4184 * to saturate the specified tex coord to [0.0, 1.0]. The
4185 * bits are according to sampler #, ie. if, for example:
4186 *
4187 * (conf->saturate_s & (1 << n))
4188 *
4189 * is true, then the s coord for sampler n is saturated.
4190 *
4191 * Note that clamping must happen *after* projector lowering
4192 * so any projected texture sample instruction with a clamped
4193 * coordinate gets automatically lowered, regardless of the
4194 * 'lower_txp' setting.
4195 */
4196 unsigned saturate_s;
4197 unsigned saturate_t;
4198 unsigned saturate_r;
4199
4200 /* Bitmask of textures that need swizzling.
4201 *
4202 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4203 * swizzles[texture_index] is applied to the result of the texturing
4204 * operation.
4205 */
4206 unsigned swizzle_result;
4207
4208 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4209 * while 4 and 5 represent 0 and 1 respectively.
4210 */
4211 uint8_t swizzles[32][4];
4212
4213 /* Can be used to scale sampled values in range required by the format. */
4214 float scale_factors[32];
4215
4216 /**
4217 * Bitmap of textures that need srgb to linear conversion. If
4218 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4219 * of the texture are lowered to linear.
4220 */
4221 unsigned lower_srgb;
4222
4223 /**
4224 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4225 * LODs to nir_texop_txl.
4226 */
4227 bool lower_tex_without_implicit_lod;
4228
4229 /**
4230 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4231 */
4232 bool lower_txd_cube_map;
4233
4234 /**
4235 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4236 */
4237 bool lower_txd_3d;
4238
4239 /**
4240 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4241 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4242 * with lower_txd_cube_map.
4243 */
4244 bool lower_txd_shadow;
4245
4246 /**
4247 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4248 * Implies lower_txd_cube_map and lower_txd_shadow.
4249 */
4250 bool lower_txd;
4251
4252 /**
4253 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4254 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4255 */
4256 bool lower_txb_shadow_clamp;
4257
4258 /**
4259 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4260 * with nir_texop_txl. This includes cube maps.
4261 */
4262 bool lower_txd_shadow_clamp;
4263
4264 /**
4265 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4266 * with nir_texop_txl. This includes cube maps.
4267 */
4268 bool lower_txd_offset_clamp;
4269
4270 /**
4271 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4272 * sampler is bindless.
4273 */
4274 bool lower_txd_clamp_bindless_sampler;
4275
4276 /**
4277 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4278 * sampler index is not statically determinable to be less than 16.
4279 */
4280 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4281
4282 /**
4283 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4284 * 0-lod followed by a nir_ishr.
4285 */
4286 bool lower_txs_lod;
4287
4288 /**
4289 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4290 * mixed-up tg4 locations.
4291 */
4292 bool lower_tg4_broadcom_swizzle;
4293
4294 /**
4295 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4296 */
4297 bool lower_tg4_offsets;
4298
4299 enum nir_lower_tex_packing lower_tex_packing[32];
4300 } nir_lower_tex_options;
4301
4302 bool nir_lower_tex(nir_shader *shader,
4303 const nir_lower_tex_options *options);
4304
4305 enum nir_lower_non_uniform_access_type {
4306 nir_lower_non_uniform_ubo_access = (1 << 0),
4307 nir_lower_non_uniform_ssbo_access = (1 << 1),
4308 nir_lower_non_uniform_texture_access = (1 << 2),
4309 nir_lower_non_uniform_image_access = (1 << 3),
4310 };
4311
4312 bool nir_lower_non_uniform_access(nir_shader *shader,
4313 enum nir_lower_non_uniform_access_type);
4314
4315 enum nir_lower_idiv_path {
4316 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4317 * the two but it is not exact in some cases (for example, 1091317713u /
4318 * 1034u gives 5209173 instead of 1055432) */
4319 nir_lower_idiv_fast,
4320 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4321 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4322 * the nv50 path and many of them are integer multiplications, so it is
4323 * probably slower. It should always return the correct result, though. */
4324 nir_lower_idiv_precise,
4325 };
4326
4327 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4328
4329 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4330
4331 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4332 bool use_vars,
4333 bool use_clipdist_array,
4334 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4335 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4336 bool use_clipdist_array,
4337 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4338 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4339 bool use_clipdist_array);
4340 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4341
4342 void nir_lower_point_size_mov(nir_shader *shader,
4343 const gl_state_index16 *pointsize_state_tokens);
4344
4345 bool nir_lower_frexp(nir_shader *nir);
4346
4347 void nir_lower_two_sided_color(nir_shader *shader);
4348
4349 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4350
4351 bool nir_lower_flatshade(nir_shader *shader);
4352
4353 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4354 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4355 const gl_state_index16 *uniform_state_tokens);
4356
4357 typedef struct nir_lower_wpos_ytransform_options {
4358 gl_state_index16 state_tokens[STATE_LENGTH];
4359 bool fs_coord_origin_upper_left :1;
4360 bool fs_coord_origin_lower_left :1;
4361 bool fs_coord_pixel_center_integer :1;
4362 bool fs_coord_pixel_center_half_integer :1;
4363 } nir_lower_wpos_ytransform_options;
4364
4365 bool nir_lower_wpos_ytransform(nir_shader *shader,
4366 const nir_lower_wpos_ytransform_options *options);
4367 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4368
4369 bool nir_lower_wrmasks(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
4370
4371 bool nir_lower_fb_read(nir_shader *shader);
4372
4373 typedef struct nir_lower_drawpixels_options {
4374 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4375 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4376 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4377 unsigned drawpix_sampler;
4378 unsigned pixelmap_sampler;
4379 bool pixel_maps :1;
4380 bool scale_and_bias :1;
4381 } nir_lower_drawpixels_options;
4382
4383 void nir_lower_drawpixels(nir_shader *shader,
4384 const nir_lower_drawpixels_options *options);
4385
4386 typedef struct nir_lower_bitmap_options {
4387 unsigned sampler;
4388 bool swizzle_xxxx;
4389 } nir_lower_bitmap_options;
4390
4391 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4392
4393 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4394
4395 typedef enum {
4396 nir_lower_int_source_mods = 1 << 0,
4397 nir_lower_float_source_mods = 1 << 1,
4398 nir_lower_triop_abs = 1 << 2,
4399 nir_lower_all_source_mods = (1 << 3) - 1
4400 } nir_lower_to_source_mods_flags;
4401
4402
4403 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4404
4405 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4406
4407 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4408
4409 bool nir_lower_bit_size(nir_shader *shader,
4410 nir_lower_bit_size_callback callback,
4411 void *callback_data);
4412
4413 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4414 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4415
4416 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4417 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4418 nir_lower_doubles_options options);
4419 bool nir_lower_pack(nir_shader *shader);
4420
4421 void nir_lower_mediump_outputs(nir_shader *nir);
4422
4423 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4424
4425 typedef enum {
4426 nir_lower_interpolation_at_sample = (1 << 1),
4427 nir_lower_interpolation_at_offset = (1 << 2),
4428 nir_lower_interpolation_centroid = (1 << 3),
4429 nir_lower_interpolation_pixel = (1 << 4),
4430 nir_lower_interpolation_sample = (1 << 5),
4431 } nir_lower_interpolation_options;
4432
4433 bool nir_lower_interpolation(nir_shader *shader,
4434 nir_lower_interpolation_options options);
4435
4436 bool nir_lower_discard_to_demote(nir_shader *shader);
4437
4438 bool nir_normalize_cubemap_coords(nir_shader *shader);
4439
4440 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4441
4442 void nir_loop_analyze_impl(nir_function_impl *impl,
4443 nir_variable_mode indirect_mask);
4444
4445 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4446
4447 bool nir_repair_ssa_impl(nir_function_impl *impl);
4448 bool nir_repair_ssa(nir_shader *shader);
4449
4450 void nir_convert_loop_to_lcssa(nir_loop *loop);
4451 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4452 void nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4453
4454 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4455 * registers. If false, convert all values (even those not involved in a phi
4456 * node) to registers.
4457 */
4458 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4459
4460 bool nir_lower_phis_to_regs_block(nir_block *block);
4461 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4462 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4463
4464 bool nir_lower_samplers(nir_shader *shader);
4465 bool nir_lower_ssbo(nir_shader *shader);
4466
4467 /* This is here for unit tests. */
4468 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4469
4470 bool nir_opt_comparison_pre(nir_shader *shader);
4471
4472 bool nir_opt_access(nir_shader *shader);
4473 bool nir_opt_algebraic(nir_shader *shader);
4474 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4475 bool nir_opt_algebraic_late(nir_shader *shader);
4476 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4477 bool nir_opt_constant_folding(nir_shader *shader);
4478
4479 /* Try to combine a and b into a. Return true if combination was possible,
4480 * which will result in b being removed by the pass. Return false if
4481 * combination wasn't possible.
4482 */
4483 typedef bool (*nir_combine_memory_barrier_cb)(
4484 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4485
4486 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4487 nir_combine_memory_barrier_cb combine_cb,
4488 void *data);
4489
4490 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4491
4492 bool nir_copy_prop(nir_shader *shader);
4493
4494 bool nir_opt_copy_prop_vars(nir_shader *shader);
4495
4496 bool nir_opt_cse(nir_shader *shader);
4497
4498 bool nir_opt_dce(nir_shader *shader);
4499
4500 bool nir_opt_dead_cf(nir_shader *shader);
4501
4502 bool nir_opt_dead_write_vars(nir_shader *shader);
4503
4504 bool nir_opt_deref_impl(nir_function_impl *impl);
4505 bool nir_opt_deref(nir_shader *shader);
4506
4507 bool nir_opt_find_array_copies(nir_shader *shader);
4508
4509 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4510
4511 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4512
4513 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4514
4515 bool nir_opt_intrinsics(nir_shader *shader);
4516
4517 bool nir_opt_large_constants(nir_shader *shader,
4518 glsl_type_size_align_func size_align,
4519 unsigned threshold);
4520
4521 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4522
4523 typedef enum {
4524 nir_move_const_undef = (1 << 0),
4525 nir_move_load_ubo = (1 << 1),
4526 nir_move_load_input = (1 << 2),
4527 nir_move_comparisons = (1 << 3),
4528 nir_move_copies = (1 << 4),
4529 } nir_move_options;
4530
4531 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4532
4533 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4534
4535 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4536
4537 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4538 bool indirect_load_ok, bool expensive_alu_ok);
4539
4540 bool nir_opt_rematerialize_compares(nir_shader *shader);
4541
4542 bool nir_opt_remove_phis(nir_shader *shader);
4543 bool nir_opt_remove_phis_block(nir_block *block);
4544
4545 bool nir_opt_shrink_load(nir_shader *shader);
4546
4547 bool nir_opt_trivial_continues(nir_shader *shader);
4548
4549 bool nir_opt_undef(nir_shader *shader);
4550
4551 bool nir_opt_vectorize(nir_shader *shader);
4552
4553 bool nir_opt_conditional_discard(nir_shader *shader);
4554
4555 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4556 unsigned num_components, unsigned high_offset,
4557 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4558
4559 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4560 nir_should_vectorize_mem_func callback,
4561 nir_variable_mode robust_modes);
4562
4563 void nir_schedule(nir_shader *shader, int threshold);
4564
4565 void nir_strip(nir_shader *shader);
4566
4567 void nir_sweep(nir_shader *shader);
4568
4569 void nir_remap_dual_slot_attributes(nir_shader *shader,
4570 uint64_t *dual_slot_inputs);
4571 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4572
4573 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4574 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4575
4576 static inline bool
4577 nir_variable_is_in_ubo(const nir_variable *var)
4578 {
4579 return (var->data.mode == nir_var_mem_ubo &&
4580 var->interface_type != NULL);
4581 }
4582
4583 static inline bool
4584 nir_variable_is_in_ssbo(const nir_variable *var)
4585 {
4586 return (var->data.mode == nir_var_mem_ssbo &&
4587 var->interface_type != NULL);
4588 }
4589
4590 static inline bool
4591 nir_variable_is_in_block(const nir_variable *var)
4592 {
4593 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4594 }
4595
4596 #ifdef __cplusplus
4597 } /* extern "C" */
4598 #endif
4599
4600 #endif /* NIR_H */