nir/algebraic: don't undo lowering of 8/16-bit comparisons to 32-bit
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #include <stdio.h>
45
46 #ifndef NDEBUG
47 #include "util/debug.h"
48 #endif /* NDEBUG */
49
50 #include "nir_opcodes.h"
51
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
54 #endif
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define NIR_FALSE 0u
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t;
66
67 static inline bool
68 nir_num_components_valid(unsigned num_components)
69 {
70 return (num_components >= 1 &&
71 num_components <= 4) ||
72 num_components == 8 ||
73 num_components == 16;
74 }
75
76 /** Defines a cast function
77 *
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
80 *
81 * Note that you have to be a bit careful as the generated cast function
82 * destroys constness.
83 */
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
88 { \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
91 }
92
93 struct nir_function;
94 struct nir_shader;
95 struct nir_instr;
96 struct nir_builder;
97
98
99 /**
100 * Description of built-in state associated with a uniform
101 *
102 * \sa nir_variable::state_slots
103 */
104 typedef struct {
105 gl_state_index16 tokens[STATE_LENGTH];
106 uint16_t swizzle;
107 } nir_state_slot;
108
109 typedef enum {
110 nir_var_shader_in = (1 << 0),
111 nir_var_shader_out = (1 << 1),
112 nir_var_shader_temp = (1 << 2),
113 nir_var_function_temp = (1 << 3),
114 nir_var_uniform = (1 << 4),
115 nir_var_mem_ubo = (1 << 5),
116 nir_var_system_value = (1 << 6),
117 nir_var_mem_ssbo = (1 << 7),
118 nir_var_mem_shared = (1 << 8),
119 nir_var_mem_global = (1 << 9),
120 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes = 11,
122 nir_var_all = (1 << nir_num_variable_modes) - 1,
123 } nir_variable_mode;
124
125 /**
126 * Rounding modes.
127 */
128 typedef enum {
129 nir_rounding_mode_undef = 0,
130 nir_rounding_mode_rtne = 1, /* round to nearest even */
131 nir_rounding_mode_ru = 2, /* round up */
132 nir_rounding_mode_rd = 3, /* round down */
133 nir_rounding_mode_rtz = 4, /* round towards zero */
134 } nir_rounding_mode;
135
136 typedef union {
137 bool b;
138 float f32;
139 double f64;
140 int8_t i8;
141 uint8_t u8;
142 int16_t i16;
143 uint16_t u16;
144 int32_t i32;
145 uint32_t u32;
146 int64_t i64;
147 uint64_t u64;
148 } nir_const_value;
149
150 #define nir_const_value_to_array(arr, c, components, m) \
151 { \
152 for (unsigned i = 0; i < components; ++i) \
153 arr[i] = c[i].m; \
154 } while (false)
155
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
158 {
159 nir_const_value v;
160 memset(&v, 0, sizeof(v));
161
162 switch (bit_size) {
163 case 1: v.b = x; break;
164 case 8: v.u8 = x; break;
165 case 16: v.u16 = x; break;
166 case 32: v.u32 = x; break;
167 case 64: v.u64 = x; break;
168 default:
169 unreachable("Invalid bit size");
170 }
171
172 return v;
173 }
174
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i, unsigned bit_size)
177 {
178 nir_const_value v;
179 memset(&v, 0, sizeof(v));
180
181 assert(bit_size <= 64);
182 if (bit_size < 64) {
183 assert(i >= (-(1ll << (bit_size - 1))));
184 assert(i < (1ll << (bit_size - 1)));
185 }
186
187 return nir_const_value_for_raw_uint(i, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
192 {
193 nir_const_value v;
194 memset(&v, 0, sizeof(v));
195
196 assert(bit_size <= 64);
197 if (bit_size < 64)
198 assert(u < (1ull << bit_size));
199
200 return nir_const_value_for_raw_uint(u, bit_size);
201 }
202
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b, unsigned bit_size)
205 {
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b, bit_size);
208 }
209
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
212
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
215 {
216 switch (bit_size) {
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value.b;
219 case 8: return value.i8;
220 case 16: return value.i16;
221 case 32: return value.i32;
222 case 64: return value.i64;
223 default:
224 unreachable("Invalid bit size");
225 }
226 }
227
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
230 {
231 switch (bit_size) {
232 case 1: return value.b;
233 case 8: return value.u8;
234 case 16: return value.u16;
235 case 32: return value.u32;
236 case 64: return value.u64;
237 default:
238 unreachable("Invalid bit size");
239 }
240 }
241
242 static inline bool
243 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
244 {
245 int64_t i = nir_const_value_as_int(value, bit_size);
246
247 /* Booleans of any size use 0/-1 convention */
248 assert(i == 0 || i == -1);
249
250 return i;
251 }
252
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
255
256 typedef struct nir_constant {
257 /**
258 * Value of the constant.
259 *
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
263 */
264 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
265
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
268 */
269 unsigned num_elements;
270
271 /* Array elements / Structure Fields */
272 struct nir_constant **elements;
273 } nir_constant;
274
275 /**
276 * \brief Layout qualifiers for gl_FragDepth.
277 *
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
280 */
281 typedef enum {
282 nir_depth_layout_none, /**< No depth layout is specified. */
283 nir_depth_layout_any,
284 nir_depth_layout_greater,
285 nir_depth_layout_less,
286 nir_depth_layout_unchanged
287 } nir_depth_layout;
288
289 /**
290 * Enum keeping track of how a variable was declared.
291 */
292 typedef enum {
293 /**
294 * Normal declaration.
295 */
296 nir_var_declared_normally = 0,
297
298 /**
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
301 */
302 nir_var_hidden,
303 } nir_var_declaration_type;
304
305 /**
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
308 */
309
310 typedef struct nir_variable {
311 struct exec_node node;
312
313 /**
314 * Declared type of the variable
315 */
316 const struct glsl_type *type;
317
318 /**
319 * Declared name of the variable
320 */
321 char *name;
322
323 struct nir_variable_data {
324 /**
325 * Storage class of the variable.
326 *
327 * \sa nir_variable_mode
328 */
329 nir_variable_mode mode:11;
330
331 /**
332 * Is the variable read-only?
333 *
334 * This is set for variables declared as \c const, shader inputs,
335 * and uniforms.
336 */
337 unsigned read_only:1;
338 unsigned centroid:1;
339 unsigned sample:1;
340 unsigned patch:1;
341 unsigned invariant:1;
342
343 /**
344 * Precision qualifier.
345 *
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
348 *
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
353 */
354 unsigned precision:2;
355
356 /**
357 * Can this variable be coalesced with another?
358 *
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
364 */
365 unsigned cannot_coalesce:1;
366
367 /**
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
371 *
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
374 */
375 unsigned always_active_io:1;
376
377 /**
378 * Interpolation mode for shader inputs / outputs
379 *
380 * \sa glsl_interp_mode
381 */
382 unsigned interpolation:3;
383
384 /**
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
390 */
391 unsigned location_frac:2;
392
393 /**
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
397 */
398 unsigned compact:1;
399
400 /**
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
404 */
405 unsigned fb_fetch_output:1;
406
407 /**
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
410 */
411 unsigned bindless:1;
412
413 /**
414 * Was an explicit binding set in the shader?
415 */
416 unsigned explicit_binding:1;
417
418 /**
419 * Was the location explicitly set in the shader?
420 *
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
423 * no effect).
424 */
425 unsigned explicit_location:1;
426
427 /**
428 * Was a transfer feedback buffer set in the shader?
429 */
430 unsigned explicit_xfb_buffer:1;
431
432 /**
433 * Was a transfer feedback stride set in the shader?
434 */
435 unsigned explicit_xfb_stride:1;
436
437 /**
438 * Was an explicit offset set in the shader?
439 */
440 unsigned explicit_offset:1;
441
442 /**
443 * Layout of the matrix. Uses glsl_matrix_layout values.
444 */
445 unsigned matrix_layout:2;
446
447 /**
448 * Non-zero if this variable was created by lowering a named interface
449 * block.
450 */
451 unsigned from_named_ifc_block:1;
452
453 /**
454 * How the variable was declared. See nir_var_declaration_type.
455 *
456 * This is used to detect variables generated by the compiler, so should
457 * not be visible via the API.
458 */
459 unsigned how_declared:2;
460
461 /**
462 * Is this variable per-view? If so, we know it must be an array with
463 * size corresponding to the number of views.
464 */
465 unsigned per_view:1;
466
467 /**
468 * \brief Layout qualifier for gl_FragDepth.
469 *
470 * This is not equal to \c ir_depth_layout_none if and only if this
471 * variable is \c gl_FragDepth and a layout qualifier is specified.
472 */
473 nir_depth_layout depth_layout:3;
474
475 /**
476 * Vertex stream output identifier.
477 *
478 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
479 * indicate the stream of the i-th component.
480 */
481 unsigned stream:9;
482
483 /**
484 * Access flags for memory variables (SSBO/global), image uniforms, and
485 * bindless images in uniforms/inputs/outputs.
486 */
487 enum gl_access_qualifier access:8;
488
489 /**
490 * Descriptor set binding for sampler or UBO.
491 */
492 unsigned descriptor_set:5;
493
494 /**
495 * output index for dual source blending.
496 */
497 unsigned index;
498
499 /**
500 * Initial binding point for a sampler or UBO.
501 *
502 * For array types, this represents the binding point for the first element.
503 */
504 unsigned binding;
505
506 /**
507 * Storage location of the base of this variable
508 *
509 * The precise meaning of this field depends on the nature of the variable.
510 *
511 * - Vertex shader input: one of the values from \c gl_vert_attrib.
512 * - Vertex shader output: one of the values from \c gl_varying_slot.
513 * - Geometry shader input: one of the values from \c gl_varying_slot.
514 * - Geometry shader output: one of the values from \c gl_varying_slot.
515 * - Fragment shader input: one of the values from \c gl_varying_slot.
516 * - Fragment shader output: one of the values from \c gl_frag_result.
517 * - Uniforms: Per-stage uniform slot number for default uniform block.
518 * - Uniforms: Index within the uniform block definition for UBO members.
519 * - Non-UBO Uniforms: uniform slot number.
520 * - Other: This field is not currently used.
521 *
522 * If the variable is a uniform, shader input, or shader output, and the
523 * slot has not been assigned, the value will be -1.
524 */
525 int location;
526
527 /**
528 * The actual location of the variable in the IR. Only valid for inputs,
529 * outputs, and uniforms (including samplers and images).
530 */
531 unsigned driver_location;
532
533 /**
534 * Location an atomic counter or transform feedback is stored at.
535 */
536 unsigned offset;
537
538 union {
539 struct {
540 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
541 enum pipe_format format;
542 } image;
543
544 struct {
545 /**
546 * Transform feedback buffer.
547 */
548 uint16_t buffer:2;
549
550 /**
551 * Transform feedback stride.
552 */
553 uint16_t stride;
554 } xfb;
555 };
556 } data;
557
558 /**
559 * Identifier for this variable generated by nir_index_vars() that is unique
560 * among other variables in the same exec_list.
561 */
562 unsigned index;
563
564 /* Number of nir_variable_data members */
565 uint16_t num_members;
566
567 /**
568 * Built-in state that backs this uniform
569 *
570 * Once set at variable creation, \c state_slots must remain invariant.
571 * This is because, ideally, this array would be shared by all clones of
572 * this variable in the IR tree. In other words, we'd really like for it
573 * to be a fly-weight.
574 *
575 * If the variable is not a uniform, \c num_state_slots will be zero and
576 * \c state_slots will be \c NULL.
577 */
578 /*@{*/
579 uint16_t num_state_slots; /**< Number of state slots used */
580 nir_state_slot *state_slots; /**< State descriptors. */
581 /*@}*/
582
583 /**
584 * Constant expression assigned in the initializer of the variable
585 *
586 * This field should only be used temporarily by creators of NIR shaders
587 * and then lower_constant_initializers can be used to get rid of them.
588 * Most of the rest of NIR ignores this field or asserts that it's NULL.
589 */
590 nir_constant *constant_initializer;
591
592 /**
593 * Global variable assigned in the initializer of the variable
594 * This field should only be used temporarily by creators of NIR shaders
595 * and then lower_constant_initializers can be used to get rid of them.
596 * Most of the rest of NIR ignores this field or asserts that it's NULL.
597 */
598 struct nir_variable *pointer_initializer;
599
600 /**
601 * For variables that are in an interface block or are an instance of an
602 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
603 *
604 * \sa ir_variable::location
605 */
606 const struct glsl_type *interface_type;
607
608 /**
609 * Description of per-member data for per-member struct variables
610 *
611 * This is used for variables which are actually an amalgamation of
612 * multiple entities such as a struct of built-in values or a struct of
613 * inputs each with their own layout specifier. This is only allowed on
614 * variables with a struct or array of array of struct type.
615 */
616 struct nir_variable_data *members;
617 } nir_variable;
618
619 #define nir_foreach_variable(var, var_list) \
620 foreach_list_typed(nir_variable, var, node, var_list)
621
622 #define nir_foreach_variable_safe(var, var_list) \
623 foreach_list_typed_safe(nir_variable, var, node, var_list)
624
625 static inline bool
626 nir_variable_is_global(const nir_variable *var)
627 {
628 return var->data.mode != nir_var_function_temp;
629 }
630
631 typedef struct nir_register {
632 struct exec_node node;
633
634 unsigned num_components; /** < number of vector components */
635 unsigned num_array_elems; /** < size of array (0 for no array) */
636
637 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
638 uint8_t bit_size;
639
640 /** generic register index. */
641 unsigned index;
642
643 /** only for debug purposes, can be NULL */
644 const char *name;
645
646 /** set of nir_srcs where this register is used (read from) */
647 struct list_head uses;
648
649 /** set of nir_dests where this register is defined (written to) */
650 struct list_head defs;
651
652 /** set of nir_ifs where this register is used as a condition */
653 struct list_head if_uses;
654 } nir_register;
655
656 #define nir_foreach_register(reg, reg_list) \
657 foreach_list_typed(nir_register, reg, node, reg_list)
658 #define nir_foreach_register_safe(reg, reg_list) \
659 foreach_list_typed_safe(nir_register, reg, node, reg_list)
660
661 typedef enum PACKED {
662 nir_instr_type_alu,
663 nir_instr_type_deref,
664 nir_instr_type_call,
665 nir_instr_type_tex,
666 nir_instr_type_intrinsic,
667 nir_instr_type_load_const,
668 nir_instr_type_jump,
669 nir_instr_type_ssa_undef,
670 nir_instr_type_phi,
671 nir_instr_type_parallel_copy,
672 } nir_instr_type;
673
674 typedef struct nir_instr {
675 struct exec_node node;
676 struct nir_block *block;
677 nir_instr_type type;
678
679 /* A temporary for optimization and analysis passes to use for storing
680 * flags. For instance, DCE uses this to store the "dead/live" info.
681 */
682 uint8_t pass_flags;
683
684 /** generic instruction index. */
685 unsigned index;
686 } nir_instr;
687
688 static inline nir_instr *
689 nir_instr_next(nir_instr *instr)
690 {
691 struct exec_node *next = exec_node_get_next(&instr->node);
692 if (exec_node_is_tail_sentinel(next))
693 return NULL;
694 else
695 return exec_node_data(nir_instr, next, node);
696 }
697
698 static inline nir_instr *
699 nir_instr_prev(nir_instr *instr)
700 {
701 struct exec_node *prev = exec_node_get_prev(&instr->node);
702 if (exec_node_is_head_sentinel(prev))
703 return NULL;
704 else
705 return exec_node_data(nir_instr, prev, node);
706 }
707
708 static inline bool
709 nir_instr_is_first(const nir_instr *instr)
710 {
711 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
712 }
713
714 static inline bool
715 nir_instr_is_last(const nir_instr *instr)
716 {
717 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
718 }
719
720 typedef struct nir_ssa_def {
721 /** for debugging only, can be NULL */
722 const char* name;
723
724 /** generic SSA definition index. */
725 unsigned index;
726
727 /** Index into the live_in and live_out bitfields */
728 unsigned live_index;
729
730 /** Instruction which produces this SSA value. */
731 nir_instr *parent_instr;
732
733 /** set of nir_instrs where this register is used (read from) */
734 struct list_head uses;
735
736 /** set of nir_ifs where this register is used as a condition */
737 struct list_head if_uses;
738
739 uint8_t num_components;
740
741 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
742 uint8_t bit_size;
743 } nir_ssa_def;
744
745 struct nir_src;
746
747 typedef struct {
748 nir_register *reg;
749 struct nir_src *indirect; /** < NULL for no indirect offset */
750 unsigned base_offset;
751
752 /* TODO use-def chain goes here */
753 } nir_reg_src;
754
755 typedef struct {
756 nir_instr *parent_instr;
757 struct list_head def_link;
758
759 nir_register *reg;
760 struct nir_src *indirect; /** < NULL for no indirect offset */
761 unsigned base_offset;
762
763 /* TODO def-use chain goes here */
764 } nir_reg_dest;
765
766 struct nir_if;
767
768 typedef struct nir_src {
769 union {
770 /** Instruction that consumes this value as a source. */
771 nir_instr *parent_instr;
772 struct nir_if *parent_if;
773 };
774
775 struct list_head use_link;
776
777 union {
778 nir_reg_src reg;
779 nir_ssa_def *ssa;
780 };
781
782 bool is_ssa;
783 } nir_src;
784
785 static inline nir_src
786 nir_src_init(void)
787 {
788 nir_src src = { { NULL } };
789 return src;
790 }
791
792 #define NIR_SRC_INIT nir_src_init()
793
794 #define nir_foreach_use(src, reg_or_ssa_def) \
795 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
796
797 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
798 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
799
800 #define nir_foreach_if_use(src, reg_or_ssa_def) \
801 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
802
803 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
804 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
805
806 typedef struct {
807 union {
808 nir_reg_dest reg;
809 nir_ssa_def ssa;
810 };
811
812 bool is_ssa;
813 } nir_dest;
814
815 static inline nir_dest
816 nir_dest_init(void)
817 {
818 nir_dest dest = { { { NULL } } };
819 return dest;
820 }
821
822 #define NIR_DEST_INIT nir_dest_init()
823
824 #define nir_foreach_def(dest, reg) \
825 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
826
827 #define nir_foreach_def_safe(dest, reg) \
828 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
829
830 static inline nir_src
831 nir_src_for_ssa(nir_ssa_def *def)
832 {
833 nir_src src = NIR_SRC_INIT;
834
835 src.is_ssa = true;
836 src.ssa = def;
837
838 return src;
839 }
840
841 static inline nir_src
842 nir_src_for_reg(nir_register *reg)
843 {
844 nir_src src = NIR_SRC_INIT;
845
846 src.is_ssa = false;
847 src.reg.reg = reg;
848 src.reg.indirect = NULL;
849 src.reg.base_offset = 0;
850
851 return src;
852 }
853
854 static inline nir_dest
855 nir_dest_for_reg(nir_register *reg)
856 {
857 nir_dest dest = NIR_DEST_INIT;
858
859 dest.reg.reg = reg;
860
861 return dest;
862 }
863
864 static inline unsigned
865 nir_src_bit_size(nir_src src)
866 {
867 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
868 }
869
870 static inline unsigned
871 nir_src_num_components(nir_src src)
872 {
873 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
874 }
875
876 static inline bool
877 nir_src_is_const(nir_src src)
878 {
879 return src.is_ssa &&
880 src.ssa->parent_instr->type == nir_instr_type_load_const;
881 }
882
883 static inline unsigned
884 nir_dest_bit_size(nir_dest dest)
885 {
886 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
887 }
888
889 static inline unsigned
890 nir_dest_num_components(nir_dest dest)
891 {
892 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
893 }
894
895 /* Are all components the same, ie. .xxxx */
896 static inline bool
897 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
898 {
899 for (unsigned i = 1; i < nr_comp; i++)
900 if (swiz[i] != swiz[0])
901 return false;
902 return true;
903 }
904
905 /* Are all components sequential, ie. .yzw */
906 static inline bool
907 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
908 {
909 for (unsigned i = 1; i < nr_comp; i++)
910 if (swiz[i] != (swiz[0] + i))
911 return false;
912 return true;
913 }
914
915 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
916 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
917
918 typedef struct {
919 nir_src src;
920
921 /**
922 * \name input modifiers
923 */
924 /*@{*/
925 /**
926 * For inputs interpreted as floating point, flips the sign bit. For
927 * inputs interpreted as integers, performs the two's complement negation.
928 */
929 bool negate;
930
931 /**
932 * Clears the sign bit for floating point values, and computes the integer
933 * absolute value for integers. Note that the negate modifier acts after
934 * the absolute value modifier, therefore if both are set then all inputs
935 * will become negative.
936 */
937 bool abs;
938 /*@}*/
939
940 /**
941 * For each input component, says which component of the register it is
942 * chosen from. Note that which elements of the swizzle are used and which
943 * are ignored are based on the write mask for most opcodes - for example,
944 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
945 * a swizzle of {2, x, 1, 0} where x means "don't care."
946 */
947 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
948 } nir_alu_src;
949
950 typedef struct {
951 nir_dest dest;
952
953 /**
954 * \name saturate output modifier
955 *
956 * Only valid for opcodes that output floating-point numbers. Clamps the
957 * output to between 0.0 and 1.0 inclusive.
958 */
959
960 bool saturate;
961
962 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
963 } nir_alu_dest;
964
965 /** NIR sized and unsized types
966 *
967 * The values in this enum are carefully chosen so that the sized type is
968 * just the unsized type OR the number of bits.
969 */
970 typedef enum {
971 nir_type_invalid = 0, /* Not a valid type */
972 nir_type_int = 2,
973 nir_type_uint = 4,
974 nir_type_bool = 6,
975 nir_type_float = 128,
976 nir_type_bool1 = 1 | nir_type_bool,
977 nir_type_bool8 = 8 | nir_type_bool,
978 nir_type_bool16 = 16 | nir_type_bool,
979 nir_type_bool32 = 32 | nir_type_bool,
980 nir_type_int1 = 1 | nir_type_int,
981 nir_type_int8 = 8 | nir_type_int,
982 nir_type_int16 = 16 | nir_type_int,
983 nir_type_int32 = 32 | nir_type_int,
984 nir_type_int64 = 64 | nir_type_int,
985 nir_type_uint1 = 1 | nir_type_uint,
986 nir_type_uint8 = 8 | nir_type_uint,
987 nir_type_uint16 = 16 | nir_type_uint,
988 nir_type_uint32 = 32 | nir_type_uint,
989 nir_type_uint64 = 64 | nir_type_uint,
990 nir_type_float16 = 16 | nir_type_float,
991 nir_type_float32 = 32 | nir_type_float,
992 nir_type_float64 = 64 | nir_type_float,
993 } nir_alu_type;
994
995 #define NIR_ALU_TYPE_SIZE_MASK 0x79
996 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
997
998 static inline unsigned
999 nir_alu_type_get_type_size(nir_alu_type type)
1000 {
1001 return type & NIR_ALU_TYPE_SIZE_MASK;
1002 }
1003
1004 static inline unsigned
1005 nir_alu_type_get_base_type(nir_alu_type type)
1006 {
1007 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
1008 }
1009
1010 static inline nir_alu_type
1011 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1012 {
1013 switch (base_type) {
1014 case GLSL_TYPE_BOOL:
1015 return nir_type_bool1;
1016 break;
1017 case GLSL_TYPE_UINT:
1018 return nir_type_uint32;
1019 break;
1020 case GLSL_TYPE_INT:
1021 return nir_type_int32;
1022 break;
1023 case GLSL_TYPE_UINT16:
1024 return nir_type_uint16;
1025 break;
1026 case GLSL_TYPE_INT16:
1027 return nir_type_int16;
1028 break;
1029 case GLSL_TYPE_UINT8:
1030 return nir_type_uint8;
1031 case GLSL_TYPE_INT8:
1032 return nir_type_int8;
1033 case GLSL_TYPE_UINT64:
1034 return nir_type_uint64;
1035 break;
1036 case GLSL_TYPE_INT64:
1037 return nir_type_int64;
1038 break;
1039 case GLSL_TYPE_FLOAT:
1040 return nir_type_float32;
1041 break;
1042 case GLSL_TYPE_FLOAT16:
1043 return nir_type_float16;
1044 break;
1045 case GLSL_TYPE_DOUBLE:
1046 return nir_type_float64;
1047 break;
1048
1049 case GLSL_TYPE_SAMPLER:
1050 case GLSL_TYPE_IMAGE:
1051 case GLSL_TYPE_ATOMIC_UINT:
1052 case GLSL_TYPE_STRUCT:
1053 case GLSL_TYPE_INTERFACE:
1054 case GLSL_TYPE_ARRAY:
1055 case GLSL_TYPE_VOID:
1056 case GLSL_TYPE_SUBROUTINE:
1057 case GLSL_TYPE_FUNCTION:
1058 case GLSL_TYPE_ERROR:
1059 return nir_type_invalid;
1060 }
1061
1062 unreachable("unknown type");
1063 }
1064
1065 static inline nir_alu_type
1066 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1067 {
1068 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1069 }
1070
1071 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1072 nir_rounding_mode rnd);
1073
1074 static inline nir_op
1075 nir_op_vec(unsigned components)
1076 {
1077 switch (components) {
1078 case 1: return nir_op_mov;
1079 case 2: return nir_op_vec2;
1080 case 3: return nir_op_vec3;
1081 case 4: return nir_op_vec4;
1082 case 8: return nir_op_vec8;
1083 case 16: return nir_op_vec16;
1084 default: unreachable("bad component count");
1085 }
1086 }
1087
1088 static inline bool
1089 nir_op_is_vec(nir_op op)
1090 {
1091 switch (op) {
1092 case nir_op_mov:
1093 case nir_op_vec2:
1094 case nir_op_vec3:
1095 case nir_op_vec4:
1096 case nir_op_vec8:
1097 case nir_op_vec16:
1098 return true;
1099 default:
1100 return false;
1101 }
1102 }
1103
1104 static inline bool
1105 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1106 {
1107 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1108 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1109 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1110 }
1111
1112 static inline bool
1113 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1114 {
1115 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1116 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1117 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1118 }
1119
1120 static inline bool
1121 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1122 {
1123 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1124 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1125 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1126 }
1127
1128 static inline bool
1129 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1130 {
1131 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1132 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1133 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1134 }
1135
1136 static inline bool
1137 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1138 {
1139 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1140 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1141 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1142 }
1143
1144 static inline bool
1145 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1146 {
1147 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1148 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1149 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1150 }
1151
1152 static inline bool
1153 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1154 {
1155 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1156 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1157 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1158 }
1159
1160 static inline nir_rounding_mode
1161 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1162 nir_alu_type type)
1163 {
1164 if (nir_alu_type_get_base_type(type) != nir_type_float)
1165 return nir_rounding_mode_undef;
1166
1167 unsigned bit_size = nir_alu_type_get_type_size(type);
1168
1169 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1170 return nir_rounding_mode_rtz;
1171 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1172 return nir_rounding_mode_rtne;
1173 return nir_rounding_mode_undef;
1174 }
1175
1176 static inline bool
1177 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1178 {
1179 bool result =
1180 nir_has_any_rounding_mode_rtne(execution_mode) ||
1181 nir_has_any_rounding_mode_rtz(execution_mode);
1182 return result;
1183 }
1184
1185 typedef enum {
1186 /**
1187 * Operation where the first two sources are commutative.
1188 *
1189 * For 2-source operations, this just mathematical commutativity. Some
1190 * 3-source operations, like ffma, are only commutative in the first two
1191 * sources.
1192 */
1193 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1194 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1195 } nir_op_algebraic_property;
1196
1197 typedef struct {
1198 const char *name;
1199
1200 unsigned num_inputs;
1201
1202 /**
1203 * The number of components in the output
1204 *
1205 * If non-zero, this is the size of the output and input sizes are
1206 * explicitly given; swizzle and writemask are still in effect, but if
1207 * the output component is masked out, then the input component may
1208 * still be in use.
1209 *
1210 * If zero, the opcode acts in the standard, per-component manner; the
1211 * operation is performed on each component (except the ones that are
1212 * masked out) with the input being taken from the input swizzle for
1213 * that component.
1214 *
1215 * The size of some of the inputs may be given (i.e. non-zero) even
1216 * though output_size is zero; in that case, the inputs with a zero
1217 * size act per-component, while the inputs with non-zero size don't.
1218 */
1219 unsigned output_size;
1220
1221 /**
1222 * The type of vector that the instruction outputs. Note that the
1223 * staurate modifier is only allowed on outputs with the float type.
1224 */
1225
1226 nir_alu_type output_type;
1227
1228 /**
1229 * The number of components in each input
1230 */
1231 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1232
1233 /**
1234 * The type of vector that each input takes. Note that negate and
1235 * absolute value are only allowed on inputs with int or float type and
1236 * behave differently on the two.
1237 */
1238 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1239
1240 nir_op_algebraic_property algebraic_properties;
1241
1242 /* Whether this represents a numeric conversion opcode */
1243 bool is_conversion;
1244 } nir_op_info;
1245
1246 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1247
1248 typedef struct nir_alu_instr {
1249 nir_instr instr;
1250 nir_op op;
1251
1252 /** Indicates that this ALU instruction generates an exact value
1253 *
1254 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1255 * really equivalent to either. This indicates that the value generated by
1256 * this operation is high-precision and any code transformations that touch
1257 * it must ensure that the resulting value is bit-for-bit identical to the
1258 * original.
1259 */
1260 bool exact:1;
1261
1262 /**
1263 * Indicates that this instruction do not cause wrapping to occur, in the
1264 * form of overflow or underflow.
1265 */
1266 bool no_signed_wrap:1;
1267 bool no_unsigned_wrap:1;
1268
1269 nir_alu_dest dest;
1270 nir_alu_src src[];
1271 } nir_alu_instr;
1272
1273 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1274 nir_alu_instr *instr);
1275 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1276 nir_alu_instr *instr);
1277
1278 /* is this source channel used? */
1279 static inline bool
1280 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1281 unsigned channel)
1282 {
1283 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1284 return channel < nir_op_infos[instr->op].input_sizes[src];
1285
1286 return (instr->dest.write_mask >> channel) & 1;
1287 }
1288
1289 static inline nir_component_mask_t
1290 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1291 {
1292 nir_component_mask_t read_mask = 0;
1293 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1294 if (!nir_alu_instr_channel_used(instr, src, c))
1295 continue;
1296
1297 read_mask |= (1 << instr->src[src].swizzle[c]);
1298 }
1299 return read_mask;
1300 }
1301
1302 /**
1303 * Get the number of channels used for a source
1304 */
1305 static inline unsigned
1306 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1307 {
1308 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1309 return nir_op_infos[instr->op].input_sizes[src];
1310
1311 return nir_dest_num_components(instr->dest.dest);
1312 }
1313
1314 static inline bool
1315 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1316 {
1317 switch (instr->op) {
1318 case nir_op_flt:
1319 case nir_op_fge:
1320 case nir_op_feq:
1321 case nir_op_fne:
1322 case nir_op_ilt:
1323 case nir_op_ult:
1324 case nir_op_ige:
1325 case nir_op_uge:
1326 case nir_op_ieq:
1327 case nir_op_ine:
1328 case nir_op_i2b1:
1329 case nir_op_f2b1:
1330 case nir_op_inot:
1331 return true;
1332 default:
1333 return false;
1334 }
1335 }
1336
1337 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1338 nir_alu_type full_type);
1339
1340 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1341 unsigned src1, unsigned src2);
1342
1343 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1344 const nir_alu_instr *alu2,
1345 unsigned src1, unsigned src2);
1346
1347 typedef enum {
1348 nir_deref_type_var,
1349 nir_deref_type_array,
1350 nir_deref_type_array_wildcard,
1351 nir_deref_type_ptr_as_array,
1352 nir_deref_type_struct,
1353 nir_deref_type_cast,
1354 } nir_deref_type;
1355
1356 typedef struct {
1357 nir_instr instr;
1358
1359 /** The type of this deref instruction */
1360 nir_deref_type deref_type;
1361
1362 /** The mode of the underlying variable */
1363 nir_variable_mode mode;
1364
1365 /** The dereferenced type of the resulting pointer value */
1366 const struct glsl_type *type;
1367
1368 union {
1369 /** Variable being dereferenced if deref_type is a deref_var */
1370 nir_variable *var;
1371
1372 /** Parent deref if deref_type is not deref_var */
1373 nir_src parent;
1374 };
1375
1376 /** Additional deref parameters */
1377 union {
1378 struct {
1379 nir_src index;
1380 } arr;
1381
1382 struct {
1383 unsigned index;
1384 } strct;
1385
1386 struct {
1387 unsigned ptr_stride;
1388 } cast;
1389 };
1390
1391 /** Destination to store the resulting "pointer" */
1392 nir_dest dest;
1393 } nir_deref_instr;
1394
1395 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1396
1397 static inline nir_deref_instr *
1398 nir_deref_instr_parent(const nir_deref_instr *instr)
1399 {
1400 if (instr->deref_type == nir_deref_type_var)
1401 return NULL;
1402 else
1403 return nir_src_as_deref(instr->parent);
1404 }
1405
1406 static inline nir_variable *
1407 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1408 {
1409 while (instr->deref_type != nir_deref_type_var) {
1410 if (instr->deref_type == nir_deref_type_cast)
1411 return NULL;
1412
1413 instr = nir_deref_instr_parent(instr);
1414 }
1415
1416 return instr->var;
1417 }
1418
1419 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1420 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1421 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1422
1423 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1424
1425 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1426
1427 typedef struct {
1428 nir_instr instr;
1429
1430 struct nir_function *callee;
1431
1432 unsigned num_params;
1433 nir_src params[];
1434 } nir_call_instr;
1435
1436 #include "nir_intrinsics.h"
1437
1438 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1439
1440 /** Represents an intrinsic
1441 *
1442 * An intrinsic is an instruction type for handling things that are
1443 * more-or-less regular operations but don't just consume and produce SSA
1444 * values like ALU operations do. Intrinsics are not for things that have
1445 * special semantic meaning such as phi nodes and parallel copies.
1446 * Examples of intrinsics include variable load/store operations, system
1447 * value loads, and the like. Even though texturing more-or-less falls
1448 * under this category, texturing is its own instruction type because
1449 * trying to represent texturing with intrinsics would lead to a
1450 * combinatorial explosion of intrinsic opcodes.
1451 *
1452 * By having a single instruction type for handling a lot of different
1453 * cases, optimization passes can look for intrinsics and, for the most
1454 * part, completely ignore them. Each intrinsic type also has a few
1455 * possible flags that govern whether or not they can be reordered or
1456 * eliminated. That way passes like dead code elimination can still work
1457 * on intrisics without understanding the meaning of each.
1458 *
1459 * Each intrinsic has some number of constant indices, some number of
1460 * variables, and some number of sources. What these sources, variables,
1461 * and indices mean depends on the intrinsic and is documented with the
1462 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1463 * instructions are the only types of instruction that can operate on
1464 * variables.
1465 */
1466 typedef struct {
1467 nir_instr instr;
1468
1469 nir_intrinsic_op intrinsic;
1470
1471 nir_dest dest;
1472
1473 /** number of components if this is a vectorized intrinsic
1474 *
1475 * Similarly to ALU operations, some intrinsics are vectorized.
1476 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1477 * For vectorized intrinsics, the num_components field specifies the
1478 * number of destination components and the number of source components
1479 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1480 */
1481 uint8_t num_components;
1482
1483 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1484
1485 nir_src src[];
1486 } nir_intrinsic_instr;
1487
1488 static inline nir_variable *
1489 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1490 {
1491 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1492 }
1493
1494 typedef enum {
1495 /* Memory ordering. */
1496 NIR_MEMORY_ACQUIRE = 1 << 0,
1497 NIR_MEMORY_RELEASE = 1 << 1,
1498 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1499
1500 /* Memory visibility operations. */
1501 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1502 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1503 } nir_memory_semantics;
1504
1505 typedef enum {
1506 NIR_SCOPE_INVOCATION,
1507 NIR_SCOPE_SUBGROUP,
1508 NIR_SCOPE_WORKGROUP,
1509 NIR_SCOPE_QUEUE_FAMILY,
1510 NIR_SCOPE_DEVICE,
1511 } nir_scope;
1512
1513 /**
1514 * \name NIR intrinsics semantic flags
1515 *
1516 * information about what the compiler can do with the intrinsics.
1517 *
1518 * \sa nir_intrinsic_info::flags
1519 */
1520 typedef enum {
1521 /**
1522 * whether the intrinsic can be safely eliminated if none of its output
1523 * value is not being used.
1524 */
1525 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1526
1527 /**
1528 * Whether the intrinsic can be reordered with respect to any other
1529 * intrinsic, i.e. whether the only reordering dependencies of the
1530 * intrinsic are due to the register reads/writes.
1531 */
1532 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1533 } nir_intrinsic_semantic_flag;
1534
1535 /**
1536 * \name NIR intrinsics const-index flag
1537 *
1538 * Indicates the usage of a const_index slot.
1539 *
1540 * \sa nir_intrinsic_info::index_map
1541 */
1542 typedef enum {
1543 /**
1544 * Generally instructions that take a offset src argument, can encode
1545 * a constant 'base' value which is added to the offset.
1546 */
1547 NIR_INTRINSIC_BASE = 1,
1548
1549 /**
1550 * For store instructions, a writemask for the store.
1551 */
1552 NIR_INTRINSIC_WRMASK,
1553
1554 /**
1555 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1556 */
1557 NIR_INTRINSIC_STREAM_ID,
1558
1559 /**
1560 * The clip-plane id for load_user_clip_plane intrinsic.
1561 */
1562 NIR_INTRINSIC_UCP_ID,
1563
1564 /**
1565 * The amount of data, starting from BASE, that this instruction may
1566 * access. This is used to provide bounds if the offset is not constant.
1567 */
1568 NIR_INTRINSIC_RANGE,
1569
1570 /**
1571 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1572 */
1573 NIR_INTRINSIC_DESC_SET,
1574
1575 /**
1576 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1577 */
1578 NIR_INTRINSIC_BINDING,
1579
1580 /**
1581 * Component offset.
1582 */
1583 NIR_INTRINSIC_COMPONENT,
1584
1585 /**
1586 * Interpolation mode (only meaningful for FS inputs).
1587 */
1588 NIR_INTRINSIC_INTERP_MODE,
1589
1590 /**
1591 * A binary nir_op to use when performing a reduction or scan operation
1592 */
1593 NIR_INTRINSIC_REDUCTION_OP,
1594
1595 /**
1596 * Cluster size for reduction operations
1597 */
1598 NIR_INTRINSIC_CLUSTER_SIZE,
1599
1600 /**
1601 * Parameter index for a load_param intrinsic
1602 */
1603 NIR_INTRINSIC_PARAM_IDX,
1604
1605 /**
1606 * Image dimensionality for image intrinsics
1607 *
1608 * One of GLSL_SAMPLER_DIM_*
1609 */
1610 NIR_INTRINSIC_IMAGE_DIM,
1611
1612 /**
1613 * Non-zero if we are accessing an array image
1614 */
1615 NIR_INTRINSIC_IMAGE_ARRAY,
1616
1617 /**
1618 * Image format for image intrinsics
1619 */
1620 NIR_INTRINSIC_FORMAT,
1621
1622 /**
1623 * Access qualifiers for image and memory access intrinsics
1624 */
1625 NIR_INTRINSIC_ACCESS,
1626
1627 /**
1628 * Alignment for offsets and addresses
1629 *
1630 * These two parameters, specify an alignment in terms of a multiplier and
1631 * an offset. The offset or address parameter X of the intrinsic is
1632 * guaranteed to satisfy the following:
1633 *
1634 * (X - align_offset) % align_mul == 0
1635 */
1636 NIR_INTRINSIC_ALIGN_MUL,
1637 NIR_INTRINSIC_ALIGN_OFFSET,
1638
1639 /**
1640 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1641 */
1642 NIR_INTRINSIC_DESC_TYPE,
1643
1644 /**
1645 * The nir_alu_type of a uniform/input/output
1646 */
1647 NIR_INTRINSIC_TYPE,
1648
1649 /**
1650 * The swizzle mask for the instructions
1651 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1652 */
1653 NIR_INTRINSIC_SWIZZLE_MASK,
1654
1655 /* Separate source/dest access flags for copies */
1656 NIR_INTRINSIC_SRC_ACCESS,
1657 NIR_INTRINSIC_DST_ACCESS,
1658
1659 /* Driver location for nir_load_patch_location_ir3 */
1660 NIR_INTRINSIC_DRIVER_LOCATION,
1661
1662 /**
1663 * Mask of nir_memory_semantics, includes ordering and visibility.
1664 */
1665 NIR_INTRINSIC_MEMORY_SEMANTICS,
1666
1667 /**
1668 * Mask of nir_variable_modes affected by the memory operation.
1669 */
1670 NIR_INTRINSIC_MEMORY_MODES,
1671
1672 /**
1673 * Value of nir_scope.
1674 */
1675 NIR_INTRINSIC_MEMORY_SCOPE,
1676
1677 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1678
1679 } nir_intrinsic_index_flag;
1680
1681 #define NIR_INTRINSIC_MAX_INPUTS 5
1682
1683 typedef struct {
1684 const char *name;
1685
1686 unsigned num_srcs; /** < number of register/SSA inputs */
1687
1688 /** number of components of each input register
1689 *
1690 * If this value is 0, the number of components is given by the
1691 * num_components field of nir_intrinsic_instr. If this value is -1, the
1692 * intrinsic consumes however many components are provided and it is not
1693 * validated at all.
1694 */
1695 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1696
1697 bool has_dest;
1698
1699 /** number of components of the output register
1700 *
1701 * If this value is 0, the number of components is given by the
1702 * num_components field of nir_intrinsic_instr.
1703 */
1704 unsigned dest_components;
1705
1706 /** bitfield of legal bit sizes */
1707 unsigned dest_bit_sizes;
1708
1709 /** the number of constant indices used by the intrinsic */
1710 unsigned num_indices;
1711
1712 /** indicates the usage of intr->const_index[n] */
1713 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1714
1715 /** semantic flags for calls to this intrinsic */
1716 nir_intrinsic_semantic_flag flags;
1717 } nir_intrinsic_info;
1718
1719 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1720
1721 static inline unsigned
1722 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1723 {
1724 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1725 assert(srcn < info->num_srcs);
1726 if (info->src_components[srcn] > 0)
1727 return info->src_components[srcn];
1728 else if (info->src_components[srcn] == 0)
1729 return intr->num_components;
1730 else
1731 return nir_src_num_components(intr->src[srcn]);
1732 }
1733
1734 static inline unsigned
1735 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1736 {
1737 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1738 if (!info->has_dest)
1739 return 0;
1740 else if (info->dest_components)
1741 return info->dest_components;
1742 else
1743 return intr->num_components;
1744 }
1745
1746 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1747 static inline type \
1748 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1749 { \
1750 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1751 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1752 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1753 } \
1754 static inline void \
1755 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1756 { \
1757 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1758 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1759 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1760 }
1761
1762 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1763 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1764 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1765 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1766 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1767 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1768 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1769 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1770 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1771 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1772 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1773 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1774 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1775 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1776 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1777 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1778 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1779 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1780 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1781 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1782 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1783 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1784 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1785 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1786 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1787 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1788 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1789
1790 static inline void
1791 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1792 unsigned align_mul, unsigned align_offset)
1793 {
1794 assert(util_is_power_of_two_nonzero(align_mul));
1795 assert(align_offset < align_mul);
1796 nir_intrinsic_set_align_mul(intrin, align_mul);
1797 nir_intrinsic_set_align_offset(intrin, align_offset);
1798 }
1799
1800 /** Returns a simple alignment for a load/store intrinsic offset
1801 *
1802 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1803 * and ALIGN_OFFSET parameters, this helper takes both into account and
1804 * provides a single simple alignment parameter. The offset X is guaranteed
1805 * to satisfy X % align == 0.
1806 */
1807 static inline unsigned
1808 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1809 {
1810 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1811 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1812 assert(align_offset < align_mul);
1813 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1814 }
1815
1816 unsigned
1817 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1818
1819 /* Converts a image_deref_* intrinsic into a image_* one */
1820 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1821 nir_ssa_def *handle, bool bindless);
1822
1823 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1824 static inline bool
1825 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1826 {
1827 if (instr->intrinsic == nir_intrinsic_load_deref ||
1828 instr->intrinsic == nir_intrinsic_load_ssbo ||
1829 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1830 instr->intrinsic == nir_intrinsic_image_deref_load ||
1831 instr->intrinsic == nir_intrinsic_image_load) {
1832 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1833 } else {
1834 const nir_intrinsic_info *info =
1835 &nir_intrinsic_infos[instr->intrinsic];
1836 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1837 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1838 }
1839 }
1840
1841 /**
1842 * \group texture information
1843 *
1844 * This gives semantic information about textures which is useful to the
1845 * frontend, the backend, and lowering passes, but not the optimizer.
1846 */
1847
1848 typedef enum {
1849 nir_tex_src_coord,
1850 nir_tex_src_projector,
1851 nir_tex_src_comparator, /* shadow comparator */
1852 nir_tex_src_offset,
1853 nir_tex_src_bias,
1854 nir_tex_src_lod,
1855 nir_tex_src_min_lod,
1856 nir_tex_src_ms_index, /* MSAA sample index */
1857 nir_tex_src_ms_mcs, /* MSAA compression value */
1858 nir_tex_src_ddx,
1859 nir_tex_src_ddy,
1860 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1861 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1862 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1863 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1864 nir_tex_src_texture_handle, /* < bindless texture handle */
1865 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1866 nir_tex_src_plane, /* < selects plane for planar textures */
1867 nir_num_tex_src_types
1868 } nir_tex_src_type;
1869
1870 typedef struct {
1871 nir_src src;
1872 nir_tex_src_type src_type;
1873 } nir_tex_src;
1874
1875 typedef enum {
1876 nir_texop_tex, /**< Regular texture look-up */
1877 nir_texop_txb, /**< Texture look-up with LOD bias */
1878 nir_texop_txl, /**< Texture look-up with explicit LOD */
1879 nir_texop_txd, /**< Texture look-up with partial derivatives */
1880 nir_texop_txf, /**< Texel fetch with explicit LOD */
1881 nir_texop_txf_ms, /**< Multisample texture fetch */
1882 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1883 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1884 nir_texop_txs, /**< Texture size */
1885 nir_texop_lod, /**< Texture lod query */
1886 nir_texop_tg4, /**< Texture gather */
1887 nir_texop_query_levels, /**< Texture levels query */
1888 nir_texop_texture_samples, /**< Texture samples query */
1889 nir_texop_samples_identical, /**< Query whether all samples are definitely
1890 * identical.
1891 */
1892 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1893 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1894 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1895 } nir_texop;
1896
1897 typedef struct {
1898 nir_instr instr;
1899
1900 enum glsl_sampler_dim sampler_dim;
1901 nir_alu_type dest_type;
1902
1903 nir_texop op;
1904 nir_dest dest;
1905 nir_tex_src *src;
1906 unsigned num_srcs, coord_components;
1907 bool is_array, is_shadow;
1908
1909 /**
1910 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1911 * components or the new-style shadow that outputs 1 component.
1912 */
1913 bool is_new_style_shadow;
1914
1915 /* gather component selector */
1916 unsigned component : 2;
1917
1918 /* gather offsets */
1919 int8_t tg4_offsets[4][2];
1920
1921 /* True if the texture index or handle is not dynamically uniform */
1922 bool texture_non_uniform;
1923
1924 /* True if the sampler index or handle is not dynamically uniform */
1925 bool sampler_non_uniform;
1926
1927 /** The texture index
1928 *
1929 * If this texture instruction has a nir_tex_src_texture_offset source,
1930 * then the texture index is given by texture_index + texture_offset.
1931 */
1932 unsigned texture_index;
1933
1934 /** The sampler index
1935 *
1936 * The following operations do not require a sampler and, as such, this
1937 * field should be ignored:
1938 * - nir_texop_txf
1939 * - nir_texop_txf_ms
1940 * - nir_texop_txs
1941 * - nir_texop_lod
1942 * - nir_texop_query_levels
1943 * - nir_texop_texture_samples
1944 * - nir_texop_samples_identical
1945 *
1946 * If this texture instruction has a nir_tex_src_sampler_offset source,
1947 * then the sampler index is given by sampler_index + sampler_offset.
1948 */
1949 unsigned sampler_index;
1950 } nir_tex_instr;
1951
1952 /*
1953 * Returns true if the texture operation requires a sampler as a general rule,
1954 * see the documentation of sampler_index.
1955 *
1956 * Note that the specific hw/driver backend could require to a sampler
1957 * object/configuration packet in any case, for some other reason.
1958 */
1959 static inline bool
1960 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
1961 {
1962 switch (instr->op) {
1963 case nir_texop_txf:
1964 case nir_texop_txf_ms:
1965 case nir_texop_txs:
1966 case nir_texop_lod:
1967 case nir_texop_query_levels:
1968 case nir_texop_texture_samples:
1969 case nir_texop_samples_identical:
1970 return false;
1971 default:
1972 return true;
1973 }
1974 }
1975
1976 static inline unsigned
1977 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1978 {
1979 switch (instr->op) {
1980 case nir_texop_txs: {
1981 unsigned ret;
1982 switch (instr->sampler_dim) {
1983 case GLSL_SAMPLER_DIM_1D:
1984 case GLSL_SAMPLER_DIM_BUF:
1985 ret = 1;
1986 break;
1987 case GLSL_SAMPLER_DIM_2D:
1988 case GLSL_SAMPLER_DIM_CUBE:
1989 case GLSL_SAMPLER_DIM_MS:
1990 case GLSL_SAMPLER_DIM_RECT:
1991 case GLSL_SAMPLER_DIM_EXTERNAL:
1992 case GLSL_SAMPLER_DIM_SUBPASS:
1993 ret = 2;
1994 break;
1995 case GLSL_SAMPLER_DIM_3D:
1996 ret = 3;
1997 break;
1998 default:
1999 unreachable("not reached");
2000 }
2001 if (instr->is_array)
2002 ret++;
2003 return ret;
2004 }
2005
2006 case nir_texop_lod:
2007 return 2;
2008
2009 case nir_texop_texture_samples:
2010 case nir_texop_query_levels:
2011 case nir_texop_samples_identical:
2012 case nir_texop_fragment_mask_fetch:
2013 return 1;
2014
2015 default:
2016 if (instr->is_shadow && instr->is_new_style_shadow)
2017 return 1;
2018
2019 return 4;
2020 }
2021 }
2022
2023 /* Returns true if this texture operation queries something about the texture
2024 * rather than actually sampling it.
2025 */
2026 static inline bool
2027 nir_tex_instr_is_query(const nir_tex_instr *instr)
2028 {
2029 switch (instr->op) {
2030 case nir_texop_txs:
2031 case nir_texop_lod:
2032 case nir_texop_texture_samples:
2033 case nir_texop_query_levels:
2034 case nir_texop_txf_ms_mcs:
2035 return true;
2036 case nir_texop_tex:
2037 case nir_texop_txb:
2038 case nir_texop_txl:
2039 case nir_texop_txd:
2040 case nir_texop_txf:
2041 case nir_texop_txf_ms:
2042 case nir_texop_txf_ms_fb:
2043 case nir_texop_tg4:
2044 return false;
2045 default:
2046 unreachable("Invalid texture opcode");
2047 }
2048 }
2049
2050 static inline bool
2051 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2052 {
2053 switch (instr->op) {
2054 case nir_texop_tex:
2055 case nir_texop_txb:
2056 case nir_texop_lod:
2057 return true;
2058 default:
2059 return false;
2060 }
2061 }
2062
2063 static inline nir_alu_type
2064 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2065 {
2066 switch (instr->src[src].src_type) {
2067 case nir_tex_src_coord:
2068 switch (instr->op) {
2069 case nir_texop_txf:
2070 case nir_texop_txf_ms:
2071 case nir_texop_txf_ms_fb:
2072 case nir_texop_txf_ms_mcs:
2073 case nir_texop_samples_identical:
2074 return nir_type_int;
2075
2076 default:
2077 return nir_type_float;
2078 }
2079
2080 case nir_tex_src_lod:
2081 switch (instr->op) {
2082 case nir_texop_txs:
2083 case nir_texop_txf:
2084 return nir_type_int;
2085
2086 default:
2087 return nir_type_float;
2088 }
2089
2090 case nir_tex_src_projector:
2091 case nir_tex_src_comparator:
2092 case nir_tex_src_bias:
2093 case nir_tex_src_min_lod:
2094 case nir_tex_src_ddx:
2095 case nir_tex_src_ddy:
2096 return nir_type_float;
2097
2098 case nir_tex_src_offset:
2099 case nir_tex_src_ms_index:
2100 case nir_tex_src_plane:
2101 return nir_type_int;
2102
2103 case nir_tex_src_ms_mcs:
2104 case nir_tex_src_texture_deref:
2105 case nir_tex_src_sampler_deref:
2106 case nir_tex_src_texture_offset:
2107 case nir_tex_src_sampler_offset:
2108 case nir_tex_src_texture_handle:
2109 case nir_tex_src_sampler_handle:
2110 return nir_type_uint;
2111
2112 case nir_num_tex_src_types:
2113 unreachable("nir_num_tex_src_types is not a valid source type");
2114 }
2115
2116 unreachable("Invalid texture source type");
2117 }
2118
2119 static inline unsigned
2120 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2121 {
2122 if (instr->src[src].src_type == nir_tex_src_coord)
2123 return instr->coord_components;
2124
2125 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2126 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2127 return 4;
2128
2129 if (instr->src[src].src_type == nir_tex_src_ddx ||
2130 instr->src[src].src_type == nir_tex_src_ddy) {
2131 if (instr->is_array)
2132 return instr->coord_components - 1;
2133 else
2134 return instr->coord_components;
2135 }
2136
2137 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2138 * the offset, since a cube maps to a single face.
2139 */
2140 if (instr->src[src].src_type == nir_tex_src_offset) {
2141 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2142 return 2;
2143 else if (instr->is_array)
2144 return instr->coord_components - 1;
2145 else
2146 return instr->coord_components;
2147 }
2148
2149 return 1;
2150 }
2151
2152 static inline int
2153 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2154 {
2155 for (unsigned i = 0; i < instr->num_srcs; i++)
2156 if (instr->src[i].src_type == type)
2157 return (int) i;
2158
2159 return -1;
2160 }
2161
2162 void nir_tex_instr_add_src(nir_tex_instr *tex,
2163 nir_tex_src_type src_type,
2164 nir_src src);
2165
2166 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2167
2168 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2169
2170 typedef struct {
2171 nir_instr instr;
2172
2173 nir_ssa_def def;
2174
2175 nir_const_value value[];
2176 } nir_load_const_instr;
2177
2178 typedef enum {
2179 nir_jump_return,
2180 nir_jump_break,
2181 nir_jump_continue,
2182 } nir_jump_type;
2183
2184 typedef struct {
2185 nir_instr instr;
2186 nir_jump_type type;
2187 } nir_jump_instr;
2188
2189 /* creates a new SSA variable in an undefined state */
2190
2191 typedef struct {
2192 nir_instr instr;
2193 nir_ssa_def def;
2194 } nir_ssa_undef_instr;
2195
2196 typedef struct {
2197 struct exec_node node;
2198
2199 /* The predecessor block corresponding to this source */
2200 struct nir_block *pred;
2201
2202 nir_src src;
2203 } nir_phi_src;
2204
2205 #define nir_foreach_phi_src(phi_src, phi) \
2206 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2207 #define nir_foreach_phi_src_safe(phi_src, phi) \
2208 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2209
2210 typedef struct {
2211 nir_instr instr;
2212
2213 struct exec_list srcs; /** < list of nir_phi_src */
2214
2215 nir_dest dest;
2216 } nir_phi_instr;
2217
2218 typedef struct {
2219 struct exec_node node;
2220 nir_src src;
2221 nir_dest dest;
2222 } nir_parallel_copy_entry;
2223
2224 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2225 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2226
2227 typedef struct {
2228 nir_instr instr;
2229
2230 /* A list of nir_parallel_copy_entrys. The sources of all of the
2231 * entries are copied to the corresponding destinations "in parallel".
2232 * In other words, if we have two entries: a -> b and b -> a, the values
2233 * get swapped.
2234 */
2235 struct exec_list entries;
2236 } nir_parallel_copy_instr;
2237
2238 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2239 type, nir_instr_type_alu)
2240 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2241 type, nir_instr_type_deref)
2242 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2243 type, nir_instr_type_call)
2244 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2245 type, nir_instr_type_jump)
2246 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2247 type, nir_instr_type_tex)
2248 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2249 type, nir_instr_type_intrinsic)
2250 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2251 type, nir_instr_type_load_const)
2252 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2253 type, nir_instr_type_ssa_undef)
2254 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2255 type, nir_instr_type_phi)
2256 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2257 nir_parallel_copy_instr, instr,
2258 type, nir_instr_type_parallel_copy)
2259
2260
2261 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2262 static inline type \
2263 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2264 { \
2265 assert(nir_src_is_const(src)); \
2266 nir_load_const_instr *load = \
2267 nir_instr_as_load_const(src.ssa->parent_instr); \
2268 assert(comp < load->def.num_components); \
2269 return nir_const_value_as_##suffix(load->value[comp], \
2270 load->def.bit_size); \
2271 } \
2272 \
2273 static inline type \
2274 nir_src_as_##suffix(nir_src src) \
2275 { \
2276 assert(nir_src_num_components(src) == 1); \
2277 return nir_src_comp_as_##suffix(src, 0); \
2278 }
2279
2280 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2281 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2282 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2283 NIR_DEFINE_SRC_AS_CONST(double, float)
2284
2285 #undef NIR_DEFINE_SRC_AS_CONST
2286
2287
2288 typedef struct {
2289 nir_ssa_def *def;
2290 unsigned comp;
2291 } nir_ssa_scalar;
2292
2293 static inline bool
2294 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2295 {
2296 return s.def->parent_instr->type == nir_instr_type_load_const;
2297 }
2298
2299 static inline nir_const_value
2300 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2301 {
2302 assert(s.comp < s.def->num_components);
2303 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2304 return load->value[s.comp];
2305 }
2306
2307 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2308 static inline type \
2309 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2310 { \
2311 return nir_const_value_as_##suffix( \
2312 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2313 }
2314
2315 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2316 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2317 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2318 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2319
2320 #undef NIR_DEFINE_SCALAR_AS_CONST
2321
2322 static inline bool
2323 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2324 {
2325 return s.def->parent_instr->type == nir_instr_type_alu;
2326 }
2327
2328 static inline nir_op
2329 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2330 {
2331 return nir_instr_as_alu(s.def->parent_instr)->op;
2332 }
2333
2334 static inline nir_ssa_scalar
2335 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2336 {
2337 nir_ssa_scalar out = { NULL, 0 };
2338
2339 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2340 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2341
2342 /* Our component must be written */
2343 assert(s.comp < s.def->num_components);
2344 assert(alu->dest.write_mask & (1u << s.comp));
2345
2346 assert(alu->src[alu_src_idx].src.is_ssa);
2347 out.def = alu->src[alu_src_idx].src.ssa;
2348
2349 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2350 /* The ALU src is unsized so the source component follows the
2351 * destination component.
2352 */
2353 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2354 } else {
2355 /* This is a sized source so all source components work together to
2356 * produce all the destination components. Since we need to return a
2357 * scalar, this only works if the source is a scalar.
2358 */
2359 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2360 out.comp = alu->src[alu_src_idx].swizzle[0];
2361 }
2362 assert(out.comp < out.def->num_components);
2363
2364 return out;
2365 }
2366
2367
2368 /*
2369 * Control flow
2370 *
2371 * Control flow consists of a tree of control flow nodes, which include
2372 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2373 * instructions that always run start-to-finish. Each basic block also keeps
2374 * track of its successors (blocks which may run immediately after the current
2375 * block) and predecessors (blocks which could have run immediately before the
2376 * current block). Each function also has a start block and an end block which
2377 * all return statements point to (which is always empty). Together, all the
2378 * blocks with their predecessors and successors make up the control flow
2379 * graph (CFG) of the function. There are helpers that modify the tree of
2380 * control flow nodes while modifying the CFG appropriately; these should be
2381 * used instead of modifying the tree directly.
2382 */
2383
2384 typedef enum {
2385 nir_cf_node_block,
2386 nir_cf_node_if,
2387 nir_cf_node_loop,
2388 nir_cf_node_function
2389 } nir_cf_node_type;
2390
2391 typedef struct nir_cf_node {
2392 struct exec_node node;
2393 nir_cf_node_type type;
2394 struct nir_cf_node *parent;
2395 } nir_cf_node;
2396
2397 typedef struct nir_block {
2398 nir_cf_node cf_node;
2399
2400 struct exec_list instr_list; /** < list of nir_instr */
2401
2402 /** generic block index; generated by nir_index_blocks */
2403 unsigned index;
2404
2405 /*
2406 * Each block can only have up to 2 successors, so we put them in a simple
2407 * array - no need for anything more complicated.
2408 */
2409 struct nir_block *successors[2];
2410
2411 /* Set of nir_block predecessors in the CFG */
2412 struct set *predecessors;
2413
2414 /*
2415 * this node's immediate dominator in the dominance tree - set to NULL for
2416 * the start block.
2417 */
2418 struct nir_block *imm_dom;
2419
2420 /* This node's children in the dominance tree */
2421 unsigned num_dom_children;
2422 struct nir_block **dom_children;
2423
2424 /* Set of nir_blocks on the dominance frontier of this block */
2425 struct set *dom_frontier;
2426
2427 /*
2428 * These two indices have the property that dom_{pre,post}_index for each
2429 * child of this block in the dominance tree will always be between
2430 * dom_pre_index and dom_post_index for this block, which makes testing if
2431 * a given block is dominated by another block an O(1) operation.
2432 */
2433 int16_t dom_pre_index, dom_post_index;
2434
2435 /* live in and out for this block; used for liveness analysis */
2436 BITSET_WORD *live_in;
2437 BITSET_WORD *live_out;
2438 } nir_block;
2439
2440 static inline bool
2441 nir_block_is_reachable(nir_block *b)
2442 {
2443 /* See also nir_block_dominates */
2444 return b->dom_post_index != -1;
2445 }
2446
2447 static inline nir_instr *
2448 nir_block_first_instr(nir_block *block)
2449 {
2450 struct exec_node *head = exec_list_get_head(&block->instr_list);
2451 return exec_node_data(nir_instr, head, node);
2452 }
2453
2454 static inline nir_instr *
2455 nir_block_last_instr(nir_block *block)
2456 {
2457 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2458 return exec_node_data(nir_instr, tail, node);
2459 }
2460
2461 static inline bool
2462 nir_block_ends_in_jump(nir_block *block)
2463 {
2464 return !exec_list_is_empty(&block->instr_list) &&
2465 nir_block_last_instr(block)->type == nir_instr_type_jump;
2466 }
2467
2468 #define nir_foreach_instr(instr, block) \
2469 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2470 #define nir_foreach_instr_reverse(instr, block) \
2471 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2472 #define nir_foreach_instr_safe(instr, block) \
2473 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2474 #define nir_foreach_instr_reverse_safe(instr, block) \
2475 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2476
2477 typedef enum {
2478 nir_selection_control_none = 0x0,
2479 nir_selection_control_flatten = 0x1,
2480 nir_selection_control_dont_flatten = 0x2,
2481 } nir_selection_control;
2482
2483 typedef struct nir_if {
2484 nir_cf_node cf_node;
2485 nir_src condition;
2486 nir_selection_control control;
2487
2488 struct exec_list then_list; /** < list of nir_cf_node */
2489 struct exec_list else_list; /** < list of nir_cf_node */
2490 } nir_if;
2491
2492 typedef struct {
2493 nir_if *nif;
2494
2495 /** Instruction that generates nif::condition. */
2496 nir_instr *conditional_instr;
2497
2498 /** Block within ::nif that has the break instruction. */
2499 nir_block *break_block;
2500
2501 /** Last block for the then- or else-path that does not contain the break. */
2502 nir_block *continue_from_block;
2503
2504 /** True when ::break_block is in the else-path of ::nif. */
2505 bool continue_from_then;
2506 bool induction_rhs;
2507
2508 /* This is true if the terminators exact trip count is unknown. For
2509 * example:
2510 *
2511 * for (int i = 0; i < imin(x, 4); i++)
2512 * ...
2513 *
2514 * Here loop analysis would have set a max_trip_count of 4 however we dont
2515 * know for sure that this is the exact trip count.
2516 */
2517 bool exact_trip_count_unknown;
2518
2519 struct list_head loop_terminator_link;
2520 } nir_loop_terminator;
2521
2522 typedef struct {
2523 /* Estimated cost (in number of instructions) of the loop */
2524 unsigned instr_cost;
2525
2526 /* Guessed trip count based on array indexing */
2527 unsigned guessed_trip_count;
2528
2529 /* Maximum number of times the loop is run (if known) */
2530 unsigned max_trip_count;
2531
2532 /* Do we know the exact number of times the loop will be run */
2533 bool exact_trip_count_known;
2534
2535 /* Unroll the loop regardless of its size */
2536 bool force_unroll;
2537
2538 /* Does the loop contain complex loop terminators, continues or other
2539 * complex behaviours? If this is true we can't rely on
2540 * loop_terminator_list to be complete or accurate.
2541 */
2542 bool complex_loop;
2543
2544 nir_loop_terminator *limiting_terminator;
2545
2546 /* A list of loop_terminators terminating this loop. */
2547 struct list_head loop_terminator_list;
2548 } nir_loop_info;
2549
2550 typedef enum {
2551 nir_loop_control_none = 0x0,
2552 nir_loop_control_unroll = 0x1,
2553 nir_loop_control_dont_unroll = 0x2,
2554 } nir_loop_control;
2555
2556 typedef struct {
2557 nir_cf_node cf_node;
2558
2559 struct exec_list body; /** < list of nir_cf_node */
2560
2561 nir_loop_info *info;
2562 nir_loop_control control;
2563 bool partially_unrolled;
2564 } nir_loop;
2565
2566 /**
2567 * Various bits of metadata that can may be created or required by
2568 * optimization and analysis passes
2569 */
2570 typedef enum {
2571 nir_metadata_none = 0x0,
2572 nir_metadata_block_index = 0x1,
2573 nir_metadata_dominance = 0x2,
2574 nir_metadata_live_ssa_defs = 0x4,
2575 nir_metadata_not_properly_reset = 0x8,
2576 nir_metadata_loop_analysis = 0x10,
2577 } nir_metadata;
2578
2579 typedef struct {
2580 nir_cf_node cf_node;
2581
2582 /** pointer to the function of which this is an implementation */
2583 struct nir_function *function;
2584
2585 struct exec_list body; /** < list of nir_cf_node */
2586
2587 nir_block *end_block;
2588
2589 /** list for all local variables in the function */
2590 struct exec_list locals;
2591
2592 /** list of local registers in the function */
2593 struct exec_list registers;
2594
2595 /** next available local register index */
2596 unsigned reg_alloc;
2597
2598 /** next available SSA value index */
2599 unsigned ssa_alloc;
2600
2601 /* total number of basic blocks, only valid when block_index_dirty = false */
2602 unsigned num_blocks;
2603
2604 nir_metadata valid_metadata;
2605 } nir_function_impl;
2606
2607 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2608 nir_start_block(nir_function_impl *impl)
2609 {
2610 return (nir_block *) impl->body.head_sentinel.next;
2611 }
2612
2613 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2614 nir_impl_last_block(nir_function_impl *impl)
2615 {
2616 return (nir_block *) impl->body.tail_sentinel.prev;
2617 }
2618
2619 static inline nir_cf_node *
2620 nir_cf_node_next(nir_cf_node *node)
2621 {
2622 struct exec_node *next = exec_node_get_next(&node->node);
2623 if (exec_node_is_tail_sentinel(next))
2624 return NULL;
2625 else
2626 return exec_node_data(nir_cf_node, next, node);
2627 }
2628
2629 static inline nir_cf_node *
2630 nir_cf_node_prev(nir_cf_node *node)
2631 {
2632 struct exec_node *prev = exec_node_get_prev(&node->node);
2633 if (exec_node_is_head_sentinel(prev))
2634 return NULL;
2635 else
2636 return exec_node_data(nir_cf_node, prev, node);
2637 }
2638
2639 static inline bool
2640 nir_cf_node_is_first(const nir_cf_node *node)
2641 {
2642 return exec_node_is_head_sentinel(node->node.prev);
2643 }
2644
2645 static inline bool
2646 nir_cf_node_is_last(const nir_cf_node *node)
2647 {
2648 return exec_node_is_tail_sentinel(node->node.next);
2649 }
2650
2651 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2652 type, nir_cf_node_block)
2653 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2654 type, nir_cf_node_if)
2655 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2656 type, nir_cf_node_loop)
2657 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2658 nir_function_impl, cf_node, type, nir_cf_node_function)
2659
2660 static inline nir_block *
2661 nir_if_first_then_block(nir_if *if_stmt)
2662 {
2663 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2664 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2665 }
2666
2667 static inline nir_block *
2668 nir_if_last_then_block(nir_if *if_stmt)
2669 {
2670 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2671 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2672 }
2673
2674 static inline nir_block *
2675 nir_if_first_else_block(nir_if *if_stmt)
2676 {
2677 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2678 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2679 }
2680
2681 static inline nir_block *
2682 nir_if_last_else_block(nir_if *if_stmt)
2683 {
2684 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2685 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2686 }
2687
2688 static inline nir_block *
2689 nir_loop_first_block(nir_loop *loop)
2690 {
2691 struct exec_node *head = exec_list_get_head(&loop->body);
2692 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2693 }
2694
2695 static inline nir_block *
2696 nir_loop_last_block(nir_loop *loop)
2697 {
2698 struct exec_node *tail = exec_list_get_tail(&loop->body);
2699 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2700 }
2701
2702 /**
2703 * Return true if this list of cf_nodes contains a single empty block.
2704 */
2705 static inline bool
2706 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2707 {
2708 if (exec_list_is_singular(cf_list)) {
2709 struct exec_node *head = exec_list_get_head(cf_list);
2710 nir_block *block =
2711 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2712 return exec_list_is_empty(&block->instr_list);
2713 }
2714 return false;
2715 }
2716
2717 typedef struct {
2718 uint8_t num_components;
2719 uint8_t bit_size;
2720 } nir_parameter;
2721
2722 typedef struct nir_function {
2723 struct exec_node node;
2724
2725 const char *name;
2726 struct nir_shader *shader;
2727
2728 unsigned num_params;
2729 nir_parameter *params;
2730
2731 /** The implementation of this function.
2732 *
2733 * If the function is only declared and not implemented, this is NULL.
2734 */
2735 nir_function_impl *impl;
2736
2737 bool is_entrypoint;
2738 } nir_function;
2739
2740 typedef enum {
2741 nir_lower_imul64 = (1 << 0),
2742 nir_lower_isign64 = (1 << 1),
2743 /** Lower all int64 modulus and division opcodes */
2744 nir_lower_divmod64 = (1 << 2),
2745 /** Lower all 64-bit umul_high and imul_high opcodes */
2746 nir_lower_imul_high64 = (1 << 3),
2747 nir_lower_mov64 = (1 << 4),
2748 nir_lower_icmp64 = (1 << 5),
2749 nir_lower_iadd64 = (1 << 6),
2750 nir_lower_iabs64 = (1 << 7),
2751 nir_lower_ineg64 = (1 << 8),
2752 nir_lower_logic64 = (1 << 9),
2753 nir_lower_minmax64 = (1 << 10),
2754 nir_lower_shift64 = (1 << 11),
2755 nir_lower_imul_2x32_64 = (1 << 12),
2756 nir_lower_extract64 = (1 << 13),
2757 nir_lower_ufind_msb64 = (1 << 14),
2758 } nir_lower_int64_options;
2759
2760 typedef enum {
2761 nir_lower_drcp = (1 << 0),
2762 nir_lower_dsqrt = (1 << 1),
2763 nir_lower_drsq = (1 << 2),
2764 nir_lower_dtrunc = (1 << 3),
2765 nir_lower_dfloor = (1 << 4),
2766 nir_lower_dceil = (1 << 5),
2767 nir_lower_dfract = (1 << 6),
2768 nir_lower_dround_even = (1 << 7),
2769 nir_lower_dmod = (1 << 8),
2770 nir_lower_dsub = (1 << 9),
2771 nir_lower_ddiv = (1 << 10),
2772 nir_lower_fp64_full_software = (1 << 11),
2773 } nir_lower_doubles_options;
2774
2775 typedef enum {
2776 nir_divergence_single_prim_per_subgroup = (1 << 0),
2777 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2778 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2779 nir_divergence_view_index_uniform = (1 << 3),
2780 } nir_divergence_options;
2781
2782 typedef struct nir_shader_compiler_options {
2783 bool lower_fdiv;
2784 bool lower_ffma;
2785 bool fuse_ffma;
2786 bool lower_flrp16;
2787 bool lower_flrp32;
2788 /** Lowers flrp when it does not support doubles */
2789 bool lower_flrp64;
2790 bool lower_fpow;
2791 bool lower_fsat;
2792 bool lower_fsqrt;
2793 bool lower_sincos;
2794 bool lower_fmod;
2795 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2796 bool lower_bitfield_extract;
2797 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2798 bool lower_bitfield_extract_to_shifts;
2799 /** Lowers bitfield_insert to bfi/bfm */
2800 bool lower_bitfield_insert;
2801 /** Lowers bitfield_insert to compares, and shifts. */
2802 bool lower_bitfield_insert_to_shifts;
2803 /** Lowers bitfield_insert to bfm/bitfield_select. */
2804 bool lower_bitfield_insert_to_bitfield_select;
2805 /** Lowers bitfield_reverse to shifts. */
2806 bool lower_bitfield_reverse;
2807 /** Lowers bit_count to shifts. */
2808 bool lower_bit_count;
2809 /** Lowers ifind_msb to compare and ufind_msb */
2810 bool lower_ifind_msb;
2811 /** Lowers find_lsb to ufind_msb and logic ops */
2812 bool lower_find_lsb;
2813 bool lower_uadd_carry;
2814 bool lower_usub_borrow;
2815 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2816 bool lower_mul_high;
2817 /** lowers fneg and ineg to fsub and isub. */
2818 bool lower_negate;
2819 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2820 bool lower_sub;
2821
2822 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2823 bool lower_scmp;
2824
2825 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2826 bool lower_vector_cmp;
2827
2828 /** enables rules to lower idiv by power-of-two: */
2829 bool lower_idiv;
2830
2831 /** enable rules to avoid bit ops */
2832 bool lower_bitops;
2833
2834 /** enables rules to lower isign to imin+imax */
2835 bool lower_isign;
2836
2837 /** enables rules to lower fsign to fsub and flt */
2838 bool lower_fsign;
2839
2840 /* lower fdph to fdot4 */
2841 bool lower_fdph;
2842
2843 /** lower fdot to fmul and fsum/fadd. */
2844 bool lower_fdot;
2845
2846 /* Does the native fdot instruction replicate its result for four
2847 * components? If so, then opt_algebraic_late will turn all fdotN
2848 * instructions into fdot_replicatedN instructions.
2849 */
2850 bool fdot_replicates;
2851
2852 /** lowers ffloor to fsub+ffract: */
2853 bool lower_ffloor;
2854
2855 /** lowers ffract to fsub+ffloor: */
2856 bool lower_ffract;
2857
2858 /** lowers fceil to fneg+ffloor+fneg: */
2859 bool lower_fceil;
2860
2861 bool lower_ftrunc;
2862
2863 bool lower_ldexp;
2864
2865 bool lower_pack_half_2x16;
2866 bool lower_pack_half_2x16_split;
2867 bool lower_pack_unorm_2x16;
2868 bool lower_pack_snorm_2x16;
2869 bool lower_pack_unorm_4x8;
2870 bool lower_pack_snorm_4x8;
2871 bool lower_unpack_half_2x16;
2872 bool lower_unpack_half_2x16_split;
2873 bool lower_unpack_unorm_2x16;
2874 bool lower_unpack_snorm_2x16;
2875 bool lower_unpack_unorm_4x8;
2876 bool lower_unpack_snorm_4x8;
2877
2878 bool lower_extract_byte;
2879 bool lower_extract_word;
2880
2881 bool lower_all_io_to_temps;
2882 bool lower_all_io_to_elements;
2883
2884 /* Indicates that the driver only has zero-based vertex id */
2885 bool vertex_id_zero_based;
2886
2887 /**
2888 * If enabled, gl_BaseVertex will be lowered as:
2889 * is_indexed_draw (~0/0) & firstvertex
2890 */
2891 bool lower_base_vertex;
2892
2893 /**
2894 * If enabled, gl_HelperInvocation will be lowered as:
2895 *
2896 * !((1 << sample_id) & sample_mask_in))
2897 *
2898 * This depends on some possibly hw implementation details, which may
2899 * not be true for all hw. In particular that the FS is only executed
2900 * for covered samples or for helper invocations. So, do not blindly
2901 * enable this option.
2902 *
2903 * Note: See also issue #22 in ARB_shader_image_load_store
2904 */
2905 bool lower_helper_invocation;
2906
2907 /**
2908 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2909 *
2910 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2911 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2912 */
2913 bool optimize_sample_mask_in;
2914
2915 bool lower_cs_local_index_from_id;
2916 bool lower_cs_local_id_from_index;
2917
2918 bool lower_device_index_to_zero;
2919
2920 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2921 bool lower_wpos_pntc;
2922
2923 /**
2924 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
2925 * lowered to simple arithmetic.
2926 *
2927 * If this flag is set, the lowering will be applied to all bit-sizes of
2928 * these instructions.
2929 *
2930 * \sa ::lower_hadd64
2931 */
2932 bool lower_hadd;
2933
2934 /**
2935 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
2936 * should be lowered to simple arithmetic.
2937 *
2938 * If this flag is set, the lowering will be applied to only 64-bit
2939 * versions of these instructions.
2940 *
2941 * \sa ::lower_hadd
2942 */
2943 bool lower_hadd64;
2944
2945 /**
2946 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
2947 * arithmetic.
2948 *
2949 * If this flag is set, the lowering will be applied to all bit-sizes of
2950 * these instructions.
2951 *
2952 * \sa ::lower_usub_sat64
2953 */
2954 bool lower_add_sat;
2955
2956 /**
2957 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
2958 * arithmetic.
2959 *
2960 * \sa ::lower_add_sat
2961 */
2962 bool lower_usub_sat64;
2963
2964 /**
2965 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2966 * for IO purposes and would prefer loads/stores be vectorized.
2967 */
2968 bool vectorize_io;
2969 bool lower_to_scalar;
2970
2971 /**
2972 * Should the linker unify inputs_read/outputs_written between adjacent
2973 * shader stages which are linked into a single program?
2974 */
2975 bool unify_interfaces;
2976
2977 /**
2978 * Should nir_lower_io() create load_interpolated_input intrinsics?
2979 *
2980 * If not, it generates regular load_input intrinsics and interpolation
2981 * information must be inferred from the list of input nir_variables.
2982 */
2983 bool use_interpolated_input_intrinsics;
2984
2985 /* Lowers when 32x32->64 bit multiplication is not supported */
2986 bool lower_mul_2x32_64;
2987
2988 /* Lowers when rotate instruction is not supported */
2989 bool lower_rotate;
2990
2991 /**
2992 * Backend supports imul24, and would like to use it (when possible)
2993 * for address/offset calculation. If true, driver should call
2994 * nir_lower_amul(). (If not set, amul will automatically be lowered
2995 * to imul.)
2996 */
2997 bool has_imul24;
2998
2999 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
3000 * set of memory barrier intrinsics based on GLSL.
3001 */
3002 bool use_scoped_memory_barrier;
3003
3004 /**
3005 * Is this the Intel vec4 backend?
3006 *
3007 * Used to inhibit algebraic optimizations that are known to be harmful on
3008 * the Intel vec4 backend. This is generally applicable to any
3009 * optimization that might cause more immediate values to be used in
3010 * 3-source (e.g., ffma and flrp) instructions.
3011 */
3012 bool intel_vec4;
3013
3014 /** Whether 8-bit ALU is supported. */
3015 bool support_8bit_alu;
3016
3017 /** Whether 16-bit ALU is supported. */
3018 bool support_16bit_alu;
3019
3020 unsigned max_unroll_iterations;
3021
3022 nir_lower_int64_options lower_int64_options;
3023 nir_lower_doubles_options lower_doubles_options;
3024 } nir_shader_compiler_options;
3025
3026 typedef struct nir_shader {
3027 /** list of uniforms (nir_variable) */
3028 struct exec_list uniforms;
3029
3030 /** list of inputs (nir_variable) */
3031 struct exec_list inputs;
3032
3033 /** list of outputs (nir_variable) */
3034 struct exec_list outputs;
3035
3036 /** list of shared compute variables (nir_variable) */
3037 struct exec_list shared;
3038
3039 /** Set of driver-specific options for the shader.
3040 *
3041 * The memory for the options is expected to be kept in a single static
3042 * copy by the driver.
3043 */
3044 const struct nir_shader_compiler_options *options;
3045
3046 /** Various bits of compile-time information about a given shader */
3047 struct shader_info info;
3048
3049 /** list of global variables in the shader (nir_variable) */
3050 struct exec_list globals;
3051
3052 /** list of system value variables in the shader (nir_variable) */
3053 struct exec_list system_values;
3054
3055 struct exec_list functions; /** < list of nir_function */
3056
3057 /**
3058 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3059 * access plus one
3060 */
3061 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3062
3063 /** Size in bytes of required scratch space */
3064 unsigned scratch_size;
3065
3066 /** Constant data associated with this shader.
3067 *
3068 * Constant data is loaded through load_constant intrinsics. See also
3069 * nir_opt_large_constants.
3070 */
3071 void *constant_data;
3072 unsigned constant_data_size;
3073 } nir_shader;
3074
3075 #define nir_foreach_function(func, shader) \
3076 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3077
3078 static inline nir_function_impl *
3079 nir_shader_get_entrypoint(nir_shader *shader)
3080 {
3081 nir_function *func = NULL;
3082
3083 nir_foreach_function(function, shader) {
3084 assert(func == NULL);
3085 if (function->is_entrypoint) {
3086 func = function;
3087 #ifndef NDEBUG
3088 break;
3089 #endif
3090 }
3091 }
3092
3093 if (!func)
3094 return NULL;
3095
3096 assert(func->num_params == 0);
3097 assert(func->impl);
3098 return func->impl;
3099 }
3100
3101 nir_shader *nir_shader_create(void *mem_ctx,
3102 gl_shader_stage stage,
3103 const nir_shader_compiler_options *options,
3104 shader_info *si);
3105
3106 nir_register *nir_local_reg_create(nir_function_impl *impl);
3107
3108 void nir_reg_remove(nir_register *reg);
3109
3110 /** Adds a variable to the appropriate list in nir_shader */
3111 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3112
3113 static inline void
3114 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3115 {
3116 assert(var->data.mode == nir_var_function_temp);
3117 exec_list_push_tail(&impl->locals, &var->node);
3118 }
3119
3120 /** creates a variable, sets a few defaults, and adds it to the list */
3121 nir_variable *nir_variable_create(nir_shader *shader,
3122 nir_variable_mode mode,
3123 const struct glsl_type *type,
3124 const char *name);
3125 /** creates a local variable and adds it to the list */
3126 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3127 const struct glsl_type *type,
3128 const char *name);
3129
3130 /** creates a function and adds it to the shader's list of functions */
3131 nir_function *nir_function_create(nir_shader *shader, const char *name);
3132
3133 nir_function_impl *nir_function_impl_create(nir_function *func);
3134 /** creates a function_impl that isn't tied to any particular function */
3135 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3136
3137 nir_block *nir_block_create(nir_shader *shader);
3138 nir_if *nir_if_create(nir_shader *shader);
3139 nir_loop *nir_loop_create(nir_shader *shader);
3140
3141 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3142
3143 /** requests that the given pieces of metadata be generated */
3144 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3145 /** dirties all but the preserved metadata */
3146 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3147
3148 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3149 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3150
3151 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3152 nir_deref_type deref_type);
3153
3154 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3155
3156 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3157 unsigned num_components,
3158 unsigned bit_size);
3159
3160 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3161 nir_intrinsic_op op);
3162
3163 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3164 nir_function *callee);
3165
3166 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3167
3168 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3169
3170 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3171
3172 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3173 unsigned num_components,
3174 unsigned bit_size);
3175
3176 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3177
3178 /**
3179 * NIR Cursors and Instruction Insertion API
3180 * @{
3181 *
3182 * A tiny struct representing a point to insert/extract instructions or
3183 * control flow nodes. Helps reduce the combinatorial explosion of possible
3184 * points to insert/extract.
3185 *
3186 * \sa nir_control_flow.h
3187 */
3188 typedef enum {
3189 nir_cursor_before_block,
3190 nir_cursor_after_block,
3191 nir_cursor_before_instr,
3192 nir_cursor_after_instr,
3193 } nir_cursor_option;
3194
3195 typedef struct {
3196 nir_cursor_option option;
3197 union {
3198 nir_block *block;
3199 nir_instr *instr;
3200 };
3201 } nir_cursor;
3202
3203 static inline nir_block *
3204 nir_cursor_current_block(nir_cursor cursor)
3205 {
3206 if (cursor.option == nir_cursor_before_instr ||
3207 cursor.option == nir_cursor_after_instr) {
3208 return cursor.instr->block;
3209 } else {
3210 return cursor.block;
3211 }
3212 }
3213
3214 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3215
3216 static inline nir_cursor
3217 nir_before_block(nir_block *block)
3218 {
3219 nir_cursor cursor;
3220 cursor.option = nir_cursor_before_block;
3221 cursor.block = block;
3222 return cursor;
3223 }
3224
3225 static inline nir_cursor
3226 nir_after_block(nir_block *block)
3227 {
3228 nir_cursor cursor;
3229 cursor.option = nir_cursor_after_block;
3230 cursor.block = block;
3231 return cursor;
3232 }
3233
3234 static inline nir_cursor
3235 nir_before_instr(nir_instr *instr)
3236 {
3237 nir_cursor cursor;
3238 cursor.option = nir_cursor_before_instr;
3239 cursor.instr = instr;
3240 return cursor;
3241 }
3242
3243 static inline nir_cursor
3244 nir_after_instr(nir_instr *instr)
3245 {
3246 nir_cursor cursor;
3247 cursor.option = nir_cursor_after_instr;
3248 cursor.instr = instr;
3249 return cursor;
3250 }
3251
3252 static inline nir_cursor
3253 nir_after_block_before_jump(nir_block *block)
3254 {
3255 nir_instr *last_instr = nir_block_last_instr(block);
3256 if (last_instr && last_instr->type == nir_instr_type_jump) {
3257 return nir_before_instr(last_instr);
3258 } else {
3259 return nir_after_block(block);
3260 }
3261 }
3262
3263 static inline nir_cursor
3264 nir_before_src(nir_src *src, bool is_if_condition)
3265 {
3266 if (is_if_condition) {
3267 nir_block *prev_block =
3268 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3269 assert(!nir_block_ends_in_jump(prev_block));
3270 return nir_after_block(prev_block);
3271 } else if (src->parent_instr->type == nir_instr_type_phi) {
3272 #ifndef NDEBUG
3273 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3274 bool found = false;
3275 nir_foreach_phi_src(phi_src, cond_phi) {
3276 if (phi_src->src.ssa == src->ssa) {
3277 found = true;
3278 break;
3279 }
3280 }
3281 assert(found);
3282 #endif
3283 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3284 * to have a more specific name.
3285 */
3286 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3287 return nir_after_block_before_jump(phi_src->pred);
3288 } else {
3289 return nir_before_instr(src->parent_instr);
3290 }
3291 }
3292
3293 static inline nir_cursor
3294 nir_before_cf_node(nir_cf_node *node)
3295 {
3296 if (node->type == nir_cf_node_block)
3297 return nir_before_block(nir_cf_node_as_block(node));
3298
3299 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3300 }
3301
3302 static inline nir_cursor
3303 nir_after_cf_node(nir_cf_node *node)
3304 {
3305 if (node->type == nir_cf_node_block)
3306 return nir_after_block(nir_cf_node_as_block(node));
3307
3308 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3309 }
3310
3311 static inline nir_cursor
3312 nir_after_phis(nir_block *block)
3313 {
3314 nir_foreach_instr(instr, block) {
3315 if (instr->type != nir_instr_type_phi)
3316 return nir_before_instr(instr);
3317 }
3318 return nir_after_block(block);
3319 }
3320
3321 static inline nir_cursor
3322 nir_after_cf_node_and_phis(nir_cf_node *node)
3323 {
3324 if (node->type == nir_cf_node_block)
3325 return nir_after_block(nir_cf_node_as_block(node));
3326
3327 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3328
3329 return nir_after_phis(block);
3330 }
3331
3332 static inline nir_cursor
3333 nir_before_cf_list(struct exec_list *cf_list)
3334 {
3335 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3336 exec_list_get_head(cf_list), node);
3337 return nir_before_cf_node(first_node);
3338 }
3339
3340 static inline nir_cursor
3341 nir_after_cf_list(struct exec_list *cf_list)
3342 {
3343 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3344 exec_list_get_tail(cf_list), node);
3345 return nir_after_cf_node(last_node);
3346 }
3347
3348 /**
3349 * Insert a NIR instruction at the given cursor.
3350 *
3351 * Note: This does not update the cursor.
3352 */
3353 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3354
3355 static inline void
3356 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3357 {
3358 nir_instr_insert(nir_before_instr(instr), before);
3359 }
3360
3361 static inline void
3362 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3363 {
3364 nir_instr_insert(nir_after_instr(instr), after);
3365 }
3366
3367 static inline void
3368 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3369 {
3370 nir_instr_insert(nir_before_block(block), before);
3371 }
3372
3373 static inline void
3374 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3375 {
3376 nir_instr_insert(nir_after_block(block), after);
3377 }
3378
3379 static inline void
3380 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3381 {
3382 nir_instr_insert(nir_before_cf_node(node), before);
3383 }
3384
3385 static inline void
3386 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3387 {
3388 nir_instr_insert(nir_after_cf_node(node), after);
3389 }
3390
3391 static inline void
3392 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3393 {
3394 nir_instr_insert(nir_before_cf_list(list), before);
3395 }
3396
3397 static inline void
3398 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3399 {
3400 nir_instr_insert(nir_after_cf_list(list), after);
3401 }
3402
3403 void nir_instr_remove_v(nir_instr *instr);
3404
3405 static inline nir_cursor
3406 nir_instr_remove(nir_instr *instr)
3407 {
3408 nir_cursor cursor;
3409 nir_instr *prev = nir_instr_prev(instr);
3410 if (prev) {
3411 cursor = nir_after_instr(prev);
3412 } else {
3413 cursor = nir_before_block(instr->block);
3414 }
3415 nir_instr_remove_v(instr);
3416 return cursor;
3417 }
3418
3419 /** @} */
3420
3421 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3422
3423 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3424 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3425 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3426 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3427 void *state);
3428 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3429 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3430
3431 nir_const_value *nir_src_as_const_value(nir_src src);
3432
3433 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3434 static inline c_type * \
3435 nir_src_as_ ## name (nir_src src) \
3436 { \
3437 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3438 ? cast_macro(src.ssa->parent_instr) : NULL; \
3439 }
3440
3441 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3442 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3443 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3444 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3445
3446 bool nir_src_is_dynamically_uniform(nir_src src);
3447 bool nir_srcs_equal(nir_src src1, nir_src src2);
3448 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3449 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3450 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3451 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3452 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3453 nir_dest new_dest);
3454
3455 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3456 unsigned num_components, unsigned bit_size,
3457 const char *name);
3458 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3459 unsigned num_components, unsigned bit_size,
3460 const char *name);
3461 static inline void
3462 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3463 const struct glsl_type *type,
3464 const char *name)
3465 {
3466 assert(glsl_type_is_vector_or_scalar(type));
3467 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3468 glsl_get_bit_size(type), name);
3469 }
3470 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3471 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3472 nir_instr *after_me);
3473
3474 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3475
3476 /*
3477 * finds the next basic block in source-code order, returns NULL if there is
3478 * none
3479 */
3480
3481 nir_block *nir_block_cf_tree_next(nir_block *block);
3482
3483 /* Performs the opposite of nir_block_cf_tree_next() */
3484
3485 nir_block *nir_block_cf_tree_prev(nir_block *block);
3486
3487 /* Gets the first block in a CF node in source-code order */
3488
3489 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3490
3491 /* Gets the last block in a CF node in source-code order */
3492
3493 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3494
3495 /* Gets the next block after a CF node in source-code order */
3496
3497 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3498
3499 /* Macros for loops that visit blocks in source-code order */
3500
3501 #define nir_foreach_block(block, impl) \
3502 for (nir_block *block = nir_start_block(impl); block != NULL; \
3503 block = nir_block_cf_tree_next(block))
3504
3505 #define nir_foreach_block_safe(block, impl) \
3506 for (nir_block *block = nir_start_block(impl), \
3507 *next = nir_block_cf_tree_next(block); \
3508 block != NULL; \
3509 block = next, next = nir_block_cf_tree_next(block))
3510
3511 #define nir_foreach_block_reverse(block, impl) \
3512 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3513 block = nir_block_cf_tree_prev(block))
3514
3515 #define nir_foreach_block_reverse_safe(block, impl) \
3516 for (nir_block *block = nir_impl_last_block(impl), \
3517 *prev = nir_block_cf_tree_prev(block); \
3518 block != NULL; \
3519 block = prev, prev = nir_block_cf_tree_prev(block))
3520
3521 #define nir_foreach_block_in_cf_node(block, node) \
3522 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3523 block != nir_cf_node_cf_tree_next(node); \
3524 block = nir_block_cf_tree_next(block))
3525
3526 /* If the following CF node is an if, this function returns that if.
3527 * Otherwise, it returns NULL.
3528 */
3529 nir_if *nir_block_get_following_if(nir_block *block);
3530
3531 nir_loop *nir_block_get_following_loop(nir_block *block);
3532
3533 void nir_index_local_regs(nir_function_impl *impl);
3534 void nir_index_ssa_defs(nir_function_impl *impl);
3535 unsigned nir_index_instrs(nir_function_impl *impl);
3536
3537 void nir_index_blocks(nir_function_impl *impl);
3538
3539 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3540
3541 void nir_print_shader(nir_shader *shader, FILE *fp);
3542 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3543 void nir_print_instr(const nir_instr *instr, FILE *fp);
3544 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3545
3546 /** Shallow clone of a single ALU instruction. */
3547 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3548
3549 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3550 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3551 const nir_function_impl *fi);
3552 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3553 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3554
3555 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3556
3557 void nir_shader_serialize_deserialize(nir_shader *s);
3558
3559 #ifndef NDEBUG
3560 void nir_validate_shader(nir_shader *shader, const char *when);
3561 void nir_metadata_set_validation_flag(nir_shader *shader);
3562 void nir_metadata_check_validation_flag(nir_shader *shader);
3563
3564 static inline bool
3565 should_skip_nir(const char *name)
3566 {
3567 static const char *list = NULL;
3568 if (!list) {
3569 /* Comma separated list of names to skip. */
3570 list = getenv("NIR_SKIP");
3571 if (!list)
3572 list = "";
3573 }
3574
3575 if (!list[0])
3576 return false;
3577
3578 return comma_separated_list_contains(list, name);
3579 }
3580
3581 static inline bool
3582 should_clone_nir(void)
3583 {
3584 static int should_clone = -1;
3585 if (should_clone < 0)
3586 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3587
3588 return should_clone;
3589 }
3590
3591 static inline bool
3592 should_serialize_deserialize_nir(void)
3593 {
3594 static int test_serialize = -1;
3595 if (test_serialize < 0)
3596 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3597
3598 return test_serialize;
3599 }
3600
3601 static inline bool
3602 should_print_nir(void)
3603 {
3604 static int should_print = -1;
3605 if (should_print < 0)
3606 should_print = env_var_as_boolean("NIR_PRINT", false);
3607
3608 return should_print;
3609 }
3610 #else
3611 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3612 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3613 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3614 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3615 static inline bool should_clone_nir(void) { return false; }
3616 static inline bool should_serialize_deserialize_nir(void) { return false; }
3617 static inline bool should_print_nir(void) { return false; }
3618 #endif /* NDEBUG */
3619
3620 #define _PASS(pass, nir, do_pass) do { \
3621 if (should_skip_nir(#pass)) { \
3622 printf("skipping %s\n", #pass); \
3623 break; \
3624 } \
3625 do_pass \
3626 nir_validate_shader(nir, "after " #pass); \
3627 if (should_clone_nir()) { \
3628 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3629 nir_shader_replace(nir, clone); \
3630 } \
3631 if (should_serialize_deserialize_nir()) { \
3632 nir_shader_serialize_deserialize(nir); \
3633 } \
3634 } while (0)
3635
3636 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3637 nir_metadata_set_validation_flag(nir); \
3638 if (should_print_nir()) \
3639 printf("%s\n", #pass); \
3640 if (pass(nir, ##__VA_ARGS__)) { \
3641 progress = true; \
3642 if (should_print_nir()) \
3643 nir_print_shader(nir, stdout); \
3644 nir_metadata_check_validation_flag(nir); \
3645 } \
3646 )
3647
3648 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3649 if (should_print_nir()) \
3650 printf("%s\n", #pass); \
3651 pass(nir, ##__VA_ARGS__); \
3652 if (should_print_nir()) \
3653 nir_print_shader(nir, stdout); \
3654 )
3655
3656 #define NIR_SKIP(name) should_skip_nir(#name)
3657
3658 /** An instruction filtering callback
3659 *
3660 * Returns true if the instruction should be processed and false otherwise.
3661 */
3662 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3663
3664 /** A simple instruction lowering callback
3665 *
3666 * Many instruction lowering passes can be written as a simple function which
3667 * takes an instruction as its input and returns a sequence of instructions
3668 * that implement the consumed instruction. This function type represents
3669 * such a lowering function. When called, a function with this prototype
3670 * should either return NULL indicating that no lowering needs to be done or
3671 * emit a sequence of instructions using the provided builder (whose cursor
3672 * will already be placed after the instruction to be lowered) and return the
3673 * resulting nir_ssa_def.
3674 */
3675 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3676 nir_instr *, void *);
3677
3678 /**
3679 * Special return value for nir_lower_instr_cb when some progress occurred
3680 * (like changing an input to the instr) that didn't result in a replacement
3681 * SSA def being generated.
3682 */
3683 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3684
3685 /** Iterate over all the instructions in a nir_function_impl and lower them
3686 * using the provided callbacks
3687 *
3688 * This function implements the guts of a standard lowering pass for you. It
3689 * iterates over all of the instructions in a nir_function_impl and calls the
3690 * filter callback on each one. If the filter callback returns true, it then
3691 * calls the lowering call back on the instruction. (Splitting it this way
3692 * allows us to avoid some save/restore work for instructions we know won't be
3693 * lowered.) If the instruction is dead after the lowering is complete, it
3694 * will be removed. If new instructions are added, the lowering callback will
3695 * also be called on them in case multiple lowerings are required.
3696 *
3697 * The metadata for the nir_function_impl will also be updated. If any blocks
3698 * are added (they cannot be removed), dominance and block indices will be
3699 * invalidated.
3700 */
3701 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3702 nir_instr_filter_cb filter,
3703 nir_lower_instr_cb lower,
3704 void *cb_data);
3705 bool nir_shader_lower_instructions(nir_shader *shader,
3706 nir_instr_filter_cb filter,
3707 nir_lower_instr_cb lower,
3708 void *cb_data);
3709
3710 void nir_calc_dominance_impl(nir_function_impl *impl);
3711 void nir_calc_dominance(nir_shader *shader);
3712
3713 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3714 bool nir_block_dominates(nir_block *parent, nir_block *child);
3715 bool nir_block_is_unreachable(nir_block *block);
3716
3717 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3718 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3719
3720 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3721 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3722
3723 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3724 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3725
3726 int nir_gs_count_vertices(const nir_shader *shader);
3727
3728 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3729 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3730 bool nir_split_var_copies(nir_shader *shader);
3731 bool nir_split_per_member_structs(nir_shader *shader);
3732 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3733
3734 bool nir_lower_returns_impl(nir_function_impl *impl);
3735 bool nir_lower_returns(nir_shader *shader);
3736
3737 void nir_inline_function_impl(struct nir_builder *b,
3738 const nir_function_impl *impl,
3739 nir_ssa_def **params);
3740 bool nir_inline_functions(nir_shader *shader);
3741
3742 bool nir_propagate_invariant(nir_shader *shader);
3743
3744 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3745 void nir_lower_deref_copy_instr(struct nir_builder *b,
3746 nir_intrinsic_instr *copy);
3747 bool nir_lower_var_copies(nir_shader *shader);
3748
3749 void nir_fixup_deref_modes(nir_shader *shader);
3750
3751 bool nir_lower_global_vars_to_local(nir_shader *shader);
3752
3753 typedef enum {
3754 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3755 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3756 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3757 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3758 } nir_lower_array_deref_of_vec_options;
3759
3760 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3761 nir_lower_array_deref_of_vec_options options);
3762
3763 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3764
3765 bool nir_lower_locals_to_regs(nir_shader *shader);
3766
3767 void nir_lower_io_to_temporaries(nir_shader *shader,
3768 nir_function_impl *entrypoint,
3769 bool outputs, bool inputs);
3770
3771 bool nir_lower_vars_to_scratch(nir_shader *shader,
3772 nir_variable_mode modes,
3773 int size_threshold,
3774 glsl_type_size_align_func size_align);
3775
3776 void nir_lower_clip_halfz(nir_shader *shader);
3777
3778 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3779
3780 void nir_gather_ssa_types(nir_function_impl *impl,
3781 BITSET_WORD *float_types,
3782 BITSET_WORD *int_types);
3783
3784 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3785 int (*type_size)(const struct glsl_type *, bool));
3786
3787 /* Some helpers to do very simple linking */
3788 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3789 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3790 uint64_t *used_by_other_stage,
3791 uint64_t *used_by_other_stage_patches);
3792 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3793 bool default_to_smooth_interp);
3794 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3795 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3796
3797 bool nir_lower_amul(nir_shader *shader,
3798 int (*type_size)(const struct glsl_type *, bool));
3799
3800 void nir_assign_io_var_locations(struct exec_list *var_list,
3801 unsigned *size,
3802 gl_shader_stage stage);
3803
3804 typedef enum {
3805 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3806 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3807 * modes.
3808 */
3809 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3810
3811 /* If set, this forces all non-flat fragment shader inputs to be
3812 * interpolated as if with the "sample" qualifier. This requires
3813 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3814 */
3815 nir_lower_io_force_sample_interpolation = (1 << 1),
3816 } nir_lower_io_options;
3817 bool nir_lower_io(nir_shader *shader,
3818 nir_variable_mode modes,
3819 int (*type_size)(const struct glsl_type *, bool),
3820 nir_lower_io_options);
3821
3822 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3823
3824 bool
3825 nir_lower_vars_to_explicit_types(nir_shader *shader,
3826 nir_variable_mode modes,
3827 glsl_type_size_align_func type_info);
3828
3829 typedef enum {
3830 /**
3831 * An address format which is a simple 32-bit global GPU address.
3832 */
3833 nir_address_format_32bit_global,
3834
3835 /**
3836 * An address format which is a simple 64-bit global GPU address.
3837 */
3838 nir_address_format_64bit_global,
3839
3840 /**
3841 * An address format which is a bounds-checked 64-bit global GPU address.
3842 *
3843 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3844 * address stored with the low bits in .x and high bits in .y, .z is a
3845 * size, and .w is an offset. When the final I/O operation is lowered, .w
3846 * is checked against .z and the operation is predicated on the result.
3847 */
3848 nir_address_format_64bit_bounded_global,
3849
3850 /**
3851 * An address format which is comprised of a vec2 where the first
3852 * component is a buffer index and the second is an offset.
3853 */
3854 nir_address_format_32bit_index_offset,
3855
3856 /**
3857 * An address format which is a simple 32-bit offset.
3858 */
3859 nir_address_format_32bit_offset,
3860
3861 /**
3862 * An address format representing a purely logical addressing model. In
3863 * this model, all deref chains must be complete from the dereference
3864 * operation to the variable. Cast derefs are not allowed. These
3865 * addresses will be 32-bit scalars but the format is immaterial because
3866 * you can always chase the chain.
3867 */
3868 nir_address_format_logical,
3869 } nir_address_format;
3870
3871 static inline unsigned
3872 nir_address_format_bit_size(nir_address_format addr_format)
3873 {
3874 switch (addr_format) {
3875 case nir_address_format_32bit_global: return 32;
3876 case nir_address_format_64bit_global: return 64;
3877 case nir_address_format_64bit_bounded_global: return 32;
3878 case nir_address_format_32bit_index_offset: return 32;
3879 case nir_address_format_32bit_offset: return 32;
3880 case nir_address_format_logical: return 32;
3881 }
3882 unreachable("Invalid address format");
3883 }
3884
3885 static inline unsigned
3886 nir_address_format_num_components(nir_address_format addr_format)
3887 {
3888 switch (addr_format) {
3889 case nir_address_format_32bit_global: return 1;
3890 case nir_address_format_64bit_global: return 1;
3891 case nir_address_format_64bit_bounded_global: return 4;
3892 case nir_address_format_32bit_index_offset: return 2;
3893 case nir_address_format_32bit_offset: return 1;
3894 case nir_address_format_logical: return 1;
3895 }
3896 unreachable("Invalid address format");
3897 }
3898
3899 static inline const struct glsl_type *
3900 nir_address_format_to_glsl_type(nir_address_format addr_format)
3901 {
3902 unsigned bit_size = nir_address_format_bit_size(addr_format);
3903 assert(bit_size == 32 || bit_size == 64);
3904 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3905 nir_address_format_num_components(addr_format));
3906 }
3907
3908 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3909
3910 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3911 nir_address_format addr_format);
3912
3913 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3914 nir_address_format addr_format);
3915
3916 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3917 nir_deref_instr *deref,
3918 nir_ssa_def *base_addr,
3919 nir_address_format addr_format);
3920 void nir_lower_explicit_io_instr(struct nir_builder *b,
3921 nir_intrinsic_instr *io_instr,
3922 nir_ssa_def *addr,
3923 nir_address_format addr_format);
3924
3925 bool nir_lower_explicit_io(nir_shader *shader,
3926 nir_variable_mode modes,
3927 nir_address_format);
3928
3929 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3930 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3931
3932 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3933
3934 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3935 bool nir_lower_regs_to_ssa(nir_shader *shader);
3936 bool nir_lower_vars_to_ssa(nir_shader *shader);
3937
3938 bool nir_remove_dead_derefs(nir_shader *shader);
3939 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3940 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3941 bool nir_lower_variable_initializers(nir_shader *shader,
3942 nir_variable_mode modes);
3943
3944 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3945 bool nir_lower_vec_to_movs(nir_shader *shader);
3946 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3947 bool alpha_to_one,
3948 const gl_state_index16 *alpha_ref_state_tokens);
3949 bool nir_lower_alu(nir_shader *shader);
3950
3951 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3952 bool always_precise, bool have_ffma);
3953
3954 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3955 bool nir_lower_bool_to_bitsize(nir_shader *shader);
3956 bool nir_lower_bool_to_float(nir_shader *shader);
3957 bool nir_lower_bool_to_int32(nir_shader *shader);
3958 bool nir_lower_int_to_float(nir_shader *shader);
3959 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3960 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3961 bool nir_lower_phis_to_scalar(nir_shader *shader);
3962 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3963 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3964 bool outputs_only);
3965 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3966 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3967 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3968
3969 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3970 void nir_lower_viewport_transform(nir_shader *shader);
3971 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3972
3973 typedef struct nir_lower_subgroups_options {
3974 uint8_t subgroup_size;
3975 uint8_t ballot_bit_size;
3976 bool lower_to_scalar:1;
3977 bool lower_vote_trivial:1;
3978 bool lower_vote_eq_to_ballot:1;
3979 bool lower_subgroup_masks:1;
3980 bool lower_shuffle:1;
3981 bool lower_shuffle_to_32bit:1;
3982 bool lower_quad:1;
3983 bool lower_quad_broadcast_dynamic:1;
3984 bool lower_quad_broadcast_dynamic_to_const:1;
3985 } nir_lower_subgroups_options;
3986
3987 bool nir_lower_subgroups(nir_shader *shader,
3988 const nir_lower_subgroups_options *options);
3989
3990 bool nir_lower_system_values(nir_shader *shader);
3991
3992 enum PACKED nir_lower_tex_packing {
3993 nir_lower_tex_packing_none = 0,
3994 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3995 * or unsigned ints based on the sampler type
3996 */
3997 nir_lower_tex_packing_16,
3998 /* The sampler returns 1 32-bit word of 4x8 unorm */
3999 nir_lower_tex_packing_8,
4000 };
4001
4002 typedef struct nir_lower_tex_options {
4003 /**
4004 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4005 * sampler types a texture projector is lowered.
4006 */
4007 unsigned lower_txp;
4008
4009 /**
4010 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4011 */
4012 bool lower_txf_offset;
4013
4014 /**
4015 * If true, lower away nir_tex_src_offset for all rect textures.
4016 */
4017 bool lower_rect_offset;
4018
4019 /**
4020 * If true, lower rect textures to 2D, using txs to fetch the
4021 * texture dimensions and dividing the texture coords by the
4022 * texture dims to normalize.
4023 */
4024 bool lower_rect;
4025
4026 /**
4027 * If true, convert yuv to rgb.
4028 */
4029 unsigned lower_y_uv_external;
4030 unsigned lower_y_u_v_external;
4031 unsigned lower_yx_xuxv_external;
4032 unsigned lower_xy_uxvx_external;
4033 unsigned lower_ayuv_external;
4034 unsigned lower_xyuv_external;
4035
4036 /**
4037 * To emulate certain texture wrap modes, this can be used
4038 * to saturate the specified tex coord to [0.0, 1.0]. The
4039 * bits are according to sampler #, ie. if, for example:
4040 *
4041 * (conf->saturate_s & (1 << n))
4042 *
4043 * is true, then the s coord for sampler n is saturated.
4044 *
4045 * Note that clamping must happen *after* projector lowering
4046 * so any projected texture sample instruction with a clamped
4047 * coordinate gets automatically lowered, regardless of the
4048 * 'lower_txp' setting.
4049 */
4050 unsigned saturate_s;
4051 unsigned saturate_t;
4052 unsigned saturate_r;
4053
4054 /* Bitmask of textures that need swizzling.
4055 *
4056 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4057 * swizzles[texture_index] is applied to the result of the texturing
4058 * operation.
4059 */
4060 unsigned swizzle_result;
4061
4062 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4063 * while 4 and 5 represent 0 and 1 respectively.
4064 */
4065 uint8_t swizzles[32][4];
4066
4067 /* Can be used to scale sampled values in range required by the format. */
4068 float scale_factors[32];
4069
4070 /**
4071 * Bitmap of textures that need srgb to linear conversion. If
4072 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4073 * of the texture are lowered to linear.
4074 */
4075 unsigned lower_srgb;
4076
4077 /**
4078 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4079 * LODs to nir_texop_txl.
4080 */
4081 bool lower_tex_without_implicit_lod;
4082
4083 /**
4084 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4085 */
4086 bool lower_txd_cube_map;
4087
4088 /**
4089 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4090 */
4091 bool lower_txd_3d;
4092
4093 /**
4094 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4095 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4096 * with lower_txd_cube_map.
4097 */
4098 bool lower_txd_shadow;
4099
4100 /**
4101 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4102 * Implies lower_txd_cube_map and lower_txd_shadow.
4103 */
4104 bool lower_txd;
4105
4106 /**
4107 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4108 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4109 */
4110 bool lower_txb_shadow_clamp;
4111
4112 /**
4113 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4114 * with nir_texop_txl. This includes cube maps.
4115 */
4116 bool lower_txd_shadow_clamp;
4117
4118 /**
4119 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4120 * with nir_texop_txl. This includes cube maps.
4121 */
4122 bool lower_txd_offset_clamp;
4123
4124 /**
4125 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4126 * sampler is bindless.
4127 */
4128 bool lower_txd_clamp_bindless_sampler;
4129
4130 /**
4131 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4132 * sampler index is not statically determinable to be less than 16.
4133 */
4134 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4135
4136 /**
4137 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4138 * 0-lod followed by a nir_ishr.
4139 */
4140 bool lower_txs_lod;
4141
4142 /**
4143 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4144 * mixed-up tg4 locations.
4145 */
4146 bool lower_tg4_broadcom_swizzle;
4147
4148 /**
4149 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4150 */
4151 bool lower_tg4_offsets;
4152
4153 enum nir_lower_tex_packing lower_tex_packing[32];
4154 } nir_lower_tex_options;
4155
4156 bool nir_lower_tex(nir_shader *shader,
4157 const nir_lower_tex_options *options);
4158
4159 enum nir_lower_non_uniform_access_type {
4160 nir_lower_non_uniform_ubo_access = (1 << 0),
4161 nir_lower_non_uniform_ssbo_access = (1 << 1),
4162 nir_lower_non_uniform_texture_access = (1 << 2),
4163 nir_lower_non_uniform_image_access = (1 << 3),
4164 };
4165
4166 bool nir_lower_non_uniform_access(nir_shader *shader,
4167 enum nir_lower_non_uniform_access_type);
4168
4169 enum nir_lower_idiv_path {
4170 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4171 * the two but it is not exact in some cases (for example, 1091317713u /
4172 * 1034u gives 5209173 instead of 1055432) */
4173 nir_lower_idiv_fast,
4174 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4175 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4176 * the nv50 path and many of them are integer multiplications, so it is
4177 * probably slower. It should always return the correct result, though. */
4178 nir_lower_idiv_precise,
4179 };
4180
4181 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4182
4183 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4184
4185 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4186 bool use_vars,
4187 bool use_clipdist_array,
4188 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4189 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4190 bool use_clipdist_array,
4191 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4192 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4193 bool use_clipdist_array);
4194 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4195
4196 void nir_lower_point_size_mov(nir_shader *shader,
4197 const gl_state_index16 *pointsize_state_tokens);
4198
4199 bool nir_lower_frexp(nir_shader *nir);
4200
4201 void nir_lower_two_sided_color(nir_shader *shader);
4202
4203 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4204
4205 bool nir_lower_flatshade(nir_shader *shader);
4206
4207 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4208 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4209 const gl_state_index16 *uniform_state_tokens);
4210
4211 typedef struct nir_lower_wpos_ytransform_options {
4212 gl_state_index16 state_tokens[STATE_LENGTH];
4213 bool fs_coord_origin_upper_left :1;
4214 bool fs_coord_origin_lower_left :1;
4215 bool fs_coord_pixel_center_integer :1;
4216 bool fs_coord_pixel_center_half_integer :1;
4217 } nir_lower_wpos_ytransform_options;
4218
4219 bool nir_lower_wpos_ytransform(nir_shader *shader,
4220 const nir_lower_wpos_ytransform_options *options);
4221 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4222
4223 bool nir_lower_fb_read(nir_shader *shader);
4224
4225 typedef struct nir_lower_drawpixels_options {
4226 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4227 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4228 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4229 unsigned drawpix_sampler;
4230 unsigned pixelmap_sampler;
4231 bool pixel_maps :1;
4232 bool scale_and_bias :1;
4233 } nir_lower_drawpixels_options;
4234
4235 void nir_lower_drawpixels(nir_shader *shader,
4236 const nir_lower_drawpixels_options *options);
4237
4238 typedef struct nir_lower_bitmap_options {
4239 unsigned sampler;
4240 bool swizzle_xxxx;
4241 } nir_lower_bitmap_options;
4242
4243 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4244
4245 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4246
4247 typedef enum {
4248 nir_lower_int_source_mods = 1 << 0,
4249 nir_lower_float_source_mods = 1 << 1,
4250 nir_lower_triop_abs = 1 << 2,
4251 nir_lower_all_source_mods = (1 << 3) - 1
4252 } nir_lower_to_source_mods_flags;
4253
4254
4255 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4256
4257 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4258
4259 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4260
4261 bool nir_lower_bit_size(nir_shader *shader,
4262 nir_lower_bit_size_callback callback,
4263 void *callback_data);
4264
4265 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4266 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4267
4268 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4269 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4270 nir_lower_doubles_options options);
4271 bool nir_lower_pack(nir_shader *shader);
4272
4273 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4274
4275 typedef enum {
4276 nir_lower_interpolation_at_sample = (1 << 1),
4277 nir_lower_interpolation_at_offset = (1 << 2),
4278 nir_lower_interpolation_centroid = (1 << 3),
4279 nir_lower_interpolation_pixel = (1 << 4),
4280 nir_lower_interpolation_sample = (1 << 5),
4281 } nir_lower_interpolation_options;
4282
4283 bool nir_lower_interpolation(nir_shader *shader,
4284 nir_lower_interpolation_options options);
4285
4286 bool nir_lower_discard_to_demote(nir_shader *shader);
4287
4288 bool nir_normalize_cubemap_coords(nir_shader *shader);
4289
4290 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4291
4292 void nir_loop_analyze_impl(nir_function_impl *impl,
4293 nir_variable_mode indirect_mask);
4294
4295 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4296
4297 bool nir_repair_ssa_impl(nir_function_impl *impl);
4298 bool nir_repair_ssa(nir_shader *shader);
4299
4300 void nir_convert_loop_to_lcssa(nir_loop *loop);
4301 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4302 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4303
4304 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4305 * registers. If false, convert all values (even those not involved in a phi
4306 * node) to registers.
4307 */
4308 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4309
4310 bool nir_lower_phis_to_regs_block(nir_block *block);
4311 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4312 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4313
4314 bool nir_lower_samplers(nir_shader *shader);
4315 bool nir_lower_ssbo(nir_shader *shader);
4316
4317 /* This is here for unit tests. */
4318 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4319
4320 bool nir_opt_comparison_pre(nir_shader *shader);
4321
4322 bool nir_opt_access(nir_shader *shader);
4323 bool nir_opt_algebraic(nir_shader *shader);
4324 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4325 bool nir_opt_algebraic_late(nir_shader *shader);
4326 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4327 bool nir_opt_constant_folding(nir_shader *shader);
4328
4329 /* Try to combine a and b into a. Return true if combination was possible,
4330 * which will result in b being removed by the pass. Return false if
4331 * combination wasn't possible.
4332 */
4333 typedef bool (*nir_combine_memory_barrier_cb)(
4334 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4335
4336 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4337 nir_combine_memory_barrier_cb combine_cb,
4338 void *data);
4339
4340 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4341
4342 bool nir_copy_prop(nir_shader *shader);
4343
4344 bool nir_opt_copy_prop_vars(nir_shader *shader);
4345
4346 bool nir_opt_cse(nir_shader *shader);
4347
4348 bool nir_opt_dce(nir_shader *shader);
4349
4350 bool nir_opt_dead_cf(nir_shader *shader);
4351
4352 bool nir_opt_dead_write_vars(nir_shader *shader);
4353
4354 bool nir_opt_deref_impl(nir_function_impl *impl);
4355 bool nir_opt_deref(nir_shader *shader);
4356
4357 bool nir_opt_find_array_copies(nir_shader *shader);
4358
4359 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4360
4361 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4362
4363 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4364
4365 bool nir_opt_intrinsics(nir_shader *shader);
4366
4367 bool nir_opt_large_constants(nir_shader *shader,
4368 glsl_type_size_align_func size_align,
4369 unsigned threshold);
4370
4371 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4372
4373 typedef enum {
4374 nir_move_const_undef = (1 << 0),
4375 nir_move_load_ubo = (1 << 1),
4376 nir_move_load_input = (1 << 2),
4377 nir_move_comparisons = (1 << 3),
4378 nir_move_copies = (1 << 4),
4379 } nir_move_options;
4380
4381 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4382
4383 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4384
4385 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4386
4387 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4388 bool indirect_load_ok, bool expensive_alu_ok);
4389
4390 bool nir_opt_rematerialize_compares(nir_shader *shader);
4391
4392 bool nir_opt_remove_phis(nir_shader *shader);
4393 bool nir_opt_remove_phis_block(nir_block *block);
4394
4395 bool nir_opt_shrink_load(nir_shader *shader);
4396
4397 bool nir_opt_trivial_continues(nir_shader *shader);
4398
4399 bool nir_opt_undef(nir_shader *shader);
4400
4401 bool nir_opt_vectorize(nir_shader *shader);
4402
4403 bool nir_opt_conditional_discard(nir_shader *shader);
4404
4405 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4406 unsigned num_components, unsigned high_offset,
4407 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4408
4409 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4410 nir_should_vectorize_mem_func callback);
4411
4412 void nir_schedule(nir_shader *shader, int threshold);
4413
4414 void nir_strip(nir_shader *shader);
4415
4416 void nir_sweep(nir_shader *shader);
4417
4418 void nir_remap_dual_slot_attributes(nir_shader *shader,
4419 uint64_t *dual_slot_inputs);
4420 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4421
4422 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4423 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4424
4425 static inline bool
4426 nir_variable_is_in_ubo(const nir_variable *var)
4427 {
4428 return (var->data.mode == nir_var_mem_ubo &&
4429 var->interface_type != NULL);
4430 }
4431
4432 static inline bool
4433 nir_variable_is_in_ssbo(const nir_variable *var)
4434 {
4435 return (var->data.mode == nir_var_mem_ssbo &&
4436 var->interface_type != NULL);
4437 }
4438
4439 static inline bool
4440 nir_variable_is_in_block(const nir_variable *var)
4441 {
4442 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4443 }
4444
4445 #ifdef __cplusplus
4446 } /* extern "C" */
4447 #endif
4448
4449 #endif /* NIR_H */