nir: add helper to copy const_index[]
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #include <stdio.h>
45
46 #ifndef NDEBUG
47 #include "util/debug.h"
48 #endif /* NDEBUG */
49
50 #include "nir_opcodes.h"
51
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
54 #endif
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define NIR_FALSE 0u
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t;
66
67 static inline bool
68 nir_num_components_valid(unsigned num_components)
69 {
70 return (num_components >= 1 &&
71 num_components <= 4) ||
72 num_components == 8 ||
73 num_components == 16;
74 }
75
76 /** Defines a cast function
77 *
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
80 *
81 * Note that you have to be a bit careful as the generated cast function
82 * destroys constness.
83 */
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
88 { \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
91 }
92
93 struct nir_function;
94 struct nir_shader;
95 struct nir_instr;
96 struct nir_builder;
97
98
99 /**
100 * Description of built-in state associated with a uniform
101 *
102 * \sa nir_variable::state_slots
103 */
104 typedef struct {
105 gl_state_index16 tokens[STATE_LENGTH];
106 uint16_t swizzle;
107 } nir_state_slot;
108
109 typedef enum {
110 nir_var_shader_in = (1 << 0),
111 nir_var_shader_out = (1 << 1),
112 nir_var_shader_temp = (1 << 2),
113 nir_var_function_temp = (1 << 3),
114 nir_var_uniform = (1 << 4),
115 nir_var_mem_ubo = (1 << 5),
116 nir_var_system_value = (1 << 6),
117 nir_var_mem_ssbo = (1 << 7),
118 nir_var_mem_shared = (1 << 8),
119 nir_var_mem_global = (1 << 9),
120 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes = 11,
122 nir_var_all = (1 << nir_num_variable_modes) - 1,
123 } nir_variable_mode;
124
125 /**
126 * Rounding modes.
127 */
128 typedef enum {
129 nir_rounding_mode_undef = 0,
130 nir_rounding_mode_rtne = 1, /* round to nearest even */
131 nir_rounding_mode_ru = 2, /* round up */
132 nir_rounding_mode_rd = 3, /* round down */
133 nir_rounding_mode_rtz = 4, /* round towards zero */
134 } nir_rounding_mode;
135
136 typedef union {
137 bool b;
138 float f32;
139 double f64;
140 int8_t i8;
141 uint8_t u8;
142 int16_t i16;
143 uint16_t u16;
144 int32_t i32;
145 uint32_t u32;
146 int64_t i64;
147 uint64_t u64;
148 } nir_const_value;
149
150 #define nir_const_value_to_array(arr, c, components, m) \
151 { \
152 for (unsigned i = 0; i < components; ++i) \
153 arr[i] = c[i].m; \
154 } while (false)
155
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
158 {
159 nir_const_value v;
160 memset(&v, 0, sizeof(v));
161
162 switch (bit_size) {
163 case 1: v.b = x; break;
164 case 8: v.u8 = x; break;
165 case 16: v.u16 = x; break;
166 case 32: v.u32 = x; break;
167 case 64: v.u64 = x; break;
168 default:
169 unreachable("Invalid bit size");
170 }
171
172 return v;
173 }
174
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i, unsigned bit_size)
177 {
178 nir_const_value v;
179 memset(&v, 0, sizeof(v));
180
181 assert(bit_size <= 64);
182 if (bit_size < 64) {
183 assert(i >= (-(1ll << (bit_size - 1))));
184 assert(i < (1ll << (bit_size - 1)));
185 }
186
187 return nir_const_value_for_raw_uint(i, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
192 {
193 nir_const_value v;
194 memset(&v, 0, sizeof(v));
195
196 assert(bit_size <= 64);
197 if (bit_size < 64)
198 assert(u < (1ull << bit_size));
199
200 return nir_const_value_for_raw_uint(u, bit_size);
201 }
202
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b, unsigned bit_size)
205 {
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b, bit_size);
208 }
209
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
212
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
215 {
216 switch (bit_size) {
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value.b;
219 case 8: return value.i8;
220 case 16: return value.i16;
221 case 32: return value.i32;
222 case 64: return value.i64;
223 default:
224 unreachable("Invalid bit size");
225 }
226 }
227
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
230 {
231 switch (bit_size) {
232 case 1: return value.b;
233 case 8: return value.u8;
234 case 16: return value.u16;
235 case 32: return value.u32;
236 case 64: return value.u64;
237 default:
238 unreachable("Invalid bit size");
239 }
240 }
241
242 static inline bool
243 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
244 {
245 int64_t i = nir_const_value_as_int(value, bit_size);
246
247 /* Booleans of any size use 0/-1 convention */
248 assert(i == 0 || i == -1);
249
250 return i;
251 }
252
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
255
256 typedef struct nir_constant {
257 /**
258 * Value of the constant.
259 *
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
263 */
264 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
265
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
268 */
269 unsigned num_elements;
270
271 /* Array elements / Structure Fields */
272 struct nir_constant **elements;
273 } nir_constant;
274
275 /**
276 * \brief Layout qualifiers for gl_FragDepth.
277 *
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
280 */
281 typedef enum {
282 nir_depth_layout_none, /**< No depth layout is specified. */
283 nir_depth_layout_any,
284 nir_depth_layout_greater,
285 nir_depth_layout_less,
286 nir_depth_layout_unchanged
287 } nir_depth_layout;
288
289 /**
290 * Enum keeping track of how a variable was declared.
291 */
292 typedef enum {
293 /**
294 * Normal declaration.
295 */
296 nir_var_declared_normally = 0,
297
298 /**
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
301 */
302 nir_var_hidden,
303 } nir_var_declaration_type;
304
305 /**
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
308 */
309
310 typedef struct nir_variable {
311 struct exec_node node;
312
313 /**
314 * Declared type of the variable
315 */
316 const struct glsl_type *type;
317
318 /**
319 * Declared name of the variable
320 */
321 char *name;
322
323 struct nir_variable_data {
324 /**
325 * Storage class of the variable.
326 *
327 * \sa nir_variable_mode
328 */
329 nir_variable_mode mode:11;
330
331 /**
332 * Is the variable read-only?
333 *
334 * This is set for variables declared as \c const, shader inputs,
335 * and uniforms.
336 */
337 unsigned read_only:1;
338 unsigned centroid:1;
339 unsigned sample:1;
340 unsigned patch:1;
341 unsigned invariant:1;
342
343 /**
344 * Precision qualifier.
345 *
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
348 *
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
353 */
354 unsigned precision:2;
355
356 /**
357 * Can this variable be coalesced with another?
358 *
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
364 */
365 unsigned cannot_coalesce:1;
366
367 /**
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
371 *
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
374 */
375 unsigned always_active_io:1;
376
377 /**
378 * Interpolation mode for shader inputs / outputs
379 *
380 * \sa glsl_interp_mode
381 */
382 unsigned interpolation:3;
383
384 /**
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
390 */
391 unsigned location_frac:2;
392
393 /**
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
397 */
398 unsigned compact:1;
399
400 /**
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
404 */
405 unsigned fb_fetch_output:1;
406
407 /**
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
410 */
411 unsigned bindless:1;
412
413 /**
414 * Was an explicit binding set in the shader?
415 */
416 unsigned explicit_binding:1;
417
418 /**
419 * Was the location explicitly set in the shader?
420 *
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
423 * no effect).
424 */
425 unsigned explicit_location:1;
426
427 /**
428 * Was a transfer feedback buffer set in the shader?
429 */
430 unsigned explicit_xfb_buffer:1;
431
432 /**
433 * Was a transfer feedback stride set in the shader?
434 */
435 unsigned explicit_xfb_stride:1;
436
437 /**
438 * Was an explicit offset set in the shader?
439 */
440 unsigned explicit_offset:1;
441
442 /**
443 * Layout of the matrix. Uses glsl_matrix_layout values.
444 */
445 unsigned matrix_layout:2;
446
447 /**
448 * Non-zero if this variable was created by lowering a named interface
449 * block.
450 */
451 unsigned from_named_ifc_block:1;
452
453 /**
454 * How the variable was declared. See nir_var_declaration_type.
455 *
456 * This is used to detect variables generated by the compiler, so should
457 * not be visible via the API.
458 */
459 unsigned how_declared:2;
460
461 /**
462 * Is this variable per-view? If so, we know it must be an array with
463 * size corresponding to the number of views.
464 */
465 unsigned per_view:1;
466
467 /**
468 * \brief Layout qualifier for gl_FragDepth.
469 *
470 * This is not equal to \c ir_depth_layout_none if and only if this
471 * variable is \c gl_FragDepth and a layout qualifier is specified.
472 */
473 nir_depth_layout depth_layout:3;
474
475 /**
476 * Vertex stream output identifier.
477 *
478 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
479 * indicate the stream of the i-th component.
480 */
481 unsigned stream:9;
482
483 /**
484 * Access flags for memory variables (SSBO/global), image uniforms, and
485 * bindless images in uniforms/inputs/outputs.
486 */
487 enum gl_access_qualifier access:8;
488
489 /**
490 * Descriptor set binding for sampler or UBO.
491 */
492 unsigned descriptor_set:5;
493
494 /**
495 * output index for dual source blending.
496 */
497 unsigned index;
498
499 /**
500 * Initial binding point for a sampler or UBO.
501 *
502 * For array types, this represents the binding point for the first element.
503 */
504 unsigned binding;
505
506 /**
507 * Storage location of the base of this variable
508 *
509 * The precise meaning of this field depends on the nature of the variable.
510 *
511 * - Vertex shader input: one of the values from \c gl_vert_attrib.
512 * - Vertex shader output: one of the values from \c gl_varying_slot.
513 * - Geometry shader input: one of the values from \c gl_varying_slot.
514 * - Geometry shader output: one of the values from \c gl_varying_slot.
515 * - Fragment shader input: one of the values from \c gl_varying_slot.
516 * - Fragment shader output: one of the values from \c gl_frag_result.
517 * - Uniforms: Per-stage uniform slot number for default uniform block.
518 * - Uniforms: Index within the uniform block definition for UBO members.
519 * - Non-UBO Uniforms: uniform slot number.
520 * - Other: This field is not currently used.
521 *
522 * If the variable is a uniform, shader input, or shader output, and the
523 * slot has not been assigned, the value will be -1.
524 */
525 int location;
526
527 /**
528 * The actual location of the variable in the IR. Only valid for inputs,
529 * outputs, and uniforms (including samplers and images).
530 */
531 unsigned driver_location;
532
533 /**
534 * Location an atomic counter or transform feedback is stored at.
535 */
536 unsigned offset;
537
538 union {
539 struct {
540 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
541 enum pipe_format format;
542 } image;
543
544 struct {
545 /**
546 * Transform feedback buffer.
547 */
548 uint16_t buffer:2;
549
550 /**
551 * Transform feedback stride.
552 */
553 uint16_t stride;
554 } xfb;
555 };
556 } data;
557
558 /**
559 * Identifier for this variable generated by nir_index_vars() that is unique
560 * among other variables in the same exec_list.
561 */
562 unsigned index;
563
564 /* Number of nir_variable_data members */
565 uint16_t num_members;
566
567 /**
568 * Built-in state that backs this uniform
569 *
570 * Once set at variable creation, \c state_slots must remain invariant.
571 * This is because, ideally, this array would be shared by all clones of
572 * this variable in the IR tree. In other words, we'd really like for it
573 * to be a fly-weight.
574 *
575 * If the variable is not a uniform, \c num_state_slots will be zero and
576 * \c state_slots will be \c NULL.
577 */
578 /*@{*/
579 uint16_t num_state_slots; /**< Number of state slots used */
580 nir_state_slot *state_slots; /**< State descriptors. */
581 /*@}*/
582
583 /**
584 * Constant expression assigned in the initializer of the variable
585 *
586 * This field should only be used temporarily by creators of NIR shaders
587 * and then lower_constant_initializers can be used to get rid of them.
588 * Most of the rest of NIR ignores this field or asserts that it's NULL.
589 */
590 nir_constant *constant_initializer;
591
592 /**
593 * Global variable assigned in the initializer of the variable
594 * This field should only be used temporarily by creators of NIR shaders
595 * and then lower_constant_initializers can be used to get rid of them.
596 * Most of the rest of NIR ignores this field or asserts that it's NULL.
597 */
598 struct nir_variable *pointer_initializer;
599
600 /**
601 * For variables that are in an interface block or are an instance of an
602 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
603 *
604 * \sa ir_variable::location
605 */
606 const struct glsl_type *interface_type;
607
608 /**
609 * Description of per-member data for per-member struct variables
610 *
611 * This is used for variables which are actually an amalgamation of
612 * multiple entities such as a struct of built-in values or a struct of
613 * inputs each with their own layout specifier. This is only allowed on
614 * variables with a struct or array of array of struct type.
615 */
616 struct nir_variable_data *members;
617 } nir_variable;
618
619 #define nir_foreach_variable(var, var_list) \
620 foreach_list_typed(nir_variable, var, node, var_list)
621
622 #define nir_foreach_variable_safe(var, var_list) \
623 foreach_list_typed_safe(nir_variable, var, node, var_list)
624
625 static inline bool
626 nir_variable_is_global(const nir_variable *var)
627 {
628 return var->data.mode != nir_var_function_temp;
629 }
630
631 typedef struct nir_register {
632 struct exec_node node;
633
634 unsigned num_components; /** < number of vector components */
635 unsigned num_array_elems; /** < size of array (0 for no array) */
636
637 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
638 uint8_t bit_size;
639
640 /** generic register index. */
641 unsigned index;
642
643 /** only for debug purposes, can be NULL */
644 const char *name;
645
646 /** set of nir_srcs where this register is used (read from) */
647 struct list_head uses;
648
649 /** set of nir_dests where this register is defined (written to) */
650 struct list_head defs;
651
652 /** set of nir_ifs where this register is used as a condition */
653 struct list_head if_uses;
654 } nir_register;
655
656 #define nir_foreach_register(reg, reg_list) \
657 foreach_list_typed(nir_register, reg, node, reg_list)
658 #define nir_foreach_register_safe(reg, reg_list) \
659 foreach_list_typed_safe(nir_register, reg, node, reg_list)
660
661 typedef enum PACKED {
662 nir_instr_type_alu,
663 nir_instr_type_deref,
664 nir_instr_type_call,
665 nir_instr_type_tex,
666 nir_instr_type_intrinsic,
667 nir_instr_type_load_const,
668 nir_instr_type_jump,
669 nir_instr_type_ssa_undef,
670 nir_instr_type_phi,
671 nir_instr_type_parallel_copy,
672 } nir_instr_type;
673
674 typedef struct nir_instr {
675 struct exec_node node;
676 struct nir_block *block;
677 nir_instr_type type;
678
679 /* A temporary for optimization and analysis passes to use for storing
680 * flags. For instance, DCE uses this to store the "dead/live" info.
681 */
682 uint8_t pass_flags;
683
684 /** generic instruction index. */
685 unsigned index;
686 } nir_instr;
687
688 static inline nir_instr *
689 nir_instr_next(nir_instr *instr)
690 {
691 struct exec_node *next = exec_node_get_next(&instr->node);
692 if (exec_node_is_tail_sentinel(next))
693 return NULL;
694 else
695 return exec_node_data(nir_instr, next, node);
696 }
697
698 static inline nir_instr *
699 nir_instr_prev(nir_instr *instr)
700 {
701 struct exec_node *prev = exec_node_get_prev(&instr->node);
702 if (exec_node_is_head_sentinel(prev))
703 return NULL;
704 else
705 return exec_node_data(nir_instr, prev, node);
706 }
707
708 static inline bool
709 nir_instr_is_first(const nir_instr *instr)
710 {
711 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
712 }
713
714 static inline bool
715 nir_instr_is_last(const nir_instr *instr)
716 {
717 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
718 }
719
720 typedef struct nir_ssa_def {
721 /** for debugging only, can be NULL */
722 const char* name;
723
724 /** generic SSA definition index. */
725 unsigned index;
726
727 /** Index into the live_in and live_out bitfields */
728 unsigned live_index;
729
730 /** Instruction which produces this SSA value. */
731 nir_instr *parent_instr;
732
733 /** set of nir_instrs where this register is used (read from) */
734 struct list_head uses;
735
736 /** set of nir_ifs where this register is used as a condition */
737 struct list_head if_uses;
738
739 uint8_t num_components;
740
741 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
742 uint8_t bit_size;
743
744 /**
745 * True if this SSA value may have different values in different SIMD
746 * invocations of the shader. This is set by nir_divergence_analysis.
747 */
748 bool divergent;
749 } nir_ssa_def;
750
751 struct nir_src;
752
753 typedef struct {
754 nir_register *reg;
755 struct nir_src *indirect; /** < NULL for no indirect offset */
756 unsigned base_offset;
757
758 /* TODO use-def chain goes here */
759 } nir_reg_src;
760
761 typedef struct {
762 nir_instr *parent_instr;
763 struct list_head def_link;
764
765 nir_register *reg;
766 struct nir_src *indirect; /** < NULL for no indirect offset */
767 unsigned base_offset;
768
769 /* TODO def-use chain goes here */
770 } nir_reg_dest;
771
772 struct nir_if;
773
774 typedef struct nir_src {
775 union {
776 /** Instruction that consumes this value as a source. */
777 nir_instr *parent_instr;
778 struct nir_if *parent_if;
779 };
780
781 struct list_head use_link;
782
783 union {
784 nir_reg_src reg;
785 nir_ssa_def *ssa;
786 };
787
788 bool is_ssa;
789 } nir_src;
790
791 static inline nir_src
792 nir_src_init(void)
793 {
794 nir_src src = { { NULL } };
795 return src;
796 }
797
798 #define NIR_SRC_INIT nir_src_init()
799
800 #define nir_foreach_use(src, reg_or_ssa_def) \
801 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
802
803 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
804 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
805
806 #define nir_foreach_if_use(src, reg_or_ssa_def) \
807 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
808
809 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
810 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
811
812 typedef struct {
813 union {
814 nir_reg_dest reg;
815 nir_ssa_def ssa;
816 };
817
818 bool is_ssa;
819 } nir_dest;
820
821 static inline nir_dest
822 nir_dest_init(void)
823 {
824 nir_dest dest = { { { NULL } } };
825 return dest;
826 }
827
828 #define NIR_DEST_INIT nir_dest_init()
829
830 #define nir_foreach_def(dest, reg) \
831 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
832
833 #define nir_foreach_def_safe(dest, reg) \
834 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
835
836 static inline nir_src
837 nir_src_for_ssa(nir_ssa_def *def)
838 {
839 nir_src src = NIR_SRC_INIT;
840
841 src.is_ssa = true;
842 src.ssa = def;
843
844 return src;
845 }
846
847 static inline nir_src
848 nir_src_for_reg(nir_register *reg)
849 {
850 nir_src src = NIR_SRC_INIT;
851
852 src.is_ssa = false;
853 src.reg.reg = reg;
854 src.reg.indirect = NULL;
855 src.reg.base_offset = 0;
856
857 return src;
858 }
859
860 static inline nir_dest
861 nir_dest_for_reg(nir_register *reg)
862 {
863 nir_dest dest = NIR_DEST_INIT;
864
865 dest.reg.reg = reg;
866
867 return dest;
868 }
869
870 static inline unsigned
871 nir_src_bit_size(nir_src src)
872 {
873 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
874 }
875
876 static inline unsigned
877 nir_src_num_components(nir_src src)
878 {
879 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
880 }
881
882 static inline bool
883 nir_src_is_const(nir_src src)
884 {
885 return src.is_ssa &&
886 src.ssa->parent_instr->type == nir_instr_type_load_const;
887 }
888
889 static inline bool
890 nir_src_is_divergent(nir_src src)
891 {
892 assert(src.is_ssa);
893 return src.ssa->divergent;
894 }
895
896 static inline unsigned
897 nir_dest_bit_size(nir_dest dest)
898 {
899 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
900 }
901
902 static inline unsigned
903 nir_dest_num_components(nir_dest dest)
904 {
905 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
906 }
907
908 static inline bool
909 nir_dest_is_divergent(nir_dest dest)
910 {
911 assert(dest.is_ssa);
912 return dest.ssa.divergent;
913 }
914
915 /* Are all components the same, ie. .xxxx */
916 static inline bool
917 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
918 {
919 for (unsigned i = 1; i < nr_comp; i++)
920 if (swiz[i] != swiz[0])
921 return false;
922 return true;
923 }
924
925 /* Are all components sequential, ie. .yzw */
926 static inline bool
927 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
928 {
929 for (unsigned i = 1; i < nr_comp; i++)
930 if (swiz[i] != (swiz[0] + i))
931 return false;
932 return true;
933 }
934
935 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
936 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
937
938 typedef struct {
939 nir_src src;
940
941 /**
942 * \name input modifiers
943 */
944 /*@{*/
945 /**
946 * For inputs interpreted as floating point, flips the sign bit. For
947 * inputs interpreted as integers, performs the two's complement negation.
948 */
949 bool negate;
950
951 /**
952 * Clears the sign bit for floating point values, and computes the integer
953 * absolute value for integers. Note that the negate modifier acts after
954 * the absolute value modifier, therefore if both are set then all inputs
955 * will become negative.
956 */
957 bool abs;
958 /*@}*/
959
960 /**
961 * For each input component, says which component of the register it is
962 * chosen from. Note that which elements of the swizzle are used and which
963 * are ignored are based on the write mask for most opcodes - for example,
964 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
965 * a swizzle of {2, x, 1, 0} where x means "don't care."
966 */
967 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
968 } nir_alu_src;
969
970 typedef struct {
971 nir_dest dest;
972
973 /**
974 * \name saturate output modifier
975 *
976 * Only valid for opcodes that output floating-point numbers. Clamps the
977 * output to between 0.0 and 1.0 inclusive.
978 */
979
980 bool saturate;
981
982 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
983 } nir_alu_dest;
984
985 /** NIR sized and unsized types
986 *
987 * The values in this enum are carefully chosen so that the sized type is
988 * just the unsized type OR the number of bits.
989 */
990 typedef enum {
991 nir_type_invalid = 0, /* Not a valid type */
992 nir_type_int = 2,
993 nir_type_uint = 4,
994 nir_type_bool = 6,
995 nir_type_float = 128,
996 nir_type_bool1 = 1 | nir_type_bool,
997 nir_type_bool8 = 8 | nir_type_bool,
998 nir_type_bool16 = 16 | nir_type_bool,
999 nir_type_bool32 = 32 | nir_type_bool,
1000 nir_type_int1 = 1 | nir_type_int,
1001 nir_type_int8 = 8 | nir_type_int,
1002 nir_type_int16 = 16 | nir_type_int,
1003 nir_type_int32 = 32 | nir_type_int,
1004 nir_type_int64 = 64 | nir_type_int,
1005 nir_type_uint1 = 1 | nir_type_uint,
1006 nir_type_uint8 = 8 | nir_type_uint,
1007 nir_type_uint16 = 16 | nir_type_uint,
1008 nir_type_uint32 = 32 | nir_type_uint,
1009 nir_type_uint64 = 64 | nir_type_uint,
1010 nir_type_float16 = 16 | nir_type_float,
1011 nir_type_float32 = 32 | nir_type_float,
1012 nir_type_float64 = 64 | nir_type_float,
1013 } nir_alu_type;
1014
1015 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1016 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1017
1018 static inline unsigned
1019 nir_alu_type_get_type_size(nir_alu_type type)
1020 {
1021 return type & NIR_ALU_TYPE_SIZE_MASK;
1022 }
1023
1024 static inline unsigned
1025 nir_alu_type_get_base_type(nir_alu_type type)
1026 {
1027 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
1028 }
1029
1030 static inline nir_alu_type
1031 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1032 {
1033 switch (base_type) {
1034 case GLSL_TYPE_BOOL:
1035 return nir_type_bool1;
1036 break;
1037 case GLSL_TYPE_UINT:
1038 return nir_type_uint32;
1039 break;
1040 case GLSL_TYPE_INT:
1041 return nir_type_int32;
1042 break;
1043 case GLSL_TYPE_UINT16:
1044 return nir_type_uint16;
1045 break;
1046 case GLSL_TYPE_INT16:
1047 return nir_type_int16;
1048 break;
1049 case GLSL_TYPE_UINT8:
1050 return nir_type_uint8;
1051 case GLSL_TYPE_INT8:
1052 return nir_type_int8;
1053 case GLSL_TYPE_UINT64:
1054 return nir_type_uint64;
1055 break;
1056 case GLSL_TYPE_INT64:
1057 return nir_type_int64;
1058 break;
1059 case GLSL_TYPE_FLOAT:
1060 return nir_type_float32;
1061 break;
1062 case GLSL_TYPE_FLOAT16:
1063 return nir_type_float16;
1064 break;
1065 case GLSL_TYPE_DOUBLE:
1066 return nir_type_float64;
1067 break;
1068
1069 case GLSL_TYPE_SAMPLER:
1070 case GLSL_TYPE_IMAGE:
1071 case GLSL_TYPE_ATOMIC_UINT:
1072 case GLSL_TYPE_STRUCT:
1073 case GLSL_TYPE_INTERFACE:
1074 case GLSL_TYPE_ARRAY:
1075 case GLSL_TYPE_VOID:
1076 case GLSL_TYPE_SUBROUTINE:
1077 case GLSL_TYPE_FUNCTION:
1078 case GLSL_TYPE_ERROR:
1079 return nir_type_invalid;
1080 }
1081
1082 unreachable("unknown type");
1083 }
1084
1085 static inline nir_alu_type
1086 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1087 {
1088 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1089 }
1090
1091 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1092 nir_rounding_mode rnd);
1093
1094 static inline nir_op
1095 nir_op_vec(unsigned components)
1096 {
1097 switch (components) {
1098 case 1: return nir_op_mov;
1099 case 2: return nir_op_vec2;
1100 case 3: return nir_op_vec3;
1101 case 4: return nir_op_vec4;
1102 case 8: return nir_op_vec8;
1103 case 16: return nir_op_vec16;
1104 default: unreachable("bad component count");
1105 }
1106 }
1107
1108 static inline bool
1109 nir_op_is_vec(nir_op op)
1110 {
1111 switch (op) {
1112 case nir_op_mov:
1113 case nir_op_vec2:
1114 case nir_op_vec3:
1115 case nir_op_vec4:
1116 case nir_op_vec8:
1117 case nir_op_vec16:
1118 return true;
1119 default:
1120 return false;
1121 }
1122 }
1123
1124 static inline bool
1125 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1126 {
1127 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1128 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1129 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1130 }
1131
1132 static inline bool
1133 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1134 {
1135 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1136 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1137 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1138 }
1139
1140 static inline bool
1141 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1142 {
1143 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1144 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1145 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1146 }
1147
1148 static inline bool
1149 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1150 {
1151 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1152 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1153 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1154 }
1155
1156 static inline bool
1157 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1158 {
1159 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1160 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1161 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1162 }
1163
1164 static inline bool
1165 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1166 {
1167 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1168 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1169 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1170 }
1171
1172 static inline bool
1173 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1174 {
1175 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1176 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1177 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1178 }
1179
1180 static inline nir_rounding_mode
1181 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1182 nir_alu_type type)
1183 {
1184 if (nir_alu_type_get_base_type(type) != nir_type_float)
1185 return nir_rounding_mode_undef;
1186
1187 unsigned bit_size = nir_alu_type_get_type_size(type);
1188
1189 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1190 return nir_rounding_mode_rtz;
1191 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1192 return nir_rounding_mode_rtne;
1193 return nir_rounding_mode_undef;
1194 }
1195
1196 static inline bool
1197 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1198 {
1199 bool result =
1200 nir_has_any_rounding_mode_rtne(execution_mode) ||
1201 nir_has_any_rounding_mode_rtz(execution_mode);
1202 return result;
1203 }
1204
1205 typedef enum {
1206 /**
1207 * Operation where the first two sources are commutative.
1208 *
1209 * For 2-source operations, this just mathematical commutativity. Some
1210 * 3-source operations, like ffma, are only commutative in the first two
1211 * sources.
1212 */
1213 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1214 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1215 } nir_op_algebraic_property;
1216
1217 typedef struct {
1218 const char *name;
1219
1220 unsigned num_inputs;
1221
1222 /**
1223 * The number of components in the output
1224 *
1225 * If non-zero, this is the size of the output and input sizes are
1226 * explicitly given; swizzle and writemask are still in effect, but if
1227 * the output component is masked out, then the input component may
1228 * still be in use.
1229 *
1230 * If zero, the opcode acts in the standard, per-component manner; the
1231 * operation is performed on each component (except the ones that are
1232 * masked out) with the input being taken from the input swizzle for
1233 * that component.
1234 *
1235 * The size of some of the inputs may be given (i.e. non-zero) even
1236 * though output_size is zero; in that case, the inputs with a zero
1237 * size act per-component, while the inputs with non-zero size don't.
1238 */
1239 unsigned output_size;
1240
1241 /**
1242 * The type of vector that the instruction outputs. Note that the
1243 * staurate modifier is only allowed on outputs with the float type.
1244 */
1245
1246 nir_alu_type output_type;
1247
1248 /**
1249 * The number of components in each input
1250 */
1251 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1252
1253 /**
1254 * The type of vector that each input takes. Note that negate and
1255 * absolute value are only allowed on inputs with int or float type and
1256 * behave differently on the two.
1257 */
1258 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1259
1260 nir_op_algebraic_property algebraic_properties;
1261
1262 /* Whether this represents a numeric conversion opcode */
1263 bool is_conversion;
1264 } nir_op_info;
1265
1266 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1267
1268 typedef struct nir_alu_instr {
1269 nir_instr instr;
1270 nir_op op;
1271
1272 /** Indicates that this ALU instruction generates an exact value
1273 *
1274 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1275 * really equivalent to either. This indicates that the value generated by
1276 * this operation is high-precision and any code transformations that touch
1277 * it must ensure that the resulting value is bit-for-bit identical to the
1278 * original.
1279 */
1280 bool exact:1;
1281
1282 /**
1283 * Indicates that this instruction do not cause wrapping to occur, in the
1284 * form of overflow or underflow.
1285 */
1286 bool no_signed_wrap:1;
1287 bool no_unsigned_wrap:1;
1288
1289 nir_alu_dest dest;
1290 nir_alu_src src[];
1291 } nir_alu_instr;
1292
1293 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1294 nir_alu_instr *instr);
1295 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1296 nir_alu_instr *instr);
1297
1298 /* is this source channel used? */
1299 static inline bool
1300 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1301 unsigned channel)
1302 {
1303 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1304 return channel < nir_op_infos[instr->op].input_sizes[src];
1305
1306 return (instr->dest.write_mask >> channel) & 1;
1307 }
1308
1309 static inline nir_component_mask_t
1310 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1311 {
1312 nir_component_mask_t read_mask = 0;
1313 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1314 if (!nir_alu_instr_channel_used(instr, src, c))
1315 continue;
1316
1317 read_mask |= (1 << instr->src[src].swizzle[c]);
1318 }
1319 return read_mask;
1320 }
1321
1322 /**
1323 * Get the number of channels used for a source
1324 */
1325 static inline unsigned
1326 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1327 {
1328 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1329 return nir_op_infos[instr->op].input_sizes[src];
1330
1331 return nir_dest_num_components(instr->dest.dest);
1332 }
1333
1334 static inline bool
1335 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1336 {
1337 switch (instr->op) {
1338 case nir_op_flt:
1339 case nir_op_fge:
1340 case nir_op_feq:
1341 case nir_op_fne:
1342 case nir_op_ilt:
1343 case nir_op_ult:
1344 case nir_op_ige:
1345 case nir_op_uge:
1346 case nir_op_ieq:
1347 case nir_op_ine:
1348 case nir_op_i2b1:
1349 case nir_op_f2b1:
1350 case nir_op_inot:
1351 return true;
1352 default:
1353 return false;
1354 }
1355 }
1356
1357 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1358 nir_alu_type full_type);
1359
1360 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1361 unsigned src1, unsigned src2);
1362
1363 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1364 const nir_alu_instr *alu2,
1365 unsigned src1, unsigned src2);
1366
1367 typedef enum {
1368 nir_deref_type_var,
1369 nir_deref_type_array,
1370 nir_deref_type_array_wildcard,
1371 nir_deref_type_ptr_as_array,
1372 nir_deref_type_struct,
1373 nir_deref_type_cast,
1374 } nir_deref_type;
1375
1376 typedef struct {
1377 nir_instr instr;
1378
1379 /** The type of this deref instruction */
1380 nir_deref_type deref_type;
1381
1382 /** The mode of the underlying variable */
1383 nir_variable_mode mode;
1384
1385 /** The dereferenced type of the resulting pointer value */
1386 const struct glsl_type *type;
1387
1388 union {
1389 /** Variable being dereferenced if deref_type is a deref_var */
1390 nir_variable *var;
1391
1392 /** Parent deref if deref_type is not deref_var */
1393 nir_src parent;
1394 };
1395
1396 /** Additional deref parameters */
1397 union {
1398 struct {
1399 nir_src index;
1400 } arr;
1401
1402 struct {
1403 unsigned index;
1404 } strct;
1405
1406 struct {
1407 unsigned ptr_stride;
1408 } cast;
1409 };
1410
1411 /** Destination to store the resulting "pointer" */
1412 nir_dest dest;
1413 } nir_deref_instr;
1414
1415 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1416
1417 static inline nir_deref_instr *
1418 nir_deref_instr_parent(const nir_deref_instr *instr)
1419 {
1420 if (instr->deref_type == nir_deref_type_var)
1421 return NULL;
1422 else
1423 return nir_src_as_deref(instr->parent);
1424 }
1425
1426 static inline nir_variable *
1427 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1428 {
1429 while (instr->deref_type != nir_deref_type_var) {
1430 if (instr->deref_type == nir_deref_type_cast)
1431 return NULL;
1432
1433 instr = nir_deref_instr_parent(instr);
1434 }
1435
1436 return instr->var;
1437 }
1438
1439 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1440 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1441 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1442
1443 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1444
1445 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1446
1447 typedef struct {
1448 nir_instr instr;
1449
1450 struct nir_function *callee;
1451
1452 unsigned num_params;
1453 nir_src params[];
1454 } nir_call_instr;
1455
1456 #include "nir_intrinsics.h"
1457
1458 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1459
1460 /** Represents an intrinsic
1461 *
1462 * An intrinsic is an instruction type for handling things that are
1463 * more-or-less regular operations but don't just consume and produce SSA
1464 * values like ALU operations do. Intrinsics are not for things that have
1465 * special semantic meaning such as phi nodes and parallel copies.
1466 * Examples of intrinsics include variable load/store operations, system
1467 * value loads, and the like. Even though texturing more-or-less falls
1468 * under this category, texturing is its own instruction type because
1469 * trying to represent texturing with intrinsics would lead to a
1470 * combinatorial explosion of intrinsic opcodes.
1471 *
1472 * By having a single instruction type for handling a lot of different
1473 * cases, optimization passes can look for intrinsics and, for the most
1474 * part, completely ignore them. Each intrinsic type also has a few
1475 * possible flags that govern whether or not they can be reordered or
1476 * eliminated. That way passes like dead code elimination can still work
1477 * on intrisics without understanding the meaning of each.
1478 *
1479 * Each intrinsic has some number of constant indices, some number of
1480 * variables, and some number of sources. What these sources, variables,
1481 * and indices mean depends on the intrinsic and is documented with the
1482 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1483 * instructions are the only types of instruction that can operate on
1484 * variables.
1485 */
1486 typedef struct {
1487 nir_instr instr;
1488
1489 nir_intrinsic_op intrinsic;
1490
1491 nir_dest dest;
1492
1493 /** number of components if this is a vectorized intrinsic
1494 *
1495 * Similarly to ALU operations, some intrinsics are vectorized.
1496 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1497 * For vectorized intrinsics, the num_components field specifies the
1498 * number of destination components and the number of source components
1499 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1500 */
1501 uint8_t num_components;
1502
1503 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1504
1505 nir_src src[];
1506 } nir_intrinsic_instr;
1507
1508 static inline nir_variable *
1509 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1510 {
1511 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1512 }
1513
1514 typedef enum {
1515 /* Memory ordering. */
1516 NIR_MEMORY_ACQUIRE = 1 << 0,
1517 NIR_MEMORY_RELEASE = 1 << 1,
1518 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1519
1520 /* Memory visibility operations. */
1521 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1522 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1523 } nir_memory_semantics;
1524
1525 typedef enum {
1526 NIR_SCOPE_INVOCATION,
1527 NIR_SCOPE_SUBGROUP,
1528 NIR_SCOPE_WORKGROUP,
1529 NIR_SCOPE_QUEUE_FAMILY,
1530 NIR_SCOPE_DEVICE,
1531 } nir_scope;
1532
1533 /**
1534 * \name NIR intrinsics semantic flags
1535 *
1536 * information about what the compiler can do with the intrinsics.
1537 *
1538 * \sa nir_intrinsic_info::flags
1539 */
1540 typedef enum {
1541 /**
1542 * whether the intrinsic can be safely eliminated if none of its output
1543 * value is not being used.
1544 */
1545 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1546
1547 /**
1548 * Whether the intrinsic can be reordered with respect to any other
1549 * intrinsic, i.e. whether the only reordering dependencies of the
1550 * intrinsic are due to the register reads/writes.
1551 */
1552 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1553 } nir_intrinsic_semantic_flag;
1554
1555 /**
1556 * \name NIR intrinsics const-index flag
1557 *
1558 * Indicates the usage of a const_index slot.
1559 *
1560 * \sa nir_intrinsic_info::index_map
1561 */
1562 typedef enum {
1563 /**
1564 * Generally instructions that take a offset src argument, can encode
1565 * a constant 'base' value which is added to the offset.
1566 */
1567 NIR_INTRINSIC_BASE = 1,
1568
1569 /**
1570 * For store instructions, a writemask for the store.
1571 */
1572 NIR_INTRINSIC_WRMASK,
1573
1574 /**
1575 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1576 */
1577 NIR_INTRINSIC_STREAM_ID,
1578
1579 /**
1580 * The clip-plane id for load_user_clip_plane intrinsic.
1581 */
1582 NIR_INTRINSIC_UCP_ID,
1583
1584 /**
1585 * The amount of data, starting from BASE, that this instruction may
1586 * access. This is used to provide bounds if the offset is not constant.
1587 */
1588 NIR_INTRINSIC_RANGE,
1589
1590 /**
1591 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1592 */
1593 NIR_INTRINSIC_DESC_SET,
1594
1595 /**
1596 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1597 */
1598 NIR_INTRINSIC_BINDING,
1599
1600 /**
1601 * Component offset.
1602 */
1603 NIR_INTRINSIC_COMPONENT,
1604
1605 /**
1606 * Interpolation mode (only meaningful for FS inputs).
1607 */
1608 NIR_INTRINSIC_INTERP_MODE,
1609
1610 /**
1611 * A binary nir_op to use when performing a reduction or scan operation
1612 */
1613 NIR_INTRINSIC_REDUCTION_OP,
1614
1615 /**
1616 * Cluster size for reduction operations
1617 */
1618 NIR_INTRINSIC_CLUSTER_SIZE,
1619
1620 /**
1621 * Parameter index for a load_param intrinsic
1622 */
1623 NIR_INTRINSIC_PARAM_IDX,
1624
1625 /**
1626 * Image dimensionality for image intrinsics
1627 *
1628 * One of GLSL_SAMPLER_DIM_*
1629 */
1630 NIR_INTRINSIC_IMAGE_DIM,
1631
1632 /**
1633 * Non-zero if we are accessing an array image
1634 */
1635 NIR_INTRINSIC_IMAGE_ARRAY,
1636
1637 /**
1638 * Image format for image intrinsics
1639 */
1640 NIR_INTRINSIC_FORMAT,
1641
1642 /**
1643 * Access qualifiers for image and memory access intrinsics
1644 */
1645 NIR_INTRINSIC_ACCESS,
1646
1647 /**
1648 * Alignment for offsets and addresses
1649 *
1650 * These two parameters, specify an alignment in terms of a multiplier and
1651 * an offset. The offset or address parameter X of the intrinsic is
1652 * guaranteed to satisfy the following:
1653 *
1654 * (X - align_offset) % align_mul == 0
1655 */
1656 NIR_INTRINSIC_ALIGN_MUL,
1657 NIR_INTRINSIC_ALIGN_OFFSET,
1658
1659 /**
1660 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1661 */
1662 NIR_INTRINSIC_DESC_TYPE,
1663
1664 /**
1665 * The nir_alu_type of a uniform/input/output
1666 */
1667 NIR_INTRINSIC_TYPE,
1668
1669 /**
1670 * The swizzle mask for the instructions
1671 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1672 */
1673 NIR_INTRINSIC_SWIZZLE_MASK,
1674
1675 /* Separate source/dest access flags for copies */
1676 NIR_INTRINSIC_SRC_ACCESS,
1677 NIR_INTRINSIC_DST_ACCESS,
1678
1679 /* Driver location for nir_load_patch_location_ir3 */
1680 NIR_INTRINSIC_DRIVER_LOCATION,
1681
1682 /**
1683 * Mask of nir_memory_semantics, includes ordering and visibility.
1684 */
1685 NIR_INTRINSIC_MEMORY_SEMANTICS,
1686
1687 /**
1688 * Mask of nir_variable_modes affected by the memory operation.
1689 */
1690 NIR_INTRINSIC_MEMORY_MODES,
1691
1692 /**
1693 * Value of nir_scope.
1694 */
1695 NIR_INTRINSIC_MEMORY_SCOPE,
1696
1697 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1698
1699 } nir_intrinsic_index_flag;
1700
1701 #define NIR_INTRINSIC_MAX_INPUTS 5
1702
1703 typedef struct {
1704 const char *name;
1705
1706 unsigned num_srcs; /** < number of register/SSA inputs */
1707
1708 /** number of components of each input register
1709 *
1710 * If this value is 0, the number of components is given by the
1711 * num_components field of nir_intrinsic_instr. If this value is -1, the
1712 * intrinsic consumes however many components are provided and it is not
1713 * validated at all.
1714 */
1715 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1716
1717 bool has_dest;
1718
1719 /** number of components of the output register
1720 *
1721 * If this value is 0, the number of components is given by the
1722 * num_components field of nir_intrinsic_instr.
1723 */
1724 unsigned dest_components;
1725
1726 /** bitfield of legal bit sizes */
1727 unsigned dest_bit_sizes;
1728
1729 /** the number of constant indices used by the intrinsic */
1730 unsigned num_indices;
1731
1732 /** indicates the usage of intr->const_index[n] */
1733 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1734
1735 /** semantic flags for calls to this intrinsic */
1736 nir_intrinsic_semantic_flag flags;
1737 } nir_intrinsic_info;
1738
1739 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1740
1741 static inline unsigned
1742 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1743 {
1744 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1745 assert(srcn < info->num_srcs);
1746 if (info->src_components[srcn] > 0)
1747 return info->src_components[srcn];
1748 else if (info->src_components[srcn] == 0)
1749 return intr->num_components;
1750 else
1751 return nir_src_num_components(intr->src[srcn]);
1752 }
1753
1754 static inline unsigned
1755 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1756 {
1757 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1758 if (!info->has_dest)
1759 return 0;
1760 else if (info->dest_components)
1761 return info->dest_components;
1762 else
1763 return intr->num_components;
1764 }
1765
1766 /**
1767 * Helper to copy const_index[] from src to dst, without assuming they
1768 * match in order.
1769 */
1770 static inline void
1771 nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *src)
1772 {
1773 if (src->intrinsic == dst->intrinsic) {
1774 memcpy(dst->const_index, src->const_index, sizeof(dst->const_index));
1775 return;
1776 }
1777
1778 const nir_intrinsic_info *src_info = &nir_intrinsic_infos[src->intrinsic];
1779 const nir_intrinsic_info *dst_info = &nir_intrinsic_infos[dst->intrinsic];
1780
1781 for (unsigned i = 0; i < NIR_INTRINSIC_NUM_INDEX_FLAGS; i++) {
1782 if (src_info->index_map[i] == 0)
1783 continue;
1784
1785 /* require that dst instruction also uses the same const_index[]: */
1786 assert(dst_info->index_map[i] > 0);
1787
1788 dst->const_index[dst_info->index_map[i] - 1] =
1789 src->const_index[src_info->index_map[i] - 1];
1790 }
1791 }
1792
1793 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1794 static inline type \
1795 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1796 { \
1797 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1798 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1799 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1800 } \
1801 static inline void \
1802 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1803 { \
1804 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1805 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1806 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1807 }
1808
1809 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1810 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1811 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1812 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1813 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1814 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1815 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1816 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1817 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1818 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1819 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1820 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1821 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1822 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1823 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1824 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1825 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1826 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1827 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1828 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1829 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1830 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1831 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1832 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1833 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1834 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1835 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1836
1837 static inline void
1838 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1839 unsigned align_mul, unsigned align_offset)
1840 {
1841 assert(util_is_power_of_two_nonzero(align_mul));
1842 assert(align_offset < align_mul);
1843 nir_intrinsic_set_align_mul(intrin, align_mul);
1844 nir_intrinsic_set_align_offset(intrin, align_offset);
1845 }
1846
1847 /** Returns a simple alignment for a load/store intrinsic offset
1848 *
1849 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1850 * and ALIGN_OFFSET parameters, this helper takes both into account and
1851 * provides a single simple alignment parameter. The offset X is guaranteed
1852 * to satisfy X % align == 0.
1853 */
1854 static inline unsigned
1855 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1856 {
1857 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1858 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1859 assert(align_offset < align_mul);
1860 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1861 }
1862
1863 unsigned
1864 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1865
1866 /* Converts a image_deref_* intrinsic into a image_* one */
1867 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1868 nir_ssa_def *handle, bool bindless);
1869
1870 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1871 static inline bool
1872 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1873 {
1874 if (instr->intrinsic == nir_intrinsic_load_deref ||
1875 instr->intrinsic == nir_intrinsic_load_ssbo ||
1876 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1877 instr->intrinsic == nir_intrinsic_image_deref_load ||
1878 instr->intrinsic == nir_intrinsic_image_load) {
1879 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1880 } else {
1881 const nir_intrinsic_info *info =
1882 &nir_intrinsic_infos[instr->intrinsic];
1883 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1884 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1885 }
1886 }
1887
1888 /**
1889 * \group texture information
1890 *
1891 * This gives semantic information about textures which is useful to the
1892 * frontend, the backend, and lowering passes, but not the optimizer.
1893 */
1894
1895 typedef enum {
1896 nir_tex_src_coord,
1897 nir_tex_src_projector,
1898 nir_tex_src_comparator, /* shadow comparator */
1899 nir_tex_src_offset,
1900 nir_tex_src_bias,
1901 nir_tex_src_lod,
1902 nir_tex_src_min_lod,
1903 nir_tex_src_ms_index, /* MSAA sample index */
1904 nir_tex_src_ms_mcs, /* MSAA compression value */
1905 nir_tex_src_ddx,
1906 nir_tex_src_ddy,
1907 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1908 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1909 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1910 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1911 nir_tex_src_texture_handle, /* < bindless texture handle */
1912 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1913 nir_tex_src_plane, /* < selects plane for planar textures */
1914 nir_num_tex_src_types
1915 } nir_tex_src_type;
1916
1917 typedef struct {
1918 nir_src src;
1919 nir_tex_src_type src_type;
1920 } nir_tex_src;
1921
1922 typedef enum {
1923 nir_texop_tex, /**< Regular texture look-up */
1924 nir_texop_txb, /**< Texture look-up with LOD bias */
1925 nir_texop_txl, /**< Texture look-up with explicit LOD */
1926 nir_texop_txd, /**< Texture look-up with partial derivatives */
1927 nir_texop_txf, /**< Texel fetch with explicit LOD */
1928 nir_texop_txf_ms, /**< Multisample texture fetch */
1929 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1930 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1931 nir_texop_txs, /**< Texture size */
1932 nir_texop_lod, /**< Texture lod query */
1933 nir_texop_tg4, /**< Texture gather */
1934 nir_texop_query_levels, /**< Texture levels query */
1935 nir_texop_texture_samples, /**< Texture samples query */
1936 nir_texop_samples_identical, /**< Query whether all samples are definitely
1937 * identical.
1938 */
1939 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1940 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1941 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1942 } nir_texop;
1943
1944 typedef struct {
1945 nir_instr instr;
1946
1947 enum glsl_sampler_dim sampler_dim;
1948 nir_alu_type dest_type;
1949
1950 nir_texop op;
1951 nir_dest dest;
1952 nir_tex_src *src;
1953 unsigned num_srcs, coord_components;
1954 bool is_array, is_shadow;
1955
1956 /**
1957 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1958 * components or the new-style shadow that outputs 1 component.
1959 */
1960 bool is_new_style_shadow;
1961
1962 /* gather component selector */
1963 unsigned component : 2;
1964
1965 /* gather offsets */
1966 int8_t tg4_offsets[4][2];
1967
1968 /* True if the texture index or handle is not dynamically uniform */
1969 bool texture_non_uniform;
1970
1971 /* True if the sampler index or handle is not dynamically uniform */
1972 bool sampler_non_uniform;
1973
1974 /** The texture index
1975 *
1976 * If this texture instruction has a nir_tex_src_texture_offset source,
1977 * then the texture index is given by texture_index + texture_offset.
1978 */
1979 unsigned texture_index;
1980
1981 /** The sampler index
1982 *
1983 * The following operations do not require a sampler and, as such, this
1984 * field should be ignored:
1985 * - nir_texop_txf
1986 * - nir_texop_txf_ms
1987 * - nir_texop_txs
1988 * - nir_texop_lod
1989 * - nir_texop_query_levels
1990 * - nir_texop_texture_samples
1991 * - nir_texop_samples_identical
1992 *
1993 * If this texture instruction has a nir_tex_src_sampler_offset source,
1994 * then the sampler index is given by sampler_index + sampler_offset.
1995 */
1996 unsigned sampler_index;
1997 } nir_tex_instr;
1998
1999 /*
2000 * Returns true if the texture operation requires a sampler as a general rule,
2001 * see the documentation of sampler_index.
2002 *
2003 * Note that the specific hw/driver backend could require to a sampler
2004 * object/configuration packet in any case, for some other reason.
2005 */
2006 static inline bool
2007 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
2008 {
2009 switch (instr->op) {
2010 case nir_texop_txf:
2011 case nir_texop_txf_ms:
2012 case nir_texop_txs:
2013 case nir_texop_lod:
2014 case nir_texop_query_levels:
2015 case nir_texop_texture_samples:
2016 case nir_texop_samples_identical:
2017 return false;
2018 default:
2019 return true;
2020 }
2021 }
2022
2023 static inline unsigned
2024 nir_tex_instr_dest_size(const nir_tex_instr *instr)
2025 {
2026 switch (instr->op) {
2027 case nir_texop_txs: {
2028 unsigned ret;
2029 switch (instr->sampler_dim) {
2030 case GLSL_SAMPLER_DIM_1D:
2031 case GLSL_SAMPLER_DIM_BUF:
2032 ret = 1;
2033 break;
2034 case GLSL_SAMPLER_DIM_2D:
2035 case GLSL_SAMPLER_DIM_CUBE:
2036 case GLSL_SAMPLER_DIM_MS:
2037 case GLSL_SAMPLER_DIM_RECT:
2038 case GLSL_SAMPLER_DIM_EXTERNAL:
2039 case GLSL_SAMPLER_DIM_SUBPASS:
2040 ret = 2;
2041 break;
2042 case GLSL_SAMPLER_DIM_3D:
2043 ret = 3;
2044 break;
2045 default:
2046 unreachable("not reached");
2047 }
2048 if (instr->is_array)
2049 ret++;
2050 return ret;
2051 }
2052
2053 case nir_texop_lod:
2054 return 2;
2055
2056 case nir_texop_texture_samples:
2057 case nir_texop_query_levels:
2058 case nir_texop_samples_identical:
2059 case nir_texop_fragment_mask_fetch:
2060 return 1;
2061
2062 default:
2063 if (instr->is_shadow && instr->is_new_style_shadow)
2064 return 1;
2065
2066 return 4;
2067 }
2068 }
2069
2070 /* Returns true if this texture operation queries something about the texture
2071 * rather than actually sampling it.
2072 */
2073 static inline bool
2074 nir_tex_instr_is_query(const nir_tex_instr *instr)
2075 {
2076 switch (instr->op) {
2077 case nir_texop_txs:
2078 case nir_texop_lod:
2079 case nir_texop_texture_samples:
2080 case nir_texop_query_levels:
2081 case nir_texop_txf_ms_mcs:
2082 return true;
2083 case nir_texop_tex:
2084 case nir_texop_txb:
2085 case nir_texop_txl:
2086 case nir_texop_txd:
2087 case nir_texop_txf:
2088 case nir_texop_txf_ms:
2089 case nir_texop_txf_ms_fb:
2090 case nir_texop_tg4:
2091 return false;
2092 default:
2093 unreachable("Invalid texture opcode");
2094 }
2095 }
2096
2097 static inline bool
2098 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2099 {
2100 switch (instr->op) {
2101 case nir_texop_tex:
2102 case nir_texop_txb:
2103 case nir_texop_lod:
2104 return true;
2105 default:
2106 return false;
2107 }
2108 }
2109
2110 static inline nir_alu_type
2111 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2112 {
2113 switch (instr->src[src].src_type) {
2114 case nir_tex_src_coord:
2115 switch (instr->op) {
2116 case nir_texop_txf:
2117 case nir_texop_txf_ms:
2118 case nir_texop_txf_ms_fb:
2119 case nir_texop_txf_ms_mcs:
2120 case nir_texop_samples_identical:
2121 return nir_type_int;
2122
2123 default:
2124 return nir_type_float;
2125 }
2126
2127 case nir_tex_src_lod:
2128 switch (instr->op) {
2129 case nir_texop_txs:
2130 case nir_texop_txf:
2131 return nir_type_int;
2132
2133 default:
2134 return nir_type_float;
2135 }
2136
2137 case nir_tex_src_projector:
2138 case nir_tex_src_comparator:
2139 case nir_tex_src_bias:
2140 case nir_tex_src_min_lod:
2141 case nir_tex_src_ddx:
2142 case nir_tex_src_ddy:
2143 return nir_type_float;
2144
2145 case nir_tex_src_offset:
2146 case nir_tex_src_ms_index:
2147 case nir_tex_src_plane:
2148 return nir_type_int;
2149
2150 case nir_tex_src_ms_mcs:
2151 case nir_tex_src_texture_deref:
2152 case nir_tex_src_sampler_deref:
2153 case nir_tex_src_texture_offset:
2154 case nir_tex_src_sampler_offset:
2155 case nir_tex_src_texture_handle:
2156 case nir_tex_src_sampler_handle:
2157 return nir_type_uint;
2158
2159 case nir_num_tex_src_types:
2160 unreachable("nir_num_tex_src_types is not a valid source type");
2161 }
2162
2163 unreachable("Invalid texture source type");
2164 }
2165
2166 static inline unsigned
2167 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2168 {
2169 if (instr->src[src].src_type == nir_tex_src_coord)
2170 return instr->coord_components;
2171
2172 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2173 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2174 return 4;
2175
2176 if (instr->src[src].src_type == nir_tex_src_ddx ||
2177 instr->src[src].src_type == nir_tex_src_ddy) {
2178 if (instr->is_array)
2179 return instr->coord_components - 1;
2180 else
2181 return instr->coord_components;
2182 }
2183
2184 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2185 * the offset, since a cube maps to a single face.
2186 */
2187 if (instr->src[src].src_type == nir_tex_src_offset) {
2188 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2189 return 2;
2190 else if (instr->is_array)
2191 return instr->coord_components - 1;
2192 else
2193 return instr->coord_components;
2194 }
2195
2196 return 1;
2197 }
2198
2199 static inline int
2200 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2201 {
2202 for (unsigned i = 0; i < instr->num_srcs; i++)
2203 if (instr->src[i].src_type == type)
2204 return (int) i;
2205
2206 return -1;
2207 }
2208
2209 void nir_tex_instr_add_src(nir_tex_instr *tex,
2210 nir_tex_src_type src_type,
2211 nir_src src);
2212
2213 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2214
2215 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2216
2217 typedef struct {
2218 nir_instr instr;
2219
2220 nir_ssa_def def;
2221
2222 nir_const_value value[];
2223 } nir_load_const_instr;
2224
2225 typedef enum {
2226 nir_jump_return,
2227 nir_jump_break,
2228 nir_jump_continue,
2229 } nir_jump_type;
2230
2231 typedef struct {
2232 nir_instr instr;
2233 nir_jump_type type;
2234 } nir_jump_instr;
2235
2236 /* creates a new SSA variable in an undefined state */
2237
2238 typedef struct {
2239 nir_instr instr;
2240 nir_ssa_def def;
2241 } nir_ssa_undef_instr;
2242
2243 typedef struct {
2244 struct exec_node node;
2245
2246 /* The predecessor block corresponding to this source */
2247 struct nir_block *pred;
2248
2249 nir_src src;
2250 } nir_phi_src;
2251
2252 #define nir_foreach_phi_src(phi_src, phi) \
2253 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2254 #define nir_foreach_phi_src_safe(phi_src, phi) \
2255 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2256
2257 typedef struct {
2258 nir_instr instr;
2259
2260 struct exec_list srcs; /** < list of nir_phi_src */
2261
2262 nir_dest dest;
2263 } nir_phi_instr;
2264
2265 typedef struct {
2266 struct exec_node node;
2267 nir_src src;
2268 nir_dest dest;
2269 } nir_parallel_copy_entry;
2270
2271 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2272 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2273
2274 typedef struct {
2275 nir_instr instr;
2276
2277 /* A list of nir_parallel_copy_entrys. The sources of all of the
2278 * entries are copied to the corresponding destinations "in parallel".
2279 * In other words, if we have two entries: a -> b and b -> a, the values
2280 * get swapped.
2281 */
2282 struct exec_list entries;
2283 } nir_parallel_copy_instr;
2284
2285 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2286 type, nir_instr_type_alu)
2287 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2288 type, nir_instr_type_deref)
2289 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2290 type, nir_instr_type_call)
2291 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2292 type, nir_instr_type_jump)
2293 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2294 type, nir_instr_type_tex)
2295 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2296 type, nir_instr_type_intrinsic)
2297 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2298 type, nir_instr_type_load_const)
2299 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2300 type, nir_instr_type_ssa_undef)
2301 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2302 type, nir_instr_type_phi)
2303 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2304 nir_parallel_copy_instr, instr,
2305 type, nir_instr_type_parallel_copy)
2306
2307
2308 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2309 static inline type \
2310 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2311 { \
2312 assert(nir_src_is_const(src)); \
2313 nir_load_const_instr *load = \
2314 nir_instr_as_load_const(src.ssa->parent_instr); \
2315 assert(comp < load->def.num_components); \
2316 return nir_const_value_as_##suffix(load->value[comp], \
2317 load->def.bit_size); \
2318 } \
2319 \
2320 static inline type \
2321 nir_src_as_##suffix(nir_src src) \
2322 { \
2323 assert(nir_src_num_components(src) == 1); \
2324 return nir_src_comp_as_##suffix(src, 0); \
2325 }
2326
2327 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2328 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2329 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2330 NIR_DEFINE_SRC_AS_CONST(double, float)
2331
2332 #undef NIR_DEFINE_SRC_AS_CONST
2333
2334
2335 typedef struct {
2336 nir_ssa_def *def;
2337 unsigned comp;
2338 } nir_ssa_scalar;
2339
2340 static inline bool
2341 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2342 {
2343 return s.def->parent_instr->type == nir_instr_type_load_const;
2344 }
2345
2346 static inline nir_const_value
2347 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2348 {
2349 assert(s.comp < s.def->num_components);
2350 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2351 return load->value[s.comp];
2352 }
2353
2354 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2355 static inline type \
2356 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2357 { \
2358 return nir_const_value_as_##suffix( \
2359 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2360 }
2361
2362 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2363 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2364 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2365 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2366
2367 #undef NIR_DEFINE_SCALAR_AS_CONST
2368
2369 static inline bool
2370 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2371 {
2372 return s.def->parent_instr->type == nir_instr_type_alu;
2373 }
2374
2375 static inline nir_op
2376 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2377 {
2378 return nir_instr_as_alu(s.def->parent_instr)->op;
2379 }
2380
2381 static inline nir_ssa_scalar
2382 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2383 {
2384 nir_ssa_scalar out = { NULL, 0 };
2385
2386 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2387 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2388
2389 /* Our component must be written */
2390 assert(s.comp < s.def->num_components);
2391 assert(alu->dest.write_mask & (1u << s.comp));
2392
2393 assert(alu->src[alu_src_idx].src.is_ssa);
2394 out.def = alu->src[alu_src_idx].src.ssa;
2395
2396 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2397 /* The ALU src is unsized so the source component follows the
2398 * destination component.
2399 */
2400 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2401 } else {
2402 /* This is a sized source so all source components work together to
2403 * produce all the destination components. Since we need to return a
2404 * scalar, this only works if the source is a scalar.
2405 */
2406 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2407 out.comp = alu->src[alu_src_idx].swizzle[0];
2408 }
2409 assert(out.comp < out.def->num_components);
2410
2411 return out;
2412 }
2413
2414
2415 /*
2416 * Control flow
2417 *
2418 * Control flow consists of a tree of control flow nodes, which include
2419 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2420 * instructions that always run start-to-finish. Each basic block also keeps
2421 * track of its successors (blocks which may run immediately after the current
2422 * block) and predecessors (blocks which could have run immediately before the
2423 * current block). Each function also has a start block and an end block which
2424 * all return statements point to (which is always empty). Together, all the
2425 * blocks with their predecessors and successors make up the control flow
2426 * graph (CFG) of the function. There are helpers that modify the tree of
2427 * control flow nodes while modifying the CFG appropriately; these should be
2428 * used instead of modifying the tree directly.
2429 */
2430
2431 typedef enum {
2432 nir_cf_node_block,
2433 nir_cf_node_if,
2434 nir_cf_node_loop,
2435 nir_cf_node_function
2436 } nir_cf_node_type;
2437
2438 typedef struct nir_cf_node {
2439 struct exec_node node;
2440 nir_cf_node_type type;
2441 struct nir_cf_node *parent;
2442 } nir_cf_node;
2443
2444 typedef struct nir_block {
2445 nir_cf_node cf_node;
2446
2447 struct exec_list instr_list; /** < list of nir_instr */
2448
2449 /** generic block index; generated by nir_index_blocks */
2450 unsigned index;
2451
2452 /*
2453 * Each block can only have up to 2 successors, so we put them in a simple
2454 * array - no need for anything more complicated.
2455 */
2456 struct nir_block *successors[2];
2457
2458 /* Set of nir_block predecessors in the CFG */
2459 struct set *predecessors;
2460
2461 /*
2462 * this node's immediate dominator in the dominance tree - set to NULL for
2463 * the start block.
2464 */
2465 struct nir_block *imm_dom;
2466
2467 /* This node's children in the dominance tree */
2468 unsigned num_dom_children;
2469 struct nir_block **dom_children;
2470
2471 /* Set of nir_blocks on the dominance frontier of this block */
2472 struct set *dom_frontier;
2473
2474 /*
2475 * These two indices have the property that dom_{pre,post}_index for each
2476 * child of this block in the dominance tree will always be between
2477 * dom_pre_index and dom_post_index for this block, which makes testing if
2478 * a given block is dominated by another block an O(1) operation.
2479 */
2480 int16_t dom_pre_index, dom_post_index;
2481
2482 /* live in and out for this block; used for liveness analysis */
2483 BITSET_WORD *live_in;
2484 BITSET_WORD *live_out;
2485 } nir_block;
2486
2487 static inline bool
2488 nir_block_is_reachable(nir_block *b)
2489 {
2490 /* See also nir_block_dominates */
2491 return b->dom_post_index != -1;
2492 }
2493
2494 static inline nir_instr *
2495 nir_block_first_instr(nir_block *block)
2496 {
2497 struct exec_node *head = exec_list_get_head(&block->instr_list);
2498 return exec_node_data(nir_instr, head, node);
2499 }
2500
2501 static inline nir_instr *
2502 nir_block_last_instr(nir_block *block)
2503 {
2504 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2505 return exec_node_data(nir_instr, tail, node);
2506 }
2507
2508 static inline bool
2509 nir_block_ends_in_jump(nir_block *block)
2510 {
2511 return !exec_list_is_empty(&block->instr_list) &&
2512 nir_block_last_instr(block)->type == nir_instr_type_jump;
2513 }
2514
2515 #define nir_foreach_instr(instr, block) \
2516 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2517 #define nir_foreach_instr_reverse(instr, block) \
2518 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2519 #define nir_foreach_instr_safe(instr, block) \
2520 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2521 #define nir_foreach_instr_reverse_safe(instr, block) \
2522 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2523
2524 typedef enum {
2525 nir_selection_control_none = 0x0,
2526 nir_selection_control_flatten = 0x1,
2527 nir_selection_control_dont_flatten = 0x2,
2528 } nir_selection_control;
2529
2530 typedef struct nir_if {
2531 nir_cf_node cf_node;
2532 nir_src condition;
2533 nir_selection_control control;
2534
2535 struct exec_list then_list; /** < list of nir_cf_node */
2536 struct exec_list else_list; /** < list of nir_cf_node */
2537 } nir_if;
2538
2539 typedef struct {
2540 nir_if *nif;
2541
2542 /** Instruction that generates nif::condition. */
2543 nir_instr *conditional_instr;
2544
2545 /** Block within ::nif that has the break instruction. */
2546 nir_block *break_block;
2547
2548 /** Last block for the then- or else-path that does not contain the break. */
2549 nir_block *continue_from_block;
2550
2551 /** True when ::break_block is in the else-path of ::nif. */
2552 bool continue_from_then;
2553 bool induction_rhs;
2554
2555 /* This is true if the terminators exact trip count is unknown. For
2556 * example:
2557 *
2558 * for (int i = 0; i < imin(x, 4); i++)
2559 * ...
2560 *
2561 * Here loop analysis would have set a max_trip_count of 4 however we dont
2562 * know for sure that this is the exact trip count.
2563 */
2564 bool exact_trip_count_unknown;
2565
2566 struct list_head loop_terminator_link;
2567 } nir_loop_terminator;
2568
2569 typedef struct {
2570 /* Estimated cost (in number of instructions) of the loop */
2571 unsigned instr_cost;
2572
2573 /* Guessed trip count based on array indexing */
2574 unsigned guessed_trip_count;
2575
2576 /* Maximum number of times the loop is run (if known) */
2577 unsigned max_trip_count;
2578
2579 /* Do we know the exact number of times the loop will be run */
2580 bool exact_trip_count_known;
2581
2582 /* Unroll the loop regardless of its size */
2583 bool force_unroll;
2584
2585 /* Does the loop contain complex loop terminators, continues or other
2586 * complex behaviours? If this is true we can't rely on
2587 * loop_terminator_list to be complete or accurate.
2588 */
2589 bool complex_loop;
2590
2591 nir_loop_terminator *limiting_terminator;
2592
2593 /* A list of loop_terminators terminating this loop. */
2594 struct list_head loop_terminator_list;
2595 } nir_loop_info;
2596
2597 typedef enum {
2598 nir_loop_control_none = 0x0,
2599 nir_loop_control_unroll = 0x1,
2600 nir_loop_control_dont_unroll = 0x2,
2601 } nir_loop_control;
2602
2603 typedef struct {
2604 nir_cf_node cf_node;
2605
2606 struct exec_list body; /** < list of nir_cf_node */
2607
2608 nir_loop_info *info;
2609 nir_loop_control control;
2610 bool partially_unrolled;
2611 } nir_loop;
2612
2613 /**
2614 * Various bits of metadata that can may be created or required by
2615 * optimization and analysis passes
2616 */
2617 typedef enum {
2618 nir_metadata_none = 0x0,
2619
2620 /** Indicates that nir_block::index values are valid.
2621 *
2622 * The start block has index 0 and they increase through a natural walk of
2623 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2624 * every block index is in the range [0, nir_function_impl::num_blocks].
2625 *
2626 * A pass can preserve this metadata type if it doesn't touch the CFG.
2627 */
2628 nir_metadata_block_index = 0x1,
2629
2630 /** Indicates that block dominance information is valid
2631 *
2632 * This includes:
2633 *
2634 * - nir_block::num_dom_children
2635 * - nir_block::dom_children
2636 * - nir_block::dom_frontier
2637 * - nir_block::dom_pre_index
2638 * - nir_block::dom_post_index
2639 *
2640 * A pass can preserve this metadata type if it doesn't touch the CFG.
2641 */
2642 nir_metadata_dominance = 0x2,
2643
2644 /** Indicates that SSA def data-flow liveness information is valid
2645 *
2646 * This includes:
2647 *
2648 * - nir_ssa_def::live_index
2649 * - nir_block::live_in
2650 * - nir_block::live_out
2651 *
2652 * A pass can preserve this metadata type if it never adds or removes any
2653 * SSA defs (most passes shouldn't preserve this metadata type).
2654 */
2655 nir_metadata_live_ssa_defs = 0x4,
2656
2657 /** A dummy metadata value to track when a pass forgot to call
2658 * nir_metadata_preserve.
2659 *
2660 * A pass should always clear this value even if it doesn't make any
2661 * progress to indicate that it thought about preserving metadata.
2662 */
2663 nir_metadata_not_properly_reset = 0x8,
2664
2665 /** Indicates that loop analysis information is valid.
2666 *
2667 * This includes everything pointed to by nir_loop::info.
2668 *
2669 * A pass can preserve this metadata type if it is guaranteed to not affect
2670 * any loop metadata. However, since loop metadata includes things like
2671 * loop counts which depend on arithmetic in the loop, this is very hard to
2672 * determine. Most passes shouldn't preserve this metadata type.
2673 */
2674 nir_metadata_loop_analysis = 0x10,
2675 } nir_metadata;
2676
2677 typedef struct {
2678 nir_cf_node cf_node;
2679
2680 /** pointer to the function of which this is an implementation */
2681 struct nir_function *function;
2682
2683 struct exec_list body; /** < list of nir_cf_node */
2684
2685 nir_block *end_block;
2686
2687 /** list for all local variables in the function */
2688 struct exec_list locals;
2689
2690 /** list of local registers in the function */
2691 struct exec_list registers;
2692
2693 /** next available local register index */
2694 unsigned reg_alloc;
2695
2696 /** next available SSA value index */
2697 unsigned ssa_alloc;
2698
2699 /* total number of basic blocks, only valid when block_index_dirty = false */
2700 unsigned num_blocks;
2701
2702 nir_metadata valid_metadata;
2703 } nir_function_impl;
2704
2705 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2706 nir_start_block(nir_function_impl *impl)
2707 {
2708 return (nir_block *) impl->body.head_sentinel.next;
2709 }
2710
2711 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2712 nir_impl_last_block(nir_function_impl *impl)
2713 {
2714 return (nir_block *) impl->body.tail_sentinel.prev;
2715 }
2716
2717 static inline nir_cf_node *
2718 nir_cf_node_next(nir_cf_node *node)
2719 {
2720 struct exec_node *next = exec_node_get_next(&node->node);
2721 if (exec_node_is_tail_sentinel(next))
2722 return NULL;
2723 else
2724 return exec_node_data(nir_cf_node, next, node);
2725 }
2726
2727 static inline nir_cf_node *
2728 nir_cf_node_prev(nir_cf_node *node)
2729 {
2730 struct exec_node *prev = exec_node_get_prev(&node->node);
2731 if (exec_node_is_head_sentinel(prev))
2732 return NULL;
2733 else
2734 return exec_node_data(nir_cf_node, prev, node);
2735 }
2736
2737 static inline bool
2738 nir_cf_node_is_first(const nir_cf_node *node)
2739 {
2740 return exec_node_is_head_sentinel(node->node.prev);
2741 }
2742
2743 static inline bool
2744 nir_cf_node_is_last(const nir_cf_node *node)
2745 {
2746 return exec_node_is_tail_sentinel(node->node.next);
2747 }
2748
2749 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2750 type, nir_cf_node_block)
2751 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2752 type, nir_cf_node_if)
2753 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2754 type, nir_cf_node_loop)
2755 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2756 nir_function_impl, cf_node, type, nir_cf_node_function)
2757
2758 static inline nir_block *
2759 nir_if_first_then_block(nir_if *if_stmt)
2760 {
2761 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2762 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2763 }
2764
2765 static inline nir_block *
2766 nir_if_last_then_block(nir_if *if_stmt)
2767 {
2768 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2769 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2770 }
2771
2772 static inline nir_block *
2773 nir_if_first_else_block(nir_if *if_stmt)
2774 {
2775 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2776 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2777 }
2778
2779 static inline nir_block *
2780 nir_if_last_else_block(nir_if *if_stmt)
2781 {
2782 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2783 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2784 }
2785
2786 static inline nir_block *
2787 nir_loop_first_block(nir_loop *loop)
2788 {
2789 struct exec_node *head = exec_list_get_head(&loop->body);
2790 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2791 }
2792
2793 static inline nir_block *
2794 nir_loop_last_block(nir_loop *loop)
2795 {
2796 struct exec_node *tail = exec_list_get_tail(&loop->body);
2797 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2798 }
2799
2800 /**
2801 * Return true if this list of cf_nodes contains a single empty block.
2802 */
2803 static inline bool
2804 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2805 {
2806 if (exec_list_is_singular(cf_list)) {
2807 struct exec_node *head = exec_list_get_head(cf_list);
2808 nir_block *block =
2809 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2810 return exec_list_is_empty(&block->instr_list);
2811 }
2812 return false;
2813 }
2814
2815 typedef struct {
2816 uint8_t num_components;
2817 uint8_t bit_size;
2818 } nir_parameter;
2819
2820 typedef struct nir_function {
2821 struct exec_node node;
2822
2823 const char *name;
2824 struct nir_shader *shader;
2825
2826 unsigned num_params;
2827 nir_parameter *params;
2828
2829 /** The implementation of this function.
2830 *
2831 * If the function is only declared and not implemented, this is NULL.
2832 */
2833 nir_function_impl *impl;
2834
2835 bool is_entrypoint;
2836 } nir_function;
2837
2838 typedef enum {
2839 nir_lower_imul64 = (1 << 0),
2840 nir_lower_isign64 = (1 << 1),
2841 /** Lower all int64 modulus and division opcodes */
2842 nir_lower_divmod64 = (1 << 2),
2843 /** Lower all 64-bit umul_high and imul_high opcodes */
2844 nir_lower_imul_high64 = (1 << 3),
2845 nir_lower_mov64 = (1 << 4),
2846 nir_lower_icmp64 = (1 << 5),
2847 nir_lower_iadd64 = (1 << 6),
2848 nir_lower_iabs64 = (1 << 7),
2849 nir_lower_ineg64 = (1 << 8),
2850 nir_lower_logic64 = (1 << 9),
2851 nir_lower_minmax64 = (1 << 10),
2852 nir_lower_shift64 = (1 << 11),
2853 nir_lower_imul_2x32_64 = (1 << 12),
2854 nir_lower_extract64 = (1 << 13),
2855 nir_lower_ufind_msb64 = (1 << 14),
2856 } nir_lower_int64_options;
2857
2858 typedef enum {
2859 nir_lower_drcp = (1 << 0),
2860 nir_lower_dsqrt = (1 << 1),
2861 nir_lower_drsq = (1 << 2),
2862 nir_lower_dtrunc = (1 << 3),
2863 nir_lower_dfloor = (1 << 4),
2864 nir_lower_dceil = (1 << 5),
2865 nir_lower_dfract = (1 << 6),
2866 nir_lower_dround_even = (1 << 7),
2867 nir_lower_dmod = (1 << 8),
2868 nir_lower_dsub = (1 << 9),
2869 nir_lower_ddiv = (1 << 10),
2870 nir_lower_fp64_full_software = (1 << 11),
2871 } nir_lower_doubles_options;
2872
2873 typedef enum {
2874 nir_divergence_single_prim_per_subgroup = (1 << 0),
2875 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2876 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2877 nir_divergence_view_index_uniform = (1 << 3),
2878 } nir_divergence_options;
2879
2880 typedef struct nir_shader_compiler_options {
2881 bool lower_fdiv;
2882 bool lower_ffma;
2883 bool fuse_ffma;
2884 bool lower_flrp16;
2885 bool lower_flrp32;
2886 /** Lowers flrp when it does not support doubles */
2887 bool lower_flrp64;
2888 bool lower_fpow;
2889 bool lower_fsat;
2890 bool lower_fsqrt;
2891 bool lower_sincos;
2892 bool lower_fmod;
2893 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2894 bool lower_bitfield_extract;
2895 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2896 bool lower_bitfield_extract_to_shifts;
2897 /** Lowers bitfield_insert to bfi/bfm */
2898 bool lower_bitfield_insert;
2899 /** Lowers bitfield_insert to compares, and shifts. */
2900 bool lower_bitfield_insert_to_shifts;
2901 /** Lowers bitfield_insert to bfm/bitfield_select. */
2902 bool lower_bitfield_insert_to_bitfield_select;
2903 /** Lowers bitfield_reverse to shifts. */
2904 bool lower_bitfield_reverse;
2905 /** Lowers bit_count to shifts. */
2906 bool lower_bit_count;
2907 /** Lowers ifind_msb to compare and ufind_msb */
2908 bool lower_ifind_msb;
2909 /** Lowers find_lsb to ufind_msb and logic ops */
2910 bool lower_find_lsb;
2911 bool lower_uadd_carry;
2912 bool lower_usub_borrow;
2913 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2914 bool lower_mul_high;
2915 /** lowers fneg and ineg to fsub and isub. */
2916 bool lower_negate;
2917 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2918 bool lower_sub;
2919
2920 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2921 bool lower_scmp;
2922
2923 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2924 bool lower_vector_cmp;
2925
2926 /** enables rules to lower idiv by power-of-two: */
2927 bool lower_idiv;
2928
2929 /** enable rules to avoid bit ops */
2930 bool lower_bitops;
2931
2932 /** enables rules to lower isign to imin+imax */
2933 bool lower_isign;
2934
2935 /** enables rules to lower fsign to fsub and flt */
2936 bool lower_fsign;
2937
2938 /* lower fdph to fdot4 */
2939 bool lower_fdph;
2940
2941 /** lower fdot to fmul and fsum/fadd. */
2942 bool lower_fdot;
2943
2944 /* Does the native fdot instruction replicate its result for four
2945 * components? If so, then opt_algebraic_late will turn all fdotN
2946 * instructions into fdot_replicatedN instructions.
2947 */
2948 bool fdot_replicates;
2949
2950 /** lowers ffloor to fsub+ffract: */
2951 bool lower_ffloor;
2952
2953 /** lowers ffract to fsub+ffloor: */
2954 bool lower_ffract;
2955
2956 /** lowers fceil to fneg+ffloor+fneg: */
2957 bool lower_fceil;
2958
2959 bool lower_ftrunc;
2960
2961 bool lower_ldexp;
2962
2963 bool lower_pack_half_2x16;
2964 bool lower_pack_unorm_2x16;
2965 bool lower_pack_snorm_2x16;
2966 bool lower_pack_unorm_4x8;
2967 bool lower_pack_snorm_4x8;
2968 bool lower_unpack_half_2x16;
2969 bool lower_unpack_unorm_2x16;
2970 bool lower_unpack_snorm_2x16;
2971 bool lower_unpack_unorm_4x8;
2972 bool lower_unpack_snorm_4x8;
2973
2974 bool lower_pack_split;
2975
2976 bool lower_extract_byte;
2977 bool lower_extract_word;
2978
2979 bool lower_all_io_to_temps;
2980 bool lower_all_io_to_elements;
2981
2982 /* Indicates that the driver only has zero-based vertex id */
2983 bool vertex_id_zero_based;
2984
2985 /**
2986 * If enabled, gl_BaseVertex will be lowered as:
2987 * is_indexed_draw (~0/0) & firstvertex
2988 */
2989 bool lower_base_vertex;
2990
2991 /**
2992 * If enabled, gl_HelperInvocation will be lowered as:
2993 *
2994 * !((1 << sample_id) & sample_mask_in))
2995 *
2996 * This depends on some possibly hw implementation details, which may
2997 * not be true for all hw. In particular that the FS is only executed
2998 * for covered samples or for helper invocations. So, do not blindly
2999 * enable this option.
3000 *
3001 * Note: See also issue #22 in ARB_shader_image_load_store
3002 */
3003 bool lower_helper_invocation;
3004
3005 /**
3006 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3007 *
3008 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3009 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3010 */
3011 bool optimize_sample_mask_in;
3012
3013 bool lower_cs_local_index_from_id;
3014 bool lower_cs_local_id_from_index;
3015
3016 bool lower_device_index_to_zero;
3017
3018 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3019 bool lower_wpos_pntc;
3020
3021 /**
3022 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3023 * lowered to simple arithmetic.
3024 *
3025 * If this flag is set, the lowering will be applied to all bit-sizes of
3026 * these instructions.
3027 *
3028 * \sa ::lower_hadd64
3029 */
3030 bool lower_hadd;
3031
3032 /**
3033 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3034 * should be lowered to simple arithmetic.
3035 *
3036 * If this flag is set, the lowering will be applied to only 64-bit
3037 * versions of these instructions.
3038 *
3039 * \sa ::lower_hadd
3040 */
3041 bool lower_hadd64;
3042
3043 /**
3044 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3045 * arithmetic.
3046 *
3047 * If this flag is set, the lowering will be applied to all bit-sizes of
3048 * these instructions.
3049 *
3050 * \sa ::lower_usub_sat64
3051 */
3052 bool lower_add_sat;
3053
3054 /**
3055 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3056 * arithmetic.
3057 *
3058 * \sa ::lower_add_sat
3059 */
3060 bool lower_usub_sat64;
3061
3062 /**
3063 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3064 * for IO purposes and would prefer loads/stores be vectorized.
3065 */
3066 bool vectorize_io;
3067 bool lower_to_scalar;
3068
3069 /**
3070 * Should the linker unify inputs_read/outputs_written between adjacent
3071 * shader stages which are linked into a single program?
3072 */
3073 bool unify_interfaces;
3074
3075 /**
3076 * Should nir_lower_io() create load_interpolated_input intrinsics?
3077 *
3078 * If not, it generates regular load_input intrinsics and interpolation
3079 * information must be inferred from the list of input nir_variables.
3080 */
3081 bool use_interpolated_input_intrinsics;
3082
3083 /* Lowers when 32x32->64 bit multiplication is not supported */
3084 bool lower_mul_2x32_64;
3085
3086 /* Lowers when rotate instruction is not supported */
3087 bool lower_rotate;
3088
3089 /**
3090 * Backend supports imul24, and would like to use it (when possible)
3091 * for address/offset calculation. If true, driver should call
3092 * nir_lower_amul(). (If not set, amul will automatically be lowered
3093 * to imul.)
3094 */
3095 bool has_imul24;
3096
3097 /** Backend supports umul24, if not set umul24 will automatically be lowered
3098 * to imul with masked inputs */
3099 bool has_umul24;
3100
3101 /** Backend supports umad24, if not set umad24 will automatically be lowered
3102 * to imul with masked inputs and iadd */
3103 bool has_umad24;
3104
3105 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
3106 * set of memory barrier intrinsics based on GLSL.
3107 */
3108 bool use_scoped_memory_barrier;
3109
3110 /**
3111 * Is this the Intel vec4 backend?
3112 *
3113 * Used to inhibit algebraic optimizations that are known to be harmful on
3114 * the Intel vec4 backend. This is generally applicable to any
3115 * optimization that might cause more immediate values to be used in
3116 * 3-source (e.g., ffma and flrp) instructions.
3117 */
3118 bool intel_vec4;
3119
3120 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3121 bool lower_bfe_with_two_constants;
3122
3123 /** Whether 8-bit ALU is supported. */
3124 bool support_8bit_alu;
3125
3126 /** Whether 16-bit ALU is supported. */
3127 bool support_16bit_alu;
3128
3129 unsigned max_unroll_iterations;
3130
3131 nir_lower_int64_options lower_int64_options;
3132 nir_lower_doubles_options lower_doubles_options;
3133 } nir_shader_compiler_options;
3134
3135 typedef struct nir_shader {
3136 /** list of uniforms (nir_variable) */
3137 struct exec_list uniforms;
3138
3139 /** list of inputs (nir_variable) */
3140 struct exec_list inputs;
3141
3142 /** list of outputs (nir_variable) */
3143 struct exec_list outputs;
3144
3145 /** list of shared compute variables (nir_variable) */
3146 struct exec_list shared;
3147
3148 /** Set of driver-specific options for the shader.
3149 *
3150 * The memory for the options is expected to be kept in a single static
3151 * copy by the driver.
3152 */
3153 const struct nir_shader_compiler_options *options;
3154
3155 /** Various bits of compile-time information about a given shader */
3156 struct shader_info info;
3157
3158 /** list of global variables in the shader (nir_variable) */
3159 struct exec_list globals;
3160
3161 /** list of system value variables in the shader (nir_variable) */
3162 struct exec_list system_values;
3163
3164 struct exec_list functions; /** < list of nir_function */
3165
3166 /**
3167 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3168 * access plus one
3169 */
3170 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3171
3172 /** Size in bytes of required scratch space */
3173 unsigned scratch_size;
3174
3175 /** Constant data associated with this shader.
3176 *
3177 * Constant data is loaded through load_constant intrinsics. See also
3178 * nir_opt_large_constants.
3179 */
3180 void *constant_data;
3181 unsigned constant_data_size;
3182 } nir_shader;
3183
3184 #define nir_foreach_function(func, shader) \
3185 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3186
3187 static inline nir_function_impl *
3188 nir_shader_get_entrypoint(nir_shader *shader)
3189 {
3190 nir_function *func = NULL;
3191
3192 nir_foreach_function(function, shader) {
3193 assert(func == NULL);
3194 if (function->is_entrypoint) {
3195 func = function;
3196 #ifndef NDEBUG
3197 break;
3198 #endif
3199 }
3200 }
3201
3202 if (!func)
3203 return NULL;
3204
3205 assert(func->num_params == 0);
3206 assert(func->impl);
3207 return func->impl;
3208 }
3209
3210 nir_shader *nir_shader_create(void *mem_ctx,
3211 gl_shader_stage stage,
3212 const nir_shader_compiler_options *options,
3213 shader_info *si);
3214
3215 nir_register *nir_local_reg_create(nir_function_impl *impl);
3216
3217 void nir_reg_remove(nir_register *reg);
3218
3219 /** Adds a variable to the appropriate list in nir_shader */
3220 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3221
3222 static inline void
3223 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3224 {
3225 assert(var->data.mode == nir_var_function_temp);
3226 exec_list_push_tail(&impl->locals, &var->node);
3227 }
3228
3229 /** creates a variable, sets a few defaults, and adds it to the list */
3230 nir_variable *nir_variable_create(nir_shader *shader,
3231 nir_variable_mode mode,
3232 const struct glsl_type *type,
3233 const char *name);
3234 /** creates a local variable and adds it to the list */
3235 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3236 const struct glsl_type *type,
3237 const char *name);
3238
3239 /** creates a function and adds it to the shader's list of functions */
3240 nir_function *nir_function_create(nir_shader *shader, const char *name);
3241
3242 nir_function_impl *nir_function_impl_create(nir_function *func);
3243 /** creates a function_impl that isn't tied to any particular function */
3244 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3245
3246 nir_block *nir_block_create(nir_shader *shader);
3247 nir_if *nir_if_create(nir_shader *shader);
3248 nir_loop *nir_loop_create(nir_shader *shader);
3249
3250 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3251
3252 /** requests that the given pieces of metadata be generated */
3253 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3254 /** dirties all but the preserved metadata */
3255 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3256
3257 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3258 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3259
3260 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3261 nir_deref_type deref_type);
3262
3263 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3264
3265 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3266 unsigned num_components,
3267 unsigned bit_size);
3268
3269 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3270 nir_intrinsic_op op);
3271
3272 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3273 nir_function *callee);
3274
3275 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3276
3277 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3278
3279 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3280
3281 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3282 unsigned num_components,
3283 unsigned bit_size);
3284
3285 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3286
3287 /**
3288 * NIR Cursors and Instruction Insertion API
3289 * @{
3290 *
3291 * A tiny struct representing a point to insert/extract instructions or
3292 * control flow nodes. Helps reduce the combinatorial explosion of possible
3293 * points to insert/extract.
3294 *
3295 * \sa nir_control_flow.h
3296 */
3297 typedef enum {
3298 nir_cursor_before_block,
3299 nir_cursor_after_block,
3300 nir_cursor_before_instr,
3301 nir_cursor_after_instr,
3302 } nir_cursor_option;
3303
3304 typedef struct {
3305 nir_cursor_option option;
3306 union {
3307 nir_block *block;
3308 nir_instr *instr;
3309 };
3310 } nir_cursor;
3311
3312 static inline nir_block *
3313 nir_cursor_current_block(nir_cursor cursor)
3314 {
3315 if (cursor.option == nir_cursor_before_instr ||
3316 cursor.option == nir_cursor_after_instr) {
3317 return cursor.instr->block;
3318 } else {
3319 return cursor.block;
3320 }
3321 }
3322
3323 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3324
3325 static inline nir_cursor
3326 nir_before_block(nir_block *block)
3327 {
3328 nir_cursor cursor;
3329 cursor.option = nir_cursor_before_block;
3330 cursor.block = block;
3331 return cursor;
3332 }
3333
3334 static inline nir_cursor
3335 nir_after_block(nir_block *block)
3336 {
3337 nir_cursor cursor;
3338 cursor.option = nir_cursor_after_block;
3339 cursor.block = block;
3340 return cursor;
3341 }
3342
3343 static inline nir_cursor
3344 nir_before_instr(nir_instr *instr)
3345 {
3346 nir_cursor cursor;
3347 cursor.option = nir_cursor_before_instr;
3348 cursor.instr = instr;
3349 return cursor;
3350 }
3351
3352 static inline nir_cursor
3353 nir_after_instr(nir_instr *instr)
3354 {
3355 nir_cursor cursor;
3356 cursor.option = nir_cursor_after_instr;
3357 cursor.instr = instr;
3358 return cursor;
3359 }
3360
3361 static inline nir_cursor
3362 nir_after_block_before_jump(nir_block *block)
3363 {
3364 nir_instr *last_instr = nir_block_last_instr(block);
3365 if (last_instr && last_instr->type == nir_instr_type_jump) {
3366 return nir_before_instr(last_instr);
3367 } else {
3368 return nir_after_block(block);
3369 }
3370 }
3371
3372 static inline nir_cursor
3373 nir_before_src(nir_src *src, bool is_if_condition)
3374 {
3375 if (is_if_condition) {
3376 nir_block *prev_block =
3377 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3378 assert(!nir_block_ends_in_jump(prev_block));
3379 return nir_after_block(prev_block);
3380 } else if (src->parent_instr->type == nir_instr_type_phi) {
3381 #ifndef NDEBUG
3382 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3383 bool found = false;
3384 nir_foreach_phi_src(phi_src, cond_phi) {
3385 if (phi_src->src.ssa == src->ssa) {
3386 found = true;
3387 break;
3388 }
3389 }
3390 assert(found);
3391 #endif
3392 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3393 * to have a more specific name.
3394 */
3395 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3396 return nir_after_block_before_jump(phi_src->pred);
3397 } else {
3398 return nir_before_instr(src->parent_instr);
3399 }
3400 }
3401
3402 static inline nir_cursor
3403 nir_before_cf_node(nir_cf_node *node)
3404 {
3405 if (node->type == nir_cf_node_block)
3406 return nir_before_block(nir_cf_node_as_block(node));
3407
3408 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3409 }
3410
3411 static inline nir_cursor
3412 nir_after_cf_node(nir_cf_node *node)
3413 {
3414 if (node->type == nir_cf_node_block)
3415 return nir_after_block(nir_cf_node_as_block(node));
3416
3417 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3418 }
3419
3420 static inline nir_cursor
3421 nir_after_phis(nir_block *block)
3422 {
3423 nir_foreach_instr(instr, block) {
3424 if (instr->type != nir_instr_type_phi)
3425 return nir_before_instr(instr);
3426 }
3427 return nir_after_block(block);
3428 }
3429
3430 static inline nir_cursor
3431 nir_after_cf_node_and_phis(nir_cf_node *node)
3432 {
3433 if (node->type == nir_cf_node_block)
3434 return nir_after_block(nir_cf_node_as_block(node));
3435
3436 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3437
3438 return nir_after_phis(block);
3439 }
3440
3441 static inline nir_cursor
3442 nir_before_cf_list(struct exec_list *cf_list)
3443 {
3444 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3445 exec_list_get_head(cf_list), node);
3446 return nir_before_cf_node(first_node);
3447 }
3448
3449 static inline nir_cursor
3450 nir_after_cf_list(struct exec_list *cf_list)
3451 {
3452 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3453 exec_list_get_tail(cf_list), node);
3454 return nir_after_cf_node(last_node);
3455 }
3456
3457 /**
3458 * Insert a NIR instruction at the given cursor.
3459 *
3460 * Note: This does not update the cursor.
3461 */
3462 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3463
3464 static inline void
3465 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3466 {
3467 nir_instr_insert(nir_before_instr(instr), before);
3468 }
3469
3470 static inline void
3471 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3472 {
3473 nir_instr_insert(nir_after_instr(instr), after);
3474 }
3475
3476 static inline void
3477 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3478 {
3479 nir_instr_insert(nir_before_block(block), before);
3480 }
3481
3482 static inline void
3483 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3484 {
3485 nir_instr_insert(nir_after_block(block), after);
3486 }
3487
3488 static inline void
3489 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3490 {
3491 nir_instr_insert(nir_before_cf_node(node), before);
3492 }
3493
3494 static inline void
3495 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3496 {
3497 nir_instr_insert(nir_after_cf_node(node), after);
3498 }
3499
3500 static inline void
3501 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3502 {
3503 nir_instr_insert(nir_before_cf_list(list), before);
3504 }
3505
3506 static inline void
3507 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3508 {
3509 nir_instr_insert(nir_after_cf_list(list), after);
3510 }
3511
3512 void nir_instr_remove_v(nir_instr *instr);
3513
3514 static inline nir_cursor
3515 nir_instr_remove(nir_instr *instr)
3516 {
3517 nir_cursor cursor;
3518 nir_instr *prev = nir_instr_prev(instr);
3519 if (prev) {
3520 cursor = nir_after_instr(prev);
3521 } else {
3522 cursor = nir_before_block(instr->block);
3523 }
3524 nir_instr_remove_v(instr);
3525 return cursor;
3526 }
3527
3528 /** @} */
3529
3530 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3531
3532 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3533 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3534 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3535 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3536 void *state);
3537 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3538 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3539
3540 nir_const_value *nir_src_as_const_value(nir_src src);
3541
3542 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3543 static inline c_type * \
3544 nir_src_as_ ## name (nir_src src) \
3545 { \
3546 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3547 ? cast_macro(src.ssa->parent_instr) : NULL; \
3548 }
3549
3550 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3551 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3552 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3553 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3554
3555 bool nir_src_is_dynamically_uniform(nir_src src);
3556 bool nir_srcs_equal(nir_src src1, nir_src src2);
3557 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3558 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3559 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3560 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3561 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3562 nir_dest new_dest);
3563
3564 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3565 unsigned num_components, unsigned bit_size,
3566 const char *name);
3567 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3568 unsigned num_components, unsigned bit_size,
3569 const char *name);
3570 static inline void
3571 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3572 const struct glsl_type *type,
3573 const char *name)
3574 {
3575 assert(glsl_type_is_vector_or_scalar(type));
3576 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3577 glsl_get_bit_size(type), name);
3578 }
3579 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3580 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3581 nir_instr *after_me);
3582
3583 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3584
3585 /*
3586 * finds the next basic block in source-code order, returns NULL if there is
3587 * none
3588 */
3589
3590 nir_block *nir_block_cf_tree_next(nir_block *block);
3591
3592 /* Performs the opposite of nir_block_cf_tree_next() */
3593
3594 nir_block *nir_block_cf_tree_prev(nir_block *block);
3595
3596 /* Gets the first block in a CF node in source-code order */
3597
3598 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3599
3600 /* Gets the last block in a CF node in source-code order */
3601
3602 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3603
3604 /* Gets the next block after a CF node in source-code order */
3605
3606 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3607
3608 /* Macros for loops that visit blocks in source-code order */
3609
3610 #define nir_foreach_block(block, impl) \
3611 for (nir_block *block = nir_start_block(impl); block != NULL; \
3612 block = nir_block_cf_tree_next(block))
3613
3614 #define nir_foreach_block_safe(block, impl) \
3615 for (nir_block *block = nir_start_block(impl), \
3616 *next = nir_block_cf_tree_next(block); \
3617 block != NULL; \
3618 block = next, next = nir_block_cf_tree_next(block))
3619
3620 #define nir_foreach_block_reverse(block, impl) \
3621 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3622 block = nir_block_cf_tree_prev(block))
3623
3624 #define nir_foreach_block_reverse_safe(block, impl) \
3625 for (nir_block *block = nir_impl_last_block(impl), \
3626 *prev = nir_block_cf_tree_prev(block); \
3627 block != NULL; \
3628 block = prev, prev = nir_block_cf_tree_prev(block))
3629
3630 #define nir_foreach_block_in_cf_node(block, node) \
3631 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3632 block != nir_cf_node_cf_tree_next(node); \
3633 block = nir_block_cf_tree_next(block))
3634
3635 /* If the following CF node is an if, this function returns that if.
3636 * Otherwise, it returns NULL.
3637 */
3638 nir_if *nir_block_get_following_if(nir_block *block);
3639
3640 nir_loop *nir_block_get_following_loop(nir_block *block);
3641
3642 void nir_index_local_regs(nir_function_impl *impl);
3643 void nir_index_ssa_defs(nir_function_impl *impl);
3644 unsigned nir_index_instrs(nir_function_impl *impl);
3645
3646 void nir_index_blocks(nir_function_impl *impl);
3647
3648 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3649
3650 void nir_print_shader(nir_shader *shader, FILE *fp);
3651 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3652 void nir_print_instr(const nir_instr *instr, FILE *fp);
3653 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3654
3655 /** Shallow clone of a single ALU instruction. */
3656 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3657
3658 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3659 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3660 const nir_function_impl *fi);
3661 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3662 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3663
3664 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3665
3666 void nir_shader_serialize_deserialize(nir_shader *s);
3667
3668 #ifndef NDEBUG
3669 void nir_validate_shader(nir_shader *shader, const char *when);
3670 void nir_metadata_set_validation_flag(nir_shader *shader);
3671 void nir_metadata_check_validation_flag(nir_shader *shader);
3672
3673 static inline bool
3674 should_skip_nir(const char *name)
3675 {
3676 static const char *list = NULL;
3677 if (!list) {
3678 /* Comma separated list of names to skip. */
3679 list = getenv("NIR_SKIP");
3680 if (!list)
3681 list = "";
3682 }
3683
3684 if (!list[0])
3685 return false;
3686
3687 return comma_separated_list_contains(list, name);
3688 }
3689
3690 static inline bool
3691 should_clone_nir(void)
3692 {
3693 static int should_clone = -1;
3694 if (should_clone < 0)
3695 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3696
3697 return should_clone;
3698 }
3699
3700 static inline bool
3701 should_serialize_deserialize_nir(void)
3702 {
3703 static int test_serialize = -1;
3704 if (test_serialize < 0)
3705 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3706
3707 return test_serialize;
3708 }
3709
3710 static inline bool
3711 should_print_nir(void)
3712 {
3713 static int should_print = -1;
3714 if (should_print < 0)
3715 should_print = env_var_as_boolean("NIR_PRINT", false);
3716
3717 return should_print;
3718 }
3719 #else
3720 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3721 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3722 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3723 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3724 static inline bool should_clone_nir(void) { return false; }
3725 static inline bool should_serialize_deserialize_nir(void) { return false; }
3726 static inline bool should_print_nir(void) { return false; }
3727 #endif /* NDEBUG */
3728
3729 #define _PASS(pass, nir, do_pass) do { \
3730 if (should_skip_nir(#pass)) { \
3731 printf("skipping %s\n", #pass); \
3732 break; \
3733 } \
3734 do_pass \
3735 nir_validate_shader(nir, "after " #pass); \
3736 if (should_clone_nir()) { \
3737 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3738 nir_shader_replace(nir, clone); \
3739 } \
3740 if (should_serialize_deserialize_nir()) { \
3741 nir_shader_serialize_deserialize(nir); \
3742 } \
3743 } while (0)
3744
3745 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3746 nir_metadata_set_validation_flag(nir); \
3747 if (should_print_nir()) \
3748 printf("%s\n", #pass); \
3749 if (pass(nir, ##__VA_ARGS__)) { \
3750 progress = true; \
3751 if (should_print_nir()) \
3752 nir_print_shader(nir, stdout); \
3753 nir_metadata_check_validation_flag(nir); \
3754 } \
3755 )
3756
3757 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3758 if (should_print_nir()) \
3759 printf("%s\n", #pass); \
3760 pass(nir, ##__VA_ARGS__); \
3761 if (should_print_nir()) \
3762 nir_print_shader(nir, stdout); \
3763 )
3764
3765 #define NIR_SKIP(name) should_skip_nir(#name)
3766
3767 /** An instruction filtering callback
3768 *
3769 * Returns true if the instruction should be processed and false otherwise.
3770 */
3771 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3772
3773 /** A simple instruction lowering callback
3774 *
3775 * Many instruction lowering passes can be written as a simple function which
3776 * takes an instruction as its input and returns a sequence of instructions
3777 * that implement the consumed instruction. This function type represents
3778 * such a lowering function. When called, a function with this prototype
3779 * should either return NULL indicating that no lowering needs to be done or
3780 * emit a sequence of instructions using the provided builder (whose cursor
3781 * will already be placed after the instruction to be lowered) and return the
3782 * resulting nir_ssa_def.
3783 */
3784 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3785 nir_instr *, void *);
3786
3787 /**
3788 * Special return value for nir_lower_instr_cb when some progress occurred
3789 * (like changing an input to the instr) that didn't result in a replacement
3790 * SSA def being generated.
3791 */
3792 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3793
3794 /** Iterate over all the instructions in a nir_function_impl and lower them
3795 * using the provided callbacks
3796 *
3797 * This function implements the guts of a standard lowering pass for you. It
3798 * iterates over all of the instructions in a nir_function_impl and calls the
3799 * filter callback on each one. If the filter callback returns true, it then
3800 * calls the lowering call back on the instruction. (Splitting it this way
3801 * allows us to avoid some save/restore work for instructions we know won't be
3802 * lowered.) If the instruction is dead after the lowering is complete, it
3803 * will be removed. If new instructions are added, the lowering callback will
3804 * also be called on them in case multiple lowerings are required.
3805 *
3806 * The metadata for the nir_function_impl will also be updated. If any blocks
3807 * are added (they cannot be removed), dominance and block indices will be
3808 * invalidated.
3809 */
3810 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3811 nir_instr_filter_cb filter,
3812 nir_lower_instr_cb lower,
3813 void *cb_data);
3814 bool nir_shader_lower_instructions(nir_shader *shader,
3815 nir_instr_filter_cb filter,
3816 nir_lower_instr_cb lower,
3817 void *cb_data);
3818
3819 void nir_calc_dominance_impl(nir_function_impl *impl);
3820 void nir_calc_dominance(nir_shader *shader);
3821
3822 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3823 bool nir_block_dominates(nir_block *parent, nir_block *child);
3824 bool nir_block_is_unreachable(nir_block *block);
3825
3826 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3827 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3828
3829 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3830 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3831
3832 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3833 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3834
3835 int nir_gs_count_vertices(const nir_shader *shader);
3836
3837 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3838 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3839 bool nir_split_var_copies(nir_shader *shader);
3840 bool nir_split_per_member_structs(nir_shader *shader);
3841 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3842
3843 bool nir_lower_returns_impl(nir_function_impl *impl);
3844 bool nir_lower_returns(nir_shader *shader);
3845
3846 void nir_inline_function_impl(struct nir_builder *b,
3847 const nir_function_impl *impl,
3848 nir_ssa_def **params);
3849 bool nir_inline_functions(nir_shader *shader);
3850
3851 bool nir_propagate_invariant(nir_shader *shader);
3852
3853 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3854 void nir_lower_deref_copy_instr(struct nir_builder *b,
3855 nir_intrinsic_instr *copy);
3856 bool nir_lower_var_copies(nir_shader *shader);
3857
3858 void nir_fixup_deref_modes(nir_shader *shader);
3859
3860 bool nir_lower_global_vars_to_local(nir_shader *shader);
3861
3862 typedef enum {
3863 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3864 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3865 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3866 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3867 } nir_lower_array_deref_of_vec_options;
3868
3869 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3870 nir_lower_array_deref_of_vec_options options);
3871
3872 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3873
3874 bool nir_lower_locals_to_regs(nir_shader *shader);
3875
3876 void nir_lower_io_to_temporaries(nir_shader *shader,
3877 nir_function_impl *entrypoint,
3878 bool outputs, bool inputs);
3879
3880 bool nir_lower_vars_to_scratch(nir_shader *shader,
3881 nir_variable_mode modes,
3882 int size_threshold,
3883 glsl_type_size_align_func size_align);
3884
3885 void nir_lower_clip_halfz(nir_shader *shader);
3886
3887 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3888
3889 void nir_gather_ssa_types(nir_function_impl *impl,
3890 BITSET_WORD *float_types,
3891 BITSET_WORD *int_types);
3892
3893 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3894 int (*type_size)(const struct glsl_type *, bool));
3895
3896 /* Some helpers to do very simple linking */
3897 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3898 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3899 uint64_t *used_by_other_stage,
3900 uint64_t *used_by_other_stage_patches);
3901 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3902 bool default_to_smooth_interp);
3903 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3904 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3905
3906 bool nir_lower_amul(nir_shader *shader,
3907 int (*type_size)(const struct glsl_type *, bool));
3908
3909 void nir_assign_io_var_locations(struct exec_list *var_list,
3910 unsigned *size,
3911 gl_shader_stage stage);
3912
3913 typedef struct {
3914 uint8_t num_linked_io_vars;
3915 uint8_t num_linked_patch_io_vars;
3916 } nir_linked_io_var_info;
3917
3918 nir_linked_io_var_info
3919 nir_assign_linked_io_var_locations(nir_shader *producer,
3920 nir_shader *consumer);
3921
3922 typedef enum {
3923 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3924 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3925 * modes.
3926 */
3927 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3928
3929 /* If set, this forces all non-flat fragment shader inputs to be
3930 * interpolated as if with the "sample" qualifier. This requires
3931 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3932 */
3933 nir_lower_io_force_sample_interpolation = (1 << 1),
3934 } nir_lower_io_options;
3935 bool nir_lower_io(nir_shader *shader,
3936 nir_variable_mode modes,
3937 int (*type_size)(const struct glsl_type *, bool),
3938 nir_lower_io_options);
3939
3940 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3941
3942 bool
3943 nir_lower_vars_to_explicit_types(nir_shader *shader,
3944 nir_variable_mode modes,
3945 glsl_type_size_align_func type_info);
3946
3947 typedef enum {
3948 /**
3949 * An address format which is a simple 32-bit global GPU address.
3950 */
3951 nir_address_format_32bit_global,
3952
3953 /**
3954 * An address format which is a simple 64-bit global GPU address.
3955 */
3956 nir_address_format_64bit_global,
3957
3958 /**
3959 * An address format which is a bounds-checked 64-bit global GPU address.
3960 *
3961 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3962 * address stored with the low bits in .x and high bits in .y, .z is a
3963 * size, and .w is an offset. When the final I/O operation is lowered, .w
3964 * is checked against .z and the operation is predicated on the result.
3965 */
3966 nir_address_format_64bit_bounded_global,
3967
3968 /**
3969 * An address format which is comprised of a vec2 where the first
3970 * component is a buffer index and the second is an offset.
3971 */
3972 nir_address_format_32bit_index_offset,
3973
3974 /**
3975 * An address format which is a simple 32-bit offset.
3976 */
3977 nir_address_format_32bit_offset,
3978
3979 /**
3980 * An address format representing a purely logical addressing model. In
3981 * this model, all deref chains must be complete from the dereference
3982 * operation to the variable. Cast derefs are not allowed. These
3983 * addresses will be 32-bit scalars but the format is immaterial because
3984 * you can always chase the chain.
3985 */
3986 nir_address_format_logical,
3987 } nir_address_format;
3988
3989 static inline unsigned
3990 nir_address_format_bit_size(nir_address_format addr_format)
3991 {
3992 switch (addr_format) {
3993 case nir_address_format_32bit_global: return 32;
3994 case nir_address_format_64bit_global: return 64;
3995 case nir_address_format_64bit_bounded_global: return 32;
3996 case nir_address_format_32bit_index_offset: return 32;
3997 case nir_address_format_32bit_offset: return 32;
3998 case nir_address_format_logical: return 32;
3999 }
4000 unreachable("Invalid address format");
4001 }
4002
4003 static inline unsigned
4004 nir_address_format_num_components(nir_address_format addr_format)
4005 {
4006 switch (addr_format) {
4007 case nir_address_format_32bit_global: return 1;
4008 case nir_address_format_64bit_global: return 1;
4009 case nir_address_format_64bit_bounded_global: return 4;
4010 case nir_address_format_32bit_index_offset: return 2;
4011 case nir_address_format_32bit_offset: return 1;
4012 case nir_address_format_logical: return 1;
4013 }
4014 unreachable("Invalid address format");
4015 }
4016
4017 static inline const struct glsl_type *
4018 nir_address_format_to_glsl_type(nir_address_format addr_format)
4019 {
4020 unsigned bit_size = nir_address_format_bit_size(addr_format);
4021 assert(bit_size == 32 || bit_size == 64);
4022 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
4023 nir_address_format_num_components(addr_format));
4024 }
4025
4026 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
4027
4028 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4029 nir_address_format addr_format);
4030
4031 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4032 nir_address_format addr_format);
4033
4034 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
4035 nir_deref_instr *deref,
4036 nir_ssa_def *base_addr,
4037 nir_address_format addr_format);
4038 void nir_lower_explicit_io_instr(struct nir_builder *b,
4039 nir_intrinsic_instr *io_instr,
4040 nir_ssa_def *addr,
4041 nir_address_format addr_format);
4042
4043 bool nir_lower_explicit_io(nir_shader *shader,
4044 nir_variable_mode modes,
4045 nir_address_format);
4046
4047 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
4048 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
4049
4050 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
4051
4052 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
4053 bool nir_lower_regs_to_ssa(nir_shader *shader);
4054 bool nir_lower_vars_to_ssa(nir_shader *shader);
4055
4056 bool nir_remove_dead_derefs(nir_shader *shader);
4057 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
4058 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
4059 bool nir_lower_variable_initializers(nir_shader *shader,
4060 nir_variable_mode modes);
4061
4062 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
4063 bool nir_lower_vec_to_movs(nir_shader *shader);
4064 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
4065 bool alpha_to_one,
4066 const gl_state_index16 *alpha_ref_state_tokens);
4067 bool nir_lower_alu(nir_shader *shader);
4068
4069 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
4070 bool always_precise, bool have_ffma);
4071
4072 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
4073 bool nir_lower_bool_to_bitsize(nir_shader *shader);
4074 bool nir_lower_bool_to_float(nir_shader *shader);
4075 bool nir_lower_bool_to_int32(nir_shader *shader);
4076 bool nir_lower_int_to_float(nir_shader *shader);
4077 bool nir_lower_load_const_to_scalar(nir_shader *shader);
4078 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
4079 bool nir_lower_phis_to_scalar(nir_shader *shader);
4080 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
4081 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
4082 bool outputs_only);
4083 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
4084 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
4085 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
4086
4087 void nir_lower_fragcoord_wtrans(nir_shader *shader);
4088 void nir_lower_viewport_transform(nir_shader *shader);
4089 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
4090
4091 typedef struct nir_lower_subgroups_options {
4092 uint8_t subgroup_size;
4093 uint8_t ballot_bit_size;
4094 bool lower_to_scalar:1;
4095 bool lower_vote_trivial:1;
4096 bool lower_vote_eq_to_ballot:1;
4097 bool lower_subgroup_masks:1;
4098 bool lower_shuffle:1;
4099 bool lower_shuffle_to_32bit:1;
4100 bool lower_quad:1;
4101 bool lower_quad_broadcast_dynamic:1;
4102 bool lower_quad_broadcast_dynamic_to_const:1;
4103 } nir_lower_subgroups_options;
4104
4105 bool nir_lower_subgroups(nir_shader *shader,
4106 const nir_lower_subgroups_options *options);
4107
4108 bool nir_lower_system_values(nir_shader *shader);
4109
4110 enum PACKED nir_lower_tex_packing {
4111 nir_lower_tex_packing_none = 0,
4112 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
4113 * or unsigned ints based on the sampler type
4114 */
4115 nir_lower_tex_packing_16,
4116 /* The sampler returns 1 32-bit word of 4x8 unorm */
4117 nir_lower_tex_packing_8,
4118 };
4119
4120 typedef struct nir_lower_tex_options {
4121 /**
4122 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4123 * sampler types a texture projector is lowered.
4124 */
4125 unsigned lower_txp;
4126
4127 /**
4128 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4129 */
4130 bool lower_txf_offset;
4131
4132 /**
4133 * If true, lower away nir_tex_src_offset for all rect textures.
4134 */
4135 bool lower_rect_offset;
4136
4137 /**
4138 * If true, lower rect textures to 2D, using txs to fetch the
4139 * texture dimensions and dividing the texture coords by the
4140 * texture dims to normalize.
4141 */
4142 bool lower_rect;
4143
4144 /**
4145 * If true, convert yuv to rgb.
4146 */
4147 unsigned lower_y_uv_external;
4148 unsigned lower_y_u_v_external;
4149 unsigned lower_yx_xuxv_external;
4150 unsigned lower_xy_uxvx_external;
4151 unsigned lower_ayuv_external;
4152 unsigned lower_xyuv_external;
4153
4154 /**
4155 * To emulate certain texture wrap modes, this can be used
4156 * to saturate the specified tex coord to [0.0, 1.0]. The
4157 * bits are according to sampler #, ie. if, for example:
4158 *
4159 * (conf->saturate_s & (1 << n))
4160 *
4161 * is true, then the s coord for sampler n is saturated.
4162 *
4163 * Note that clamping must happen *after* projector lowering
4164 * so any projected texture sample instruction with a clamped
4165 * coordinate gets automatically lowered, regardless of the
4166 * 'lower_txp' setting.
4167 */
4168 unsigned saturate_s;
4169 unsigned saturate_t;
4170 unsigned saturate_r;
4171
4172 /* Bitmask of textures that need swizzling.
4173 *
4174 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4175 * swizzles[texture_index] is applied to the result of the texturing
4176 * operation.
4177 */
4178 unsigned swizzle_result;
4179
4180 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4181 * while 4 and 5 represent 0 and 1 respectively.
4182 */
4183 uint8_t swizzles[32][4];
4184
4185 /* Can be used to scale sampled values in range required by the format. */
4186 float scale_factors[32];
4187
4188 /**
4189 * Bitmap of textures that need srgb to linear conversion. If
4190 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4191 * of the texture are lowered to linear.
4192 */
4193 unsigned lower_srgb;
4194
4195 /**
4196 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4197 * LODs to nir_texop_txl.
4198 */
4199 bool lower_tex_without_implicit_lod;
4200
4201 /**
4202 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4203 */
4204 bool lower_txd_cube_map;
4205
4206 /**
4207 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4208 */
4209 bool lower_txd_3d;
4210
4211 /**
4212 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4213 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4214 * with lower_txd_cube_map.
4215 */
4216 bool lower_txd_shadow;
4217
4218 /**
4219 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4220 * Implies lower_txd_cube_map and lower_txd_shadow.
4221 */
4222 bool lower_txd;
4223
4224 /**
4225 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4226 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4227 */
4228 bool lower_txb_shadow_clamp;
4229
4230 /**
4231 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4232 * with nir_texop_txl. This includes cube maps.
4233 */
4234 bool lower_txd_shadow_clamp;
4235
4236 /**
4237 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4238 * with nir_texop_txl. This includes cube maps.
4239 */
4240 bool lower_txd_offset_clamp;
4241
4242 /**
4243 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4244 * sampler is bindless.
4245 */
4246 bool lower_txd_clamp_bindless_sampler;
4247
4248 /**
4249 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4250 * sampler index is not statically determinable to be less than 16.
4251 */
4252 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4253
4254 /**
4255 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4256 * 0-lod followed by a nir_ishr.
4257 */
4258 bool lower_txs_lod;
4259
4260 /**
4261 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4262 * mixed-up tg4 locations.
4263 */
4264 bool lower_tg4_broadcom_swizzle;
4265
4266 /**
4267 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4268 */
4269 bool lower_tg4_offsets;
4270
4271 enum nir_lower_tex_packing lower_tex_packing[32];
4272 } nir_lower_tex_options;
4273
4274 bool nir_lower_tex(nir_shader *shader,
4275 const nir_lower_tex_options *options);
4276
4277 enum nir_lower_non_uniform_access_type {
4278 nir_lower_non_uniform_ubo_access = (1 << 0),
4279 nir_lower_non_uniform_ssbo_access = (1 << 1),
4280 nir_lower_non_uniform_texture_access = (1 << 2),
4281 nir_lower_non_uniform_image_access = (1 << 3),
4282 };
4283
4284 bool nir_lower_non_uniform_access(nir_shader *shader,
4285 enum nir_lower_non_uniform_access_type);
4286
4287 enum nir_lower_idiv_path {
4288 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4289 * the two but it is not exact in some cases (for example, 1091317713u /
4290 * 1034u gives 5209173 instead of 1055432) */
4291 nir_lower_idiv_fast,
4292 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4293 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4294 * the nv50 path and many of them are integer multiplications, so it is
4295 * probably slower. It should always return the correct result, though. */
4296 nir_lower_idiv_precise,
4297 };
4298
4299 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4300
4301 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4302
4303 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4304 bool use_vars,
4305 bool use_clipdist_array,
4306 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4307 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4308 bool use_clipdist_array,
4309 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4310 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4311 bool use_clipdist_array);
4312 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4313
4314 void nir_lower_point_size_mov(nir_shader *shader,
4315 const gl_state_index16 *pointsize_state_tokens);
4316
4317 bool nir_lower_frexp(nir_shader *nir);
4318
4319 void nir_lower_two_sided_color(nir_shader *shader);
4320
4321 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4322
4323 bool nir_lower_flatshade(nir_shader *shader);
4324
4325 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4326 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4327 const gl_state_index16 *uniform_state_tokens);
4328
4329 typedef struct nir_lower_wpos_ytransform_options {
4330 gl_state_index16 state_tokens[STATE_LENGTH];
4331 bool fs_coord_origin_upper_left :1;
4332 bool fs_coord_origin_lower_left :1;
4333 bool fs_coord_pixel_center_integer :1;
4334 bool fs_coord_pixel_center_half_integer :1;
4335 } nir_lower_wpos_ytransform_options;
4336
4337 bool nir_lower_wpos_ytransform(nir_shader *shader,
4338 const nir_lower_wpos_ytransform_options *options);
4339 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4340
4341 bool nir_lower_fb_read(nir_shader *shader);
4342
4343 typedef struct nir_lower_drawpixels_options {
4344 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4345 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4346 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4347 unsigned drawpix_sampler;
4348 unsigned pixelmap_sampler;
4349 bool pixel_maps :1;
4350 bool scale_and_bias :1;
4351 } nir_lower_drawpixels_options;
4352
4353 void nir_lower_drawpixels(nir_shader *shader,
4354 const nir_lower_drawpixels_options *options);
4355
4356 typedef struct nir_lower_bitmap_options {
4357 unsigned sampler;
4358 bool swizzle_xxxx;
4359 } nir_lower_bitmap_options;
4360
4361 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4362
4363 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4364
4365 typedef enum {
4366 nir_lower_int_source_mods = 1 << 0,
4367 nir_lower_float_source_mods = 1 << 1,
4368 nir_lower_triop_abs = 1 << 2,
4369 nir_lower_all_source_mods = (1 << 3) - 1
4370 } nir_lower_to_source_mods_flags;
4371
4372
4373 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4374
4375 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4376
4377 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4378
4379 bool nir_lower_bit_size(nir_shader *shader,
4380 nir_lower_bit_size_callback callback,
4381 void *callback_data);
4382
4383 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4384 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4385
4386 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4387 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4388 nir_lower_doubles_options options);
4389 bool nir_lower_pack(nir_shader *shader);
4390
4391 void nir_lower_mediump_outputs(nir_shader *nir);
4392
4393 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4394
4395 typedef enum {
4396 nir_lower_interpolation_at_sample = (1 << 1),
4397 nir_lower_interpolation_at_offset = (1 << 2),
4398 nir_lower_interpolation_centroid = (1 << 3),
4399 nir_lower_interpolation_pixel = (1 << 4),
4400 nir_lower_interpolation_sample = (1 << 5),
4401 } nir_lower_interpolation_options;
4402
4403 bool nir_lower_interpolation(nir_shader *shader,
4404 nir_lower_interpolation_options options);
4405
4406 bool nir_lower_discard_to_demote(nir_shader *shader);
4407
4408 bool nir_normalize_cubemap_coords(nir_shader *shader);
4409
4410 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4411
4412 void nir_loop_analyze_impl(nir_function_impl *impl,
4413 nir_variable_mode indirect_mask);
4414
4415 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4416
4417 bool nir_repair_ssa_impl(nir_function_impl *impl);
4418 bool nir_repair_ssa(nir_shader *shader);
4419
4420 void nir_convert_loop_to_lcssa(nir_loop *loop);
4421 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4422 void nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4423
4424 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4425 * registers. If false, convert all values (even those not involved in a phi
4426 * node) to registers.
4427 */
4428 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4429
4430 bool nir_lower_phis_to_regs_block(nir_block *block);
4431 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4432 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4433
4434 bool nir_lower_samplers(nir_shader *shader);
4435 bool nir_lower_ssbo(nir_shader *shader);
4436
4437 /* This is here for unit tests. */
4438 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4439
4440 bool nir_opt_comparison_pre(nir_shader *shader);
4441
4442 bool nir_opt_access(nir_shader *shader);
4443 bool nir_opt_algebraic(nir_shader *shader);
4444 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4445 bool nir_opt_algebraic_late(nir_shader *shader);
4446 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4447 bool nir_opt_constant_folding(nir_shader *shader);
4448
4449 /* Try to combine a and b into a. Return true if combination was possible,
4450 * which will result in b being removed by the pass. Return false if
4451 * combination wasn't possible.
4452 */
4453 typedef bool (*nir_combine_memory_barrier_cb)(
4454 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4455
4456 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4457 nir_combine_memory_barrier_cb combine_cb,
4458 void *data);
4459
4460 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4461
4462 bool nir_copy_prop(nir_shader *shader);
4463
4464 bool nir_opt_copy_prop_vars(nir_shader *shader);
4465
4466 bool nir_opt_cse(nir_shader *shader);
4467
4468 bool nir_opt_dce(nir_shader *shader);
4469
4470 bool nir_opt_dead_cf(nir_shader *shader);
4471
4472 bool nir_opt_dead_write_vars(nir_shader *shader);
4473
4474 bool nir_opt_deref_impl(nir_function_impl *impl);
4475 bool nir_opt_deref(nir_shader *shader);
4476
4477 bool nir_opt_find_array_copies(nir_shader *shader);
4478
4479 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4480
4481 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4482
4483 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4484
4485 bool nir_opt_intrinsics(nir_shader *shader);
4486
4487 bool nir_opt_large_constants(nir_shader *shader,
4488 glsl_type_size_align_func size_align,
4489 unsigned threshold);
4490
4491 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4492
4493 typedef enum {
4494 nir_move_const_undef = (1 << 0),
4495 nir_move_load_ubo = (1 << 1),
4496 nir_move_load_input = (1 << 2),
4497 nir_move_comparisons = (1 << 3),
4498 nir_move_copies = (1 << 4),
4499 } nir_move_options;
4500
4501 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4502
4503 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4504
4505 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4506
4507 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4508 bool indirect_load_ok, bool expensive_alu_ok);
4509
4510 bool nir_opt_rematerialize_compares(nir_shader *shader);
4511
4512 bool nir_opt_remove_phis(nir_shader *shader);
4513 bool nir_opt_remove_phis_block(nir_block *block);
4514
4515 bool nir_opt_shrink_load(nir_shader *shader);
4516
4517 bool nir_opt_trivial_continues(nir_shader *shader);
4518
4519 bool nir_opt_undef(nir_shader *shader);
4520
4521 bool nir_opt_vectorize(nir_shader *shader);
4522
4523 bool nir_opt_conditional_discard(nir_shader *shader);
4524
4525 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4526 unsigned num_components, unsigned high_offset,
4527 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4528
4529 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4530 nir_should_vectorize_mem_func callback,
4531 nir_variable_mode robust_modes);
4532
4533 void nir_schedule(nir_shader *shader, int threshold);
4534
4535 void nir_strip(nir_shader *shader);
4536
4537 void nir_sweep(nir_shader *shader);
4538
4539 void nir_remap_dual_slot_attributes(nir_shader *shader,
4540 uint64_t *dual_slot_inputs);
4541 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4542
4543 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4544 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4545
4546 static inline bool
4547 nir_variable_is_in_ubo(const nir_variable *var)
4548 {
4549 return (var->data.mode == nir_var_mem_ubo &&
4550 var->interface_type != NULL);
4551 }
4552
4553 static inline bool
4554 nir_variable_is_in_ssbo(const nir_variable *var)
4555 {
4556 return (var->data.mode == nir_var_mem_ssbo &&
4557 var->interface_type != NULL);
4558 }
4559
4560 static inline bool
4561 nir_variable_is_in_block(const nir_variable *var)
4562 {
4563 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4564 }
4565
4566 #ifdef __cplusplus
4567 } /* extern "C" */
4568 #endif
4569
4570 #endif /* NIR_H */