nir: Make "divergent" a property of an SSA value
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #include <stdio.h>
45
46 #ifndef NDEBUG
47 #include "util/debug.h"
48 #endif /* NDEBUG */
49
50 #include "nir_opcodes.h"
51
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
54 #endif
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define NIR_FALSE 0u
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t;
66
67 static inline bool
68 nir_num_components_valid(unsigned num_components)
69 {
70 return (num_components >= 1 &&
71 num_components <= 4) ||
72 num_components == 8 ||
73 num_components == 16;
74 }
75
76 /** Defines a cast function
77 *
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
80 *
81 * Note that you have to be a bit careful as the generated cast function
82 * destroys constness.
83 */
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
88 { \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
91 }
92
93 struct nir_function;
94 struct nir_shader;
95 struct nir_instr;
96 struct nir_builder;
97
98
99 /**
100 * Description of built-in state associated with a uniform
101 *
102 * \sa nir_variable::state_slots
103 */
104 typedef struct {
105 gl_state_index16 tokens[STATE_LENGTH];
106 uint16_t swizzle;
107 } nir_state_slot;
108
109 typedef enum {
110 nir_var_shader_in = (1 << 0),
111 nir_var_shader_out = (1 << 1),
112 nir_var_shader_temp = (1 << 2),
113 nir_var_function_temp = (1 << 3),
114 nir_var_uniform = (1 << 4),
115 nir_var_mem_ubo = (1 << 5),
116 nir_var_system_value = (1 << 6),
117 nir_var_mem_ssbo = (1 << 7),
118 nir_var_mem_shared = (1 << 8),
119 nir_var_mem_global = (1 << 9),
120 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes = 11,
122 nir_var_all = (1 << nir_num_variable_modes) - 1,
123 } nir_variable_mode;
124
125 /**
126 * Rounding modes.
127 */
128 typedef enum {
129 nir_rounding_mode_undef = 0,
130 nir_rounding_mode_rtne = 1, /* round to nearest even */
131 nir_rounding_mode_ru = 2, /* round up */
132 nir_rounding_mode_rd = 3, /* round down */
133 nir_rounding_mode_rtz = 4, /* round towards zero */
134 } nir_rounding_mode;
135
136 typedef union {
137 bool b;
138 float f32;
139 double f64;
140 int8_t i8;
141 uint8_t u8;
142 int16_t i16;
143 uint16_t u16;
144 int32_t i32;
145 uint32_t u32;
146 int64_t i64;
147 uint64_t u64;
148 } nir_const_value;
149
150 #define nir_const_value_to_array(arr, c, components, m) \
151 { \
152 for (unsigned i = 0; i < components; ++i) \
153 arr[i] = c[i].m; \
154 } while (false)
155
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
158 {
159 nir_const_value v;
160 memset(&v, 0, sizeof(v));
161
162 switch (bit_size) {
163 case 1: v.b = x; break;
164 case 8: v.u8 = x; break;
165 case 16: v.u16 = x; break;
166 case 32: v.u32 = x; break;
167 case 64: v.u64 = x; break;
168 default:
169 unreachable("Invalid bit size");
170 }
171
172 return v;
173 }
174
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i, unsigned bit_size)
177 {
178 nir_const_value v;
179 memset(&v, 0, sizeof(v));
180
181 assert(bit_size <= 64);
182 if (bit_size < 64) {
183 assert(i >= (-(1ll << (bit_size - 1))));
184 assert(i < (1ll << (bit_size - 1)));
185 }
186
187 return nir_const_value_for_raw_uint(i, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
192 {
193 nir_const_value v;
194 memset(&v, 0, sizeof(v));
195
196 assert(bit_size <= 64);
197 if (bit_size < 64)
198 assert(u < (1ull << bit_size));
199
200 return nir_const_value_for_raw_uint(u, bit_size);
201 }
202
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b, unsigned bit_size)
205 {
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b, bit_size);
208 }
209
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
212
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
215 {
216 switch (bit_size) {
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value.b;
219 case 8: return value.i8;
220 case 16: return value.i16;
221 case 32: return value.i32;
222 case 64: return value.i64;
223 default:
224 unreachable("Invalid bit size");
225 }
226 }
227
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
230 {
231 switch (bit_size) {
232 case 1: return value.b;
233 case 8: return value.u8;
234 case 16: return value.u16;
235 case 32: return value.u32;
236 case 64: return value.u64;
237 default:
238 unreachable("Invalid bit size");
239 }
240 }
241
242 static inline bool
243 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
244 {
245 int64_t i = nir_const_value_as_int(value, bit_size);
246
247 /* Booleans of any size use 0/-1 convention */
248 assert(i == 0 || i == -1);
249
250 return i;
251 }
252
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
255
256 typedef struct nir_constant {
257 /**
258 * Value of the constant.
259 *
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
263 */
264 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
265
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
268 */
269 unsigned num_elements;
270
271 /* Array elements / Structure Fields */
272 struct nir_constant **elements;
273 } nir_constant;
274
275 /**
276 * \brief Layout qualifiers for gl_FragDepth.
277 *
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
280 */
281 typedef enum {
282 nir_depth_layout_none, /**< No depth layout is specified. */
283 nir_depth_layout_any,
284 nir_depth_layout_greater,
285 nir_depth_layout_less,
286 nir_depth_layout_unchanged
287 } nir_depth_layout;
288
289 /**
290 * Enum keeping track of how a variable was declared.
291 */
292 typedef enum {
293 /**
294 * Normal declaration.
295 */
296 nir_var_declared_normally = 0,
297
298 /**
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
301 */
302 nir_var_hidden,
303 } nir_var_declaration_type;
304
305 /**
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
308 */
309
310 typedef struct nir_variable {
311 struct exec_node node;
312
313 /**
314 * Declared type of the variable
315 */
316 const struct glsl_type *type;
317
318 /**
319 * Declared name of the variable
320 */
321 char *name;
322
323 struct nir_variable_data {
324 /**
325 * Storage class of the variable.
326 *
327 * \sa nir_variable_mode
328 */
329 nir_variable_mode mode:11;
330
331 /**
332 * Is the variable read-only?
333 *
334 * This is set for variables declared as \c const, shader inputs,
335 * and uniforms.
336 */
337 unsigned read_only:1;
338 unsigned centroid:1;
339 unsigned sample:1;
340 unsigned patch:1;
341 unsigned invariant:1;
342
343 /**
344 * Precision qualifier.
345 *
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
348 *
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
353 */
354 unsigned precision:2;
355
356 /**
357 * Can this variable be coalesced with another?
358 *
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
364 */
365 unsigned cannot_coalesce:1;
366
367 /**
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
371 *
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
374 */
375 unsigned always_active_io:1;
376
377 /**
378 * Interpolation mode for shader inputs / outputs
379 *
380 * \sa glsl_interp_mode
381 */
382 unsigned interpolation:3;
383
384 /**
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
390 */
391 unsigned location_frac:2;
392
393 /**
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
397 */
398 unsigned compact:1;
399
400 /**
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
404 */
405 unsigned fb_fetch_output:1;
406
407 /**
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
410 */
411 unsigned bindless:1;
412
413 /**
414 * Was an explicit binding set in the shader?
415 */
416 unsigned explicit_binding:1;
417
418 /**
419 * Was the location explicitly set in the shader?
420 *
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
423 * no effect).
424 */
425 unsigned explicit_location:1;
426
427 /**
428 * Was a transfer feedback buffer set in the shader?
429 */
430 unsigned explicit_xfb_buffer:1;
431
432 /**
433 * Was a transfer feedback stride set in the shader?
434 */
435 unsigned explicit_xfb_stride:1;
436
437 /**
438 * Was an explicit offset set in the shader?
439 */
440 unsigned explicit_offset:1;
441
442 /**
443 * Layout of the matrix. Uses glsl_matrix_layout values.
444 */
445 unsigned matrix_layout:2;
446
447 /**
448 * Non-zero if this variable was created by lowering a named interface
449 * block.
450 */
451 unsigned from_named_ifc_block:1;
452
453 /**
454 * How the variable was declared. See nir_var_declaration_type.
455 *
456 * This is used to detect variables generated by the compiler, so should
457 * not be visible via the API.
458 */
459 unsigned how_declared:2;
460
461 /**
462 * Is this variable per-view? If so, we know it must be an array with
463 * size corresponding to the number of views.
464 */
465 unsigned per_view:1;
466
467 /**
468 * \brief Layout qualifier for gl_FragDepth.
469 *
470 * This is not equal to \c ir_depth_layout_none if and only if this
471 * variable is \c gl_FragDepth and a layout qualifier is specified.
472 */
473 nir_depth_layout depth_layout:3;
474
475 /**
476 * Vertex stream output identifier.
477 *
478 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
479 * indicate the stream of the i-th component.
480 */
481 unsigned stream:9;
482
483 /**
484 * Access flags for memory variables (SSBO/global), image uniforms, and
485 * bindless images in uniforms/inputs/outputs.
486 */
487 enum gl_access_qualifier access:8;
488
489 /**
490 * Descriptor set binding for sampler or UBO.
491 */
492 unsigned descriptor_set:5;
493
494 /**
495 * output index for dual source blending.
496 */
497 unsigned index;
498
499 /**
500 * Initial binding point for a sampler or UBO.
501 *
502 * For array types, this represents the binding point for the first element.
503 */
504 unsigned binding;
505
506 /**
507 * Storage location of the base of this variable
508 *
509 * The precise meaning of this field depends on the nature of the variable.
510 *
511 * - Vertex shader input: one of the values from \c gl_vert_attrib.
512 * - Vertex shader output: one of the values from \c gl_varying_slot.
513 * - Geometry shader input: one of the values from \c gl_varying_slot.
514 * - Geometry shader output: one of the values from \c gl_varying_slot.
515 * - Fragment shader input: one of the values from \c gl_varying_slot.
516 * - Fragment shader output: one of the values from \c gl_frag_result.
517 * - Uniforms: Per-stage uniform slot number for default uniform block.
518 * - Uniforms: Index within the uniform block definition for UBO members.
519 * - Non-UBO Uniforms: uniform slot number.
520 * - Other: This field is not currently used.
521 *
522 * If the variable is a uniform, shader input, or shader output, and the
523 * slot has not been assigned, the value will be -1.
524 */
525 int location;
526
527 /**
528 * The actual location of the variable in the IR. Only valid for inputs,
529 * outputs, and uniforms (including samplers and images).
530 */
531 unsigned driver_location;
532
533 /**
534 * Location an atomic counter or transform feedback is stored at.
535 */
536 unsigned offset;
537
538 union {
539 struct {
540 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
541 enum pipe_format format;
542 } image;
543
544 struct {
545 /**
546 * Transform feedback buffer.
547 */
548 uint16_t buffer:2;
549
550 /**
551 * Transform feedback stride.
552 */
553 uint16_t stride;
554 } xfb;
555 };
556 } data;
557
558 /**
559 * Identifier for this variable generated by nir_index_vars() that is unique
560 * among other variables in the same exec_list.
561 */
562 unsigned index;
563
564 /* Number of nir_variable_data members */
565 uint16_t num_members;
566
567 /**
568 * Built-in state that backs this uniform
569 *
570 * Once set at variable creation, \c state_slots must remain invariant.
571 * This is because, ideally, this array would be shared by all clones of
572 * this variable in the IR tree. In other words, we'd really like for it
573 * to be a fly-weight.
574 *
575 * If the variable is not a uniform, \c num_state_slots will be zero and
576 * \c state_slots will be \c NULL.
577 */
578 /*@{*/
579 uint16_t num_state_slots; /**< Number of state slots used */
580 nir_state_slot *state_slots; /**< State descriptors. */
581 /*@}*/
582
583 /**
584 * Constant expression assigned in the initializer of the variable
585 *
586 * This field should only be used temporarily by creators of NIR shaders
587 * and then lower_constant_initializers can be used to get rid of them.
588 * Most of the rest of NIR ignores this field or asserts that it's NULL.
589 */
590 nir_constant *constant_initializer;
591
592 /**
593 * Global variable assigned in the initializer of the variable
594 * This field should only be used temporarily by creators of NIR shaders
595 * and then lower_constant_initializers can be used to get rid of them.
596 * Most of the rest of NIR ignores this field or asserts that it's NULL.
597 */
598 struct nir_variable *pointer_initializer;
599
600 /**
601 * For variables that are in an interface block or are an instance of an
602 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
603 *
604 * \sa ir_variable::location
605 */
606 const struct glsl_type *interface_type;
607
608 /**
609 * Description of per-member data for per-member struct variables
610 *
611 * This is used for variables which are actually an amalgamation of
612 * multiple entities such as a struct of built-in values or a struct of
613 * inputs each with their own layout specifier. This is only allowed on
614 * variables with a struct or array of array of struct type.
615 */
616 struct nir_variable_data *members;
617 } nir_variable;
618
619 #define nir_foreach_variable(var, var_list) \
620 foreach_list_typed(nir_variable, var, node, var_list)
621
622 #define nir_foreach_variable_safe(var, var_list) \
623 foreach_list_typed_safe(nir_variable, var, node, var_list)
624
625 static inline bool
626 nir_variable_is_global(const nir_variable *var)
627 {
628 return var->data.mode != nir_var_function_temp;
629 }
630
631 typedef struct nir_register {
632 struct exec_node node;
633
634 unsigned num_components; /** < number of vector components */
635 unsigned num_array_elems; /** < size of array (0 for no array) */
636
637 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
638 uint8_t bit_size;
639
640 /** generic register index. */
641 unsigned index;
642
643 /** only for debug purposes, can be NULL */
644 const char *name;
645
646 /** set of nir_srcs where this register is used (read from) */
647 struct list_head uses;
648
649 /** set of nir_dests where this register is defined (written to) */
650 struct list_head defs;
651
652 /** set of nir_ifs where this register is used as a condition */
653 struct list_head if_uses;
654 } nir_register;
655
656 #define nir_foreach_register(reg, reg_list) \
657 foreach_list_typed(nir_register, reg, node, reg_list)
658 #define nir_foreach_register_safe(reg, reg_list) \
659 foreach_list_typed_safe(nir_register, reg, node, reg_list)
660
661 typedef enum PACKED {
662 nir_instr_type_alu,
663 nir_instr_type_deref,
664 nir_instr_type_call,
665 nir_instr_type_tex,
666 nir_instr_type_intrinsic,
667 nir_instr_type_load_const,
668 nir_instr_type_jump,
669 nir_instr_type_ssa_undef,
670 nir_instr_type_phi,
671 nir_instr_type_parallel_copy,
672 } nir_instr_type;
673
674 typedef struct nir_instr {
675 struct exec_node node;
676 struct nir_block *block;
677 nir_instr_type type;
678
679 /* A temporary for optimization and analysis passes to use for storing
680 * flags. For instance, DCE uses this to store the "dead/live" info.
681 */
682 uint8_t pass_flags;
683
684 /** generic instruction index. */
685 unsigned index;
686 } nir_instr;
687
688 static inline nir_instr *
689 nir_instr_next(nir_instr *instr)
690 {
691 struct exec_node *next = exec_node_get_next(&instr->node);
692 if (exec_node_is_tail_sentinel(next))
693 return NULL;
694 else
695 return exec_node_data(nir_instr, next, node);
696 }
697
698 static inline nir_instr *
699 nir_instr_prev(nir_instr *instr)
700 {
701 struct exec_node *prev = exec_node_get_prev(&instr->node);
702 if (exec_node_is_head_sentinel(prev))
703 return NULL;
704 else
705 return exec_node_data(nir_instr, prev, node);
706 }
707
708 static inline bool
709 nir_instr_is_first(const nir_instr *instr)
710 {
711 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
712 }
713
714 static inline bool
715 nir_instr_is_last(const nir_instr *instr)
716 {
717 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
718 }
719
720 typedef struct nir_ssa_def {
721 /** for debugging only, can be NULL */
722 const char* name;
723
724 /** generic SSA definition index. */
725 unsigned index;
726
727 /** Index into the live_in and live_out bitfields */
728 unsigned live_index;
729
730 /** Instruction which produces this SSA value. */
731 nir_instr *parent_instr;
732
733 /** set of nir_instrs where this register is used (read from) */
734 struct list_head uses;
735
736 /** set of nir_ifs where this register is used as a condition */
737 struct list_head if_uses;
738
739 uint8_t num_components;
740
741 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
742 uint8_t bit_size;
743
744 /**
745 * True if this SSA value may have different values in different SIMD
746 * invocations of the shader. This is set by nir_divergence_analysis.
747 */
748 bool divergent;
749 } nir_ssa_def;
750
751 struct nir_src;
752
753 typedef struct {
754 nir_register *reg;
755 struct nir_src *indirect; /** < NULL for no indirect offset */
756 unsigned base_offset;
757
758 /* TODO use-def chain goes here */
759 } nir_reg_src;
760
761 typedef struct {
762 nir_instr *parent_instr;
763 struct list_head def_link;
764
765 nir_register *reg;
766 struct nir_src *indirect; /** < NULL for no indirect offset */
767 unsigned base_offset;
768
769 /* TODO def-use chain goes here */
770 } nir_reg_dest;
771
772 struct nir_if;
773
774 typedef struct nir_src {
775 union {
776 /** Instruction that consumes this value as a source. */
777 nir_instr *parent_instr;
778 struct nir_if *parent_if;
779 };
780
781 struct list_head use_link;
782
783 union {
784 nir_reg_src reg;
785 nir_ssa_def *ssa;
786 };
787
788 bool is_ssa;
789 } nir_src;
790
791 static inline nir_src
792 nir_src_init(void)
793 {
794 nir_src src = { { NULL } };
795 return src;
796 }
797
798 #define NIR_SRC_INIT nir_src_init()
799
800 #define nir_foreach_use(src, reg_or_ssa_def) \
801 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
802
803 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
804 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
805
806 #define nir_foreach_if_use(src, reg_or_ssa_def) \
807 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
808
809 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
810 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
811
812 typedef struct {
813 union {
814 nir_reg_dest reg;
815 nir_ssa_def ssa;
816 };
817
818 bool is_ssa;
819 } nir_dest;
820
821 static inline nir_dest
822 nir_dest_init(void)
823 {
824 nir_dest dest = { { { NULL } } };
825 return dest;
826 }
827
828 #define NIR_DEST_INIT nir_dest_init()
829
830 #define nir_foreach_def(dest, reg) \
831 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
832
833 #define nir_foreach_def_safe(dest, reg) \
834 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
835
836 static inline nir_src
837 nir_src_for_ssa(nir_ssa_def *def)
838 {
839 nir_src src = NIR_SRC_INIT;
840
841 src.is_ssa = true;
842 src.ssa = def;
843
844 return src;
845 }
846
847 static inline nir_src
848 nir_src_for_reg(nir_register *reg)
849 {
850 nir_src src = NIR_SRC_INIT;
851
852 src.is_ssa = false;
853 src.reg.reg = reg;
854 src.reg.indirect = NULL;
855 src.reg.base_offset = 0;
856
857 return src;
858 }
859
860 static inline nir_dest
861 nir_dest_for_reg(nir_register *reg)
862 {
863 nir_dest dest = NIR_DEST_INIT;
864
865 dest.reg.reg = reg;
866
867 return dest;
868 }
869
870 static inline unsigned
871 nir_src_bit_size(nir_src src)
872 {
873 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
874 }
875
876 static inline unsigned
877 nir_src_num_components(nir_src src)
878 {
879 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
880 }
881
882 static inline bool
883 nir_src_is_const(nir_src src)
884 {
885 return src.is_ssa &&
886 src.ssa->parent_instr->type == nir_instr_type_load_const;
887 }
888
889 static inline bool
890 nir_src_is_divergent(nir_src src)
891 {
892 assert(src.is_ssa);
893 return src.ssa->divergent;
894 }
895
896 static inline unsigned
897 nir_dest_bit_size(nir_dest dest)
898 {
899 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
900 }
901
902 static inline unsigned
903 nir_dest_num_components(nir_dest dest)
904 {
905 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
906 }
907
908 static inline bool
909 nir_dest_is_divergent(nir_dest dest)
910 {
911 assert(dest.is_ssa);
912 return dest.ssa.divergent;
913 }
914
915 /* Are all components the same, ie. .xxxx */
916 static inline bool
917 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
918 {
919 for (unsigned i = 1; i < nr_comp; i++)
920 if (swiz[i] != swiz[0])
921 return false;
922 return true;
923 }
924
925 /* Are all components sequential, ie. .yzw */
926 static inline bool
927 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
928 {
929 for (unsigned i = 1; i < nr_comp; i++)
930 if (swiz[i] != (swiz[0] + i))
931 return false;
932 return true;
933 }
934
935 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
936 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
937
938 typedef struct {
939 nir_src src;
940
941 /**
942 * \name input modifiers
943 */
944 /*@{*/
945 /**
946 * For inputs interpreted as floating point, flips the sign bit. For
947 * inputs interpreted as integers, performs the two's complement negation.
948 */
949 bool negate;
950
951 /**
952 * Clears the sign bit for floating point values, and computes the integer
953 * absolute value for integers. Note that the negate modifier acts after
954 * the absolute value modifier, therefore if both are set then all inputs
955 * will become negative.
956 */
957 bool abs;
958 /*@}*/
959
960 /**
961 * For each input component, says which component of the register it is
962 * chosen from. Note that which elements of the swizzle are used and which
963 * are ignored are based on the write mask for most opcodes - for example,
964 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
965 * a swizzle of {2, x, 1, 0} where x means "don't care."
966 */
967 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
968 } nir_alu_src;
969
970 typedef struct {
971 nir_dest dest;
972
973 /**
974 * \name saturate output modifier
975 *
976 * Only valid for opcodes that output floating-point numbers. Clamps the
977 * output to between 0.0 and 1.0 inclusive.
978 */
979
980 bool saturate;
981
982 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
983 } nir_alu_dest;
984
985 /** NIR sized and unsized types
986 *
987 * The values in this enum are carefully chosen so that the sized type is
988 * just the unsized type OR the number of bits.
989 */
990 typedef enum {
991 nir_type_invalid = 0, /* Not a valid type */
992 nir_type_int = 2,
993 nir_type_uint = 4,
994 nir_type_bool = 6,
995 nir_type_float = 128,
996 nir_type_bool1 = 1 | nir_type_bool,
997 nir_type_bool8 = 8 | nir_type_bool,
998 nir_type_bool16 = 16 | nir_type_bool,
999 nir_type_bool32 = 32 | nir_type_bool,
1000 nir_type_int1 = 1 | nir_type_int,
1001 nir_type_int8 = 8 | nir_type_int,
1002 nir_type_int16 = 16 | nir_type_int,
1003 nir_type_int32 = 32 | nir_type_int,
1004 nir_type_int64 = 64 | nir_type_int,
1005 nir_type_uint1 = 1 | nir_type_uint,
1006 nir_type_uint8 = 8 | nir_type_uint,
1007 nir_type_uint16 = 16 | nir_type_uint,
1008 nir_type_uint32 = 32 | nir_type_uint,
1009 nir_type_uint64 = 64 | nir_type_uint,
1010 nir_type_float16 = 16 | nir_type_float,
1011 nir_type_float32 = 32 | nir_type_float,
1012 nir_type_float64 = 64 | nir_type_float,
1013 } nir_alu_type;
1014
1015 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1016 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1017
1018 static inline unsigned
1019 nir_alu_type_get_type_size(nir_alu_type type)
1020 {
1021 return type & NIR_ALU_TYPE_SIZE_MASK;
1022 }
1023
1024 static inline unsigned
1025 nir_alu_type_get_base_type(nir_alu_type type)
1026 {
1027 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
1028 }
1029
1030 static inline nir_alu_type
1031 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1032 {
1033 switch (base_type) {
1034 case GLSL_TYPE_BOOL:
1035 return nir_type_bool1;
1036 break;
1037 case GLSL_TYPE_UINT:
1038 return nir_type_uint32;
1039 break;
1040 case GLSL_TYPE_INT:
1041 return nir_type_int32;
1042 break;
1043 case GLSL_TYPE_UINT16:
1044 return nir_type_uint16;
1045 break;
1046 case GLSL_TYPE_INT16:
1047 return nir_type_int16;
1048 break;
1049 case GLSL_TYPE_UINT8:
1050 return nir_type_uint8;
1051 case GLSL_TYPE_INT8:
1052 return nir_type_int8;
1053 case GLSL_TYPE_UINT64:
1054 return nir_type_uint64;
1055 break;
1056 case GLSL_TYPE_INT64:
1057 return nir_type_int64;
1058 break;
1059 case GLSL_TYPE_FLOAT:
1060 return nir_type_float32;
1061 break;
1062 case GLSL_TYPE_FLOAT16:
1063 return nir_type_float16;
1064 break;
1065 case GLSL_TYPE_DOUBLE:
1066 return nir_type_float64;
1067 break;
1068
1069 case GLSL_TYPE_SAMPLER:
1070 case GLSL_TYPE_IMAGE:
1071 case GLSL_TYPE_ATOMIC_UINT:
1072 case GLSL_TYPE_STRUCT:
1073 case GLSL_TYPE_INTERFACE:
1074 case GLSL_TYPE_ARRAY:
1075 case GLSL_TYPE_VOID:
1076 case GLSL_TYPE_SUBROUTINE:
1077 case GLSL_TYPE_FUNCTION:
1078 case GLSL_TYPE_ERROR:
1079 return nir_type_invalid;
1080 }
1081
1082 unreachable("unknown type");
1083 }
1084
1085 static inline nir_alu_type
1086 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1087 {
1088 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1089 }
1090
1091 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1092 nir_rounding_mode rnd);
1093
1094 static inline nir_op
1095 nir_op_vec(unsigned components)
1096 {
1097 switch (components) {
1098 case 1: return nir_op_mov;
1099 case 2: return nir_op_vec2;
1100 case 3: return nir_op_vec3;
1101 case 4: return nir_op_vec4;
1102 case 8: return nir_op_vec8;
1103 case 16: return nir_op_vec16;
1104 default: unreachable("bad component count");
1105 }
1106 }
1107
1108 static inline bool
1109 nir_op_is_vec(nir_op op)
1110 {
1111 switch (op) {
1112 case nir_op_mov:
1113 case nir_op_vec2:
1114 case nir_op_vec3:
1115 case nir_op_vec4:
1116 case nir_op_vec8:
1117 case nir_op_vec16:
1118 return true;
1119 default:
1120 return false;
1121 }
1122 }
1123
1124 static inline bool
1125 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1126 {
1127 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1128 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1129 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1130 }
1131
1132 static inline bool
1133 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1134 {
1135 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1136 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1137 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1138 }
1139
1140 static inline bool
1141 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1142 {
1143 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1144 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1145 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1146 }
1147
1148 static inline bool
1149 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1150 {
1151 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1152 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1153 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1154 }
1155
1156 static inline bool
1157 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1158 {
1159 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1160 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1161 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1162 }
1163
1164 static inline bool
1165 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1166 {
1167 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1168 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1169 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1170 }
1171
1172 static inline bool
1173 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1174 {
1175 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1176 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1177 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1178 }
1179
1180 static inline nir_rounding_mode
1181 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1182 nir_alu_type type)
1183 {
1184 if (nir_alu_type_get_base_type(type) != nir_type_float)
1185 return nir_rounding_mode_undef;
1186
1187 unsigned bit_size = nir_alu_type_get_type_size(type);
1188
1189 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1190 return nir_rounding_mode_rtz;
1191 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1192 return nir_rounding_mode_rtne;
1193 return nir_rounding_mode_undef;
1194 }
1195
1196 static inline bool
1197 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1198 {
1199 bool result =
1200 nir_has_any_rounding_mode_rtne(execution_mode) ||
1201 nir_has_any_rounding_mode_rtz(execution_mode);
1202 return result;
1203 }
1204
1205 typedef enum {
1206 /**
1207 * Operation where the first two sources are commutative.
1208 *
1209 * For 2-source operations, this just mathematical commutativity. Some
1210 * 3-source operations, like ffma, are only commutative in the first two
1211 * sources.
1212 */
1213 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1214 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1215 } nir_op_algebraic_property;
1216
1217 typedef struct {
1218 const char *name;
1219
1220 unsigned num_inputs;
1221
1222 /**
1223 * The number of components in the output
1224 *
1225 * If non-zero, this is the size of the output and input sizes are
1226 * explicitly given; swizzle and writemask are still in effect, but if
1227 * the output component is masked out, then the input component may
1228 * still be in use.
1229 *
1230 * If zero, the opcode acts in the standard, per-component manner; the
1231 * operation is performed on each component (except the ones that are
1232 * masked out) with the input being taken from the input swizzle for
1233 * that component.
1234 *
1235 * The size of some of the inputs may be given (i.e. non-zero) even
1236 * though output_size is zero; in that case, the inputs with a zero
1237 * size act per-component, while the inputs with non-zero size don't.
1238 */
1239 unsigned output_size;
1240
1241 /**
1242 * The type of vector that the instruction outputs. Note that the
1243 * staurate modifier is only allowed on outputs with the float type.
1244 */
1245
1246 nir_alu_type output_type;
1247
1248 /**
1249 * The number of components in each input
1250 */
1251 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1252
1253 /**
1254 * The type of vector that each input takes. Note that negate and
1255 * absolute value are only allowed on inputs with int or float type and
1256 * behave differently on the two.
1257 */
1258 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1259
1260 nir_op_algebraic_property algebraic_properties;
1261
1262 /* Whether this represents a numeric conversion opcode */
1263 bool is_conversion;
1264 } nir_op_info;
1265
1266 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1267
1268 typedef struct nir_alu_instr {
1269 nir_instr instr;
1270 nir_op op;
1271
1272 /** Indicates that this ALU instruction generates an exact value
1273 *
1274 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1275 * really equivalent to either. This indicates that the value generated by
1276 * this operation is high-precision and any code transformations that touch
1277 * it must ensure that the resulting value is bit-for-bit identical to the
1278 * original.
1279 */
1280 bool exact:1;
1281
1282 /**
1283 * Indicates that this instruction do not cause wrapping to occur, in the
1284 * form of overflow or underflow.
1285 */
1286 bool no_signed_wrap:1;
1287 bool no_unsigned_wrap:1;
1288
1289 nir_alu_dest dest;
1290 nir_alu_src src[];
1291 } nir_alu_instr;
1292
1293 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1294 nir_alu_instr *instr);
1295 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1296 nir_alu_instr *instr);
1297
1298 /* is this source channel used? */
1299 static inline bool
1300 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1301 unsigned channel)
1302 {
1303 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1304 return channel < nir_op_infos[instr->op].input_sizes[src];
1305
1306 return (instr->dest.write_mask >> channel) & 1;
1307 }
1308
1309 static inline nir_component_mask_t
1310 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1311 {
1312 nir_component_mask_t read_mask = 0;
1313 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1314 if (!nir_alu_instr_channel_used(instr, src, c))
1315 continue;
1316
1317 read_mask |= (1 << instr->src[src].swizzle[c]);
1318 }
1319 return read_mask;
1320 }
1321
1322 /**
1323 * Get the number of channels used for a source
1324 */
1325 static inline unsigned
1326 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1327 {
1328 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1329 return nir_op_infos[instr->op].input_sizes[src];
1330
1331 return nir_dest_num_components(instr->dest.dest);
1332 }
1333
1334 static inline bool
1335 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1336 {
1337 switch (instr->op) {
1338 case nir_op_flt:
1339 case nir_op_fge:
1340 case nir_op_feq:
1341 case nir_op_fne:
1342 case nir_op_ilt:
1343 case nir_op_ult:
1344 case nir_op_ige:
1345 case nir_op_uge:
1346 case nir_op_ieq:
1347 case nir_op_ine:
1348 case nir_op_i2b1:
1349 case nir_op_f2b1:
1350 case nir_op_inot:
1351 return true;
1352 default:
1353 return false;
1354 }
1355 }
1356
1357 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1358 nir_alu_type full_type);
1359
1360 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1361 unsigned src1, unsigned src2);
1362
1363 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1364 const nir_alu_instr *alu2,
1365 unsigned src1, unsigned src2);
1366
1367 typedef enum {
1368 nir_deref_type_var,
1369 nir_deref_type_array,
1370 nir_deref_type_array_wildcard,
1371 nir_deref_type_ptr_as_array,
1372 nir_deref_type_struct,
1373 nir_deref_type_cast,
1374 } nir_deref_type;
1375
1376 typedef struct {
1377 nir_instr instr;
1378
1379 /** The type of this deref instruction */
1380 nir_deref_type deref_type;
1381
1382 /** The mode of the underlying variable */
1383 nir_variable_mode mode;
1384
1385 /** The dereferenced type of the resulting pointer value */
1386 const struct glsl_type *type;
1387
1388 union {
1389 /** Variable being dereferenced if deref_type is a deref_var */
1390 nir_variable *var;
1391
1392 /** Parent deref if deref_type is not deref_var */
1393 nir_src parent;
1394 };
1395
1396 /** Additional deref parameters */
1397 union {
1398 struct {
1399 nir_src index;
1400 } arr;
1401
1402 struct {
1403 unsigned index;
1404 } strct;
1405
1406 struct {
1407 unsigned ptr_stride;
1408 } cast;
1409 };
1410
1411 /** Destination to store the resulting "pointer" */
1412 nir_dest dest;
1413 } nir_deref_instr;
1414
1415 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1416
1417 static inline nir_deref_instr *
1418 nir_deref_instr_parent(const nir_deref_instr *instr)
1419 {
1420 if (instr->deref_type == nir_deref_type_var)
1421 return NULL;
1422 else
1423 return nir_src_as_deref(instr->parent);
1424 }
1425
1426 static inline nir_variable *
1427 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1428 {
1429 while (instr->deref_type != nir_deref_type_var) {
1430 if (instr->deref_type == nir_deref_type_cast)
1431 return NULL;
1432
1433 instr = nir_deref_instr_parent(instr);
1434 }
1435
1436 return instr->var;
1437 }
1438
1439 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1440 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1441 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1442
1443 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1444
1445 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1446
1447 typedef struct {
1448 nir_instr instr;
1449
1450 struct nir_function *callee;
1451
1452 unsigned num_params;
1453 nir_src params[];
1454 } nir_call_instr;
1455
1456 #include "nir_intrinsics.h"
1457
1458 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1459
1460 /** Represents an intrinsic
1461 *
1462 * An intrinsic is an instruction type for handling things that are
1463 * more-or-less regular operations but don't just consume and produce SSA
1464 * values like ALU operations do. Intrinsics are not for things that have
1465 * special semantic meaning such as phi nodes and parallel copies.
1466 * Examples of intrinsics include variable load/store operations, system
1467 * value loads, and the like. Even though texturing more-or-less falls
1468 * under this category, texturing is its own instruction type because
1469 * trying to represent texturing with intrinsics would lead to a
1470 * combinatorial explosion of intrinsic opcodes.
1471 *
1472 * By having a single instruction type for handling a lot of different
1473 * cases, optimization passes can look for intrinsics and, for the most
1474 * part, completely ignore them. Each intrinsic type also has a few
1475 * possible flags that govern whether or not they can be reordered or
1476 * eliminated. That way passes like dead code elimination can still work
1477 * on intrisics without understanding the meaning of each.
1478 *
1479 * Each intrinsic has some number of constant indices, some number of
1480 * variables, and some number of sources. What these sources, variables,
1481 * and indices mean depends on the intrinsic and is documented with the
1482 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1483 * instructions are the only types of instruction that can operate on
1484 * variables.
1485 */
1486 typedef struct {
1487 nir_instr instr;
1488
1489 nir_intrinsic_op intrinsic;
1490
1491 nir_dest dest;
1492
1493 /** number of components if this is a vectorized intrinsic
1494 *
1495 * Similarly to ALU operations, some intrinsics are vectorized.
1496 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1497 * For vectorized intrinsics, the num_components field specifies the
1498 * number of destination components and the number of source components
1499 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1500 */
1501 uint8_t num_components;
1502
1503 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1504
1505 nir_src src[];
1506 } nir_intrinsic_instr;
1507
1508 static inline nir_variable *
1509 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1510 {
1511 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1512 }
1513
1514 typedef enum {
1515 /* Memory ordering. */
1516 NIR_MEMORY_ACQUIRE = 1 << 0,
1517 NIR_MEMORY_RELEASE = 1 << 1,
1518 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1519
1520 /* Memory visibility operations. */
1521 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1522 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1523 } nir_memory_semantics;
1524
1525 typedef enum {
1526 NIR_SCOPE_INVOCATION,
1527 NIR_SCOPE_SUBGROUP,
1528 NIR_SCOPE_WORKGROUP,
1529 NIR_SCOPE_QUEUE_FAMILY,
1530 NIR_SCOPE_DEVICE,
1531 } nir_scope;
1532
1533 /**
1534 * \name NIR intrinsics semantic flags
1535 *
1536 * information about what the compiler can do with the intrinsics.
1537 *
1538 * \sa nir_intrinsic_info::flags
1539 */
1540 typedef enum {
1541 /**
1542 * whether the intrinsic can be safely eliminated if none of its output
1543 * value is not being used.
1544 */
1545 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1546
1547 /**
1548 * Whether the intrinsic can be reordered with respect to any other
1549 * intrinsic, i.e. whether the only reordering dependencies of the
1550 * intrinsic are due to the register reads/writes.
1551 */
1552 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1553 } nir_intrinsic_semantic_flag;
1554
1555 /**
1556 * \name NIR intrinsics const-index flag
1557 *
1558 * Indicates the usage of a const_index slot.
1559 *
1560 * \sa nir_intrinsic_info::index_map
1561 */
1562 typedef enum {
1563 /**
1564 * Generally instructions that take a offset src argument, can encode
1565 * a constant 'base' value which is added to the offset.
1566 */
1567 NIR_INTRINSIC_BASE = 1,
1568
1569 /**
1570 * For store instructions, a writemask for the store.
1571 */
1572 NIR_INTRINSIC_WRMASK,
1573
1574 /**
1575 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1576 */
1577 NIR_INTRINSIC_STREAM_ID,
1578
1579 /**
1580 * The clip-plane id for load_user_clip_plane intrinsic.
1581 */
1582 NIR_INTRINSIC_UCP_ID,
1583
1584 /**
1585 * The amount of data, starting from BASE, that this instruction may
1586 * access. This is used to provide bounds if the offset is not constant.
1587 */
1588 NIR_INTRINSIC_RANGE,
1589
1590 /**
1591 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1592 */
1593 NIR_INTRINSIC_DESC_SET,
1594
1595 /**
1596 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1597 */
1598 NIR_INTRINSIC_BINDING,
1599
1600 /**
1601 * Component offset.
1602 */
1603 NIR_INTRINSIC_COMPONENT,
1604
1605 /**
1606 * Interpolation mode (only meaningful for FS inputs).
1607 */
1608 NIR_INTRINSIC_INTERP_MODE,
1609
1610 /**
1611 * A binary nir_op to use when performing a reduction or scan operation
1612 */
1613 NIR_INTRINSIC_REDUCTION_OP,
1614
1615 /**
1616 * Cluster size for reduction operations
1617 */
1618 NIR_INTRINSIC_CLUSTER_SIZE,
1619
1620 /**
1621 * Parameter index for a load_param intrinsic
1622 */
1623 NIR_INTRINSIC_PARAM_IDX,
1624
1625 /**
1626 * Image dimensionality for image intrinsics
1627 *
1628 * One of GLSL_SAMPLER_DIM_*
1629 */
1630 NIR_INTRINSIC_IMAGE_DIM,
1631
1632 /**
1633 * Non-zero if we are accessing an array image
1634 */
1635 NIR_INTRINSIC_IMAGE_ARRAY,
1636
1637 /**
1638 * Image format for image intrinsics
1639 */
1640 NIR_INTRINSIC_FORMAT,
1641
1642 /**
1643 * Access qualifiers for image and memory access intrinsics
1644 */
1645 NIR_INTRINSIC_ACCESS,
1646
1647 /**
1648 * Alignment for offsets and addresses
1649 *
1650 * These two parameters, specify an alignment in terms of a multiplier and
1651 * an offset. The offset or address parameter X of the intrinsic is
1652 * guaranteed to satisfy the following:
1653 *
1654 * (X - align_offset) % align_mul == 0
1655 */
1656 NIR_INTRINSIC_ALIGN_MUL,
1657 NIR_INTRINSIC_ALIGN_OFFSET,
1658
1659 /**
1660 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1661 */
1662 NIR_INTRINSIC_DESC_TYPE,
1663
1664 /**
1665 * The nir_alu_type of a uniform/input/output
1666 */
1667 NIR_INTRINSIC_TYPE,
1668
1669 /**
1670 * The swizzle mask for the instructions
1671 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1672 */
1673 NIR_INTRINSIC_SWIZZLE_MASK,
1674
1675 /* Separate source/dest access flags for copies */
1676 NIR_INTRINSIC_SRC_ACCESS,
1677 NIR_INTRINSIC_DST_ACCESS,
1678
1679 /* Driver location for nir_load_patch_location_ir3 */
1680 NIR_INTRINSIC_DRIVER_LOCATION,
1681
1682 /**
1683 * Mask of nir_memory_semantics, includes ordering and visibility.
1684 */
1685 NIR_INTRINSIC_MEMORY_SEMANTICS,
1686
1687 /**
1688 * Mask of nir_variable_modes affected by the memory operation.
1689 */
1690 NIR_INTRINSIC_MEMORY_MODES,
1691
1692 /**
1693 * Value of nir_scope.
1694 */
1695 NIR_INTRINSIC_MEMORY_SCOPE,
1696
1697 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1698
1699 } nir_intrinsic_index_flag;
1700
1701 #define NIR_INTRINSIC_MAX_INPUTS 5
1702
1703 typedef struct {
1704 const char *name;
1705
1706 unsigned num_srcs; /** < number of register/SSA inputs */
1707
1708 /** number of components of each input register
1709 *
1710 * If this value is 0, the number of components is given by the
1711 * num_components field of nir_intrinsic_instr. If this value is -1, the
1712 * intrinsic consumes however many components are provided and it is not
1713 * validated at all.
1714 */
1715 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1716
1717 bool has_dest;
1718
1719 /** number of components of the output register
1720 *
1721 * If this value is 0, the number of components is given by the
1722 * num_components field of nir_intrinsic_instr.
1723 */
1724 unsigned dest_components;
1725
1726 /** bitfield of legal bit sizes */
1727 unsigned dest_bit_sizes;
1728
1729 /** the number of constant indices used by the intrinsic */
1730 unsigned num_indices;
1731
1732 /** indicates the usage of intr->const_index[n] */
1733 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1734
1735 /** semantic flags for calls to this intrinsic */
1736 nir_intrinsic_semantic_flag flags;
1737 } nir_intrinsic_info;
1738
1739 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1740
1741 static inline unsigned
1742 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1743 {
1744 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1745 assert(srcn < info->num_srcs);
1746 if (info->src_components[srcn] > 0)
1747 return info->src_components[srcn];
1748 else if (info->src_components[srcn] == 0)
1749 return intr->num_components;
1750 else
1751 return nir_src_num_components(intr->src[srcn]);
1752 }
1753
1754 static inline unsigned
1755 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1756 {
1757 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1758 if (!info->has_dest)
1759 return 0;
1760 else if (info->dest_components)
1761 return info->dest_components;
1762 else
1763 return intr->num_components;
1764 }
1765
1766 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1767 static inline type \
1768 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1769 { \
1770 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1771 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1772 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1773 } \
1774 static inline void \
1775 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1776 { \
1777 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1778 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1779 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1780 }
1781
1782 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1783 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1784 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1785 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1786 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1787 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1788 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1789 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1790 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1791 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1792 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1793 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1794 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1795 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1796 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1797 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1798 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1799 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1800 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1801 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1802 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1803 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1804 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1805 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1806 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1807 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1808 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1809
1810 static inline void
1811 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1812 unsigned align_mul, unsigned align_offset)
1813 {
1814 assert(util_is_power_of_two_nonzero(align_mul));
1815 assert(align_offset < align_mul);
1816 nir_intrinsic_set_align_mul(intrin, align_mul);
1817 nir_intrinsic_set_align_offset(intrin, align_offset);
1818 }
1819
1820 /** Returns a simple alignment for a load/store intrinsic offset
1821 *
1822 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1823 * and ALIGN_OFFSET parameters, this helper takes both into account and
1824 * provides a single simple alignment parameter. The offset X is guaranteed
1825 * to satisfy X % align == 0.
1826 */
1827 static inline unsigned
1828 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1829 {
1830 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1831 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1832 assert(align_offset < align_mul);
1833 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1834 }
1835
1836 unsigned
1837 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1838
1839 /* Converts a image_deref_* intrinsic into a image_* one */
1840 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1841 nir_ssa_def *handle, bool bindless);
1842
1843 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1844 static inline bool
1845 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1846 {
1847 if (instr->intrinsic == nir_intrinsic_load_deref ||
1848 instr->intrinsic == nir_intrinsic_load_ssbo ||
1849 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1850 instr->intrinsic == nir_intrinsic_image_deref_load ||
1851 instr->intrinsic == nir_intrinsic_image_load) {
1852 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1853 } else {
1854 const nir_intrinsic_info *info =
1855 &nir_intrinsic_infos[instr->intrinsic];
1856 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1857 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1858 }
1859 }
1860
1861 /**
1862 * \group texture information
1863 *
1864 * This gives semantic information about textures which is useful to the
1865 * frontend, the backend, and lowering passes, but not the optimizer.
1866 */
1867
1868 typedef enum {
1869 nir_tex_src_coord,
1870 nir_tex_src_projector,
1871 nir_tex_src_comparator, /* shadow comparator */
1872 nir_tex_src_offset,
1873 nir_tex_src_bias,
1874 nir_tex_src_lod,
1875 nir_tex_src_min_lod,
1876 nir_tex_src_ms_index, /* MSAA sample index */
1877 nir_tex_src_ms_mcs, /* MSAA compression value */
1878 nir_tex_src_ddx,
1879 nir_tex_src_ddy,
1880 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1881 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1882 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1883 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1884 nir_tex_src_texture_handle, /* < bindless texture handle */
1885 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1886 nir_tex_src_plane, /* < selects plane for planar textures */
1887 nir_num_tex_src_types
1888 } nir_tex_src_type;
1889
1890 typedef struct {
1891 nir_src src;
1892 nir_tex_src_type src_type;
1893 } nir_tex_src;
1894
1895 typedef enum {
1896 nir_texop_tex, /**< Regular texture look-up */
1897 nir_texop_txb, /**< Texture look-up with LOD bias */
1898 nir_texop_txl, /**< Texture look-up with explicit LOD */
1899 nir_texop_txd, /**< Texture look-up with partial derivatives */
1900 nir_texop_txf, /**< Texel fetch with explicit LOD */
1901 nir_texop_txf_ms, /**< Multisample texture fetch */
1902 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1903 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1904 nir_texop_txs, /**< Texture size */
1905 nir_texop_lod, /**< Texture lod query */
1906 nir_texop_tg4, /**< Texture gather */
1907 nir_texop_query_levels, /**< Texture levels query */
1908 nir_texop_texture_samples, /**< Texture samples query */
1909 nir_texop_samples_identical, /**< Query whether all samples are definitely
1910 * identical.
1911 */
1912 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1913 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1914 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1915 } nir_texop;
1916
1917 typedef struct {
1918 nir_instr instr;
1919
1920 enum glsl_sampler_dim sampler_dim;
1921 nir_alu_type dest_type;
1922
1923 nir_texop op;
1924 nir_dest dest;
1925 nir_tex_src *src;
1926 unsigned num_srcs, coord_components;
1927 bool is_array, is_shadow;
1928
1929 /**
1930 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1931 * components or the new-style shadow that outputs 1 component.
1932 */
1933 bool is_new_style_shadow;
1934
1935 /* gather component selector */
1936 unsigned component : 2;
1937
1938 /* gather offsets */
1939 int8_t tg4_offsets[4][2];
1940
1941 /* True if the texture index or handle is not dynamically uniform */
1942 bool texture_non_uniform;
1943
1944 /* True if the sampler index or handle is not dynamically uniform */
1945 bool sampler_non_uniform;
1946
1947 /** The texture index
1948 *
1949 * If this texture instruction has a nir_tex_src_texture_offset source,
1950 * then the texture index is given by texture_index + texture_offset.
1951 */
1952 unsigned texture_index;
1953
1954 /** The sampler index
1955 *
1956 * The following operations do not require a sampler and, as such, this
1957 * field should be ignored:
1958 * - nir_texop_txf
1959 * - nir_texop_txf_ms
1960 * - nir_texop_txs
1961 * - nir_texop_lod
1962 * - nir_texop_query_levels
1963 * - nir_texop_texture_samples
1964 * - nir_texop_samples_identical
1965 *
1966 * If this texture instruction has a nir_tex_src_sampler_offset source,
1967 * then the sampler index is given by sampler_index + sampler_offset.
1968 */
1969 unsigned sampler_index;
1970 } nir_tex_instr;
1971
1972 /*
1973 * Returns true if the texture operation requires a sampler as a general rule,
1974 * see the documentation of sampler_index.
1975 *
1976 * Note that the specific hw/driver backend could require to a sampler
1977 * object/configuration packet in any case, for some other reason.
1978 */
1979 static inline bool
1980 nir_tex_instr_need_sampler(const nir_tex_instr *instr)
1981 {
1982 switch (instr->op) {
1983 case nir_texop_txf:
1984 case nir_texop_txf_ms:
1985 case nir_texop_txs:
1986 case nir_texop_lod:
1987 case nir_texop_query_levels:
1988 case nir_texop_texture_samples:
1989 case nir_texop_samples_identical:
1990 return false;
1991 default:
1992 return true;
1993 }
1994 }
1995
1996 static inline unsigned
1997 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1998 {
1999 switch (instr->op) {
2000 case nir_texop_txs: {
2001 unsigned ret;
2002 switch (instr->sampler_dim) {
2003 case GLSL_SAMPLER_DIM_1D:
2004 case GLSL_SAMPLER_DIM_BUF:
2005 ret = 1;
2006 break;
2007 case GLSL_SAMPLER_DIM_2D:
2008 case GLSL_SAMPLER_DIM_CUBE:
2009 case GLSL_SAMPLER_DIM_MS:
2010 case GLSL_SAMPLER_DIM_RECT:
2011 case GLSL_SAMPLER_DIM_EXTERNAL:
2012 case GLSL_SAMPLER_DIM_SUBPASS:
2013 ret = 2;
2014 break;
2015 case GLSL_SAMPLER_DIM_3D:
2016 ret = 3;
2017 break;
2018 default:
2019 unreachable("not reached");
2020 }
2021 if (instr->is_array)
2022 ret++;
2023 return ret;
2024 }
2025
2026 case nir_texop_lod:
2027 return 2;
2028
2029 case nir_texop_texture_samples:
2030 case nir_texop_query_levels:
2031 case nir_texop_samples_identical:
2032 case nir_texop_fragment_mask_fetch:
2033 return 1;
2034
2035 default:
2036 if (instr->is_shadow && instr->is_new_style_shadow)
2037 return 1;
2038
2039 return 4;
2040 }
2041 }
2042
2043 /* Returns true if this texture operation queries something about the texture
2044 * rather than actually sampling it.
2045 */
2046 static inline bool
2047 nir_tex_instr_is_query(const nir_tex_instr *instr)
2048 {
2049 switch (instr->op) {
2050 case nir_texop_txs:
2051 case nir_texop_lod:
2052 case nir_texop_texture_samples:
2053 case nir_texop_query_levels:
2054 case nir_texop_txf_ms_mcs:
2055 return true;
2056 case nir_texop_tex:
2057 case nir_texop_txb:
2058 case nir_texop_txl:
2059 case nir_texop_txd:
2060 case nir_texop_txf:
2061 case nir_texop_txf_ms:
2062 case nir_texop_txf_ms_fb:
2063 case nir_texop_tg4:
2064 return false;
2065 default:
2066 unreachable("Invalid texture opcode");
2067 }
2068 }
2069
2070 static inline bool
2071 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2072 {
2073 switch (instr->op) {
2074 case nir_texop_tex:
2075 case nir_texop_txb:
2076 case nir_texop_lod:
2077 return true;
2078 default:
2079 return false;
2080 }
2081 }
2082
2083 static inline nir_alu_type
2084 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2085 {
2086 switch (instr->src[src].src_type) {
2087 case nir_tex_src_coord:
2088 switch (instr->op) {
2089 case nir_texop_txf:
2090 case nir_texop_txf_ms:
2091 case nir_texop_txf_ms_fb:
2092 case nir_texop_txf_ms_mcs:
2093 case nir_texop_samples_identical:
2094 return nir_type_int;
2095
2096 default:
2097 return nir_type_float;
2098 }
2099
2100 case nir_tex_src_lod:
2101 switch (instr->op) {
2102 case nir_texop_txs:
2103 case nir_texop_txf:
2104 return nir_type_int;
2105
2106 default:
2107 return nir_type_float;
2108 }
2109
2110 case nir_tex_src_projector:
2111 case nir_tex_src_comparator:
2112 case nir_tex_src_bias:
2113 case nir_tex_src_min_lod:
2114 case nir_tex_src_ddx:
2115 case nir_tex_src_ddy:
2116 return nir_type_float;
2117
2118 case nir_tex_src_offset:
2119 case nir_tex_src_ms_index:
2120 case nir_tex_src_plane:
2121 return nir_type_int;
2122
2123 case nir_tex_src_ms_mcs:
2124 case nir_tex_src_texture_deref:
2125 case nir_tex_src_sampler_deref:
2126 case nir_tex_src_texture_offset:
2127 case nir_tex_src_sampler_offset:
2128 case nir_tex_src_texture_handle:
2129 case nir_tex_src_sampler_handle:
2130 return nir_type_uint;
2131
2132 case nir_num_tex_src_types:
2133 unreachable("nir_num_tex_src_types is not a valid source type");
2134 }
2135
2136 unreachable("Invalid texture source type");
2137 }
2138
2139 static inline unsigned
2140 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2141 {
2142 if (instr->src[src].src_type == nir_tex_src_coord)
2143 return instr->coord_components;
2144
2145 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2146 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2147 return 4;
2148
2149 if (instr->src[src].src_type == nir_tex_src_ddx ||
2150 instr->src[src].src_type == nir_tex_src_ddy) {
2151 if (instr->is_array)
2152 return instr->coord_components - 1;
2153 else
2154 return instr->coord_components;
2155 }
2156
2157 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2158 * the offset, since a cube maps to a single face.
2159 */
2160 if (instr->src[src].src_type == nir_tex_src_offset) {
2161 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2162 return 2;
2163 else if (instr->is_array)
2164 return instr->coord_components - 1;
2165 else
2166 return instr->coord_components;
2167 }
2168
2169 return 1;
2170 }
2171
2172 static inline int
2173 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2174 {
2175 for (unsigned i = 0; i < instr->num_srcs; i++)
2176 if (instr->src[i].src_type == type)
2177 return (int) i;
2178
2179 return -1;
2180 }
2181
2182 void nir_tex_instr_add_src(nir_tex_instr *tex,
2183 nir_tex_src_type src_type,
2184 nir_src src);
2185
2186 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2187
2188 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2189
2190 typedef struct {
2191 nir_instr instr;
2192
2193 nir_ssa_def def;
2194
2195 nir_const_value value[];
2196 } nir_load_const_instr;
2197
2198 typedef enum {
2199 nir_jump_return,
2200 nir_jump_break,
2201 nir_jump_continue,
2202 } nir_jump_type;
2203
2204 typedef struct {
2205 nir_instr instr;
2206 nir_jump_type type;
2207 } nir_jump_instr;
2208
2209 /* creates a new SSA variable in an undefined state */
2210
2211 typedef struct {
2212 nir_instr instr;
2213 nir_ssa_def def;
2214 } nir_ssa_undef_instr;
2215
2216 typedef struct {
2217 struct exec_node node;
2218
2219 /* The predecessor block corresponding to this source */
2220 struct nir_block *pred;
2221
2222 nir_src src;
2223 } nir_phi_src;
2224
2225 #define nir_foreach_phi_src(phi_src, phi) \
2226 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2227 #define nir_foreach_phi_src_safe(phi_src, phi) \
2228 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2229
2230 typedef struct {
2231 nir_instr instr;
2232
2233 struct exec_list srcs; /** < list of nir_phi_src */
2234
2235 nir_dest dest;
2236 } nir_phi_instr;
2237
2238 typedef struct {
2239 struct exec_node node;
2240 nir_src src;
2241 nir_dest dest;
2242 } nir_parallel_copy_entry;
2243
2244 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2245 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2246
2247 typedef struct {
2248 nir_instr instr;
2249
2250 /* A list of nir_parallel_copy_entrys. The sources of all of the
2251 * entries are copied to the corresponding destinations "in parallel".
2252 * In other words, if we have two entries: a -> b and b -> a, the values
2253 * get swapped.
2254 */
2255 struct exec_list entries;
2256 } nir_parallel_copy_instr;
2257
2258 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2259 type, nir_instr_type_alu)
2260 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2261 type, nir_instr_type_deref)
2262 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2263 type, nir_instr_type_call)
2264 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2265 type, nir_instr_type_jump)
2266 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2267 type, nir_instr_type_tex)
2268 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2269 type, nir_instr_type_intrinsic)
2270 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2271 type, nir_instr_type_load_const)
2272 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2273 type, nir_instr_type_ssa_undef)
2274 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2275 type, nir_instr_type_phi)
2276 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2277 nir_parallel_copy_instr, instr,
2278 type, nir_instr_type_parallel_copy)
2279
2280
2281 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2282 static inline type \
2283 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2284 { \
2285 assert(nir_src_is_const(src)); \
2286 nir_load_const_instr *load = \
2287 nir_instr_as_load_const(src.ssa->parent_instr); \
2288 assert(comp < load->def.num_components); \
2289 return nir_const_value_as_##suffix(load->value[comp], \
2290 load->def.bit_size); \
2291 } \
2292 \
2293 static inline type \
2294 nir_src_as_##suffix(nir_src src) \
2295 { \
2296 assert(nir_src_num_components(src) == 1); \
2297 return nir_src_comp_as_##suffix(src, 0); \
2298 }
2299
2300 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2301 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2302 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2303 NIR_DEFINE_SRC_AS_CONST(double, float)
2304
2305 #undef NIR_DEFINE_SRC_AS_CONST
2306
2307
2308 typedef struct {
2309 nir_ssa_def *def;
2310 unsigned comp;
2311 } nir_ssa_scalar;
2312
2313 static inline bool
2314 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2315 {
2316 return s.def->parent_instr->type == nir_instr_type_load_const;
2317 }
2318
2319 static inline nir_const_value
2320 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2321 {
2322 assert(s.comp < s.def->num_components);
2323 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2324 return load->value[s.comp];
2325 }
2326
2327 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2328 static inline type \
2329 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2330 { \
2331 return nir_const_value_as_##suffix( \
2332 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2333 }
2334
2335 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2336 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2337 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2338 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2339
2340 #undef NIR_DEFINE_SCALAR_AS_CONST
2341
2342 static inline bool
2343 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2344 {
2345 return s.def->parent_instr->type == nir_instr_type_alu;
2346 }
2347
2348 static inline nir_op
2349 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2350 {
2351 return nir_instr_as_alu(s.def->parent_instr)->op;
2352 }
2353
2354 static inline nir_ssa_scalar
2355 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2356 {
2357 nir_ssa_scalar out = { NULL, 0 };
2358
2359 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2360 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2361
2362 /* Our component must be written */
2363 assert(s.comp < s.def->num_components);
2364 assert(alu->dest.write_mask & (1u << s.comp));
2365
2366 assert(alu->src[alu_src_idx].src.is_ssa);
2367 out.def = alu->src[alu_src_idx].src.ssa;
2368
2369 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2370 /* The ALU src is unsized so the source component follows the
2371 * destination component.
2372 */
2373 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2374 } else {
2375 /* This is a sized source so all source components work together to
2376 * produce all the destination components. Since we need to return a
2377 * scalar, this only works if the source is a scalar.
2378 */
2379 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2380 out.comp = alu->src[alu_src_idx].swizzle[0];
2381 }
2382 assert(out.comp < out.def->num_components);
2383
2384 return out;
2385 }
2386
2387
2388 /*
2389 * Control flow
2390 *
2391 * Control flow consists of a tree of control flow nodes, which include
2392 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2393 * instructions that always run start-to-finish. Each basic block also keeps
2394 * track of its successors (blocks which may run immediately after the current
2395 * block) and predecessors (blocks which could have run immediately before the
2396 * current block). Each function also has a start block and an end block which
2397 * all return statements point to (which is always empty). Together, all the
2398 * blocks with their predecessors and successors make up the control flow
2399 * graph (CFG) of the function. There are helpers that modify the tree of
2400 * control flow nodes while modifying the CFG appropriately; these should be
2401 * used instead of modifying the tree directly.
2402 */
2403
2404 typedef enum {
2405 nir_cf_node_block,
2406 nir_cf_node_if,
2407 nir_cf_node_loop,
2408 nir_cf_node_function
2409 } nir_cf_node_type;
2410
2411 typedef struct nir_cf_node {
2412 struct exec_node node;
2413 nir_cf_node_type type;
2414 struct nir_cf_node *parent;
2415 } nir_cf_node;
2416
2417 typedef struct nir_block {
2418 nir_cf_node cf_node;
2419
2420 struct exec_list instr_list; /** < list of nir_instr */
2421
2422 /** generic block index; generated by nir_index_blocks */
2423 unsigned index;
2424
2425 /*
2426 * Each block can only have up to 2 successors, so we put them in a simple
2427 * array - no need for anything more complicated.
2428 */
2429 struct nir_block *successors[2];
2430
2431 /* Set of nir_block predecessors in the CFG */
2432 struct set *predecessors;
2433
2434 /*
2435 * this node's immediate dominator in the dominance tree - set to NULL for
2436 * the start block.
2437 */
2438 struct nir_block *imm_dom;
2439
2440 /* This node's children in the dominance tree */
2441 unsigned num_dom_children;
2442 struct nir_block **dom_children;
2443
2444 /* Set of nir_blocks on the dominance frontier of this block */
2445 struct set *dom_frontier;
2446
2447 /*
2448 * These two indices have the property that dom_{pre,post}_index for each
2449 * child of this block in the dominance tree will always be between
2450 * dom_pre_index and dom_post_index for this block, which makes testing if
2451 * a given block is dominated by another block an O(1) operation.
2452 */
2453 int16_t dom_pre_index, dom_post_index;
2454
2455 /* live in and out for this block; used for liveness analysis */
2456 BITSET_WORD *live_in;
2457 BITSET_WORD *live_out;
2458 } nir_block;
2459
2460 static inline bool
2461 nir_block_is_reachable(nir_block *b)
2462 {
2463 /* See also nir_block_dominates */
2464 return b->dom_post_index != -1;
2465 }
2466
2467 static inline nir_instr *
2468 nir_block_first_instr(nir_block *block)
2469 {
2470 struct exec_node *head = exec_list_get_head(&block->instr_list);
2471 return exec_node_data(nir_instr, head, node);
2472 }
2473
2474 static inline nir_instr *
2475 nir_block_last_instr(nir_block *block)
2476 {
2477 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2478 return exec_node_data(nir_instr, tail, node);
2479 }
2480
2481 static inline bool
2482 nir_block_ends_in_jump(nir_block *block)
2483 {
2484 return !exec_list_is_empty(&block->instr_list) &&
2485 nir_block_last_instr(block)->type == nir_instr_type_jump;
2486 }
2487
2488 #define nir_foreach_instr(instr, block) \
2489 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2490 #define nir_foreach_instr_reverse(instr, block) \
2491 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2492 #define nir_foreach_instr_safe(instr, block) \
2493 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2494 #define nir_foreach_instr_reverse_safe(instr, block) \
2495 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2496
2497 typedef enum {
2498 nir_selection_control_none = 0x0,
2499 nir_selection_control_flatten = 0x1,
2500 nir_selection_control_dont_flatten = 0x2,
2501 } nir_selection_control;
2502
2503 typedef struct nir_if {
2504 nir_cf_node cf_node;
2505 nir_src condition;
2506 nir_selection_control control;
2507
2508 struct exec_list then_list; /** < list of nir_cf_node */
2509 struct exec_list else_list; /** < list of nir_cf_node */
2510 } nir_if;
2511
2512 typedef struct {
2513 nir_if *nif;
2514
2515 /** Instruction that generates nif::condition. */
2516 nir_instr *conditional_instr;
2517
2518 /** Block within ::nif that has the break instruction. */
2519 nir_block *break_block;
2520
2521 /** Last block for the then- or else-path that does not contain the break. */
2522 nir_block *continue_from_block;
2523
2524 /** True when ::break_block is in the else-path of ::nif. */
2525 bool continue_from_then;
2526 bool induction_rhs;
2527
2528 /* This is true if the terminators exact trip count is unknown. For
2529 * example:
2530 *
2531 * for (int i = 0; i < imin(x, 4); i++)
2532 * ...
2533 *
2534 * Here loop analysis would have set a max_trip_count of 4 however we dont
2535 * know for sure that this is the exact trip count.
2536 */
2537 bool exact_trip_count_unknown;
2538
2539 struct list_head loop_terminator_link;
2540 } nir_loop_terminator;
2541
2542 typedef struct {
2543 /* Estimated cost (in number of instructions) of the loop */
2544 unsigned instr_cost;
2545
2546 /* Guessed trip count based on array indexing */
2547 unsigned guessed_trip_count;
2548
2549 /* Maximum number of times the loop is run (if known) */
2550 unsigned max_trip_count;
2551
2552 /* Do we know the exact number of times the loop will be run */
2553 bool exact_trip_count_known;
2554
2555 /* Unroll the loop regardless of its size */
2556 bool force_unroll;
2557
2558 /* Does the loop contain complex loop terminators, continues or other
2559 * complex behaviours? If this is true we can't rely on
2560 * loop_terminator_list to be complete or accurate.
2561 */
2562 bool complex_loop;
2563
2564 nir_loop_terminator *limiting_terminator;
2565
2566 /* A list of loop_terminators terminating this loop. */
2567 struct list_head loop_terminator_list;
2568 } nir_loop_info;
2569
2570 typedef enum {
2571 nir_loop_control_none = 0x0,
2572 nir_loop_control_unroll = 0x1,
2573 nir_loop_control_dont_unroll = 0x2,
2574 } nir_loop_control;
2575
2576 typedef struct {
2577 nir_cf_node cf_node;
2578
2579 struct exec_list body; /** < list of nir_cf_node */
2580
2581 nir_loop_info *info;
2582 nir_loop_control control;
2583 bool partially_unrolled;
2584 } nir_loop;
2585
2586 /**
2587 * Various bits of metadata that can may be created or required by
2588 * optimization and analysis passes
2589 */
2590 typedef enum {
2591 nir_metadata_none = 0x0,
2592 nir_metadata_block_index = 0x1,
2593 nir_metadata_dominance = 0x2,
2594 nir_metadata_live_ssa_defs = 0x4,
2595 nir_metadata_not_properly_reset = 0x8,
2596 nir_metadata_loop_analysis = 0x10,
2597 } nir_metadata;
2598
2599 typedef struct {
2600 nir_cf_node cf_node;
2601
2602 /** pointer to the function of which this is an implementation */
2603 struct nir_function *function;
2604
2605 struct exec_list body; /** < list of nir_cf_node */
2606
2607 nir_block *end_block;
2608
2609 /** list for all local variables in the function */
2610 struct exec_list locals;
2611
2612 /** list of local registers in the function */
2613 struct exec_list registers;
2614
2615 /** next available local register index */
2616 unsigned reg_alloc;
2617
2618 /** next available SSA value index */
2619 unsigned ssa_alloc;
2620
2621 /* total number of basic blocks, only valid when block_index_dirty = false */
2622 unsigned num_blocks;
2623
2624 nir_metadata valid_metadata;
2625 } nir_function_impl;
2626
2627 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2628 nir_start_block(nir_function_impl *impl)
2629 {
2630 return (nir_block *) impl->body.head_sentinel.next;
2631 }
2632
2633 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2634 nir_impl_last_block(nir_function_impl *impl)
2635 {
2636 return (nir_block *) impl->body.tail_sentinel.prev;
2637 }
2638
2639 static inline nir_cf_node *
2640 nir_cf_node_next(nir_cf_node *node)
2641 {
2642 struct exec_node *next = exec_node_get_next(&node->node);
2643 if (exec_node_is_tail_sentinel(next))
2644 return NULL;
2645 else
2646 return exec_node_data(nir_cf_node, next, node);
2647 }
2648
2649 static inline nir_cf_node *
2650 nir_cf_node_prev(nir_cf_node *node)
2651 {
2652 struct exec_node *prev = exec_node_get_prev(&node->node);
2653 if (exec_node_is_head_sentinel(prev))
2654 return NULL;
2655 else
2656 return exec_node_data(nir_cf_node, prev, node);
2657 }
2658
2659 static inline bool
2660 nir_cf_node_is_first(const nir_cf_node *node)
2661 {
2662 return exec_node_is_head_sentinel(node->node.prev);
2663 }
2664
2665 static inline bool
2666 nir_cf_node_is_last(const nir_cf_node *node)
2667 {
2668 return exec_node_is_tail_sentinel(node->node.next);
2669 }
2670
2671 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2672 type, nir_cf_node_block)
2673 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2674 type, nir_cf_node_if)
2675 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2676 type, nir_cf_node_loop)
2677 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2678 nir_function_impl, cf_node, type, nir_cf_node_function)
2679
2680 static inline nir_block *
2681 nir_if_first_then_block(nir_if *if_stmt)
2682 {
2683 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2684 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2685 }
2686
2687 static inline nir_block *
2688 nir_if_last_then_block(nir_if *if_stmt)
2689 {
2690 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2691 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2692 }
2693
2694 static inline nir_block *
2695 nir_if_first_else_block(nir_if *if_stmt)
2696 {
2697 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2698 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2699 }
2700
2701 static inline nir_block *
2702 nir_if_last_else_block(nir_if *if_stmt)
2703 {
2704 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2705 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2706 }
2707
2708 static inline nir_block *
2709 nir_loop_first_block(nir_loop *loop)
2710 {
2711 struct exec_node *head = exec_list_get_head(&loop->body);
2712 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2713 }
2714
2715 static inline nir_block *
2716 nir_loop_last_block(nir_loop *loop)
2717 {
2718 struct exec_node *tail = exec_list_get_tail(&loop->body);
2719 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2720 }
2721
2722 /**
2723 * Return true if this list of cf_nodes contains a single empty block.
2724 */
2725 static inline bool
2726 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2727 {
2728 if (exec_list_is_singular(cf_list)) {
2729 struct exec_node *head = exec_list_get_head(cf_list);
2730 nir_block *block =
2731 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2732 return exec_list_is_empty(&block->instr_list);
2733 }
2734 return false;
2735 }
2736
2737 typedef struct {
2738 uint8_t num_components;
2739 uint8_t bit_size;
2740 } nir_parameter;
2741
2742 typedef struct nir_function {
2743 struct exec_node node;
2744
2745 const char *name;
2746 struct nir_shader *shader;
2747
2748 unsigned num_params;
2749 nir_parameter *params;
2750
2751 /** The implementation of this function.
2752 *
2753 * If the function is only declared and not implemented, this is NULL.
2754 */
2755 nir_function_impl *impl;
2756
2757 bool is_entrypoint;
2758 } nir_function;
2759
2760 typedef enum {
2761 nir_lower_imul64 = (1 << 0),
2762 nir_lower_isign64 = (1 << 1),
2763 /** Lower all int64 modulus and division opcodes */
2764 nir_lower_divmod64 = (1 << 2),
2765 /** Lower all 64-bit umul_high and imul_high opcodes */
2766 nir_lower_imul_high64 = (1 << 3),
2767 nir_lower_mov64 = (1 << 4),
2768 nir_lower_icmp64 = (1 << 5),
2769 nir_lower_iadd64 = (1 << 6),
2770 nir_lower_iabs64 = (1 << 7),
2771 nir_lower_ineg64 = (1 << 8),
2772 nir_lower_logic64 = (1 << 9),
2773 nir_lower_minmax64 = (1 << 10),
2774 nir_lower_shift64 = (1 << 11),
2775 nir_lower_imul_2x32_64 = (1 << 12),
2776 nir_lower_extract64 = (1 << 13),
2777 nir_lower_ufind_msb64 = (1 << 14),
2778 } nir_lower_int64_options;
2779
2780 typedef enum {
2781 nir_lower_drcp = (1 << 0),
2782 nir_lower_dsqrt = (1 << 1),
2783 nir_lower_drsq = (1 << 2),
2784 nir_lower_dtrunc = (1 << 3),
2785 nir_lower_dfloor = (1 << 4),
2786 nir_lower_dceil = (1 << 5),
2787 nir_lower_dfract = (1 << 6),
2788 nir_lower_dround_even = (1 << 7),
2789 nir_lower_dmod = (1 << 8),
2790 nir_lower_dsub = (1 << 9),
2791 nir_lower_ddiv = (1 << 10),
2792 nir_lower_fp64_full_software = (1 << 11),
2793 } nir_lower_doubles_options;
2794
2795 typedef enum {
2796 nir_divergence_single_prim_per_subgroup = (1 << 0),
2797 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2798 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2799 nir_divergence_view_index_uniform = (1 << 3),
2800 } nir_divergence_options;
2801
2802 typedef struct nir_shader_compiler_options {
2803 bool lower_fdiv;
2804 bool lower_ffma;
2805 bool fuse_ffma;
2806 bool lower_flrp16;
2807 bool lower_flrp32;
2808 /** Lowers flrp when it does not support doubles */
2809 bool lower_flrp64;
2810 bool lower_fpow;
2811 bool lower_fsat;
2812 bool lower_fsqrt;
2813 bool lower_sincos;
2814 bool lower_fmod;
2815 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2816 bool lower_bitfield_extract;
2817 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2818 bool lower_bitfield_extract_to_shifts;
2819 /** Lowers bitfield_insert to bfi/bfm */
2820 bool lower_bitfield_insert;
2821 /** Lowers bitfield_insert to compares, and shifts. */
2822 bool lower_bitfield_insert_to_shifts;
2823 /** Lowers bitfield_insert to bfm/bitfield_select. */
2824 bool lower_bitfield_insert_to_bitfield_select;
2825 /** Lowers bitfield_reverse to shifts. */
2826 bool lower_bitfield_reverse;
2827 /** Lowers bit_count to shifts. */
2828 bool lower_bit_count;
2829 /** Lowers ifind_msb to compare and ufind_msb */
2830 bool lower_ifind_msb;
2831 /** Lowers find_lsb to ufind_msb and logic ops */
2832 bool lower_find_lsb;
2833 bool lower_uadd_carry;
2834 bool lower_usub_borrow;
2835 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2836 bool lower_mul_high;
2837 /** lowers fneg and ineg to fsub and isub. */
2838 bool lower_negate;
2839 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2840 bool lower_sub;
2841
2842 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2843 bool lower_scmp;
2844
2845 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2846 bool lower_vector_cmp;
2847
2848 /** enables rules to lower idiv by power-of-two: */
2849 bool lower_idiv;
2850
2851 /** enable rules to avoid bit ops */
2852 bool lower_bitops;
2853
2854 /** enables rules to lower isign to imin+imax */
2855 bool lower_isign;
2856
2857 /** enables rules to lower fsign to fsub and flt */
2858 bool lower_fsign;
2859
2860 /* lower fdph to fdot4 */
2861 bool lower_fdph;
2862
2863 /** lower fdot to fmul and fsum/fadd. */
2864 bool lower_fdot;
2865
2866 /* Does the native fdot instruction replicate its result for four
2867 * components? If so, then opt_algebraic_late will turn all fdotN
2868 * instructions into fdot_replicatedN instructions.
2869 */
2870 bool fdot_replicates;
2871
2872 /** lowers ffloor to fsub+ffract: */
2873 bool lower_ffloor;
2874
2875 /** lowers ffract to fsub+ffloor: */
2876 bool lower_ffract;
2877
2878 /** lowers fceil to fneg+ffloor+fneg: */
2879 bool lower_fceil;
2880
2881 bool lower_ftrunc;
2882
2883 bool lower_ldexp;
2884
2885 bool lower_pack_half_2x16;
2886 bool lower_pack_unorm_2x16;
2887 bool lower_pack_snorm_2x16;
2888 bool lower_pack_unorm_4x8;
2889 bool lower_pack_snorm_4x8;
2890 bool lower_unpack_half_2x16;
2891 bool lower_unpack_unorm_2x16;
2892 bool lower_unpack_snorm_2x16;
2893 bool lower_unpack_unorm_4x8;
2894 bool lower_unpack_snorm_4x8;
2895
2896 bool lower_pack_split;
2897
2898 bool lower_extract_byte;
2899 bool lower_extract_word;
2900
2901 bool lower_all_io_to_temps;
2902 bool lower_all_io_to_elements;
2903
2904 /* Indicates that the driver only has zero-based vertex id */
2905 bool vertex_id_zero_based;
2906
2907 /**
2908 * If enabled, gl_BaseVertex will be lowered as:
2909 * is_indexed_draw (~0/0) & firstvertex
2910 */
2911 bool lower_base_vertex;
2912
2913 /**
2914 * If enabled, gl_HelperInvocation will be lowered as:
2915 *
2916 * !((1 << sample_id) & sample_mask_in))
2917 *
2918 * This depends on some possibly hw implementation details, which may
2919 * not be true for all hw. In particular that the FS is only executed
2920 * for covered samples or for helper invocations. So, do not blindly
2921 * enable this option.
2922 *
2923 * Note: See also issue #22 in ARB_shader_image_load_store
2924 */
2925 bool lower_helper_invocation;
2926
2927 /**
2928 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2929 *
2930 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2931 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2932 */
2933 bool optimize_sample_mask_in;
2934
2935 bool lower_cs_local_index_from_id;
2936 bool lower_cs_local_id_from_index;
2937
2938 bool lower_device_index_to_zero;
2939
2940 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2941 bool lower_wpos_pntc;
2942
2943 /**
2944 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
2945 * lowered to simple arithmetic.
2946 *
2947 * If this flag is set, the lowering will be applied to all bit-sizes of
2948 * these instructions.
2949 *
2950 * \sa ::lower_hadd64
2951 */
2952 bool lower_hadd;
2953
2954 /**
2955 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
2956 * should be lowered to simple arithmetic.
2957 *
2958 * If this flag is set, the lowering will be applied to only 64-bit
2959 * versions of these instructions.
2960 *
2961 * \sa ::lower_hadd
2962 */
2963 bool lower_hadd64;
2964
2965 /**
2966 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
2967 * arithmetic.
2968 *
2969 * If this flag is set, the lowering will be applied to all bit-sizes of
2970 * these instructions.
2971 *
2972 * \sa ::lower_usub_sat64
2973 */
2974 bool lower_add_sat;
2975
2976 /**
2977 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
2978 * arithmetic.
2979 *
2980 * \sa ::lower_add_sat
2981 */
2982 bool lower_usub_sat64;
2983
2984 /**
2985 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2986 * for IO purposes and would prefer loads/stores be vectorized.
2987 */
2988 bool vectorize_io;
2989 bool lower_to_scalar;
2990
2991 /**
2992 * Should the linker unify inputs_read/outputs_written between adjacent
2993 * shader stages which are linked into a single program?
2994 */
2995 bool unify_interfaces;
2996
2997 /**
2998 * Should nir_lower_io() create load_interpolated_input intrinsics?
2999 *
3000 * If not, it generates regular load_input intrinsics and interpolation
3001 * information must be inferred from the list of input nir_variables.
3002 */
3003 bool use_interpolated_input_intrinsics;
3004
3005 /* Lowers when 32x32->64 bit multiplication is not supported */
3006 bool lower_mul_2x32_64;
3007
3008 /* Lowers when rotate instruction is not supported */
3009 bool lower_rotate;
3010
3011 /**
3012 * Backend supports imul24, and would like to use it (when possible)
3013 * for address/offset calculation. If true, driver should call
3014 * nir_lower_amul(). (If not set, amul will automatically be lowered
3015 * to imul.)
3016 */
3017 bool has_imul24;
3018
3019 /** Backend supports umul24, if not set umul24 will automatically be lowered
3020 * to imul with masked inputs */
3021 bool has_umul24;
3022
3023 /** Backend supports umad24, if not set umad24 will automatically be lowered
3024 * to imul with masked inputs and iadd */
3025 bool has_umad24;
3026
3027 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
3028 * set of memory barrier intrinsics based on GLSL.
3029 */
3030 bool use_scoped_memory_barrier;
3031
3032 /**
3033 * Is this the Intel vec4 backend?
3034 *
3035 * Used to inhibit algebraic optimizations that are known to be harmful on
3036 * the Intel vec4 backend. This is generally applicable to any
3037 * optimization that might cause more immediate values to be used in
3038 * 3-source (e.g., ffma and flrp) instructions.
3039 */
3040 bool intel_vec4;
3041
3042 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3043 bool lower_bfe_with_two_constants;
3044
3045 /** Whether 8-bit ALU is supported. */
3046 bool support_8bit_alu;
3047
3048 /** Whether 16-bit ALU is supported. */
3049 bool support_16bit_alu;
3050
3051 unsigned max_unroll_iterations;
3052
3053 nir_lower_int64_options lower_int64_options;
3054 nir_lower_doubles_options lower_doubles_options;
3055 } nir_shader_compiler_options;
3056
3057 typedef struct nir_shader {
3058 /** list of uniforms (nir_variable) */
3059 struct exec_list uniforms;
3060
3061 /** list of inputs (nir_variable) */
3062 struct exec_list inputs;
3063
3064 /** list of outputs (nir_variable) */
3065 struct exec_list outputs;
3066
3067 /** list of shared compute variables (nir_variable) */
3068 struct exec_list shared;
3069
3070 /** Set of driver-specific options for the shader.
3071 *
3072 * The memory for the options is expected to be kept in a single static
3073 * copy by the driver.
3074 */
3075 const struct nir_shader_compiler_options *options;
3076
3077 /** Various bits of compile-time information about a given shader */
3078 struct shader_info info;
3079
3080 /** list of global variables in the shader (nir_variable) */
3081 struct exec_list globals;
3082
3083 /** list of system value variables in the shader (nir_variable) */
3084 struct exec_list system_values;
3085
3086 struct exec_list functions; /** < list of nir_function */
3087
3088 /**
3089 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3090 * access plus one
3091 */
3092 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3093
3094 /** Size in bytes of required scratch space */
3095 unsigned scratch_size;
3096
3097 /** Constant data associated with this shader.
3098 *
3099 * Constant data is loaded through load_constant intrinsics. See also
3100 * nir_opt_large_constants.
3101 */
3102 void *constant_data;
3103 unsigned constant_data_size;
3104 } nir_shader;
3105
3106 #define nir_foreach_function(func, shader) \
3107 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3108
3109 static inline nir_function_impl *
3110 nir_shader_get_entrypoint(nir_shader *shader)
3111 {
3112 nir_function *func = NULL;
3113
3114 nir_foreach_function(function, shader) {
3115 assert(func == NULL);
3116 if (function->is_entrypoint) {
3117 func = function;
3118 #ifndef NDEBUG
3119 break;
3120 #endif
3121 }
3122 }
3123
3124 if (!func)
3125 return NULL;
3126
3127 assert(func->num_params == 0);
3128 assert(func->impl);
3129 return func->impl;
3130 }
3131
3132 nir_shader *nir_shader_create(void *mem_ctx,
3133 gl_shader_stage stage,
3134 const nir_shader_compiler_options *options,
3135 shader_info *si);
3136
3137 nir_register *nir_local_reg_create(nir_function_impl *impl);
3138
3139 void nir_reg_remove(nir_register *reg);
3140
3141 /** Adds a variable to the appropriate list in nir_shader */
3142 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3143
3144 static inline void
3145 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3146 {
3147 assert(var->data.mode == nir_var_function_temp);
3148 exec_list_push_tail(&impl->locals, &var->node);
3149 }
3150
3151 /** creates a variable, sets a few defaults, and adds it to the list */
3152 nir_variable *nir_variable_create(nir_shader *shader,
3153 nir_variable_mode mode,
3154 const struct glsl_type *type,
3155 const char *name);
3156 /** creates a local variable and adds it to the list */
3157 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3158 const struct glsl_type *type,
3159 const char *name);
3160
3161 /** creates a function and adds it to the shader's list of functions */
3162 nir_function *nir_function_create(nir_shader *shader, const char *name);
3163
3164 nir_function_impl *nir_function_impl_create(nir_function *func);
3165 /** creates a function_impl that isn't tied to any particular function */
3166 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3167
3168 nir_block *nir_block_create(nir_shader *shader);
3169 nir_if *nir_if_create(nir_shader *shader);
3170 nir_loop *nir_loop_create(nir_shader *shader);
3171
3172 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3173
3174 /** requests that the given pieces of metadata be generated */
3175 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3176 /** dirties all but the preserved metadata */
3177 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3178
3179 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3180 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3181
3182 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3183 nir_deref_type deref_type);
3184
3185 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3186
3187 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3188 unsigned num_components,
3189 unsigned bit_size);
3190
3191 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3192 nir_intrinsic_op op);
3193
3194 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3195 nir_function *callee);
3196
3197 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3198
3199 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3200
3201 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3202
3203 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3204 unsigned num_components,
3205 unsigned bit_size);
3206
3207 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3208
3209 /**
3210 * NIR Cursors and Instruction Insertion API
3211 * @{
3212 *
3213 * A tiny struct representing a point to insert/extract instructions or
3214 * control flow nodes. Helps reduce the combinatorial explosion of possible
3215 * points to insert/extract.
3216 *
3217 * \sa nir_control_flow.h
3218 */
3219 typedef enum {
3220 nir_cursor_before_block,
3221 nir_cursor_after_block,
3222 nir_cursor_before_instr,
3223 nir_cursor_after_instr,
3224 } nir_cursor_option;
3225
3226 typedef struct {
3227 nir_cursor_option option;
3228 union {
3229 nir_block *block;
3230 nir_instr *instr;
3231 };
3232 } nir_cursor;
3233
3234 static inline nir_block *
3235 nir_cursor_current_block(nir_cursor cursor)
3236 {
3237 if (cursor.option == nir_cursor_before_instr ||
3238 cursor.option == nir_cursor_after_instr) {
3239 return cursor.instr->block;
3240 } else {
3241 return cursor.block;
3242 }
3243 }
3244
3245 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3246
3247 static inline nir_cursor
3248 nir_before_block(nir_block *block)
3249 {
3250 nir_cursor cursor;
3251 cursor.option = nir_cursor_before_block;
3252 cursor.block = block;
3253 return cursor;
3254 }
3255
3256 static inline nir_cursor
3257 nir_after_block(nir_block *block)
3258 {
3259 nir_cursor cursor;
3260 cursor.option = nir_cursor_after_block;
3261 cursor.block = block;
3262 return cursor;
3263 }
3264
3265 static inline nir_cursor
3266 nir_before_instr(nir_instr *instr)
3267 {
3268 nir_cursor cursor;
3269 cursor.option = nir_cursor_before_instr;
3270 cursor.instr = instr;
3271 return cursor;
3272 }
3273
3274 static inline nir_cursor
3275 nir_after_instr(nir_instr *instr)
3276 {
3277 nir_cursor cursor;
3278 cursor.option = nir_cursor_after_instr;
3279 cursor.instr = instr;
3280 return cursor;
3281 }
3282
3283 static inline nir_cursor
3284 nir_after_block_before_jump(nir_block *block)
3285 {
3286 nir_instr *last_instr = nir_block_last_instr(block);
3287 if (last_instr && last_instr->type == nir_instr_type_jump) {
3288 return nir_before_instr(last_instr);
3289 } else {
3290 return nir_after_block(block);
3291 }
3292 }
3293
3294 static inline nir_cursor
3295 nir_before_src(nir_src *src, bool is_if_condition)
3296 {
3297 if (is_if_condition) {
3298 nir_block *prev_block =
3299 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3300 assert(!nir_block_ends_in_jump(prev_block));
3301 return nir_after_block(prev_block);
3302 } else if (src->parent_instr->type == nir_instr_type_phi) {
3303 #ifndef NDEBUG
3304 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3305 bool found = false;
3306 nir_foreach_phi_src(phi_src, cond_phi) {
3307 if (phi_src->src.ssa == src->ssa) {
3308 found = true;
3309 break;
3310 }
3311 }
3312 assert(found);
3313 #endif
3314 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3315 * to have a more specific name.
3316 */
3317 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3318 return nir_after_block_before_jump(phi_src->pred);
3319 } else {
3320 return nir_before_instr(src->parent_instr);
3321 }
3322 }
3323
3324 static inline nir_cursor
3325 nir_before_cf_node(nir_cf_node *node)
3326 {
3327 if (node->type == nir_cf_node_block)
3328 return nir_before_block(nir_cf_node_as_block(node));
3329
3330 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3331 }
3332
3333 static inline nir_cursor
3334 nir_after_cf_node(nir_cf_node *node)
3335 {
3336 if (node->type == nir_cf_node_block)
3337 return nir_after_block(nir_cf_node_as_block(node));
3338
3339 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3340 }
3341
3342 static inline nir_cursor
3343 nir_after_phis(nir_block *block)
3344 {
3345 nir_foreach_instr(instr, block) {
3346 if (instr->type != nir_instr_type_phi)
3347 return nir_before_instr(instr);
3348 }
3349 return nir_after_block(block);
3350 }
3351
3352 static inline nir_cursor
3353 nir_after_cf_node_and_phis(nir_cf_node *node)
3354 {
3355 if (node->type == nir_cf_node_block)
3356 return nir_after_block(nir_cf_node_as_block(node));
3357
3358 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3359
3360 return nir_after_phis(block);
3361 }
3362
3363 static inline nir_cursor
3364 nir_before_cf_list(struct exec_list *cf_list)
3365 {
3366 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3367 exec_list_get_head(cf_list), node);
3368 return nir_before_cf_node(first_node);
3369 }
3370
3371 static inline nir_cursor
3372 nir_after_cf_list(struct exec_list *cf_list)
3373 {
3374 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3375 exec_list_get_tail(cf_list), node);
3376 return nir_after_cf_node(last_node);
3377 }
3378
3379 /**
3380 * Insert a NIR instruction at the given cursor.
3381 *
3382 * Note: This does not update the cursor.
3383 */
3384 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3385
3386 static inline void
3387 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3388 {
3389 nir_instr_insert(nir_before_instr(instr), before);
3390 }
3391
3392 static inline void
3393 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3394 {
3395 nir_instr_insert(nir_after_instr(instr), after);
3396 }
3397
3398 static inline void
3399 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3400 {
3401 nir_instr_insert(nir_before_block(block), before);
3402 }
3403
3404 static inline void
3405 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3406 {
3407 nir_instr_insert(nir_after_block(block), after);
3408 }
3409
3410 static inline void
3411 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3412 {
3413 nir_instr_insert(nir_before_cf_node(node), before);
3414 }
3415
3416 static inline void
3417 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3418 {
3419 nir_instr_insert(nir_after_cf_node(node), after);
3420 }
3421
3422 static inline void
3423 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3424 {
3425 nir_instr_insert(nir_before_cf_list(list), before);
3426 }
3427
3428 static inline void
3429 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3430 {
3431 nir_instr_insert(nir_after_cf_list(list), after);
3432 }
3433
3434 void nir_instr_remove_v(nir_instr *instr);
3435
3436 static inline nir_cursor
3437 nir_instr_remove(nir_instr *instr)
3438 {
3439 nir_cursor cursor;
3440 nir_instr *prev = nir_instr_prev(instr);
3441 if (prev) {
3442 cursor = nir_after_instr(prev);
3443 } else {
3444 cursor = nir_before_block(instr->block);
3445 }
3446 nir_instr_remove_v(instr);
3447 return cursor;
3448 }
3449
3450 /** @} */
3451
3452 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3453
3454 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3455 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3456 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3457 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3458 void *state);
3459 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3460 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3461
3462 nir_const_value *nir_src_as_const_value(nir_src src);
3463
3464 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3465 static inline c_type * \
3466 nir_src_as_ ## name (nir_src src) \
3467 { \
3468 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3469 ? cast_macro(src.ssa->parent_instr) : NULL; \
3470 }
3471
3472 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3473 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3474 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3475 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3476
3477 bool nir_src_is_dynamically_uniform(nir_src src);
3478 bool nir_srcs_equal(nir_src src1, nir_src src2);
3479 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3480 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3481 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3482 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3483 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3484 nir_dest new_dest);
3485
3486 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3487 unsigned num_components, unsigned bit_size,
3488 const char *name);
3489 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3490 unsigned num_components, unsigned bit_size,
3491 const char *name);
3492 static inline void
3493 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3494 const struct glsl_type *type,
3495 const char *name)
3496 {
3497 assert(glsl_type_is_vector_or_scalar(type));
3498 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3499 glsl_get_bit_size(type), name);
3500 }
3501 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3502 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3503 nir_instr *after_me);
3504
3505 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3506
3507 /*
3508 * finds the next basic block in source-code order, returns NULL if there is
3509 * none
3510 */
3511
3512 nir_block *nir_block_cf_tree_next(nir_block *block);
3513
3514 /* Performs the opposite of nir_block_cf_tree_next() */
3515
3516 nir_block *nir_block_cf_tree_prev(nir_block *block);
3517
3518 /* Gets the first block in a CF node in source-code order */
3519
3520 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3521
3522 /* Gets the last block in a CF node in source-code order */
3523
3524 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3525
3526 /* Gets the next block after a CF node in source-code order */
3527
3528 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3529
3530 /* Macros for loops that visit blocks in source-code order */
3531
3532 #define nir_foreach_block(block, impl) \
3533 for (nir_block *block = nir_start_block(impl); block != NULL; \
3534 block = nir_block_cf_tree_next(block))
3535
3536 #define nir_foreach_block_safe(block, impl) \
3537 for (nir_block *block = nir_start_block(impl), \
3538 *next = nir_block_cf_tree_next(block); \
3539 block != NULL; \
3540 block = next, next = nir_block_cf_tree_next(block))
3541
3542 #define nir_foreach_block_reverse(block, impl) \
3543 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3544 block = nir_block_cf_tree_prev(block))
3545
3546 #define nir_foreach_block_reverse_safe(block, impl) \
3547 for (nir_block *block = nir_impl_last_block(impl), \
3548 *prev = nir_block_cf_tree_prev(block); \
3549 block != NULL; \
3550 block = prev, prev = nir_block_cf_tree_prev(block))
3551
3552 #define nir_foreach_block_in_cf_node(block, node) \
3553 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3554 block != nir_cf_node_cf_tree_next(node); \
3555 block = nir_block_cf_tree_next(block))
3556
3557 /* If the following CF node is an if, this function returns that if.
3558 * Otherwise, it returns NULL.
3559 */
3560 nir_if *nir_block_get_following_if(nir_block *block);
3561
3562 nir_loop *nir_block_get_following_loop(nir_block *block);
3563
3564 void nir_index_local_regs(nir_function_impl *impl);
3565 void nir_index_ssa_defs(nir_function_impl *impl);
3566 unsigned nir_index_instrs(nir_function_impl *impl);
3567
3568 void nir_index_blocks(nir_function_impl *impl);
3569
3570 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3571
3572 void nir_print_shader(nir_shader *shader, FILE *fp);
3573 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3574 void nir_print_instr(const nir_instr *instr, FILE *fp);
3575 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3576
3577 /** Shallow clone of a single ALU instruction. */
3578 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3579
3580 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3581 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3582 const nir_function_impl *fi);
3583 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3584 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3585
3586 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3587
3588 void nir_shader_serialize_deserialize(nir_shader *s);
3589
3590 #ifndef NDEBUG
3591 void nir_validate_shader(nir_shader *shader, const char *when);
3592 void nir_metadata_set_validation_flag(nir_shader *shader);
3593 void nir_metadata_check_validation_flag(nir_shader *shader);
3594
3595 static inline bool
3596 should_skip_nir(const char *name)
3597 {
3598 static const char *list = NULL;
3599 if (!list) {
3600 /* Comma separated list of names to skip. */
3601 list = getenv("NIR_SKIP");
3602 if (!list)
3603 list = "";
3604 }
3605
3606 if (!list[0])
3607 return false;
3608
3609 return comma_separated_list_contains(list, name);
3610 }
3611
3612 static inline bool
3613 should_clone_nir(void)
3614 {
3615 static int should_clone = -1;
3616 if (should_clone < 0)
3617 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3618
3619 return should_clone;
3620 }
3621
3622 static inline bool
3623 should_serialize_deserialize_nir(void)
3624 {
3625 static int test_serialize = -1;
3626 if (test_serialize < 0)
3627 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3628
3629 return test_serialize;
3630 }
3631
3632 static inline bool
3633 should_print_nir(void)
3634 {
3635 static int should_print = -1;
3636 if (should_print < 0)
3637 should_print = env_var_as_boolean("NIR_PRINT", false);
3638
3639 return should_print;
3640 }
3641 #else
3642 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3643 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3644 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3645 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3646 static inline bool should_clone_nir(void) { return false; }
3647 static inline bool should_serialize_deserialize_nir(void) { return false; }
3648 static inline bool should_print_nir(void) { return false; }
3649 #endif /* NDEBUG */
3650
3651 #define _PASS(pass, nir, do_pass) do { \
3652 if (should_skip_nir(#pass)) { \
3653 printf("skipping %s\n", #pass); \
3654 break; \
3655 } \
3656 do_pass \
3657 nir_validate_shader(nir, "after " #pass); \
3658 if (should_clone_nir()) { \
3659 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3660 nir_shader_replace(nir, clone); \
3661 } \
3662 if (should_serialize_deserialize_nir()) { \
3663 nir_shader_serialize_deserialize(nir); \
3664 } \
3665 } while (0)
3666
3667 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3668 nir_metadata_set_validation_flag(nir); \
3669 if (should_print_nir()) \
3670 printf("%s\n", #pass); \
3671 if (pass(nir, ##__VA_ARGS__)) { \
3672 progress = true; \
3673 if (should_print_nir()) \
3674 nir_print_shader(nir, stdout); \
3675 nir_metadata_check_validation_flag(nir); \
3676 } \
3677 )
3678
3679 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3680 if (should_print_nir()) \
3681 printf("%s\n", #pass); \
3682 pass(nir, ##__VA_ARGS__); \
3683 if (should_print_nir()) \
3684 nir_print_shader(nir, stdout); \
3685 )
3686
3687 #define NIR_SKIP(name) should_skip_nir(#name)
3688
3689 /** An instruction filtering callback
3690 *
3691 * Returns true if the instruction should be processed and false otherwise.
3692 */
3693 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3694
3695 /** A simple instruction lowering callback
3696 *
3697 * Many instruction lowering passes can be written as a simple function which
3698 * takes an instruction as its input and returns a sequence of instructions
3699 * that implement the consumed instruction. This function type represents
3700 * such a lowering function. When called, a function with this prototype
3701 * should either return NULL indicating that no lowering needs to be done or
3702 * emit a sequence of instructions using the provided builder (whose cursor
3703 * will already be placed after the instruction to be lowered) and return the
3704 * resulting nir_ssa_def.
3705 */
3706 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3707 nir_instr *, void *);
3708
3709 /**
3710 * Special return value for nir_lower_instr_cb when some progress occurred
3711 * (like changing an input to the instr) that didn't result in a replacement
3712 * SSA def being generated.
3713 */
3714 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3715
3716 /** Iterate over all the instructions in a nir_function_impl and lower them
3717 * using the provided callbacks
3718 *
3719 * This function implements the guts of a standard lowering pass for you. It
3720 * iterates over all of the instructions in a nir_function_impl and calls the
3721 * filter callback on each one. If the filter callback returns true, it then
3722 * calls the lowering call back on the instruction. (Splitting it this way
3723 * allows us to avoid some save/restore work for instructions we know won't be
3724 * lowered.) If the instruction is dead after the lowering is complete, it
3725 * will be removed. If new instructions are added, the lowering callback will
3726 * also be called on them in case multiple lowerings are required.
3727 *
3728 * The metadata for the nir_function_impl will also be updated. If any blocks
3729 * are added (they cannot be removed), dominance and block indices will be
3730 * invalidated.
3731 */
3732 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3733 nir_instr_filter_cb filter,
3734 nir_lower_instr_cb lower,
3735 void *cb_data);
3736 bool nir_shader_lower_instructions(nir_shader *shader,
3737 nir_instr_filter_cb filter,
3738 nir_lower_instr_cb lower,
3739 void *cb_data);
3740
3741 void nir_calc_dominance_impl(nir_function_impl *impl);
3742 void nir_calc_dominance(nir_shader *shader);
3743
3744 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3745 bool nir_block_dominates(nir_block *parent, nir_block *child);
3746 bool nir_block_is_unreachable(nir_block *block);
3747
3748 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3749 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3750
3751 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3752 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3753
3754 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3755 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3756
3757 int nir_gs_count_vertices(const nir_shader *shader);
3758
3759 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3760 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3761 bool nir_split_var_copies(nir_shader *shader);
3762 bool nir_split_per_member_structs(nir_shader *shader);
3763 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3764
3765 bool nir_lower_returns_impl(nir_function_impl *impl);
3766 bool nir_lower_returns(nir_shader *shader);
3767
3768 void nir_inline_function_impl(struct nir_builder *b,
3769 const nir_function_impl *impl,
3770 nir_ssa_def **params);
3771 bool nir_inline_functions(nir_shader *shader);
3772
3773 bool nir_propagate_invariant(nir_shader *shader);
3774
3775 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3776 void nir_lower_deref_copy_instr(struct nir_builder *b,
3777 nir_intrinsic_instr *copy);
3778 bool nir_lower_var_copies(nir_shader *shader);
3779
3780 void nir_fixup_deref_modes(nir_shader *shader);
3781
3782 bool nir_lower_global_vars_to_local(nir_shader *shader);
3783
3784 typedef enum {
3785 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3786 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3787 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3788 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3789 } nir_lower_array_deref_of_vec_options;
3790
3791 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3792 nir_lower_array_deref_of_vec_options options);
3793
3794 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3795
3796 bool nir_lower_locals_to_regs(nir_shader *shader);
3797
3798 void nir_lower_io_to_temporaries(nir_shader *shader,
3799 nir_function_impl *entrypoint,
3800 bool outputs, bool inputs);
3801
3802 bool nir_lower_vars_to_scratch(nir_shader *shader,
3803 nir_variable_mode modes,
3804 int size_threshold,
3805 glsl_type_size_align_func size_align);
3806
3807 void nir_lower_clip_halfz(nir_shader *shader);
3808
3809 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3810
3811 void nir_gather_ssa_types(nir_function_impl *impl,
3812 BITSET_WORD *float_types,
3813 BITSET_WORD *int_types);
3814
3815 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3816 int (*type_size)(const struct glsl_type *, bool));
3817
3818 /* Some helpers to do very simple linking */
3819 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3820 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3821 uint64_t *used_by_other_stage,
3822 uint64_t *used_by_other_stage_patches);
3823 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3824 bool default_to_smooth_interp);
3825 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3826 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3827
3828 bool nir_lower_amul(nir_shader *shader,
3829 int (*type_size)(const struct glsl_type *, bool));
3830
3831 void nir_assign_io_var_locations(struct exec_list *var_list,
3832 unsigned *size,
3833 gl_shader_stage stage);
3834
3835 typedef struct {
3836 uint8_t num_linked_io_vars;
3837 uint8_t num_linked_patch_io_vars;
3838 } nir_linked_io_var_info;
3839
3840 nir_linked_io_var_info
3841 nir_assign_linked_io_var_locations(nir_shader *producer,
3842 nir_shader *consumer);
3843
3844 typedef enum {
3845 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3846 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3847 * modes.
3848 */
3849 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3850
3851 /* If set, this forces all non-flat fragment shader inputs to be
3852 * interpolated as if with the "sample" qualifier. This requires
3853 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3854 */
3855 nir_lower_io_force_sample_interpolation = (1 << 1),
3856 } nir_lower_io_options;
3857 bool nir_lower_io(nir_shader *shader,
3858 nir_variable_mode modes,
3859 int (*type_size)(const struct glsl_type *, bool),
3860 nir_lower_io_options);
3861
3862 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3863
3864 bool
3865 nir_lower_vars_to_explicit_types(nir_shader *shader,
3866 nir_variable_mode modes,
3867 glsl_type_size_align_func type_info);
3868
3869 typedef enum {
3870 /**
3871 * An address format which is a simple 32-bit global GPU address.
3872 */
3873 nir_address_format_32bit_global,
3874
3875 /**
3876 * An address format which is a simple 64-bit global GPU address.
3877 */
3878 nir_address_format_64bit_global,
3879
3880 /**
3881 * An address format which is a bounds-checked 64-bit global GPU address.
3882 *
3883 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3884 * address stored with the low bits in .x and high bits in .y, .z is a
3885 * size, and .w is an offset. When the final I/O operation is lowered, .w
3886 * is checked against .z and the operation is predicated on the result.
3887 */
3888 nir_address_format_64bit_bounded_global,
3889
3890 /**
3891 * An address format which is comprised of a vec2 where the first
3892 * component is a buffer index and the second is an offset.
3893 */
3894 nir_address_format_32bit_index_offset,
3895
3896 /**
3897 * An address format which is a simple 32-bit offset.
3898 */
3899 nir_address_format_32bit_offset,
3900
3901 /**
3902 * An address format representing a purely logical addressing model. In
3903 * this model, all deref chains must be complete from the dereference
3904 * operation to the variable. Cast derefs are not allowed. These
3905 * addresses will be 32-bit scalars but the format is immaterial because
3906 * you can always chase the chain.
3907 */
3908 nir_address_format_logical,
3909 } nir_address_format;
3910
3911 static inline unsigned
3912 nir_address_format_bit_size(nir_address_format addr_format)
3913 {
3914 switch (addr_format) {
3915 case nir_address_format_32bit_global: return 32;
3916 case nir_address_format_64bit_global: return 64;
3917 case nir_address_format_64bit_bounded_global: return 32;
3918 case nir_address_format_32bit_index_offset: return 32;
3919 case nir_address_format_32bit_offset: return 32;
3920 case nir_address_format_logical: return 32;
3921 }
3922 unreachable("Invalid address format");
3923 }
3924
3925 static inline unsigned
3926 nir_address_format_num_components(nir_address_format addr_format)
3927 {
3928 switch (addr_format) {
3929 case nir_address_format_32bit_global: return 1;
3930 case nir_address_format_64bit_global: return 1;
3931 case nir_address_format_64bit_bounded_global: return 4;
3932 case nir_address_format_32bit_index_offset: return 2;
3933 case nir_address_format_32bit_offset: return 1;
3934 case nir_address_format_logical: return 1;
3935 }
3936 unreachable("Invalid address format");
3937 }
3938
3939 static inline const struct glsl_type *
3940 nir_address_format_to_glsl_type(nir_address_format addr_format)
3941 {
3942 unsigned bit_size = nir_address_format_bit_size(addr_format);
3943 assert(bit_size == 32 || bit_size == 64);
3944 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3945 nir_address_format_num_components(addr_format));
3946 }
3947
3948 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3949
3950 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3951 nir_address_format addr_format);
3952
3953 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3954 nir_address_format addr_format);
3955
3956 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3957 nir_deref_instr *deref,
3958 nir_ssa_def *base_addr,
3959 nir_address_format addr_format);
3960 void nir_lower_explicit_io_instr(struct nir_builder *b,
3961 nir_intrinsic_instr *io_instr,
3962 nir_ssa_def *addr,
3963 nir_address_format addr_format);
3964
3965 bool nir_lower_explicit_io(nir_shader *shader,
3966 nir_variable_mode modes,
3967 nir_address_format);
3968
3969 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3970 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3971
3972 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3973
3974 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3975 bool nir_lower_regs_to_ssa(nir_shader *shader);
3976 bool nir_lower_vars_to_ssa(nir_shader *shader);
3977
3978 bool nir_remove_dead_derefs(nir_shader *shader);
3979 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3980 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3981 bool nir_lower_variable_initializers(nir_shader *shader,
3982 nir_variable_mode modes);
3983
3984 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3985 bool nir_lower_vec_to_movs(nir_shader *shader);
3986 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3987 bool alpha_to_one,
3988 const gl_state_index16 *alpha_ref_state_tokens);
3989 bool nir_lower_alu(nir_shader *shader);
3990
3991 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3992 bool always_precise, bool have_ffma);
3993
3994 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3995 bool nir_lower_bool_to_bitsize(nir_shader *shader);
3996 bool nir_lower_bool_to_float(nir_shader *shader);
3997 bool nir_lower_bool_to_int32(nir_shader *shader);
3998 bool nir_lower_int_to_float(nir_shader *shader);
3999 bool nir_lower_load_const_to_scalar(nir_shader *shader);
4000 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
4001 bool nir_lower_phis_to_scalar(nir_shader *shader);
4002 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
4003 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
4004 bool outputs_only);
4005 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
4006 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
4007 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
4008
4009 void nir_lower_fragcoord_wtrans(nir_shader *shader);
4010 void nir_lower_viewport_transform(nir_shader *shader);
4011 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
4012
4013 typedef struct nir_lower_subgroups_options {
4014 uint8_t subgroup_size;
4015 uint8_t ballot_bit_size;
4016 bool lower_to_scalar:1;
4017 bool lower_vote_trivial:1;
4018 bool lower_vote_eq_to_ballot:1;
4019 bool lower_subgroup_masks:1;
4020 bool lower_shuffle:1;
4021 bool lower_shuffle_to_32bit:1;
4022 bool lower_quad:1;
4023 bool lower_quad_broadcast_dynamic:1;
4024 bool lower_quad_broadcast_dynamic_to_const:1;
4025 } nir_lower_subgroups_options;
4026
4027 bool nir_lower_subgroups(nir_shader *shader,
4028 const nir_lower_subgroups_options *options);
4029
4030 bool nir_lower_system_values(nir_shader *shader);
4031
4032 enum PACKED nir_lower_tex_packing {
4033 nir_lower_tex_packing_none = 0,
4034 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
4035 * or unsigned ints based on the sampler type
4036 */
4037 nir_lower_tex_packing_16,
4038 /* The sampler returns 1 32-bit word of 4x8 unorm */
4039 nir_lower_tex_packing_8,
4040 };
4041
4042 typedef struct nir_lower_tex_options {
4043 /**
4044 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4045 * sampler types a texture projector is lowered.
4046 */
4047 unsigned lower_txp;
4048
4049 /**
4050 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4051 */
4052 bool lower_txf_offset;
4053
4054 /**
4055 * If true, lower away nir_tex_src_offset for all rect textures.
4056 */
4057 bool lower_rect_offset;
4058
4059 /**
4060 * If true, lower rect textures to 2D, using txs to fetch the
4061 * texture dimensions and dividing the texture coords by the
4062 * texture dims to normalize.
4063 */
4064 bool lower_rect;
4065
4066 /**
4067 * If true, convert yuv to rgb.
4068 */
4069 unsigned lower_y_uv_external;
4070 unsigned lower_y_u_v_external;
4071 unsigned lower_yx_xuxv_external;
4072 unsigned lower_xy_uxvx_external;
4073 unsigned lower_ayuv_external;
4074 unsigned lower_xyuv_external;
4075
4076 /**
4077 * To emulate certain texture wrap modes, this can be used
4078 * to saturate the specified tex coord to [0.0, 1.0]. The
4079 * bits are according to sampler #, ie. if, for example:
4080 *
4081 * (conf->saturate_s & (1 << n))
4082 *
4083 * is true, then the s coord for sampler n is saturated.
4084 *
4085 * Note that clamping must happen *after* projector lowering
4086 * so any projected texture sample instruction with a clamped
4087 * coordinate gets automatically lowered, regardless of the
4088 * 'lower_txp' setting.
4089 */
4090 unsigned saturate_s;
4091 unsigned saturate_t;
4092 unsigned saturate_r;
4093
4094 /* Bitmask of textures that need swizzling.
4095 *
4096 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4097 * swizzles[texture_index] is applied to the result of the texturing
4098 * operation.
4099 */
4100 unsigned swizzle_result;
4101
4102 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4103 * while 4 and 5 represent 0 and 1 respectively.
4104 */
4105 uint8_t swizzles[32][4];
4106
4107 /* Can be used to scale sampled values in range required by the format. */
4108 float scale_factors[32];
4109
4110 /**
4111 * Bitmap of textures that need srgb to linear conversion. If
4112 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4113 * of the texture are lowered to linear.
4114 */
4115 unsigned lower_srgb;
4116
4117 /**
4118 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4119 * LODs to nir_texop_txl.
4120 */
4121 bool lower_tex_without_implicit_lod;
4122
4123 /**
4124 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4125 */
4126 bool lower_txd_cube_map;
4127
4128 /**
4129 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4130 */
4131 bool lower_txd_3d;
4132
4133 /**
4134 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4135 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4136 * with lower_txd_cube_map.
4137 */
4138 bool lower_txd_shadow;
4139
4140 /**
4141 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4142 * Implies lower_txd_cube_map and lower_txd_shadow.
4143 */
4144 bool lower_txd;
4145
4146 /**
4147 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4148 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4149 */
4150 bool lower_txb_shadow_clamp;
4151
4152 /**
4153 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4154 * with nir_texop_txl. This includes cube maps.
4155 */
4156 bool lower_txd_shadow_clamp;
4157
4158 /**
4159 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4160 * with nir_texop_txl. This includes cube maps.
4161 */
4162 bool lower_txd_offset_clamp;
4163
4164 /**
4165 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4166 * sampler is bindless.
4167 */
4168 bool lower_txd_clamp_bindless_sampler;
4169
4170 /**
4171 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4172 * sampler index is not statically determinable to be less than 16.
4173 */
4174 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4175
4176 /**
4177 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4178 * 0-lod followed by a nir_ishr.
4179 */
4180 bool lower_txs_lod;
4181
4182 /**
4183 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4184 * mixed-up tg4 locations.
4185 */
4186 bool lower_tg4_broadcom_swizzle;
4187
4188 /**
4189 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4190 */
4191 bool lower_tg4_offsets;
4192
4193 enum nir_lower_tex_packing lower_tex_packing[32];
4194 } nir_lower_tex_options;
4195
4196 bool nir_lower_tex(nir_shader *shader,
4197 const nir_lower_tex_options *options);
4198
4199 enum nir_lower_non_uniform_access_type {
4200 nir_lower_non_uniform_ubo_access = (1 << 0),
4201 nir_lower_non_uniform_ssbo_access = (1 << 1),
4202 nir_lower_non_uniform_texture_access = (1 << 2),
4203 nir_lower_non_uniform_image_access = (1 << 3),
4204 };
4205
4206 bool nir_lower_non_uniform_access(nir_shader *shader,
4207 enum nir_lower_non_uniform_access_type);
4208
4209 enum nir_lower_idiv_path {
4210 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4211 * the two but it is not exact in some cases (for example, 1091317713u /
4212 * 1034u gives 5209173 instead of 1055432) */
4213 nir_lower_idiv_fast,
4214 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4215 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4216 * the nv50 path and many of them are integer multiplications, so it is
4217 * probably slower. It should always return the correct result, though. */
4218 nir_lower_idiv_precise,
4219 };
4220
4221 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4222
4223 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4224
4225 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4226 bool use_vars,
4227 bool use_clipdist_array,
4228 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4229 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4230 bool use_clipdist_array,
4231 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4232 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4233 bool use_clipdist_array);
4234 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4235
4236 void nir_lower_point_size_mov(nir_shader *shader,
4237 const gl_state_index16 *pointsize_state_tokens);
4238
4239 bool nir_lower_frexp(nir_shader *nir);
4240
4241 void nir_lower_two_sided_color(nir_shader *shader);
4242
4243 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4244
4245 bool nir_lower_flatshade(nir_shader *shader);
4246
4247 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4248 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4249 const gl_state_index16 *uniform_state_tokens);
4250
4251 typedef struct nir_lower_wpos_ytransform_options {
4252 gl_state_index16 state_tokens[STATE_LENGTH];
4253 bool fs_coord_origin_upper_left :1;
4254 bool fs_coord_origin_lower_left :1;
4255 bool fs_coord_pixel_center_integer :1;
4256 bool fs_coord_pixel_center_half_integer :1;
4257 } nir_lower_wpos_ytransform_options;
4258
4259 bool nir_lower_wpos_ytransform(nir_shader *shader,
4260 const nir_lower_wpos_ytransform_options *options);
4261 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4262
4263 bool nir_lower_fb_read(nir_shader *shader);
4264
4265 typedef struct nir_lower_drawpixels_options {
4266 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4267 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4268 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4269 unsigned drawpix_sampler;
4270 unsigned pixelmap_sampler;
4271 bool pixel_maps :1;
4272 bool scale_and_bias :1;
4273 } nir_lower_drawpixels_options;
4274
4275 void nir_lower_drawpixels(nir_shader *shader,
4276 const nir_lower_drawpixels_options *options);
4277
4278 typedef struct nir_lower_bitmap_options {
4279 unsigned sampler;
4280 bool swizzle_xxxx;
4281 } nir_lower_bitmap_options;
4282
4283 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4284
4285 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4286
4287 typedef enum {
4288 nir_lower_int_source_mods = 1 << 0,
4289 nir_lower_float_source_mods = 1 << 1,
4290 nir_lower_triop_abs = 1 << 2,
4291 nir_lower_all_source_mods = (1 << 3) - 1
4292 } nir_lower_to_source_mods_flags;
4293
4294
4295 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4296
4297 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4298
4299 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4300
4301 bool nir_lower_bit_size(nir_shader *shader,
4302 nir_lower_bit_size_callback callback,
4303 void *callback_data);
4304
4305 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4306 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4307
4308 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4309 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4310 nir_lower_doubles_options options);
4311 bool nir_lower_pack(nir_shader *shader);
4312
4313 void nir_lower_mediump_outputs(nir_shader *nir);
4314
4315 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4316
4317 typedef enum {
4318 nir_lower_interpolation_at_sample = (1 << 1),
4319 nir_lower_interpolation_at_offset = (1 << 2),
4320 nir_lower_interpolation_centroid = (1 << 3),
4321 nir_lower_interpolation_pixel = (1 << 4),
4322 nir_lower_interpolation_sample = (1 << 5),
4323 } nir_lower_interpolation_options;
4324
4325 bool nir_lower_interpolation(nir_shader *shader,
4326 nir_lower_interpolation_options options);
4327
4328 bool nir_lower_discard_to_demote(nir_shader *shader);
4329
4330 bool nir_normalize_cubemap_coords(nir_shader *shader);
4331
4332 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4333
4334 void nir_loop_analyze_impl(nir_function_impl *impl,
4335 nir_variable_mode indirect_mask);
4336
4337 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4338
4339 bool nir_repair_ssa_impl(nir_function_impl *impl);
4340 bool nir_repair_ssa(nir_shader *shader);
4341
4342 void nir_convert_loop_to_lcssa(nir_loop *loop);
4343 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4344 void nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4345
4346 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4347 * registers. If false, convert all values (even those not involved in a phi
4348 * node) to registers.
4349 */
4350 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4351
4352 bool nir_lower_phis_to_regs_block(nir_block *block);
4353 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4354 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4355
4356 bool nir_lower_samplers(nir_shader *shader);
4357 bool nir_lower_ssbo(nir_shader *shader);
4358
4359 /* This is here for unit tests. */
4360 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4361
4362 bool nir_opt_comparison_pre(nir_shader *shader);
4363
4364 bool nir_opt_access(nir_shader *shader);
4365 bool nir_opt_algebraic(nir_shader *shader);
4366 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4367 bool nir_opt_algebraic_late(nir_shader *shader);
4368 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4369 bool nir_opt_constant_folding(nir_shader *shader);
4370
4371 /* Try to combine a and b into a. Return true if combination was possible,
4372 * which will result in b being removed by the pass. Return false if
4373 * combination wasn't possible.
4374 */
4375 typedef bool (*nir_combine_memory_barrier_cb)(
4376 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4377
4378 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4379 nir_combine_memory_barrier_cb combine_cb,
4380 void *data);
4381
4382 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4383
4384 bool nir_copy_prop(nir_shader *shader);
4385
4386 bool nir_opt_copy_prop_vars(nir_shader *shader);
4387
4388 bool nir_opt_cse(nir_shader *shader);
4389
4390 bool nir_opt_dce(nir_shader *shader);
4391
4392 bool nir_opt_dead_cf(nir_shader *shader);
4393
4394 bool nir_opt_dead_write_vars(nir_shader *shader);
4395
4396 bool nir_opt_deref_impl(nir_function_impl *impl);
4397 bool nir_opt_deref(nir_shader *shader);
4398
4399 bool nir_opt_find_array_copies(nir_shader *shader);
4400
4401 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4402
4403 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4404
4405 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4406
4407 bool nir_opt_intrinsics(nir_shader *shader);
4408
4409 bool nir_opt_large_constants(nir_shader *shader,
4410 glsl_type_size_align_func size_align,
4411 unsigned threshold);
4412
4413 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4414
4415 typedef enum {
4416 nir_move_const_undef = (1 << 0),
4417 nir_move_load_ubo = (1 << 1),
4418 nir_move_load_input = (1 << 2),
4419 nir_move_comparisons = (1 << 3),
4420 nir_move_copies = (1 << 4),
4421 } nir_move_options;
4422
4423 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4424
4425 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4426
4427 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4428
4429 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4430 bool indirect_load_ok, bool expensive_alu_ok);
4431
4432 bool nir_opt_rematerialize_compares(nir_shader *shader);
4433
4434 bool nir_opt_remove_phis(nir_shader *shader);
4435 bool nir_opt_remove_phis_block(nir_block *block);
4436
4437 bool nir_opt_shrink_load(nir_shader *shader);
4438
4439 bool nir_opt_trivial_continues(nir_shader *shader);
4440
4441 bool nir_opt_undef(nir_shader *shader);
4442
4443 bool nir_opt_vectorize(nir_shader *shader);
4444
4445 bool nir_opt_conditional_discard(nir_shader *shader);
4446
4447 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4448 unsigned num_components, unsigned high_offset,
4449 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4450
4451 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4452 nir_should_vectorize_mem_func callback,
4453 nir_variable_mode robust_modes);
4454
4455 void nir_schedule(nir_shader *shader, int threshold);
4456
4457 void nir_strip(nir_shader *shader);
4458
4459 void nir_sweep(nir_shader *shader);
4460
4461 void nir_remap_dual_slot_attributes(nir_shader *shader,
4462 uint64_t *dual_slot_inputs);
4463 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4464
4465 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4466 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4467
4468 static inline bool
4469 nir_variable_is_in_ubo(const nir_variable *var)
4470 {
4471 return (var->data.mode == nir_var_mem_ubo &&
4472 var->interface_type != NULL);
4473 }
4474
4475 static inline bool
4476 nir_variable_is_in_ssbo(const nir_variable *var)
4477 {
4478 return (var->data.mode == nir_var_mem_ssbo &&
4479 var->interface_type != NULL);
4480 }
4481
4482 static inline bool
4483 nir_variable_is_in_block(const nir_variable *var)
4484 {
4485 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4486 }
4487
4488 #ifdef __cplusplus
4489 } /* extern "C" */
4490 #endif
4491
4492 #endif /* NIR_H */