nir: add 64-bit ufind_msb lowering support. (v2)
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
43 #include <stdio.h>
44
45 #ifndef NDEBUG
46 #include "util/debug.h"
47 #endif /* NDEBUG */
48
49 #include "nir_opcodes.h"
50
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
53 #endif
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 #define NIR_FALSE 0u
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 4
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 #define NIR_STREAM_PACKED (1 << 8)
64 typedef uint8_t nir_component_mask_t;
65
66 /** Defines a cast function
67 *
68 * This macro defines a cast function from in_type to out_type where
69 * out_type is some structure type that contains a field of type out_type.
70 *
71 * Note that you have to be a bit careful as the generated cast function
72 * destroys constness.
73 */
74 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
75 type_field, type_value) \
76 static inline out_type * \
77 name(const in_type *parent) \
78 { \
79 assert(parent && parent->type_field == type_value); \
80 return exec_node_data(out_type, parent, field); \
81 }
82
83 struct nir_function;
84 struct nir_shader;
85 struct nir_instr;
86 struct nir_builder;
87
88
89 /**
90 * Description of built-in state associated with a uniform
91 *
92 * \sa nir_variable::state_slots
93 */
94 typedef struct {
95 gl_state_index16 tokens[STATE_LENGTH];
96 uint16_t swizzle;
97 } nir_state_slot;
98
99 typedef enum {
100 nir_var_shader_in = (1 << 0),
101 nir_var_shader_out = (1 << 1),
102 nir_var_shader_temp = (1 << 2),
103 nir_var_function_temp = (1 << 3),
104 nir_var_uniform = (1 << 4),
105 nir_var_mem_ubo = (1 << 5),
106 nir_var_system_value = (1 << 6),
107 nir_var_mem_ssbo = (1 << 7),
108 nir_var_mem_shared = (1 << 8),
109 nir_var_mem_global = (1 << 9),
110 nir_var_all = (1 << 10) - 1,
111 } nir_variable_mode;
112
113 /**
114 * Rounding modes.
115 */
116 typedef enum {
117 nir_rounding_mode_undef = 0,
118 nir_rounding_mode_rtne = 1, /* round to nearest even */
119 nir_rounding_mode_ru = 2, /* round up */
120 nir_rounding_mode_rd = 3, /* round down */
121 nir_rounding_mode_rtz = 4, /* round towards zero */
122 } nir_rounding_mode;
123
124 typedef union {
125 bool b;
126 float f32;
127 double f64;
128 int8_t i8;
129 uint8_t u8;
130 int16_t i16;
131 uint16_t u16;
132 int32_t i32;
133 uint32_t u32;
134 int64_t i64;
135 uint64_t u64;
136 } nir_const_value;
137
138 #define nir_const_value_to_array(arr, c, components, m) \
139 { \
140 for (unsigned i = 0; i < components; ++i) \
141 arr[i] = c[i].m; \
142 } while (false)
143
144 static inline nir_const_value
145 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
146 {
147 nir_const_value v;
148 memset(&v, 0, sizeof(v));
149
150 switch (bit_size) {
151 case 1: v.b = x; break;
152 case 8: v.u8 = x; break;
153 case 16: v.u16 = x; break;
154 case 32: v.u32 = x; break;
155 case 64: v.u64 = x; break;
156 default:
157 unreachable("Invalid bit size");
158 }
159
160 return v;
161 }
162
163 static inline nir_const_value
164 nir_const_value_for_int(int64_t i, unsigned bit_size)
165 {
166 nir_const_value v;
167 memset(&v, 0, sizeof(v));
168
169 assert(bit_size <= 64);
170 if (bit_size < 64) {
171 assert(i >= (-(1ll << (bit_size - 1))));
172 assert(i < (1ll << (bit_size - 1)));
173 }
174
175 return nir_const_value_for_raw_uint(i, bit_size);
176 }
177
178 static inline nir_const_value
179 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
180 {
181 nir_const_value v;
182 memset(&v, 0, sizeof(v));
183
184 assert(bit_size <= 64);
185 if (bit_size < 64)
186 assert(u < (1ull << bit_size));
187
188 return nir_const_value_for_raw_uint(u, bit_size);
189 }
190
191 static inline nir_const_value
192 nir_const_value_for_bool(bool b, unsigned bit_size)
193 {
194 /* Booleans use a 0/-1 convention */
195 return nir_const_value_for_int(-(int)b, bit_size);
196 }
197
198 /* This one isn't inline because it requires half-float conversion */
199 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
200
201 static inline int64_t
202 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
203 {
204 switch (bit_size) {
205 /* int1_t uses 0/-1 convention */
206 case 1: return -(int)value.b;
207 case 8: return value.i8;
208 case 16: return value.i16;
209 case 32: return value.i32;
210 case 64: return value.i64;
211 default:
212 unreachable("Invalid bit size");
213 }
214 }
215
216 static inline uint64_t
217 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
218 {
219 switch (bit_size) {
220 case 1: return value.b;
221 case 8: return value.u8;
222 case 16: return value.u16;
223 case 32: return value.u32;
224 case 64: return value.u64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline bool
231 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
232 {
233 int64_t i = nir_const_value_as_int(value, bit_size);
234
235 /* Booleans of any size use 0/-1 convention */
236 assert(i == 0 || i == -1);
237
238 return i;
239 }
240
241 /* This one isn't inline because it requires half-float conversion */
242 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
243
244 typedef struct nir_constant {
245 /**
246 * Value of the constant.
247 *
248 * The field used to back the values supplied by the constant is determined
249 * by the type associated with the \c nir_variable. Constants may be
250 * scalars, vectors, or matrices.
251 */
252 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
253
254 /* we could get this from the var->type but makes clone *much* easier to
255 * not have to care about the type.
256 */
257 unsigned num_elements;
258
259 /* Array elements / Structure Fields */
260 struct nir_constant **elements;
261 } nir_constant;
262
263 /**
264 * \brief Layout qualifiers for gl_FragDepth.
265 *
266 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
267 * with a layout qualifier.
268 */
269 typedef enum {
270 nir_depth_layout_none, /**< No depth layout is specified. */
271 nir_depth_layout_any,
272 nir_depth_layout_greater,
273 nir_depth_layout_less,
274 nir_depth_layout_unchanged
275 } nir_depth_layout;
276
277 /**
278 * Enum keeping track of how a variable was declared.
279 */
280 typedef enum {
281 /**
282 * Normal declaration.
283 */
284 nir_var_declared_normally = 0,
285
286 /**
287 * Variable is implicitly generated by the compiler and should not be
288 * visible via the API.
289 */
290 nir_var_hidden,
291 } nir_var_declaration_type;
292
293 /**
294 * Either a uniform, global variable, shader input, or shader output. Based on
295 * ir_variable - it should be easy to translate between the two.
296 */
297
298 typedef struct nir_variable {
299 struct exec_node node;
300
301 /**
302 * Declared type of the variable
303 */
304 const struct glsl_type *type;
305
306 /**
307 * Declared name of the variable
308 */
309 char *name;
310
311 struct nir_variable_data {
312 /**
313 * Storage class of the variable.
314 *
315 * \sa nir_variable_mode
316 */
317 nir_variable_mode mode:10;
318
319 /**
320 * Is the variable read-only?
321 *
322 * This is set for variables declared as \c const, shader inputs,
323 * and uniforms.
324 */
325 unsigned read_only:1;
326 unsigned centroid:1;
327 unsigned sample:1;
328 unsigned patch:1;
329 unsigned invariant:1;
330
331 /**
332 * Can this variable be coalesced with another?
333 *
334 * This is set by nir_lower_io_to_temporaries to say that any
335 * copies involving this variable should stay put. Propagating it can
336 * duplicate the resulting load/store, which is not wanted, and may
337 * result in a load/store of the variable with an indirect offset which
338 * the backend may not be able to handle.
339 */
340 unsigned cannot_coalesce:1;
341
342 /**
343 * When separate shader programs are enabled, only input/outputs between
344 * the stages of a multi-stage separate program can be safely removed
345 * from the shader interface. Other input/outputs must remains active.
346 *
347 * This is also used to make sure xfb varyings that are unused by the
348 * fragment shader are not removed.
349 */
350 unsigned always_active_io:1;
351
352 /**
353 * Interpolation mode for shader inputs / outputs
354 *
355 * \sa glsl_interp_mode
356 */
357 unsigned interpolation:2;
358
359 /**
360 * If non-zero, then this variable may be packed along with other variables
361 * into a single varying slot, so this offset should be applied when
362 * accessing components. For example, an offset of 1 means that the x
363 * component of this variable is actually stored in component y of the
364 * location specified by \c location.
365 */
366 unsigned location_frac:2;
367
368 /**
369 * If true, this variable represents an array of scalars that should
370 * be tightly packed. In other words, consecutive array elements
371 * should be stored one component apart, rather than one slot apart.
372 */
373 unsigned compact:1;
374
375 /**
376 * Whether this is a fragment shader output implicitly initialized with
377 * the previous contents of the specified render target at the
378 * framebuffer location corresponding to this shader invocation.
379 */
380 unsigned fb_fetch_output:1;
381
382 /**
383 * Non-zero if this variable is considered bindless as defined by
384 * ARB_bindless_texture.
385 */
386 unsigned bindless:1;
387
388 /**
389 * Was an explicit binding set in the shader?
390 */
391 unsigned explicit_binding:1;
392
393 /**
394 * Was a transfer feedback buffer set in the shader?
395 */
396 unsigned explicit_xfb_buffer:1;
397
398 /**
399 * Was a transfer feedback stride set in the shader?
400 */
401 unsigned explicit_xfb_stride:1;
402
403 /**
404 * Was an explicit offset set in the shader?
405 */
406 unsigned explicit_offset:1;
407
408 /**
409 * How the variable was declared. See nir_var_declaration_type.
410 *
411 * This is used to detect variables generated by the compiler, so should
412 * not be visible via the API.
413 */
414 unsigned how_declared:2;
415
416 /**
417 * \brief Layout qualifier for gl_FragDepth.
418 *
419 * This is not equal to \c ir_depth_layout_none if and only if this
420 * variable is \c gl_FragDepth and a layout qualifier is specified.
421 */
422 nir_depth_layout depth_layout:3;
423
424 /**
425 * Vertex stream output identifier.
426 *
427 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
428 * indicate the stream of the i-th component.
429 */
430 unsigned stream:9;
431
432 /**
433 * Access flags for memory variables (SSBO/global), image uniforms, and
434 * bindless images in uniforms/inputs/outputs.
435 */
436 enum gl_access_qualifier access:8;
437
438 /**
439 * Descriptor set binding for sampler or UBO.
440 */
441 unsigned descriptor_set:5;
442
443 /**
444 * output index for dual source blending.
445 */
446 unsigned index;
447
448 /**
449 * Initial binding point for a sampler or UBO.
450 *
451 * For array types, this represents the binding point for the first element.
452 */
453 unsigned binding;
454
455 /**
456 * Storage location of the base of this variable
457 *
458 * The precise meaning of this field depends on the nature of the variable.
459 *
460 * - Vertex shader input: one of the values from \c gl_vert_attrib.
461 * - Vertex shader output: one of the values from \c gl_varying_slot.
462 * - Geometry shader input: one of the values from \c gl_varying_slot.
463 * - Geometry shader output: one of the values from \c gl_varying_slot.
464 * - Fragment shader input: one of the values from \c gl_varying_slot.
465 * - Fragment shader output: one of the values from \c gl_frag_result.
466 * - Uniforms: Per-stage uniform slot number for default uniform block.
467 * - Uniforms: Index within the uniform block definition for UBO members.
468 * - Non-UBO Uniforms: uniform slot number.
469 * - Other: This field is not currently used.
470 *
471 * If the variable is a uniform, shader input, or shader output, and the
472 * slot has not been assigned, the value will be -1.
473 */
474 int location;
475
476 /**
477 * The actual location of the variable in the IR. Only valid for inputs,
478 * outputs, and uniforms (including samplers and images).
479 */
480 unsigned driver_location;
481
482 /**
483 * Location an atomic counter or transform feedback is stored at.
484 */
485 unsigned offset;
486
487 union {
488 struct {
489 /** Image internal format if specified explicitly, otherwise GL_NONE. */
490 uint16_t format; /* GLenum */
491 } image;
492
493 struct {
494 /**
495 * Transform feedback buffer.
496 */
497 uint16_t buffer:2;
498
499 /**
500 * Transform feedback stride.
501 */
502 uint16_t stride;
503 } xfb;
504 };
505 } data;
506
507 /**
508 * Identifier for this variable generated by nir_index_vars() that is unique
509 * among other variables in the same exec_list.
510 */
511 unsigned index;
512
513 /* Number of nir_variable_data members */
514 uint16_t num_members;
515
516 /**
517 * Built-in state that backs this uniform
518 *
519 * Once set at variable creation, \c state_slots must remain invariant.
520 * This is because, ideally, this array would be shared by all clones of
521 * this variable in the IR tree. In other words, we'd really like for it
522 * to be a fly-weight.
523 *
524 * If the variable is not a uniform, \c num_state_slots will be zero and
525 * \c state_slots will be \c NULL.
526 */
527 /*@{*/
528 uint16_t num_state_slots; /**< Number of state slots used */
529 nir_state_slot *state_slots; /**< State descriptors. */
530 /*@}*/
531
532 /**
533 * Constant expression assigned in the initializer of the variable
534 *
535 * This field should only be used temporarily by creators of NIR shaders
536 * and then lower_constant_initializers can be used to get rid of them.
537 * Most of the rest of NIR ignores this field or asserts that it's NULL.
538 */
539 nir_constant *constant_initializer;
540
541 /**
542 * For variables that are in an interface block or are an instance of an
543 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
544 *
545 * \sa ir_variable::location
546 */
547 const struct glsl_type *interface_type;
548
549 /**
550 * Description of per-member data for per-member struct variables
551 *
552 * This is used for variables which are actually an amalgamation of
553 * multiple entities such as a struct of built-in values or a struct of
554 * inputs each with their own layout specifier. This is only allowed on
555 * variables with a struct or array of array of struct type.
556 */
557 struct nir_variable_data *members;
558 } nir_variable;
559
560 #define nir_foreach_variable(var, var_list) \
561 foreach_list_typed(nir_variable, var, node, var_list)
562
563 #define nir_foreach_variable_safe(var, var_list) \
564 foreach_list_typed_safe(nir_variable, var, node, var_list)
565
566 static inline bool
567 nir_variable_is_global(const nir_variable *var)
568 {
569 return var->data.mode != nir_var_function_temp;
570 }
571
572 typedef struct nir_register {
573 struct exec_node node;
574
575 unsigned num_components; /** < number of vector components */
576 unsigned num_array_elems; /** < size of array (0 for no array) */
577
578 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
579 uint8_t bit_size;
580
581 /** generic register index. */
582 unsigned index;
583
584 /** only for debug purposes, can be NULL */
585 const char *name;
586
587 /** set of nir_srcs where this register is used (read from) */
588 struct list_head uses;
589
590 /** set of nir_dests where this register is defined (written to) */
591 struct list_head defs;
592
593 /** set of nir_ifs where this register is used as a condition */
594 struct list_head if_uses;
595 } nir_register;
596
597 #define nir_foreach_register(reg, reg_list) \
598 foreach_list_typed(nir_register, reg, node, reg_list)
599 #define nir_foreach_register_safe(reg, reg_list) \
600 foreach_list_typed_safe(nir_register, reg, node, reg_list)
601
602 typedef enum PACKED {
603 nir_instr_type_alu,
604 nir_instr_type_deref,
605 nir_instr_type_call,
606 nir_instr_type_tex,
607 nir_instr_type_intrinsic,
608 nir_instr_type_load_const,
609 nir_instr_type_jump,
610 nir_instr_type_ssa_undef,
611 nir_instr_type_phi,
612 nir_instr_type_parallel_copy,
613 } nir_instr_type;
614
615 typedef struct nir_instr {
616 struct exec_node node;
617 struct nir_block *block;
618 nir_instr_type type;
619
620 /* A temporary for optimization and analysis passes to use for storing
621 * flags. For instance, DCE uses this to store the "dead/live" info.
622 */
623 uint8_t pass_flags;
624
625 /** generic instruction index. */
626 unsigned index;
627 } nir_instr;
628
629 static inline nir_instr *
630 nir_instr_next(nir_instr *instr)
631 {
632 struct exec_node *next = exec_node_get_next(&instr->node);
633 if (exec_node_is_tail_sentinel(next))
634 return NULL;
635 else
636 return exec_node_data(nir_instr, next, node);
637 }
638
639 static inline nir_instr *
640 nir_instr_prev(nir_instr *instr)
641 {
642 struct exec_node *prev = exec_node_get_prev(&instr->node);
643 if (exec_node_is_head_sentinel(prev))
644 return NULL;
645 else
646 return exec_node_data(nir_instr, prev, node);
647 }
648
649 static inline bool
650 nir_instr_is_first(const nir_instr *instr)
651 {
652 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
653 }
654
655 static inline bool
656 nir_instr_is_last(const nir_instr *instr)
657 {
658 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
659 }
660
661 typedef struct nir_ssa_def {
662 /** for debugging only, can be NULL */
663 const char* name;
664
665 /** generic SSA definition index. */
666 unsigned index;
667
668 /** Index into the live_in and live_out bitfields */
669 unsigned live_index;
670
671 /** Instruction which produces this SSA value. */
672 nir_instr *parent_instr;
673
674 /** set of nir_instrs where this register is used (read from) */
675 struct list_head uses;
676
677 /** set of nir_ifs where this register is used as a condition */
678 struct list_head if_uses;
679
680 uint8_t num_components;
681
682 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
683 uint8_t bit_size;
684 } nir_ssa_def;
685
686 struct nir_src;
687
688 typedef struct {
689 nir_register *reg;
690 struct nir_src *indirect; /** < NULL for no indirect offset */
691 unsigned base_offset;
692
693 /* TODO use-def chain goes here */
694 } nir_reg_src;
695
696 typedef struct {
697 nir_instr *parent_instr;
698 struct list_head def_link;
699
700 nir_register *reg;
701 struct nir_src *indirect; /** < NULL for no indirect offset */
702 unsigned base_offset;
703
704 /* TODO def-use chain goes here */
705 } nir_reg_dest;
706
707 struct nir_if;
708
709 typedef struct nir_src {
710 union {
711 /** Instruction that consumes this value as a source. */
712 nir_instr *parent_instr;
713 struct nir_if *parent_if;
714 };
715
716 struct list_head use_link;
717
718 union {
719 nir_reg_src reg;
720 nir_ssa_def *ssa;
721 };
722
723 bool is_ssa;
724 } nir_src;
725
726 static inline nir_src
727 nir_src_init(void)
728 {
729 nir_src src = { { NULL } };
730 return src;
731 }
732
733 #define NIR_SRC_INIT nir_src_init()
734
735 #define nir_foreach_use(src, reg_or_ssa_def) \
736 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
737
738 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
739 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
740
741 #define nir_foreach_if_use(src, reg_or_ssa_def) \
742 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
743
744 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
745 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
746
747 typedef struct {
748 union {
749 nir_reg_dest reg;
750 nir_ssa_def ssa;
751 };
752
753 bool is_ssa;
754 } nir_dest;
755
756 static inline nir_dest
757 nir_dest_init(void)
758 {
759 nir_dest dest = { { { NULL } } };
760 return dest;
761 }
762
763 #define NIR_DEST_INIT nir_dest_init()
764
765 #define nir_foreach_def(dest, reg) \
766 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
767
768 #define nir_foreach_def_safe(dest, reg) \
769 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
770
771 static inline nir_src
772 nir_src_for_ssa(nir_ssa_def *def)
773 {
774 nir_src src = NIR_SRC_INIT;
775
776 src.is_ssa = true;
777 src.ssa = def;
778
779 return src;
780 }
781
782 static inline nir_src
783 nir_src_for_reg(nir_register *reg)
784 {
785 nir_src src = NIR_SRC_INIT;
786
787 src.is_ssa = false;
788 src.reg.reg = reg;
789 src.reg.indirect = NULL;
790 src.reg.base_offset = 0;
791
792 return src;
793 }
794
795 static inline nir_dest
796 nir_dest_for_reg(nir_register *reg)
797 {
798 nir_dest dest = NIR_DEST_INIT;
799
800 dest.reg.reg = reg;
801
802 return dest;
803 }
804
805 static inline unsigned
806 nir_src_bit_size(nir_src src)
807 {
808 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
809 }
810
811 static inline unsigned
812 nir_src_num_components(nir_src src)
813 {
814 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
815 }
816
817 static inline bool
818 nir_src_is_const(nir_src src)
819 {
820 return src.is_ssa &&
821 src.ssa->parent_instr->type == nir_instr_type_load_const;
822 }
823
824 static inline unsigned
825 nir_dest_bit_size(nir_dest dest)
826 {
827 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
828 }
829
830 static inline unsigned
831 nir_dest_num_components(nir_dest dest)
832 {
833 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
834 }
835
836 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
837 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
838
839 typedef struct {
840 nir_src src;
841
842 /**
843 * \name input modifiers
844 */
845 /*@{*/
846 /**
847 * For inputs interpreted as floating point, flips the sign bit. For
848 * inputs interpreted as integers, performs the two's complement negation.
849 */
850 bool negate;
851
852 /**
853 * Clears the sign bit for floating point values, and computes the integer
854 * absolute value for integers. Note that the negate modifier acts after
855 * the absolute value modifier, therefore if both are set then all inputs
856 * will become negative.
857 */
858 bool abs;
859 /*@}*/
860
861 /**
862 * For each input component, says which component of the register it is
863 * chosen from. Note that which elements of the swizzle are used and which
864 * are ignored are based on the write mask for most opcodes - for example,
865 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
866 * a swizzle of {2, x, 1, 0} where x means "don't care."
867 */
868 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
869 } nir_alu_src;
870
871 typedef struct {
872 nir_dest dest;
873
874 /**
875 * \name saturate output modifier
876 *
877 * Only valid for opcodes that output floating-point numbers. Clamps the
878 * output to between 0.0 and 1.0 inclusive.
879 */
880
881 bool saturate;
882
883 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
884 } nir_alu_dest;
885
886 /** NIR sized and unsized types
887 *
888 * The values in this enum are carefully chosen so that the sized type is
889 * just the unsized type OR the number of bits.
890 */
891 typedef enum {
892 nir_type_invalid = 0, /* Not a valid type */
893 nir_type_int = 2,
894 nir_type_uint = 4,
895 nir_type_bool = 6,
896 nir_type_float = 128,
897 nir_type_bool1 = 1 | nir_type_bool,
898 nir_type_bool8 = 8 | nir_type_bool,
899 nir_type_bool16 = 16 | nir_type_bool,
900 nir_type_bool32 = 32 | nir_type_bool,
901 nir_type_int1 = 1 | nir_type_int,
902 nir_type_int8 = 8 | nir_type_int,
903 nir_type_int16 = 16 | nir_type_int,
904 nir_type_int32 = 32 | nir_type_int,
905 nir_type_int64 = 64 | nir_type_int,
906 nir_type_uint1 = 1 | nir_type_uint,
907 nir_type_uint8 = 8 | nir_type_uint,
908 nir_type_uint16 = 16 | nir_type_uint,
909 nir_type_uint32 = 32 | nir_type_uint,
910 nir_type_uint64 = 64 | nir_type_uint,
911 nir_type_float16 = 16 | nir_type_float,
912 nir_type_float32 = 32 | nir_type_float,
913 nir_type_float64 = 64 | nir_type_float,
914 } nir_alu_type;
915
916 #define NIR_ALU_TYPE_SIZE_MASK 0x79
917 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
918
919 static inline unsigned
920 nir_alu_type_get_type_size(nir_alu_type type)
921 {
922 return type & NIR_ALU_TYPE_SIZE_MASK;
923 }
924
925 static inline unsigned
926 nir_alu_type_get_base_type(nir_alu_type type)
927 {
928 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
929 }
930
931 static inline nir_alu_type
932 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
933 {
934 switch (base_type) {
935 case GLSL_TYPE_BOOL:
936 return nir_type_bool1;
937 break;
938 case GLSL_TYPE_UINT:
939 return nir_type_uint32;
940 break;
941 case GLSL_TYPE_INT:
942 return nir_type_int32;
943 break;
944 case GLSL_TYPE_UINT16:
945 return nir_type_uint16;
946 break;
947 case GLSL_TYPE_INT16:
948 return nir_type_int16;
949 break;
950 case GLSL_TYPE_UINT8:
951 return nir_type_uint8;
952 case GLSL_TYPE_INT8:
953 return nir_type_int8;
954 case GLSL_TYPE_UINT64:
955 return nir_type_uint64;
956 break;
957 case GLSL_TYPE_INT64:
958 return nir_type_int64;
959 break;
960 case GLSL_TYPE_FLOAT:
961 return nir_type_float32;
962 break;
963 case GLSL_TYPE_FLOAT16:
964 return nir_type_float16;
965 break;
966 case GLSL_TYPE_DOUBLE:
967 return nir_type_float64;
968 break;
969
970 case GLSL_TYPE_SAMPLER:
971 case GLSL_TYPE_IMAGE:
972 case GLSL_TYPE_ATOMIC_UINT:
973 case GLSL_TYPE_STRUCT:
974 case GLSL_TYPE_INTERFACE:
975 case GLSL_TYPE_ARRAY:
976 case GLSL_TYPE_VOID:
977 case GLSL_TYPE_SUBROUTINE:
978 case GLSL_TYPE_FUNCTION:
979 case GLSL_TYPE_ERROR:
980 return nir_type_invalid;
981 }
982
983 unreachable("unknown type");
984 }
985
986 static inline nir_alu_type
987 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
988 {
989 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
990 }
991
992 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
993 nir_rounding_mode rnd);
994
995 static inline nir_op
996 nir_op_vec(unsigned components)
997 {
998 switch (components) {
999 case 1: return nir_op_mov;
1000 case 2: return nir_op_vec2;
1001 case 3: return nir_op_vec3;
1002 case 4: return nir_op_vec4;
1003 default: unreachable("bad component count");
1004 }
1005 }
1006
1007 static inline bool
1008 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1009 {
1010 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1011 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1012 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1013 }
1014
1015 static inline bool
1016 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1017 {
1018 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1019 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1020 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1021 }
1022
1023 static inline bool
1024 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1025 {
1026 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1027 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1028 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1029 }
1030
1031 static inline bool
1032 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1033 {
1034 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1035 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1036 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1037 }
1038
1039 static inline bool
1040 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1041 {
1042 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1043 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1044 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1045 }
1046
1047 static inline bool
1048 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1049 {
1050 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1051 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1052 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1053 }
1054
1055 static inline bool
1056 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1057 {
1058 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1059 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1060 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1061 }
1062
1063 static inline nir_rounding_mode
1064 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1065 nir_alu_type type)
1066 {
1067 if (nir_alu_type_get_base_type(type) != nir_type_float)
1068 return nir_rounding_mode_undef;
1069
1070 unsigned bit_size = nir_alu_type_get_type_size(type);
1071
1072 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1073 return nir_rounding_mode_rtz;
1074 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1075 return nir_rounding_mode_rtne;
1076 return nir_rounding_mode_undef;
1077 }
1078
1079 static inline bool
1080 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1081 {
1082 bool result =
1083 nir_has_any_rounding_mode_rtne(execution_mode) ||
1084 nir_has_any_rounding_mode_rtz(execution_mode);
1085 return result;
1086 }
1087
1088 typedef enum {
1089 /**
1090 * Operation where the first two sources are commutative.
1091 *
1092 * For 2-source operations, this just mathematical commutativity. Some
1093 * 3-source operations, like ffma, are only commutative in the first two
1094 * sources.
1095 */
1096 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1097 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1098 } nir_op_algebraic_property;
1099
1100 typedef struct {
1101 const char *name;
1102
1103 unsigned num_inputs;
1104
1105 /**
1106 * The number of components in the output
1107 *
1108 * If non-zero, this is the size of the output and input sizes are
1109 * explicitly given; swizzle and writemask are still in effect, but if
1110 * the output component is masked out, then the input component may
1111 * still be in use.
1112 *
1113 * If zero, the opcode acts in the standard, per-component manner; the
1114 * operation is performed on each component (except the ones that are
1115 * masked out) with the input being taken from the input swizzle for
1116 * that component.
1117 *
1118 * The size of some of the inputs may be given (i.e. non-zero) even
1119 * though output_size is zero; in that case, the inputs with a zero
1120 * size act per-component, while the inputs with non-zero size don't.
1121 */
1122 unsigned output_size;
1123
1124 /**
1125 * The type of vector that the instruction outputs. Note that the
1126 * staurate modifier is only allowed on outputs with the float type.
1127 */
1128
1129 nir_alu_type output_type;
1130
1131 /**
1132 * The number of components in each input
1133 */
1134 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1135
1136 /**
1137 * The type of vector that each input takes. Note that negate and
1138 * absolute value are only allowed on inputs with int or float type and
1139 * behave differently on the two.
1140 */
1141 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1142
1143 nir_op_algebraic_property algebraic_properties;
1144
1145 /* Whether this represents a numeric conversion opcode */
1146 bool is_conversion;
1147 } nir_op_info;
1148
1149 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1150
1151 typedef struct nir_alu_instr {
1152 nir_instr instr;
1153 nir_op op;
1154
1155 /** Indicates that this ALU instruction generates an exact value
1156 *
1157 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1158 * really equivalent to either. This indicates that the value generated by
1159 * this operation is high-precision and any code transformations that touch
1160 * it must ensure that the resulting value is bit-for-bit identical to the
1161 * original.
1162 */
1163 bool exact:1;
1164
1165 /**
1166 * Indicates that this instruction do not cause wrapping to occur, in the
1167 * form of overflow or underflow.
1168 */
1169 bool no_signed_wrap:1;
1170 bool no_unsigned_wrap:1;
1171
1172 nir_alu_dest dest;
1173 nir_alu_src src[];
1174 } nir_alu_instr;
1175
1176 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1177 nir_alu_instr *instr);
1178 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1179 nir_alu_instr *instr);
1180
1181 /* is this source channel used? */
1182 static inline bool
1183 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1184 unsigned channel)
1185 {
1186 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1187 return channel < nir_op_infos[instr->op].input_sizes[src];
1188
1189 return (instr->dest.write_mask >> channel) & 1;
1190 }
1191
1192 static inline nir_component_mask_t
1193 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1194 {
1195 nir_component_mask_t read_mask = 0;
1196 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1197 if (!nir_alu_instr_channel_used(instr, src, c))
1198 continue;
1199
1200 read_mask |= (1 << instr->src[src].swizzle[c]);
1201 }
1202 return read_mask;
1203 }
1204
1205 /**
1206 * Get the number of channels used for a source
1207 */
1208 static inline unsigned
1209 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1210 {
1211 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1212 return nir_op_infos[instr->op].input_sizes[src];
1213
1214 return nir_dest_num_components(instr->dest.dest);
1215 }
1216
1217 static inline bool
1218 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1219 {
1220 switch (instr->op) {
1221 case nir_op_flt:
1222 case nir_op_fge:
1223 case nir_op_feq:
1224 case nir_op_fne:
1225 case nir_op_ilt:
1226 case nir_op_ult:
1227 case nir_op_ige:
1228 case nir_op_uge:
1229 case nir_op_ieq:
1230 case nir_op_ine:
1231 case nir_op_i2b1:
1232 case nir_op_f2b1:
1233 case nir_op_inot:
1234 return true;
1235 default:
1236 return false;
1237 }
1238 }
1239
1240 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1241 nir_alu_type full_type);
1242
1243 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1244 unsigned src1, unsigned src2);
1245
1246 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1247 const nir_alu_instr *alu2,
1248 unsigned src1, unsigned src2);
1249
1250 typedef enum {
1251 nir_deref_type_var,
1252 nir_deref_type_array,
1253 nir_deref_type_array_wildcard,
1254 nir_deref_type_ptr_as_array,
1255 nir_deref_type_struct,
1256 nir_deref_type_cast,
1257 } nir_deref_type;
1258
1259 typedef struct {
1260 nir_instr instr;
1261
1262 /** The type of this deref instruction */
1263 nir_deref_type deref_type;
1264
1265 /** The mode of the underlying variable */
1266 nir_variable_mode mode;
1267
1268 /** The dereferenced type of the resulting pointer value */
1269 const struct glsl_type *type;
1270
1271 union {
1272 /** Variable being dereferenced if deref_type is a deref_var */
1273 nir_variable *var;
1274
1275 /** Parent deref if deref_type is not deref_var */
1276 nir_src parent;
1277 };
1278
1279 /** Additional deref parameters */
1280 union {
1281 struct {
1282 nir_src index;
1283 } arr;
1284
1285 struct {
1286 unsigned index;
1287 } strct;
1288
1289 struct {
1290 unsigned ptr_stride;
1291 } cast;
1292 };
1293
1294 /** Destination to store the resulting "pointer" */
1295 nir_dest dest;
1296 } nir_deref_instr;
1297
1298 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1299
1300 static inline nir_deref_instr *
1301 nir_deref_instr_parent(const nir_deref_instr *instr)
1302 {
1303 if (instr->deref_type == nir_deref_type_var)
1304 return NULL;
1305 else
1306 return nir_src_as_deref(instr->parent);
1307 }
1308
1309 static inline nir_variable *
1310 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1311 {
1312 while (instr->deref_type != nir_deref_type_var) {
1313 if (instr->deref_type == nir_deref_type_cast)
1314 return NULL;
1315
1316 instr = nir_deref_instr_parent(instr);
1317 }
1318
1319 return instr->var;
1320 }
1321
1322 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1323 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1324 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1325
1326 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1327
1328 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1329
1330 typedef struct {
1331 nir_instr instr;
1332
1333 struct nir_function *callee;
1334
1335 unsigned num_params;
1336 nir_src params[];
1337 } nir_call_instr;
1338
1339 #include "nir_intrinsics.h"
1340
1341 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1342
1343 /** Represents an intrinsic
1344 *
1345 * An intrinsic is an instruction type for handling things that are
1346 * more-or-less regular operations but don't just consume and produce SSA
1347 * values like ALU operations do. Intrinsics are not for things that have
1348 * special semantic meaning such as phi nodes and parallel copies.
1349 * Examples of intrinsics include variable load/store operations, system
1350 * value loads, and the like. Even though texturing more-or-less falls
1351 * under this category, texturing is its own instruction type because
1352 * trying to represent texturing with intrinsics would lead to a
1353 * combinatorial explosion of intrinsic opcodes.
1354 *
1355 * By having a single instruction type for handling a lot of different
1356 * cases, optimization passes can look for intrinsics and, for the most
1357 * part, completely ignore them. Each intrinsic type also has a few
1358 * possible flags that govern whether or not they can be reordered or
1359 * eliminated. That way passes like dead code elimination can still work
1360 * on intrisics without understanding the meaning of each.
1361 *
1362 * Each intrinsic has some number of constant indices, some number of
1363 * variables, and some number of sources. What these sources, variables,
1364 * and indices mean depends on the intrinsic and is documented with the
1365 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1366 * instructions are the only types of instruction that can operate on
1367 * variables.
1368 */
1369 typedef struct {
1370 nir_instr instr;
1371
1372 nir_intrinsic_op intrinsic;
1373
1374 nir_dest dest;
1375
1376 /** number of components if this is a vectorized intrinsic
1377 *
1378 * Similarly to ALU operations, some intrinsics are vectorized.
1379 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1380 * For vectorized intrinsics, the num_components field specifies the
1381 * number of destination components and the number of source components
1382 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1383 */
1384 uint8_t num_components;
1385
1386 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1387
1388 nir_src src[];
1389 } nir_intrinsic_instr;
1390
1391 static inline nir_variable *
1392 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1393 {
1394 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1395 }
1396
1397 typedef enum {
1398 /* Memory ordering. */
1399 NIR_MEMORY_ACQUIRE = 1 << 0,
1400 NIR_MEMORY_RELEASE = 1 << 1,
1401
1402 /* Memory visibility operations. */
1403 NIR_MEMORY_MAKE_AVAILABLE = 1 << 3,
1404 NIR_MEMORY_MAKE_VISIBLE = 1 << 4,
1405 } nir_memory_semantics;
1406
1407 typedef enum {
1408 NIR_SCOPE_DEVICE,
1409 NIR_SCOPE_QUEUE_FAMILY,
1410 NIR_SCOPE_WORKGROUP,
1411 NIR_SCOPE_SUBGROUP,
1412 NIR_SCOPE_INVOCATION,
1413 } nir_scope;
1414
1415 /**
1416 * \name NIR intrinsics semantic flags
1417 *
1418 * information about what the compiler can do with the intrinsics.
1419 *
1420 * \sa nir_intrinsic_info::flags
1421 */
1422 typedef enum {
1423 /**
1424 * whether the intrinsic can be safely eliminated if none of its output
1425 * value is not being used.
1426 */
1427 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1428
1429 /**
1430 * Whether the intrinsic can be reordered with respect to any other
1431 * intrinsic, i.e. whether the only reordering dependencies of the
1432 * intrinsic are due to the register reads/writes.
1433 */
1434 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1435 } nir_intrinsic_semantic_flag;
1436
1437 /**
1438 * \name NIR intrinsics const-index flag
1439 *
1440 * Indicates the usage of a const_index slot.
1441 *
1442 * \sa nir_intrinsic_info::index_map
1443 */
1444 typedef enum {
1445 /**
1446 * Generally instructions that take a offset src argument, can encode
1447 * a constant 'base' value which is added to the offset.
1448 */
1449 NIR_INTRINSIC_BASE = 1,
1450
1451 /**
1452 * For store instructions, a writemask for the store.
1453 */
1454 NIR_INTRINSIC_WRMASK,
1455
1456 /**
1457 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1458 */
1459 NIR_INTRINSIC_STREAM_ID,
1460
1461 /**
1462 * The clip-plane id for load_user_clip_plane intrinsic.
1463 */
1464 NIR_INTRINSIC_UCP_ID,
1465
1466 /**
1467 * The amount of data, starting from BASE, that this instruction may
1468 * access. This is used to provide bounds if the offset is not constant.
1469 */
1470 NIR_INTRINSIC_RANGE,
1471
1472 /**
1473 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1474 */
1475 NIR_INTRINSIC_DESC_SET,
1476
1477 /**
1478 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1479 */
1480 NIR_INTRINSIC_BINDING,
1481
1482 /**
1483 * Component offset.
1484 */
1485 NIR_INTRINSIC_COMPONENT,
1486
1487 /**
1488 * Interpolation mode (only meaningful for FS inputs).
1489 */
1490 NIR_INTRINSIC_INTERP_MODE,
1491
1492 /**
1493 * A binary nir_op to use when performing a reduction or scan operation
1494 */
1495 NIR_INTRINSIC_REDUCTION_OP,
1496
1497 /**
1498 * Cluster size for reduction operations
1499 */
1500 NIR_INTRINSIC_CLUSTER_SIZE,
1501
1502 /**
1503 * Parameter index for a load_param intrinsic
1504 */
1505 NIR_INTRINSIC_PARAM_IDX,
1506
1507 /**
1508 * Image dimensionality for image intrinsics
1509 *
1510 * One of GLSL_SAMPLER_DIM_*
1511 */
1512 NIR_INTRINSIC_IMAGE_DIM,
1513
1514 /**
1515 * Non-zero if we are accessing an array image
1516 */
1517 NIR_INTRINSIC_IMAGE_ARRAY,
1518
1519 /**
1520 * Image format for image intrinsics
1521 */
1522 NIR_INTRINSIC_FORMAT,
1523
1524 /**
1525 * Access qualifiers for image and memory access intrinsics
1526 */
1527 NIR_INTRINSIC_ACCESS,
1528
1529 /**
1530 * Alignment for offsets and addresses
1531 *
1532 * These two parameters, specify an alignment in terms of a multiplier and
1533 * an offset. The offset or address parameter X of the intrinsic is
1534 * guaranteed to satisfy the following:
1535 *
1536 * (X - align_offset) % align_mul == 0
1537 */
1538 NIR_INTRINSIC_ALIGN_MUL,
1539 NIR_INTRINSIC_ALIGN_OFFSET,
1540
1541 /**
1542 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1543 */
1544 NIR_INTRINSIC_DESC_TYPE,
1545
1546 /**
1547 * The nir_alu_type of a uniform/input/output
1548 */
1549 NIR_INTRINSIC_TYPE,
1550
1551 /**
1552 * The swizzle mask for the instructions
1553 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1554 */
1555 NIR_INTRINSIC_SWIZZLE_MASK,
1556
1557 /* Separate source/dest access flags for copies */
1558 NIR_INTRINSIC_SRC_ACCESS,
1559 NIR_INTRINSIC_DST_ACCESS,
1560
1561 /* Driver location for nir_load_patch_location_ir3 */
1562 NIR_INTRINSIC_DRIVER_LOCATION,
1563
1564 /**
1565 * Mask of nir_memory_semantics, includes ordering and visibility.
1566 */
1567 NIR_INTRINSIC_MEMORY_SEMANTICS,
1568
1569 /**
1570 * Mask of nir_variable_modes affected by the memory operation.
1571 */
1572 NIR_INTRINSIC_MEMORY_MODES,
1573
1574 /**
1575 * Value of nir_scope.
1576 */
1577 NIR_INTRINSIC_MEMORY_SCOPE,
1578
1579 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1580
1581 } nir_intrinsic_index_flag;
1582
1583 #define NIR_INTRINSIC_MAX_INPUTS 5
1584
1585 typedef struct {
1586 const char *name;
1587
1588 unsigned num_srcs; /** < number of register/SSA inputs */
1589
1590 /** number of components of each input register
1591 *
1592 * If this value is 0, the number of components is given by the
1593 * num_components field of nir_intrinsic_instr. If this value is -1, the
1594 * intrinsic consumes however many components are provided and it is not
1595 * validated at all.
1596 */
1597 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1598
1599 bool has_dest;
1600
1601 /** number of components of the output register
1602 *
1603 * If this value is 0, the number of components is given by the
1604 * num_components field of nir_intrinsic_instr.
1605 */
1606 unsigned dest_components;
1607
1608 /** bitfield of legal bit sizes */
1609 unsigned dest_bit_sizes;
1610
1611 /** the number of constant indices used by the intrinsic */
1612 unsigned num_indices;
1613
1614 /** indicates the usage of intr->const_index[n] */
1615 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1616
1617 /** semantic flags for calls to this intrinsic */
1618 nir_intrinsic_semantic_flag flags;
1619 } nir_intrinsic_info;
1620
1621 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1622
1623 static inline unsigned
1624 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1625 {
1626 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1627 assert(srcn < info->num_srcs);
1628 if (info->src_components[srcn] > 0)
1629 return info->src_components[srcn];
1630 else if (info->src_components[srcn] == 0)
1631 return intr->num_components;
1632 else
1633 return nir_src_num_components(intr->src[srcn]);
1634 }
1635
1636 static inline unsigned
1637 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1638 {
1639 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1640 if (!info->has_dest)
1641 return 0;
1642 else if (info->dest_components)
1643 return info->dest_components;
1644 else
1645 return intr->num_components;
1646 }
1647
1648 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1649 static inline type \
1650 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1651 { \
1652 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1653 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1654 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1655 } \
1656 static inline void \
1657 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1658 { \
1659 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1660 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1661 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1662 }
1663
1664 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1665 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1666 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1667 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1668 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1669 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1670 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1671 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1672 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1673 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1674 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1675 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1676 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1677 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1678 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1679 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1680 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1681 INTRINSIC_IDX_ACCESSORS(format, FORMAT, unsigned)
1682 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1683 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1684 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1685 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1686 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1687 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1688 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1689 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1690 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1691
1692 static inline void
1693 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1694 unsigned align_mul, unsigned align_offset)
1695 {
1696 assert(util_is_power_of_two_nonzero(align_mul));
1697 assert(align_offset < align_mul);
1698 nir_intrinsic_set_align_mul(intrin, align_mul);
1699 nir_intrinsic_set_align_offset(intrin, align_offset);
1700 }
1701
1702 /** Returns a simple alignment for a load/store intrinsic offset
1703 *
1704 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1705 * and ALIGN_OFFSET parameters, this helper takes both into account and
1706 * provides a single simple alignment parameter. The offset X is guaranteed
1707 * to satisfy X % align == 0.
1708 */
1709 static inline unsigned
1710 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1711 {
1712 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1713 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1714 assert(align_offset < align_mul);
1715 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1716 }
1717
1718 /* Converts a image_deref_* intrinsic into a image_* one */
1719 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1720 nir_ssa_def *handle, bool bindless);
1721
1722 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1723 static inline bool
1724 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1725 {
1726 if (instr->intrinsic == nir_intrinsic_load_deref ||
1727 instr->intrinsic == nir_intrinsic_load_ssbo ||
1728 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1729 instr->intrinsic == nir_intrinsic_image_deref_load ||
1730 instr->intrinsic == nir_intrinsic_image_load) {
1731 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1732 } else {
1733 const nir_intrinsic_info *info =
1734 &nir_intrinsic_infos[instr->intrinsic];
1735 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1736 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1737 }
1738 }
1739
1740 /**
1741 * \group texture information
1742 *
1743 * This gives semantic information about textures which is useful to the
1744 * frontend, the backend, and lowering passes, but not the optimizer.
1745 */
1746
1747 typedef enum {
1748 nir_tex_src_coord,
1749 nir_tex_src_projector,
1750 nir_tex_src_comparator, /* shadow comparator */
1751 nir_tex_src_offset,
1752 nir_tex_src_bias,
1753 nir_tex_src_lod,
1754 nir_tex_src_min_lod,
1755 nir_tex_src_ms_index, /* MSAA sample index */
1756 nir_tex_src_ms_mcs, /* MSAA compression value */
1757 nir_tex_src_ddx,
1758 nir_tex_src_ddy,
1759 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1760 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1761 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1762 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1763 nir_tex_src_texture_handle, /* < bindless texture handle */
1764 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1765 nir_tex_src_plane, /* < selects plane for planar textures */
1766 nir_num_tex_src_types
1767 } nir_tex_src_type;
1768
1769 typedef struct {
1770 nir_src src;
1771 nir_tex_src_type src_type;
1772 } nir_tex_src;
1773
1774 typedef enum {
1775 nir_texop_tex, /**< Regular texture look-up */
1776 nir_texop_txb, /**< Texture look-up with LOD bias */
1777 nir_texop_txl, /**< Texture look-up with explicit LOD */
1778 nir_texop_txd, /**< Texture look-up with partial derivatives */
1779 nir_texop_txf, /**< Texel fetch with explicit LOD */
1780 nir_texop_txf_ms, /**< Multisample texture fetch */
1781 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1782 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1783 nir_texop_txs, /**< Texture size */
1784 nir_texop_lod, /**< Texture lod query */
1785 nir_texop_tg4, /**< Texture gather */
1786 nir_texop_query_levels, /**< Texture levels query */
1787 nir_texop_texture_samples, /**< Texture samples query */
1788 nir_texop_samples_identical, /**< Query whether all samples are definitely
1789 * identical.
1790 */
1791 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1792 } nir_texop;
1793
1794 typedef struct {
1795 nir_instr instr;
1796
1797 enum glsl_sampler_dim sampler_dim;
1798 nir_alu_type dest_type;
1799
1800 nir_texop op;
1801 nir_dest dest;
1802 nir_tex_src *src;
1803 unsigned num_srcs, coord_components;
1804 bool is_array, is_shadow;
1805
1806 /**
1807 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1808 * components or the new-style shadow that outputs 1 component.
1809 */
1810 bool is_new_style_shadow;
1811
1812 /* gather component selector */
1813 unsigned component : 2;
1814
1815 /* gather offsets */
1816 int8_t tg4_offsets[4][2];
1817
1818 /* True if the texture index or handle is not dynamically uniform */
1819 bool texture_non_uniform;
1820
1821 /* True if the sampler index or handle is not dynamically uniform */
1822 bool sampler_non_uniform;
1823
1824 /** The texture index
1825 *
1826 * If this texture instruction has a nir_tex_src_texture_offset source,
1827 * then the texture index is given by texture_index + texture_offset.
1828 */
1829 unsigned texture_index;
1830
1831 /** The size of the texture array or 0 if it's not an array */
1832 unsigned texture_array_size;
1833
1834 /** The sampler index
1835 *
1836 * The following operations do not require a sampler and, as such, this
1837 * field should be ignored:
1838 * - nir_texop_txf
1839 * - nir_texop_txf_ms
1840 * - nir_texop_txs
1841 * - nir_texop_lod
1842 * - nir_texop_query_levels
1843 * - nir_texop_texture_samples
1844 * - nir_texop_samples_identical
1845 *
1846 * If this texture instruction has a nir_tex_src_sampler_offset source,
1847 * then the sampler index is given by sampler_index + sampler_offset.
1848 */
1849 unsigned sampler_index;
1850 } nir_tex_instr;
1851
1852 static inline unsigned
1853 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1854 {
1855 switch (instr->op) {
1856 case nir_texop_txs: {
1857 unsigned ret;
1858 switch (instr->sampler_dim) {
1859 case GLSL_SAMPLER_DIM_1D:
1860 case GLSL_SAMPLER_DIM_BUF:
1861 ret = 1;
1862 break;
1863 case GLSL_SAMPLER_DIM_2D:
1864 case GLSL_SAMPLER_DIM_CUBE:
1865 case GLSL_SAMPLER_DIM_MS:
1866 case GLSL_SAMPLER_DIM_RECT:
1867 case GLSL_SAMPLER_DIM_EXTERNAL:
1868 case GLSL_SAMPLER_DIM_SUBPASS:
1869 ret = 2;
1870 break;
1871 case GLSL_SAMPLER_DIM_3D:
1872 ret = 3;
1873 break;
1874 default:
1875 unreachable("not reached");
1876 }
1877 if (instr->is_array)
1878 ret++;
1879 return ret;
1880 }
1881
1882 case nir_texop_lod:
1883 return 2;
1884
1885 case nir_texop_texture_samples:
1886 case nir_texop_query_levels:
1887 case nir_texop_samples_identical:
1888 return 1;
1889
1890 default:
1891 if (instr->is_shadow && instr->is_new_style_shadow)
1892 return 1;
1893
1894 return 4;
1895 }
1896 }
1897
1898 /* Returns true if this texture operation queries something about the texture
1899 * rather than actually sampling it.
1900 */
1901 static inline bool
1902 nir_tex_instr_is_query(const nir_tex_instr *instr)
1903 {
1904 switch (instr->op) {
1905 case nir_texop_txs:
1906 case nir_texop_lod:
1907 case nir_texop_texture_samples:
1908 case nir_texop_query_levels:
1909 case nir_texop_txf_ms_mcs:
1910 return true;
1911 case nir_texop_tex:
1912 case nir_texop_txb:
1913 case nir_texop_txl:
1914 case nir_texop_txd:
1915 case nir_texop_txf:
1916 case nir_texop_txf_ms:
1917 case nir_texop_txf_ms_fb:
1918 case nir_texop_tg4:
1919 return false;
1920 default:
1921 unreachable("Invalid texture opcode");
1922 }
1923 }
1924
1925 static inline bool
1926 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1927 {
1928 switch (instr->op) {
1929 case nir_texop_tex:
1930 case nir_texop_txb:
1931 case nir_texop_lod:
1932 return true;
1933 default:
1934 return false;
1935 }
1936 }
1937
1938 static inline nir_alu_type
1939 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1940 {
1941 switch (instr->src[src].src_type) {
1942 case nir_tex_src_coord:
1943 switch (instr->op) {
1944 case nir_texop_txf:
1945 case nir_texop_txf_ms:
1946 case nir_texop_txf_ms_fb:
1947 case nir_texop_txf_ms_mcs:
1948 case nir_texop_samples_identical:
1949 return nir_type_int;
1950
1951 default:
1952 return nir_type_float;
1953 }
1954
1955 case nir_tex_src_lod:
1956 switch (instr->op) {
1957 case nir_texop_txs:
1958 case nir_texop_txf:
1959 return nir_type_int;
1960
1961 default:
1962 return nir_type_float;
1963 }
1964
1965 case nir_tex_src_projector:
1966 case nir_tex_src_comparator:
1967 case nir_tex_src_bias:
1968 case nir_tex_src_min_lod:
1969 case nir_tex_src_ddx:
1970 case nir_tex_src_ddy:
1971 return nir_type_float;
1972
1973 case nir_tex_src_offset:
1974 case nir_tex_src_ms_index:
1975 case nir_tex_src_plane:
1976 return nir_type_int;
1977
1978 case nir_tex_src_ms_mcs:
1979 case nir_tex_src_texture_deref:
1980 case nir_tex_src_sampler_deref:
1981 case nir_tex_src_texture_offset:
1982 case nir_tex_src_sampler_offset:
1983 case nir_tex_src_texture_handle:
1984 case nir_tex_src_sampler_handle:
1985 return nir_type_uint;
1986
1987 case nir_num_tex_src_types:
1988 unreachable("nir_num_tex_src_types is not a valid source type");
1989 }
1990
1991 unreachable("Invalid texture source type");
1992 }
1993
1994 static inline unsigned
1995 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
1996 {
1997 if (instr->src[src].src_type == nir_tex_src_coord)
1998 return instr->coord_components;
1999
2000 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2001 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2002 return 4;
2003
2004 if (instr->src[src].src_type == nir_tex_src_ddx ||
2005 instr->src[src].src_type == nir_tex_src_ddy) {
2006 if (instr->is_array)
2007 return instr->coord_components - 1;
2008 else
2009 return instr->coord_components;
2010 }
2011
2012 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2013 * the offset, since a cube maps to a single face.
2014 */
2015 if (instr->src[src].src_type == nir_tex_src_offset) {
2016 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2017 return 2;
2018 else if (instr->is_array)
2019 return instr->coord_components - 1;
2020 else
2021 return instr->coord_components;
2022 }
2023
2024 return 1;
2025 }
2026
2027 static inline int
2028 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2029 {
2030 for (unsigned i = 0; i < instr->num_srcs; i++)
2031 if (instr->src[i].src_type == type)
2032 return (int) i;
2033
2034 return -1;
2035 }
2036
2037 void nir_tex_instr_add_src(nir_tex_instr *tex,
2038 nir_tex_src_type src_type,
2039 nir_src src);
2040
2041 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2042
2043 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2044
2045 typedef struct {
2046 nir_instr instr;
2047
2048 nir_ssa_def def;
2049
2050 nir_const_value value[];
2051 } nir_load_const_instr;
2052
2053 typedef enum {
2054 nir_jump_return,
2055 nir_jump_break,
2056 nir_jump_continue,
2057 } nir_jump_type;
2058
2059 typedef struct {
2060 nir_instr instr;
2061 nir_jump_type type;
2062 } nir_jump_instr;
2063
2064 /* creates a new SSA variable in an undefined state */
2065
2066 typedef struct {
2067 nir_instr instr;
2068 nir_ssa_def def;
2069 } nir_ssa_undef_instr;
2070
2071 typedef struct {
2072 struct exec_node node;
2073
2074 /* The predecessor block corresponding to this source */
2075 struct nir_block *pred;
2076
2077 nir_src src;
2078 } nir_phi_src;
2079
2080 #define nir_foreach_phi_src(phi_src, phi) \
2081 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2082 #define nir_foreach_phi_src_safe(phi_src, phi) \
2083 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2084
2085 typedef struct {
2086 nir_instr instr;
2087
2088 struct exec_list srcs; /** < list of nir_phi_src */
2089
2090 nir_dest dest;
2091 } nir_phi_instr;
2092
2093 typedef struct {
2094 struct exec_node node;
2095 nir_src src;
2096 nir_dest dest;
2097 } nir_parallel_copy_entry;
2098
2099 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2100 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2101
2102 typedef struct {
2103 nir_instr instr;
2104
2105 /* A list of nir_parallel_copy_entrys. The sources of all of the
2106 * entries are copied to the corresponding destinations "in parallel".
2107 * In other words, if we have two entries: a -> b and b -> a, the values
2108 * get swapped.
2109 */
2110 struct exec_list entries;
2111 } nir_parallel_copy_instr;
2112
2113 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2114 type, nir_instr_type_alu)
2115 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2116 type, nir_instr_type_deref)
2117 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2118 type, nir_instr_type_call)
2119 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2120 type, nir_instr_type_jump)
2121 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2122 type, nir_instr_type_tex)
2123 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2124 type, nir_instr_type_intrinsic)
2125 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2126 type, nir_instr_type_load_const)
2127 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2128 type, nir_instr_type_ssa_undef)
2129 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2130 type, nir_instr_type_phi)
2131 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2132 nir_parallel_copy_instr, instr,
2133 type, nir_instr_type_parallel_copy)
2134
2135
2136 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2137 static inline type \
2138 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2139 { \
2140 assert(nir_src_is_const(src)); \
2141 nir_load_const_instr *load = \
2142 nir_instr_as_load_const(src.ssa->parent_instr); \
2143 assert(comp < load->def.num_components); \
2144 return nir_const_value_as_##suffix(load->value[comp], \
2145 load->def.bit_size); \
2146 } \
2147 \
2148 static inline type \
2149 nir_src_as_##suffix(nir_src src) \
2150 { \
2151 assert(nir_src_num_components(src) == 1); \
2152 return nir_src_comp_as_##suffix(src, 0); \
2153 }
2154
2155 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2156 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2157 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2158 NIR_DEFINE_SRC_AS_CONST(double, float)
2159
2160 #undef NIR_DEFINE_SRC_AS_CONST
2161
2162
2163 typedef struct {
2164 nir_ssa_def *def;
2165 unsigned comp;
2166 } nir_ssa_scalar;
2167
2168 static inline bool
2169 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2170 {
2171 return s.def->parent_instr->type == nir_instr_type_load_const;
2172 }
2173
2174 static inline nir_const_value
2175 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2176 {
2177 assert(s.comp < s.def->num_components);
2178 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2179 return load->value[s.comp];
2180 }
2181
2182 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2183 static inline type \
2184 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2185 { \
2186 return nir_const_value_as_##suffix( \
2187 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2188 }
2189
2190 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2191 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2192 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2193 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2194
2195 #undef NIR_DEFINE_SCALAR_AS_CONST
2196
2197 static inline bool
2198 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2199 {
2200 return s.def->parent_instr->type == nir_instr_type_alu;
2201 }
2202
2203 static inline nir_op
2204 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2205 {
2206 return nir_instr_as_alu(s.def->parent_instr)->op;
2207 }
2208
2209 static inline nir_ssa_scalar
2210 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2211 {
2212 nir_ssa_scalar out = { NULL, 0 };
2213
2214 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2215 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2216
2217 /* Our component must be written */
2218 assert(s.comp < s.def->num_components);
2219 assert(alu->dest.write_mask & (1u << s.comp));
2220
2221 assert(alu->src[alu_src_idx].src.is_ssa);
2222 out.def = alu->src[alu_src_idx].src.ssa;
2223
2224 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2225 /* The ALU src is unsized so the source component follows the
2226 * destination component.
2227 */
2228 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2229 } else {
2230 /* This is a sized source so all source components work together to
2231 * produce all the destination components. Since we need to return a
2232 * scalar, this only works if the source is a scalar.
2233 */
2234 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2235 out.comp = alu->src[alu_src_idx].swizzle[0];
2236 }
2237 assert(out.comp < out.def->num_components);
2238
2239 return out;
2240 }
2241
2242
2243 /*
2244 * Control flow
2245 *
2246 * Control flow consists of a tree of control flow nodes, which include
2247 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2248 * instructions that always run start-to-finish. Each basic block also keeps
2249 * track of its successors (blocks which may run immediately after the current
2250 * block) and predecessors (blocks which could have run immediately before the
2251 * current block). Each function also has a start block and an end block which
2252 * all return statements point to (which is always empty). Together, all the
2253 * blocks with their predecessors and successors make up the control flow
2254 * graph (CFG) of the function. There are helpers that modify the tree of
2255 * control flow nodes while modifying the CFG appropriately; these should be
2256 * used instead of modifying the tree directly.
2257 */
2258
2259 typedef enum {
2260 nir_cf_node_block,
2261 nir_cf_node_if,
2262 nir_cf_node_loop,
2263 nir_cf_node_function
2264 } nir_cf_node_type;
2265
2266 typedef struct nir_cf_node {
2267 struct exec_node node;
2268 nir_cf_node_type type;
2269 struct nir_cf_node *parent;
2270 } nir_cf_node;
2271
2272 typedef struct nir_block {
2273 nir_cf_node cf_node;
2274
2275 struct exec_list instr_list; /** < list of nir_instr */
2276
2277 /** generic block index; generated by nir_index_blocks */
2278 unsigned index;
2279
2280 /*
2281 * Each block can only have up to 2 successors, so we put them in a simple
2282 * array - no need for anything more complicated.
2283 */
2284 struct nir_block *successors[2];
2285
2286 /* Set of nir_block predecessors in the CFG */
2287 struct set *predecessors;
2288
2289 /*
2290 * this node's immediate dominator in the dominance tree - set to NULL for
2291 * the start block.
2292 */
2293 struct nir_block *imm_dom;
2294
2295 /* This node's children in the dominance tree */
2296 unsigned num_dom_children;
2297 struct nir_block **dom_children;
2298
2299 /* Set of nir_blocks on the dominance frontier of this block */
2300 struct set *dom_frontier;
2301
2302 /*
2303 * These two indices have the property that dom_{pre,post}_index for each
2304 * child of this block in the dominance tree will always be between
2305 * dom_pre_index and dom_post_index for this block, which makes testing if
2306 * a given block is dominated by another block an O(1) operation.
2307 */
2308 unsigned dom_pre_index, dom_post_index;
2309
2310 /* live in and out for this block; used for liveness analysis */
2311 BITSET_WORD *live_in;
2312 BITSET_WORD *live_out;
2313 } nir_block;
2314
2315 static inline nir_instr *
2316 nir_block_first_instr(nir_block *block)
2317 {
2318 struct exec_node *head = exec_list_get_head(&block->instr_list);
2319 return exec_node_data(nir_instr, head, node);
2320 }
2321
2322 static inline nir_instr *
2323 nir_block_last_instr(nir_block *block)
2324 {
2325 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2326 return exec_node_data(nir_instr, tail, node);
2327 }
2328
2329 static inline bool
2330 nir_block_ends_in_jump(nir_block *block)
2331 {
2332 return !exec_list_is_empty(&block->instr_list) &&
2333 nir_block_last_instr(block)->type == nir_instr_type_jump;
2334 }
2335
2336 #define nir_foreach_instr(instr, block) \
2337 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2338 #define nir_foreach_instr_reverse(instr, block) \
2339 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2340 #define nir_foreach_instr_safe(instr, block) \
2341 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2342 #define nir_foreach_instr_reverse_safe(instr, block) \
2343 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2344
2345 typedef enum {
2346 nir_selection_control_none = 0x0,
2347 nir_selection_control_flatten = 0x1,
2348 nir_selection_control_dont_flatten = 0x2,
2349 } nir_selection_control;
2350
2351 typedef struct nir_if {
2352 nir_cf_node cf_node;
2353 nir_src condition;
2354 nir_selection_control control;
2355
2356 struct exec_list then_list; /** < list of nir_cf_node */
2357 struct exec_list else_list; /** < list of nir_cf_node */
2358 } nir_if;
2359
2360 typedef struct {
2361 nir_if *nif;
2362
2363 /** Instruction that generates nif::condition. */
2364 nir_instr *conditional_instr;
2365
2366 /** Block within ::nif that has the break instruction. */
2367 nir_block *break_block;
2368
2369 /** Last block for the then- or else-path that does not contain the break. */
2370 nir_block *continue_from_block;
2371
2372 /** True when ::break_block is in the else-path of ::nif. */
2373 bool continue_from_then;
2374 bool induction_rhs;
2375
2376 /* This is true if the terminators exact trip count is unknown. For
2377 * example:
2378 *
2379 * for (int i = 0; i < imin(x, 4); i++)
2380 * ...
2381 *
2382 * Here loop analysis would have set a max_trip_count of 4 however we dont
2383 * know for sure that this is the exact trip count.
2384 */
2385 bool exact_trip_count_unknown;
2386
2387 struct list_head loop_terminator_link;
2388 } nir_loop_terminator;
2389
2390 typedef struct {
2391 /* Estimated cost (in number of instructions) of the loop */
2392 unsigned instr_cost;
2393
2394 /* Guessed trip count based on array indexing */
2395 unsigned guessed_trip_count;
2396
2397 /* Maximum number of times the loop is run (if known) */
2398 unsigned max_trip_count;
2399
2400 /* Do we know the exact number of times the loop will be run */
2401 bool exact_trip_count_known;
2402
2403 /* Unroll the loop regardless of its size */
2404 bool force_unroll;
2405
2406 /* Does the loop contain complex loop terminators, continues or other
2407 * complex behaviours? If this is true we can't rely on
2408 * loop_terminator_list to be complete or accurate.
2409 */
2410 bool complex_loop;
2411
2412 nir_loop_terminator *limiting_terminator;
2413
2414 /* A list of loop_terminators terminating this loop. */
2415 struct list_head loop_terminator_list;
2416 } nir_loop_info;
2417
2418 typedef enum {
2419 nir_loop_control_none = 0x0,
2420 nir_loop_control_unroll = 0x1,
2421 nir_loop_control_dont_unroll = 0x2,
2422 } nir_loop_control;
2423
2424 typedef struct {
2425 nir_cf_node cf_node;
2426
2427 struct exec_list body; /** < list of nir_cf_node */
2428
2429 nir_loop_info *info;
2430 nir_loop_control control;
2431 bool partially_unrolled;
2432 } nir_loop;
2433
2434 /**
2435 * Various bits of metadata that can may be created or required by
2436 * optimization and analysis passes
2437 */
2438 typedef enum {
2439 nir_metadata_none = 0x0,
2440 nir_metadata_block_index = 0x1,
2441 nir_metadata_dominance = 0x2,
2442 nir_metadata_live_ssa_defs = 0x4,
2443 nir_metadata_not_properly_reset = 0x8,
2444 nir_metadata_loop_analysis = 0x10,
2445 } nir_metadata;
2446
2447 typedef struct {
2448 nir_cf_node cf_node;
2449
2450 /** pointer to the function of which this is an implementation */
2451 struct nir_function *function;
2452
2453 struct exec_list body; /** < list of nir_cf_node */
2454
2455 nir_block *end_block;
2456
2457 /** list for all local variables in the function */
2458 struct exec_list locals;
2459
2460 /** list of local registers in the function */
2461 struct exec_list registers;
2462
2463 /** next available local register index */
2464 unsigned reg_alloc;
2465
2466 /** next available SSA value index */
2467 unsigned ssa_alloc;
2468
2469 /* total number of basic blocks, only valid when block_index_dirty = false */
2470 unsigned num_blocks;
2471
2472 nir_metadata valid_metadata;
2473 } nir_function_impl;
2474
2475 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2476 nir_start_block(nir_function_impl *impl)
2477 {
2478 return (nir_block *) impl->body.head_sentinel.next;
2479 }
2480
2481 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2482 nir_impl_last_block(nir_function_impl *impl)
2483 {
2484 return (nir_block *) impl->body.tail_sentinel.prev;
2485 }
2486
2487 static inline nir_cf_node *
2488 nir_cf_node_next(nir_cf_node *node)
2489 {
2490 struct exec_node *next = exec_node_get_next(&node->node);
2491 if (exec_node_is_tail_sentinel(next))
2492 return NULL;
2493 else
2494 return exec_node_data(nir_cf_node, next, node);
2495 }
2496
2497 static inline nir_cf_node *
2498 nir_cf_node_prev(nir_cf_node *node)
2499 {
2500 struct exec_node *prev = exec_node_get_prev(&node->node);
2501 if (exec_node_is_head_sentinel(prev))
2502 return NULL;
2503 else
2504 return exec_node_data(nir_cf_node, prev, node);
2505 }
2506
2507 static inline bool
2508 nir_cf_node_is_first(const nir_cf_node *node)
2509 {
2510 return exec_node_is_head_sentinel(node->node.prev);
2511 }
2512
2513 static inline bool
2514 nir_cf_node_is_last(const nir_cf_node *node)
2515 {
2516 return exec_node_is_tail_sentinel(node->node.next);
2517 }
2518
2519 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2520 type, nir_cf_node_block)
2521 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2522 type, nir_cf_node_if)
2523 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2524 type, nir_cf_node_loop)
2525 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2526 nir_function_impl, cf_node, type, nir_cf_node_function)
2527
2528 static inline nir_block *
2529 nir_if_first_then_block(nir_if *if_stmt)
2530 {
2531 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2532 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2533 }
2534
2535 static inline nir_block *
2536 nir_if_last_then_block(nir_if *if_stmt)
2537 {
2538 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2539 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2540 }
2541
2542 static inline nir_block *
2543 nir_if_first_else_block(nir_if *if_stmt)
2544 {
2545 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2546 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2547 }
2548
2549 static inline nir_block *
2550 nir_if_last_else_block(nir_if *if_stmt)
2551 {
2552 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2553 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2554 }
2555
2556 static inline nir_block *
2557 nir_loop_first_block(nir_loop *loop)
2558 {
2559 struct exec_node *head = exec_list_get_head(&loop->body);
2560 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2561 }
2562
2563 static inline nir_block *
2564 nir_loop_last_block(nir_loop *loop)
2565 {
2566 struct exec_node *tail = exec_list_get_tail(&loop->body);
2567 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2568 }
2569
2570 /**
2571 * Return true if this list of cf_nodes contains a single empty block.
2572 */
2573 static inline bool
2574 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2575 {
2576 if (exec_list_is_singular(cf_list)) {
2577 struct exec_node *head = exec_list_get_head(cf_list);
2578 nir_block *block =
2579 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2580 return exec_list_is_empty(&block->instr_list);
2581 }
2582 return false;
2583 }
2584
2585 typedef struct {
2586 uint8_t num_components;
2587 uint8_t bit_size;
2588 } nir_parameter;
2589
2590 typedef struct nir_function {
2591 struct exec_node node;
2592
2593 const char *name;
2594 struct nir_shader *shader;
2595
2596 unsigned num_params;
2597 nir_parameter *params;
2598
2599 /** The implementation of this function.
2600 *
2601 * If the function is only declared and not implemented, this is NULL.
2602 */
2603 nir_function_impl *impl;
2604
2605 bool is_entrypoint;
2606 } nir_function;
2607
2608 typedef enum {
2609 nir_lower_imul64 = (1 << 0),
2610 nir_lower_isign64 = (1 << 1),
2611 /** Lower all int64 modulus and division opcodes */
2612 nir_lower_divmod64 = (1 << 2),
2613 /** Lower all 64-bit umul_high and imul_high opcodes */
2614 nir_lower_imul_high64 = (1 << 3),
2615 nir_lower_mov64 = (1 << 4),
2616 nir_lower_icmp64 = (1 << 5),
2617 nir_lower_iadd64 = (1 << 6),
2618 nir_lower_iabs64 = (1 << 7),
2619 nir_lower_ineg64 = (1 << 8),
2620 nir_lower_logic64 = (1 << 9),
2621 nir_lower_minmax64 = (1 << 10),
2622 nir_lower_shift64 = (1 << 11),
2623 nir_lower_imul_2x32_64 = (1 << 12),
2624 nir_lower_extract64 = (1 << 13),
2625 nir_lower_ufind_msb64 = (1 << 14),
2626 } nir_lower_int64_options;
2627
2628 typedef enum {
2629 nir_lower_drcp = (1 << 0),
2630 nir_lower_dsqrt = (1 << 1),
2631 nir_lower_drsq = (1 << 2),
2632 nir_lower_dtrunc = (1 << 3),
2633 nir_lower_dfloor = (1 << 4),
2634 nir_lower_dceil = (1 << 5),
2635 nir_lower_dfract = (1 << 6),
2636 nir_lower_dround_even = (1 << 7),
2637 nir_lower_dmod = (1 << 8),
2638 nir_lower_dsub = (1 << 9),
2639 nir_lower_ddiv = (1 << 10),
2640 nir_lower_fp64_full_software = (1 << 11),
2641 } nir_lower_doubles_options;
2642
2643 typedef enum {
2644 nir_divergence_single_prim_per_subgroup = (1 << 0),
2645 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2646 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2647 nir_divergence_view_index_uniform = (1 << 3),
2648 } nir_divergence_options;
2649
2650 typedef struct nir_shader_compiler_options {
2651 bool lower_fdiv;
2652 bool lower_ffma;
2653 bool fuse_ffma;
2654 bool lower_flrp16;
2655 bool lower_flrp32;
2656 /** Lowers flrp when it does not support doubles */
2657 bool lower_flrp64;
2658 bool lower_fpow;
2659 bool lower_fsat;
2660 bool lower_fsqrt;
2661 bool lower_sincos;
2662 bool lower_fmod;
2663 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2664 bool lower_bitfield_extract;
2665 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2666 bool lower_bitfield_extract_to_shifts;
2667 /** Lowers bitfield_insert to bfi/bfm */
2668 bool lower_bitfield_insert;
2669 /** Lowers bitfield_insert to compares, and shifts. */
2670 bool lower_bitfield_insert_to_shifts;
2671 /** Lowers bitfield_insert to bfm/bitfield_select. */
2672 bool lower_bitfield_insert_to_bitfield_select;
2673 /** Lowers bitfield_reverse to shifts. */
2674 bool lower_bitfield_reverse;
2675 /** Lowers bit_count to shifts. */
2676 bool lower_bit_count;
2677 /** Lowers ifind_msb to compare and ufind_msb */
2678 bool lower_ifind_msb;
2679 /** Lowers find_lsb to ufind_msb and logic ops */
2680 bool lower_find_lsb;
2681 bool lower_uadd_carry;
2682 bool lower_usub_borrow;
2683 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2684 bool lower_mul_high;
2685 /** lowers fneg and ineg to fsub and isub. */
2686 bool lower_negate;
2687 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2688 bool lower_sub;
2689
2690 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2691 bool lower_scmp;
2692
2693 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2694 bool lower_vector_cmp;
2695
2696 /** enables rules to lower idiv by power-of-two: */
2697 bool lower_idiv;
2698
2699 /** enable rules to avoid bit ops */
2700 bool lower_bitops;
2701
2702 /** enables rules to lower isign to imin+imax */
2703 bool lower_isign;
2704
2705 /** enables rules to lower fsign to fsub and flt */
2706 bool lower_fsign;
2707
2708 /* lower fdph to fdot4 */
2709 bool lower_fdph;
2710
2711 /** lower fdot to fmul and fsum/fadd. */
2712 bool lower_fdot;
2713
2714 /* Does the native fdot instruction replicate its result for four
2715 * components? If so, then opt_algebraic_late will turn all fdotN
2716 * instructions into fdot_replicatedN instructions.
2717 */
2718 bool fdot_replicates;
2719
2720 /** lowers ffloor to fsub+ffract: */
2721 bool lower_ffloor;
2722
2723 /** lowers ffract to fsub+ffloor: */
2724 bool lower_ffract;
2725
2726 /** lowers fceil to fneg+ffloor+fneg: */
2727 bool lower_fceil;
2728
2729 bool lower_ftrunc;
2730
2731 bool lower_ldexp;
2732
2733 bool lower_pack_half_2x16;
2734 bool lower_pack_unorm_2x16;
2735 bool lower_pack_snorm_2x16;
2736 bool lower_pack_unorm_4x8;
2737 bool lower_pack_snorm_4x8;
2738 bool lower_unpack_half_2x16;
2739 bool lower_unpack_unorm_2x16;
2740 bool lower_unpack_snorm_2x16;
2741 bool lower_unpack_unorm_4x8;
2742 bool lower_unpack_snorm_4x8;
2743
2744 bool lower_extract_byte;
2745 bool lower_extract_word;
2746
2747 bool lower_all_io_to_temps;
2748 bool lower_all_io_to_elements;
2749
2750 /* Indicates that the driver only has zero-based vertex id */
2751 bool vertex_id_zero_based;
2752
2753 /**
2754 * If enabled, gl_BaseVertex will be lowered as:
2755 * is_indexed_draw (~0/0) & firstvertex
2756 */
2757 bool lower_base_vertex;
2758
2759 /**
2760 * If enabled, gl_HelperInvocation will be lowered as:
2761 *
2762 * !((1 << sample_id) & sample_mask_in))
2763 *
2764 * This depends on some possibly hw implementation details, which may
2765 * not be true for all hw. In particular that the FS is only executed
2766 * for covered samples or for helper invocations. So, do not blindly
2767 * enable this option.
2768 *
2769 * Note: See also issue #22 in ARB_shader_image_load_store
2770 */
2771 bool lower_helper_invocation;
2772
2773 /**
2774 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2775 *
2776 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2777 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2778 */
2779 bool optimize_sample_mask_in;
2780
2781 bool lower_cs_local_index_from_id;
2782 bool lower_cs_local_id_from_index;
2783
2784 bool lower_device_index_to_zero;
2785
2786 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2787 bool lower_wpos_pntc;
2788
2789 bool lower_hadd;
2790 bool lower_add_sat;
2791
2792 /**
2793 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2794 * for IO purposes and would prefer loads/stores be vectorized.
2795 */
2796 bool vectorize_io;
2797 bool lower_to_scalar;
2798
2799 /**
2800 * Should nir_lower_io() create load_interpolated_input intrinsics?
2801 *
2802 * If not, it generates regular load_input intrinsics and interpolation
2803 * information must be inferred from the list of input nir_variables.
2804 */
2805 bool use_interpolated_input_intrinsics;
2806
2807 /* Lowers when 32x32->64 bit multiplication is not supported */
2808 bool lower_mul_2x32_64;
2809
2810 /* Lowers when rotate instruction is not supported */
2811 bool lower_rotate;
2812
2813 /**
2814 * Backend supports imul24, and would like to use it (when possible)
2815 * for address/offset calculation. If true, driver should call
2816 * nir_lower_amul(). (If not set, amul will automatically be lowered
2817 * to imul.)
2818 */
2819 bool has_imul24;
2820
2821 /**
2822 * Is this the Intel vec4 backend?
2823 *
2824 * Used to inhibit algebraic optimizations that are known to be harmful on
2825 * the Intel vec4 backend. This is generally applicable to any
2826 * optimization that might cause more immediate values to be used in
2827 * 3-source (e.g., ffma and flrp) instructions.
2828 */
2829 bool intel_vec4;
2830
2831 unsigned max_unroll_iterations;
2832
2833 nir_lower_int64_options lower_int64_options;
2834 nir_lower_doubles_options lower_doubles_options;
2835 } nir_shader_compiler_options;
2836
2837 typedef struct nir_shader {
2838 /** list of uniforms (nir_variable) */
2839 struct exec_list uniforms;
2840
2841 /** list of inputs (nir_variable) */
2842 struct exec_list inputs;
2843
2844 /** list of outputs (nir_variable) */
2845 struct exec_list outputs;
2846
2847 /** list of shared compute variables (nir_variable) */
2848 struct exec_list shared;
2849
2850 /** Set of driver-specific options for the shader.
2851 *
2852 * The memory for the options is expected to be kept in a single static
2853 * copy by the driver.
2854 */
2855 const struct nir_shader_compiler_options *options;
2856
2857 /** Various bits of compile-time information about a given shader */
2858 struct shader_info info;
2859
2860 /** list of global variables in the shader (nir_variable) */
2861 struct exec_list globals;
2862
2863 /** list of system value variables in the shader (nir_variable) */
2864 struct exec_list system_values;
2865
2866 struct exec_list functions; /** < list of nir_function */
2867
2868 /**
2869 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2870 * access plus one
2871 */
2872 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2873
2874 /** Size in bytes of required scratch space */
2875 unsigned scratch_size;
2876
2877 /** Constant data associated with this shader.
2878 *
2879 * Constant data is loaded through load_constant intrinsics. See also
2880 * nir_opt_large_constants.
2881 */
2882 void *constant_data;
2883 unsigned constant_data_size;
2884 } nir_shader;
2885
2886 #define nir_foreach_function(func, shader) \
2887 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2888
2889 static inline nir_function_impl *
2890 nir_shader_get_entrypoint(nir_shader *shader)
2891 {
2892 nir_function *func = NULL;
2893
2894 nir_foreach_function(function, shader) {
2895 assert(func == NULL);
2896 if (function->is_entrypoint) {
2897 func = function;
2898 #ifndef NDEBUG
2899 break;
2900 #endif
2901 }
2902 }
2903
2904 if (!func)
2905 return NULL;
2906
2907 assert(func->num_params == 0);
2908 assert(func->impl);
2909 return func->impl;
2910 }
2911
2912 nir_shader *nir_shader_create(void *mem_ctx,
2913 gl_shader_stage stage,
2914 const nir_shader_compiler_options *options,
2915 shader_info *si);
2916
2917 nir_register *nir_local_reg_create(nir_function_impl *impl);
2918
2919 void nir_reg_remove(nir_register *reg);
2920
2921 /** Adds a variable to the appropriate list in nir_shader */
2922 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
2923
2924 static inline void
2925 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
2926 {
2927 assert(var->data.mode == nir_var_function_temp);
2928 exec_list_push_tail(&impl->locals, &var->node);
2929 }
2930
2931 /** creates a variable, sets a few defaults, and adds it to the list */
2932 nir_variable *nir_variable_create(nir_shader *shader,
2933 nir_variable_mode mode,
2934 const struct glsl_type *type,
2935 const char *name);
2936 /** creates a local variable and adds it to the list */
2937 nir_variable *nir_local_variable_create(nir_function_impl *impl,
2938 const struct glsl_type *type,
2939 const char *name);
2940
2941 /** creates a function and adds it to the shader's list of functions */
2942 nir_function *nir_function_create(nir_shader *shader, const char *name);
2943
2944 nir_function_impl *nir_function_impl_create(nir_function *func);
2945 /** creates a function_impl that isn't tied to any particular function */
2946 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
2947
2948 nir_block *nir_block_create(nir_shader *shader);
2949 nir_if *nir_if_create(nir_shader *shader);
2950 nir_loop *nir_loop_create(nir_shader *shader);
2951
2952 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
2953
2954 /** requests that the given pieces of metadata be generated */
2955 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
2956 /** dirties all but the preserved metadata */
2957 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
2958
2959 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
2960 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
2961
2962 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
2963 nir_deref_type deref_type);
2964
2965 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
2966
2967 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
2968 unsigned num_components,
2969 unsigned bit_size);
2970
2971 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
2972 nir_intrinsic_op op);
2973
2974 nir_call_instr *nir_call_instr_create(nir_shader *shader,
2975 nir_function *callee);
2976
2977 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
2978
2979 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
2980
2981 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
2982
2983 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
2984 unsigned num_components,
2985 unsigned bit_size);
2986
2987 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
2988
2989 /**
2990 * NIR Cursors and Instruction Insertion API
2991 * @{
2992 *
2993 * A tiny struct representing a point to insert/extract instructions or
2994 * control flow nodes. Helps reduce the combinatorial explosion of possible
2995 * points to insert/extract.
2996 *
2997 * \sa nir_control_flow.h
2998 */
2999 typedef enum {
3000 nir_cursor_before_block,
3001 nir_cursor_after_block,
3002 nir_cursor_before_instr,
3003 nir_cursor_after_instr,
3004 } nir_cursor_option;
3005
3006 typedef struct {
3007 nir_cursor_option option;
3008 union {
3009 nir_block *block;
3010 nir_instr *instr;
3011 };
3012 } nir_cursor;
3013
3014 static inline nir_block *
3015 nir_cursor_current_block(nir_cursor cursor)
3016 {
3017 if (cursor.option == nir_cursor_before_instr ||
3018 cursor.option == nir_cursor_after_instr) {
3019 return cursor.instr->block;
3020 } else {
3021 return cursor.block;
3022 }
3023 }
3024
3025 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3026
3027 static inline nir_cursor
3028 nir_before_block(nir_block *block)
3029 {
3030 nir_cursor cursor;
3031 cursor.option = nir_cursor_before_block;
3032 cursor.block = block;
3033 return cursor;
3034 }
3035
3036 static inline nir_cursor
3037 nir_after_block(nir_block *block)
3038 {
3039 nir_cursor cursor;
3040 cursor.option = nir_cursor_after_block;
3041 cursor.block = block;
3042 return cursor;
3043 }
3044
3045 static inline nir_cursor
3046 nir_before_instr(nir_instr *instr)
3047 {
3048 nir_cursor cursor;
3049 cursor.option = nir_cursor_before_instr;
3050 cursor.instr = instr;
3051 return cursor;
3052 }
3053
3054 static inline nir_cursor
3055 nir_after_instr(nir_instr *instr)
3056 {
3057 nir_cursor cursor;
3058 cursor.option = nir_cursor_after_instr;
3059 cursor.instr = instr;
3060 return cursor;
3061 }
3062
3063 static inline nir_cursor
3064 nir_after_block_before_jump(nir_block *block)
3065 {
3066 nir_instr *last_instr = nir_block_last_instr(block);
3067 if (last_instr && last_instr->type == nir_instr_type_jump) {
3068 return nir_before_instr(last_instr);
3069 } else {
3070 return nir_after_block(block);
3071 }
3072 }
3073
3074 static inline nir_cursor
3075 nir_before_src(nir_src *src, bool is_if_condition)
3076 {
3077 if (is_if_condition) {
3078 nir_block *prev_block =
3079 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3080 assert(!nir_block_ends_in_jump(prev_block));
3081 return nir_after_block(prev_block);
3082 } else if (src->parent_instr->type == nir_instr_type_phi) {
3083 #ifndef NDEBUG
3084 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3085 bool found = false;
3086 nir_foreach_phi_src(phi_src, cond_phi) {
3087 if (phi_src->src.ssa == src->ssa) {
3088 found = true;
3089 break;
3090 }
3091 }
3092 assert(found);
3093 #endif
3094 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3095 * to have a more specific name.
3096 */
3097 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3098 return nir_after_block_before_jump(phi_src->pred);
3099 } else {
3100 return nir_before_instr(src->parent_instr);
3101 }
3102 }
3103
3104 static inline nir_cursor
3105 nir_before_cf_node(nir_cf_node *node)
3106 {
3107 if (node->type == nir_cf_node_block)
3108 return nir_before_block(nir_cf_node_as_block(node));
3109
3110 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3111 }
3112
3113 static inline nir_cursor
3114 nir_after_cf_node(nir_cf_node *node)
3115 {
3116 if (node->type == nir_cf_node_block)
3117 return nir_after_block(nir_cf_node_as_block(node));
3118
3119 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3120 }
3121
3122 static inline nir_cursor
3123 nir_after_phis(nir_block *block)
3124 {
3125 nir_foreach_instr(instr, block) {
3126 if (instr->type != nir_instr_type_phi)
3127 return nir_before_instr(instr);
3128 }
3129 return nir_after_block(block);
3130 }
3131
3132 static inline nir_cursor
3133 nir_after_cf_node_and_phis(nir_cf_node *node)
3134 {
3135 if (node->type == nir_cf_node_block)
3136 return nir_after_block(nir_cf_node_as_block(node));
3137
3138 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3139
3140 return nir_after_phis(block);
3141 }
3142
3143 static inline nir_cursor
3144 nir_before_cf_list(struct exec_list *cf_list)
3145 {
3146 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3147 exec_list_get_head(cf_list), node);
3148 return nir_before_cf_node(first_node);
3149 }
3150
3151 static inline nir_cursor
3152 nir_after_cf_list(struct exec_list *cf_list)
3153 {
3154 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3155 exec_list_get_tail(cf_list), node);
3156 return nir_after_cf_node(last_node);
3157 }
3158
3159 /**
3160 * Insert a NIR instruction at the given cursor.
3161 *
3162 * Note: This does not update the cursor.
3163 */
3164 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3165
3166 static inline void
3167 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3168 {
3169 nir_instr_insert(nir_before_instr(instr), before);
3170 }
3171
3172 static inline void
3173 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3174 {
3175 nir_instr_insert(nir_after_instr(instr), after);
3176 }
3177
3178 static inline void
3179 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3180 {
3181 nir_instr_insert(nir_before_block(block), before);
3182 }
3183
3184 static inline void
3185 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3186 {
3187 nir_instr_insert(nir_after_block(block), after);
3188 }
3189
3190 static inline void
3191 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3192 {
3193 nir_instr_insert(nir_before_cf_node(node), before);
3194 }
3195
3196 static inline void
3197 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3198 {
3199 nir_instr_insert(nir_after_cf_node(node), after);
3200 }
3201
3202 static inline void
3203 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3204 {
3205 nir_instr_insert(nir_before_cf_list(list), before);
3206 }
3207
3208 static inline void
3209 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3210 {
3211 nir_instr_insert(nir_after_cf_list(list), after);
3212 }
3213
3214 void nir_instr_remove_v(nir_instr *instr);
3215
3216 static inline nir_cursor
3217 nir_instr_remove(nir_instr *instr)
3218 {
3219 nir_cursor cursor;
3220 nir_instr *prev = nir_instr_prev(instr);
3221 if (prev) {
3222 cursor = nir_after_instr(prev);
3223 } else {
3224 cursor = nir_before_block(instr->block);
3225 }
3226 nir_instr_remove_v(instr);
3227 return cursor;
3228 }
3229
3230 /** @} */
3231
3232 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3233
3234 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3235 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3236 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3237 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3238 void *state);
3239 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3240 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3241
3242 nir_const_value *nir_src_as_const_value(nir_src src);
3243
3244 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3245 static inline c_type * \
3246 nir_src_as_ ## name (nir_src src) \
3247 { \
3248 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3249 ? cast_macro(src.ssa->parent_instr) : NULL; \
3250 }
3251
3252 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3253 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3254 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3255 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3256
3257 bool nir_src_is_dynamically_uniform(nir_src src);
3258 bool nir_srcs_equal(nir_src src1, nir_src src2);
3259 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3260 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3261 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3262 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3263 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3264 nir_dest new_dest);
3265
3266 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3267 unsigned num_components, unsigned bit_size,
3268 const char *name);
3269 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3270 unsigned num_components, unsigned bit_size,
3271 const char *name);
3272 static inline void
3273 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3274 const struct glsl_type *type,
3275 const char *name)
3276 {
3277 assert(glsl_type_is_vector_or_scalar(type));
3278 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3279 glsl_get_bit_size(type), name);
3280 }
3281 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3282 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3283 nir_instr *after_me);
3284
3285 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3286
3287 /*
3288 * finds the next basic block in source-code order, returns NULL if there is
3289 * none
3290 */
3291
3292 nir_block *nir_block_cf_tree_next(nir_block *block);
3293
3294 /* Performs the opposite of nir_block_cf_tree_next() */
3295
3296 nir_block *nir_block_cf_tree_prev(nir_block *block);
3297
3298 /* Gets the first block in a CF node in source-code order */
3299
3300 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3301
3302 /* Gets the last block in a CF node in source-code order */
3303
3304 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3305
3306 /* Gets the next block after a CF node in source-code order */
3307
3308 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3309
3310 /* Macros for loops that visit blocks in source-code order */
3311
3312 #define nir_foreach_block(block, impl) \
3313 for (nir_block *block = nir_start_block(impl); block != NULL; \
3314 block = nir_block_cf_tree_next(block))
3315
3316 #define nir_foreach_block_safe(block, impl) \
3317 for (nir_block *block = nir_start_block(impl), \
3318 *next = nir_block_cf_tree_next(block); \
3319 block != NULL; \
3320 block = next, next = nir_block_cf_tree_next(block))
3321
3322 #define nir_foreach_block_reverse(block, impl) \
3323 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3324 block = nir_block_cf_tree_prev(block))
3325
3326 #define nir_foreach_block_reverse_safe(block, impl) \
3327 for (nir_block *block = nir_impl_last_block(impl), \
3328 *prev = nir_block_cf_tree_prev(block); \
3329 block != NULL; \
3330 block = prev, prev = nir_block_cf_tree_prev(block))
3331
3332 #define nir_foreach_block_in_cf_node(block, node) \
3333 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3334 block != nir_cf_node_cf_tree_next(node); \
3335 block = nir_block_cf_tree_next(block))
3336
3337 /* If the following CF node is an if, this function returns that if.
3338 * Otherwise, it returns NULL.
3339 */
3340 nir_if *nir_block_get_following_if(nir_block *block);
3341
3342 nir_loop *nir_block_get_following_loop(nir_block *block);
3343
3344 void nir_index_local_regs(nir_function_impl *impl);
3345 void nir_index_ssa_defs(nir_function_impl *impl);
3346 unsigned nir_index_instrs(nir_function_impl *impl);
3347
3348 void nir_index_blocks(nir_function_impl *impl);
3349
3350 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3351
3352 void nir_print_shader(nir_shader *shader, FILE *fp);
3353 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3354 void nir_print_instr(const nir_instr *instr, FILE *fp);
3355 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3356
3357 /** Shallow clone of a single ALU instruction. */
3358 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3359
3360 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3361 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3362 const nir_function_impl *fi);
3363 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3364 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3365
3366 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3367
3368 void nir_shader_serialize_deserialize(nir_shader *s);
3369
3370 #ifndef NDEBUG
3371 void nir_validate_shader(nir_shader *shader, const char *when);
3372 void nir_metadata_set_validation_flag(nir_shader *shader);
3373 void nir_metadata_check_validation_flag(nir_shader *shader);
3374
3375 static inline bool
3376 should_skip_nir(const char *name)
3377 {
3378 static const char *list = NULL;
3379 if (!list) {
3380 /* Comma separated list of names to skip. */
3381 list = getenv("NIR_SKIP");
3382 if (!list)
3383 list = "";
3384 }
3385
3386 if (!list[0])
3387 return false;
3388
3389 return comma_separated_list_contains(list, name);
3390 }
3391
3392 static inline bool
3393 should_clone_nir(void)
3394 {
3395 static int should_clone = -1;
3396 if (should_clone < 0)
3397 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3398
3399 return should_clone;
3400 }
3401
3402 static inline bool
3403 should_serialize_deserialize_nir(void)
3404 {
3405 static int test_serialize = -1;
3406 if (test_serialize < 0)
3407 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3408
3409 return test_serialize;
3410 }
3411
3412 static inline bool
3413 should_print_nir(void)
3414 {
3415 static int should_print = -1;
3416 if (should_print < 0)
3417 should_print = env_var_as_boolean("NIR_PRINT", false);
3418
3419 return should_print;
3420 }
3421 #else
3422 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3423 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3424 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3425 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3426 static inline bool should_clone_nir(void) { return false; }
3427 static inline bool should_serialize_deserialize_nir(void) { return false; }
3428 static inline bool should_print_nir(void) { return false; }
3429 #endif /* NDEBUG */
3430
3431 #define _PASS(pass, nir, do_pass) do { \
3432 if (should_skip_nir(#pass)) { \
3433 printf("skipping %s\n", #pass); \
3434 break; \
3435 } \
3436 do_pass \
3437 nir_validate_shader(nir, "after " #pass); \
3438 if (should_clone_nir()) { \
3439 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3440 nir_shader_replace(nir, clone); \
3441 } \
3442 if (should_serialize_deserialize_nir()) { \
3443 nir_shader_serialize_deserialize(nir); \
3444 } \
3445 } while (0)
3446
3447 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3448 nir_metadata_set_validation_flag(nir); \
3449 if (should_print_nir()) \
3450 printf("%s\n", #pass); \
3451 if (pass(nir, ##__VA_ARGS__)) { \
3452 progress = true; \
3453 if (should_print_nir()) \
3454 nir_print_shader(nir, stdout); \
3455 nir_metadata_check_validation_flag(nir); \
3456 } \
3457 )
3458
3459 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3460 if (should_print_nir()) \
3461 printf("%s\n", #pass); \
3462 pass(nir, ##__VA_ARGS__); \
3463 if (should_print_nir()) \
3464 nir_print_shader(nir, stdout); \
3465 )
3466
3467 #define NIR_SKIP(name) should_skip_nir(#name)
3468
3469 /** An instruction filtering callback
3470 *
3471 * Returns true if the instruction should be processed and false otherwise.
3472 */
3473 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3474
3475 /** A simple instruction lowering callback
3476 *
3477 * Many instruction lowering passes can be written as a simple function which
3478 * takes an instruction as its input and returns a sequence of instructions
3479 * that implement the consumed instruction. This function type represents
3480 * such a lowering function. When called, a function with this prototype
3481 * should either return NULL indicating that no lowering needs to be done or
3482 * emit a sequence of instructions using the provided builder (whose cursor
3483 * will already be placed after the instruction to be lowered) and return the
3484 * resulting nir_ssa_def.
3485 */
3486 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3487 nir_instr *, void *);
3488
3489 /**
3490 * Special return value for nir_lower_instr_cb when some progress occurred
3491 * (like changing an input to the instr) that didn't result in a replacement
3492 * SSA def being generated.
3493 */
3494 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3495
3496 /** Iterate over all the instructions in a nir_function_impl and lower them
3497 * using the provided callbacks
3498 *
3499 * This function implements the guts of a standard lowering pass for you. It
3500 * iterates over all of the instructions in a nir_function_impl and calls the
3501 * filter callback on each one. If the filter callback returns true, it then
3502 * calls the lowering call back on the instruction. (Splitting it this way
3503 * allows us to avoid some save/restore work for instructions we know won't be
3504 * lowered.) If the instruction is dead after the lowering is complete, it
3505 * will be removed. If new instructions are added, the lowering callback will
3506 * also be called on them in case multiple lowerings are required.
3507 *
3508 * The metadata for the nir_function_impl will also be updated. If any blocks
3509 * are added (they cannot be removed), dominance and block indices will be
3510 * invalidated.
3511 */
3512 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3513 nir_instr_filter_cb filter,
3514 nir_lower_instr_cb lower,
3515 void *cb_data);
3516 bool nir_shader_lower_instructions(nir_shader *shader,
3517 nir_instr_filter_cb filter,
3518 nir_lower_instr_cb lower,
3519 void *cb_data);
3520
3521 void nir_calc_dominance_impl(nir_function_impl *impl);
3522 void nir_calc_dominance(nir_shader *shader);
3523
3524 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3525 bool nir_block_dominates(nir_block *parent, nir_block *child);
3526 bool nir_block_is_unreachable(nir_block *block);
3527
3528 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3529 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3530
3531 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3532 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3533
3534 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3535 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3536
3537 int nir_gs_count_vertices(const nir_shader *shader);
3538
3539 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3540 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3541 bool nir_split_var_copies(nir_shader *shader);
3542 bool nir_split_per_member_structs(nir_shader *shader);
3543 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3544
3545 bool nir_lower_returns_impl(nir_function_impl *impl);
3546 bool nir_lower_returns(nir_shader *shader);
3547
3548 void nir_inline_function_impl(struct nir_builder *b,
3549 const nir_function_impl *impl,
3550 nir_ssa_def **params);
3551 bool nir_inline_functions(nir_shader *shader);
3552
3553 bool nir_propagate_invariant(nir_shader *shader);
3554
3555 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3556 void nir_lower_deref_copy_instr(struct nir_builder *b,
3557 nir_intrinsic_instr *copy);
3558 bool nir_lower_var_copies(nir_shader *shader);
3559
3560 void nir_fixup_deref_modes(nir_shader *shader);
3561
3562 bool nir_lower_global_vars_to_local(nir_shader *shader);
3563
3564 typedef enum {
3565 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3566 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3567 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3568 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3569 } nir_lower_array_deref_of_vec_options;
3570
3571 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3572 nir_lower_array_deref_of_vec_options options);
3573
3574 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3575
3576 bool nir_lower_locals_to_regs(nir_shader *shader);
3577
3578 void nir_lower_io_to_temporaries(nir_shader *shader,
3579 nir_function_impl *entrypoint,
3580 bool outputs, bool inputs);
3581
3582 bool nir_lower_vars_to_scratch(nir_shader *shader,
3583 nir_variable_mode modes,
3584 int size_threshold,
3585 glsl_type_size_align_func size_align);
3586
3587 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3588
3589 void nir_gather_ssa_types(nir_function_impl *impl,
3590 BITSET_WORD *float_types,
3591 BITSET_WORD *int_types);
3592
3593 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3594 int (*type_size)(const struct glsl_type *, bool));
3595
3596 /* Some helpers to do very simple linking */
3597 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3598 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3599 uint64_t *used_by_other_stage,
3600 uint64_t *used_by_other_stage_patches);
3601 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3602 bool default_to_smooth_interp);
3603 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3604 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3605
3606 bool nir_lower_amul(nir_shader *shader,
3607 int (*type_size)(const struct glsl_type *, bool));
3608
3609 void nir_assign_io_var_locations(struct exec_list *var_list,
3610 unsigned *size,
3611 gl_shader_stage stage);
3612
3613 typedef enum {
3614 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3615 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3616 * modes.
3617 */
3618 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3619
3620 /* If set, this forces all non-flat fragment shader inputs to be
3621 * interpolated as if with the "sample" qualifier. This requires
3622 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3623 */
3624 nir_lower_io_force_sample_interpolation = (1 << 1),
3625 } nir_lower_io_options;
3626 bool nir_lower_io(nir_shader *shader,
3627 nir_variable_mode modes,
3628 int (*type_size)(const struct glsl_type *, bool),
3629 nir_lower_io_options);
3630
3631 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3632
3633 bool
3634 nir_lower_vars_to_explicit_types(nir_shader *shader,
3635 nir_variable_mode modes,
3636 glsl_type_size_align_func type_info);
3637
3638 typedef enum {
3639 /**
3640 * An address format which is a simple 32-bit global GPU address.
3641 */
3642 nir_address_format_32bit_global,
3643
3644 /**
3645 * An address format which is a simple 64-bit global GPU address.
3646 */
3647 nir_address_format_64bit_global,
3648
3649 /**
3650 * An address format which is a bounds-checked 64-bit global GPU address.
3651 *
3652 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3653 * address stored with the low bits in .x and high bits in .y, .z is a
3654 * size, and .w is an offset. When the final I/O operation is lowered, .w
3655 * is checked against .z and the operation is predicated on the result.
3656 */
3657 nir_address_format_64bit_bounded_global,
3658
3659 /**
3660 * An address format which is comprised of a vec2 where the first
3661 * component is a buffer index and the second is an offset.
3662 */
3663 nir_address_format_32bit_index_offset,
3664
3665 /**
3666 * An address format which is a simple 32-bit offset.
3667 */
3668 nir_address_format_32bit_offset,
3669
3670 /**
3671 * An address format representing a purely logical addressing model. In
3672 * this model, all deref chains must be complete from the dereference
3673 * operation to the variable. Cast derefs are not allowed. These
3674 * addresses will be 32-bit scalars but the format is immaterial because
3675 * you can always chase the chain.
3676 */
3677 nir_address_format_logical,
3678 } nir_address_format;
3679
3680 static inline unsigned
3681 nir_address_format_bit_size(nir_address_format addr_format)
3682 {
3683 switch (addr_format) {
3684 case nir_address_format_32bit_global: return 32;
3685 case nir_address_format_64bit_global: return 64;
3686 case nir_address_format_64bit_bounded_global: return 32;
3687 case nir_address_format_32bit_index_offset: return 32;
3688 case nir_address_format_32bit_offset: return 32;
3689 case nir_address_format_logical: return 32;
3690 }
3691 unreachable("Invalid address format");
3692 }
3693
3694 static inline unsigned
3695 nir_address_format_num_components(nir_address_format addr_format)
3696 {
3697 switch (addr_format) {
3698 case nir_address_format_32bit_global: return 1;
3699 case nir_address_format_64bit_global: return 1;
3700 case nir_address_format_64bit_bounded_global: return 4;
3701 case nir_address_format_32bit_index_offset: return 2;
3702 case nir_address_format_32bit_offset: return 1;
3703 case nir_address_format_logical: return 1;
3704 }
3705 unreachable("Invalid address format");
3706 }
3707
3708 static inline const struct glsl_type *
3709 nir_address_format_to_glsl_type(nir_address_format addr_format)
3710 {
3711 unsigned bit_size = nir_address_format_bit_size(addr_format);
3712 assert(bit_size == 32 || bit_size == 64);
3713 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3714 nir_address_format_num_components(addr_format));
3715 }
3716
3717 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3718
3719 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3720 nir_address_format addr_format);
3721
3722 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3723 nir_address_format addr_format);
3724
3725 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3726 nir_deref_instr *deref,
3727 nir_ssa_def *base_addr,
3728 nir_address_format addr_format);
3729 void nir_lower_explicit_io_instr(struct nir_builder *b,
3730 nir_intrinsic_instr *io_instr,
3731 nir_ssa_def *addr,
3732 nir_address_format addr_format);
3733
3734 bool nir_lower_explicit_io(nir_shader *shader,
3735 nir_variable_mode modes,
3736 nir_address_format);
3737
3738 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3739 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3740
3741 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3742
3743 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3744 bool nir_lower_regs_to_ssa(nir_shader *shader);
3745 bool nir_lower_vars_to_ssa(nir_shader *shader);
3746
3747 bool nir_remove_dead_derefs(nir_shader *shader);
3748 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3749 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3750 bool nir_lower_constant_initializers(nir_shader *shader,
3751 nir_variable_mode modes);
3752
3753 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3754 bool nir_lower_vec_to_movs(nir_shader *shader);
3755 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3756 bool alpha_to_one,
3757 const gl_state_index16 *alpha_ref_state_tokens);
3758 bool nir_lower_alu(nir_shader *shader);
3759
3760 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3761 bool always_precise, bool have_ffma);
3762
3763 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3764 bool nir_lower_bool_to_float(nir_shader *shader);
3765 bool nir_lower_bool_to_int32(nir_shader *shader);
3766 bool nir_lower_int_to_float(nir_shader *shader);
3767 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3768 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3769 bool nir_lower_phis_to_scalar(nir_shader *shader);
3770 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3771 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3772 bool outputs_only);
3773 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3774 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3775 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3776
3777 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3778 void nir_lower_viewport_transform(nir_shader *shader);
3779 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3780
3781 typedef struct nir_lower_subgroups_options {
3782 uint8_t subgroup_size;
3783 uint8_t ballot_bit_size;
3784 bool lower_to_scalar:1;
3785 bool lower_vote_trivial:1;
3786 bool lower_vote_eq_to_ballot:1;
3787 bool lower_subgroup_masks:1;
3788 bool lower_shuffle:1;
3789 bool lower_shuffle_to_32bit:1;
3790 bool lower_quad:1;
3791 } nir_lower_subgroups_options;
3792
3793 bool nir_lower_subgroups(nir_shader *shader,
3794 const nir_lower_subgroups_options *options);
3795
3796 bool nir_lower_system_values(nir_shader *shader);
3797
3798 enum PACKED nir_lower_tex_packing {
3799 nir_lower_tex_packing_none = 0,
3800 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3801 * or unsigned ints based on the sampler type
3802 */
3803 nir_lower_tex_packing_16,
3804 /* The sampler returns 1 32-bit word of 4x8 unorm */
3805 nir_lower_tex_packing_8,
3806 };
3807
3808 typedef struct nir_lower_tex_options {
3809 /**
3810 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3811 * sampler types a texture projector is lowered.
3812 */
3813 unsigned lower_txp;
3814
3815 /**
3816 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3817 */
3818 bool lower_txf_offset;
3819
3820 /**
3821 * If true, lower away nir_tex_src_offset for all rect textures.
3822 */
3823 bool lower_rect_offset;
3824
3825 /**
3826 * If true, lower rect textures to 2D, using txs to fetch the
3827 * texture dimensions and dividing the texture coords by the
3828 * texture dims to normalize.
3829 */
3830 bool lower_rect;
3831
3832 /**
3833 * If true, convert yuv to rgb.
3834 */
3835 unsigned lower_y_uv_external;
3836 unsigned lower_y_u_v_external;
3837 unsigned lower_yx_xuxv_external;
3838 unsigned lower_xy_uxvx_external;
3839 unsigned lower_ayuv_external;
3840 unsigned lower_xyuv_external;
3841
3842 /**
3843 * To emulate certain texture wrap modes, this can be used
3844 * to saturate the specified tex coord to [0.0, 1.0]. The
3845 * bits are according to sampler #, ie. if, for example:
3846 *
3847 * (conf->saturate_s & (1 << n))
3848 *
3849 * is true, then the s coord for sampler n is saturated.
3850 *
3851 * Note that clamping must happen *after* projector lowering
3852 * so any projected texture sample instruction with a clamped
3853 * coordinate gets automatically lowered, regardless of the
3854 * 'lower_txp' setting.
3855 */
3856 unsigned saturate_s;
3857 unsigned saturate_t;
3858 unsigned saturate_r;
3859
3860 /* Bitmask of textures that need swizzling.
3861 *
3862 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3863 * swizzles[texture_index] is applied to the result of the texturing
3864 * operation.
3865 */
3866 unsigned swizzle_result;
3867
3868 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3869 * while 4 and 5 represent 0 and 1 respectively.
3870 */
3871 uint8_t swizzles[32][4];
3872
3873 /* Can be used to scale sampled values in range required by the format. */
3874 float scale_factors[32];
3875
3876 /**
3877 * Bitmap of textures that need srgb to linear conversion. If
3878 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3879 * of the texture are lowered to linear.
3880 */
3881 unsigned lower_srgb;
3882
3883 /**
3884 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3885 * LODs to nir_texop_txl.
3886 */
3887 bool lower_tex_without_implicit_lod;
3888
3889 /**
3890 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3891 */
3892 bool lower_txd_cube_map;
3893
3894 /**
3895 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3896 */
3897 bool lower_txd_3d;
3898
3899 /**
3900 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3901 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3902 * with lower_txd_cube_map.
3903 */
3904 bool lower_txd_shadow;
3905
3906 /**
3907 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
3908 * Implies lower_txd_cube_map and lower_txd_shadow.
3909 */
3910 bool lower_txd;
3911
3912 /**
3913 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
3914 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
3915 */
3916 bool lower_txb_shadow_clamp;
3917
3918 /**
3919 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
3920 * with nir_texop_txl. This includes cube maps.
3921 */
3922 bool lower_txd_shadow_clamp;
3923
3924 /**
3925 * If true, lower nir_texop_txd on when it uses both offset and min_lod
3926 * with nir_texop_txl. This includes cube maps.
3927 */
3928 bool lower_txd_offset_clamp;
3929
3930 /**
3931 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3932 * sampler is bindless.
3933 */
3934 bool lower_txd_clamp_bindless_sampler;
3935
3936 /**
3937 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3938 * sampler index is not statically determinable to be less than 16.
3939 */
3940 bool lower_txd_clamp_if_sampler_index_not_lt_16;
3941
3942 /**
3943 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
3944 * 0-lod followed by a nir_ishr.
3945 */
3946 bool lower_txs_lod;
3947
3948 /**
3949 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
3950 * mixed-up tg4 locations.
3951 */
3952 bool lower_tg4_broadcom_swizzle;
3953
3954 /**
3955 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
3956 */
3957 bool lower_tg4_offsets;
3958
3959 enum nir_lower_tex_packing lower_tex_packing[32];
3960 } nir_lower_tex_options;
3961
3962 bool nir_lower_tex(nir_shader *shader,
3963 const nir_lower_tex_options *options);
3964
3965 enum nir_lower_non_uniform_access_type {
3966 nir_lower_non_uniform_ubo_access = (1 << 0),
3967 nir_lower_non_uniform_ssbo_access = (1 << 1),
3968 nir_lower_non_uniform_texture_access = (1 << 2),
3969 nir_lower_non_uniform_image_access = (1 << 3),
3970 };
3971
3972 bool nir_lower_non_uniform_access(nir_shader *shader,
3973 enum nir_lower_non_uniform_access_type);
3974
3975 enum nir_lower_idiv_path {
3976 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
3977 * the two but it is not exact in some cases (for example, 1091317713u /
3978 * 1034u gives 5209173 instead of 1055432) */
3979 nir_lower_idiv_fast,
3980 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
3981 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
3982 * the nv50 path and many of them are integer multiplications, so it is
3983 * probably slower. It should always return the correct result, though. */
3984 nir_lower_idiv_precise,
3985 };
3986
3987 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
3988
3989 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
3990
3991 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
3992 bool use_vars,
3993 bool use_clipdist_array,
3994 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3995 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
3996 bool use_clipdist_array,
3997 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3998 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
3999 bool use_clipdist_array);
4000 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4001
4002 void nir_lower_point_size_mov(nir_shader *shader,
4003 const gl_state_index16 *pointsize_state_tokens);
4004
4005 bool nir_lower_frexp(nir_shader *nir);
4006
4007 void nir_lower_two_sided_color(nir_shader *shader);
4008
4009 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4010
4011 bool nir_lower_flatshade(nir_shader *shader);
4012
4013 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4014 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4015 const gl_state_index16 *uniform_state_tokens);
4016
4017 typedef struct nir_lower_wpos_ytransform_options {
4018 gl_state_index16 state_tokens[STATE_LENGTH];
4019 bool fs_coord_origin_upper_left :1;
4020 bool fs_coord_origin_lower_left :1;
4021 bool fs_coord_pixel_center_integer :1;
4022 bool fs_coord_pixel_center_half_integer :1;
4023 } nir_lower_wpos_ytransform_options;
4024
4025 bool nir_lower_wpos_ytransform(nir_shader *shader,
4026 const nir_lower_wpos_ytransform_options *options);
4027 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4028
4029 bool nir_lower_fb_read(nir_shader *shader);
4030
4031 typedef struct nir_lower_drawpixels_options {
4032 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4033 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4034 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4035 unsigned drawpix_sampler;
4036 unsigned pixelmap_sampler;
4037 bool pixel_maps :1;
4038 bool scale_and_bias :1;
4039 } nir_lower_drawpixels_options;
4040
4041 void nir_lower_drawpixels(nir_shader *shader,
4042 const nir_lower_drawpixels_options *options);
4043
4044 typedef struct nir_lower_bitmap_options {
4045 unsigned sampler;
4046 bool swizzle_xxxx;
4047 } nir_lower_bitmap_options;
4048
4049 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4050
4051 bool nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned ssbo_offset);
4052
4053 typedef enum {
4054 nir_lower_int_source_mods = 1 << 0,
4055 nir_lower_float_source_mods = 1 << 1,
4056 nir_lower_triop_abs = 1 << 2,
4057 nir_lower_all_source_mods = (1 << 3) - 1
4058 } nir_lower_to_source_mods_flags;
4059
4060
4061 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4062
4063 bool nir_lower_gs_intrinsics(nir_shader *shader);
4064
4065 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4066
4067 bool nir_lower_bit_size(nir_shader *shader,
4068 nir_lower_bit_size_callback callback,
4069 void *callback_data);
4070
4071 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4072 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4073
4074 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4075 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4076 nir_lower_doubles_options options);
4077 bool nir_lower_pack(nir_shader *shader);
4078
4079 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4080
4081 typedef enum {
4082 nir_lower_interpolation_at_sample = (1 << 1),
4083 nir_lower_interpolation_at_offset = (1 << 2),
4084 nir_lower_interpolation_centroid = (1 << 3),
4085 nir_lower_interpolation_pixel = (1 << 4),
4086 nir_lower_interpolation_sample = (1 << 5),
4087 } nir_lower_interpolation_options;
4088
4089 bool nir_lower_interpolation(nir_shader *shader,
4090 nir_lower_interpolation_options options);
4091
4092 bool nir_normalize_cubemap_coords(nir_shader *shader);
4093
4094 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4095
4096 void nir_loop_analyze_impl(nir_function_impl *impl,
4097 nir_variable_mode indirect_mask);
4098
4099 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4100
4101 bool nir_repair_ssa_impl(nir_function_impl *impl);
4102 bool nir_repair_ssa(nir_shader *shader);
4103
4104 void nir_convert_loop_to_lcssa(nir_loop *loop);
4105 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4106 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4107
4108 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4109 * registers. If false, convert all values (even those not involved in a phi
4110 * node) to registers.
4111 */
4112 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4113
4114 bool nir_lower_phis_to_regs_block(nir_block *block);
4115 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4116 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4117
4118 bool nir_lower_samplers(nir_shader *shader);
4119
4120 /* This is here for unit tests. */
4121 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4122
4123 bool nir_opt_comparison_pre(nir_shader *shader);
4124
4125 bool nir_opt_access(nir_shader *shader);
4126 bool nir_opt_algebraic(nir_shader *shader);
4127 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4128 bool nir_opt_algebraic_late(nir_shader *shader);
4129 bool nir_opt_constant_folding(nir_shader *shader);
4130
4131 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4132
4133 bool nir_copy_prop(nir_shader *shader);
4134
4135 bool nir_opt_copy_prop_vars(nir_shader *shader);
4136
4137 bool nir_opt_cse(nir_shader *shader);
4138
4139 bool nir_opt_dce(nir_shader *shader);
4140
4141 bool nir_opt_dead_cf(nir_shader *shader);
4142
4143 bool nir_opt_dead_write_vars(nir_shader *shader);
4144
4145 bool nir_opt_deref_impl(nir_function_impl *impl);
4146 bool nir_opt_deref(nir_shader *shader);
4147
4148 bool nir_opt_find_array_copies(nir_shader *shader);
4149
4150 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4151
4152 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4153
4154 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4155
4156 bool nir_opt_intrinsics(nir_shader *shader);
4157
4158 bool nir_opt_large_constants(nir_shader *shader,
4159 glsl_type_size_align_func size_align,
4160 unsigned threshold);
4161
4162 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4163
4164 typedef enum {
4165 nir_move_const_undef = (1 << 0),
4166 nir_move_load_ubo = (1 << 1),
4167 nir_move_load_input = (1 << 2),
4168 nir_move_comparisons = (1 << 3),
4169 } nir_move_options;
4170
4171 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4172
4173 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4174
4175 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4176
4177 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4178 bool indirect_load_ok, bool expensive_alu_ok);
4179
4180 bool nir_opt_rematerialize_compares(nir_shader *shader);
4181
4182 bool nir_opt_remove_phis(nir_shader *shader);
4183 bool nir_opt_remove_phis_block(nir_block *block);
4184
4185 bool nir_opt_shrink_load(nir_shader *shader);
4186
4187 bool nir_opt_trivial_continues(nir_shader *shader);
4188
4189 bool nir_opt_undef(nir_shader *shader);
4190
4191 bool nir_opt_vectorize(nir_shader *shader);
4192
4193 bool nir_opt_conditional_discard(nir_shader *shader);
4194
4195 void nir_strip(nir_shader *shader);
4196
4197 void nir_sweep(nir_shader *shader);
4198
4199 void nir_remap_dual_slot_attributes(nir_shader *shader,
4200 uint64_t *dual_slot_inputs);
4201 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4202
4203 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4204 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4205
4206 static inline bool
4207 nir_variable_is_in_ubo(const nir_variable *var)
4208 {
4209 return (var->data.mode == nir_var_mem_ubo &&
4210 var->interface_type != NULL);
4211 }
4212
4213 static inline bool
4214 nir_variable_is_in_ssbo(const nir_variable *var)
4215 {
4216 return (var->data.mode == nir_var_mem_ssbo &&
4217 var->interface_type != NULL);
4218 }
4219
4220 static inline bool
4221 nir_variable_is_in_block(const nir_variable *var)
4222 {
4223 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4224 }
4225
4226 #ifdef __cplusplus
4227 } /* extern "C" */
4228 #endif
4229
4230 #endif /* NIR_H */