nir: Add ability to lower non-const quad broadcasts to const ones.
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #include <stdio.h>
45
46 #ifndef NDEBUG
47 #include "util/debug.h"
48 #endif /* NDEBUG */
49
50 #include "nir_opcodes.h"
51
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
54 #endif
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define NIR_FALSE 0u
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t;
66
67 static inline bool
68 nir_num_components_valid(unsigned num_components)
69 {
70 return (num_components >= 1 &&
71 num_components <= 4) ||
72 num_components == 8 ||
73 num_components == 16;
74 }
75
76 /** Defines a cast function
77 *
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
80 *
81 * Note that you have to be a bit careful as the generated cast function
82 * destroys constness.
83 */
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
88 { \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
91 }
92
93 struct nir_function;
94 struct nir_shader;
95 struct nir_instr;
96 struct nir_builder;
97
98
99 /**
100 * Description of built-in state associated with a uniform
101 *
102 * \sa nir_variable::state_slots
103 */
104 typedef struct {
105 gl_state_index16 tokens[STATE_LENGTH];
106 uint16_t swizzle;
107 } nir_state_slot;
108
109 typedef enum {
110 nir_var_shader_in = (1 << 0),
111 nir_var_shader_out = (1 << 1),
112 nir_var_shader_temp = (1 << 2),
113 nir_var_function_temp = (1 << 3),
114 nir_var_uniform = (1 << 4),
115 nir_var_mem_ubo = (1 << 5),
116 nir_var_system_value = (1 << 6),
117 nir_var_mem_ssbo = (1 << 7),
118 nir_var_mem_shared = (1 << 8),
119 nir_var_mem_global = (1 << 9),
120 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes = 11,
122 nir_var_all = (1 << nir_num_variable_modes) - 1,
123 } nir_variable_mode;
124
125 /**
126 * Rounding modes.
127 */
128 typedef enum {
129 nir_rounding_mode_undef = 0,
130 nir_rounding_mode_rtne = 1, /* round to nearest even */
131 nir_rounding_mode_ru = 2, /* round up */
132 nir_rounding_mode_rd = 3, /* round down */
133 nir_rounding_mode_rtz = 4, /* round towards zero */
134 } nir_rounding_mode;
135
136 typedef union {
137 bool b;
138 float f32;
139 double f64;
140 int8_t i8;
141 uint8_t u8;
142 int16_t i16;
143 uint16_t u16;
144 int32_t i32;
145 uint32_t u32;
146 int64_t i64;
147 uint64_t u64;
148 } nir_const_value;
149
150 #define nir_const_value_to_array(arr, c, components, m) \
151 { \
152 for (unsigned i = 0; i < components; ++i) \
153 arr[i] = c[i].m; \
154 } while (false)
155
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
158 {
159 nir_const_value v;
160 memset(&v, 0, sizeof(v));
161
162 switch (bit_size) {
163 case 1: v.b = x; break;
164 case 8: v.u8 = x; break;
165 case 16: v.u16 = x; break;
166 case 32: v.u32 = x; break;
167 case 64: v.u64 = x; break;
168 default:
169 unreachable("Invalid bit size");
170 }
171
172 return v;
173 }
174
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i, unsigned bit_size)
177 {
178 nir_const_value v;
179 memset(&v, 0, sizeof(v));
180
181 assert(bit_size <= 64);
182 if (bit_size < 64) {
183 assert(i >= (-(1ll << (bit_size - 1))));
184 assert(i < (1ll << (bit_size - 1)));
185 }
186
187 return nir_const_value_for_raw_uint(i, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
192 {
193 nir_const_value v;
194 memset(&v, 0, sizeof(v));
195
196 assert(bit_size <= 64);
197 if (bit_size < 64)
198 assert(u < (1ull << bit_size));
199
200 return nir_const_value_for_raw_uint(u, bit_size);
201 }
202
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b, unsigned bit_size)
205 {
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b, bit_size);
208 }
209
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
212
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
215 {
216 switch (bit_size) {
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value.b;
219 case 8: return value.i8;
220 case 16: return value.i16;
221 case 32: return value.i32;
222 case 64: return value.i64;
223 default:
224 unreachable("Invalid bit size");
225 }
226 }
227
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
230 {
231 switch (bit_size) {
232 case 1: return value.b;
233 case 8: return value.u8;
234 case 16: return value.u16;
235 case 32: return value.u32;
236 case 64: return value.u64;
237 default:
238 unreachable("Invalid bit size");
239 }
240 }
241
242 static inline bool
243 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
244 {
245 int64_t i = nir_const_value_as_int(value, bit_size);
246
247 /* Booleans of any size use 0/-1 convention */
248 assert(i == 0 || i == -1);
249
250 return i;
251 }
252
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
255
256 typedef struct nir_constant {
257 /**
258 * Value of the constant.
259 *
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
263 */
264 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
265
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
268 */
269 unsigned num_elements;
270
271 /* Array elements / Structure Fields */
272 struct nir_constant **elements;
273 } nir_constant;
274
275 /**
276 * \brief Layout qualifiers for gl_FragDepth.
277 *
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
280 */
281 typedef enum {
282 nir_depth_layout_none, /**< No depth layout is specified. */
283 nir_depth_layout_any,
284 nir_depth_layout_greater,
285 nir_depth_layout_less,
286 nir_depth_layout_unchanged
287 } nir_depth_layout;
288
289 /**
290 * Enum keeping track of how a variable was declared.
291 */
292 typedef enum {
293 /**
294 * Normal declaration.
295 */
296 nir_var_declared_normally = 0,
297
298 /**
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
301 */
302 nir_var_hidden,
303 } nir_var_declaration_type;
304
305 /**
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
308 */
309
310 typedef struct nir_variable {
311 struct exec_node node;
312
313 /**
314 * Declared type of the variable
315 */
316 const struct glsl_type *type;
317
318 /**
319 * Declared name of the variable
320 */
321 char *name;
322
323 struct nir_variable_data {
324 /**
325 * Storage class of the variable.
326 *
327 * \sa nir_variable_mode
328 */
329 nir_variable_mode mode:11;
330
331 /**
332 * Is the variable read-only?
333 *
334 * This is set for variables declared as \c const, shader inputs,
335 * and uniforms.
336 */
337 unsigned read_only:1;
338 unsigned centroid:1;
339 unsigned sample:1;
340 unsigned patch:1;
341 unsigned invariant:1;
342
343 /**
344 * Precision qualifier.
345 *
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
348 *
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
353 */
354 unsigned precision:2;
355
356 /**
357 * Can this variable be coalesced with another?
358 *
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
364 */
365 unsigned cannot_coalesce:1;
366
367 /**
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
371 *
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
374 */
375 unsigned always_active_io:1;
376
377 /**
378 * Interpolation mode for shader inputs / outputs
379 *
380 * \sa glsl_interp_mode
381 */
382 unsigned interpolation:3;
383
384 /**
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
390 */
391 unsigned location_frac:2;
392
393 /**
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
397 */
398 unsigned compact:1;
399
400 /**
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
404 */
405 unsigned fb_fetch_output:1;
406
407 /**
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
410 */
411 unsigned bindless:1;
412
413 /**
414 * Was an explicit binding set in the shader?
415 */
416 unsigned explicit_binding:1;
417
418 /**
419 * Was the location explicitly set in the shader?
420 *
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
423 * no effect).
424 */
425 unsigned explicit_location:1;
426
427 /**
428 * Was a transfer feedback buffer set in the shader?
429 */
430 unsigned explicit_xfb_buffer:1;
431
432 /**
433 * Was a transfer feedback stride set in the shader?
434 */
435 unsigned explicit_xfb_stride:1;
436
437 /**
438 * Was an explicit offset set in the shader?
439 */
440 unsigned explicit_offset:1;
441
442 /**
443 * Non-zero if this variable was created by lowering a named interface
444 * block.
445 */
446 unsigned from_named_ifc_block:1;
447
448 /**
449 * How the variable was declared. See nir_var_declaration_type.
450 *
451 * This is used to detect variables generated by the compiler, so should
452 * not be visible via the API.
453 */
454 unsigned how_declared:2;
455
456 /**
457 * \brief Layout qualifier for gl_FragDepth.
458 *
459 * This is not equal to \c ir_depth_layout_none if and only if this
460 * variable is \c gl_FragDepth and a layout qualifier is specified.
461 */
462 nir_depth_layout depth_layout:3;
463
464 /**
465 * Vertex stream output identifier.
466 *
467 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
468 * indicate the stream of the i-th component.
469 */
470 unsigned stream:9;
471
472 /**
473 * Access flags for memory variables (SSBO/global), image uniforms, and
474 * bindless images in uniforms/inputs/outputs.
475 */
476 enum gl_access_qualifier access:8;
477
478 /**
479 * Descriptor set binding for sampler or UBO.
480 */
481 unsigned descriptor_set:5;
482
483 /**
484 * output index for dual source blending.
485 */
486 unsigned index;
487
488 /**
489 * Initial binding point for a sampler or UBO.
490 *
491 * For array types, this represents the binding point for the first element.
492 */
493 unsigned binding;
494
495 /**
496 * Storage location of the base of this variable
497 *
498 * The precise meaning of this field depends on the nature of the variable.
499 *
500 * - Vertex shader input: one of the values from \c gl_vert_attrib.
501 * - Vertex shader output: one of the values from \c gl_varying_slot.
502 * - Geometry shader input: one of the values from \c gl_varying_slot.
503 * - Geometry shader output: one of the values from \c gl_varying_slot.
504 * - Fragment shader input: one of the values from \c gl_varying_slot.
505 * - Fragment shader output: one of the values from \c gl_frag_result.
506 * - Uniforms: Per-stage uniform slot number for default uniform block.
507 * - Uniforms: Index within the uniform block definition for UBO members.
508 * - Non-UBO Uniforms: uniform slot number.
509 * - Other: This field is not currently used.
510 *
511 * If the variable is a uniform, shader input, or shader output, and the
512 * slot has not been assigned, the value will be -1.
513 */
514 int location;
515
516 /**
517 * The actual location of the variable in the IR. Only valid for inputs,
518 * outputs, and uniforms (including samplers and images).
519 */
520 unsigned driver_location;
521
522 /**
523 * Location an atomic counter or transform feedback is stored at.
524 */
525 unsigned offset;
526
527 union {
528 struct {
529 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
530 enum pipe_format format;
531 } image;
532
533 struct {
534 /**
535 * Transform feedback buffer.
536 */
537 uint16_t buffer:2;
538
539 /**
540 * Transform feedback stride.
541 */
542 uint16_t stride;
543 } xfb;
544 };
545 } data;
546
547 /**
548 * Identifier for this variable generated by nir_index_vars() that is unique
549 * among other variables in the same exec_list.
550 */
551 unsigned index;
552
553 /* Number of nir_variable_data members */
554 uint16_t num_members;
555
556 /**
557 * Built-in state that backs this uniform
558 *
559 * Once set at variable creation, \c state_slots must remain invariant.
560 * This is because, ideally, this array would be shared by all clones of
561 * this variable in the IR tree. In other words, we'd really like for it
562 * to be a fly-weight.
563 *
564 * If the variable is not a uniform, \c num_state_slots will be zero and
565 * \c state_slots will be \c NULL.
566 */
567 /*@{*/
568 uint16_t num_state_slots; /**< Number of state slots used */
569 nir_state_slot *state_slots; /**< State descriptors. */
570 /*@}*/
571
572 /**
573 * Constant expression assigned in the initializer of the variable
574 *
575 * This field should only be used temporarily by creators of NIR shaders
576 * and then lower_constant_initializers can be used to get rid of them.
577 * Most of the rest of NIR ignores this field or asserts that it's NULL.
578 */
579 nir_constant *constant_initializer;
580
581 /**
582 * Global variable assigned in the initializer of the variable
583 * This field should only be used temporarily by creators of NIR shaders
584 * and then lower_constant_initializers can be used to get rid of them.
585 * Most of the rest of NIR ignores this field or asserts that it's NULL.
586 */
587 struct nir_variable *pointer_initializer;
588
589 /**
590 * For variables that are in an interface block or are an instance of an
591 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
592 *
593 * \sa ir_variable::location
594 */
595 const struct glsl_type *interface_type;
596
597 /**
598 * Description of per-member data for per-member struct variables
599 *
600 * This is used for variables which are actually an amalgamation of
601 * multiple entities such as a struct of built-in values or a struct of
602 * inputs each with their own layout specifier. This is only allowed on
603 * variables with a struct or array of array of struct type.
604 */
605 struct nir_variable_data *members;
606 } nir_variable;
607
608 #define nir_foreach_variable(var, var_list) \
609 foreach_list_typed(nir_variable, var, node, var_list)
610
611 #define nir_foreach_variable_safe(var, var_list) \
612 foreach_list_typed_safe(nir_variable, var, node, var_list)
613
614 static inline bool
615 nir_variable_is_global(const nir_variable *var)
616 {
617 return var->data.mode != nir_var_function_temp;
618 }
619
620 typedef struct nir_register {
621 struct exec_node node;
622
623 unsigned num_components; /** < number of vector components */
624 unsigned num_array_elems; /** < size of array (0 for no array) */
625
626 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
627 uint8_t bit_size;
628
629 /** generic register index. */
630 unsigned index;
631
632 /** only for debug purposes, can be NULL */
633 const char *name;
634
635 /** set of nir_srcs where this register is used (read from) */
636 struct list_head uses;
637
638 /** set of nir_dests where this register is defined (written to) */
639 struct list_head defs;
640
641 /** set of nir_ifs where this register is used as a condition */
642 struct list_head if_uses;
643 } nir_register;
644
645 #define nir_foreach_register(reg, reg_list) \
646 foreach_list_typed(nir_register, reg, node, reg_list)
647 #define nir_foreach_register_safe(reg, reg_list) \
648 foreach_list_typed_safe(nir_register, reg, node, reg_list)
649
650 typedef enum PACKED {
651 nir_instr_type_alu,
652 nir_instr_type_deref,
653 nir_instr_type_call,
654 nir_instr_type_tex,
655 nir_instr_type_intrinsic,
656 nir_instr_type_load_const,
657 nir_instr_type_jump,
658 nir_instr_type_ssa_undef,
659 nir_instr_type_phi,
660 nir_instr_type_parallel_copy,
661 } nir_instr_type;
662
663 typedef struct nir_instr {
664 struct exec_node node;
665 struct nir_block *block;
666 nir_instr_type type;
667
668 /* A temporary for optimization and analysis passes to use for storing
669 * flags. For instance, DCE uses this to store the "dead/live" info.
670 */
671 uint8_t pass_flags;
672
673 /** generic instruction index. */
674 unsigned index;
675 } nir_instr;
676
677 static inline nir_instr *
678 nir_instr_next(nir_instr *instr)
679 {
680 struct exec_node *next = exec_node_get_next(&instr->node);
681 if (exec_node_is_tail_sentinel(next))
682 return NULL;
683 else
684 return exec_node_data(nir_instr, next, node);
685 }
686
687 static inline nir_instr *
688 nir_instr_prev(nir_instr *instr)
689 {
690 struct exec_node *prev = exec_node_get_prev(&instr->node);
691 if (exec_node_is_head_sentinel(prev))
692 return NULL;
693 else
694 return exec_node_data(nir_instr, prev, node);
695 }
696
697 static inline bool
698 nir_instr_is_first(const nir_instr *instr)
699 {
700 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
701 }
702
703 static inline bool
704 nir_instr_is_last(const nir_instr *instr)
705 {
706 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
707 }
708
709 typedef struct nir_ssa_def {
710 /** for debugging only, can be NULL */
711 const char* name;
712
713 /** generic SSA definition index. */
714 unsigned index;
715
716 /** Index into the live_in and live_out bitfields */
717 unsigned live_index;
718
719 /** Instruction which produces this SSA value. */
720 nir_instr *parent_instr;
721
722 /** set of nir_instrs where this register is used (read from) */
723 struct list_head uses;
724
725 /** set of nir_ifs where this register is used as a condition */
726 struct list_head if_uses;
727
728 uint8_t num_components;
729
730 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
731 uint8_t bit_size;
732 } nir_ssa_def;
733
734 struct nir_src;
735
736 typedef struct {
737 nir_register *reg;
738 struct nir_src *indirect; /** < NULL for no indirect offset */
739 unsigned base_offset;
740
741 /* TODO use-def chain goes here */
742 } nir_reg_src;
743
744 typedef struct {
745 nir_instr *parent_instr;
746 struct list_head def_link;
747
748 nir_register *reg;
749 struct nir_src *indirect; /** < NULL for no indirect offset */
750 unsigned base_offset;
751
752 /* TODO def-use chain goes here */
753 } nir_reg_dest;
754
755 struct nir_if;
756
757 typedef struct nir_src {
758 union {
759 /** Instruction that consumes this value as a source. */
760 nir_instr *parent_instr;
761 struct nir_if *parent_if;
762 };
763
764 struct list_head use_link;
765
766 union {
767 nir_reg_src reg;
768 nir_ssa_def *ssa;
769 };
770
771 bool is_ssa;
772 } nir_src;
773
774 static inline nir_src
775 nir_src_init(void)
776 {
777 nir_src src = { { NULL } };
778 return src;
779 }
780
781 #define NIR_SRC_INIT nir_src_init()
782
783 #define nir_foreach_use(src, reg_or_ssa_def) \
784 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
785
786 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
787 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
788
789 #define nir_foreach_if_use(src, reg_or_ssa_def) \
790 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
791
792 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
793 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
794
795 typedef struct {
796 union {
797 nir_reg_dest reg;
798 nir_ssa_def ssa;
799 };
800
801 bool is_ssa;
802 } nir_dest;
803
804 static inline nir_dest
805 nir_dest_init(void)
806 {
807 nir_dest dest = { { { NULL } } };
808 return dest;
809 }
810
811 #define NIR_DEST_INIT nir_dest_init()
812
813 #define nir_foreach_def(dest, reg) \
814 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
815
816 #define nir_foreach_def_safe(dest, reg) \
817 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
818
819 static inline nir_src
820 nir_src_for_ssa(nir_ssa_def *def)
821 {
822 nir_src src = NIR_SRC_INIT;
823
824 src.is_ssa = true;
825 src.ssa = def;
826
827 return src;
828 }
829
830 static inline nir_src
831 nir_src_for_reg(nir_register *reg)
832 {
833 nir_src src = NIR_SRC_INIT;
834
835 src.is_ssa = false;
836 src.reg.reg = reg;
837 src.reg.indirect = NULL;
838 src.reg.base_offset = 0;
839
840 return src;
841 }
842
843 static inline nir_dest
844 nir_dest_for_reg(nir_register *reg)
845 {
846 nir_dest dest = NIR_DEST_INIT;
847
848 dest.reg.reg = reg;
849
850 return dest;
851 }
852
853 static inline unsigned
854 nir_src_bit_size(nir_src src)
855 {
856 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
857 }
858
859 static inline unsigned
860 nir_src_num_components(nir_src src)
861 {
862 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
863 }
864
865 static inline bool
866 nir_src_is_const(nir_src src)
867 {
868 return src.is_ssa &&
869 src.ssa->parent_instr->type == nir_instr_type_load_const;
870 }
871
872 static inline unsigned
873 nir_dest_bit_size(nir_dest dest)
874 {
875 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
876 }
877
878 static inline unsigned
879 nir_dest_num_components(nir_dest dest)
880 {
881 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
882 }
883
884 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
885 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
886
887 typedef struct {
888 nir_src src;
889
890 /**
891 * \name input modifiers
892 */
893 /*@{*/
894 /**
895 * For inputs interpreted as floating point, flips the sign bit. For
896 * inputs interpreted as integers, performs the two's complement negation.
897 */
898 bool negate;
899
900 /**
901 * Clears the sign bit for floating point values, and computes the integer
902 * absolute value for integers. Note that the negate modifier acts after
903 * the absolute value modifier, therefore if both are set then all inputs
904 * will become negative.
905 */
906 bool abs;
907 /*@}*/
908
909 /**
910 * For each input component, says which component of the register it is
911 * chosen from. Note that which elements of the swizzle are used and which
912 * are ignored are based on the write mask for most opcodes - for example,
913 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
914 * a swizzle of {2, x, 1, 0} where x means "don't care."
915 */
916 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
917 } nir_alu_src;
918
919 typedef struct {
920 nir_dest dest;
921
922 /**
923 * \name saturate output modifier
924 *
925 * Only valid for opcodes that output floating-point numbers. Clamps the
926 * output to between 0.0 and 1.0 inclusive.
927 */
928
929 bool saturate;
930
931 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
932 } nir_alu_dest;
933
934 /** NIR sized and unsized types
935 *
936 * The values in this enum are carefully chosen so that the sized type is
937 * just the unsized type OR the number of bits.
938 */
939 typedef enum {
940 nir_type_invalid = 0, /* Not a valid type */
941 nir_type_int = 2,
942 nir_type_uint = 4,
943 nir_type_bool = 6,
944 nir_type_float = 128,
945 nir_type_bool1 = 1 | nir_type_bool,
946 nir_type_bool8 = 8 | nir_type_bool,
947 nir_type_bool16 = 16 | nir_type_bool,
948 nir_type_bool32 = 32 | nir_type_bool,
949 nir_type_int1 = 1 | nir_type_int,
950 nir_type_int8 = 8 | nir_type_int,
951 nir_type_int16 = 16 | nir_type_int,
952 nir_type_int32 = 32 | nir_type_int,
953 nir_type_int64 = 64 | nir_type_int,
954 nir_type_uint1 = 1 | nir_type_uint,
955 nir_type_uint8 = 8 | nir_type_uint,
956 nir_type_uint16 = 16 | nir_type_uint,
957 nir_type_uint32 = 32 | nir_type_uint,
958 nir_type_uint64 = 64 | nir_type_uint,
959 nir_type_float16 = 16 | nir_type_float,
960 nir_type_float32 = 32 | nir_type_float,
961 nir_type_float64 = 64 | nir_type_float,
962 } nir_alu_type;
963
964 #define NIR_ALU_TYPE_SIZE_MASK 0x79
965 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
966
967 static inline unsigned
968 nir_alu_type_get_type_size(nir_alu_type type)
969 {
970 return type & NIR_ALU_TYPE_SIZE_MASK;
971 }
972
973 static inline unsigned
974 nir_alu_type_get_base_type(nir_alu_type type)
975 {
976 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
977 }
978
979 static inline nir_alu_type
980 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
981 {
982 switch (base_type) {
983 case GLSL_TYPE_BOOL:
984 return nir_type_bool1;
985 break;
986 case GLSL_TYPE_UINT:
987 return nir_type_uint32;
988 break;
989 case GLSL_TYPE_INT:
990 return nir_type_int32;
991 break;
992 case GLSL_TYPE_UINT16:
993 return nir_type_uint16;
994 break;
995 case GLSL_TYPE_INT16:
996 return nir_type_int16;
997 break;
998 case GLSL_TYPE_UINT8:
999 return nir_type_uint8;
1000 case GLSL_TYPE_INT8:
1001 return nir_type_int8;
1002 case GLSL_TYPE_UINT64:
1003 return nir_type_uint64;
1004 break;
1005 case GLSL_TYPE_INT64:
1006 return nir_type_int64;
1007 break;
1008 case GLSL_TYPE_FLOAT:
1009 return nir_type_float32;
1010 break;
1011 case GLSL_TYPE_FLOAT16:
1012 return nir_type_float16;
1013 break;
1014 case GLSL_TYPE_DOUBLE:
1015 return nir_type_float64;
1016 break;
1017
1018 case GLSL_TYPE_SAMPLER:
1019 case GLSL_TYPE_IMAGE:
1020 case GLSL_TYPE_ATOMIC_UINT:
1021 case GLSL_TYPE_STRUCT:
1022 case GLSL_TYPE_INTERFACE:
1023 case GLSL_TYPE_ARRAY:
1024 case GLSL_TYPE_VOID:
1025 case GLSL_TYPE_SUBROUTINE:
1026 case GLSL_TYPE_FUNCTION:
1027 case GLSL_TYPE_ERROR:
1028 return nir_type_invalid;
1029 }
1030
1031 unreachable("unknown type");
1032 }
1033
1034 static inline nir_alu_type
1035 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1036 {
1037 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1038 }
1039
1040 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1041 nir_rounding_mode rnd);
1042
1043 static inline nir_op
1044 nir_op_vec(unsigned components)
1045 {
1046 switch (components) {
1047 case 1: return nir_op_mov;
1048 case 2: return nir_op_vec2;
1049 case 3: return nir_op_vec3;
1050 case 4: return nir_op_vec4;
1051 case 8: return nir_op_vec8;
1052 case 16: return nir_op_vec16;
1053 default: unreachable("bad component count");
1054 }
1055 }
1056
1057 static inline bool
1058 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1059 {
1060 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1061 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1062 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1063 }
1064
1065 static inline bool
1066 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1067 {
1068 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1069 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1070 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1071 }
1072
1073 static inline bool
1074 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1075 {
1076 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1077 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1078 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1079 }
1080
1081 static inline bool
1082 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1083 {
1084 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1085 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1086 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1087 }
1088
1089 static inline bool
1090 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1091 {
1092 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1093 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1094 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1095 }
1096
1097 static inline bool
1098 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1099 {
1100 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1101 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1102 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1103 }
1104
1105 static inline bool
1106 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1107 {
1108 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1109 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1110 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1111 }
1112
1113 static inline nir_rounding_mode
1114 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1115 nir_alu_type type)
1116 {
1117 if (nir_alu_type_get_base_type(type) != nir_type_float)
1118 return nir_rounding_mode_undef;
1119
1120 unsigned bit_size = nir_alu_type_get_type_size(type);
1121
1122 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1123 return nir_rounding_mode_rtz;
1124 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1125 return nir_rounding_mode_rtne;
1126 return nir_rounding_mode_undef;
1127 }
1128
1129 static inline bool
1130 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1131 {
1132 bool result =
1133 nir_has_any_rounding_mode_rtne(execution_mode) ||
1134 nir_has_any_rounding_mode_rtz(execution_mode);
1135 return result;
1136 }
1137
1138 typedef enum {
1139 /**
1140 * Operation where the first two sources are commutative.
1141 *
1142 * For 2-source operations, this just mathematical commutativity. Some
1143 * 3-source operations, like ffma, are only commutative in the first two
1144 * sources.
1145 */
1146 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1147 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1148 } nir_op_algebraic_property;
1149
1150 typedef struct {
1151 const char *name;
1152
1153 unsigned num_inputs;
1154
1155 /**
1156 * The number of components in the output
1157 *
1158 * If non-zero, this is the size of the output and input sizes are
1159 * explicitly given; swizzle and writemask are still in effect, but if
1160 * the output component is masked out, then the input component may
1161 * still be in use.
1162 *
1163 * If zero, the opcode acts in the standard, per-component manner; the
1164 * operation is performed on each component (except the ones that are
1165 * masked out) with the input being taken from the input swizzle for
1166 * that component.
1167 *
1168 * The size of some of the inputs may be given (i.e. non-zero) even
1169 * though output_size is zero; in that case, the inputs with a zero
1170 * size act per-component, while the inputs with non-zero size don't.
1171 */
1172 unsigned output_size;
1173
1174 /**
1175 * The type of vector that the instruction outputs. Note that the
1176 * staurate modifier is only allowed on outputs with the float type.
1177 */
1178
1179 nir_alu_type output_type;
1180
1181 /**
1182 * The number of components in each input
1183 */
1184 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1185
1186 /**
1187 * The type of vector that each input takes. Note that negate and
1188 * absolute value are only allowed on inputs with int or float type and
1189 * behave differently on the two.
1190 */
1191 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1192
1193 nir_op_algebraic_property algebraic_properties;
1194
1195 /* Whether this represents a numeric conversion opcode */
1196 bool is_conversion;
1197 } nir_op_info;
1198
1199 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1200
1201 typedef struct nir_alu_instr {
1202 nir_instr instr;
1203 nir_op op;
1204
1205 /** Indicates that this ALU instruction generates an exact value
1206 *
1207 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1208 * really equivalent to either. This indicates that the value generated by
1209 * this operation is high-precision and any code transformations that touch
1210 * it must ensure that the resulting value is bit-for-bit identical to the
1211 * original.
1212 */
1213 bool exact:1;
1214
1215 /**
1216 * Indicates that this instruction do not cause wrapping to occur, in the
1217 * form of overflow or underflow.
1218 */
1219 bool no_signed_wrap:1;
1220 bool no_unsigned_wrap:1;
1221
1222 nir_alu_dest dest;
1223 nir_alu_src src[];
1224 } nir_alu_instr;
1225
1226 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1227 nir_alu_instr *instr);
1228 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1229 nir_alu_instr *instr);
1230
1231 /* is this source channel used? */
1232 static inline bool
1233 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1234 unsigned channel)
1235 {
1236 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1237 return channel < nir_op_infos[instr->op].input_sizes[src];
1238
1239 return (instr->dest.write_mask >> channel) & 1;
1240 }
1241
1242 static inline nir_component_mask_t
1243 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1244 {
1245 nir_component_mask_t read_mask = 0;
1246 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1247 if (!nir_alu_instr_channel_used(instr, src, c))
1248 continue;
1249
1250 read_mask |= (1 << instr->src[src].swizzle[c]);
1251 }
1252 return read_mask;
1253 }
1254
1255 /**
1256 * Get the number of channels used for a source
1257 */
1258 static inline unsigned
1259 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1260 {
1261 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1262 return nir_op_infos[instr->op].input_sizes[src];
1263
1264 return nir_dest_num_components(instr->dest.dest);
1265 }
1266
1267 static inline bool
1268 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1269 {
1270 switch (instr->op) {
1271 case nir_op_flt:
1272 case nir_op_fge:
1273 case nir_op_feq:
1274 case nir_op_fne:
1275 case nir_op_ilt:
1276 case nir_op_ult:
1277 case nir_op_ige:
1278 case nir_op_uge:
1279 case nir_op_ieq:
1280 case nir_op_ine:
1281 case nir_op_i2b1:
1282 case nir_op_f2b1:
1283 case nir_op_inot:
1284 return true;
1285 default:
1286 return false;
1287 }
1288 }
1289
1290 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1291 nir_alu_type full_type);
1292
1293 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1294 unsigned src1, unsigned src2);
1295
1296 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1297 const nir_alu_instr *alu2,
1298 unsigned src1, unsigned src2);
1299
1300 typedef enum {
1301 nir_deref_type_var,
1302 nir_deref_type_array,
1303 nir_deref_type_array_wildcard,
1304 nir_deref_type_ptr_as_array,
1305 nir_deref_type_struct,
1306 nir_deref_type_cast,
1307 } nir_deref_type;
1308
1309 typedef struct {
1310 nir_instr instr;
1311
1312 /** The type of this deref instruction */
1313 nir_deref_type deref_type;
1314
1315 /** The mode of the underlying variable */
1316 nir_variable_mode mode;
1317
1318 /** The dereferenced type of the resulting pointer value */
1319 const struct glsl_type *type;
1320
1321 union {
1322 /** Variable being dereferenced if deref_type is a deref_var */
1323 nir_variable *var;
1324
1325 /** Parent deref if deref_type is not deref_var */
1326 nir_src parent;
1327 };
1328
1329 /** Additional deref parameters */
1330 union {
1331 struct {
1332 nir_src index;
1333 } arr;
1334
1335 struct {
1336 unsigned index;
1337 } strct;
1338
1339 struct {
1340 unsigned ptr_stride;
1341 } cast;
1342 };
1343
1344 /** Destination to store the resulting "pointer" */
1345 nir_dest dest;
1346 } nir_deref_instr;
1347
1348 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1349
1350 static inline nir_deref_instr *
1351 nir_deref_instr_parent(const nir_deref_instr *instr)
1352 {
1353 if (instr->deref_type == nir_deref_type_var)
1354 return NULL;
1355 else
1356 return nir_src_as_deref(instr->parent);
1357 }
1358
1359 static inline nir_variable *
1360 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1361 {
1362 while (instr->deref_type != nir_deref_type_var) {
1363 if (instr->deref_type == nir_deref_type_cast)
1364 return NULL;
1365
1366 instr = nir_deref_instr_parent(instr);
1367 }
1368
1369 return instr->var;
1370 }
1371
1372 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1373 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1374 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1375
1376 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1377
1378 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1379
1380 typedef struct {
1381 nir_instr instr;
1382
1383 struct nir_function *callee;
1384
1385 unsigned num_params;
1386 nir_src params[];
1387 } nir_call_instr;
1388
1389 #include "nir_intrinsics.h"
1390
1391 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1392
1393 /** Represents an intrinsic
1394 *
1395 * An intrinsic is an instruction type for handling things that are
1396 * more-or-less regular operations but don't just consume and produce SSA
1397 * values like ALU operations do. Intrinsics are not for things that have
1398 * special semantic meaning such as phi nodes and parallel copies.
1399 * Examples of intrinsics include variable load/store operations, system
1400 * value loads, and the like. Even though texturing more-or-less falls
1401 * under this category, texturing is its own instruction type because
1402 * trying to represent texturing with intrinsics would lead to a
1403 * combinatorial explosion of intrinsic opcodes.
1404 *
1405 * By having a single instruction type for handling a lot of different
1406 * cases, optimization passes can look for intrinsics and, for the most
1407 * part, completely ignore them. Each intrinsic type also has a few
1408 * possible flags that govern whether or not they can be reordered or
1409 * eliminated. That way passes like dead code elimination can still work
1410 * on intrisics without understanding the meaning of each.
1411 *
1412 * Each intrinsic has some number of constant indices, some number of
1413 * variables, and some number of sources. What these sources, variables,
1414 * and indices mean depends on the intrinsic and is documented with the
1415 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1416 * instructions are the only types of instruction that can operate on
1417 * variables.
1418 */
1419 typedef struct {
1420 nir_instr instr;
1421
1422 nir_intrinsic_op intrinsic;
1423
1424 nir_dest dest;
1425
1426 /** number of components if this is a vectorized intrinsic
1427 *
1428 * Similarly to ALU operations, some intrinsics are vectorized.
1429 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1430 * For vectorized intrinsics, the num_components field specifies the
1431 * number of destination components and the number of source components
1432 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1433 */
1434 uint8_t num_components;
1435
1436 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1437
1438 nir_src src[];
1439 } nir_intrinsic_instr;
1440
1441 static inline nir_variable *
1442 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1443 {
1444 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1445 }
1446
1447 typedef enum {
1448 /* Memory ordering. */
1449 NIR_MEMORY_ACQUIRE = 1 << 0,
1450 NIR_MEMORY_RELEASE = 1 << 1,
1451 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1452
1453 /* Memory visibility operations. */
1454 NIR_MEMORY_MAKE_AVAILABLE = 1 << 3,
1455 NIR_MEMORY_MAKE_VISIBLE = 1 << 4,
1456 } nir_memory_semantics;
1457
1458 typedef enum {
1459 NIR_SCOPE_DEVICE,
1460 NIR_SCOPE_QUEUE_FAMILY,
1461 NIR_SCOPE_WORKGROUP,
1462 NIR_SCOPE_SUBGROUP,
1463 NIR_SCOPE_INVOCATION,
1464 } nir_scope;
1465
1466 /**
1467 * \name NIR intrinsics semantic flags
1468 *
1469 * information about what the compiler can do with the intrinsics.
1470 *
1471 * \sa nir_intrinsic_info::flags
1472 */
1473 typedef enum {
1474 /**
1475 * whether the intrinsic can be safely eliminated if none of its output
1476 * value is not being used.
1477 */
1478 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1479
1480 /**
1481 * Whether the intrinsic can be reordered with respect to any other
1482 * intrinsic, i.e. whether the only reordering dependencies of the
1483 * intrinsic are due to the register reads/writes.
1484 */
1485 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1486 } nir_intrinsic_semantic_flag;
1487
1488 /**
1489 * \name NIR intrinsics const-index flag
1490 *
1491 * Indicates the usage of a const_index slot.
1492 *
1493 * \sa nir_intrinsic_info::index_map
1494 */
1495 typedef enum {
1496 /**
1497 * Generally instructions that take a offset src argument, can encode
1498 * a constant 'base' value which is added to the offset.
1499 */
1500 NIR_INTRINSIC_BASE = 1,
1501
1502 /**
1503 * For store instructions, a writemask for the store.
1504 */
1505 NIR_INTRINSIC_WRMASK,
1506
1507 /**
1508 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1509 */
1510 NIR_INTRINSIC_STREAM_ID,
1511
1512 /**
1513 * The clip-plane id for load_user_clip_plane intrinsic.
1514 */
1515 NIR_INTRINSIC_UCP_ID,
1516
1517 /**
1518 * The amount of data, starting from BASE, that this instruction may
1519 * access. This is used to provide bounds if the offset is not constant.
1520 */
1521 NIR_INTRINSIC_RANGE,
1522
1523 /**
1524 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1525 */
1526 NIR_INTRINSIC_DESC_SET,
1527
1528 /**
1529 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1530 */
1531 NIR_INTRINSIC_BINDING,
1532
1533 /**
1534 * Component offset.
1535 */
1536 NIR_INTRINSIC_COMPONENT,
1537
1538 /**
1539 * Interpolation mode (only meaningful for FS inputs).
1540 */
1541 NIR_INTRINSIC_INTERP_MODE,
1542
1543 /**
1544 * A binary nir_op to use when performing a reduction or scan operation
1545 */
1546 NIR_INTRINSIC_REDUCTION_OP,
1547
1548 /**
1549 * Cluster size for reduction operations
1550 */
1551 NIR_INTRINSIC_CLUSTER_SIZE,
1552
1553 /**
1554 * Parameter index for a load_param intrinsic
1555 */
1556 NIR_INTRINSIC_PARAM_IDX,
1557
1558 /**
1559 * Image dimensionality for image intrinsics
1560 *
1561 * One of GLSL_SAMPLER_DIM_*
1562 */
1563 NIR_INTRINSIC_IMAGE_DIM,
1564
1565 /**
1566 * Non-zero if we are accessing an array image
1567 */
1568 NIR_INTRINSIC_IMAGE_ARRAY,
1569
1570 /**
1571 * Image format for image intrinsics
1572 */
1573 NIR_INTRINSIC_FORMAT,
1574
1575 /**
1576 * Access qualifiers for image and memory access intrinsics
1577 */
1578 NIR_INTRINSIC_ACCESS,
1579
1580 /**
1581 * Alignment for offsets and addresses
1582 *
1583 * These two parameters, specify an alignment in terms of a multiplier and
1584 * an offset. The offset or address parameter X of the intrinsic is
1585 * guaranteed to satisfy the following:
1586 *
1587 * (X - align_offset) % align_mul == 0
1588 */
1589 NIR_INTRINSIC_ALIGN_MUL,
1590 NIR_INTRINSIC_ALIGN_OFFSET,
1591
1592 /**
1593 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1594 */
1595 NIR_INTRINSIC_DESC_TYPE,
1596
1597 /**
1598 * The nir_alu_type of a uniform/input/output
1599 */
1600 NIR_INTRINSIC_TYPE,
1601
1602 /**
1603 * The swizzle mask for the instructions
1604 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1605 */
1606 NIR_INTRINSIC_SWIZZLE_MASK,
1607
1608 /* Separate source/dest access flags for copies */
1609 NIR_INTRINSIC_SRC_ACCESS,
1610 NIR_INTRINSIC_DST_ACCESS,
1611
1612 /* Driver location for nir_load_patch_location_ir3 */
1613 NIR_INTRINSIC_DRIVER_LOCATION,
1614
1615 /**
1616 * Mask of nir_memory_semantics, includes ordering and visibility.
1617 */
1618 NIR_INTRINSIC_MEMORY_SEMANTICS,
1619
1620 /**
1621 * Mask of nir_variable_modes affected by the memory operation.
1622 */
1623 NIR_INTRINSIC_MEMORY_MODES,
1624
1625 /**
1626 * Value of nir_scope.
1627 */
1628 NIR_INTRINSIC_MEMORY_SCOPE,
1629
1630 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1631
1632 } nir_intrinsic_index_flag;
1633
1634 #define NIR_INTRINSIC_MAX_INPUTS 5
1635
1636 typedef struct {
1637 const char *name;
1638
1639 unsigned num_srcs; /** < number of register/SSA inputs */
1640
1641 /** number of components of each input register
1642 *
1643 * If this value is 0, the number of components is given by the
1644 * num_components field of nir_intrinsic_instr. If this value is -1, the
1645 * intrinsic consumes however many components are provided and it is not
1646 * validated at all.
1647 */
1648 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1649
1650 bool has_dest;
1651
1652 /** number of components of the output register
1653 *
1654 * If this value is 0, the number of components is given by the
1655 * num_components field of nir_intrinsic_instr.
1656 */
1657 unsigned dest_components;
1658
1659 /** bitfield of legal bit sizes */
1660 unsigned dest_bit_sizes;
1661
1662 /** the number of constant indices used by the intrinsic */
1663 unsigned num_indices;
1664
1665 /** indicates the usage of intr->const_index[n] */
1666 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1667
1668 /** semantic flags for calls to this intrinsic */
1669 nir_intrinsic_semantic_flag flags;
1670 } nir_intrinsic_info;
1671
1672 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1673
1674 static inline unsigned
1675 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1676 {
1677 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1678 assert(srcn < info->num_srcs);
1679 if (info->src_components[srcn] > 0)
1680 return info->src_components[srcn];
1681 else if (info->src_components[srcn] == 0)
1682 return intr->num_components;
1683 else
1684 return nir_src_num_components(intr->src[srcn]);
1685 }
1686
1687 static inline unsigned
1688 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1689 {
1690 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1691 if (!info->has_dest)
1692 return 0;
1693 else if (info->dest_components)
1694 return info->dest_components;
1695 else
1696 return intr->num_components;
1697 }
1698
1699 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1700 static inline type \
1701 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1702 { \
1703 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1704 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1705 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1706 } \
1707 static inline void \
1708 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1709 { \
1710 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1711 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1712 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1713 }
1714
1715 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1716 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1717 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1718 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1719 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1720 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1721 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1722 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1723 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1724 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1725 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1726 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1727 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1728 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1729 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1730 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1731 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1732 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1733 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1734 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1735 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1736 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1737 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1738 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1739 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1740 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1741 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1742
1743 static inline void
1744 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1745 unsigned align_mul, unsigned align_offset)
1746 {
1747 assert(util_is_power_of_two_nonzero(align_mul));
1748 assert(align_offset < align_mul);
1749 nir_intrinsic_set_align_mul(intrin, align_mul);
1750 nir_intrinsic_set_align_offset(intrin, align_offset);
1751 }
1752
1753 /** Returns a simple alignment for a load/store intrinsic offset
1754 *
1755 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1756 * and ALIGN_OFFSET parameters, this helper takes both into account and
1757 * provides a single simple alignment parameter. The offset X is guaranteed
1758 * to satisfy X % align == 0.
1759 */
1760 static inline unsigned
1761 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1762 {
1763 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1764 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1765 assert(align_offset < align_mul);
1766 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1767 }
1768
1769 unsigned
1770 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1771
1772 /* Converts a image_deref_* intrinsic into a image_* one */
1773 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1774 nir_ssa_def *handle, bool bindless);
1775
1776 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1777 static inline bool
1778 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1779 {
1780 if (instr->intrinsic == nir_intrinsic_load_deref ||
1781 instr->intrinsic == nir_intrinsic_load_ssbo ||
1782 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1783 instr->intrinsic == nir_intrinsic_image_deref_load ||
1784 instr->intrinsic == nir_intrinsic_image_load) {
1785 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1786 } else {
1787 const nir_intrinsic_info *info =
1788 &nir_intrinsic_infos[instr->intrinsic];
1789 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1790 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1791 }
1792 }
1793
1794 /**
1795 * \group texture information
1796 *
1797 * This gives semantic information about textures which is useful to the
1798 * frontend, the backend, and lowering passes, but not the optimizer.
1799 */
1800
1801 typedef enum {
1802 nir_tex_src_coord,
1803 nir_tex_src_projector,
1804 nir_tex_src_comparator, /* shadow comparator */
1805 nir_tex_src_offset,
1806 nir_tex_src_bias,
1807 nir_tex_src_lod,
1808 nir_tex_src_min_lod,
1809 nir_tex_src_ms_index, /* MSAA sample index */
1810 nir_tex_src_ms_mcs, /* MSAA compression value */
1811 nir_tex_src_ddx,
1812 nir_tex_src_ddy,
1813 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1814 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1815 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1816 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1817 nir_tex_src_texture_handle, /* < bindless texture handle */
1818 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1819 nir_tex_src_plane, /* < selects plane for planar textures */
1820 nir_num_tex_src_types
1821 } nir_tex_src_type;
1822
1823 typedef struct {
1824 nir_src src;
1825 nir_tex_src_type src_type;
1826 } nir_tex_src;
1827
1828 typedef enum {
1829 nir_texop_tex, /**< Regular texture look-up */
1830 nir_texop_txb, /**< Texture look-up with LOD bias */
1831 nir_texop_txl, /**< Texture look-up with explicit LOD */
1832 nir_texop_txd, /**< Texture look-up with partial derivatives */
1833 nir_texop_txf, /**< Texel fetch with explicit LOD */
1834 nir_texop_txf_ms, /**< Multisample texture fetch */
1835 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1836 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1837 nir_texop_txs, /**< Texture size */
1838 nir_texop_lod, /**< Texture lod query */
1839 nir_texop_tg4, /**< Texture gather */
1840 nir_texop_query_levels, /**< Texture levels query */
1841 nir_texop_texture_samples, /**< Texture samples query */
1842 nir_texop_samples_identical, /**< Query whether all samples are definitely
1843 * identical.
1844 */
1845 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1846 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1847 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1848 } nir_texop;
1849
1850 typedef struct {
1851 nir_instr instr;
1852
1853 enum glsl_sampler_dim sampler_dim;
1854 nir_alu_type dest_type;
1855
1856 nir_texop op;
1857 nir_dest dest;
1858 nir_tex_src *src;
1859 unsigned num_srcs, coord_components;
1860 bool is_array, is_shadow;
1861
1862 /**
1863 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1864 * components or the new-style shadow that outputs 1 component.
1865 */
1866 bool is_new_style_shadow;
1867
1868 /* gather component selector */
1869 unsigned component : 2;
1870
1871 /* gather offsets */
1872 int8_t tg4_offsets[4][2];
1873
1874 /* True if the texture index or handle is not dynamically uniform */
1875 bool texture_non_uniform;
1876
1877 /* True if the sampler index or handle is not dynamically uniform */
1878 bool sampler_non_uniform;
1879
1880 /** The texture index
1881 *
1882 * If this texture instruction has a nir_tex_src_texture_offset source,
1883 * then the texture index is given by texture_index + texture_offset.
1884 */
1885 unsigned texture_index;
1886
1887 /** The sampler index
1888 *
1889 * The following operations do not require a sampler and, as such, this
1890 * field should be ignored:
1891 * - nir_texop_txf
1892 * - nir_texop_txf_ms
1893 * - nir_texop_txs
1894 * - nir_texop_lod
1895 * - nir_texop_query_levels
1896 * - nir_texop_texture_samples
1897 * - nir_texop_samples_identical
1898 *
1899 * If this texture instruction has a nir_tex_src_sampler_offset source,
1900 * then the sampler index is given by sampler_index + sampler_offset.
1901 */
1902 unsigned sampler_index;
1903 } nir_tex_instr;
1904
1905 static inline unsigned
1906 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1907 {
1908 switch (instr->op) {
1909 case nir_texop_txs: {
1910 unsigned ret;
1911 switch (instr->sampler_dim) {
1912 case GLSL_SAMPLER_DIM_1D:
1913 case GLSL_SAMPLER_DIM_BUF:
1914 ret = 1;
1915 break;
1916 case GLSL_SAMPLER_DIM_2D:
1917 case GLSL_SAMPLER_DIM_CUBE:
1918 case GLSL_SAMPLER_DIM_MS:
1919 case GLSL_SAMPLER_DIM_RECT:
1920 case GLSL_SAMPLER_DIM_EXTERNAL:
1921 case GLSL_SAMPLER_DIM_SUBPASS:
1922 ret = 2;
1923 break;
1924 case GLSL_SAMPLER_DIM_3D:
1925 ret = 3;
1926 break;
1927 default:
1928 unreachable("not reached");
1929 }
1930 if (instr->is_array)
1931 ret++;
1932 return ret;
1933 }
1934
1935 case nir_texop_lod:
1936 return 2;
1937
1938 case nir_texop_texture_samples:
1939 case nir_texop_query_levels:
1940 case nir_texop_samples_identical:
1941 case nir_texop_fragment_mask_fetch:
1942 return 1;
1943
1944 default:
1945 if (instr->is_shadow && instr->is_new_style_shadow)
1946 return 1;
1947
1948 return 4;
1949 }
1950 }
1951
1952 /* Returns true if this texture operation queries something about the texture
1953 * rather than actually sampling it.
1954 */
1955 static inline bool
1956 nir_tex_instr_is_query(const nir_tex_instr *instr)
1957 {
1958 switch (instr->op) {
1959 case nir_texop_txs:
1960 case nir_texop_lod:
1961 case nir_texop_texture_samples:
1962 case nir_texop_query_levels:
1963 case nir_texop_txf_ms_mcs:
1964 return true;
1965 case nir_texop_tex:
1966 case nir_texop_txb:
1967 case nir_texop_txl:
1968 case nir_texop_txd:
1969 case nir_texop_txf:
1970 case nir_texop_txf_ms:
1971 case nir_texop_txf_ms_fb:
1972 case nir_texop_tg4:
1973 return false;
1974 default:
1975 unreachable("Invalid texture opcode");
1976 }
1977 }
1978
1979 static inline bool
1980 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1981 {
1982 switch (instr->op) {
1983 case nir_texop_tex:
1984 case nir_texop_txb:
1985 case nir_texop_lod:
1986 return true;
1987 default:
1988 return false;
1989 }
1990 }
1991
1992 static inline nir_alu_type
1993 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1994 {
1995 switch (instr->src[src].src_type) {
1996 case nir_tex_src_coord:
1997 switch (instr->op) {
1998 case nir_texop_txf:
1999 case nir_texop_txf_ms:
2000 case nir_texop_txf_ms_fb:
2001 case nir_texop_txf_ms_mcs:
2002 case nir_texop_samples_identical:
2003 return nir_type_int;
2004
2005 default:
2006 return nir_type_float;
2007 }
2008
2009 case nir_tex_src_lod:
2010 switch (instr->op) {
2011 case nir_texop_txs:
2012 case nir_texop_txf:
2013 return nir_type_int;
2014
2015 default:
2016 return nir_type_float;
2017 }
2018
2019 case nir_tex_src_projector:
2020 case nir_tex_src_comparator:
2021 case nir_tex_src_bias:
2022 case nir_tex_src_min_lod:
2023 case nir_tex_src_ddx:
2024 case nir_tex_src_ddy:
2025 return nir_type_float;
2026
2027 case nir_tex_src_offset:
2028 case nir_tex_src_ms_index:
2029 case nir_tex_src_plane:
2030 return nir_type_int;
2031
2032 case nir_tex_src_ms_mcs:
2033 case nir_tex_src_texture_deref:
2034 case nir_tex_src_sampler_deref:
2035 case nir_tex_src_texture_offset:
2036 case nir_tex_src_sampler_offset:
2037 case nir_tex_src_texture_handle:
2038 case nir_tex_src_sampler_handle:
2039 return nir_type_uint;
2040
2041 case nir_num_tex_src_types:
2042 unreachable("nir_num_tex_src_types is not a valid source type");
2043 }
2044
2045 unreachable("Invalid texture source type");
2046 }
2047
2048 static inline unsigned
2049 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2050 {
2051 if (instr->src[src].src_type == nir_tex_src_coord)
2052 return instr->coord_components;
2053
2054 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2055 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2056 return 4;
2057
2058 if (instr->src[src].src_type == nir_tex_src_ddx ||
2059 instr->src[src].src_type == nir_tex_src_ddy) {
2060 if (instr->is_array)
2061 return instr->coord_components - 1;
2062 else
2063 return instr->coord_components;
2064 }
2065
2066 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2067 * the offset, since a cube maps to a single face.
2068 */
2069 if (instr->src[src].src_type == nir_tex_src_offset) {
2070 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2071 return 2;
2072 else if (instr->is_array)
2073 return instr->coord_components - 1;
2074 else
2075 return instr->coord_components;
2076 }
2077
2078 return 1;
2079 }
2080
2081 static inline int
2082 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2083 {
2084 for (unsigned i = 0; i < instr->num_srcs; i++)
2085 if (instr->src[i].src_type == type)
2086 return (int) i;
2087
2088 return -1;
2089 }
2090
2091 void nir_tex_instr_add_src(nir_tex_instr *tex,
2092 nir_tex_src_type src_type,
2093 nir_src src);
2094
2095 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2096
2097 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2098
2099 typedef struct {
2100 nir_instr instr;
2101
2102 nir_ssa_def def;
2103
2104 nir_const_value value[];
2105 } nir_load_const_instr;
2106
2107 typedef enum {
2108 nir_jump_return,
2109 nir_jump_break,
2110 nir_jump_continue,
2111 } nir_jump_type;
2112
2113 typedef struct {
2114 nir_instr instr;
2115 nir_jump_type type;
2116 } nir_jump_instr;
2117
2118 /* creates a new SSA variable in an undefined state */
2119
2120 typedef struct {
2121 nir_instr instr;
2122 nir_ssa_def def;
2123 } nir_ssa_undef_instr;
2124
2125 typedef struct {
2126 struct exec_node node;
2127
2128 /* The predecessor block corresponding to this source */
2129 struct nir_block *pred;
2130
2131 nir_src src;
2132 } nir_phi_src;
2133
2134 #define nir_foreach_phi_src(phi_src, phi) \
2135 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2136 #define nir_foreach_phi_src_safe(phi_src, phi) \
2137 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2138
2139 typedef struct {
2140 nir_instr instr;
2141
2142 struct exec_list srcs; /** < list of nir_phi_src */
2143
2144 nir_dest dest;
2145 } nir_phi_instr;
2146
2147 typedef struct {
2148 struct exec_node node;
2149 nir_src src;
2150 nir_dest dest;
2151 } nir_parallel_copy_entry;
2152
2153 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2154 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2155
2156 typedef struct {
2157 nir_instr instr;
2158
2159 /* A list of nir_parallel_copy_entrys. The sources of all of the
2160 * entries are copied to the corresponding destinations "in parallel".
2161 * In other words, if we have two entries: a -> b and b -> a, the values
2162 * get swapped.
2163 */
2164 struct exec_list entries;
2165 } nir_parallel_copy_instr;
2166
2167 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2168 type, nir_instr_type_alu)
2169 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2170 type, nir_instr_type_deref)
2171 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2172 type, nir_instr_type_call)
2173 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2174 type, nir_instr_type_jump)
2175 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2176 type, nir_instr_type_tex)
2177 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2178 type, nir_instr_type_intrinsic)
2179 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2180 type, nir_instr_type_load_const)
2181 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2182 type, nir_instr_type_ssa_undef)
2183 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2184 type, nir_instr_type_phi)
2185 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2186 nir_parallel_copy_instr, instr,
2187 type, nir_instr_type_parallel_copy)
2188
2189
2190 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2191 static inline type \
2192 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2193 { \
2194 assert(nir_src_is_const(src)); \
2195 nir_load_const_instr *load = \
2196 nir_instr_as_load_const(src.ssa->parent_instr); \
2197 assert(comp < load->def.num_components); \
2198 return nir_const_value_as_##suffix(load->value[comp], \
2199 load->def.bit_size); \
2200 } \
2201 \
2202 static inline type \
2203 nir_src_as_##suffix(nir_src src) \
2204 { \
2205 assert(nir_src_num_components(src) == 1); \
2206 return nir_src_comp_as_##suffix(src, 0); \
2207 }
2208
2209 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2210 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2211 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2212 NIR_DEFINE_SRC_AS_CONST(double, float)
2213
2214 #undef NIR_DEFINE_SRC_AS_CONST
2215
2216
2217 typedef struct {
2218 nir_ssa_def *def;
2219 unsigned comp;
2220 } nir_ssa_scalar;
2221
2222 static inline bool
2223 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2224 {
2225 return s.def->parent_instr->type == nir_instr_type_load_const;
2226 }
2227
2228 static inline nir_const_value
2229 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2230 {
2231 assert(s.comp < s.def->num_components);
2232 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2233 return load->value[s.comp];
2234 }
2235
2236 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2237 static inline type \
2238 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2239 { \
2240 return nir_const_value_as_##suffix( \
2241 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2242 }
2243
2244 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2245 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2246 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2247 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2248
2249 #undef NIR_DEFINE_SCALAR_AS_CONST
2250
2251 static inline bool
2252 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2253 {
2254 return s.def->parent_instr->type == nir_instr_type_alu;
2255 }
2256
2257 static inline nir_op
2258 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2259 {
2260 return nir_instr_as_alu(s.def->parent_instr)->op;
2261 }
2262
2263 static inline nir_ssa_scalar
2264 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2265 {
2266 nir_ssa_scalar out = { NULL, 0 };
2267
2268 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2269 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2270
2271 /* Our component must be written */
2272 assert(s.comp < s.def->num_components);
2273 assert(alu->dest.write_mask & (1u << s.comp));
2274
2275 assert(alu->src[alu_src_idx].src.is_ssa);
2276 out.def = alu->src[alu_src_idx].src.ssa;
2277
2278 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2279 /* The ALU src is unsized so the source component follows the
2280 * destination component.
2281 */
2282 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2283 } else {
2284 /* This is a sized source so all source components work together to
2285 * produce all the destination components. Since we need to return a
2286 * scalar, this only works if the source is a scalar.
2287 */
2288 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2289 out.comp = alu->src[alu_src_idx].swizzle[0];
2290 }
2291 assert(out.comp < out.def->num_components);
2292
2293 return out;
2294 }
2295
2296
2297 /*
2298 * Control flow
2299 *
2300 * Control flow consists of a tree of control flow nodes, which include
2301 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2302 * instructions that always run start-to-finish. Each basic block also keeps
2303 * track of its successors (blocks which may run immediately after the current
2304 * block) and predecessors (blocks which could have run immediately before the
2305 * current block). Each function also has a start block and an end block which
2306 * all return statements point to (which is always empty). Together, all the
2307 * blocks with their predecessors and successors make up the control flow
2308 * graph (CFG) of the function. There are helpers that modify the tree of
2309 * control flow nodes while modifying the CFG appropriately; these should be
2310 * used instead of modifying the tree directly.
2311 */
2312
2313 typedef enum {
2314 nir_cf_node_block,
2315 nir_cf_node_if,
2316 nir_cf_node_loop,
2317 nir_cf_node_function
2318 } nir_cf_node_type;
2319
2320 typedef struct nir_cf_node {
2321 struct exec_node node;
2322 nir_cf_node_type type;
2323 struct nir_cf_node *parent;
2324 } nir_cf_node;
2325
2326 typedef struct nir_block {
2327 nir_cf_node cf_node;
2328
2329 struct exec_list instr_list; /** < list of nir_instr */
2330
2331 /** generic block index; generated by nir_index_blocks */
2332 unsigned index;
2333
2334 /*
2335 * Each block can only have up to 2 successors, so we put them in a simple
2336 * array - no need for anything more complicated.
2337 */
2338 struct nir_block *successors[2];
2339
2340 /* Set of nir_block predecessors in the CFG */
2341 struct set *predecessors;
2342
2343 /*
2344 * this node's immediate dominator in the dominance tree - set to NULL for
2345 * the start block.
2346 */
2347 struct nir_block *imm_dom;
2348
2349 /* This node's children in the dominance tree */
2350 unsigned num_dom_children;
2351 struct nir_block **dom_children;
2352
2353 /* Set of nir_blocks on the dominance frontier of this block */
2354 struct set *dom_frontier;
2355
2356 /*
2357 * These two indices have the property that dom_{pre,post}_index for each
2358 * child of this block in the dominance tree will always be between
2359 * dom_pre_index and dom_post_index for this block, which makes testing if
2360 * a given block is dominated by another block an O(1) operation.
2361 */
2362 unsigned dom_pre_index, dom_post_index;
2363
2364 /* live in and out for this block; used for liveness analysis */
2365 BITSET_WORD *live_in;
2366 BITSET_WORD *live_out;
2367 } nir_block;
2368
2369 static inline nir_instr *
2370 nir_block_first_instr(nir_block *block)
2371 {
2372 struct exec_node *head = exec_list_get_head(&block->instr_list);
2373 return exec_node_data(nir_instr, head, node);
2374 }
2375
2376 static inline nir_instr *
2377 nir_block_last_instr(nir_block *block)
2378 {
2379 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2380 return exec_node_data(nir_instr, tail, node);
2381 }
2382
2383 static inline bool
2384 nir_block_ends_in_jump(nir_block *block)
2385 {
2386 return !exec_list_is_empty(&block->instr_list) &&
2387 nir_block_last_instr(block)->type == nir_instr_type_jump;
2388 }
2389
2390 #define nir_foreach_instr(instr, block) \
2391 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2392 #define nir_foreach_instr_reverse(instr, block) \
2393 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2394 #define nir_foreach_instr_safe(instr, block) \
2395 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2396 #define nir_foreach_instr_reverse_safe(instr, block) \
2397 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2398
2399 typedef enum {
2400 nir_selection_control_none = 0x0,
2401 nir_selection_control_flatten = 0x1,
2402 nir_selection_control_dont_flatten = 0x2,
2403 } nir_selection_control;
2404
2405 typedef struct nir_if {
2406 nir_cf_node cf_node;
2407 nir_src condition;
2408 nir_selection_control control;
2409
2410 struct exec_list then_list; /** < list of nir_cf_node */
2411 struct exec_list else_list; /** < list of nir_cf_node */
2412 } nir_if;
2413
2414 typedef struct {
2415 nir_if *nif;
2416
2417 /** Instruction that generates nif::condition. */
2418 nir_instr *conditional_instr;
2419
2420 /** Block within ::nif that has the break instruction. */
2421 nir_block *break_block;
2422
2423 /** Last block for the then- or else-path that does not contain the break. */
2424 nir_block *continue_from_block;
2425
2426 /** True when ::break_block is in the else-path of ::nif. */
2427 bool continue_from_then;
2428 bool induction_rhs;
2429
2430 /* This is true if the terminators exact trip count is unknown. For
2431 * example:
2432 *
2433 * for (int i = 0; i < imin(x, 4); i++)
2434 * ...
2435 *
2436 * Here loop analysis would have set a max_trip_count of 4 however we dont
2437 * know for sure that this is the exact trip count.
2438 */
2439 bool exact_trip_count_unknown;
2440
2441 struct list_head loop_terminator_link;
2442 } nir_loop_terminator;
2443
2444 typedef struct {
2445 /* Estimated cost (in number of instructions) of the loop */
2446 unsigned instr_cost;
2447
2448 /* Guessed trip count based on array indexing */
2449 unsigned guessed_trip_count;
2450
2451 /* Maximum number of times the loop is run (if known) */
2452 unsigned max_trip_count;
2453
2454 /* Do we know the exact number of times the loop will be run */
2455 bool exact_trip_count_known;
2456
2457 /* Unroll the loop regardless of its size */
2458 bool force_unroll;
2459
2460 /* Does the loop contain complex loop terminators, continues or other
2461 * complex behaviours? If this is true we can't rely on
2462 * loop_terminator_list to be complete or accurate.
2463 */
2464 bool complex_loop;
2465
2466 nir_loop_terminator *limiting_terminator;
2467
2468 /* A list of loop_terminators terminating this loop. */
2469 struct list_head loop_terminator_list;
2470 } nir_loop_info;
2471
2472 typedef enum {
2473 nir_loop_control_none = 0x0,
2474 nir_loop_control_unroll = 0x1,
2475 nir_loop_control_dont_unroll = 0x2,
2476 } nir_loop_control;
2477
2478 typedef struct {
2479 nir_cf_node cf_node;
2480
2481 struct exec_list body; /** < list of nir_cf_node */
2482
2483 nir_loop_info *info;
2484 nir_loop_control control;
2485 bool partially_unrolled;
2486 } nir_loop;
2487
2488 /**
2489 * Various bits of metadata that can may be created or required by
2490 * optimization and analysis passes
2491 */
2492 typedef enum {
2493 nir_metadata_none = 0x0,
2494 nir_metadata_block_index = 0x1,
2495 nir_metadata_dominance = 0x2,
2496 nir_metadata_live_ssa_defs = 0x4,
2497 nir_metadata_not_properly_reset = 0x8,
2498 nir_metadata_loop_analysis = 0x10,
2499 } nir_metadata;
2500
2501 typedef struct {
2502 nir_cf_node cf_node;
2503
2504 /** pointer to the function of which this is an implementation */
2505 struct nir_function *function;
2506
2507 struct exec_list body; /** < list of nir_cf_node */
2508
2509 nir_block *end_block;
2510
2511 /** list for all local variables in the function */
2512 struct exec_list locals;
2513
2514 /** list of local registers in the function */
2515 struct exec_list registers;
2516
2517 /** next available local register index */
2518 unsigned reg_alloc;
2519
2520 /** next available SSA value index */
2521 unsigned ssa_alloc;
2522
2523 /* total number of basic blocks, only valid when block_index_dirty = false */
2524 unsigned num_blocks;
2525
2526 nir_metadata valid_metadata;
2527 } nir_function_impl;
2528
2529 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2530 nir_start_block(nir_function_impl *impl)
2531 {
2532 return (nir_block *) impl->body.head_sentinel.next;
2533 }
2534
2535 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2536 nir_impl_last_block(nir_function_impl *impl)
2537 {
2538 return (nir_block *) impl->body.tail_sentinel.prev;
2539 }
2540
2541 static inline nir_cf_node *
2542 nir_cf_node_next(nir_cf_node *node)
2543 {
2544 struct exec_node *next = exec_node_get_next(&node->node);
2545 if (exec_node_is_tail_sentinel(next))
2546 return NULL;
2547 else
2548 return exec_node_data(nir_cf_node, next, node);
2549 }
2550
2551 static inline nir_cf_node *
2552 nir_cf_node_prev(nir_cf_node *node)
2553 {
2554 struct exec_node *prev = exec_node_get_prev(&node->node);
2555 if (exec_node_is_head_sentinel(prev))
2556 return NULL;
2557 else
2558 return exec_node_data(nir_cf_node, prev, node);
2559 }
2560
2561 static inline bool
2562 nir_cf_node_is_first(const nir_cf_node *node)
2563 {
2564 return exec_node_is_head_sentinel(node->node.prev);
2565 }
2566
2567 static inline bool
2568 nir_cf_node_is_last(const nir_cf_node *node)
2569 {
2570 return exec_node_is_tail_sentinel(node->node.next);
2571 }
2572
2573 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2574 type, nir_cf_node_block)
2575 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2576 type, nir_cf_node_if)
2577 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2578 type, nir_cf_node_loop)
2579 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2580 nir_function_impl, cf_node, type, nir_cf_node_function)
2581
2582 static inline nir_block *
2583 nir_if_first_then_block(nir_if *if_stmt)
2584 {
2585 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2586 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2587 }
2588
2589 static inline nir_block *
2590 nir_if_last_then_block(nir_if *if_stmt)
2591 {
2592 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2593 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2594 }
2595
2596 static inline nir_block *
2597 nir_if_first_else_block(nir_if *if_stmt)
2598 {
2599 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2600 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2601 }
2602
2603 static inline nir_block *
2604 nir_if_last_else_block(nir_if *if_stmt)
2605 {
2606 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2607 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2608 }
2609
2610 static inline nir_block *
2611 nir_loop_first_block(nir_loop *loop)
2612 {
2613 struct exec_node *head = exec_list_get_head(&loop->body);
2614 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2615 }
2616
2617 static inline nir_block *
2618 nir_loop_last_block(nir_loop *loop)
2619 {
2620 struct exec_node *tail = exec_list_get_tail(&loop->body);
2621 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2622 }
2623
2624 /**
2625 * Return true if this list of cf_nodes contains a single empty block.
2626 */
2627 static inline bool
2628 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2629 {
2630 if (exec_list_is_singular(cf_list)) {
2631 struct exec_node *head = exec_list_get_head(cf_list);
2632 nir_block *block =
2633 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2634 return exec_list_is_empty(&block->instr_list);
2635 }
2636 return false;
2637 }
2638
2639 typedef struct {
2640 uint8_t num_components;
2641 uint8_t bit_size;
2642 } nir_parameter;
2643
2644 typedef struct nir_function {
2645 struct exec_node node;
2646
2647 const char *name;
2648 struct nir_shader *shader;
2649
2650 unsigned num_params;
2651 nir_parameter *params;
2652
2653 /** The implementation of this function.
2654 *
2655 * If the function is only declared and not implemented, this is NULL.
2656 */
2657 nir_function_impl *impl;
2658
2659 bool is_entrypoint;
2660 } nir_function;
2661
2662 typedef enum {
2663 nir_lower_imul64 = (1 << 0),
2664 nir_lower_isign64 = (1 << 1),
2665 /** Lower all int64 modulus and division opcodes */
2666 nir_lower_divmod64 = (1 << 2),
2667 /** Lower all 64-bit umul_high and imul_high opcodes */
2668 nir_lower_imul_high64 = (1 << 3),
2669 nir_lower_mov64 = (1 << 4),
2670 nir_lower_icmp64 = (1 << 5),
2671 nir_lower_iadd64 = (1 << 6),
2672 nir_lower_iabs64 = (1 << 7),
2673 nir_lower_ineg64 = (1 << 8),
2674 nir_lower_logic64 = (1 << 9),
2675 nir_lower_minmax64 = (1 << 10),
2676 nir_lower_shift64 = (1 << 11),
2677 nir_lower_imul_2x32_64 = (1 << 12),
2678 nir_lower_extract64 = (1 << 13),
2679 nir_lower_ufind_msb64 = (1 << 14),
2680 } nir_lower_int64_options;
2681
2682 typedef enum {
2683 nir_lower_drcp = (1 << 0),
2684 nir_lower_dsqrt = (1 << 1),
2685 nir_lower_drsq = (1 << 2),
2686 nir_lower_dtrunc = (1 << 3),
2687 nir_lower_dfloor = (1 << 4),
2688 nir_lower_dceil = (1 << 5),
2689 nir_lower_dfract = (1 << 6),
2690 nir_lower_dround_even = (1 << 7),
2691 nir_lower_dmod = (1 << 8),
2692 nir_lower_dsub = (1 << 9),
2693 nir_lower_ddiv = (1 << 10),
2694 nir_lower_fp64_full_software = (1 << 11),
2695 } nir_lower_doubles_options;
2696
2697 typedef enum {
2698 nir_divergence_single_prim_per_subgroup = (1 << 0),
2699 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2700 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2701 nir_divergence_view_index_uniform = (1 << 3),
2702 } nir_divergence_options;
2703
2704 typedef struct nir_shader_compiler_options {
2705 bool lower_fdiv;
2706 bool lower_ffma;
2707 bool fuse_ffma;
2708 bool lower_flrp16;
2709 bool lower_flrp32;
2710 /** Lowers flrp when it does not support doubles */
2711 bool lower_flrp64;
2712 bool lower_fpow;
2713 bool lower_fsat;
2714 bool lower_fsqrt;
2715 bool lower_sincos;
2716 bool lower_fmod;
2717 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2718 bool lower_bitfield_extract;
2719 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2720 bool lower_bitfield_extract_to_shifts;
2721 /** Lowers bitfield_insert to bfi/bfm */
2722 bool lower_bitfield_insert;
2723 /** Lowers bitfield_insert to compares, and shifts. */
2724 bool lower_bitfield_insert_to_shifts;
2725 /** Lowers bitfield_insert to bfm/bitfield_select. */
2726 bool lower_bitfield_insert_to_bitfield_select;
2727 /** Lowers bitfield_reverse to shifts. */
2728 bool lower_bitfield_reverse;
2729 /** Lowers bit_count to shifts. */
2730 bool lower_bit_count;
2731 /** Lowers ifind_msb to compare and ufind_msb */
2732 bool lower_ifind_msb;
2733 /** Lowers find_lsb to ufind_msb and logic ops */
2734 bool lower_find_lsb;
2735 bool lower_uadd_carry;
2736 bool lower_usub_borrow;
2737 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2738 bool lower_mul_high;
2739 /** lowers fneg and ineg to fsub and isub. */
2740 bool lower_negate;
2741 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2742 bool lower_sub;
2743
2744 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2745 bool lower_scmp;
2746
2747 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2748 bool lower_vector_cmp;
2749
2750 /** enables rules to lower idiv by power-of-two: */
2751 bool lower_idiv;
2752
2753 /** enable rules to avoid bit ops */
2754 bool lower_bitops;
2755
2756 /** enables rules to lower isign to imin+imax */
2757 bool lower_isign;
2758
2759 /** enables rules to lower fsign to fsub and flt */
2760 bool lower_fsign;
2761
2762 /* lower fdph to fdot4 */
2763 bool lower_fdph;
2764
2765 /** lower fdot to fmul and fsum/fadd. */
2766 bool lower_fdot;
2767
2768 /* Does the native fdot instruction replicate its result for four
2769 * components? If so, then opt_algebraic_late will turn all fdotN
2770 * instructions into fdot_replicatedN instructions.
2771 */
2772 bool fdot_replicates;
2773
2774 /** lowers ffloor to fsub+ffract: */
2775 bool lower_ffloor;
2776
2777 /** lowers ffract to fsub+ffloor: */
2778 bool lower_ffract;
2779
2780 /** lowers fceil to fneg+ffloor+fneg: */
2781 bool lower_fceil;
2782
2783 bool lower_ftrunc;
2784
2785 bool lower_ldexp;
2786
2787 bool lower_pack_half_2x16;
2788 bool lower_pack_half_2x16_split;
2789 bool lower_pack_unorm_2x16;
2790 bool lower_pack_snorm_2x16;
2791 bool lower_pack_unorm_4x8;
2792 bool lower_pack_snorm_4x8;
2793 bool lower_unpack_half_2x16;
2794 bool lower_unpack_half_2x16_split;
2795 bool lower_unpack_unorm_2x16;
2796 bool lower_unpack_snorm_2x16;
2797 bool lower_unpack_unorm_4x8;
2798 bool lower_unpack_snorm_4x8;
2799
2800 bool lower_extract_byte;
2801 bool lower_extract_word;
2802
2803 bool lower_all_io_to_temps;
2804 bool lower_all_io_to_elements;
2805
2806 /* Indicates that the driver only has zero-based vertex id */
2807 bool vertex_id_zero_based;
2808
2809 /**
2810 * If enabled, gl_BaseVertex will be lowered as:
2811 * is_indexed_draw (~0/0) & firstvertex
2812 */
2813 bool lower_base_vertex;
2814
2815 /**
2816 * If enabled, gl_HelperInvocation will be lowered as:
2817 *
2818 * !((1 << sample_id) & sample_mask_in))
2819 *
2820 * This depends on some possibly hw implementation details, which may
2821 * not be true for all hw. In particular that the FS is only executed
2822 * for covered samples or for helper invocations. So, do not blindly
2823 * enable this option.
2824 *
2825 * Note: See also issue #22 in ARB_shader_image_load_store
2826 */
2827 bool lower_helper_invocation;
2828
2829 /**
2830 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2831 *
2832 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2833 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2834 */
2835 bool optimize_sample_mask_in;
2836
2837 bool lower_cs_local_index_from_id;
2838 bool lower_cs_local_id_from_index;
2839
2840 bool lower_device_index_to_zero;
2841
2842 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2843 bool lower_wpos_pntc;
2844
2845 /**
2846 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
2847 * lowered to simple arithmetic.
2848 *
2849 * If this flag is set, the lowering will be applied to all bit-sizes of
2850 * these instructions.
2851 *
2852 * \sa ::lower_hadd64
2853 */
2854 bool lower_hadd;
2855
2856 /**
2857 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
2858 * should be lowered to simple arithmetic.
2859 *
2860 * If this flag is set, the lowering will be applied to only 64-bit
2861 * versions of these instructions.
2862 *
2863 * \sa ::lower_hadd
2864 */
2865 bool lower_hadd64;
2866
2867 /**
2868 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
2869 * arithmetic.
2870 *
2871 * If this flag is set, the lowering will be applied to all bit-sizes of
2872 * these instructions.
2873 *
2874 * \sa ::lower_usub_sat64
2875 */
2876 bool lower_add_sat;
2877
2878 /**
2879 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
2880 * arithmetic.
2881 *
2882 * \sa ::lower_add_sat
2883 */
2884 bool lower_usub_sat64;
2885
2886 /**
2887 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2888 * for IO purposes and would prefer loads/stores be vectorized.
2889 */
2890 bool vectorize_io;
2891 bool lower_to_scalar;
2892
2893 /**
2894 * Should the linker unify inputs_read/outputs_written between adjacent
2895 * shader stages which are linked into a single program?
2896 */
2897 bool unify_interfaces;
2898
2899 /**
2900 * Should nir_lower_io() create load_interpolated_input intrinsics?
2901 *
2902 * If not, it generates regular load_input intrinsics and interpolation
2903 * information must be inferred from the list of input nir_variables.
2904 */
2905 bool use_interpolated_input_intrinsics;
2906
2907 /* Lowers when 32x32->64 bit multiplication is not supported */
2908 bool lower_mul_2x32_64;
2909
2910 /* Lowers when rotate instruction is not supported */
2911 bool lower_rotate;
2912
2913 /**
2914 * Backend supports imul24, and would like to use it (when possible)
2915 * for address/offset calculation. If true, driver should call
2916 * nir_lower_amul(). (If not set, amul will automatically be lowered
2917 * to imul.)
2918 */
2919 bool has_imul24;
2920
2921 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
2922 * set of memory barrier intrinsics based on GLSL.
2923 */
2924 bool use_scoped_memory_barrier;
2925
2926 /**
2927 * Is this the Intel vec4 backend?
2928 *
2929 * Used to inhibit algebraic optimizations that are known to be harmful on
2930 * the Intel vec4 backend. This is generally applicable to any
2931 * optimization that might cause more immediate values to be used in
2932 * 3-source (e.g., ffma and flrp) instructions.
2933 */
2934 bool intel_vec4;
2935
2936 unsigned max_unroll_iterations;
2937
2938 nir_lower_int64_options lower_int64_options;
2939 nir_lower_doubles_options lower_doubles_options;
2940 } nir_shader_compiler_options;
2941
2942 typedef struct nir_shader {
2943 /** list of uniforms (nir_variable) */
2944 struct exec_list uniforms;
2945
2946 /** list of inputs (nir_variable) */
2947 struct exec_list inputs;
2948
2949 /** list of outputs (nir_variable) */
2950 struct exec_list outputs;
2951
2952 /** list of shared compute variables (nir_variable) */
2953 struct exec_list shared;
2954
2955 /** Set of driver-specific options for the shader.
2956 *
2957 * The memory for the options is expected to be kept in a single static
2958 * copy by the driver.
2959 */
2960 const struct nir_shader_compiler_options *options;
2961
2962 /** Various bits of compile-time information about a given shader */
2963 struct shader_info info;
2964
2965 /** list of global variables in the shader (nir_variable) */
2966 struct exec_list globals;
2967
2968 /** list of system value variables in the shader (nir_variable) */
2969 struct exec_list system_values;
2970
2971 struct exec_list functions; /** < list of nir_function */
2972
2973 /**
2974 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2975 * access plus one
2976 */
2977 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2978
2979 /** Size in bytes of required scratch space */
2980 unsigned scratch_size;
2981
2982 /** Constant data associated with this shader.
2983 *
2984 * Constant data is loaded through load_constant intrinsics. See also
2985 * nir_opt_large_constants.
2986 */
2987 void *constant_data;
2988 unsigned constant_data_size;
2989 } nir_shader;
2990
2991 #define nir_foreach_function(func, shader) \
2992 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2993
2994 static inline nir_function_impl *
2995 nir_shader_get_entrypoint(nir_shader *shader)
2996 {
2997 nir_function *func = NULL;
2998
2999 nir_foreach_function(function, shader) {
3000 assert(func == NULL);
3001 if (function->is_entrypoint) {
3002 func = function;
3003 #ifndef NDEBUG
3004 break;
3005 #endif
3006 }
3007 }
3008
3009 if (!func)
3010 return NULL;
3011
3012 assert(func->num_params == 0);
3013 assert(func->impl);
3014 return func->impl;
3015 }
3016
3017 nir_shader *nir_shader_create(void *mem_ctx,
3018 gl_shader_stage stage,
3019 const nir_shader_compiler_options *options,
3020 shader_info *si);
3021
3022 nir_register *nir_local_reg_create(nir_function_impl *impl);
3023
3024 void nir_reg_remove(nir_register *reg);
3025
3026 /** Adds a variable to the appropriate list in nir_shader */
3027 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3028
3029 static inline void
3030 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3031 {
3032 assert(var->data.mode == nir_var_function_temp);
3033 exec_list_push_tail(&impl->locals, &var->node);
3034 }
3035
3036 /** creates a variable, sets a few defaults, and adds it to the list */
3037 nir_variable *nir_variable_create(nir_shader *shader,
3038 nir_variable_mode mode,
3039 const struct glsl_type *type,
3040 const char *name);
3041 /** creates a local variable and adds it to the list */
3042 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3043 const struct glsl_type *type,
3044 const char *name);
3045
3046 /** creates a function and adds it to the shader's list of functions */
3047 nir_function *nir_function_create(nir_shader *shader, const char *name);
3048
3049 nir_function_impl *nir_function_impl_create(nir_function *func);
3050 /** creates a function_impl that isn't tied to any particular function */
3051 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3052
3053 nir_block *nir_block_create(nir_shader *shader);
3054 nir_if *nir_if_create(nir_shader *shader);
3055 nir_loop *nir_loop_create(nir_shader *shader);
3056
3057 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3058
3059 /** requests that the given pieces of metadata be generated */
3060 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3061 /** dirties all but the preserved metadata */
3062 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3063
3064 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3065 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3066
3067 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3068 nir_deref_type deref_type);
3069
3070 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3071
3072 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3073 unsigned num_components,
3074 unsigned bit_size);
3075
3076 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3077 nir_intrinsic_op op);
3078
3079 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3080 nir_function *callee);
3081
3082 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3083
3084 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3085
3086 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3087
3088 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3089 unsigned num_components,
3090 unsigned bit_size);
3091
3092 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3093
3094 /**
3095 * NIR Cursors and Instruction Insertion API
3096 * @{
3097 *
3098 * A tiny struct representing a point to insert/extract instructions or
3099 * control flow nodes. Helps reduce the combinatorial explosion of possible
3100 * points to insert/extract.
3101 *
3102 * \sa nir_control_flow.h
3103 */
3104 typedef enum {
3105 nir_cursor_before_block,
3106 nir_cursor_after_block,
3107 nir_cursor_before_instr,
3108 nir_cursor_after_instr,
3109 } nir_cursor_option;
3110
3111 typedef struct {
3112 nir_cursor_option option;
3113 union {
3114 nir_block *block;
3115 nir_instr *instr;
3116 };
3117 } nir_cursor;
3118
3119 static inline nir_block *
3120 nir_cursor_current_block(nir_cursor cursor)
3121 {
3122 if (cursor.option == nir_cursor_before_instr ||
3123 cursor.option == nir_cursor_after_instr) {
3124 return cursor.instr->block;
3125 } else {
3126 return cursor.block;
3127 }
3128 }
3129
3130 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3131
3132 static inline nir_cursor
3133 nir_before_block(nir_block *block)
3134 {
3135 nir_cursor cursor;
3136 cursor.option = nir_cursor_before_block;
3137 cursor.block = block;
3138 return cursor;
3139 }
3140
3141 static inline nir_cursor
3142 nir_after_block(nir_block *block)
3143 {
3144 nir_cursor cursor;
3145 cursor.option = nir_cursor_after_block;
3146 cursor.block = block;
3147 return cursor;
3148 }
3149
3150 static inline nir_cursor
3151 nir_before_instr(nir_instr *instr)
3152 {
3153 nir_cursor cursor;
3154 cursor.option = nir_cursor_before_instr;
3155 cursor.instr = instr;
3156 return cursor;
3157 }
3158
3159 static inline nir_cursor
3160 nir_after_instr(nir_instr *instr)
3161 {
3162 nir_cursor cursor;
3163 cursor.option = nir_cursor_after_instr;
3164 cursor.instr = instr;
3165 return cursor;
3166 }
3167
3168 static inline nir_cursor
3169 nir_after_block_before_jump(nir_block *block)
3170 {
3171 nir_instr *last_instr = nir_block_last_instr(block);
3172 if (last_instr && last_instr->type == nir_instr_type_jump) {
3173 return nir_before_instr(last_instr);
3174 } else {
3175 return nir_after_block(block);
3176 }
3177 }
3178
3179 static inline nir_cursor
3180 nir_before_src(nir_src *src, bool is_if_condition)
3181 {
3182 if (is_if_condition) {
3183 nir_block *prev_block =
3184 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3185 assert(!nir_block_ends_in_jump(prev_block));
3186 return nir_after_block(prev_block);
3187 } else if (src->parent_instr->type == nir_instr_type_phi) {
3188 #ifndef NDEBUG
3189 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3190 bool found = false;
3191 nir_foreach_phi_src(phi_src, cond_phi) {
3192 if (phi_src->src.ssa == src->ssa) {
3193 found = true;
3194 break;
3195 }
3196 }
3197 assert(found);
3198 #endif
3199 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3200 * to have a more specific name.
3201 */
3202 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3203 return nir_after_block_before_jump(phi_src->pred);
3204 } else {
3205 return nir_before_instr(src->parent_instr);
3206 }
3207 }
3208
3209 static inline nir_cursor
3210 nir_before_cf_node(nir_cf_node *node)
3211 {
3212 if (node->type == nir_cf_node_block)
3213 return nir_before_block(nir_cf_node_as_block(node));
3214
3215 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3216 }
3217
3218 static inline nir_cursor
3219 nir_after_cf_node(nir_cf_node *node)
3220 {
3221 if (node->type == nir_cf_node_block)
3222 return nir_after_block(nir_cf_node_as_block(node));
3223
3224 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3225 }
3226
3227 static inline nir_cursor
3228 nir_after_phis(nir_block *block)
3229 {
3230 nir_foreach_instr(instr, block) {
3231 if (instr->type != nir_instr_type_phi)
3232 return nir_before_instr(instr);
3233 }
3234 return nir_after_block(block);
3235 }
3236
3237 static inline nir_cursor
3238 nir_after_cf_node_and_phis(nir_cf_node *node)
3239 {
3240 if (node->type == nir_cf_node_block)
3241 return nir_after_block(nir_cf_node_as_block(node));
3242
3243 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3244
3245 return nir_after_phis(block);
3246 }
3247
3248 static inline nir_cursor
3249 nir_before_cf_list(struct exec_list *cf_list)
3250 {
3251 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3252 exec_list_get_head(cf_list), node);
3253 return nir_before_cf_node(first_node);
3254 }
3255
3256 static inline nir_cursor
3257 nir_after_cf_list(struct exec_list *cf_list)
3258 {
3259 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3260 exec_list_get_tail(cf_list), node);
3261 return nir_after_cf_node(last_node);
3262 }
3263
3264 /**
3265 * Insert a NIR instruction at the given cursor.
3266 *
3267 * Note: This does not update the cursor.
3268 */
3269 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3270
3271 static inline void
3272 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3273 {
3274 nir_instr_insert(nir_before_instr(instr), before);
3275 }
3276
3277 static inline void
3278 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3279 {
3280 nir_instr_insert(nir_after_instr(instr), after);
3281 }
3282
3283 static inline void
3284 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3285 {
3286 nir_instr_insert(nir_before_block(block), before);
3287 }
3288
3289 static inline void
3290 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3291 {
3292 nir_instr_insert(nir_after_block(block), after);
3293 }
3294
3295 static inline void
3296 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3297 {
3298 nir_instr_insert(nir_before_cf_node(node), before);
3299 }
3300
3301 static inline void
3302 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3303 {
3304 nir_instr_insert(nir_after_cf_node(node), after);
3305 }
3306
3307 static inline void
3308 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3309 {
3310 nir_instr_insert(nir_before_cf_list(list), before);
3311 }
3312
3313 static inline void
3314 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3315 {
3316 nir_instr_insert(nir_after_cf_list(list), after);
3317 }
3318
3319 void nir_instr_remove_v(nir_instr *instr);
3320
3321 static inline nir_cursor
3322 nir_instr_remove(nir_instr *instr)
3323 {
3324 nir_cursor cursor;
3325 nir_instr *prev = nir_instr_prev(instr);
3326 if (prev) {
3327 cursor = nir_after_instr(prev);
3328 } else {
3329 cursor = nir_before_block(instr->block);
3330 }
3331 nir_instr_remove_v(instr);
3332 return cursor;
3333 }
3334
3335 /** @} */
3336
3337 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3338
3339 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3340 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3341 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3342 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3343 void *state);
3344 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3345 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3346
3347 nir_const_value *nir_src_as_const_value(nir_src src);
3348
3349 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3350 static inline c_type * \
3351 nir_src_as_ ## name (nir_src src) \
3352 { \
3353 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3354 ? cast_macro(src.ssa->parent_instr) : NULL; \
3355 }
3356
3357 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3358 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3359 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3360 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3361
3362 bool nir_src_is_dynamically_uniform(nir_src src);
3363 bool nir_srcs_equal(nir_src src1, nir_src src2);
3364 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3365 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3366 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3367 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3368 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3369 nir_dest new_dest);
3370
3371 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3372 unsigned num_components, unsigned bit_size,
3373 const char *name);
3374 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3375 unsigned num_components, unsigned bit_size,
3376 const char *name);
3377 static inline void
3378 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3379 const struct glsl_type *type,
3380 const char *name)
3381 {
3382 assert(glsl_type_is_vector_or_scalar(type));
3383 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3384 glsl_get_bit_size(type), name);
3385 }
3386 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3387 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3388 nir_instr *after_me);
3389
3390 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3391
3392 /*
3393 * finds the next basic block in source-code order, returns NULL if there is
3394 * none
3395 */
3396
3397 nir_block *nir_block_cf_tree_next(nir_block *block);
3398
3399 /* Performs the opposite of nir_block_cf_tree_next() */
3400
3401 nir_block *nir_block_cf_tree_prev(nir_block *block);
3402
3403 /* Gets the first block in a CF node in source-code order */
3404
3405 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3406
3407 /* Gets the last block in a CF node in source-code order */
3408
3409 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3410
3411 /* Gets the next block after a CF node in source-code order */
3412
3413 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3414
3415 /* Macros for loops that visit blocks in source-code order */
3416
3417 #define nir_foreach_block(block, impl) \
3418 for (nir_block *block = nir_start_block(impl); block != NULL; \
3419 block = nir_block_cf_tree_next(block))
3420
3421 #define nir_foreach_block_safe(block, impl) \
3422 for (nir_block *block = nir_start_block(impl), \
3423 *next = nir_block_cf_tree_next(block); \
3424 block != NULL; \
3425 block = next, next = nir_block_cf_tree_next(block))
3426
3427 #define nir_foreach_block_reverse(block, impl) \
3428 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3429 block = nir_block_cf_tree_prev(block))
3430
3431 #define nir_foreach_block_reverse_safe(block, impl) \
3432 for (nir_block *block = nir_impl_last_block(impl), \
3433 *prev = nir_block_cf_tree_prev(block); \
3434 block != NULL; \
3435 block = prev, prev = nir_block_cf_tree_prev(block))
3436
3437 #define nir_foreach_block_in_cf_node(block, node) \
3438 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3439 block != nir_cf_node_cf_tree_next(node); \
3440 block = nir_block_cf_tree_next(block))
3441
3442 /* If the following CF node is an if, this function returns that if.
3443 * Otherwise, it returns NULL.
3444 */
3445 nir_if *nir_block_get_following_if(nir_block *block);
3446
3447 nir_loop *nir_block_get_following_loop(nir_block *block);
3448
3449 void nir_index_local_regs(nir_function_impl *impl);
3450 void nir_index_ssa_defs(nir_function_impl *impl);
3451 unsigned nir_index_instrs(nir_function_impl *impl);
3452
3453 void nir_index_blocks(nir_function_impl *impl);
3454
3455 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3456
3457 void nir_print_shader(nir_shader *shader, FILE *fp);
3458 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3459 void nir_print_instr(const nir_instr *instr, FILE *fp);
3460 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3461
3462 /** Shallow clone of a single ALU instruction. */
3463 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3464
3465 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3466 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3467 const nir_function_impl *fi);
3468 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3469 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3470
3471 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3472
3473 void nir_shader_serialize_deserialize(nir_shader *s);
3474
3475 #ifndef NDEBUG
3476 void nir_validate_shader(nir_shader *shader, const char *when);
3477 void nir_metadata_set_validation_flag(nir_shader *shader);
3478 void nir_metadata_check_validation_flag(nir_shader *shader);
3479
3480 static inline bool
3481 should_skip_nir(const char *name)
3482 {
3483 static const char *list = NULL;
3484 if (!list) {
3485 /* Comma separated list of names to skip. */
3486 list = getenv("NIR_SKIP");
3487 if (!list)
3488 list = "";
3489 }
3490
3491 if (!list[0])
3492 return false;
3493
3494 return comma_separated_list_contains(list, name);
3495 }
3496
3497 static inline bool
3498 should_clone_nir(void)
3499 {
3500 static int should_clone = -1;
3501 if (should_clone < 0)
3502 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3503
3504 return should_clone;
3505 }
3506
3507 static inline bool
3508 should_serialize_deserialize_nir(void)
3509 {
3510 static int test_serialize = -1;
3511 if (test_serialize < 0)
3512 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3513
3514 return test_serialize;
3515 }
3516
3517 static inline bool
3518 should_print_nir(void)
3519 {
3520 static int should_print = -1;
3521 if (should_print < 0)
3522 should_print = env_var_as_boolean("NIR_PRINT", false);
3523
3524 return should_print;
3525 }
3526 #else
3527 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3528 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3529 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3530 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3531 static inline bool should_clone_nir(void) { return false; }
3532 static inline bool should_serialize_deserialize_nir(void) { return false; }
3533 static inline bool should_print_nir(void) { return false; }
3534 #endif /* NDEBUG */
3535
3536 #define _PASS(pass, nir, do_pass) do { \
3537 if (should_skip_nir(#pass)) { \
3538 printf("skipping %s\n", #pass); \
3539 break; \
3540 } \
3541 do_pass \
3542 nir_validate_shader(nir, "after " #pass); \
3543 if (should_clone_nir()) { \
3544 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3545 nir_shader_replace(nir, clone); \
3546 } \
3547 if (should_serialize_deserialize_nir()) { \
3548 nir_shader_serialize_deserialize(nir); \
3549 } \
3550 } while (0)
3551
3552 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3553 nir_metadata_set_validation_flag(nir); \
3554 if (should_print_nir()) \
3555 printf("%s\n", #pass); \
3556 if (pass(nir, ##__VA_ARGS__)) { \
3557 progress = true; \
3558 if (should_print_nir()) \
3559 nir_print_shader(nir, stdout); \
3560 nir_metadata_check_validation_flag(nir); \
3561 } \
3562 )
3563
3564 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3565 if (should_print_nir()) \
3566 printf("%s\n", #pass); \
3567 pass(nir, ##__VA_ARGS__); \
3568 if (should_print_nir()) \
3569 nir_print_shader(nir, stdout); \
3570 )
3571
3572 #define NIR_SKIP(name) should_skip_nir(#name)
3573
3574 /** An instruction filtering callback
3575 *
3576 * Returns true if the instruction should be processed and false otherwise.
3577 */
3578 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3579
3580 /** A simple instruction lowering callback
3581 *
3582 * Many instruction lowering passes can be written as a simple function which
3583 * takes an instruction as its input and returns a sequence of instructions
3584 * that implement the consumed instruction. This function type represents
3585 * such a lowering function. When called, a function with this prototype
3586 * should either return NULL indicating that no lowering needs to be done or
3587 * emit a sequence of instructions using the provided builder (whose cursor
3588 * will already be placed after the instruction to be lowered) and return the
3589 * resulting nir_ssa_def.
3590 */
3591 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3592 nir_instr *, void *);
3593
3594 /**
3595 * Special return value for nir_lower_instr_cb when some progress occurred
3596 * (like changing an input to the instr) that didn't result in a replacement
3597 * SSA def being generated.
3598 */
3599 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3600
3601 /** Iterate over all the instructions in a nir_function_impl and lower them
3602 * using the provided callbacks
3603 *
3604 * This function implements the guts of a standard lowering pass for you. It
3605 * iterates over all of the instructions in a nir_function_impl and calls the
3606 * filter callback on each one. If the filter callback returns true, it then
3607 * calls the lowering call back on the instruction. (Splitting it this way
3608 * allows us to avoid some save/restore work for instructions we know won't be
3609 * lowered.) If the instruction is dead after the lowering is complete, it
3610 * will be removed. If new instructions are added, the lowering callback will
3611 * also be called on them in case multiple lowerings are required.
3612 *
3613 * The metadata for the nir_function_impl will also be updated. If any blocks
3614 * are added (they cannot be removed), dominance and block indices will be
3615 * invalidated.
3616 */
3617 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3618 nir_instr_filter_cb filter,
3619 nir_lower_instr_cb lower,
3620 void *cb_data);
3621 bool nir_shader_lower_instructions(nir_shader *shader,
3622 nir_instr_filter_cb filter,
3623 nir_lower_instr_cb lower,
3624 void *cb_data);
3625
3626 void nir_calc_dominance_impl(nir_function_impl *impl);
3627 void nir_calc_dominance(nir_shader *shader);
3628
3629 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3630 bool nir_block_dominates(nir_block *parent, nir_block *child);
3631 bool nir_block_is_unreachable(nir_block *block);
3632
3633 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3634 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3635
3636 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3637 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3638
3639 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3640 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3641
3642 int nir_gs_count_vertices(const nir_shader *shader);
3643
3644 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3645 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3646 bool nir_split_var_copies(nir_shader *shader);
3647 bool nir_split_per_member_structs(nir_shader *shader);
3648 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3649
3650 bool nir_lower_returns_impl(nir_function_impl *impl);
3651 bool nir_lower_returns(nir_shader *shader);
3652
3653 void nir_inline_function_impl(struct nir_builder *b,
3654 const nir_function_impl *impl,
3655 nir_ssa_def **params);
3656 bool nir_inline_functions(nir_shader *shader);
3657
3658 bool nir_propagate_invariant(nir_shader *shader);
3659
3660 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3661 void nir_lower_deref_copy_instr(struct nir_builder *b,
3662 nir_intrinsic_instr *copy);
3663 bool nir_lower_var_copies(nir_shader *shader);
3664
3665 void nir_fixup_deref_modes(nir_shader *shader);
3666
3667 bool nir_lower_global_vars_to_local(nir_shader *shader);
3668
3669 typedef enum {
3670 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3671 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3672 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3673 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3674 } nir_lower_array_deref_of_vec_options;
3675
3676 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3677 nir_lower_array_deref_of_vec_options options);
3678
3679 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3680
3681 bool nir_lower_locals_to_regs(nir_shader *shader);
3682
3683 void nir_lower_io_to_temporaries(nir_shader *shader,
3684 nir_function_impl *entrypoint,
3685 bool outputs, bool inputs);
3686
3687 bool nir_lower_vars_to_scratch(nir_shader *shader,
3688 nir_variable_mode modes,
3689 int size_threshold,
3690 glsl_type_size_align_func size_align);
3691
3692 void nir_lower_clip_halfz(nir_shader *shader);
3693
3694 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3695
3696 void nir_gather_ssa_types(nir_function_impl *impl,
3697 BITSET_WORD *float_types,
3698 BITSET_WORD *int_types);
3699
3700 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3701 int (*type_size)(const struct glsl_type *, bool));
3702
3703 /* Some helpers to do very simple linking */
3704 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3705 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3706 uint64_t *used_by_other_stage,
3707 uint64_t *used_by_other_stage_patches);
3708 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3709 bool default_to_smooth_interp);
3710 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3711 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3712
3713 bool nir_lower_amul(nir_shader *shader,
3714 int (*type_size)(const struct glsl_type *, bool));
3715
3716 void nir_assign_io_var_locations(struct exec_list *var_list,
3717 unsigned *size,
3718 gl_shader_stage stage);
3719
3720 typedef enum {
3721 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3722 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3723 * modes.
3724 */
3725 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3726
3727 /* If set, this forces all non-flat fragment shader inputs to be
3728 * interpolated as if with the "sample" qualifier. This requires
3729 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3730 */
3731 nir_lower_io_force_sample_interpolation = (1 << 1),
3732 } nir_lower_io_options;
3733 bool nir_lower_io(nir_shader *shader,
3734 nir_variable_mode modes,
3735 int (*type_size)(const struct glsl_type *, bool),
3736 nir_lower_io_options);
3737
3738 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3739
3740 bool
3741 nir_lower_vars_to_explicit_types(nir_shader *shader,
3742 nir_variable_mode modes,
3743 glsl_type_size_align_func type_info);
3744
3745 typedef enum {
3746 /**
3747 * An address format which is a simple 32-bit global GPU address.
3748 */
3749 nir_address_format_32bit_global,
3750
3751 /**
3752 * An address format which is a simple 64-bit global GPU address.
3753 */
3754 nir_address_format_64bit_global,
3755
3756 /**
3757 * An address format which is a bounds-checked 64-bit global GPU address.
3758 *
3759 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3760 * address stored with the low bits in .x and high bits in .y, .z is a
3761 * size, and .w is an offset. When the final I/O operation is lowered, .w
3762 * is checked against .z and the operation is predicated on the result.
3763 */
3764 nir_address_format_64bit_bounded_global,
3765
3766 /**
3767 * An address format which is comprised of a vec2 where the first
3768 * component is a buffer index and the second is an offset.
3769 */
3770 nir_address_format_32bit_index_offset,
3771
3772 /**
3773 * An address format which is a simple 32-bit offset.
3774 */
3775 nir_address_format_32bit_offset,
3776
3777 /**
3778 * An address format representing a purely logical addressing model. In
3779 * this model, all deref chains must be complete from the dereference
3780 * operation to the variable. Cast derefs are not allowed. These
3781 * addresses will be 32-bit scalars but the format is immaterial because
3782 * you can always chase the chain.
3783 */
3784 nir_address_format_logical,
3785 } nir_address_format;
3786
3787 static inline unsigned
3788 nir_address_format_bit_size(nir_address_format addr_format)
3789 {
3790 switch (addr_format) {
3791 case nir_address_format_32bit_global: return 32;
3792 case nir_address_format_64bit_global: return 64;
3793 case nir_address_format_64bit_bounded_global: return 32;
3794 case nir_address_format_32bit_index_offset: return 32;
3795 case nir_address_format_32bit_offset: return 32;
3796 case nir_address_format_logical: return 32;
3797 }
3798 unreachable("Invalid address format");
3799 }
3800
3801 static inline unsigned
3802 nir_address_format_num_components(nir_address_format addr_format)
3803 {
3804 switch (addr_format) {
3805 case nir_address_format_32bit_global: return 1;
3806 case nir_address_format_64bit_global: return 1;
3807 case nir_address_format_64bit_bounded_global: return 4;
3808 case nir_address_format_32bit_index_offset: return 2;
3809 case nir_address_format_32bit_offset: return 1;
3810 case nir_address_format_logical: return 1;
3811 }
3812 unreachable("Invalid address format");
3813 }
3814
3815 static inline const struct glsl_type *
3816 nir_address_format_to_glsl_type(nir_address_format addr_format)
3817 {
3818 unsigned bit_size = nir_address_format_bit_size(addr_format);
3819 assert(bit_size == 32 || bit_size == 64);
3820 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3821 nir_address_format_num_components(addr_format));
3822 }
3823
3824 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3825
3826 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3827 nir_address_format addr_format);
3828
3829 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3830 nir_address_format addr_format);
3831
3832 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3833 nir_deref_instr *deref,
3834 nir_ssa_def *base_addr,
3835 nir_address_format addr_format);
3836 void nir_lower_explicit_io_instr(struct nir_builder *b,
3837 nir_intrinsic_instr *io_instr,
3838 nir_ssa_def *addr,
3839 nir_address_format addr_format);
3840
3841 bool nir_lower_explicit_io(nir_shader *shader,
3842 nir_variable_mode modes,
3843 nir_address_format);
3844
3845 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3846 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3847
3848 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3849
3850 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3851 bool nir_lower_regs_to_ssa(nir_shader *shader);
3852 bool nir_lower_vars_to_ssa(nir_shader *shader);
3853
3854 bool nir_remove_dead_derefs(nir_shader *shader);
3855 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3856 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3857 bool nir_lower_variable_initializers(nir_shader *shader,
3858 nir_variable_mode modes);
3859
3860 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3861 bool nir_lower_vec_to_movs(nir_shader *shader);
3862 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3863 bool alpha_to_one,
3864 const gl_state_index16 *alpha_ref_state_tokens);
3865 bool nir_lower_alu(nir_shader *shader);
3866
3867 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3868 bool always_precise, bool have_ffma);
3869
3870 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3871 bool nir_lower_bool_to_float(nir_shader *shader);
3872 bool nir_lower_bool_to_int32(nir_shader *shader);
3873 bool nir_lower_int_to_float(nir_shader *shader);
3874 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3875 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3876 bool nir_lower_phis_to_scalar(nir_shader *shader);
3877 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3878 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3879 bool outputs_only);
3880 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3881 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3882 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3883
3884 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3885 void nir_lower_viewport_transform(nir_shader *shader);
3886 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3887
3888 typedef struct nir_lower_subgroups_options {
3889 uint8_t subgroup_size;
3890 uint8_t ballot_bit_size;
3891 bool lower_to_scalar:1;
3892 bool lower_vote_trivial:1;
3893 bool lower_vote_eq_to_ballot:1;
3894 bool lower_subgroup_masks:1;
3895 bool lower_shuffle:1;
3896 bool lower_shuffle_to_32bit:1;
3897 bool lower_quad:1;
3898 bool lower_quad_broadcast_dynamic:1;
3899 bool lower_quad_broadcast_dynamic_to_const:1;
3900 } nir_lower_subgroups_options;
3901
3902 bool nir_lower_subgroups(nir_shader *shader,
3903 const nir_lower_subgroups_options *options);
3904
3905 bool nir_lower_system_values(nir_shader *shader);
3906
3907 enum PACKED nir_lower_tex_packing {
3908 nir_lower_tex_packing_none = 0,
3909 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3910 * or unsigned ints based on the sampler type
3911 */
3912 nir_lower_tex_packing_16,
3913 /* The sampler returns 1 32-bit word of 4x8 unorm */
3914 nir_lower_tex_packing_8,
3915 };
3916
3917 typedef struct nir_lower_tex_options {
3918 /**
3919 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3920 * sampler types a texture projector is lowered.
3921 */
3922 unsigned lower_txp;
3923
3924 /**
3925 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3926 */
3927 bool lower_txf_offset;
3928
3929 /**
3930 * If true, lower away nir_tex_src_offset for all rect textures.
3931 */
3932 bool lower_rect_offset;
3933
3934 /**
3935 * If true, lower rect textures to 2D, using txs to fetch the
3936 * texture dimensions and dividing the texture coords by the
3937 * texture dims to normalize.
3938 */
3939 bool lower_rect;
3940
3941 /**
3942 * If true, convert yuv to rgb.
3943 */
3944 unsigned lower_y_uv_external;
3945 unsigned lower_y_u_v_external;
3946 unsigned lower_yx_xuxv_external;
3947 unsigned lower_xy_uxvx_external;
3948 unsigned lower_ayuv_external;
3949 unsigned lower_xyuv_external;
3950
3951 /**
3952 * To emulate certain texture wrap modes, this can be used
3953 * to saturate the specified tex coord to [0.0, 1.0]. The
3954 * bits are according to sampler #, ie. if, for example:
3955 *
3956 * (conf->saturate_s & (1 << n))
3957 *
3958 * is true, then the s coord for sampler n is saturated.
3959 *
3960 * Note that clamping must happen *after* projector lowering
3961 * so any projected texture sample instruction with a clamped
3962 * coordinate gets automatically lowered, regardless of the
3963 * 'lower_txp' setting.
3964 */
3965 unsigned saturate_s;
3966 unsigned saturate_t;
3967 unsigned saturate_r;
3968
3969 /* Bitmask of textures that need swizzling.
3970 *
3971 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3972 * swizzles[texture_index] is applied to the result of the texturing
3973 * operation.
3974 */
3975 unsigned swizzle_result;
3976
3977 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3978 * while 4 and 5 represent 0 and 1 respectively.
3979 */
3980 uint8_t swizzles[32][4];
3981
3982 /* Can be used to scale sampled values in range required by the format. */
3983 float scale_factors[32];
3984
3985 /**
3986 * Bitmap of textures that need srgb to linear conversion. If
3987 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3988 * of the texture are lowered to linear.
3989 */
3990 unsigned lower_srgb;
3991
3992 /**
3993 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3994 * LODs to nir_texop_txl.
3995 */
3996 bool lower_tex_without_implicit_lod;
3997
3998 /**
3999 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4000 */
4001 bool lower_txd_cube_map;
4002
4003 /**
4004 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4005 */
4006 bool lower_txd_3d;
4007
4008 /**
4009 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4010 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4011 * with lower_txd_cube_map.
4012 */
4013 bool lower_txd_shadow;
4014
4015 /**
4016 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4017 * Implies lower_txd_cube_map and lower_txd_shadow.
4018 */
4019 bool lower_txd;
4020
4021 /**
4022 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4023 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4024 */
4025 bool lower_txb_shadow_clamp;
4026
4027 /**
4028 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4029 * with nir_texop_txl. This includes cube maps.
4030 */
4031 bool lower_txd_shadow_clamp;
4032
4033 /**
4034 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4035 * with nir_texop_txl. This includes cube maps.
4036 */
4037 bool lower_txd_offset_clamp;
4038
4039 /**
4040 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4041 * sampler is bindless.
4042 */
4043 bool lower_txd_clamp_bindless_sampler;
4044
4045 /**
4046 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4047 * sampler index is not statically determinable to be less than 16.
4048 */
4049 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4050
4051 /**
4052 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4053 * 0-lod followed by a nir_ishr.
4054 */
4055 bool lower_txs_lod;
4056
4057 /**
4058 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4059 * mixed-up tg4 locations.
4060 */
4061 bool lower_tg4_broadcom_swizzle;
4062
4063 /**
4064 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4065 */
4066 bool lower_tg4_offsets;
4067
4068 enum nir_lower_tex_packing lower_tex_packing[32];
4069 } nir_lower_tex_options;
4070
4071 bool nir_lower_tex(nir_shader *shader,
4072 const nir_lower_tex_options *options);
4073
4074 enum nir_lower_non_uniform_access_type {
4075 nir_lower_non_uniform_ubo_access = (1 << 0),
4076 nir_lower_non_uniform_ssbo_access = (1 << 1),
4077 nir_lower_non_uniform_texture_access = (1 << 2),
4078 nir_lower_non_uniform_image_access = (1 << 3),
4079 };
4080
4081 bool nir_lower_non_uniform_access(nir_shader *shader,
4082 enum nir_lower_non_uniform_access_type);
4083
4084 enum nir_lower_idiv_path {
4085 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4086 * the two but it is not exact in some cases (for example, 1091317713u /
4087 * 1034u gives 5209173 instead of 1055432) */
4088 nir_lower_idiv_fast,
4089 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4090 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4091 * the nv50 path and many of them are integer multiplications, so it is
4092 * probably slower. It should always return the correct result, though. */
4093 nir_lower_idiv_precise,
4094 };
4095
4096 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4097
4098 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4099
4100 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4101 bool use_vars,
4102 bool use_clipdist_array,
4103 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4104 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4105 bool use_clipdist_array,
4106 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4107 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4108 bool use_clipdist_array);
4109 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4110
4111 void nir_lower_point_size_mov(nir_shader *shader,
4112 const gl_state_index16 *pointsize_state_tokens);
4113
4114 bool nir_lower_frexp(nir_shader *nir);
4115
4116 void nir_lower_two_sided_color(nir_shader *shader);
4117
4118 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4119
4120 bool nir_lower_flatshade(nir_shader *shader);
4121
4122 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4123 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4124 const gl_state_index16 *uniform_state_tokens);
4125
4126 typedef struct nir_lower_wpos_ytransform_options {
4127 gl_state_index16 state_tokens[STATE_LENGTH];
4128 bool fs_coord_origin_upper_left :1;
4129 bool fs_coord_origin_lower_left :1;
4130 bool fs_coord_pixel_center_integer :1;
4131 bool fs_coord_pixel_center_half_integer :1;
4132 } nir_lower_wpos_ytransform_options;
4133
4134 bool nir_lower_wpos_ytransform(nir_shader *shader,
4135 const nir_lower_wpos_ytransform_options *options);
4136 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4137
4138 bool nir_lower_fb_read(nir_shader *shader);
4139
4140 typedef struct nir_lower_drawpixels_options {
4141 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4142 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4143 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4144 unsigned drawpix_sampler;
4145 unsigned pixelmap_sampler;
4146 bool pixel_maps :1;
4147 bool scale_and_bias :1;
4148 } nir_lower_drawpixels_options;
4149
4150 void nir_lower_drawpixels(nir_shader *shader,
4151 const nir_lower_drawpixels_options *options);
4152
4153 typedef struct nir_lower_bitmap_options {
4154 unsigned sampler;
4155 bool swizzle_xxxx;
4156 } nir_lower_bitmap_options;
4157
4158 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4159
4160 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4161
4162 typedef enum {
4163 nir_lower_int_source_mods = 1 << 0,
4164 nir_lower_float_source_mods = 1 << 1,
4165 nir_lower_triop_abs = 1 << 2,
4166 nir_lower_all_source_mods = (1 << 3) - 1
4167 } nir_lower_to_source_mods_flags;
4168
4169
4170 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4171
4172 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4173
4174 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4175
4176 bool nir_lower_bit_size(nir_shader *shader,
4177 nir_lower_bit_size_callback callback,
4178 void *callback_data);
4179
4180 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4181 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4182
4183 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4184 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4185 nir_lower_doubles_options options);
4186 bool nir_lower_pack(nir_shader *shader);
4187
4188 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4189
4190 typedef enum {
4191 nir_lower_interpolation_at_sample = (1 << 1),
4192 nir_lower_interpolation_at_offset = (1 << 2),
4193 nir_lower_interpolation_centroid = (1 << 3),
4194 nir_lower_interpolation_pixel = (1 << 4),
4195 nir_lower_interpolation_sample = (1 << 5),
4196 } nir_lower_interpolation_options;
4197
4198 bool nir_lower_interpolation(nir_shader *shader,
4199 nir_lower_interpolation_options options);
4200
4201 bool nir_lower_discard_to_demote(nir_shader *shader);
4202
4203 bool nir_normalize_cubemap_coords(nir_shader *shader);
4204
4205 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4206
4207 void nir_loop_analyze_impl(nir_function_impl *impl,
4208 nir_variable_mode indirect_mask);
4209
4210 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4211
4212 bool nir_repair_ssa_impl(nir_function_impl *impl);
4213 bool nir_repair_ssa(nir_shader *shader);
4214
4215 void nir_convert_loop_to_lcssa(nir_loop *loop);
4216 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4217 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4218
4219 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4220 * registers. If false, convert all values (even those not involved in a phi
4221 * node) to registers.
4222 */
4223 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4224
4225 bool nir_lower_phis_to_regs_block(nir_block *block);
4226 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4227 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4228
4229 bool nir_lower_samplers(nir_shader *shader);
4230 bool nir_lower_ssbo(nir_shader *shader);
4231
4232 /* This is here for unit tests. */
4233 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4234
4235 bool nir_opt_comparison_pre(nir_shader *shader);
4236
4237 bool nir_opt_access(nir_shader *shader);
4238 bool nir_opt_algebraic(nir_shader *shader);
4239 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4240 bool nir_opt_algebraic_late(nir_shader *shader);
4241 bool nir_opt_constant_folding(nir_shader *shader);
4242
4243 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4244
4245 bool nir_copy_prop(nir_shader *shader);
4246
4247 bool nir_opt_copy_prop_vars(nir_shader *shader);
4248
4249 bool nir_opt_cse(nir_shader *shader);
4250
4251 bool nir_opt_dce(nir_shader *shader);
4252
4253 bool nir_opt_dead_cf(nir_shader *shader);
4254
4255 bool nir_opt_dead_write_vars(nir_shader *shader);
4256
4257 bool nir_opt_deref_impl(nir_function_impl *impl);
4258 bool nir_opt_deref(nir_shader *shader);
4259
4260 bool nir_opt_find_array_copies(nir_shader *shader);
4261
4262 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4263
4264 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4265
4266 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4267
4268 bool nir_opt_intrinsics(nir_shader *shader);
4269
4270 bool nir_opt_large_constants(nir_shader *shader,
4271 glsl_type_size_align_func size_align,
4272 unsigned threshold);
4273
4274 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4275
4276 typedef enum {
4277 nir_move_const_undef = (1 << 0),
4278 nir_move_load_ubo = (1 << 1),
4279 nir_move_load_input = (1 << 2),
4280 nir_move_comparisons = (1 << 3),
4281 nir_move_copies = (1 << 4),
4282 } nir_move_options;
4283
4284 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4285
4286 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4287
4288 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4289
4290 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4291 bool indirect_load_ok, bool expensive_alu_ok);
4292
4293 bool nir_opt_rematerialize_compares(nir_shader *shader);
4294
4295 bool nir_opt_remove_phis(nir_shader *shader);
4296 bool nir_opt_remove_phis_block(nir_block *block);
4297
4298 bool nir_opt_shrink_load(nir_shader *shader);
4299
4300 bool nir_opt_trivial_continues(nir_shader *shader);
4301
4302 bool nir_opt_undef(nir_shader *shader);
4303
4304 bool nir_opt_vectorize(nir_shader *shader);
4305
4306 bool nir_opt_conditional_discard(nir_shader *shader);
4307
4308 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4309 unsigned num_components, unsigned high_offset,
4310 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4311
4312 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4313 nir_should_vectorize_mem_func callback);
4314
4315 void nir_schedule(nir_shader *shader, int threshold);
4316
4317 void nir_strip(nir_shader *shader);
4318
4319 void nir_sweep(nir_shader *shader);
4320
4321 void nir_remap_dual_slot_attributes(nir_shader *shader,
4322 uint64_t *dual_slot_inputs);
4323 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4324
4325 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4326 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4327
4328 static inline bool
4329 nir_variable_is_in_ubo(const nir_variable *var)
4330 {
4331 return (var->data.mode == nir_var_mem_ubo &&
4332 var->interface_type != NULL);
4333 }
4334
4335 static inline bool
4336 nir_variable_is_in_ssbo(const nir_variable *var)
4337 {
4338 return (var->data.mode == nir_var_mem_ssbo &&
4339 var->interface_type != NULL);
4340 }
4341
4342 static inline bool
4343 nir_variable_is_in_block(const nir_variable *var)
4344 {
4345 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4346 }
4347
4348 #ifdef __cplusplus
4349 } /* extern "C" */
4350 #endif
4351
4352 #endif /* NIR_H */