nir: Add nir_ball_iequal() helper
[mesa.git] / src / compiler / nir / nir_builder.h
1 /*
2 * Copyright © 2014-2015 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef NIR_BUILDER_H
25 #define NIR_BUILDER_H
26
27 #include "nir_control_flow.h"
28 #include "util/bitscan.h"
29 #include "util/half_float.h"
30
31 struct exec_list;
32
33 typedef struct nir_builder {
34 nir_cursor cursor;
35
36 /* Whether new ALU instructions will be marked "exact" */
37 bool exact;
38
39 nir_shader *shader;
40 nir_function_impl *impl;
41 } nir_builder;
42
43 static inline void
44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
45 {
46 memset(build, 0, sizeof(*build));
47 build->exact = false;
48 build->impl = impl;
49 build->shader = impl->function->shader;
50 }
51
52 static inline void
53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
54 gl_shader_stage stage,
55 const nir_shader_compiler_options *options)
56 {
57 build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
58 nir_function *func = nir_function_create(build->shader, "main");
59 func->is_entrypoint = true;
60 build->exact = false;
61 build->impl = nir_function_impl_create(func);
62 build->cursor = nir_after_cf_list(&build->impl->body);
63 }
64
65 static inline void
66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
67 {
68 nir_instr_insert(build->cursor, instr);
69
70 /* Move the cursor forward. */
71 build->cursor = nir_after_instr(instr);
72 }
73
74 static inline nir_instr *
75 nir_builder_last_instr(nir_builder *build)
76 {
77 assert(build->cursor.option == nir_cursor_after_instr);
78 return build->cursor.instr;
79 }
80
81 static inline void
82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
83 {
84 nir_cf_node_insert(build->cursor, cf);
85 }
86
87 static inline bool
88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
89 {
90 nir_block *block = nir_cursor_current_block(build->cursor);
91 for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
92 if (n == cf_node)
93 return true;
94 }
95 return false;
96 }
97
98 static inline nir_if *
99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
100 {
101 nir_if *nif = nir_if_create(build->shader);
102 nif->condition = nir_src_for_ssa(condition);
103 nir_builder_cf_insert(build, &nif->cf_node);
104 build->cursor = nir_before_cf_list(&nif->then_list);
105 return nif;
106 }
107
108 static inline nir_if *
109 nir_push_else(nir_builder *build, nir_if *nif)
110 {
111 if (nif) {
112 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
113 } else {
114 nir_block *block = nir_cursor_current_block(build->cursor);
115 nif = nir_cf_node_as_if(block->cf_node.parent);
116 }
117 build->cursor = nir_before_cf_list(&nif->else_list);
118 return nif;
119 }
120
121 static inline void
122 nir_pop_if(nir_builder *build, nir_if *nif)
123 {
124 if (nif) {
125 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
126 } else {
127 nir_block *block = nir_cursor_current_block(build->cursor);
128 nif = nir_cf_node_as_if(block->cf_node.parent);
129 }
130 build->cursor = nir_after_cf_node(&nif->cf_node);
131 }
132
133 static inline nir_ssa_def *
134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
135 {
136 nir_block *block = nir_cursor_current_block(build->cursor);
137 nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
138
139 nir_phi_instr *phi = nir_phi_instr_create(build->shader);
140
141 nir_phi_src *src = ralloc(phi, nir_phi_src);
142 src->pred = nir_if_last_then_block(nif);
143 src->src = nir_src_for_ssa(then_def);
144 exec_list_push_tail(&phi->srcs, &src->node);
145
146 src = ralloc(phi, nir_phi_src);
147 src->pred = nir_if_last_else_block(nif);
148 src->src = nir_src_for_ssa(else_def);
149 exec_list_push_tail(&phi->srcs, &src->node);
150
151 assert(then_def->num_components == else_def->num_components);
152 assert(then_def->bit_size == else_def->bit_size);
153 nir_ssa_dest_init(&phi->instr, &phi->dest,
154 then_def->num_components, then_def->bit_size, NULL);
155
156 nir_builder_instr_insert(build, &phi->instr);
157
158 return &phi->dest.ssa;
159 }
160
161 static inline nir_loop *
162 nir_push_loop(nir_builder *build)
163 {
164 nir_loop *loop = nir_loop_create(build->shader);
165 nir_builder_cf_insert(build, &loop->cf_node);
166 build->cursor = nir_before_cf_list(&loop->body);
167 return loop;
168 }
169
170 static inline void
171 nir_pop_loop(nir_builder *build, nir_loop *loop)
172 {
173 if (loop) {
174 assert(nir_builder_is_inside_cf(build, &loop->cf_node));
175 } else {
176 nir_block *block = nir_cursor_current_block(build->cursor);
177 loop = nir_cf_node_as_loop(block->cf_node.parent);
178 }
179 build->cursor = nir_after_cf_node(&loop->cf_node);
180 }
181
182 static inline nir_ssa_def *
183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
184 {
185 nir_ssa_undef_instr *undef =
186 nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
187 if (!undef)
188 return NULL;
189
190 nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
191
192 return &undef->def;
193 }
194
195 static inline nir_ssa_def *
196 nir_build_imm(nir_builder *build, unsigned num_components,
197 unsigned bit_size, const nir_const_value *value)
198 {
199 nir_load_const_instr *load_const =
200 nir_load_const_instr_create(build->shader, num_components, bit_size);
201 if (!load_const)
202 return NULL;
203
204 memcpy(load_const->value, value, sizeof(nir_const_value) * num_components);
205
206 nir_builder_instr_insert(build, &load_const->instr);
207
208 return &load_const->def;
209 }
210
211 static inline nir_ssa_def *
212 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
213 {
214 nir_load_const_instr *load_const =
215 nir_load_const_instr_create(build->shader, num_components, bit_size);
216
217 /* nir_load_const_instr_create uses rzalloc so it's already zero */
218
219 nir_builder_instr_insert(build, &load_const->instr);
220
221 return &load_const->def;
222 }
223
224 static inline nir_ssa_def *
225 nir_imm_bool(nir_builder *build, bool x)
226 {
227 nir_const_value v;
228
229 memset(&v, 0, sizeof(v));
230 v.b = x;
231
232 return nir_build_imm(build, 1, 1, &v);
233 }
234
235 static inline nir_ssa_def *
236 nir_imm_true(nir_builder *build)
237 {
238 return nir_imm_bool(build, true);
239 }
240
241 static inline nir_ssa_def *
242 nir_imm_false(nir_builder *build)
243 {
244 return nir_imm_bool(build, false);
245 }
246
247 static inline nir_ssa_def *
248 nir_imm_float16(nir_builder *build, float x)
249 {
250 nir_const_value v;
251
252 memset(&v, 0, sizeof(v));
253 v.u16 = _mesa_float_to_half(x);
254
255 return nir_build_imm(build, 1, 16, &v);
256 }
257
258 static inline nir_ssa_def *
259 nir_imm_float(nir_builder *build, float x)
260 {
261 nir_const_value v;
262
263 memset(&v, 0, sizeof(v));
264 v.f32 = x;
265
266 return nir_build_imm(build, 1, 32, &v);
267 }
268
269 static inline nir_ssa_def *
270 nir_imm_double(nir_builder *build, double x)
271 {
272 nir_const_value v;
273
274 memset(&v, 0, sizeof(v));
275 v.f64 = x;
276
277 return nir_build_imm(build, 1, 64, &v);
278 }
279
280 static inline nir_ssa_def *
281 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
282 {
283 switch (bit_size) {
284 case 16:
285 return nir_imm_float16(build, x);
286 case 32:
287 return nir_imm_float(build, x);
288 case 64:
289 return nir_imm_double(build, x);
290 }
291
292 unreachable("unknown float immediate bit size");
293 }
294
295 static inline nir_ssa_def *
296 nir_imm_vec2(nir_builder *build, float x, float y)
297 {
298 nir_const_value v[2];
299
300 memset(v, 0, sizeof(v));
301 v[0].f32 = x;
302 v[1].f32 = y;
303
304 return nir_build_imm(build, 2, 32, v);
305 }
306
307 static inline nir_ssa_def *
308 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
309 {
310 nir_const_value v[4];
311
312 memset(v, 0, sizeof(v));
313 v[0].f32 = x;
314 v[1].f32 = y;
315 v[2].f32 = z;
316 v[3].f32 = w;
317
318 return nir_build_imm(build, 4, 32, v);
319 }
320
321 static inline nir_ssa_def *
322 nir_imm_ivec2(nir_builder *build, int x, int y)
323 {
324 nir_const_value v[2];
325
326 memset(v, 0, sizeof(v));
327 v[0].i32 = x;
328 v[1].i32 = y;
329
330 return nir_build_imm(build, 2, 32, v);
331 }
332
333 static inline nir_ssa_def *
334 nir_imm_int(nir_builder *build, int x)
335 {
336 nir_const_value v;
337
338 memset(&v, 0, sizeof(v));
339 v.i32 = x;
340
341 return nir_build_imm(build, 1, 32, &v);
342 }
343
344 static inline nir_ssa_def *
345 nir_imm_int64(nir_builder *build, int64_t x)
346 {
347 nir_const_value v;
348
349 memset(&v, 0, sizeof(v));
350 v.i64 = x;
351
352 return nir_build_imm(build, 1, 64, &v);
353 }
354
355 static inline nir_ssa_def *
356 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
357 {
358 nir_const_value v;
359
360 memset(&v, 0, sizeof(v));
361 assert(bit_size <= 64);
362 if (bit_size == 1)
363 v.b = x & 1;
364 else
365 v.i64 = x & (~0ull >> (64 - bit_size));
366
367 return nir_build_imm(build, 1, bit_size, &v);
368 }
369
370 static inline nir_ssa_def *
371 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
372 {
373 nir_const_value v[4];
374
375 memset(v, 0, sizeof(v));
376 v[0].i32 = x;
377 v[1].i32 = y;
378 v[2].i32 = z;
379 v[3].i32 = w;
380
381 return nir_build_imm(build, 4, 32, v);
382 }
383
384 static inline nir_ssa_def *
385 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
386 {
387 /* We use a 0/-1 convention for all booleans regardless of size */
388 return nir_imm_intN_t(build, -(int)x, bit_size);
389 }
390
391 static inline nir_ssa_def *
392 nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr)
393 {
394 const nir_op_info *op_info = &nir_op_infos[instr->op];
395
396 instr->exact = build->exact;
397
398 /* Guess the number of components the destination temporary should have
399 * based on our input sizes, if it's not fixed for the op.
400 */
401 unsigned num_components = op_info->output_size;
402 if (num_components == 0) {
403 for (unsigned i = 0; i < op_info->num_inputs; i++) {
404 if (op_info->input_sizes[i] == 0)
405 num_components = MAX2(num_components,
406 instr->src[i].src.ssa->num_components);
407 }
408 }
409 assert(num_components != 0);
410
411 /* Figure out the bitwidth based on the source bitwidth if the instruction
412 * is variable-width.
413 */
414 unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
415 if (bit_size == 0) {
416 for (unsigned i = 0; i < op_info->num_inputs; i++) {
417 unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
418 if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
419 if (bit_size)
420 assert(src_bit_size == bit_size);
421 else
422 bit_size = src_bit_size;
423 } else {
424 assert(src_bit_size ==
425 nir_alu_type_get_type_size(op_info->input_types[i]));
426 }
427 }
428 }
429
430 /* When in doubt, assume 32. */
431 if (bit_size == 0)
432 bit_size = 32;
433
434 /* Make sure we don't swizzle from outside of our source vector (like if a
435 * scalar value was passed into a multiply with a vector).
436 */
437 for (unsigned i = 0; i < op_info->num_inputs; i++) {
438 for (unsigned j = instr->src[i].src.ssa->num_components;
439 j < NIR_MAX_VEC_COMPONENTS; j++) {
440 instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
441 }
442 }
443
444 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
445 bit_size, NULL);
446 instr->dest.write_mask = (1 << num_components) - 1;
447
448 nir_builder_instr_insert(build, &instr->instr);
449
450 return &instr->dest.dest.ssa;
451 }
452
453 static inline nir_ssa_def *
454 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
455 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
456 {
457 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
458 if (!instr)
459 return NULL;
460
461 instr->src[0].src = nir_src_for_ssa(src0);
462 if (src1)
463 instr->src[1].src = nir_src_for_ssa(src1);
464 if (src2)
465 instr->src[2].src = nir_src_for_ssa(src2);
466 if (src3)
467 instr->src[3].src = nir_src_for_ssa(src3);
468
469 return nir_builder_alu_instr_finish_and_insert(build, instr);
470 }
471
472 /* for the couple special cases with more than 4 src args: */
473 static inline nir_ssa_def *
474 nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs)
475 {
476 const nir_op_info *op_info = &nir_op_infos[op];
477 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
478 if (!instr)
479 return NULL;
480
481 for (unsigned i = 0; i < op_info->num_inputs; i++)
482 instr->src[i].src = nir_src_for_ssa(srcs[i]);
483
484 return nir_builder_alu_instr_finish_and_insert(build, instr);
485 }
486
487 #include "nir_builder_opcodes.h"
488
489 static inline nir_ssa_def *
490 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
491 {
492 return nir_build_alu_src_arr(build, nir_op_vec(num_components), comp);
493 }
494
495 static inline nir_ssa_def *
496 nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
497 {
498 assert(!src.abs && !src.negate);
499 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
500 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
501 nir_src_bit_size(src.src), NULL);
502 mov->exact = build->exact;
503 mov->dest.write_mask = (1 << num_components) - 1;
504 mov->src[0] = src;
505 nir_builder_instr_insert(build, &mov->instr);
506
507 return &mov->dest.dest.ssa;
508 }
509
510 /**
511 * Construct an fmov or imov that reswizzles the source's components.
512 */
513 static inline nir_ssa_def *
514 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
515 unsigned num_components)
516 {
517 assert(num_components <= NIR_MAX_VEC_COMPONENTS);
518 nir_alu_src alu_src = { NIR_SRC_INIT };
519 alu_src.src = nir_src_for_ssa(src);
520
521 bool is_identity_swizzle = true;
522 for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
523 if (swiz[i] != i)
524 is_identity_swizzle = false;
525 alu_src.swizzle[i] = swiz[i];
526 }
527
528 if (num_components == src->num_components && is_identity_swizzle)
529 return src;
530
531 return nir_mov_alu(build, alu_src, num_components);
532 }
533
534 /* Selects the right fdot given the number of components in each source. */
535 static inline nir_ssa_def *
536 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
537 {
538 assert(src0->num_components == src1->num_components);
539 switch (src0->num_components) {
540 case 1: return nir_fmul(build, src0, src1);
541 case 2: return nir_fdot2(build, src0, src1);
542 case 3: return nir_fdot3(build, src0, src1);
543 case 4: return nir_fdot4(build, src0, src1);
544 default:
545 unreachable("bad component size");
546 }
547
548 return NULL;
549 }
550
551 static inline nir_ssa_def *
552 nir_ball_iequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
553 {
554 switch (src0->num_components) {
555 case 1: return nir_ieq(b, src0, src1);
556 case 2: return nir_ball_iequal2(b, src0, src1);
557 case 3: return nir_ball_iequal3(b, src0, src1);
558 case 4: return nir_ball_iequal4(b, src0, src1);
559 default:
560 unreachable("bad component size");
561 }
562 }
563
564 static inline nir_ssa_def *
565 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
566 {
567 switch (src0->num_components) {
568 case 1: return nir_ine(b, src0, src1);
569 case 2: return nir_bany_inequal2(b, src0, src1);
570 case 3: return nir_bany_inequal3(b, src0, src1);
571 case 4: return nir_bany_inequal4(b, src0, src1);
572 default:
573 unreachable("bad component size");
574 }
575 }
576
577 static inline nir_ssa_def *
578 nir_bany(nir_builder *b, nir_ssa_def *src)
579 {
580 return nir_bany_inequal(b, src, nir_imm_false(b));
581 }
582
583 static inline nir_ssa_def *
584 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
585 {
586 return nir_swizzle(b, def, &c, 1);
587 }
588
589 static inline nir_ssa_def *
590 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
591 {
592 unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
593
594 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
595 if ((mask & (1 << i)) == 0)
596 continue;
597 swizzle[num_channels++] = i;
598 }
599
600 return nir_swizzle(b, def, swizzle, num_channels);
601 }
602
603 static inline nir_ssa_def *
604 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
605 unsigned start, unsigned end)
606 {
607 if (start == end - 1) {
608 return nir_channel(b, vec, start);
609 } else {
610 unsigned mid = start + (end - start) / 2;
611 return nir_bcsel(b, nir_ilt(b, c, nir_imm_int(b, mid)),
612 _nir_vector_extract_helper(b, vec, c, start, mid),
613 _nir_vector_extract_helper(b, vec, c, mid, end));
614 }
615 }
616
617 static inline nir_ssa_def *
618 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
619 {
620 nir_src c_src = nir_src_for_ssa(c);
621 if (nir_src_is_const(c_src)) {
622 unsigned c_const = nir_src_as_uint(c_src);
623 if (c_const < vec->num_components)
624 return nir_channel(b, vec, c_const);
625 else
626 return nir_ssa_undef(b, 1, vec->bit_size);
627 } else {
628 return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
629 }
630 }
631
632 static inline nir_ssa_def *
633 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
634 {
635 if (x->bit_size == dest_bit_size)
636 return x;
637
638 switch (dest_bit_size) {
639 case 64: return nir_i2i64(build, x);
640 case 32: return nir_i2i32(build, x);
641 case 16: return nir_i2i16(build, x);
642 case 8: return nir_i2i8(build, x);
643 default: unreachable("Invalid bit size");
644 }
645 }
646
647 static inline nir_ssa_def *
648 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
649 {
650 if (x->bit_size == dest_bit_size)
651 return x;
652
653 switch (dest_bit_size) {
654 case 64: return nir_u2u64(build, x);
655 case 32: return nir_u2u32(build, x);
656 case 16: return nir_u2u16(build, x);
657 case 8: return nir_u2u8(build, x);
658 default: unreachable("Invalid bit size");
659 }
660 }
661
662 static inline nir_ssa_def *
663 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
664 {
665 assert(x->bit_size <= 64);
666 if (x->bit_size < 64)
667 y &= (1ull << x->bit_size) - 1;
668
669 if (y == 0) {
670 return x;
671 } else {
672 return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
673 }
674 }
675
676 static inline nir_ssa_def *
677 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
678 {
679 assert(x->bit_size <= 64);
680 if (x->bit_size < 64)
681 y &= (1ull << x->bit_size) - 1;
682
683 if (y == 0) {
684 return nir_imm_intN_t(build, 0, x->bit_size);
685 } else if (y == 1) {
686 return x;
687 } else if (util_is_power_of_two_or_zero64(y)) {
688 return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
689 } else {
690 return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
691 }
692 }
693
694 static inline nir_ssa_def *
695 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
696 {
697 return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
698 }
699
700 static inline nir_ssa_def *
701 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
702 {
703 return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
704 }
705
706 static inline nir_ssa_def *
707 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
708 {
709 assert(src->num_components * src->bit_size == dest_bit_size);
710
711 switch (dest_bit_size) {
712 case 64:
713 switch (src->bit_size) {
714 case 32: return nir_pack_64_2x32(b, src);
715 case 16: return nir_pack_64_4x16(b, src);
716 default: break;
717 }
718 break;
719
720 case 32:
721 if (src->bit_size == 16)
722 return nir_pack_32_2x16(b, src);
723 break;
724
725 default:
726 break;
727 }
728
729 /* If we got here, we have no dedicated unpack opcode. */
730 nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
731 for (unsigned i = 0; i < src->num_components; i++) {
732 nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
733 val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
734 dest = nir_ior(b, dest, val);
735 }
736 return dest;
737 }
738
739 static inline nir_ssa_def *
740 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
741 {
742 assert(src->num_components == 1);
743 assert(src->bit_size > dest_bit_size);
744 const unsigned dest_num_components = src->bit_size / dest_bit_size;
745 assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
746
747 switch (src->bit_size) {
748 case 64:
749 switch (dest_bit_size) {
750 case 32: return nir_unpack_64_2x32(b, src);
751 case 16: return nir_unpack_64_4x16(b, src);
752 default: break;
753 }
754 break;
755
756 case 32:
757 if (dest_bit_size == 16)
758 return nir_unpack_32_2x16(b, src);
759 break;
760
761 default:
762 break;
763 }
764
765 /* If we got here, we have no dedicated unpack opcode. */
766 nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
767 for (unsigned i = 0; i < dest_num_components; i++) {
768 nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
769 dest_comps[i] = nir_u2u(b, val, dest_bit_size);
770 }
771 return nir_vec(b, dest_comps, dest_num_components);
772 }
773
774 static inline nir_ssa_def *
775 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
776 {
777 assert((src->bit_size * src->num_components) % dest_bit_size == 0);
778 const unsigned dest_num_components =
779 (src->bit_size * src->num_components) / dest_bit_size;
780 assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
781
782 if (src->bit_size > dest_bit_size) {
783 assert(src->bit_size % dest_bit_size == 0);
784 if (src->num_components == 1) {
785 return nir_unpack_bits(b, src, dest_bit_size);
786 } else {
787 const unsigned divisor = src->bit_size / dest_bit_size;
788 assert(src->num_components * divisor == dest_num_components);
789 nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
790 for (unsigned i = 0; i < src->num_components; i++) {
791 nir_ssa_def *unpacked =
792 nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
793 assert(unpacked->num_components == divisor);
794 for (unsigned j = 0; j < divisor; j++)
795 dest[i * divisor + j] = nir_channel(b, unpacked, j);
796 }
797 return nir_vec(b, dest, dest_num_components);
798 }
799 } else if (src->bit_size < dest_bit_size) {
800 assert(dest_bit_size % src->bit_size == 0);
801 if (dest_num_components == 1) {
802 return nir_pack_bits(b, src, dest_bit_size);
803 } else {
804 const unsigned divisor = dest_bit_size / src->bit_size;
805 assert(src->num_components == dest_num_components * divisor);
806 nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
807 for (unsigned i = 0; i < dest_num_components; i++) {
808 nir_component_mask_t src_mask =
809 ((1 << divisor) - 1) << (i * divisor);
810 dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
811 dest_bit_size);
812 }
813 return nir_vec(b, dest, dest_num_components);
814 }
815 } else {
816 assert(src->bit_size == dest_bit_size);
817 return src;
818 }
819 }
820
821 /**
822 * Turns a nir_src into a nir_ssa_def * so it can be passed to
823 * nir_build_alu()-based builder calls.
824 *
825 * See nir_ssa_for_alu_src() for alu instructions.
826 */
827 static inline nir_ssa_def *
828 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
829 {
830 if (src.is_ssa && src.ssa->num_components == num_components)
831 return src.ssa;
832
833 nir_alu_src alu = { NIR_SRC_INIT };
834 alu.src = src;
835 for (int j = 0; j < 4; j++)
836 alu.swizzle[j] = j;
837
838 return nir_mov_alu(build, alu, num_components);
839 }
840
841 /**
842 * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
843 * nir_alu_src's swizzle.
844 */
845 static inline nir_ssa_def *
846 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
847 {
848 static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
849 for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
850 trivial_swizzle[i] = i;
851 nir_alu_src *src = &instr->src[srcn];
852 unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
853
854 if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
855 !src->abs && !src->negate &&
856 (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
857 return src->src.ssa;
858
859 return nir_mov_alu(build, *src, num_components);
860 }
861
862 static inline unsigned
863 nir_get_ptr_bitsize(nir_builder *build)
864 {
865 if (build->shader->info.stage == MESA_SHADER_KERNEL)
866 return build->shader->info.cs.ptr_size;
867 return 32;
868 }
869
870 static inline nir_deref_instr *
871 nir_build_deref_var(nir_builder *build, nir_variable *var)
872 {
873 nir_deref_instr *deref =
874 nir_deref_instr_create(build->shader, nir_deref_type_var);
875
876 deref->mode = var->data.mode;
877 deref->type = var->type;
878 deref->var = var;
879
880 nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
881 nir_get_ptr_bitsize(build), NULL);
882
883 nir_builder_instr_insert(build, &deref->instr);
884
885 return deref;
886 }
887
888 static inline nir_deref_instr *
889 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
890 nir_ssa_def *index)
891 {
892 assert(glsl_type_is_array(parent->type) ||
893 glsl_type_is_matrix(parent->type) ||
894 glsl_type_is_vector(parent->type));
895
896 assert(index->bit_size == parent->dest.ssa.bit_size);
897
898 nir_deref_instr *deref =
899 nir_deref_instr_create(build->shader, nir_deref_type_array);
900
901 deref->mode = parent->mode;
902 deref->type = glsl_get_array_element(parent->type);
903 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
904 deref->arr.index = nir_src_for_ssa(index);
905
906 nir_ssa_dest_init(&deref->instr, &deref->dest,
907 parent->dest.ssa.num_components,
908 parent->dest.ssa.bit_size, NULL);
909
910 nir_builder_instr_insert(build, &deref->instr);
911
912 return deref;
913 }
914
915 static inline nir_deref_instr *
916 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
917 int64_t index)
918 {
919 assert(parent->dest.is_ssa);
920 nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
921 parent->dest.ssa.bit_size);
922
923 return nir_build_deref_array(build, parent, idx_ssa);
924 }
925
926 static inline nir_deref_instr *
927 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
928 nir_ssa_def *index)
929 {
930 assert(parent->deref_type == nir_deref_type_array ||
931 parent->deref_type == nir_deref_type_ptr_as_array ||
932 parent->deref_type == nir_deref_type_cast);
933
934 assert(index->bit_size == parent->dest.ssa.bit_size);
935
936 nir_deref_instr *deref =
937 nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
938
939 deref->mode = parent->mode;
940 deref->type = parent->type;
941 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
942 deref->arr.index = nir_src_for_ssa(index);
943
944 nir_ssa_dest_init(&deref->instr, &deref->dest,
945 parent->dest.ssa.num_components,
946 parent->dest.ssa.bit_size, NULL);
947
948 nir_builder_instr_insert(build, &deref->instr);
949
950 return deref;
951 }
952
953 static inline nir_deref_instr *
954 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
955 {
956 assert(glsl_type_is_array(parent->type) ||
957 glsl_type_is_matrix(parent->type));
958
959 nir_deref_instr *deref =
960 nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
961
962 deref->mode = parent->mode;
963 deref->type = glsl_get_array_element(parent->type);
964 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
965
966 nir_ssa_dest_init(&deref->instr, &deref->dest,
967 parent->dest.ssa.num_components,
968 parent->dest.ssa.bit_size, NULL);
969
970 nir_builder_instr_insert(build, &deref->instr);
971
972 return deref;
973 }
974
975 static inline nir_deref_instr *
976 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
977 unsigned index)
978 {
979 assert(glsl_type_is_struct_or_ifc(parent->type));
980
981 nir_deref_instr *deref =
982 nir_deref_instr_create(build->shader, nir_deref_type_struct);
983
984 deref->mode = parent->mode;
985 deref->type = glsl_get_struct_field(parent->type, index);
986 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
987 deref->strct.index = index;
988
989 nir_ssa_dest_init(&deref->instr, &deref->dest,
990 parent->dest.ssa.num_components,
991 parent->dest.ssa.bit_size, NULL);
992
993 nir_builder_instr_insert(build, &deref->instr);
994
995 return deref;
996 }
997
998 static inline nir_deref_instr *
999 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
1000 nir_variable_mode mode, const struct glsl_type *type,
1001 unsigned ptr_stride)
1002 {
1003 nir_deref_instr *deref =
1004 nir_deref_instr_create(build->shader, nir_deref_type_cast);
1005
1006 deref->mode = mode;
1007 deref->type = type;
1008 deref->parent = nir_src_for_ssa(parent);
1009 deref->cast.ptr_stride = ptr_stride;
1010
1011 nir_ssa_dest_init(&deref->instr, &deref->dest,
1012 parent->num_components, parent->bit_size, NULL);
1013
1014 nir_builder_instr_insert(build, &deref->instr);
1015
1016 return deref;
1017 }
1018
1019 /** Returns a deref that follows another but starting from the given parent
1020 *
1021 * The new deref will be the same type and take the same array or struct index
1022 * as the leader deref but it may have a different parent. This is very
1023 * useful for walking deref paths.
1024 */
1025 static inline nir_deref_instr *
1026 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1027 nir_deref_instr *leader)
1028 {
1029 /* If the derefs would have the same parent, don't make a new one */
1030 assert(leader->parent.is_ssa);
1031 if (leader->parent.ssa == &parent->dest.ssa)
1032 return leader;
1033
1034 UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1035
1036 switch (leader->deref_type) {
1037 case nir_deref_type_var:
1038 unreachable("A var dereference cannot have a parent");
1039 break;
1040
1041 case nir_deref_type_array:
1042 case nir_deref_type_array_wildcard:
1043 assert(glsl_type_is_matrix(parent->type) ||
1044 glsl_type_is_array(parent->type) ||
1045 (leader->deref_type == nir_deref_type_array &&
1046 glsl_type_is_vector(parent->type)));
1047 assert(glsl_get_length(parent->type) ==
1048 glsl_get_length(leader_parent->type));
1049
1050 if (leader->deref_type == nir_deref_type_array) {
1051 assert(leader->arr.index.is_ssa);
1052 nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1053 parent->dest.ssa.bit_size);
1054 return nir_build_deref_array(b, parent, index);
1055 } else {
1056 return nir_build_deref_array_wildcard(b, parent);
1057 }
1058
1059 case nir_deref_type_struct:
1060 assert(glsl_type_is_struct_or_ifc(parent->type));
1061 assert(glsl_get_length(parent->type) ==
1062 glsl_get_length(leader_parent->type));
1063
1064 return nir_build_deref_struct(b, parent, leader->strct.index);
1065
1066 default:
1067 unreachable("Invalid deref instruction type");
1068 }
1069 }
1070
1071 static inline nir_ssa_def *
1072 nir_load_reg(nir_builder *build, nir_register *reg)
1073 {
1074 return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1075 }
1076
1077 static inline nir_ssa_def *
1078 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1079 enum gl_access_qualifier access)
1080 {
1081 nir_intrinsic_instr *load =
1082 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1083 load->num_components = glsl_get_vector_elements(deref->type);
1084 load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1085 nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1086 glsl_get_bit_size(deref->type), NULL);
1087 nir_intrinsic_set_access(load, access);
1088 nir_builder_instr_insert(build, &load->instr);
1089 return &load->dest.ssa;
1090 }
1091
1092 static inline nir_ssa_def *
1093 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1094 {
1095 return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1096 }
1097
1098 static inline void
1099 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1100 nir_ssa_def *value, unsigned writemask,
1101 enum gl_access_qualifier access)
1102 {
1103 nir_intrinsic_instr *store =
1104 nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1105 store->num_components = glsl_get_vector_elements(deref->type);
1106 store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1107 store->src[1] = nir_src_for_ssa(value);
1108 nir_intrinsic_set_write_mask(store,
1109 writemask & ((1 << store->num_components) - 1));
1110 nir_intrinsic_set_access(store, access);
1111 nir_builder_instr_insert(build, &store->instr);
1112 }
1113
1114 static inline void
1115 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1116 nir_ssa_def *value, unsigned writemask)
1117 {
1118 nir_store_deref_with_access(build, deref, value, writemask,
1119 (enum gl_access_qualifier)0);
1120 }
1121
1122 static inline void
1123 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1124 {
1125 nir_intrinsic_instr *copy =
1126 nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1127 copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1128 copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1129 nir_builder_instr_insert(build, &copy->instr);
1130 }
1131
1132 static inline nir_ssa_def *
1133 nir_load_var(nir_builder *build, nir_variable *var)
1134 {
1135 return nir_load_deref(build, nir_build_deref_var(build, var));
1136 }
1137
1138 static inline void
1139 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1140 unsigned writemask)
1141 {
1142 nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1143 }
1144
1145 static inline void
1146 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1147 {
1148 nir_copy_deref(build, nir_build_deref_var(build, dest),
1149 nir_build_deref_var(build, src));
1150 }
1151
1152 static inline nir_ssa_def *
1153 nir_load_param(nir_builder *build, uint32_t param_idx)
1154 {
1155 assert(param_idx < build->impl->function->num_params);
1156 nir_parameter *param = &build->impl->function->params[param_idx];
1157
1158 nir_intrinsic_instr *load =
1159 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1160 nir_intrinsic_set_param_idx(load, param_idx);
1161 load->num_components = param->num_components;
1162 nir_ssa_dest_init(&load->instr, &load->dest,
1163 param->num_components, param->bit_size, NULL);
1164 nir_builder_instr_insert(build, &load->instr);
1165 return &load->dest.ssa;
1166 }
1167
1168 #include "nir_builder_opcodes.h"
1169
1170 static inline nir_ssa_def *
1171 nir_f2b(nir_builder *build, nir_ssa_def *f)
1172 {
1173 return nir_f2b1(build, f);
1174 }
1175
1176 static inline nir_ssa_def *
1177 nir_i2b(nir_builder *build, nir_ssa_def *i)
1178 {
1179 return nir_i2b1(build, i);
1180 }
1181
1182 static inline nir_ssa_def *
1183 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1184 {
1185 switch (bit_size) {
1186 case 64: return nir_b2f64(build, b);
1187 case 32: return nir_b2f32(build, b);
1188 case 16: return nir_b2f16(build, b);
1189 default:
1190 unreachable("Invalid bit-size");
1191 };
1192 }
1193
1194 static inline nir_ssa_def *
1195 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1196 unsigned interp_mode)
1197 {
1198 nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1199 nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1200 nir_intrinsic_set_interp_mode(bary, interp_mode);
1201 nir_builder_instr_insert(build, &bary->instr);
1202 return &bary->dest.ssa;
1203 }
1204
1205 static inline void
1206 nir_jump(nir_builder *build, nir_jump_type jump_type)
1207 {
1208 nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1209 nir_builder_instr_insert(build, &jump->instr);
1210 }
1211
1212 static inline nir_ssa_def *
1213 nir_compare_func(nir_builder *b, enum compare_func func,
1214 nir_ssa_def *src0, nir_ssa_def *src1)
1215 {
1216 switch (func) {
1217 case COMPARE_FUNC_NEVER:
1218 return nir_imm_int(b, 0);
1219 case COMPARE_FUNC_ALWAYS:
1220 return nir_imm_int(b, ~0);
1221 case COMPARE_FUNC_EQUAL:
1222 return nir_feq(b, src0, src1);
1223 case COMPARE_FUNC_NOTEQUAL:
1224 return nir_fne(b, src0, src1);
1225 case COMPARE_FUNC_GREATER:
1226 return nir_flt(b, src1, src0);
1227 case COMPARE_FUNC_GEQUAL:
1228 return nir_fge(b, src0, src1);
1229 case COMPARE_FUNC_LESS:
1230 return nir_flt(b, src0, src1);
1231 case COMPARE_FUNC_LEQUAL:
1232 return nir_fge(b, src1, src0);
1233 }
1234 unreachable("bad compare func");
1235 }
1236
1237 #endif /* NIR_BUILDER_H */