src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = nir_src_for_ssa(condition);
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_else(nir_builder *build, nir_if *nif)
 110 {
 111    if (nif) {
 112       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 113    } else {
 114       nir_block *block = nir_cursor_current_block(build->cursor);
 115       nif = nir_cf_node_as_if(block->cf_node.parent);
 116    }
 117    build->cursor = nir_before_cf_list(&nif->else_list);
 118    return nif;
 119 }
 120
 121 static inline void
 122 nir_pop_if(nir_builder *build, nir_if *nif)
 123 {
 124    if (nif) {
 125       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 126    } else {
 127       nir_block *block = nir_cursor_current_block(build->cursor);
 128       nif = nir_cf_node_as_if(block->cf_node.parent);
 129    }
 130    build->cursor = nir_after_cf_node(&nif->cf_node);
 131 }
 132
 133 static inline nir_ssa_def *
 134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 135 {
 136    nir_block *block = nir_cursor_current_block(build->cursor);
 137    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 138
 139    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 140
 141    nir_phi_src *src = ralloc(phi, nir_phi_src);
 142    src->pred = nir_if_last_then_block(nif);
 143    src->src = nir_src_for_ssa(then_def);
 144    exec_list_push_tail(&phi->srcs, &src->node);
 145
 146    src = ralloc(phi, nir_phi_src);
 147    src->pred = nir_if_last_else_block(nif);
 148    src->src = nir_src_for_ssa(else_def);
 149    exec_list_push_tail(&phi->srcs, &src->node);
 150
 151    assert(then_def->num_components == else_def->num_components);
 152    assert(then_def->bit_size == else_def->bit_size);
 153    nir_ssa_dest_init(&phi->instr, &phi->dest,
 154                      then_def->num_components, then_def->bit_size, NULL);
 155
 156    nir_builder_instr_insert(build, &phi->instr);
 157
 158    return &phi->dest.ssa;
 159 }
 160
 161 static inline nir_loop *
 162 nir_push_loop(nir_builder *build)
 163 {
 164    nir_loop *loop = nir_loop_create(build->shader);
 165    nir_builder_cf_insert(build, &loop->cf_node);
 166    build->cursor = nir_before_cf_list(&loop->body);
 167    return loop;
 168 }
 169
 170 static inline void
 171 nir_pop_loop(nir_builder *build, nir_loop *loop)
 172 {
 173    if (loop) {
 174       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 175    } else {
 176       nir_block *block = nir_cursor_current_block(build->cursor);
 177       loop = nir_cf_node_as_loop(block->cf_node.parent);
 178    }
 179    build->cursor = nir_after_cf_node(&loop->cf_node);
 180 }
 181
 182 static inline nir_ssa_def *
 183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 184 {
 185    nir_ssa_undef_instr *undef =
 186       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 187    if (!undef)
 188       return NULL;
 189
 190    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 191
 192    return &undef->def;
 193 }
 194
 195 static inline nir_ssa_def *
 196 nir_build_imm(nir_builder *build, unsigned num_components,
 197               unsigned bit_size, const nir_const_value *value)
 198 {
 199    nir_load_const_instr *load_const =
 200       nir_load_const_instr_create(build->shader, num_components, bit_size);
 201    if (!load_const)
 202       return NULL;
 203
 204    memcpy(load_const->value, value, sizeof(nir_const_value) * num_components);
 205
 206    nir_builder_instr_insert(build, &load_const->instr);
 207
 208    return &load_const->def;
 209 }
 210
 211 static inline nir_ssa_def *
 212 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
 213 {
 214    nir_load_const_instr *load_const =
 215       nir_load_const_instr_create(build->shader, num_components, bit_size);
 216
 217    /* nir_load_const_instr_create uses rzalloc so it's already zero */
 218
 219    nir_builder_instr_insert(build, &load_const->instr);
 220
 221    return &load_const->def;
 222 }
 223
 224 static inline nir_ssa_def *
 225 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 226 {
 227    nir_const_value v = nir_const_value_for_bool(x, bit_size);
 228    return nir_build_imm(build, 1, bit_size, &v);
 229 }
 230
 231 static inline nir_ssa_def *
 232 nir_imm_bool(nir_builder *build, bool x)
 233 {
 234    return nir_imm_boolN_t(build, x, 1);
 235 }
 236
 237 static inline nir_ssa_def *
 238 nir_imm_true(nir_builder *build)
 239 {
 240    return nir_imm_bool(build, true);
 241 }
 242
 243 static inline nir_ssa_def *
 244 nir_imm_false(nir_builder *build)
 245 {
 246    return nir_imm_bool(build, false);
 247 }
 248
 249 static inline nir_ssa_def *
 250 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 251 {
 252    nir_const_value v = nir_const_value_for_float(x, bit_size);
 253    return nir_build_imm(build, 1, bit_size, &v);
 254 }
 255
 256 static inline nir_ssa_def *
 257 nir_imm_float16(nir_builder *build, float x)
 258 {
 259    return nir_imm_floatN_t(build, x, 16);
 260 }
 261
 262 static inline nir_ssa_def *
 263 nir_imm_float(nir_builder *build, float x)
 264 {
 265    return nir_imm_floatN_t(build, x, 32);
 266 }
 267
 268 static inline nir_ssa_def *
 269 nir_imm_double(nir_builder *build, double x)
 270 {
 271    return nir_imm_floatN_t(build, x, 64);
 272 }
 273
 274 static inline nir_ssa_def *
 275 nir_imm_vec2(nir_builder *build, float x, float y)
 276 {
 277    nir_const_value v[2] = {
 278       nir_const_value_for_float(x, 32),
 279       nir_const_value_for_float(y, 32),
 280    };
 281    return nir_build_imm(build, 2, 32, v);
 282 }
 283
 284 static inline nir_ssa_def *
 285 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 286 {
 287    nir_const_value v[4] = {
 288       nir_const_value_for_float(x, 32),
 289       nir_const_value_for_float(y, 32),
 290       nir_const_value_for_float(z, 32),
 291       nir_const_value_for_float(w, 32),
 292    };
 293
 294    return nir_build_imm(build, 4, 32, v);
 295 }
 296
 297 static inline nir_ssa_def *
 298 nir_imm_vec4_16(nir_builder *build, float x, float y, float z, float w)
 299 {
 300    nir_const_value v[4] = {
 301       nir_const_value_for_float(x, 16),
 302       nir_const_value_for_float(y, 16),
 303       nir_const_value_for_float(z, 16),
 304       nir_const_value_for_float(w, 16),
 305    };
 306
 307    return nir_build_imm(build, 4, 16, v);
 308 }
 309
 310 static inline nir_ssa_def *
 311 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 312 {
 313    nir_const_value v = nir_const_value_for_raw_uint(x, bit_size);
 314    return nir_build_imm(build, 1, bit_size, &v);
 315 }
 316
 317 static inline nir_ssa_def *
 318 nir_imm_int(nir_builder *build, int x)
 319 {
 320    return nir_imm_intN_t(build, x, 32);
 321 }
 322
 323 static inline nir_ssa_def *
 324 nir_imm_int64(nir_builder *build, int64_t x)
 325 {
 326    return nir_imm_intN_t(build, x, 64);
 327 }
 328
 329 static inline nir_ssa_def *
 330 nir_imm_ivec2(nir_builder *build, int x, int y)
 331 {
 332    nir_const_value v[2] = {
 333       nir_const_value_for_int(x, 32),
 334       nir_const_value_for_int(y, 32),
 335    };
 336
 337    return nir_build_imm(build, 2, 32, v);
 338 }
 339
 340 static inline nir_ssa_def *
 341 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 342 {
 343    nir_const_value v[4] = {
 344       nir_const_value_for_int(x, 32),
 345       nir_const_value_for_int(y, 32),
 346       nir_const_value_for_int(z, 32),
 347       nir_const_value_for_int(w, 32),
 348    };
 349
 350    return nir_build_imm(build, 4, 32, v);
 351 }
 352
 353 static inline nir_ssa_def *
 354 nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr)
 355 {
 356    const nir_op_info *op_info = &nir_op_infos[instr->op];
 357
 358    instr->exact = build->exact;
 359
 360    /* Guess the number of components the destination temporary should have
 361     * based on our input sizes, if it's not fixed for the op.
 362     */
 363    unsigned num_components = op_info->output_size;
 364    if (num_components == 0) {
 365       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 366          if (op_info->input_sizes[i] == 0)
 367             num_components = MAX2(num_components,
 368                                   instr->src[i].src.ssa->num_components);
 369       }
 370    }
 371    assert(num_components != 0);
 372
 373    /* Figure out the bitwidth based on the source bitwidth if the instruction
 374     * is variable-width.
 375     */
 376    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 377    if (bit_size == 0) {
 378       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 379          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 380          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 381             if (bit_size)
 382                assert(src_bit_size == bit_size);
 383             else
 384                bit_size = src_bit_size;
 385          } else {
 386             assert(src_bit_size ==
 387                nir_alu_type_get_type_size(op_info->input_types[i]));
 388          }
 389       }
 390    }
 391
 392    /* When in doubt, assume 32. */
 393    if (bit_size == 0)
 394       bit_size = 32;
 395
 396    /* Make sure we don't swizzle from outside of our source vector (like if a
 397     * scalar value was passed into a multiply with a vector).
 398     */
 399    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 400       for (unsigned j = instr->src[i].src.ssa->num_components;
 401            j < NIR_MAX_VEC_COMPONENTS; j++) {
 402          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 403       }
 404    }
 405
 406    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 407                      bit_size, NULL);
 408    instr->dest.write_mask = (1 << num_components) - 1;
 409
 410    nir_builder_instr_insert(build, &instr->instr);
 411
 412    return &instr->dest.dest.ssa;
 413 }
 414
 415 static inline nir_ssa_def *
 416 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 417               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 418 {
 419    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 420    if (!instr)
 421       return NULL;
 422
 423    instr->src[0].src = nir_src_for_ssa(src0);
 424    if (src1)
 425       instr->src[1].src = nir_src_for_ssa(src1);
 426    if (src2)
 427       instr->src[2].src = nir_src_for_ssa(src2);
 428    if (src3)
 429       instr->src[3].src = nir_src_for_ssa(src3);
 430
 431    return nir_builder_alu_instr_finish_and_insert(build, instr);
 432 }
 433
 434 /* for the couple special cases with more than 4 src args: */
 435 static inline nir_ssa_def *
 436 nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs)
 437 {
 438    const nir_op_info *op_info = &nir_op_infos[op];
 439    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 440    if (!instr)
 441       return NULL;
 442
 443    for (unsigned i = 0; i < op_info->num_inputs; i++)
 444       instr->src[i].src = nir_src_for_ssa(srcs[i]);
 445
 446    return nir_builder_alu_instr_finish_and_insert(build, instr);
 447 }
 448
 449 #include "nir_builder_opcodes.h"
 450
 451 static inline nir_ssa_def *
 452 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 453 {
 454    return nir_build_alu_src_arr(build, nir_op_vec(num_components), comp);
 455 }
 456
 457 static inline nir_ssa_def *
 458 nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 459 {
 460    assert(!src.abs && !src.negate);
 461    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
 462    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 463                      nir_src_bit_size(src.src), NULL);
 464    mov->exact = build->exact;
 465    mov->dest.write_mask = (1 << num_components) - 1;
 466    mov->src[0] = src;
 467    nir_builder_instr_insert(build, &mov->instr);
 468
 469    return &mov->dest.dest.ssa;
 470 }
 471
 472 /**
 473  * Construct an fmov or imov that reswizzles the source's components.
 474  */
 475 static inline nir_ssa_def *
 476 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 477             unsigned num_components)
 478 {
 479    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 480    nir_alu_src alu_src = { NIR_SRC_INIT };
 481    alu_src.src = nir_src_for_ssa(src);
 482
 483    bool is_identity_swizzle = true;
 484    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 485       if (swiz[i] != i)
 486          is_identity_swizzle = false;
 487       alu_src.swizzle[i] = swiz[i];
 488    }
 489
 490    if (num_components == src->num_components && is_identity_swizzle)
 491       return src;
 492
 493    return nir_mov_alu(build, alu_src, num_components);
 494 }
 495
 496 /* Selects the right fdot given the number of components in each source. */
 497 static inline nir_ssa_def *
 498 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 499 {
 500    assert(src0->num_components == src1->num_components);
 501    switch (src0->num_components) {
 502    case 1: return nir_fmul(build, src0, src1);
 503    case 2: return nir_fdot2(build, src0, src1);
 504    case 3: return nir_fdot3(build, src0, src1);
 505    case 4: return nir_fdot4(build, src0, src1);
 506    default:
 507       unreachable("bad component size");
 508    }
 509
 510    return NULL;
 511 }
 512
 513 static inline nir_ssa_def *
 514 nir_ball_iequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 515 {
 516    switch (src0->num_components) {
 517    case 1: return nir_ieq(b, src0, src1);
 518    case 2: return nir_ball_iequal2(b, src0, src1);
 519    case 3: return nir_ball_iequal3(b, src0, src1);
 520    case 4: return nir_ball_iequal4(b, src0, src1);
 521    default:
 522       unreachable("bad component size");
 523    }
 524 }
 525
 526 static inline nir_ssa_def *
 527 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 528 {
 529    switch (src0->num_components) {
 530    case 1: return nir_ine(b, src0, src1);
 531    case 2: return nir_bany_inequal2(b, src0, src1);
 532    case 3: return nir_bany_inequal3(b, src0, src1);
 533    case 4: return nir_bany_inequal4(b, src0, src1);
 534    default:
 535       unreachable("bad component size");
 536    }
 537 }
 538
 539 static inline nir_ssa_def *
 540 nir_bany(nir_builder *b, nir_ssa_def *src)
 541 {
 542    return nir_bany_inequal(b, src, nir_imm_false(b));
 543 }
 544
 545 static inline nir_ssa_def *
 546 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 547 {
 548    return nir_swizzle(b, def, &c, 1);
 549 }
 550
 551 static inline nir_ssa_def *
 552 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 553 {
 554    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 555
 556    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 557       if ((mask & (1 << i)) == 0)
 558          continue;
 559       swizzle[num_channels++] = i;
 560    }
 561
 562    return nir_swizzle(b, def, swizzle, num_channels);
 563 }
 564
 565 static inline nir_ssa_def *
 566 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
 567                            unsigned start, unsigned end)
 568 {
 569    if (start == end - 1) {
 570       return nir_channel(b, vec, start);
 571    } else {
 572       unsigned mid = start + (end - start) / 2;
 573       return nir_bcsel(b, nir_ilt(b, c, nir_imm_int(b, mid)),
 574                        _nir_vector_extract_helper(b, vec, c, start, mid),
 575                        _nir_vector_extract_helper(b, vec, c, mid, end));
 576    }
 577 }
 578
 579 static inline nir_ssa_def *
 580 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
 581 {
 582    nir_src c_src = nir_src_for_ssa(c);
 583    if (nir_src_is_const(c_src)) {
 584       unsigned c_const = nir_src_as_uint(c_src);
 585       if (c_const < vec->num_components)
 586          return nir_channel(b, vec, c_const);
 587       else
 588          return nir_ssa_undef(b, 1, vec->bit_size);
 589    } else {
 590       return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
 591    }
 592 }
 593
 594 static inline nir_ssa_def *
 595 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 596 {
 597    if (x->bit_size == dest_bit_size)
 598       return x;
 599
 600    switch (dest_bit_size) {
 601    case 64: return nir_i2i64(build, x);
 602    case 32: return nir_i2i32(build, x);
 603    case 16: return nir_i2i16(build, x);
 604    case 8:  return nir_i2i8(build, x);
 605    default: unreachable("Invalid bit size");
 606    }
 607 }
 608
 609 static inline nir_ssa_def *
 610 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 611 {
 612    if (x->bit_size == dest_bit_size)
 613       return x;
 614
 615    switch (dest_bit_size) {
 616    case 64: return nir_u2u64(build, x);
 617    case 32: return nir_u2u32(build, x);
 618    case 16: return nir_u2u16(build, x);
 619    case 8:  return nir_u2u8(build, x);
 620    default: unreachable("Invalid bit size");
 621    }
 622 }
 623
 624 static inline nir_ssa_def *
 625 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 626 {
 627    assert(x->bit_size <= 64);
 628    if (x->bit_size < 64)
 629       y &= (1ull << x->bit_size) - 1;
 630
 631    if (y == 0) {
 632       return x;
 633    } else {
 634       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 635    }
 636 }
 637
 638 static inline nir_ssa_def *
 639 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 640 {
 641    assert(x->bit_size <= 64);
 642    if (x->bit_size < 64)
 643       y &= (1ull << x->bit_size) - 1;
 644
 645    if (y == 0) {
 646       return nir_imm_intN_t(build, 0, x->bit_size);
 647    } else if (y == 1) {
 648       return x;
 649    } else if (util_is_power_of_two_or_zero64(y)) {
 650       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 651    } else {
 652       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 653    }
 654 }
 655
 656 static inline nir_ssa_def *
 657 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 658 {
 659    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 660 }
 661
 662 static inline nir_ssa_def *
 663 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 664 {
 665    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 666 }
 667
 668 static inline nir_ssa_def *
 669 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 670 {
 671    assert(src->num_components * src->bit_size == dest_bit_size);
 672
 673    switch (dest_bit_size) {
 674    case 64:
 675       switch (src->bit_size) {
 676       case 32: return nir_pack_64_2x32(b, src);
 677       case 16: return nir_pack_64_4x16(b, src);
 678       default: break;
 679       }
 680       break;
 681
 682    case 32:
 683       if (src->bit_size == 16)
 684          return nir_pack_32_2x16(b, src);
 685       break;
 686
 687    default:
 688       break;
 689    }
 690
 691    /* If we got here, we have no dedicated unpack opcode. */
 692    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 693    for (unsigned i = 0; i < src->num_components; i++) {
 694       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 695       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 696       dest = nir_ior(b, dest, val);
 697    }
 698    return dest;
 699 }
 700
 701 static inline nir_ssa_def *
 702 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 703 {
 704    assert(src->num_components == 1);
 705    assert(src->bit_size > dest_bit_size);
 706    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 707    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 708
 709    switch (src->bit_size) {
 710    case 64:
 711       switch (dest_bit_size) {
 712       case 32: return nir_unpack_64_2x32(b, src);
 713       case 16: return nir_unpack_64_4x16(b, src);
 714       default: break;
 715       }
 716       break;
 717
 718    case 32:
 719       if (dest_bit_size == 16)
 720          return nir_unpack_32_2x16(b, src);
 721       break;
 722
 723    default:
 724       break;
 725    }
 726
 727    /* If we got here, we have no dedicated unpack opcode. */
 728    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 729    for (unsigned i = 0; i < dest_num_components; i++) {
 730       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 731       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 732    }
 733    return nir_vec(b, dest_comps, dest_num_components);
 734 }
 735
 736 static inline nir_ssa_def *
 737 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 738 {
 739    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 740    const unsigned dest_num_components =
 741       (src->bit_size * src->num_components) / dest_bit_size;
 742    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 743
 744    if (src->bit_size > dest_bit_size) {
 745       assert(src->bit_size % dest_bit_size == 0);
 746       if (src->num_components == 1) {
 747          return nir_unpack_bits(b, src, dest_bit_size);
 748       } else {
 749          const unsigned divisor = src->bit_size / dest_bit_size;
 750          assert(src->num_components * divisor == dest_num_components);
 751          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 752          for (unsigned i = 0; i < src->num_components; i++) {
 753             nir_ssa_def *unpacked =
 754                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 755             assert(unpacked->num_components == divisor);
 756             for (unsigned j = 0; j < divisor; j++)
 757                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 758          }
 759          return nir_vec(b, dest, dest_num_components);
 760       }
 761    } else if (src->bit_size < dest_bit_size) {
 762       assert(dest_bit_size % src->bit_size == 0);
 763       if (dest_num_components == 1) {
 764          return nir_pack_bits(b, src, dest_bit_size);
 765       } else {
 766          const unsigned divisor = dest_bit_size / src->bit_size;
 767          assert(src->num_components == dest_num_components * divisor);
 768          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 769          for (unsigned i = 0; i < dest_num_components; i++) {
 770             nir_component_mask_t src_mask =
 771                ((1 << divisor) - 1) << (i * divisor);
 772             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 773                                        dest_bit_size);
 774          }
 775          return nir_vec(b, dest, dest_num_components);
 776       }
 777    } else {
 778       assert(src->bit_size == dest_bit_size);
 779       return src;
 780    }
 781 }
 782
 783 /**
 784  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 785  * nir_build_alu()-based builder calls.
 786  *
 787  * See nir_ssa_for_alu_src() for alu instructions.
 788  */
 789 static inline nir_ssa_def *
 790 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 791 {
 792    if (src.is_ssa && src.ssa->num_components == num_components)
 793       return src.ssa;
 794
 795    nir_alu_src alu = { NIR_SRC_INIT };
 796    alu.src = src;
 797    for (int j = 0; j < 4; j++)
 798       alu.swizzle[j] = j;
 799
 800    return nir_mov_alu(build, alu, num_components);
 801 }
 802
 803 /**
 804  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 805  * nir_alu_src's swizzle.
 806  */
 807 static inline nir_ssa_def *
 808 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 809 {
 810    static uint8_t trivial_swizzle[] = { 0, 1, 2, 3 };
 811    STATIC_ASSERT(ARRAY_SIZE(trivial_swizzle) == NIR_MAX_VEC_COMPONENTS);
 812
 813    nir_alu_src *src = &instr->src[srcn];
 814    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 815
 816    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 817        !src->abs && !src->negate &&
 818        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 819       return src->src.ssa;
 820
 821    return nir_mov_alu(build, *src, num_components);
 822 }
 823
 824 static inline unsigned
 825 nir_get_ptr_bitsize(nir_builder *build)
 826 {
 827    if (build->shader->info.stage == MESA_SHADER_KERNEL)
 828       return build->shader->info.cs.ptr_size;
 829    return 32;
 830 }
 831
 832 static inline nir_deref_instr *
 833 nir_build_deref_var(nir_builder *build, nir_variable *var)
 834 {
 835    nir_deref_instr *deref =
 836       nir_deref_instr_create(build->shader, nir_deref_type_var);
 837
 838    deref->mode = var->data.mode;
 839    deref->type = var->type;
 840    deref->var = var;
 841
 842    nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
 843                      nir_get_ptr_bitsize(build), NULL);
 844
 845    nir_builder_instr_insert(build, &deref->instr);
 846
 847    return deref;
 848 }
 849
 850 static inline nir_deref_instr *
 851 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 852                       nir_ssa_def *index)
 853 {
 854    assert(glsl_type_is_array(parent->type) ||
 855           glsl_type_is_matrix(parent->type) ||
 856           glsl_type_is_vector(parent->type));
 857
 858    assert(index->bit_size == parent->dest.ssa.bit_size);
 859
 860    nir_deref_instr *deref =
 861       nir_deref_instr_create(build->shader, nir_deref_type_array);
 862
 863    deref->mode = parent->mode;
 864    deref->type = glsl_get_array_element(parent->type);
 865    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 866    deref->arr.index = nir_src_for_ssa(index);
 867
 868    nir_ssa_dest_init(&deref->instr, &deref->dest,
 869                      parent->dest.ssa.num_components,
 870                      parent->dest.ssa.bit_size, NULL);
 871
 872    nir_builder_instr_insert(build, &deref->instr);
 873
 874    return deref;
 875 }
 876
 877 static inline nir_deref_instr *
 878 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
 879                           int64_t index)
 880 {
 881    assert(parent->dest.is_ssa);
 882    nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
 883                                          parent->dest.ssa.bit_size);
 884
 885    return nir_build_deref_array(build, parent, idx_ssa);
 886 }
 887
 888 static inline nir_deref_instr *
 889 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
 890                              nir_ssa_def *index)
 891 {
 892    assert(parent->deref_type == nir_deref_type_array ||
 893           parent->deref_type == nir_deref_type_ptr_as_array ||
 894           parent->deref_type == nir_deref_type_cast);
 895
 896    assert(index->bit_size == parent->dest.ssa.bit_size);
 897
 898    nir_deref_instr *deref =
 899       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
 900
 901    deref->mode = parent->mode;
 902    deref->type = parent->type;
 903    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 904    deref->arr.index = nir_src_for_ssa(index);
 905
 906    nir_ssa_dest_init(&deref->instr, &deref->dest,
 907                      parent->dest.ssa.num_components,
 908                      parent->dest.ssa.bit_size, NULL);
 909
 910    nir_builder_instr_insert(build, &deref->instr);
 911
 912    return deref;
 913 }
 914
 915 static inline nir_deref_instr *
 916 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 917 {
 918    assert(glsl_type_is_array(parent->type) ||
 919           glsl_type_is_matrix(parent->type));
 920
 921    nir_deref_instr *deref =
 922       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 923
 924    deref->mode = parent->mode;
 925    deref->type = glsl_get_array_element(parent->type);
 926    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 927
 928    nir_ssa_dest_init(&deref->instr, &deref->dest,
 929                      parent->dest.ssa.num_components,
 930                      parent->dest.ssa.bit_size, NULL);
 931
 932    nir_builder_instr_insert(build, &deref->instr);
 933
 934    return deref;
 935 }
 936
 937 static inline nir_deref_instr *
 938 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 939                        unsigned index)
 940 {
 941    assert(glsl_type_is_struct_or_ifc(parent->type));
 942
 943    nir_deref_instr *deref =
 944       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 945
 946    deref->mode = parent->mode;
 947    deref->type = glsl_get_struct_field(parent->type, index);
 948    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 949    deref->strct.index = index;
 950
 951    nir_ssa_dest_init(&deref->instr, &deref->dest,
 952                      parent->dest.ssa.num_components,
 953                      parent->dest.ssa.bit_size, NULL);
 954
 955    nir_builder_instr_insert(build, &deref->instr);
 956
 957    return deref;
 958 }
 959
 960 static inline nir_deref_instr *
 961 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
 962                      nir_variable_mode mode, const struct glsl_type *type,
 963                      unsigned ptr_stride)
 964 {
 965    nir_deref_instr *deref =
 966       nir_deref_instr_create(build->shader, nir_deref_type_cast);
 967
 968    deref->mode = mode;
 969    deref->type = type;
 970    deref->parent = nir_src_for_ssa(parent);
 971    deref->cast.ptr_stride = ptr_stride;
 972
 973    nir_ssa_dest_init(&deref->instr, &deref->dest,
 974                      parent->num_components, parent->bit_size, NULL);
 975
 976    nir_builder_instr_insert(build, &deref->instr);
 977
 978    return deref;
 979 }
 980
 981 /** Returns a deref that follows another but starting from the given parent
 982  *
 983  * The new deref will be the same type and take the same array or struct index
 984  * as the leader deref but it may have a different parent.  This is very
 985  * useful for walking deref paths.
 986  */
 987 static inline nir_deref_instr *
 988 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
 989                          nir_deref_instr *leader)
 990 {
 991    /* If the derefs would have the same parent, don't make a new one */
 992    assert(leader->parent.is_ssa);
 993    if (leader->parent.ssa == &parent->dest.ssa)
 994       return leader;
 995
 996    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
 997
 998    switch (leader->deref_type) {
 999    case nir_deref_type_var:
1000       unreachable("A var dereference cannot have a parent");
1001       break;
1002
1003    case nir_deref_type_array:
1004    case nir_deref_type_array_wildcard:
1005       assert(glsl_type_is_matrix(parent->type) ||
1006              glsl_type_is_array(parent->type) ||
1007              (leader->deref_type == nir_deref_type_array &&
1008               glsl_type_is_vector(parent->type)));
1009       assert(glsl_get_length(parent->type) ==
1010              glsl_get_length(leader_parent->type));
1011
1012       if (leader->deref_type == nir_deref_type_array) {
1013          assert(leader->arr.index.is_ssa);
1014          nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1015                                          parent->dest.ssa.bit_size);
1016          return nir_build_deref_array(b, parent, index);
1017       } else {
1018          return nir_build_deref_array_wildcard(b, parent);
1019       }
1020
1021    case nir_deref_type_struct:
1022       assert(glsl_type_is_struct_or_ifc(parent->type));
1023       assert(glsl_get_length(parent->type) ==
1024              glsl_get_length(leader_parent->type));
1025
1026       return nir_build_deref_struct(b, parent, leader->strct.index);
1027
1028    default:
1029       unreachable("Invalid deref instruction type");
1030    }
1031 }
1032
1033 static inline nir_ssa_def *
1034 nir_load_reg(nir_builder *build, nir_register *reg)
1035 {
1036    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1037 }
1038
1039 static inline nir_ssa_def *
1040 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1041                            enum gl_access_qualifier access)
1042 {
1043    nir_intrinsic_instr *load =
1044       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1045    load->num_components = glsl_get_vector_elements(deref->type);
1046    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1047    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1048                      glsl_get_bit_size(deref->type), NULL);
1049    nir_intrinsic_set_access(load, access);
1050    nir_builder_instr_insert(build, &load->instr);
1051    return &load->dest.ssa;
1052 }
1053
1054 static inline nir_ssa_def *
1055 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1056 {
1057    return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1058 }
1059
1060 static inline void
1061 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1062                             nir_ssa_def *value, unsigned writemask,
1063                             enum gl_access_qualifier access)
1064 {
1065    nir_intrinsic_instr *store =
1066       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1067    store->num_components = glsl_get_vector_elements(deref->type);
1068    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1069    store->src[1] = nir_src_for_ssa(value);
1070    nir_intrinsic_set_write_mask(store,
1071                                 writemask & ((1 << store->num_components) - 1));
1072    nir_intrinsic_set_access(store, access);
1073    nir_builder_instr_insert(build, &store->instr);
1074 }
1075
1076 static inline void
1077 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1078                 nir_ssa_def *value, unsigned writemask)
1079 {
1080    nir_store_deref_with_access(build, deref, value, writemask,
1081                                (enum gl_access_qualifier)0);
1082 }
1083
1084 static inline void
1085 nir_copy_deref_with_access(nir_builder *build, nir_deref_instr *dest,
1086                            nir_deref_instr *src,
1087                            enum gl_access_qualifier dest_access,
1088                            enum gl_access_qualifier src_access)
1089 {
1090    nir_intrinsic_instr *copy =
1091       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1092    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1093    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1094    nir_intrinsic_set_dst_access(copy, dest_access);
1095    nir_intrinsic_set_src_access(copy, src_access);
1096    nir_builder_instr_insert(build, &copy->instr);
1097 }
1098
1099 static inline void
1100 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1101 {
1102    nir_copy_deref_with_access(build, dest, src,
1103                               (enum gl_access_qualifier) 0,
1104                               (enum gl_access_qualifier) 0);
1105 }
1106
1107 static inline nir_ssa_def *
1108 nir_load_var(nir_builder *build, nir_variable *var)
1109 {
1110    return nir_load_deref(build, nir_build_deref_var(build, var));
1111 }
1112
1113 static inline void
1114 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1115               unsigned writemask)
1116 {
1117    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1118 }
1119
1120 static inline void
1121 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1122 {
1123    nir_copy_deref(build, nir_build_deref_var(build, dest),
1124                          nir_build_deref_var(build, src));
1125 }
1126
1127 static inline nir_ssa_def *
1128 nir_load_param(nir_builder *build, uint32_t param_idx)
1129 {
1130    assert(param_idx < build->impl->function->num_params);
1131    nir_parameter *param = &build->impl->function->params[param_idx];
1132
1133    nir_intrinsic_instr *load =
1134       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1135    nir_intrinsic_set_param_idx(load, param_idx);
1136    load->num_components = param->num_components;
1137    nir_ssa_dest_init(&load->instr, &load->dest,
1138                      param->num_components, param->bit_size, NULL);
1139    nir_builder_instr_insert(build, &load->instr);
1140    return &load->dest.ssa;
1141 }
1142
1143 #include "nir_builder_opcodes.h"
1144
1145 static inline nir_ssa_def *
1146 nir_f2b(nir_builder *build, nir_ssa_def *f)
1147 {
1148    return nir_f2b1(build, f);
1149 }
1150
1151 static inline nir_ssa_def *
1152 nir_i2b(nir_builder *build, nir_ssa_def *i)
1153 {
1154    return nir_i2b1(build, i);
1155 }
1156
1157 static inline nir_ssa_def *
1158 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1159 {
1160    switch (bit_size) {
1161    case 64: return nir_b2f64(build, b);
1162    case 32: return nir_b2f32(build, b);
1163    case 16: return nir_b2f16(build, b);
1164    default:
1165       unreachable("Invalid bit-size");
1166    };
1167 }
1168
1169 static inline nir_ssa_def *
1170 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1171                      unsigned interp_mode)
1172 {
1173    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1174    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1175    nir_intrinsic_set_interp_mode(bary, interp_mode);
1176    nir_builder_instr_insert(build, &bary->instr);
1177    return &bary->dest.ssa;
1178 }
1179
1180 static inline void
1181 nir_jump(nir_builder *build, nir_jump_type jump_type)
1182 {
1183    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1184    nir_builder_instr_insert(build, &jump->instr);
1185 }
1186
1187 static inline nir_ssa_def *
1188 nir_compare_func(nir_builder *b, enum compare_func func,
1189                  nir_ssa_def *src0, nir_ssa_def *src1)
1190 {
1191    switch (func) {
1192    case COMPARE_FUNC_NEVER:
1193       return nir_imm_int(b, 0);
1194    case COMPARE_FUNC_ALWAYS:
1195       return nir_imm_int(b, ~0);
1196    case COMPARE_FUNC_EQUAL:
1197       return nir_feq(b, src0, src1);
1198    case COMPARE_FUNC_NOTEQUAL:
1199       return nir_fne(b, src0, src1);
1200    case COMPARE_FUNC_GREATER:
1201       return nir_flt(b, src1, src0);
1202    case COMPARE_FUNC_GEQUAL:
1203       return nir_fge(b, src0, src1);
1204    case COMPARE_FUNC_LESS:
1205       return nir_flt(b, src0, src1);
1206    case COMPARE_FUNC_LEQUAL:
1207       return nir_fge(b, src1, src0);
1208    }
1209    unreachable("bad compare func");
1210 }
1211
1212 #endif /* NIR_BUILDER_H */