src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = nir_src_for_ssa(condition);
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_else(nir_builder *build, nir_if *nif)
 110 {
 111    if (nif) {
 112       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 113    } else {
 114       nir_block *block = nir_cursor_current_block(build->cursor);
 115       nif = nir_cf_node_as_if(block->cf_node.parent);
 116    }
 117    build->cursor = nir_before_cf_list(&nif->else_list);
 118    return nif;
 119 }
 120
 121 static inline void
 122 nir_pop_if(nir_builder *build, nir_if *nif)
 123 {
 124    if (nif) {
 125       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 126    } else {
 127       nir_block *block = nir_cursor_current_block(build->cursor);
 128       nif = nir_cf_node_as_if(block->cf_node.parent);
 129    }
 130    build->cursor = nir_after_cf_node(&nif->cf_node);
 131 }
 132
 133 static inline nir_ssa_def *
 134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 135 {
 136    nir_block *block = nir_cursor_current_block(build->cursor);
 137    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 138
 139    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 140
 141    nir_phi_src *src = ralloc(phi, nir_phi_src);
 142    src->pred = nir_if_last_then_block(nif);
 143    src->src = nir_src_for_ssa(then_def);
 144    exec_list_push_tail(&phi->srcs, &src->node);
 145
 146    src = ralloc(phi, nir_phi_src);
 147    src->pred = nir_if_last_else_block(nif);
 148    src->src = nir_src_for_ssa(else_def);
 149    exec_list_push_tail(&phi->srcs, &src->node);
 150
 151    assert(then_def->num_components == else_def->num_components);
 152    assert(then_def->bit_size == else_def->bit_size);
 153    nir_ssa_dest_init(&phi->instr, &phi->dest,
 154                      then_def->num_components, then_def->bit_size, NULL);
 155
 156    nir_builder_instr_insert(build, &phi->instr);
 157
 158    return &phi->dest.ssa;
 159 }
 160
 161 static inline nir_loop *
 162 nir_push_loop(nir_builder *build)
 163 {
 164    nir_loop *loop = nir_loop_create(build->shader);
 165    nir_builder_cf_insert(build, &loop->cf_node);
 166    build->cursor = nir_before_cf_list(&loop->body);
 167    return loop;
 168 }
 169
 170 static inline void
 171 nir_pop_loop(nir_builder *build, nir_loop *loop)
 172 {
 173    if (loop) {
 174       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 175    } else {
 176       nir_block *block = nir_cursor_current_block(build->cursor);
 177       loop = nir_cf_node_as_loop(block->cf_node.parent);
 178    }
 179    build->cursor = nir_after_cf_node(&loop->cf_node);
 180 }
 181
 182 static inline nir_ssa_def *
 183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 184 {
 185    nir_ssa_undef_instr *undef =
 186       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 187    if (!undef)
 188       return NULL;
 189
 190    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 191
 192    return &undef->def;
 193 }
 194
 195 static inline nir_ssa_def *
 196 nir_build_imm(nir_builder *build, unsigned num_components,
 197               unsigned bit_size, const nir_const_value *value)
 198 {
 199    nir_load_const_instr *load_const =
 200       nir_load_const_instr_create(build->shader, num_components, bit_size);
 201    if (!load_const)
 202       return NULL;
 203
 204    memcpy(load_const->value, value, sizeof(nir_const_value) * num_components);
 205
 206    nir_builder_instr_insert(build, &load_const->instr);
 207
 208    return &load_const->def;
 209 }
 210
 211 static inline nir_ssa_def *
 212 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
 213 {
 214    nir_load_const_instr *load_const =
 215       nir_load_const_instr_create(build->shader, num_components, bit_size);
 216
 217    /* nir_load_const_instr_create uses rzalloc so it's already zero */
 218
 219    nir_builder_instr_insert(build, &load_const->instr);
 220
 221    return &load_const->def;
 222 }
 223
 224 static inline nir_ssa_def *
 225 nir_imm_bool(nir_builder *build, bool x)
 226 {
 227    nir_const_value v;
 228
 229    memset(&v, 0, sizeof(v));
 230    v.b = x;
 231
 232    return nir_build_imm(build, 1, 1, &v);
 233 }
 234
 235 static inline nir_ssa_def *
 236 nir_imm_true(nir_builder *build)
 237 {
 238    return nir_imm_bool(build, true);
 239 }
 240
 241 static inline nir_ssa_def *
 242 nir_imm_false(nir_builder *build)
 243 {
 244    return nir_imm_bool(build, false);
 245 }
 246
 247 static inline nir_ssa_def *
 248 nir_imm_float16(nir_builder *build, float x)
 249 {
 250    nir_const_value v;
 251
 252    memset(&v, 0, sizeof(v));
 253    v.u16 = _mesa_float_to_half(x);
 254
 255    return nir_build_imm(build, 1, 16, &v);
 256 }
 257
 258 static inline nir_ssa_def *
 259 nir_imm_float(nir_builder *build, float x)
 260 {
 261    nir_const_value v;
 262
 263    memset(&v, 0, sizeof(v));
 264    v.f32 = x;
 265
 266    return nir_build_imm(build, 1, 32, &v);
 267 }
 268
 269 static inline nir_ssa_def *
 270 nir_imm_double(nir_builder *build, double x)
 271 {
 272    nir_const_value v;
 273
 274    memset(&v, 0, sizeof(v));
 275    v.f64 = x;
 276
 277    return nir_build_imm(build, 1, 64, &v);
 278 }
 279
 280 static inline nir_ssa_def *
 281 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 282 {
 283    switch (bit_size) {
 284    case 16:
 285       return nir_imm_float16(build, x);
 286    case 32:
 287       return nir_imm_float(build, x);
 288    case 64:
 289       return nir_imm_double(build, x);
 290    }
 291
 292    unreachable("unknown float immediate bit size");
 293 }
 294
 295 static inline nir_ssa_def *
 296 nir_imm_vec2(nir_builder *build, float x, float y)
 297 {
 298    nir_const_value v[2];
 299
 300    memset(v, 0, sizeof(v));
 301    v[0].f32 = x;
 302    v[1].f32 = y;
 303
 304    return nir_build_imm(build, 2, 32, v);
 305 }
 306
 307 static inline nir_ssa_def *
 308 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 309 {
 310    nir_const_value v[4];
 311
 312    memset(v, 0, sizeof(v));
 313    v[0].f32 = x;
 314    v[1].f32 = y;
 315    v[2].f32 = z;
 316    v[3].f32 = w;
 317
 318    return nir_build_imm(build, 4, 32, v);
 319 }
 320
 321 static inline nir_ssa_def *
 322 nir_imm_ivec2(nir_builder *build, int x, int y)
 323 {
 324    nir_const_value v[2];
 325
 326    memset(v, 0, sizeof(v));
 327    v[0].i32 = x;
 328    v[1].i32 = y;
 329
 330    return nir_build_imm(build, 2, 32, v);
 331 }
 332
 333 static inline nir_ssa_def *
 334 nir_imm_int(nir_builder *build, int x)
 335 {
 336    nir_const_value v;
 337
 338    memset(&v, 0, sizeof(v));
 339    v.i32 = x;
 340
 341    return nir_build_imm(build, 1, 32, &v);
 342 }
 343
 344 static inline nir_ssa_def *
 345 nir_imm_int64(nir_builder *build, int64_t x)
 346 {
 347    nir_const_value v;
 348
 349    memset(&v, 0, sizeof(v));
 350    v.i64 = x;
 351
 352    return nir_build_imm(build, 1, 64, &v);
 353 }
 354
 355 static inline nir_ssa_def *
 356 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 357 {
 358    nir_const_value v;
 359
 360    memset(&v, 0, sizeof(v));
 361    assert(bit_size <= 64);
 362    if (bit_size == 1)
 363       v.b = x & 1;
 364    else
 365       v.i64 = x & (~0ull >> (64 - bit_size));
 366
 367    return nir_build_imm(build, 1, bit_size, &v);
 368 }
 369
 370 static inline nir_ssa_def *
 371 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 372 {
 373    nir_const_value v[4];
 374
 375    memset(v, 0, sizeof(v));
 376    v[0].i32 = x;
 377    v[1].i32 = y;
 378    v[2].i32 = z;
 379    v[3].i32 = w;
 380
 381    return nir_build_imm(build, 4, 32, v);
 382 }
 383
 384 static inline nir_ssa_def *
 385 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 386 {
 387    /* We use a 0/-1 convention for all booleans regardless of size */
 388    return nir_imm_intN_t(build, -(int)x, bit_size);
 389 }
 390
 391 static inline nir_ssa_def *
 392 nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr)
 393 {
 394    const nir_op_info *op_info = &nir_op_infos[instr->op];
 395
 396    instr->exact = build->exact;
 397
 398    /* Guess the number of components the destination temporary should have
 399     * based on our input sizes, if it's not fixed for the op.
 400     */
 401    unsigned num_components = op_info->output_size;
 402    if (num_components == 0) {
 403       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 404          if (op_info->input_sizes[i] == 0)
 405             num_components = MAX2(num_components,
 406                                   instr->src[i].src.ssa->num_components);
 407       }
 408    }
 409    assert(num_components != 0);
 410
 411    /* Figure out the bitwidth based on the source bitwidth if the instruction
 412     * is variable-width.
 413     */
 414    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 415    if (bit_size == 0) {
 416       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 417          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 418          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 419             if (bit_size)
 420                assert(src_bit_size == bit_size);
 421             else
 422                bit_size = src_bit_size;
 423          } else {
 424             assert(src_bit_size ==
 425                nir_alu_type_get_type_size(op_info->input_types[i]));
 426          }
 427       }
 428    }
 429
 430    /* When in doubt, assume 32. */
 431    if (bit_size == 0)
 432       bit_size = 32;
 433
 434    /* Make sure we don't swizzle from outside of our source vector (like if a
 435     * scalar value was passed into a multiply with a vector).
 436     */
 437    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 438       for (unsigned j = instr->src[i].src.ssa->num_components;
 439            j < NIR_MAX_VEC_COMPONENTS; j++) {
 440          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 441       }
 442    }
 443
 444    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 445                      bit_size, NULL);
 446    instr->dest.write_mask = (1 << num_components) - 1;
 447
 448    nir_builder_instr_insert(build, &instr->instr);
 449
 450    return &instr->dest.dest.ssa;
 451 }
 452
 453 static inline nir_ssa_def *
 454 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 455               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 456 {
 457    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 458    if (!instr)
 459       return NULL;
 460
 461    instr->src[0].src = nir_src_for_ssa(src0);
 462    if (src1)
 463       instr->src[1].src = nir_src_for_ssa(src1);
 464    if (src2)
 465       instr->src[2].src = nir_src_for_ssa(src2);
 466    if (src3)
 467       instr->src[3].src = nir_src_for_ssa(src3);
 468
 469    return nir_builder_alu_instr_finish_and_insert(build, instr);
 470 }
 471
 472 /* for the couple special cases with more than 4 src args: */
 473 static inline nir_ssa_def *
 474 nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs)
 475 {
 476    const nir_op_info *op_info = &nir_op_infos[op];
 477    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 478    if (!instr)
 479       return NULL;
 480
 481    for (unsigned i = 0; i < op_info->num_inputs; i++)
 482       instr->src[i].src = nir_src_for_ssa(srcs[i]);
 483
 484    return nir_builder_alu_instr_finish_and_insert(build, instr);
 485 }
 486
 487 #include "nir_builder_opcodes.h"
 488
 489 static inline nir_ssa_def *
 490 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 491 {
 492    switch (num_components) {
 493    case 4:
 494       return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
 495    case 3:
 496       return nir_vec3(build, comp[0], comp[1], comp[2]);
 497    case 2:
 498       return nir_vec2(build, comp[0], comp[1]);
 499    case 1:
 500       return comp[0];
 501    default:
 502       unreachable("bad component count");
 503       return NULL;
 504    }
 505 }
 506
 507 /**
 508  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 509  */
 510 static inline nir_ssa_def *
 511 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 512 {
 513    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 514    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 515                      nir_src_bit_size(src.src), NULL);
 516    mov->exact = build->exact;
 517    mov->dest.write_mask = (1 << num_components) - 1;
 518    mov->src[0] = src;
 519    nir_builder_instr_insert(build, &mov->instr);
 520
 521    return &mov->dest.dest.ssa;
 522 }
 523
 524 static inline nir_ssa_def *
 525 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 526 {
 527    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 528    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 529                      nir_src_bit_size(src.src), NULL);
 530    mov->exact = build->exact;
 531    mov->dest.write_mask = (1 << num_components) - 1;
 532    mov->src[0] = src;
 533    nir_builder_instr_insert(build, &mov->instr);
 534
 535    return &mov->dest.dest.ssa;
 536 }
 537
 538 /**
 539  * Construct an fmov or imov that reswizzles the source's components.
 540  */
 541 static inline nir_ssa_def *
 542 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 543             unsigned num_components, bool use_fmov)
 544 {
 545    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 546    nir_alu_src alu_src = { NIR_SRC_INIT };
 547    alu_src.src = nir_src_for_ssa(src);
 548
 549    bool is_identity_swizzle = true;
 550    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 551       if (swiz[i] != i)
 552          is_identity_swizzle = false;
 553       alu_src.swizzle[i] = swiz[i];
 554    }
 555
 556    if (num_components == src->num_components && is_identity_swizzle)
 557       return src;
 558
 559    return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
 560                      nir_imov_alu(build, alu_src, num_components);
 561 }
 562
 563 /* Selects the right fdot given the number of components in each source. */
 564 static inline nir_ssa_def *
 565 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 566 {
 567    assert(src0->num_components == src1->num_components);
 568    switch (src0->num_components) {
 569    case 1: return nir_fmul(build, src0, src1);
 570    case 2: return nir_fdot2(build, src0, src1);
 571    case 3: return nir_fdot3(build, src0, src1);
 572    case 4: return nir_fdot4(build, src0, src1);
 573    default:
 574       unreachable("bad component size");
 575    }
 576
 577    return NULL;
 578 }
 579
 580 static inline nir_ssa_def *
 581 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 582 {
 583    switch (src0->num_components) {
 584    case 1: return nir_ine(b, src0, src1);
 585    case 2: return nir_bany_inequal2(b, src0, src1);
 586    case 3: return nir_bany_inequal3(b, src0, src1);
 587    case 4: return nir_bany_inequal4(b, src0, src1);
 588    default:
 589       unreachable("bad component size");
 590    }
 591 }
 592
 593 static inline nir_ssa_def *
 594 nir_bany(nir_builder *b, nir_ssa_def *src)
 595 {
 596    return nir_bany_inequal(b, src, nir_imm_false(b));
 597 }
 598
 599 static inline nir_ssa_def *
 600 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 601 {
 602    return nir_swizzle(b, def, &c, 1, false);
 603 }
 604
 605 static inline nir_ssa_def *
 606 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 607 {
 608    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 609
 610    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 611       if ((mask & (1 << i)) == 0)
 612          continue;
 613       swizzle[num_channels++] = i;
 614    }
 615
 616    return nir_swizzle(b, def, swizzle, num_channels, false);
 617 }
 618
 619 static inline nir_ssa_def *
 620 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
 621                            unsigned start, unsigned end)
 622 {
 623    if (start == end - 1) {
 624       return nir_channel(b, vec, start);
 625    } else {
 626       unsigned mid = start + (end - start) / 2;
 627       return nir_bcsel(b, nir_ilt(b, c, nir_imm_int(b, mid)),
 628                        _nir_vector_extract_helper(b, vec, c, start, mid),
 629                        _nir_vector_extract_helper(b, vec, c, mid, end));
 630    }
 631 }
 632
 633 static inline nir_ssa_def *
 634 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
 635 {
 636    nir_src c_src = nir_src_for_ssa(c);
 637    if (nir_src_is_const(c_src)) {
 638       unsigned c_const = nir_src_as_uint(c_src);
 639       if (c_const < vec->num_components)
 640          return nir_channel(b, vec, c_const);
 641       else
 642          return nir_ssa_undef(b, 1, vec->bit_size);
 643    } else {
 644       return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
 645    }
 646 }
 647
 648 static inline nir_ssa_def *
 649 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 650 {
 651    if (x->bit_size == dest_bit_size)
 652       return x;
 653
 654    switch (dest_bit_size) {
 655    case 64: return nir_i2i64(build, x);
 656    case 32: return nir_i2i32(build, x);
 657    case 16: return nir_i2i16(build, x);
 658    case 8:  return nir_i2i8(build, x);
 659    default: unreachable("Invalid bit size");
 660    }
 661 }
 662
 663 static inline nir_ssa_def *
 664 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 665 {
 666    if (x->bit_size == dest_bit_size)
 667       return x;
 668
 669    switch (dest_bit_size) {
 670    case 64: return nir_u2u64(build, x);
 671    case 32: return nir_u2u32(build, x);
 672    case 16: return nir_u2u16(build, x);
 673    case 8:  return nir_u2u8(build, x);
 674    default: unreachable("Invalid bit size");
 675    }
 676 }
 677
 678 static inline nir_ssa_def *
 679 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 680 {
 681    assert(x->bit_size <= 64);
 682    if (x->bit_size < 64)
 683       y &= (1ull << x->bit_size) - 1;
 684
 685    if (y == 0) {
 686       return x;
 687    } else {
 688       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 689    }
 690 }
 691
 692 static inline nir_ssa_def *
 693 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 694 {
 695    assert(x->bit_size <= 64);
 696    if (x->bit_size < 64)
 697       y &= (1ull << x->bit_size) - 1;
 698
 699    if (y == 0) {
 700       return nir_imm_intN_t(build, 0, x->bit_size);
 701    } else if (y == 1) {
 702       return x;
 703    } else if (util_is_power_of_two_or_zero64(y)) {
 704       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 705    } else {
 706       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 707    }
 708 }
 709
 710 static inline nir_ssa_def *
 711 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 712 {
 713    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 714 }
 715
 716 static inline nir_ssa_def *
 717 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 718 {
 719    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 720 }
 721
 722 static inline nir_ssa_def *
 723 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 724 {
 725    assert(src->num_components * src->bit_size == dest_bit_size);
 726
 727    switch (dest_bit_size) {
 728    case 64:
 729       switch (src->bit_size) {
 730       case 32: return nir_pack_64_2x32(b, src);
 731       case 16: return nir_pack_64_4x16(b, src);
 732       default: break;
 733       }
 734       break;
 735
 736    case 32:
 737       if (src->bit_size == 16)
 738          return nir_pack_32_2x16(b, src);
 739       break;
 740
 741    default:
 742       break;
 743    }
 744
 745    /* If we got here, we have no dedicated unpack opcode. */
 746    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 747    for (unsigned i = 0; i < src->num_components; i++) {
 748       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 749       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 750       dest = nir_ior(b, dest, val);
 751    }
 752    return dest;
 753 }
 754
 755 static inline nir_ssa_def *
 756 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 757 {
 758    assert(src->num_components == 1);
 759    assert(src->bit_size > dest_bit_size);
 760    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 761    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 762
 763    switch (src->bit_size) {
 764    case 64:
 765       switch (dest_bit_size) {
 766       case 32: return nir_unpack_64_2x32(b, src);
 767       case 16: return nir_unpack_64_4x16(b, src);
 768       default: break;
 769       }
 770       break;
 771
 772    case 32:
 773       if (dest_bit_size == 16)
 774          return nir_unpack_32_2x16(b, src);
 775       break;
 776
 777    default:
 778       break;
 779    }
 780
 781    /* If we got here, we have no dedicated unpack opcode. */
 782    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 783    for (unsigned i = 0; i < dest_num_components; i++) {
 784       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 785       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 786    }
 787    return nir_vec(b, dest_comps, dest_num_components);
 788 }
 789
 790 static inline nir_ssa_def *
 791 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 792 {
 793    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 794    const unsigned dest_num_components =
 795       (src->bit_size * src->num_components) / dest_bit_size;
 796    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 797
 798    if (src->bit_size > dest_bit_size) {
 799       assert(src->bit_size % dest_bit_size == 0);
 800       if (src->num_components == 1) {
 801          return nir_unpack_bits(b, src, dest_bit_size);
 802       } else {
 803          const unsigned divisor = src->bit_size / dest_bit_size;
 804          assert(src->num_components * divisor == dest_num_components);
 805          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 806          for (unsigned i = 0; i < src->num_components; i++) {
 807             nir_ssa_def *unpacked =
 808                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 809             assert(unpacked->num_components == divisor);
 810             for (unsigned j = 0; j < divisor; j++)
 811                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 812          }
 813          return nir_vec(b, dest, dest_num_components);
 814       }
 815    } else if (src->bit_size < dest_bit_size) {
 816       assert(dest_bit_size % src->bit_size == 0);
 817       if (dest_num_components == 1) {
 818          return nir_pack_bits(b, src, dest_bit_size);
 819       } else {
 820          const unsigned divisor = dest_bit_size / src->bit_size;
 821          assert(src->num_components == dest_num_components * divisor);
 822          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 823          for (unsigned i = 0; i < dest_num_components; i++) {
 824             nir_component_mask_t src_mask =
 825                ((1 << divisor) - 1) << (i * divisor);
 826             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 827                                        dest_bit_size);
 828          }
 829          return nir_vec(b, dest, dest_num_components);
 830       }
 831    } else {
 832       assert(src->bit_size == dest_bit_size);
 833       return src;
 834    }
 835 }
 836
 837 /**
 838  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 839  * nir_build_alu()-based builder calls.
 840  *
 841  * See nir_ssa_for_alu_src() for alu instructions.
 842  */
 843 static inline nir_ssa_def *
 844 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 845 {
 846    if (src.is_ssa && src.ssa->num_components == num_components)
 847       return src.ssa;
 848
 849    nir_alu_src alu = { NIR_SRC_INIT };
 850    alu.src = src;
 851    for (int j = 0; j < 4; j++)
 852       alu.swizzle[j] = j;
 853
 854    return nir_imov_alu(build, alu, num_components);
 855 }
 856
 857 /**
 858  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 859  * nir_alu_src's swizzle.
 860  */
 861 static inline nir_ssa_def *
 862 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 863 {
 864    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 865    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 866       trivial_swizzle[i] = i;
 867    nir_alu_src *src = &instr->src[srcn];
 868    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 869
 870    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 871        !src->abs && !src->negate &&
 872        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 873       return src->src.ssa;
 874
 875    return nir_imov_alu(build, *src, num_components);
 876 }
 877
 878 static inline unsigned
 879 nir_get_ptr_bitsize(nir_builder *build)
 880 {
 881    if (build->shader->info.stage == MESA_SHADER_KERNEL)
 882       return build->shader->info.cs.ptr_size;
 883    return 32;
 884 }
 885
 886 static inline nir_deref_instr *
 887 nir_build_deref_var(nir_builder *build, nir_variable *var)
 888 {
 889    nir_deref_instr *deref =
 890       nir_deref_instr_create(build->shader, nir_deref_type_var);
 891
 892    deref->mode = var->data.mode;
 893    deref->type = var->type;
 894    deref->var = var;
 895
 896    nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
 897                      nir_get_ptr_bitsize(build), NULL);
 898
 899    nir_builder_instr_insert(build, &deref->instr);
 900
 901    return deref;
 902 }
 903
 904 static inline nir_deref_instr *
 905 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 906                       nir_ssa_def *index)
 907 {
 908    assert(glsl_type_is_array(parent->type) ||
 909           glsl_type_is_matrix(parent->type) ||
 910           glsl_type_is_vector(parent->type));
 911
 912    assert(index->bit_size == parent->dest.ssa.bit_size);
 913
 914    nir_deref_instr *deref =
 915       nir_deref_instr_create(build->shader, nir_deref_type_array);
 916
 917    deref->mode = parent->mode;
 918    deref->type = glsl_get_array_element(parent->type);
 919    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 920    deref->arr.index = nir_src_for_ssa(index);
 921
 922    nir_ssa_dest_init(&deref->instr, &deref->dest,
 923                      parent->dest.ssa.num_components,
 924                      parent->dest.ssa.bit_size, NULL);
 925
 926    nir_builder_instr_insert(build, &deref->instr);
 927
 928    return deref;
 929 }
 930
 931 static inline nir_deref_instr *
 932 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
 933                           int64_t index)
 934 {
 935    assert(parent->dest.is_ssa);
 936    nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
 937                                          parent->dest.ssa.bit_size);
 938
 939    return nir_build_deref_array(build, parent, idx_ssa);
 940 }
 941
 942 static inline nir_deref_instr *
 943 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
 944                              nir_ssa_def *index)
 945 {
 946    assert(parent->deref_type == nir_deref_type_array ||
 947           parent->deref_type == nir_deref_type_ptr_as_array ||
 948           parent->deref_type == nir_deref_type_cast);
 949
 950    assert(index->bit_size == parent->dest.ssa.bit_size);
 951
 952    nir_deref_instr *deref =
 953       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
 954
 955    deref->mode = parent->mode;
 956    deref->type = parent->type;
 957    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 958    deref->arr.index = nir_src_for_ssa(index);
 959
 960    nir_ssa_dest_init(&deref->instr, &deref->dest,
 961                      parent->dest.ssa.num_components,
 962                      parent->dest.ssa.bit_size, NULL);
 963
 964    nir_builder_instr_insert(build, &deref->instr);
 965
 966    return deref;
 967 }
 968
 969 static inline nir_deref_instr *
 970 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 971 {
 972    assert(glsl_type_is_array(parent->type) ||
 973           glsl_type_is_matrix(parent->type));
 974
 975    nir_deref_instr *deref =
 976       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 977
 978    deref->mode = parent->mode;
 979    deref->type = glsl_get_array_element(parent->type);
 980    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 981
 982    nir_ssa_dest_init(&deref->instr, &deref->dest,
 983                      parent->dest.ssa.num_components,
 984                      parent->dest.ssa.bit_size, NULL);
 985
 986    nir_builder_instr_insert(build, &deref->instr);
 987
 988    return deref;
 989 }
 990
 991 static inline nir_deref_instr *
 992 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 993                        unsigned index)
 994 {
 995    assert(glsl_type_is_struct_or_ifc(parent->type));
 996
 997    nir_deref_instr *deref =
 998       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 999
1000    deref->mode = parent->mode;
1001    deref->type = glsl_get_struct_field(parent->type, index);
1002    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1003    deref->strct.index = index;
1004
1005    nir_ssa_dest_init(&deref->instr, &deref->dest,
1006                      parent->dest.ssa.num_components,
1007                      parent->dest.ssa.bit_size, NULL);
1008
1009    nir_builder_instr_insert(build, &deref->instr);
1010
1011    return deref;
1012 }
1013
1014 static inline nir_deref_instr *
1015 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
1016                      nir_variable_mode mode, const struct glsl_type *type,
1017                      unsigned ptr_stride)
1018 {
1019    nir_deref_instr *deref =
1020       nir_deref_instr_create(build->shader, nir_deref_type_cast);
1021
1022    deref->mode = mode;
1023    deref->type = type;
1024    deref->parent = nir_src_for_ssa(parent);
1025    deref->cast.ptr_stride = ptr_stride;
1026
1027    nir_ssa_dest_init(&deref->instr, &deref->dest,
1028                      parent->num_components, parent->bit_size, NULL);
1029
1030    nir_builder_instr_insert(build, &deref->instr);
1031
1032    return deref;
1033 }
1034
1035 /** Returns a deref that follows another but starting from the given parent
1036  *
1037  * The new deref will be the same type and take the same array or struct index
1038  * as the leader deref but it may have a different parent.  This is very
1039  * useful for walking deref paths.
1040  */
1041 static inline nir_deref_instr *
1042 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1043                          nir_deref_instr *leader)
1044 {
1045    /* If the derefs would have the same parent, don't make a new one */
1046    assert(leader->parent.is_ssa);
1047    if (leader->parent.ssa == &parent->dest.ssa)
1048       return leader;
1049
1050    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1051
1052    switch (leader->deref_type) {
1053    case nir_deref_type_var:
1054       unreachable("A var dereference cannot have a parent");
1055       break;
1056
1057    case nir_deref_type_array:
1058    case nir_deref_type_array_wildcard:
1059       assert(glsl_type_is_matrix(parent->type) ||
1060              glsl_type_is_array(parent->type) ||
1061              (leader->deref_type == nir_deref_type_array &&
1062               glsl_type_is_vector(parent->type)));
1063       assert(glsl_get_length(parent->type) ==
1064              glsl_get_length(leader_parent->type));
1065
1066       if (leader->deref_type == nir_deref_type_array) {
1067          assert(leader->arr.index.is_ssa);
1068          nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1069                                          parent->dest.ssa.bit_size);
1070          return nir_build_deref_array(b, parent, index);
1071       } else {
1072          return nir_build_deref_array_wildcard(b, parent);
1073       }
1074
1075    case nir_deref_type_struct:
1076       assert(glsl_type_is_struct_or_ifc(parent->type));
1077       assert(glsl_get_length(parent->type) ==
1078              glsl_get_length(leader_parent->type));
1079
1080       return nir_build_deref_struct(b, parent, leader->strct.index);
1081
1082    default:
1083       unreachable("Invalid deref instruction type");
1084    }
1085 }
1086
1087 static inline nir_ssa_def *
1088 nir_load_reg(nir_builder *build, nir_register *reg)
1089 {
1090    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1091 }
1092
1093 static inline nir_ssa_def *
1094 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1095                            enum gl_access_qualifier access)
1096 {
1097    nir_intrinsic_instr *load =
1098       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1099    load->num_components = glsl_get_vector_elements(deref->type);
1100    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1101    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1102                      glsl_get_bit_size(deref->type), NULL);
1103    nir_intrinsic_set_access(load, access);
1104    nir_builder_instr_insert(build, &load->instr);
1105    return &load->dest.ssa;
1106 }
1107
1108 static inline nir_ssa_def *
1109 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1110 {
1111    return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1112 }
1113
1114 static inline void
1115 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1116                             nir_ssa_def *value, unsigned writemask,
1117                             enum gl_access_qualifier access)
1118 {
1119    nir_intrinsic_instr *store =
1120       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1121    store->num_components = glsl_get_vector_elements(deref->type);
1122    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1123    store->src[1] = nir_src_for_ssa(value);
1124    nir_intrinsic_set_write_mask(store,
1125                                 writemask & ((1 << store->num_components) - 1));
1126    nir_intrinsic_set_access(store, access);
1127    nir_builder_instr_insert(build, &store->instr);
1128 }
1129
1130 static inline void
1131 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1132                 nir_ssa_def *value, unsigned writemask)
1133 {
1134    nir_store_deref_with_access(build, deref, value, writemask,
1135                                (enum gl_access_qualifier)0);
1136 }
1137
1138 static inline void
1139 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1140 {
1141    nir_intrinsic_instr *copy =
1142       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1143    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1144    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1145    nir_builder_instr_insert(build, &copy->instr);
1146 }
1147
1148 static inline nir_ssa_def *
1149 nir_load_var(nir_builder *build, nir_variable *var)
1150 {
1151    return nir_load_deref(build, nir_build_deref_var(build, var));
1152 }
1153
1154 static inline void
1155 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1156               unsigned writemask)
1157 {
1158    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1159 }
1160
1161 static inline void
1162 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1163 {
1164    nir_copy_deref(build, nir_build_deref_var(build, dest),
1165                          nir_build_deref_var(build, src));
1166 }
1167
1168 static inline nir_ssa_def *
1169 nir_load_param(nir_builder *build, uint32_t param_idx)
1170 {
1171    assert(param_idx < build->impl->function->num_params);
1172    nir_parameter *param = &build->impl->function->params[param_idx];
1173
1174    nir_intrinsic_instr *load =
1175       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1176    nir_intrinsic_set_param_idx(load, param_idx);
1177    load->num_components = param->num_components;
1178    nir_ssa_dest_init(&load->instr, &load->dest,
1179                      param->num_components, param->bit_size, NULL);
1180    nir_builder_instr_insert(build, &load->instr);
1181    return &load->dest.ssa;
1182 }
1183
1184 #include "nir_builder_opcodes.h"
1185
1186 static inline nir_ssa_def *
1187 nir_f2b(nir_builder *build, nir_ssa_def *f)
1188 {
1189    return nir_f2b1(build, f);
1190 }
1191
1192 static inline nir_ssa_def *
1193 nir_i2b(nir_builder *build, nir_ssa_def *i)
1194 {
1195    return nir_i2b1(build, i);
1196 }
1197
1198 static inline nir_ssa_def *
1199 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1200 {
1201    switch (bit_size) {
1202    case 64: return nir_b2f64(build, b);
1203    case 32: return nir_b2f32(build, b);
1204    case 16: return nir_b2f16(build, b);
1205    default:
1206       unreachable("Invalid bit-size");
1207    };
1208 }
1209
1210 static inline nir_ssa_def *
1211 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1212                      unsigned interp_mode)
1213 {
1214    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1215    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1216    nir_intrinsic_set_interp_mode(bary, interp_mode);
1217    nir_builder_instr_insert(build, &bary->instr);
1218    return &bary->dest.ssa;
1219 }
1220
1221 static inline void
1222 nir_jump(nir_builder *build, nir_jump_type jump_type)
1223 {
1224    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1225    nir_builder_instr_insert(build, &jump->instr);
1226 }
1227
1228 static inline nir_ssa_def *
1229 nir_compare_func(nir_builder *b, enum compare_func func,
1230                  nir_ssa_def *src0, nir_ssa_def *src1)
1231 {
1232    switch (func) {
1233    case COMPARE_FUNC_NEVER:
1234       return nir_imm_int(b, 0);
1235    case COMPARE_FUNC_ALWAYS:
1236       return nir_imm_int(b, ~0);
1237    case COMPARE_FUNC_EQUAL:
1238       return nir_feq(b, src0, src1);
1239    case COMPARE_FUNC_NOTEQUAL:
1240       return nir_fne(b, src0, src1);
1241    case COMPARE_FUNC_GREATER:
1242       return nir_flt(b, src1, src0);
1243    case COMPARE_FUNC_GEQUAL:
1244       return nir_fge(b, src0, src1);
1245    case COMPARE_FUNC_LESS:
1246       return nir_flt(b, src0, src1);
1247    case COMPARE_FUNC_LEQUAL:
1248       return nir_fge(b, src1, src0);
1249    }
1250    unreachable("bad compare func");
1251 }
1252
1253 #endif /* NIR_BUILDER_H */