2 * Copyright © 2014-2015 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 #include "nir_control_flow.h"
28 #include "util/bitscan.h"
29 #include "util/half_float.h"
33 typedef struct nir_builder
{
36 /* Whether new ALU instructions will be marked "exact" */
40 nir_function_impl
*impl
;
44 nir_builder_init(nir_builder
*build
, nir_function_impl
*impl
)
46 memset(build
, 0, sizeof(*build
));
49 build
->shader
= impl
->function
->shader
;
53 nir_builder_init_simple_shader(nir_builder
*build
, void *mem_ctx
,
54 gl_shader_stage stage
,
55 const nir_shader_compiler_options
*options
)
57 build
->shader
= nir_shader_create(mem_ctx
, stage
, options
, NULL
);
58 nir_function
*func
= nir_function_create(build
->shader
, "main");
59 func
->is_entrypoint
= true;
61 build
->impl
= nir_function_impl_create(func
);
62 build
->cursor
= nir_after_cf_list(&build
->impl
->body
);
66 nir_builder_instr_insert(nir_builder
*build
, nir_instr
*instr
)
68 nir_instr_insert(build
->cursor
, instr
);
70 /* Move the cursor forward. */
71 build
->cursor
= nir_after_instr(instr
);
74 static inline nir_instr
*
75 nir_builder_last_instr(nir_builder
*build
)
77 assert(build
->cursor
.option
== nir_cursor_after_instr
);
78 return build
->cursor
.instr
;
82 nir_builder_cf_insert(nir_builder
*build
, nir_cf_node
*cf
)
84 nir_cf_node_insert(build
->cursor
, cf
);
88 nir_builder_is_inside_cf(nir_builder
*build
, nir_cf_node
*cf_node
)
90 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
91 for (nir_cf_node
*n
= &block
->cf_node
; n
; n
= n
->parent
) {
98 static inline nir_if
*
99 nir_push_if(nir_builder
*build
, nir_ssa_def
*condition
)
101 nir_if
*nif
= nir_if_create(build
->shader
);
102 nif
->condition
= nir_src_for_ssa(condition
);
103 nir_builder_cf_insert(build
, &nif
->cf_node
);
104 build
->cursor
= nir_before_cf_list(&nif
->then_list
);
108 static inline nir_if
*
109 nir_push_else(nir_builder
*build
, nir_if
*nif
)
112 assert(nir_builder_is_inside_cf(build
, &nif
->cf_node
));
114 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
115 nif
= nir_cf_node_as_if(block
->cf_node
.parent
);
117 build
->cursor
= nir_before_cf_list(&nif
->else_list
);
122 nir_pop_if(nir_builder
*build
, nir_if
*nif
)
125 assert(nir_builder_is_inside_cf(build
, &nif
->cf_node
));
127 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
128 nif
= nir_cf_node_as_if(block
->cf_node
.parent
);
130 build
->cursor
= nir_after_cf_node(&nif
->cf_node
);
133 static inline nir_ssa_def
*
134 nir_if_phi(nir_builder
*build
, nir_ssa_def
*then_def
, nir_ssa_def
*else_def
)
136 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
137 nir_if
*nif
= nir_cf_node_as_if(nir_cf_node_prev(&block
->cf_node
));
139 nir_phi_instr
*phi
= nir_phi_instr_create(build
->shader
);
141 nir_phi_src
*src
= ralloc(phi
, nir_phi_src
);
142 src
->pred
= nir_if_last_then_block(nif
);
143 src
->src
= nir_src_for_ssa(then_def
);
144 exec_list_push_tail(&phi
->srcs
, &src
->node
);
146 src
= ralloc(phi
, nir_phi_src
);
147 src
->pred
= nir_if_last_else_block(nif
);
148 src
->src
= nir_src_for_ssa(else_def
);
149 exec_list_push_tail(&phi
->srcs
, &src
->node
);
151 assert(then_def
->num_components
== else_def
->num_components
);
152 assert(then_def
->bit_size
== else_def
->bit_size
);
153 nir_ssa_dest_init(&phi
->instr
, &phi
->dest
,
154 then_def
->num_components
, then_def
->bit_size
, NULL
);
156 nir_builder_instr_insert(build
, &phi
->instr
);
158 return &phi
->dest
.ssa
;
161 static inline nir_loop
*
162 nir_push_loop(nir_builder
*build
)
164 nir_loop
*loop
= nir_loop_create(build
->shader
);
165 nir_builder_cf_insert(build
, &loop
->cf_node
);
166 build
->cursor
= nir_before_cf_list(&loop
->body
);
171 nir_pop_loop(nir_builder
*build
, nir_loop
*loop
)
174 assert(nir_builder_is_inside_cf(build
, &loop
->cf_node
));
176 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
177 loop
= nir_cf_node_as_loop(block
->cf_node
.parent
);
179 build
->cursor
= nir_after_cf_node(&loop
->cf_node
);
182 static inline nir_ssa_def
*
183 nir_ssa_undef(nir_builder
*build
, unsigned num_components
, unsigned bit_size
)
185 nir_ssa_undef_instr
*undef
=
186 nir_ssa_undef_instr_create(build
->shader
, num_components
, bit_size
);
190 nir_instr_insert(nir_before_cf_list(&build
->impl
->body
), &undef
->instr
);
195 static inline nir_ssa_def
*
196 nir_build_imm(nir_builder
*build
, unsigned num_components
,
197 unsigned bit_size
, const nir_const_value
*value
)
199 nir_load_const_instr
*load_const
=
200 nir_load_const_instr_create(build
->shader
, num_components
, bit_size
);
204 memcpy(load_const
->value
, value
, sizeof(nir_const_value
) * num_components
);
206 nir_builder_instr_insert(build
, &load_const
->instr
);
208 return &load_const
->def
;
211 static inline nir_ssa_def
*
212 nir_imm_zero(nir_builder
*build
, unsigned num_components
, unsigned bit_size
)
214 nir_load_const_instr
*load_const
=
215 nir_load_const_instr_create(build
->shader
, num_components
, bit_size
);
217 /* nir_load_const_instr_create uses rzalloc so it's already zero */
219 nir_builder_instr_insert(build
, &load_const
->instr
);
221 return &load_const
->def
;
224 static inline nir_ssa_def
*
225 nir_imm_boolN_t(nir_builder
*build
, bool x
, unsigned bit_size
)
227 nir_const_value v
= nir_const_value_for_bool(x
, bit_size
);
228 return nir_build_imm(build
, 1, bit_size
, &v
);
231 static inline nir_ssa_def
*
232 nir_imm_bool(nir_builder
*build
, bool x
)
234 return nir_imm_boolN_t(build
, x
, 1);
237 static inline nir_ssa_def
*
238 nir_imm_true(nir_builder
*build
)
240 return nir_imm_bool(build
, true);
243 static inline nir_ssa_def
*
244 nir_imm_false(nir_builder
*build
)
246 return nir_imm_bool(build
, false);
249 static inline nir_ssa_def
*
250 nir_imm_floatN_t(nir_builder
*build
, double x
, unsigned bit_size
)
252 nir_const_value v
= nir_const_value_for_float(x
, bit_size
);
253 return nir_build_imm(build
, 1, bit_size
, &v
);
256 static inline nir_ssa_def
*
257 nir_imm_float16(nir_builder
*build
, float x
)
259 return nir_imm_floatN_t(build
, x
, 16);
262 static inline nir_ssa_def
*
263 nir_imm_float(nir_builder
*build
, float x
)
265 return nir_imm_floatN_t(build
, x
, 32);
268 static inline nir_ssa_def
*
269 nir_imm_double(nir_builder
*build
, double x
)
271 return nir_imm_floatN_t(build
, x
, 64);
274 static inline nir_ssa_def
*
275 nir_imm_vec2(nir_builder
*build
, float x
, float y
)
277 nir_const_value v
[2] = {
278 nir_const_value_for_float(x
, 32),
279 nir_const_value_for_float(y
, 32),
281 return nir_build_imm(build
, 2, 32, v
);
284 static inline nir_ssa_def
*
285 nir_imm_vec4(nir_builder
*build
, float x
, float y
, float z
, float w
)
287 nir_const_value v
[4] = {
288 nir_const_value_for_float(x
, 32),
289 nir_const_value_for_float(y
, 32),
290 nir_const_value_for_float(z
, 32),
291 nir_const_value_for_float(w
, 32),
294 return nir_build_imm(build
, 4, 32, v
);
297 static inline nir_ssa_def
*
298 nir_imm_vec4_16(nir_builder
*build
, float x
, float y
, float z
, float w
)
300 nir_const_value v
[4] = {
301 nir_const_value_for_float(x
, 16),
302 nir_const_value_for_float(y
, 16),
303 nir_const_value_for_float(z
, 16),
304 nir_const_value_for_float(w
, 16),
307 return nir_build_imm(build
, 4, 16, v
);
310 static inline nir_ssa_def
*
311 nir_imm_intN_t(nir_builder
*build
, uint64_t x
, unsigned bit_size
)
313 nir_const_value v
= nir_const_value_for_raw_uint(x
, bit_size
);
314 return nir_build_imm(build
, 1, bit_size
, &v
);
317 static inline nir_ssa_def
*
318 nir_imm_int(nir_builder
*build
, int x
)
320 return nir_imm_intN_t(build
, x
, 32);
323 static inline nir_ssa_def
*
324 nir_imm_int64(nir_builder
*build
, int64_t x
)
326 return nir_imm_intN_t(build
, x
, 64);
329 static inline nir_ssa_def
*
330 nir_imm_ivec2(nir_builder
*build
, int x
, int y
)
332 nir_const_value v
[2] = {
333 nir_const_value_for_int(x
, 32),
334 nir_const_value_for_int(y
, 32),
337 return nir_build_imm(build
, 2, 32, v
);
340 static inline nir_ssa_def
*
341 nir_imm_ivec4(nir_builder
*build
, int x
, int y
, int z
, int w
)
343 nir_const_value v
[4] = {
344 nir_const_value_for_int(x
, 32),
345 nir_const_value_for_int(y
, 32),
346 nir_const_value_for_int(z
, 32),
347 nir_const_value_for_int(w
, 32),
350 return nir_build_imm(build
, 4, 32, v
);
353 static inline nir_ssa_def
*
354 nir_builder_alu_instr_finish_and_insert(nir_builder
*build
, nir_alu_instr
*instr
)
356 const nir_op_info
*op_info
= &nir_op_infos
[instr
->op
];
358 instr
->exact
= build
->exact
;
360 /* Guess the number of components the destination temporary should have
361 * based on our input sizes, if it's not fixed for the op.
363 unsigned num_components
= op_info
->output_size
;
364 if (num_components
== 0) {
365 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
366 if (op_info
->input_sizes
[i
] == 0)
367 num_components
= MAX2(num_components
,
368 instr
->src
[i
].src
.ssa
->num_components
);
371 assert(num_components
!= 0);
373 /* Figure out the bitwidth based on the source bitwidth if the instruction
376 unsigned bit_size
= nir_alu_type_get_type_size(op_info
->output_type
);
378 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
379 unsigned src_bit_size
= instr
->src
[i
].src
.ssa
->bit_size
;
380 if (nir_alu_type_get_type_size(op_info
->input_types
[i
]) == 0) {
382 assert(src_bit_size
== bit_size
);
384 bit_size
= src_bit_size
;
386 assert(src_bit_size
==
387 nir_alu_type_get_type_size(op_info
->input_types
[i
]));
392 /* When in doubt, assume 32. */
396 /* Make sure we don't swizzle from outside of our source vector (like if a
397 * scalar value was passed into a multiply with a vector).
399 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
400 for (unsigned j
= instr
->src
[i
].src
.ssa
->num_components
;
401 j
< NIR_MAX_VEC_COMPONENTS
; j
++) {
402 instr
->src
[i
].swizzle
[j
] = instr
->src
[i
].src
.ssa
->num_components
- 1;
406 nir_ssa_dest_init(&instr
->instr
, &instr
->dest
.dest
, num_components
,
408 instr
->dest
.write_mask
= (1 << num_components
) - 1;
410 nir_builder_instr_insert(build
, &instr
->instr
);
412 return &instr
->dest
.dest
.ssa
;
415 static inline nir_ssa_def
*
416 nir_build_alu(nir_builder
*build
, nir_op op
, nir_ssa_def
*src0
,
417 nir_ssa_def
*src1
, nir_ssa_def
*src2
, nir_ssa_def
*src3
)
419 nir_alu_instr
*instr
= nir_alu_instr_create(build
->shader
, op
);
423 instr
->src
[0].src
= nir_src_for_ssa(src0
);
425 instr
->src
[1].src
= nir_src_for_ssa(src1
);
427 instr
->src
[2].src
= nir_src_for_ssa(src2
);
429 instr
->src
[3].src
= nir_src_for_ssa(src3
);
431 return nir_builder_alu_instr_finish_and_insert(build
, instr
);
434 /* for the couple special cases with more than 4 src args: */
435 static inline nir_ssa_def
*
436 nir_build_alu_src_arr(nir_builder
*build
, nir_op op
, nir_ssa_def
**srcs
)
438 const nir_op_info
*op_info
= &nir_op_infos
[op
];
439 nir_alu_instr
*instr
= nir_alu_instr_create(build
->shader
, op
);
443 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++)
444 instr
->src
[i
].src
= nir_src_for_ssa(srcs
[i
]);
446 return nir_builder_alu_instr_finish_and_insert(build
, instr
);
449 #include "nir_builder_opcodes.h"
451 static inline nir_ssa_def
*
452 nir_vec(nir_builder
*build
, nir_ssa_def
**comp
, unsigned num_components
)
454 return nir_build_alu_src_arr(build
, nir_op_vec(num_components
), comp
);
457 static inline nir_ssa_def
*
458 nir_mov_alu(nir_builder
*build
, nir_alu_src src
, unsigned num_components
)
460 assert(!src
.abs
&& !src
.negate
);
461 if (src
.src
.is_ssa
&& src
.src
.ssa
->num_components
== num_components
) {
462 bool any_swizzles
= false;
463 for (unsigned i
= 0; i
< num_components
; i
++) {
464 if (src
.swizzle
[i
] != i
)
471 nir_alu_instr
*mov
= nir_alu_instr_create(build
->shader
, nir_op_mov
);
472 nir_ssa_dest_init(&mov
->instr
, &mov
->dest
.dest
, num_components
,
473 nir_src_bit_size(src
.src
), NULL
);
474 mov
->exact
= build
->exact
;
475 mov
->dest
.write_mask
= (1 << num_components
) - 1;
477 nir_builder_instr_insert(build
, &mov
->instr
);
479 return &mov
->dest
.dest
.ssa
;
483 * Construct an fmov or imov that reswizzles the source's components.
485 static inline nir_ssa_def
*
486 nir_swizzle(nir_builder
*build
, nir_ssa_def
*src
, const unsigned *swiz
,
487 unsigned num_components
)
489 assert(num_components
<= NIR_MAX_VEC_COMPONENTS
);
490 nir_alu_src alu_src
= { NIR_SRC_INIT
};
491 alu_src
.src
= nir_src_for_ssa(src
);
493 bool is_identity_swizzle
= true;
494 for (unsigned i
= 0; i
< num_components
&& i
< NIR_MAX_VEC_COMPONENTS
; i
++) {
496 is_identity_swizzle
= false;
497 alu_src
.swizzle
[i
] = swiz
[i
];
500 if (num_components
== src
->num_components
&& is_identity_swizzle
)
503 return nir_mov_alu(build
, alu_src
, num_components
);
506 /* Selects the right fdot given the number of components in each source. */
507 static inline nir_ssa_def
*
508 nir_fdot(nir_builder
*build
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
510 assert(src0
->num_components
== src1
->num_components
);
511 switch (src0
->num_components
) {
512 case 1: return nir_fmul(build
, src0
, src1
);
513 case 2: return nir_fdot2(build
, src0
, src1
);
514 case 3: return nir_fdot3(build
, src0
, src1
);
515 case 4: return nir_fdot4(build
, src0
, src1
);
517 unreachable("bad component size");
523 static inline nir_ssa_def
*
524 nir_ball_iequal(nir_builder
*b
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
526 switch (src0
->num_components
) {
527 case 1: return nir_ieq(b
, src0
, src1
);
528 case 2: return nir_ball_iequal2(b
, src0
, src1
);
529 case 3: return nir_ball_iequal3(b
, src0
, src1
);
530 case 4: return nir_ball_iequal4(b
, src0
, src1
);
532 unreachable("bad component size");
536 static inline nir_ssa_def
*
537 nir_bany_inequal(nir_builder
*b
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
539 switch (src0
->num_components
) {
540 case 1: return nir_ine(b
, src0
, src1
);
541 case 2: return nir_bany_inequal2(b
, src0
, src1
);
542 case 3: return nir_bany_inequal3(b
, src0
, src1
);
543 case 4: return nir_bany_inequal4(b
, src0
, src1
);
545 unreachable("bad component size");
549 static inline nir_ssa_def
*
550 nir_bany(nir_builder
*b
, nir_ssa_def
*src
)
552 return nir_bany_inequal(b
, src
, nir_imm_false(b
));
555 static inline nir_ssa_def
*
556 nir_channel(nir_builder
*b
, nir_ssa_def
*def
, unsigned c
)
558 return nir_swizzle(b
, def
, &c
, 1);
561 static inline nir_ssa_def
*
562 nir_channels(nir_builder
*b
, nir_ssa_def
*def
, nir_component_mask_t mask
)
564 unsigned num_channels
= 0, swizzle
[NIR_MAX_VEC_COMPONENTS
] = { 0 };
566 for (unsigned i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; i
++) {
567 if ((mask
& (1 << i
)) == 0)
569 swizzle
[num_channels
++] = i
;
572 return nir_swizzle(b
, def
, swizzle
, num_channels
);
575 static inline nir_ssa_def
*
576 _nir_vector_extract_helper(nir_builder
*b
, nir_ssa_def
*vec
, nir_ssa_def
*c
,
577 unsigned start
, unsigned end
)
579 if (start
== end
- 1) {
580 return nir_channel(b
, vec
, start
);
582 unsigned mid
= start
+ (end
- start
) / 2;
583 return nir_bcsel(b
, nir_ilt(b
, c
, nir_imm_intN_t(b
, mid
, c
->bit_size
)),
584 _nir_vector_extract_helper(b
, vec
, c
, start
, mid
),
585 _nir_vector_extract_helper(b
, vec
, c
, mid
, end
));
589 static inline nir_ssa_def
*
590 nir_vector_extract(nir_builder
*b
, nir_ssa_def
*vec
, nir_ssa_def
*c
)
592 nir_src c_src
= nir_src_for_ssa(c
);
593 if (nir_src_is_const(c_src
)) {
594 uint64_t c_const
= nir_src_as_uint(c_src
);
595 if (c_const
< vec
->num_components
)
596 return nir_channel(b
, vec
, c_const
);
598 return nir_ssa_undef(b
, 1, vec
->bit_size
);
600 return _nir_vector_extract_helper(b
, vec
, c
, 0, vec
->num_components
);
604 static inline nir_ssa_def
*
605 nir_i2i(nir_builder
*build
, nir_ssa_def
*x
, unsigned dest_bit_size
)
607 if (x
->bit_size
== dest_bit_size
)
610 switch (dest_bit_size
) {
611 case 64: return nir_i2i64(build
, x
);
612 case 32: return nir_i2i32(build
, x
);
613 case 16: return nir_i2i16(build
, x
);
614 case 8: return nir_i2i8(build
, x
);
615 default: unreachable("Invalid bit size");
619 static inline nir_ssa_def
*
620 nir_u2u(nir_builder
*build
, nir_ssa_def
*x
, unsigned dest_bit_size
)
622 if (x
->bit_size
== dest_bit_size
)
625 switch (dest_bit_size
) {
626 case 64: return nir_u2u64(build
, x
);
627 case 32: return nir_u2u32(build
, x
);
628 case 16: return nir_u2u16(build
, x
);
629 case 8: return nir_u2u8(build
, x
);
630 default: unreachable("Invalid bit size");
634 static inline nir_ssa_def
*
635 nir_iadd_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
)
637 assert(x
->bit_size
<= 64);
638 if (x
->bit_size
< 64)
639 y
&= (1ull << x
->bit_size
) - 1;
644 return nir_iadd(build
, x
, nir_imm_intN_t(build
, y
, x
->bit_size
));
648 static inline nir_ssa_def
*
649 _nir_mul_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
, bool amul
)
651 assert(x
->bit_size
<= 64);
652 if (x
->bit_size
< 64)
653 y
&= (1ull << x
->bit_size
) - 1;
656 return nir_imm_intN_t(build
, 0, x
->bit_size
);
659 } else if (!build
->shader
->options
->lower_bitops
&&
660 util_is_power_of_two_or_zero64(y
)) {
661 return nir_ishl(build
, x
, nir_imm_int(build
, ffsll(y
) - 1));
663 return nir_amul(build
, x
, nir_imm_intN_t(build
, y
, x
->bit_size
));
665 return nir_imul(build
, x
, nir_imm_intN_t(build
, y
, x
->bit_size
));
669 static inline nir_ssa_def
*
670 nir_imul_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
)
672 return _nir_mul_imm(build
, x
, y
, false);
675 static inline nir_ssa_def
*
676 nir_amul_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
)
678 return _nir_mul_imm(build
, x
, y
, true);
681 static inline nir_ssa_def
*
682 nir_fadd_imm(nir_builder
*build
, nir_ssa_def
*x
, double y
)
684 return nir_fadd(build
, x
, nir_imm_floatN_t(build
, y
, x
->bit_size
));
687 static inline nir_ssa_def
*
688 nir_fmul_imm(nir_builder
*build
, nir_ssa_def
*x
, double y
)
690 return nir_fmul(build
, x
, nir_imm_floatN_t(build
, y
, x
->bit_size
));
693 static inline nir_ssa_def
*
694 nir_pack_bits(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
696 assert(src
->num_components
* src
->bit_size
== dest_bit_size
);
698 switch (dest_bit_size
) {
700 switch (src
->bit_size
) {
701 case 32: return nir_pack_64_2x32(b
, src
);
702 case 16: return nir_pack_64_4x16(b
, src
);
708 if (src
->bit_size
== 16)
709 return nir_pack_32_2x16(b
, src
);
716 /* If we got here, we have no dedicated unpack opcode. */
717 nir_ssa_def
*dest
= nir_imm_intN_t(b
, 0, dest_bit_size
);
718 for (unsigned i
= 0; i
< src
->num_components
; i
++) {
719 nir_ssa_def
*val
= nir_u2u(b
, nir_channel(b
, src
, i
), dest_bit_size
);
720 val
= nir_ishl(b
, val
, nir_imm_int(b
, i
* src
->bit_size
));
721 dest
= nir_ior(b
, dest
, val
);
726 static inline nir_ssa_def
*
727 nir_unpack_bits(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
729 assert(src
->num_components
== 1);
730 assert(src
->bit_size
> dest_bit_size
);
731 const unsigned dest_num_components
= src
->bit_size
/ dest_bit_size
;
732 assert(dest_num_components
<= NIR_MAX_VEC_COMPONENTS
);
734 switch (src
->bit_size
) {
736 switch (dest_bit_size
) {
737 case 32: return nir_unpack_64_2x32(b
, src
);
738 case 16: return nir_unpack_64_4x16(b
, src
);
744 if (dest_bit_size
== 16)
745 return nir_unpack_32_2x16(b
, src
);
752 /* If we got here, we have no dedicated unpack opcode. */
753 nir_ssa_def
*dest_comps
[NIR_MAX_VEC_COMPONENTS
];
754 for (unsigned i
= 0; i
< dest_num_components
; i
++) {
755 nir_ssa_def
*val
= nir_ushr(b
, src
, nir_imm_int(b
, i
* dest_bit_size
));
756 dest_comps
[i
] = nir_u2u(b
, val
, dest_bit_size
);
758 return nir_vec(b
, dest_comps
, dest_num_components
);
762 * Treats srcs as if it's one big blob of bits and extracts the range of bits
765 * [first_bit, first_bit + dest_num_components * dest_bit_size)
767 * The range can have any alignment or size as long as it's an integer number
768 * of destination components and fits inside the concatenated sources.
770 * TODO: The one caveat here is that we can't handle byte alignment if 64-bit
771 * values are involved because that would require pack/unpack to/from a vec8
772 * which NIR currently does not support.
774 static inline nir_ssa_def
*
775 nir_extract_bits(nir_builder
*b
, nir_ssa_def
**srcs
, unsigned num_srcs
,
777 unsigned dest_num_components
, unsigned dest_bit_size
)
779 const unsigned num_bits
= dest_num_components
* dest_bit_size
;
781 /* Figure out the common bit size */
782 unsigned common_bit_size
= dest_bit_size
;
783 for (unsigned i
= 0; i
< num_srcs
; i
++)
784 common_bit_size
= MIN2(common_bit_size
, srcs
[i
]->bit_size
);
786 common_bit_size
= MIN2(common_bit_size
, (1u << (ffs(first_bit
) - 1)));
788 /* We don't want to have to deal with 1-bit values */
789 assert(common_bit_size
>= 8);
791 nir_ssa_def
*common_comps
[NIR_MAX_VEC_COMPONENTS
* sizeof(uint64_t)];
792 assert(num_bits
/ common_bit_size
<= ARRAY_SIZE(common_comps
));
794 /* First, unpack to the common bit size and select the components from the
798 unsigned src_start_bit
= 0;
799 unsigned src_end_bit
= 0;
800 for (unsigned i
= 0; i
< num_bits
/ common_bit_size
; i
++) {
801 const unsigned bit
= first_bit
+ (i
* common_bit_size
);
802 while (bit
>= src_end_bit
) {
804 assert(src_idx
< (int) num_srcs
);
805 src_start_bit
= src_end_bit
;
806 src_end_bit
+= srcs
[src_idx
]->bit_size
*
807 srcs
[src_idx
]->num_components
;
809 assert(bit
>= src_start_bit
);
810 assert(bit
+ common_bit_size
<= src_end_bit
);
811 const unsigned rel_bit
= bit
- src_start_bit
;
812 const unsigned src_bit_size
= srcs
[src_idx
]->bit_size
;
814 nir_ssa_def
*comp
= nir_channel(b
, srcs
[src_idx
],
815 rel_bit
/ src_bit_size
);
816 if (srcs
[src_idx
]->bit_size
> common_bit_size
) {
817 nir_ssa_def
*unpacked
= nir_unpack_bits(b
, comp
, common_bit_size
);
818 comp
= nir_channel(b
, unpacked
, (rel_bit
% src_bit_size
) /
821 common_comps
[i
] = comp
;
824 /* Now, re-pack the destination if we have to */
825 if (dest_bit_size
> common_bit_size
) {
826 unsigned common_per_dest
= dest_bit_size
/ common_bit_size
;
827 nir_ssa_def
*dest_comps
[NIR_MAX_VEC_COMPONENTS
];
828 for (unsigned i
= 0; i
< dest_num_components
; i
++) {
829 nir_ssa_def
*unpacked
= nir_vec(b
, common_comps
+ i
* common_per_dest
,
831 dest_comps
[i
] = nir_pack_bits(b
, unpacked
, dest_bit_size
);
833 return nir_vec(b
, dest_comps
, dest_num_components
);
835 assert(dest_bit_size
== common_bit_size
);
836 return nir_vec(b
, common_comps
, dest_num_components
);
840 static inline nir_ssa_def
*
841 nir_bitcast_vector(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
843 assert((src
->bit_size
* src
->num_components
) % dest_bit_size
== 0);
844 const unsigned dest_num_components
=
845 (src
->bit_size
* src
->num_components
) / dest_bit_size
;
846 assert(dest_num_components
<= NIR_MAX_VEC_COMPONENTS
);
848 return nir_extract_bits(b
, &src
, 1, 0, dest_num_components
, dest_bit_size
);
852 * Turns a nir_src into a nir_ssa_def * so it can be passed to
853 * nir_build_alu()-based builder calls.
855 * See nir_ssa_for_alu_src() for alu instructions.
857 static inline nir_ssa_def
*
858 nir_ssa_for_src(nir_builder
*build
, nir_src src
, int num_components
)
860 if (src
.is_ssa
&& src
.ssa
->num_components
== num_components
)
863 nir_alu_src alu
= { NIR_SRC_INIT
};
865 for (int j
= 0; j
< 4; j
++)
868 return nir_mov_alu(build
, alu
, num_components
);
872 * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
873 * nir_alu_src's swizzle.
875 static inline nir_ssa_def
*
876 nir_ssa_for_alu_src(nir_builder
*build
, nir_alu_instr
*instr
, unsigned srcn
)
878 static uint8_t trivial_swizzle
[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
879 STATIC_ASSERT(ARRAY_SIZE(trivial_swizzle
) == NIR_MAX_VEC_COMPONENTS
);
881 nir_alu_src
*src
= &instr
->src
[srcn
];
882 unsigned num_components
= nir_ssa_alu_instr_src_components(instr
, srcn
);
884 if (src
->src
.is_ssa
&& (src
->src
.ssa
->num_components
== num_components
) &&
885 !src
->abs
&& !src
->negate
&&
886 (memcmp(src
->swizzle
, trivial_swizzle
, num_components
) == 0))
889 return nir_mov_alu(build
, *src
, num_components
);
892 static inline unsigned
893 nir_get_ptr_bitsize(nir_builder
*build
)
895 if (build
->shader
->info
.stage
== MESA_SHADER_KERNEL
)
896 return build
->shader
->info
.cs
.ptr_size
;
900 static inline nir_deref_instr
*
901 nir_build_deref_var(nir_builder
*build
, nir_variable
*var
)
903 nir_deref_instr
*deref
=
904 nir_deref_instr_create(build
->shader
, nir_deref_type_var
);
906 deref
->mode
= var
->data
.mode
;
907 deref
->type
= var
->type
;
910 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
, 1,
911 nir_get_ptr_bitsize(build
), NULL
);
913 nir_builder_instr_insert(build
, &deref
->instr
);
918 static inline nir_deref_instr
*
919 nir_build_deref_array(nir_builder
*build
, nir_deref_instr
*parent
,
922 assert(glsl_type_is_array(parent
->type
) ||
923 glsl_type_is_matrix(parent
->type
) ||
924 glsl_type_is_vector(parent
->type
));
926 assert(index
->bit_size
== parent
->dest
.ssa
.bit_size
);
928 nir_deref_instr
*deref
=
929 nir_deref_instr_create(build
->shader
, nir_deref_type_array
);
931 deref
->mode
= parent
->mode
;
932 deref
->type
= glsl_get_array_element(parent
->type
);
933 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
934 deref
->arr
.index
= nir_src_for_ssa(index
);
936 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
937 parent
->dest
.ssa
.num_components
,
938 parent
->dest
.ssa
.bit_size
, NULL
);
940 nir_builder_instr_insert(build
, &deref
->instr
);
945 static inline nir_deref_instr
*
946 nir_build_deref_array_imm(nir_builder
*build
, nir_deref_instr
*parent
,
949 assert(parent
->dest
.is_ssa
);
950 nir_ssa_def
*idx_ssa
= nir_imm_intN_t(build
, index
,
951 parent
->dest
.ssa
.bit_size
);
953 return nir_build_deref_array(build
, parent
, idx_ssa
);
956 static inline nir_deref_instr
*
957 nir_build_deref_ptr_as_array(nir_builder
*build
, nir_deref_instr
*parent
,
960 assert(parent
->deref_type
== nir_deref_type_array
||
961 parent
->deref_type
== nir_deref_type_ptr_as_array
||
962 parent
->deref_type
== nir_deref_type_cast
);
964 assert(index
->bit_size
== parent
->dest
.ssa
.bit_size
);
966 nir_deref_instr
*deref
=
967 nir_deref_instr_create(build
->shader
, nir_deref_type_ptr_as_array
);
969 deref
->mode
= parent
->mode
;
970 deref
->type
= parent
->type
;
971 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
972 deref
->arr
.index
= nir_src_for_ssa(index
);
974 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
975 parent
->dest
.ssa
.num_components
,
976 parent
->dest
.ssa
.bit_size
, NULL
);
978 nir_builder_instr_insert(build
, &deref
->instr
);
983 static inline nir_deref_instr
*
984 nir_build_deref_array_wildcard(nir_builder
*build
, nir_deref_instr
*parent
)
986 assert(glsl_type_is_array(parent
->type
) ||
987 glsl_type_is_matrix(parent
->type
));
989 nir_deref_instr
*deref
=
990 nir_deref_instr_create(build
->shader
, nir_deref_type_array_wildcard
);
992 deref
->mode
= parent
->mode
;
993 deref
->type
= glsl_get_array_element(parent
->type
);
994 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
996 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
997 parent
->dest
.ssa
.num_components
,
998 parent
->dest
.ssa
.bit_size
, NULL
);
1000 nir_builder_instr_insert(build
, &deref
->instr
);
1005 static inline nir_deref_instr
*
1006 nir_build_deref_struct(nir_builder
*build
, nir_deref_instr
*parent
,
1009 assert(glsl_type_is_struct_or_ifc(parent
->type
));
1011 nir_deref_instr
*deref
=
1012 nir_deref_instr_create(build
->shader
, nir_deref_type_struct
);
1014 deref
->mode
= parent
->mode
;
1015 deref
->type
= glsl_get_struct_field(parent
->type
, index
);
1016 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
1017 deref
->strct
.index
= index
;
1019 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
1020 parent
->dest
.ssa
.num_components
,
1021 parent
->dest
.ssa
.bit_size
, NULL
);
1023 nir_builder_instr_insert(build
, &deref
->instr
);
1028 static inline nir_deref_instr
*
1029 nir_build_deref_cast(nir_builder
*build
, nir_ssa_def
*parent
,
1030 nir_variable_mode mode
, const struct glsl_type
*type
,
1031 unsigned ptr_stride
)
1033 nir_deref_instr
*deref
=
1034 nir_deref_instr_create(build
->shader
, nir_deref_type_cast
);
1038 deref
->parent
= nir_src_for_ssa(parent
);
1039 deref
->cast
.ptr_stride
= ptr_stride
;
1041 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
1042 parent
->num_components
, parent
->bit_size
, NULL
);
1044 nir_builder_instr_insert(build
, &deref
->instr
);
1049 /** Returns a deref that follows another but starting from the given parent
1051 * The new deref will be the same type and take the same array or struct index
1052 * as the leader deref but it may have a different parent. This is very
1053 * useful for walking deref paths.
1055 static inline nir_deref_instr
*
1056 nir_build_deref_follower(nir_builder
*b
, nir_deref_instr
*parent
,
1057 nir_deref_instr
*leader
)
1059 /* If the derefs would have the same parent, don't make a new one */
1060 assert(leader
->parent
.is_ssa
);
1061 if (leader
->parent
.ssa
== &parent
->dest
.ssa
)
1064 UNUSED nir_deref_instr
*leader_parent
= nir_src_as_deref(leader
->parent
);
1066 switch (leader
->deref_type
) {
1067 case nir_deref_type_var
:
1068 unreachable("A var dereference cannot have a parent");
1071 case nir_deref_type_array
:
1072 case nir_deref_type_array_wildcard
:
1073 assert(glsl_type_is_matrix(parent
->type
) ||
1074 glsl_type_is_array(parent
->type
) ||
1075 (leader
->deref_type
== nir_deref_type_array
&&
1076 glsl_type_is_vector(parent
->type
)));
1077 assert(glsl_get_length(parent
->type
) ==
1078 glsl_get_length(leader_parent
->type
));
1080 if (leader
->deref_type
== nir_deref_type_array
) {
1081 assert(leader
->arr
.index
.is_ssa
);
1082 nir_ssa_def
*index
= nir_i2i(b
, leader
->arr
.index
.ssa
,
1083 parent
->dest
.ssa
.bit_size
);
1084 return nir_build_deref_array(b
, parent
, index
);
1086 return nir_build_deref_array_wildcard(b
, parent
);
1089 case nir_deref_type_struct
:
1090 assert(glsl_type_is_struct_or_ifc(parent
->type
));
1091 assert(glsl_get_length(parent
->type
) ==
1092 glsl_get_length(leader_parent
->type
));
1094 return nir_build_deref_struct(b
, parent
, leader
->strct
.index
);
1097 unreachable("Invalid deref instruction type");
1101 static inline nir_ssa_def
*
1102 nir_load_reg(nir_builder
*build
, nir_register
*reg
)
1104 return nir_ssa_for_src(build
, nir_src_for_reg(reg
), reg
->num_components
);
1107 static inline nir_ssa_def
*
1108 nir_load_deref_with_access(nir_builder
*build
, nir_deref_instr
*deref
,
1109 enum gl_access_qualifier access
)
1111 nir_intrinsic_instr
*load
=
1112 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_load_deref
);
1113 load
->num_components
= glsl_get_vector_elements(deref
->type
);
1114 load
->src
[0] = nir_src_for_ssa(&deref
->dest
.ssa
);
1115 nir_ssa_dest_init(&load
->instr
, &load
->dest
, load
->num_components
,
1116 glsl_get_bit_size(deref
->type
), NULL
);
1117 nir_intrinsic_set_access(load
, access
);
1118 nir_builder_instr_insert(build
, &load
->instr
);
1119 return &load
->dest
.ssa
;
1122 static inline nir_ssa_def
*
1123 nir_load_deref(nir_builder
*build
, nir_deref_instr
*deref
)
1125 return nir_load_deref_with_access(build
, deref
, (enum gl_access_qualifier
)0);
1129 nir_store_deref_with_access(nir_builder
*build
, nir_deref_instr
*deref
,
1130 nir_ssa_def
*value
, unsigned writemask
,
1131 enum gl_access_qualifier access
)
1133 nir_intrinsic_instr
*store
=
1134 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_store_deref
);
1135 store
->num_components
= glsl_get_vector_elements(deref
->type
);
1136 store
->src
[0] = nir_src_for_ssa(&deref
->dest
.ssa
);
1137 store
->src
[1] = nir_src_for_ssa(value
);
1138 nir_intrinsic_set_write_mask(store
,
1139 writemask
& ((1 << store
->num_components
) - 1));
1140 nir_intrinsic_set_access(store
, access
);
1141 nir_builder_instr_insert(build
, &store
->instr
);
1145 nir_store_deref(nir_builder
*build
, nir_deref_instr
*deref
,
1146 nir_ssa_def
*value
, unsigned writemask
)
1148 nir_store_deref_with_access(build
, deref
, value
, writemask
,
1149 (enum gl_access_qualifier
)0);
1153 nir_copy_deref_with_access(nir_builder
*build
, nir_deref_instr
*dest
,
1154 nir_deref_instr
*src
,
1155 enum gl_access_qualifier dest_access
,
1156 enum gl_access_qualifier src_access
)
1158 nir_intrinsic_instr
*copy
=
1159 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_copy_deref
);
1160 copy
->src
[0] = nir_src_for_ssa(&dest
->dest
.ssa
);
1161 copy
->src
[1] = nir_src_for_ssa(&src
->dest
.ssa
);
1162 nir_intrinsic_set_dst_access(copy
, dest_access
);
1163 nir_intrinsic_set_src_access(copy
, src_access
);
1164 nir_builder_instr_insert(build
, ©
->instr
);
1168 nir_copy_deref(nir_builder
*build
, nir_deref_instr
*dest
, nir_deref_instr
*src
)
1170 nir_copy_deref_with_access(build
, dest
, src
,
1171 (enum gl_access_qualifier
) 0,
1172 (enum gl_access_qualifier
) 0);
1175 static inline nir_ssa_def
*
1176 nir_load_var(nir_builder
*build
, nir_variable
*var
)
1178 return nir_load_deref(build
, nir_build_deref_var(build
, var
));
1182 nir_store_var(nir_builder
*build
, nir_variable
*var
, nir_ssa_def
*value
,
1185 nir_store_deref(build
, nir_build_deref_var(build
, var
), value
, writemask
);
1189 nir_copy_var(nir_builder
*build
, nir_variable
*dest
, nir_variable
*src
)
1191 nir_copy_deref(build
, nir_build_deref_var(build
, dest
),
1192 nir_build_deref_var(build
, src
));
1195 static inline nir_ssa_def
*
1196 nir_load_param(nir_builder
*build
, uint32_t param_idx
)
1198 assert(param_idx
< build
->impl
->function
->num_params
);
1199 nir_parameter
*param
= &build
->impl
->function
->params
[param_idx
];
1201 nir_intrinsic_instr
*load
=
1202 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_load_param
);
1203 nir_intrinsic_set_param_idx(load
, param_idx
);
1204 load
->num_components
= param
->num_components
;
1205 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
1206 param
->num_components
, param
->bit_size
, NULL
);
1207 nir_builder_instr_insert(build
, &load
->instr
);
1208 return &load
->dest
.ssa
;
1211 #include "nir_builder_opcodes.h"
1213 static inline nir_ssa_def
*
1214 nir_f2b(nir_builder
*build
, nir_ssa_def
*f
)
1216 return nir_f2b1(build
, f
);
1219 static inline nir_ssa_def
*
1220 nir_i2b(nir_builder
*build
, nir_ssa_def
*i
)
1222 return nir_i2b1(build
, i
);
1225 static inline nir_ssa_def
*
1226 nir_b2f(nir_builder
*build
, nir_ssa_def
*b
, uint32_t bit_size
)
1229 case 64: return nir_b2f64(build
, b
);
1230 case 32: return nir_b2f32(build
, b
);
1231 case 16: return nir_b2f16(build
, b
);
1233 unreachable("Invalid bit-size");
1237 static inline nir_ssa_def
*
1238 nir_b2i(nir_builder
*build
, nir_ssa_def
*b
, uint32_t bit_size
)
1241 case 64: return nir_b2i64(build
, b
);
1242 case 32: return nir_b2i32(build
, b
);
1243 case 16: return nir_b2i16(build
, b
);
1244 case 8: return nir_b2i8(build
, b
);
1246 unreachable("Invalid bit-size");
1249 static inline nir_ssa_def
*
1250 nir_load_barycentric(nir_builder
*build
, nir_intrinsic_op op
,
1251 unsigned interp_mode
)
1253 unsigned num_components
= op
== nir_intrinsic_load_barycentric_model
? 3 : 2;
1254 nir_intrinsic_instr
*bary
= nir_intrinsic_instr_create(build
->shader
, op
);
1255 nir_ssa_dest_init(&bary
->instr
, &bary
->dest
, num_components
, 32, NULL
);
1256 nir_intrinsic_set_interp_mode(bary
, interp_mode
);
1257 nir_builder_instr_insert(build
, &bary
->instr
);
1258 return &bary
->dest
.ssa
;
1262 nir_jump(nir_builder
*build
, nir_jump_type jump_type
)
1264 nir_jump_instr
*jump
= nir_jump_instr_create(build
->shader
, jump_type
);
1265 nir_builder_instr_insert(build
, &jump
->instr
);
1268 static inline nir_ssa_def
*
1269 nir_compare_func(nir_builder
*b
, enum compare_func func
,
1270 nir_ssa_def
*src0
, nir_ssa_def
*src1
)
1273 case COMPARE_FUNC_NEVER
:
1274 return nir_imm_int(b
, 0);
1275 case COMPARE_FUNC_ALWAYS
:
1276 return nir_imm_int(b
, ~0);
1277 case COMPARE_FUNC_EQUAL
:
1278 return nir_feq(b
, src0
, src1
);
1279 case COMPARE_FUNC_NOTEQUAL
:
1280 return nir_fne(b
, src0
, src1
);
1281 case COMPARE_FUNC_GREATER
:
1282 return nir_flt(b
, src1
, src0
);
1283 case COMPARE_FUNC_GEQUAL
:
1284 return nir_fge(b
, src0
, src1
);
1285 case COMPARE_FUNC_LESS
:
1286 return nir_flt(b
, src0
, src1
);
1287 case COMPARE_FUNC_LEQUAL
:
1288 return nir_fge(b
, src1
, src0
);
1290 unreachable("bad compare func");
1294 nir_scoped_memory_barrier(nir_builder
*b
,
1296 nir_memory_semantics semantics
,
1297 nir_variable_mode modes
)
1299 nir_intrinsic_instr
*intrin
=
1300 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_scoped_memory_barrier
);
1301 nir_intrinsic_set_memory_scope(intrin
, scope
);
1302 nir_intrinsic_set_memory_semantics(intrin
, semantics
);
1303 nir_intrinsic_set_memory_modes(intrin
, modes
);
1304 nir_builder_instr_insert(b
, &intrin
->instr
);
1307 #endif /* NIR_BUILDER_H */