nir/builder: Add a bit size field to nir_ssa_undef
[mesa.git] / src / compiler / nir / nir_builder.h
1 /*
2 * Copyright © 2014-2015 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef NIR_BUILDER_H
25 #define NIR_BUILDER_H
26
27 #include "nir_control_flow.h"
28
29 struct exec_list;
30
31 typedef struct nir_builder {
32 nir_cursor cursor;
33
34 /* Whether new ALU instructions will be marked "exact" */
35 bool exact;
36
37 nir_shader *shader;
38 nir_function_impl *impl;
39 } nir_builder;
40
41 static inline void
42 nir_builder_init(nir_builder *build, nir_function_impl *impl)
43 {
44 memset(build, 0, sizeof(*build));
45 build->exact = false;
46 build->impl = impl;
47 build->shader = impl->function->shader;
48 }
49
50 static inline void
51 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
52 gl_shader_stage stage,
53 const nir_shader_compiler_options *options)
54 {
55 build->shader = nir_shader_create(mem_ctx, stage, options);
56 nir_function *func = nir_function_create(build->shader, "main");
57 build->exact = false;
58 build->impl = nir_function_impl_create(func);
59 build->cursor = nir_after_cf_list(&build->impl->body);
60 }
61
62 static inline void
63 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
64 {
65 nir_instr_insert(build->cursor, instr);
66
67 /* Move the cursor forward. */
68 build->cursor = nir_after_instr(instr);
69 }
70
71 static inline void
72 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
73 {
74 nir_cf_node_insert(build->cursor, cf);
75 }
76
77 static inline nir_ssa_def *
78 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
79 {
80 nir_ssa_undef_instr *undef =
81 nir_ssa_undef_instr_create(build->shader, num_components);
82 undef->def.bit_size = bit_size;
83 if (!undef)
84 return NULL;
85
86 nir_instr_insert(nir_before_block(nir_start_block(build->impl)),
87 &undef->instr);
88
89 return &undef->def;
90 }
91
92 static inline nir_ssa_def *
93 nir_build_imm(nir_builder *build, unsigned num_components, nir_const_value value)
94 {
95 nir_load_const_instr *load_const =
96 nir_load_const_instr_create(build->shader, num_components);
97 if (!load_const)
98 return NULL;
99
100 load_const->value = value;
101
102 nir_builder_instr_insert(build, &load_const->instr);
103
104 return &load_const->def;
105 }
106
107 static inline nir_ssa_def *
108 nir_imm_float(nir_builder *build, float x)
109 {
110 nir_const_value v;
111
112 memset(&v, 0, sizeof(v));
113 v.f32[0] = x;
114
115 return nir_build_imm(build, 1, v);
116 }
117
118 static inline nir_ssa_def *
119 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
120 {
121 nir_const_value v;
122
123 memset(&v, 0, sizeof(v));
124 v.f32[0] = x;
125 v.f32[1] = y;
126 v.f32[2] = z;
127 v.f32[3] = w;
128
129 return nir_build_imm(build, 4, v);
130 }
131
132 static inline nir_ssa_def *
133 nir_imm_int(nir_builder *build, int x)
134 {
135 nir_const_value v;
136
137 memset(&v, 0, sizeof(v));
138 v.i32[0] = x;
139
140 return nir_build_imm(build, 1, v);
141 }
142
143 static inline nir_ssa_def *
144 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
145 {
146 nir_const_value v;
147
148 memset(&v, 0, sizeof(v));
149 v.i32[0] = x;
150 v.i32[1] = y;
151 v.i32[2] = z;
152 v.i32[3] = w;
153
154 return nir_build_imm(build, 4, v);
155 }
156
157 static inline nir_ssa_def *
158 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
159 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
160 {
161 const nir_op_info *op_info = &nir_op_infos[op];
162 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
163 if (!instr)
164 return NULL;
165
166 instr->exact = build->exact;
167
168 instr->src[0].src = nir_src_for_ssa(src0);
169 if (src1)
170 instr->src[1].src = nir_src_for_ssa(src1);
171 if (src2)
172 instr->src[2].src = nir_src_for_ssa(src2);
173 if (src3)
174 instr->src[3].src = nir_src_for_ssa(src3);
175
176 /* Guess the number of components the destination temporary should have
177 * based on our input sizes, if it's not fixed for the op.
178 */
179 unsigned num_components = op_info->output_size;
180 if (num_components == 0) {
181 for (unsigned i = 0; i < op_info->num_inputs; i++) {
182 if (op_info->input_sizes[i] == 0)
183 num_components = MAX2(num_components,
184 instr->src[i].src.ssa->num_components);
185 }
186 }
187 assert(num_components != 0);
188
189 /* Figure out the bitwidth based on the source bitwidth if the instruction
190 * is variable-width.
191 */
192 unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
193 if (bit_size == 0) {
194 for (unsigned i = 0; i < op_info->num_inputs; i++) {
195 unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
196 if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
197 if (bit_size)
198 assert(src_bit_size == bit_size);
199 else
200 bit_size = src_bit_size;
201 } else {
202 assert(src_bit_size ==
203 nir_alu_type_get_type_size(op_info->input_types[i]));
204 }
205 }
206 }
207
208 /* Make sure we don't swizzle from outside of our source vector (like if a
209 * scalar value was passed into a multiply with a vector).
210 */
211 for (unsigned i = 0; i < op_info->num_inputs; i++) {
212 for (unsigned j = instr->src[i].src.ssa->num_components; j < 4; j++) {
213 instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
214 }
215 }
216
217 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
218 bit_size, NULL);
219 instr->dest.write_mask = (1 << num_components) - 1;
220
221 nir_builder_instr_insert(build, &instr->instr);
222
223 return &instr->dest.dest.ssa;
224 }
225
226 #define ALU1(op) \
227 static inline nir_ssa_def * \
228 nir_##op(nir_builder *build, nir_ssa_def *src0) \
229 { \
230 return nir_build_alu(build, nir_op_##op, src0, NULL, NULL, NULL); \
231 }
232
233 #define ALU2(op) \
234 static inline nir_ssa_def * \
235 nir_##op(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) \
236 { \
237 return nir_build_alu(build, nir_op_##op, src0, src1, NULL, NULL); \
238 }
239
240 #define ALU3(op) \
241 static inline nir_ssa_def * \
242 nir_##op(nir_builder *build, nir_ssa_def *src0, \
243 nir_ssa_def *src1, nir_ssa_def *src2) \
244 { \
245 return nir_build_alu(build, nir_op_##op, src0, src1, src2, NULL); \
246 }
247
248 #define ALU4(op) \
249 static inline nir_ssa_def * \
250 nir_##op(nir_builder *build, nir_ssa_def *src0, \
251 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) \
252 { \
253 return nir_build_alu(build, nir_op_##op, src0, src1, src2, src3); \
254 }
255
256 #include "nir_builder_opcodes.h"
257
258 static inline nir_ssa_def *
259 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
260 {
261 switch (num_components) {
262 case 4:
263 return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
264 case 3:
265 return nir_vec3(build, comp[0], comp[1], comp[2]);
266 case 2:
267 return nir_vec2(build, comp[0], comp[1]);
268 case 1:
269 return comp[0];
270 default:
271 unreachable("bad component count");
272 return NULL;
273 }
274 }
275
276 /**
277 * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
278 */
279 static inline nir_ssa_def *
280 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
281 {
282 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
283 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
284 nir_src_bit_size(src.src), NULL);
285 mov->exact = build->exact;
286 mov->dest.write_mask = (1 << num_components) - 1;
287 mov->src[0] = src;
288 nir_builder_instr_insert(build, &mov->instr);
289
290 return &mov->dest.dest.ssa;
291 }
292
293 static inline nir_ssa_def *
294 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
295 {
296 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
297 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
298 nir_src_bit_size(src.src), NULL);
299 mov->exact = build->exact;
300 mov->dest.write_mask = (1 << num_components) - 1;
301 mov->src[0] = src;
302 nir_builder_instr_insert(build, &mov->instr);
303
304 return &mov->dest.dest.ssa;
305 }
306
307 /**
308 * Construct an fmov or imov that reswizzles the source's components.
309 */
310 static inline nir_ssa_def *
311 nir_swizzle(nir_builder *build, nir_ssa_def *src, unsigned swiz[4],
312 unsigned num_components, bool use_fmov)
313 {
314 nir_alu_src alu_src = { NIR_SRC_INIT };
315 alu_src.src = nir_src_for_ssa(src);
316 for (unsigned i = 0; i < num_components; i++)
317 alu_src.swizzle[i] = swiz[i];
318
319 return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
320 nir_imov_alu(build, alu_src, num_components);
321 }
322
323 /* Selects the right fdot given the number of components in each source. */
324 static inline nir_ssa_def *
325 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
326 {
327 assert(src0->num_components == src1->num_components);
328 switch (src0->num_components) {
329 case 1: return nir_fmul(build, src0, src1);
330 case 2: return nir_fdot2(build, src0, src1);
331 case 3: return nir_fdot3(build, src0, src1);
332 case 4: return nir_fdot4(build, src0, src1);
333 default:
334 unreachable("bad component size");
335 }
336
337 return NULL;
338 }
339
340 static inline nir_ssa_def *
341 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
342 {
343 unsigned swizzle[4] = {c, c, c, c};
344 return nir_swizzle(b, def, swizzle, 1, false);
345 }
346
347 /**
348 * Turns a nir_src into a nir_ssa_def * so it can be passed to
349 * nir_build_alu()-based builder calls.
350 *
351 * See nir_ssa_for_alu_src() for alu instructions.
352 */
353 static inline nir_ssa_def *
354 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
355 {
356 if (src.is_ssa && src.ssa->num_components == num_components)
357 return src.ssa;
358
359 nir_alu_src alu = { NIR_SRC_INIT };
360 alu.src = src;
361 for (int j = 0; j < 4; j++)
362 alu.swizzle[j] = j;
363
364 return nir_imov_alu(build, alu, num_components);
365 }
366
367 /**
368 * Similar to nir_ssa_for_src(), but for alu src's, respecting the
369 * nir_alu_src's swizzle.
370 */
371 static inline nir_ssa_def *
372 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
373 {
374 static uint8_t trivial_swizzle[4] = { 0, 1, 2, 3 };
375 nir_alu_src *src = &instr->src[srcn];
376 unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
377
378 if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
379 !src->abs && !src->negate &&
380 (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
381 return src->src.ssa;
382
383 return nir_imov_alu(build, *src, num_components);
384 }
385
386 static inline nir_ssa_def *
387 nir_load_var(nir_builder *build, nir_variable *var)
388 {
389 const unsigned num_components = glsl_get_vector_elements(var->type);
390
391 nir_intrinsic_instr *load =
392 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_var);
393 load->num_components = num_components;
394 load->variables[0] = nir_deref_var_create(load, var);
395 nir_ssa_dest_init(&load->instr, &load->dest, num_components,
396 glsl_get_bit_size(glsl_get_base_type(var->type)), NULL);
397 nir_builder_instr_insert(build, &load->instr);
398 return &load->dest.ssa;
399 }
400
401 static inline void
402 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
403 unsigned writemask)
404 {
405 const unsigned num_components = glsl_get_vector_elements(var->type);
406
407 nir_intrinsic_instr *store =
408 nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
409 store->num_components = num_components;
410 nir_intrinsic_set_write_mask(store, writemask);
411 store->variables[0] = nir_deref_var_create(store, var);
412 store->src[0] = nir_src_for_ssa(value);
413 nir_builder_instr_insert(build, &store->instr);
414 }
415
416 static inline void
417 nir_store_deref_var(nir_builder *build, nir_deref_var *deref,
418 nir_ssa_def *value, unsigned writemask)
419 {
420 const unsigned num_components =
421 glsl_get_vector_elements(nir_deref_tail(&deref->deref)->type);
422
423 nir_intrinsic_instr *store =
424 nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
425 store->num_components = num_components;
426 store->const_index[0] = writemask & ((1 << num_components) - 1);
427 store->variables[0] = nir_deref_as_var(nir_copy_deref(store, &deref->deref));
428 store->src[0] = nir_src_for_ssa(value);
429 nir_builder_instr_insert(build, &store->instr);
430 }
431
432 static inline void
433 nir_copy_deref_var(nir_builder *build, nir_deref_var *dest, nir_deref_var *src)
434 {
435 assert(nir_deref_tail(&dest->deref)->type ==
436 nir_deref_tail(&src->deref)->type);
437
438 nir_intrinsic_instr *copy =
439 nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_var);
440 copy->variables[0] = nir_deref_as_var(nir_copy_deref(copy, &dest->deref));
441 copy->variables[1] = nir_deref_as_var(nir_copy_deref(copy, &src->deref));
442 nir_builder_instr_insert(build, &copy->instr);
443 }
444
445 static inline void
446 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
447 {
448 nir_intrinsic_instr *copy =
449 nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_var);
450 copy->variables[0] = nir_deref_var_create(copy, dest);
451 copy->variables[1] = nir_deref_var_create(copy, src);
452 nir_builder_instr_insert(build, &copy->instr);
453 }
454
455 static inline nir_ssa_def *
456 nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index)
457 {
458 nir_intrinsic_instr *load = nir_intrinsic_instr_create(build->shader, op);
459 load->num_components = nir_intrinsic_infos[op].dest_components;
460 load->const_index[0] = index;
461 nir_ssa_dest_init(&load->instr, &load->dest,
462 nir_intrinsic_infos[op].dest_components, 32, NULL);
463 nir_builder_instr_insert(build, &load->instr);
464 return &load->dest.ssa;
465 }
466
467 static inline void
468 nir_jump(nir_builder *build, nir_jump_type jump_type)
469 {
470 nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
471 nir_builder_instr_insert(build, &jump->instr);
472 }
473
474 #endif /* NIR_BUILDER_H */