src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if_src(nir_builder *build, nir_src condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = condition;
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 110 {
 111    return nir_push_if_src(build, nir_src_for_ssa(condition));
 112 }
 113
 114 static inline nir_if *
 115 nir_push_else(nir_builder *build, nir_if *nif)
 116 {
 117    if (nif) {
 118       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 119    } else {
 120       nir_block *block = nir_cursor_current_block(build->cursor);
 121       nif = nir_cf_node_as_if(block->cf_node.parent);
 122    }
 123    build->cursor = nir_before_cf_list(&nif->else_list);
 124    return nif;
 125 }
 126
 127 static inline void
 128 nir_pop_if(nir_builder *build, nir_if *nif)
 129 {
 130    if (nif) {
 131       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 132    } else {
 133       nir_block *block = nir_cursor_current_block(build->cursor);
 134       nif = nir_cf_node_as_if(block->cf_node.parent);
 135    }
 136    build->cursor = nir_after_cf_node(&nif->cf_node);
 137 }
 138
 139 static inline nir_ssa_def *
 140 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 141 {
 142    nir_block *block = nir_cursor_current_block(build->cursor);
 143    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 144
 145    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 146
 147    nir_phi_src *src = ralloc(phi, nir_phi_src);
 148    src->pred = nir_if_last_then_block(nif);
 149    src->src = nir_src_for_ssa(then_def);
 150    exec_list_push_tail(&phi->srcs, &src->node);
 151
 152    src = ralloc(phi, nir_phi_src);
 153    src->pred = nir_if_last_else_block(nif);
 154    src->src = nir_src_for_ssa(else_def);
 155    exec_list_push_tail(&phi->srcs, &src->node);
 156
 157    assert(then_def->num_components == else_def->num_components);
 158    assert(then_def->bit_size == else_def->bit_size);
 159    nir_ssa_dest_init(&phi->instr, &phi->dest,
 160                      then_def->num_components, then_def->bit_size, NULL);
 161
 162    nir_builder_instr_insert(build, &phi->instr);
 163
 164    return &phi->dest.ssa;
 165 }
 166
 167 static inline nir_loop *
 168 nir_push_loop(nir_builder *build)
 169 {
 170    nir_loop *loop = nir_loop_create(build->shader);
 171    nir_builder_cf_insert(build, &loop->cf_node);
 172    build->cursor = nir_before_cf_list(&loop->body);
 173    return loop;
 174 }
 175
 176 static inline void
 177 nir_pop_loop(nir_builder *build, nir_loop *loop)
 178 {
 179    if (loop) {
 180       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 181    } else {
 182       nir_block *block = nir_cursor_current_block(build->cursor);
 183       loop = nir_cf_node_as_loop(block->cf_node.parent);
 184    }
 185    build->cursor = nir_after_cf_node(&loop->cf_node);
 186 }
 187
 188 static inline nir_ssa_def *
 189 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 190 {
 191    nir_ssa_undef_instr *undef =
 192       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 193    if (!undef)
 194       return NULL;
 195
 196    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 197
 198    return &undef->def;
 199 }
 200
 201 static inline nir_ssa_def *
 202 nir_build_imm(nir_builder *build, unsigned num_components,
 203               unsigned bit_size, const nir_const_value *value)
 204 {
 205    nir_load_const_instr *load_const =
 206       nir_load_const_instr_create(build->shader, num_components, bit_size);
 207    if (!load_const)
 208       return NULL;
 209
 210    memcpy(load_const->value, value, sizeof(nir_const_value) * num_components);
 211
 212    nir_builder_instr_insert(build, &load_const->instr);
 213
 214    return &load_const->def;
 215 }
 216
 217 static inline nir_ssa_def *
 218 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
 219 {
 220    nir_load_const_instr *load_const =
 221       nir_load_const_instr_create(build->shader, num_components, bit_size);
 222
 223    /* nir_load_const_instr_create uses rzalloc so it's already zero */
 224
 225    nir_builder_instr_insert(build, &load_const->instr);
 226
 227    return &load_const->def;
 228 }
 229
 230 static inline nir_ssa_def *
 231 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 232 {
 233    nir_const_value v = nir_const_value_for_bool(x, bit_size);
 234    return nir_build_imm(build, 1, bit_size, &v);
 235 }
 236
 237 static inline nir_ssa_def *
 238 nir_imm_bool(nir_builder *build, bool x)
 239 {
 240    return nir_imm_boolN_t(build, x, 1);
 241 }
 242
 243 static inline nir_ssa_def *
 244 nir_imm_true(nir_builder *build)
 245 {
 246    return nir_imm_bool(build, true);
 247 }
 248
 249 static inline nir_ssa_def *
 250 nir_imm_false(nir_builder *build)
 251 {
 252    return nir_imm_bool(build, false);
 253 }
 254
 255 static inline nir_ssa_def *
 256 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 257 {
 258    nir_const_value v = nir_const_value_for_float(x, bit_size);
 259    return nir_build_imm(build, 1, bit_size, &v);
 260 }
 261
 262 static inline nir_ssa_def *
 263 nir_imm_float16(nir_builder *build, float x)
 264 {
 265    return nir_imm_floatN_t(build, x, 16);
 266 }
 267
 268 static inline nir_ssa_def *
 269 nir_imm_float(nir_builder *build, float x)
 270 {
 271    return nir_imm_floatN_t(build, x, 32);
 272 }
 273
 274 static inline nir_ssa_def *
 275 nir_imm_double(nir_builder *build, double x)
 276 {
 277    return nir_imm_floatN_t(build, x, 64);
 278 }
 279
 280 static inline nir_ssa_def *
 281 nir_imm_vec2(nir_builder *build, float x, float y)
 282 {
 283    nir_const_value v[2] = {
 284       nir_const_value_for_float(x, 32),
 285       nir_const_value_for_float(y, 32),
 286    };
 287    return nir_build_imm(build, 2, 32, v);
 288 }
 289
 290 static inline nir_ssa_def *
 291 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 292 {
 293    nir_const_value v[4] = {
 294       nir_const_value_for_float(x, 32),
 295       nir_const_value_for_float(y, 32),
 296       nir_const_value_for_float(z, 32),
 297       nir_const_value_for_float(w, 32),
 298    };
 299
 300    return nir_build_imm(build, 4, 32, v);
 301 }
 302
 303 static inline nir_ssa_def *
 304 nir_imm_vec4_16(nir_builder *build, float x, float y, float z, float w)
 305 {
 306    nir_const_value v[4] = {
 307       nir_const_value_for_float(x, 16),
 308       nir_const_value_for_float(y, 16),
 309       nir_const_value_for_float(z, 16),
 310       nir_const_value_for_float(w, 16),
 311    };
 312
 313    return nir_build_imm(build, 4, 16, v);
 314 }
 315
 316 static inline nir_ssa_def *
 317 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 318 {
 319    nir_const_value v = nir_const_value_for_raw_uint(x, bit_size);
 320    return nir_build_imm(build, 1, bit_size, &v);
 321 }
 322
 323 static inline nir_ssa_def *
 324 nir_imm_int(nir_builder *build, int x)
 325 {
 326    return nir_imm_intN_t(build, x, 32);
 327 }
 328
 329 static inline nir_ssa_def *
 330 nir_imm_int64(nir_builder *build, int64_t x)
 331 {
 332    return nir_imm_intN_t(build, x, 64);
 333 }
 334
 335 static inline nir_ssa_def *
 336 nir_imm_ivec2(nir_builder *build, int x, int y)
 337 {
 338    nir_const_value v[2] = {
 339       nir_const_value_for_int(x, 32),
 340       nir_const_value_for_int(y, 32),
 341    };
 342
 343    return nir_build_imm(build, 2, 32, v);
 344 }
 345
 346 static inline nir_ssa_def *
 347 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 348 {
 349    nir_const_value v[4] = {
 350       nir_const_value_for_int(x, 32),
 351       nir_const_value_for_int(y, 32),
 352       nir_const_value_for_int(z, 32),
 353       nir_const_value_for_int(w, 32),
 354    };
 355
 356    return nir_build_imm(build, 4, 32, v);
 357 }
 358
 359 static inline nir_ssa_def *
 360 nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr)
 361 {
 362    const nir_op_info *op_info = &nir_op_infos[instr->op];
 363
 364    instr->exact = build->exact;
 365
 366    /* Guess the number of components the destination temporary should have
 367     * based on our input sizes, if it's not fixed for the op.
 368     */
 369    unsigned num_components = op_info->output_size;
 370    if (num_components == 0) {
 371       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 372          if (op_info->input_sizes[i] == 0)
 373             num_components = MAX2(num_components,
 374                                   instr->src[i].src.ssa->num_components);
 375       }
 376    }
 377    assert(num_components != 0);
 378
 379    /* Figure out the bitwidth based on the source bitwidth if the instruction
 380     * is variable-width.
 381     */
 382    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 383    if (bit_size == 0) {
 384       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 385          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 386          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 387             if (bit_size)
 388                assert(src_bit_size == bit_size);
 389             else
 390                bit_size = src_bit_size;
 391          } else {
 392             assert(src_bit_size ==
 393                nir_alu_type_get_type_size(op_info->input_types[i]));
 394          }
 395       }
 396    }
 397
 398    /* When in doubt, assume 32. */
 399    if (bit_size == 0)
 400       bit_size = 32;
 401
 402    /* Make sure we don't swizzle from outside of our source vector (like if a
 403     * scalar value was passed into a multiply with a vector).
 404     */
 405    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 406       for (unsigned j = instr->src[i].src.ssa->num_components;
 407            j < NIR_MAX_VEC_COMPONENTS; j++) {
 408          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 409       }
 410    }
 411
 412    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 413                      bit_size, NULL);
 414    instr->dest.write_mask = (1 << num_components) - 1;
 415
 416    nir_builder_instr_insert(build, &instr->instr);
 417
 418    return &instr->dest.dest.ssa;
 419 }
 420
 421 static inline nir_ssa_def *
 422 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 423               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 424 {
 425    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 426    if (!instr)
 427       return NULL;
 428
 429    instr->src[0].src = nir_src_for_ssa(src0);
 430    if (src1)
 431       instr->src[1].src = nir_src_for_ssa(src1);
 432    if (src2)
 433       instr->src[2].src = nir_src_for_ssa(src2);
 434    if (src3)
 435       instr->src[3].src = nir_src_for_ssa(src3);
 436
 437    return nir_builder_alu_instr_finish_and_insert(build, instr);
 438 }
 439
 440 /* for the couple special cases with more than 4 src args: */
 441 static inline nir_ssa_def *
 442 nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs)
 443 {
 444    const nir_op_info *op_info = &nir_op_infos[op];
 445    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 446    if (!instr)
 447       return NULL;
 448
 449    for (unsigned i = 0; i < op_info->num_inputs; i++)
 450       instr->src[i].src = nir_src_for_ssa(srcs[i]);
 451
 452    return nir_builder_alu_instr_finish_and_insert(build, instr);
 453 }
 454
 455 #include "nir_builder_opcodes.h"
 456
 457 static inline nir_ssa_def *
 458 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 459 {
 460    return nir_build_alu_src_arr(build, nir_op_vec(num_components), comp);
 461 }
 462
 463 static inline nir_ssa_def *
 464 nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 465 {
 466    assert(!src.abs && !src.negate);
 467    if (src.src.is_ssa && src.src.ssa->num_components == num_components) {
 468       bool any_swizzles = false;
 469       for (unsigned i = 0; i < num_components; i++) {
 470          if (src.swizzle[i] != i)
 471             any_swizzles = true;
 472       }
 473       if (!any_swizzles)
 474          return src.src.ssa;
 475    }
 476
 477    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
 478    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 479                      nir_src_bit_size(src.src), NULL);
 480    mov->exact = build->exact;
 481    mov->dest.write_mask = (1 << num_components) - 1;
 482    mov->src[0] = src;
 483    nir_builder_instr_insert(build, &mov->instr);
 484
 485    return &mov->dest.dest.ssa;
 486 }
 487
 488 /**
 489  * Construct an fmov or imov that reswizzles the source's components.
 490  */
 491 static inline nir_ssa_def *
 492 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 493             unsigned num_components)
 494 {
 495    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 496    nir_alu_src alu_src = { NIR_SRC_INIT };
 497    alu_src.src = nir_src_for_ssa(src);
 498
 499    bool is_identity_swizzle = true;
 500    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 501       if (swiz[i] != i)
 502          is_identity_swizzle = false;
 503       alu_src.swizzle[i] = swiz[i];
 504    }
 505
 506    if (num_components == src->num_components && is_identity_swizzle)
 507       return src;
 508
 509    return nir_mov_alu(build, alu_src, num_components);
 510 }
 511
 512 /* Selects the right fdot given the number of components in each source. */
 513 static inline nir_ssa_def *
 514 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 515 {
 516    assert(src0->num_components == src1->num_components);
 517    switch (src0->num_components) {
 518    case 1: return nir_fmul(build, src0, src1);
 519    case 2: return nir_fdot2(build, src0, src1);
 520    case 3: return nir_fdot3(build, src0, src1);
 521    case 4: return nir_fdot4(build, src0, src1);
 522    case 8: return nir_fdot8(build, src0, src1);
 523    case 16: return nir_fdot16(build, src0, src1);
 524    default:
 525       unreachable("bad component size");
 526    }
 527
 528    return NULL;
 529 }
 530
 531 static inline nir_ssa_def *
 532 nir_ball_iequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 533 {
 534    switch (src0->num_components) {
 535    case 1: return nir_ieq(b, src0, src1);
 536    case 2: return nir_ball_iequal2(b, src0, src1);
 537    case 3: return nir_ball_iequal3(b, src0, src1);
 538    case 4: return nir_ball_iequal4(b, src0, src1);
 539    case 8: return nir_ball_iequal8(b, src0, src1);
 540    case 16: return nir_ball_iequal16(b, src0, src1);
 541    default:
 542       unreachable("bad component size");
 543    }
 544 }
 545
 546 static inline nir_ssa_def *
 547 nir_ball(nir_builder *b, nir_ssa_def *src)
 548 {
 549    return nir_ball_iequal(b, src, nir_imm_true(b));
 550 }
 551
 552 static inline nir_ssa_def *
 553 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 554 {
 555    switch (src0->num_components) {
 556    case 1: return nir_ine(b, src0, src1);
 557    case 2: return nir_bany_inequal2(b, src0, src1);
 558    case 3: return nir_bany_inequal3(b, src0, src1);
 559    case 4: return nir_bany_inequal4(b, src0, src1);
 560    case 8: return nir_bany_inequal8(b, src0, src1);
 561    case 16: return nir_bany_inequal16(b, src0, src1);
 562    default:
 563       unreachable("bad component size");
 564    }
 565 }
 566
 567 static inline nir_ssa_def *
 568 nir_bany(nir_builder *b, nir_ssa_def *src)
 569 {
 570    return nir_bany_inequal(b, src, nir_imm_false(b));
 571 }
 572
 573 static inline nir_ssa_def *
 574 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 575 {
 576    return nir_swizzle(b, def, &c, 1);
 577 }
 578
 579 static inline nir_ssa_def *
 580 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 581 {
 582    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 583
 584    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 585       if ((mask & (1 << i)) == 0)
 586          continue;
 587       swizzle[num_channels++] = i;
 588    }
 589
 590    return nir_swizzle(b, def, swizzle, num_channels);
 591 }
 592
 593 static inline nir_ssa_def *
 594 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
 595                            unsigned start, unsigned end)
 596 {
 597    if (start == end - 1) {
 598       return nir_channel(b, vec, start);
 599    } else {
 600       unsigned mid = start + (end - start) / 2;
 601       return nir_bcsel(b, nir_ilt(b, c, nir_imm_intN_t(b, mid, c->bit_size)),
 602                        _nir_vector_extract_helper(b, vec, c, start, mid),
 603                        _nir_vector_extract_helper(b, vec, c, mid, end));
 604    }
 605 }
 606
 607 static inline nir_ssa_def *
 608 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
 609 {
 610    nir_src c_src = nir_src_for_ssa(c);
 611    if (nir_src_is_const(c_src)) {
 612       uint64_t c_const = nir_src_as_uint(c_src);
 613       if (c_const < vec->num_components)
 614          return nir_channel(b, vec, c_const);
 615       else
 616          return nir_ssa_undef(b, 1, vec->bit_size);
 617    } else {
 618       return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
 619    }
 620 }
 621
 622 /** Replaces the component of `vec` specified by `c` with `scalar` */
 623 static inline nir_ssa_def *
 624 nir_vector_insert_imm(nir_builder *b, nir_ssa_def *vec,
 625                       nir_ssa_def *scalar, unsigned c)
 626 {
 627    assert(scalar->num_components == 1);
 628    assert(c < vec->num_components);
 629
 630    nir_op vec_op = nir_op_vec(vec->num_components);
 631    nir_alu_instr *vec_instr = nir_alu_instr_create(b->shader, vec_op);
 632
 633    for (unsigned i = 0; i < vec->num_components; i++) {
 634       if (i == c) {
 635          vec_instr->src[i].src = nir_src_for_ssa(scalar);
 636          vec_instr->src[i].swizzle[0] = 0;
 637       } else {
 638          vec_instr->src[i].src = nir_src_for_ssa(vec);
 639          vec_instr->src[i].swizzle[0] = i;
 640       }
 641    }
 642
 643    return nir_builder_alu_instr_finish_and_insert(b, vec_instr);
 644 }
 645
 646 /** Replaces the component of `vec` specified by `c` with `scalar` */
 647 static inline nir_ssa_def *
 648 nir_vector_insert(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *scalar,
 649                   nir_ssa_def *c)
 650 {
 651    assert(scalar->num_components == 1);
 652    assert(c->num_components == 1);
 653
 654    nir_src c_src = nir_src_for_ssa(c);
 655    if (nir_src_is_const(c_src)) {
 656       uint64_t c_const = nir_src_as_uint(c_src);
 657       if (c_const < vec->num_components)
 658          return nir_vector_insert_imm(b, vec, scalar, c_const);
 659       else
 660          return vec;
 661    } else {
 662       nir_const_value per_comp_idx_const[NIR_MAX_VEC_COMPONENTS];
 663       for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
 664          per_comp_idx_const[i] = nir_const_value_for_int(i, c->bit_size);
 665       nir_ssa_def *per_comp_idx =
 666          nir_build_imm(b, vec->num_components,
 667                        c->bit_size, per_comp_idx_const);
 668
 669       /* nir_builder will automatically splat out scalars to vectors so an
 670        * insert is as simple as "if I'm the channel, replace me with the
 671        * scalar."
 672        */
 673       return nir_bcsel(b, nir_ieq(b, c, per_comp_idx), scalar, vec);
 674    }
 675 }
 676
 677 static inline nir_ssa_def *
 678 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 679 {
 680    if (x->bit_size == dest_bit_size)
 681       return x;
 682
 683    switch (dest_bit_size) {
 684    case 64: return nir_i2i64(build, x);
 685    case 32: return nir_i2i32(build, x);
 686    case 16: return nir_i2i16(build, x);
 687    case 8:  return nir_i2i8(build, x);
 688    default: unreachable("Invalid bit size");
 689    }
 690 }
 691
 692 static inline nir_ssa_def *
 693 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 694 {
 695    if (x->bit_size == dest_bit_size)
 696       return x;
 697
 698    switch (dest_bit_size) {
 699    case 64: return nir_u2u64(build, x);
 700    case 32: return nir_u2u32(build, x);
 701    case 16: return nir_u2u16(build, x);
 702    case 8:  return nir_u2u8(build, x);
 703    default: unreachable("Invalid bit size");
 704    }
 705 }
 706
 707 static inline nir_ssa_def *
 708 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 709 {
 710    assert(x->bit_size <= 64);
 711    y &= BITFIELD64_MASK(x->bit_size);
 712
 713    if (y == 0) {
 714       return x;
 715    } else {
 716       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 717    }
 718 }
 719
 720 static inline nir_ssa_def *
 721 _nir_mul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y, bool amul)
 722 {
 723    assert(x->bit_size <= 64);
 724    y &= BITFIELD64_MASK(x->bit_size);
 725
 726    if (y == 0) {
 727       return nir_imm_intN_t(build, 0, x->bit_size);
 728    } else if (y == 1) {
 729       return x;
 730    } else if (!build->shader->options->lower_bitops &&
 731               util_is_power_of_two_or_zero64(y)) {
 732       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 733    } else if (amul) {
 734       return nir_amul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 735    } else {
 736       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 737    }
 738 }
 739
 740 static inline nir_ssa_def *
 741 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 742 {
 743    return _nir_mul_imm(build, x, y, false);
 744 }
 745
 746 static inline nir_ssa_def *
 747 nir_amul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 748 {
 749    return _nir_mul_imm(build, x, y, true);
 750 }
 751
 752 static inline nir_ssa_def *
 753 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 754 {
 755    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 756 }
 757
 758 static inline nir_ssa_def *
 759 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 760 {
 761    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 762 }
 763
 764 static inline nir_ssa_def *
 765 nir_iand_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 766 {
 767    assert(x->bit_size <= 64);
 768    y &= BITFIELD64_MASK(x->bit_size);
 769
 770    if (y == 0) {
 771       return nir_imm_intN_t(build, 0, x->bit_size);
 772    } else if (y == BITFIELD64_MASK(x->bit_size)) {
 773       return x;
 774    } else {
 775       return nir_iand(build, x, nir_imm_intN_t(build, y, x->bit_size));
 776    }
 777 }
 778
 779 static inline nir_ssa_def *
 780 nir_ishr_imm(nir_builder *build, nir_ssa_def *x, uint32_t y)
 781 {
 782    if (y == 0) {
 783       return x;
 784    } else {
 785       return nir_ishr(build, x, nir_imm_int(build, y));
 786    }
 787 }
 788
 789 static inline nir_ssa_def *
 790 nir_ushr_imm(nir_builder *build, nir_ssa_def *x, uint32_t y)
 791 {
 792    if (y == 0) {
 793       return x;
 794    } else {
 795       return nir_ushr(build, x, nir_imm_int(build, y));
 796    }
 797 }
 798
 799 static inline nir_ssa_def *
 800 nir_udiv_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 801 {
 802    assert(x->bit_size <= 64);
 803    y &= BITFIELD64_MASK(x->bit_size);
 804
 805    if (y == 1) {
 806       return x;
 807    } else if (util_is_power_of_two_nonzero(y)) {
 808       return nir_ushr_imm(build, x, ffsll(y) - 1);
 809    } else {
 810       return nir_udiv(build, x, nir_imm_intN_t(build, y, x->bit_size));
 811    }
 812 }
 813
 814 static inline nir_ssa_def *
 815 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 816 {
 817    assert(src->num_components * src->bit_size == dest_bit_size);
 818
 819    switch (dest_bit_size) {
 820    case 64:
 821       switch (src->bit_size) {
 822       case 32: return nir_pack_64_2x32(b, src);
 823       case 16: return nir_pack_64_4x16(b, src);
 824       default: break;
 825       }
 826       break;
 827
 828    case 32:
 829       if (src->bit_size == 16)
 830          return nir_pack_32_2x16(b, src);
 831       break;
 832
 833    default:
 834       break;
 835    }
 836
 837    /* If we got here, we have no dedicated unpack opcode. */
 838    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 839    for (unsigned i = 0; i < src->num_components; i++) {
 840       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 841       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 842       dest = nir_ior(b, dest, val);
 843    }
 844    return dest;
 845 }
 846
 847 static inline nir_ssa_def *
 848 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 849 {
 850    assert(src->num_components == 1);
 851    assert(src->bit_size > dest_bit_size);
 852    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 853    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 854
 855    switch (src->bit_size) {
 856    case 64:
 857       switch (dest_bit_size) {
 858       case 32: return nir_unpack_64_2x32(b, src);
 859       case 16: return nir_unpack_64_4x16(b, src);
 860       default: break;
 861       }
 862       break;
 863
 864    case 32:
 865       if (dest_bit_size == 16)
 866          return nir_unpack_32_2x16(b, src);
 867       break;
 868
 869    default:
 870       break;
 871    }
 872
 873    /* If we got here, we have no dedicated unpack opcode. */
 874    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 875    for (unsigned i = 0; i < dest_num_components; i++) {
 876       nir_ssa_def *val = nir_ushr_imm(b, src, i * dest_bit_size);
 877       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 878    }
 879    return nir_vec(b, dest_comps, dest_num_components);
 880 }
 881
 882 /**
 883  * Treats srcs as if it's one big blob of bits and extracts the range of bits
 884  * given by
 885  *
 886  *       [first_bit, first_bit + dest_num_components * dest_bit_size)
 887  *
 888  * The range can have any alignment or size as long as it's an integer number
 889  * of destination components and fits inside the concatenated sources.
 890  *
 891  * TODO: The one caveat here is that we can't handle byte alignment if 64-bit
 892  * values are involved because that would require pack/unpack to/from a vec8
 893  * which NIR currently does not support.
 894  */
 895 static inline nir_ssa_def *
 896 nir_extract_bits(nir_builder *b, nir_ssa_def **srcs, unsigned num_srcs,
 897                  unsigned first_bit,
 898                  unsigned dest_num_components, unsigned dest_bit_size)
 899 {
 900    const unsigned num_bits = dest_num_components * dest_bit_size;
 901
 902    /* Figure out the common bit size */
 903    unsigned common_bit_size = dest_bit_size;
 904    for (unsigned i = 0; i < num_srcs; i++)
 905       common_bit_size = MIN2(common_bit_size, srcs[i]->bit_size);
 906    if (first_bit > 0)
 907       common_bit_size = MIN2(common_bit_size, (1u << (ffs(first_bit) - 1)));
 908
 909    /* We don't want to have to deal with 1-bit values */
 910    assert(common_bit_size >= 8);
 911
 912    nir_ssa_def *common_comps[NIR_MAX_VEC_COMPONENTS * sizeof(uint64_t)];
 913    assert(num_bits / common_bit_size <= ARRAY_SIZE(common_comps));
 914
 915    /* First, unpack to the common bit size and select the components from the
 916     * source.
 917     */
 918    int src_idx = -1;
 919    unsigned src_start_bit = 0;
 920    unsigned src_end_bit = 0;
 921    for (unsigned i = 0; i < num_bits / common_bit_size; i++) {
 922       const unsigned bit = first_bit + (i * common_bit_size);
 923       while (bit >= src_end_bit) {
 924          src_idx++;
 925          assert(src_idx < (int) num_srcs);
 926          src_start_bit = src_end_bit;
 927          src_end_bit += srcs[src_idx]->bit_size *
 928                         srcs[src_idx]->num_components;
 929       }
 930       assert(bit >= src_start_bit);
 931       assert(bit + common_bit_size <= src_end_bit);
 932       const unsigned rel_bit = bit - src_start_bit;
 933       const unsigned src_bit_size = srcs[src_idx]->bit_size;
 934
 935       nir_ssa_def *comp = nir_channel(b, srcs[src_idx],
 936                                       rel_bit / src_bit_size);
 937       if (srcs[src_idx]->bit_size > common_bit_size) {
 938          nir_ssa_def *unpacked = nir_unpack_bits(b, comp, common_bit_size);
 939          comp = nir_channel(b, unpacked, (rel_bit % src_bit_size) /
 940                                          common_bit_size);
 941       }
 942       common_comps[i] = comp;
 943    }
 944
 945    /* Now, re-pack the destination if we have to */
 946    if (dest_bit_size > common_bit_size) {
 947       unsigned common_per_dest = dest_bit_size / common_bit_size;
 948       nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 949       for (unsigned i = 0; i < dest_num_components; i++) {
 950          nir_ssa_def *unpacked = nir_vec(b, common_comps + i * common_per_dest,
 951                                          common_per_dest);
 952          dest_comps[i] = nir_pack_bits(b, unpacked, dest_bit_size);
 953       }
 954       return nir_vec(b, dest_comps, dest_num_components);
 955    } else {
 956       assert(dest_bit_size == common_bit_size);
 957       return nir_vec(b, common_comps, dest_num_components);
 958    }
 959 }
 960
 961 static inline nir_ssa_def *
 962 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 963 {
 964    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 965    const unsigned dest_num_components =
 966       (src->bit_size * src->num_components) / dest_bit_size;
 967    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 968
 969    return nir_extract_bits(b, &src, 1, 0, dest_num_components, dest_bit_size);
 970 }
 971
 972 /**
 973  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 974  * nir_build_alu()-based builder calls.
 975  *
 976  * See nir_ssa_for_alu_src() for alu instructions.
 977  */
 978 static inline nir_ssa_def *
 979 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 980 {
 981    if (src.is_ssa && src.ssa->num_components == num_components)
 982       return src.ssa;
 983
 984    nir_alu_src alu = { NIR_SRC_INIT };
 985    alu.src = src;
 986    for (int j = 0; j < 4; j++)
 987       alu.swizzle[j] = j;
 988
 989    return nir_mov_alu(build, alu, num_components);
 990 }
 991
 992 /**
 993  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 994  * nir_alu_src's swizzle.
 995  */
 996 static inline nir_ssa_def *
 997 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 998 {
 999    static uint8_t trivial_swizzle[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
1000    STATIC_ASSERT(ARRAY_SIZE(trivial_swizzle) == NIR_MAX_VEC_COMPONENTS);
1001
1002    nir_alu_src *src = &instr->src[srcn];
1003    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
1004
1005    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
1006        !src->abs && !src->negate &&
1007        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
1008       return src->src.ssa;
1009
1010    return nir_mov_alu(build, *src, num_components);
1011 }
1012
1013 static inline unsigned
1014 nir_get_ptr_bitsize(nir_shader *shader)
1015 {
1016    if (shader->info.stage == MESA_SHADER_KERNEL)
1017       return shader->info.cs.ptr_size;
1018    return 32;
1019 }
1020
1021 static inline nir_deref_instr *
1022 nir_build_deref_var(nir_builder *build, nir_variable *var)
1023 {
1024    nir_deref_instr *deref =
1025       nir_deref_instr_create(build->shader, nir_deref_type_var);
1026
1027    deref->mode = (nir_variable_mode)var->data.mode;
1028    deref->type = var->type;
1029    deref->var = var;
1030
1031    nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
1032                      nir_get_ptr_bitsize(build->shader), NULL);
1033
1034    nir_builder_instr_insert(build, &deref->instr);
1035
1036    return deref;
1037 }
1038
1039 static inline nir_deref_instr *
1040 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
1041                       nir_ssa_def *index)
1042 {
1043    assert(glsl_type_is_array(parent->type) ||
1044           glsl_type_is_matrix(parent->type) ||
1045           glsl_type_is_vector(parent->type));
1046
1047    assert(index->bit_size == parent->dest.ssa.bit_size);
1048
1049    nir_deref_instr *deref =
1050       nir_deref_instr_create(build->shader, nir_deref_type_array);
1051
1052    deref->mode = parent->mode;
1053    deref->type = glsl_get_array_element(parent->type);
1054    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1055    deref->arr.index = nir_src_for_ssa(index);
1056
1057    nir_ssa_dest_init(&deref->instr, &deref->dest,
1058                      parent->dest.ssa.num_components,
1059                      parent->dest.ssa.bit_size, NULL);
1060
1061    nir_builder_instr_insert(build, &deref->instr);
1062
1063    return deref;
1064 }
1065
1066 static inline nir_deref_instr *
1067 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
1068                           int64_t index)
1069 {
1070    assert(parent->dest.is_ssa);
1071    nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
1072                                          parent->dest.ssa.bit_size);
1073
1074    return nir_build_deref_array(build, parent, idx_ssa);
1075 }
1076
1077 static inline nir_deref_instr *
1078 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
1079                              nir_ssa_def *index)
1080 {
1081    assert(parent->deref_type == nir_deref_type_array ||
1082           parent->deref_type == nir_deref_type_ptr_as_array ||
1083           parent->deref_type == nir_deref_type_cast);
1084
1085    assert(index->bit_size == parent->dest.ssa.bit_size);
1086
1087    nir_deref_instr *deref =
1088       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
1089
1090    deref->mode = parent->mode;
1091    deref->type = parent->type;
1092    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1093    deref->arr.index = nir_src_for_ssa(index);
1094
1095    nir_ssa_dest_init(&deref->instr, &deref->dest,
1096                      parent->dest.ssa.num_components,
1097                      parent->dest.ssa.bit_size, NULL);
1098
1099    nir_builder_instr_insert(build, &deref->instr);
1100
1101    return deref;
1102 }
1103
1104 static inline nir_deref_instr *
1105 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
1106 {
1107    assert(glsl_type_is_array(parent->type) ||
1108           glsl_type_is_matrix(parent->type));
1109
1110    nir_deref_instr *deref =
1111       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
1112
1113    deref->mode = parent->mode;
1114    deref->type = glsl_get_array_element(parent->type);
1115    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1116
1117    nir_ssa_dest_init(&deref->instr, &deref->dest,
1118                      parent->dest.ssa.num_components,
1119                      parent->dest.ssa.bit_size, NULL);
1120
1121    nir_builder_instr_insert(build, &deref->instr);
1122
1123    return deref;
1124 }
1125
1126 static inline nir_deref_instr *
1127 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
1128                        unsigned index)
1129 {
1130    assert(glsl_type_is_struct_or_ifc(parent->type));
1131
1132    nir_deref_instr *deref =
1133       nir_deref_instr_create(build->shader, nir_deref_type_struct);
1134
1135    deref->mode = parent->mode;
1136    deref->type = glsl_get_struct_field(parent->type, index);
1137    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1138    deref->strct.index = index;
1139
1140    nir_ssa_dest_init(&deref->instr, &deref->dest,
1141                      parent->dest.ssa.num_components,
1142                      parent->dest.ssa.bit_size, NULL);
1143
1144    nir_builder_instr_insert(build, &deref->instr);
1145
1146    return deref;
1147 }
1148
1149 static inline nir_deref_instr *
1150 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
1151                      nir_variable_mode mode, const struct glsl_type *type,
1152                      unsigned ptr_stride)
1153 {
1154    nir_deref_instr *deref =
1155       nir_deref_instr_create(build->shader, nir_deref_type_cast);
1156
1157    deref->mode = mode;
1158    deref->type = type;
1159    deref->parent = nir_src_for_ssa(parent);
1160    deref->cast.ptr_stride = ptr_stride;
1161
1162    nir_ssa_dest_init(&deref->instr, &deref->dest,
1163                      parent->num_components, parent->bit_size, NULL);
1164
1165    nir_builder_instr_insert(build, &deref->instr);
1166
1167    return deref;
1168 }
1169
1170 /** Returns a deref that follows another but starting from the given parent
1171  *
1172  * The new deref will be the same type and take the same array or struct index
1173  * as the leader deref but it may have a different parent.  This is very
1174  * useful for walking deref paths.
1175  */
1176 static inline nir_deref_instr *
1177 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1178                          nir_deref_instr *leader)
1179 {
1180    /* If the derefs would have the same parent, don't make a new one */
1181    assert(leader->parent.is_ssa);
1182    if (leader->parent.ssa == &parent->dest.ssa)
1183       return leader;
1184
1185    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1186
1187    switch (leader->deref_type) {
1188    case nir_deref_type_var:
1189       unreachable("A var dereference cannot have a parent");
1190       break;
1191
1192    case nir_deref_type_array:
1193    case nir_deref_type_array_wildcard:
1194       assert(glsl_type_is_matrix(parent->type) ||
1195              glsl_type_is_array(parent->type) ||
1196              (leader->deref_type == nir_deref_type_array &&
1197               glsl_type_is_vector(parent->type)));
1198       assert(glsl_get_length(parent->type) ==
1199              glsl_get_length(leader_parent->type));
1200
1201       if (leader->deref_type == nir_deref_type_array) {
1202          assert(leader->arr.index.is_ssa);
1203          nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1204                                          parent->dest.ssa.bit_size);
1205          return nir_build_deref_array(b, parent, index);
1206       } else {
1207          return nir_build_deref_array_wildcard(b, parent);
1208       }
1209
1210    case nir_deref_type_struct:
1211       assert(glsl_type_is_struct_or_ifc(parent->type));
1212       assert(glsl_get_length(parent->type) ==
1213              glsl_get_length(leader_parent->type));
1214
1215       return nir_build_deref_struct(b, parent, leader->strct.index);
1216
1217    default:
1218       unreachable("Invalid deref instruction type");
1219    }
1220 }
1221
1222 static inline nir_ssa_def *
1223 nir_load_reg(nir_builder *build, nir_register *reg)
1224 {
1225    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1226 }
1227
1228 static inline void
1229 nir_store_reg(nir_builder *build, nir_register *reg,
1230               nir_ssa_def *def, nir_component_mask_t write_mask)
1231 {
1232    assert(reg->num_components == def->num_components);
1233    assert(reg->bit_size == def->bit_size);
1234
1235    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
1236    mov->src[0].src = nir_src_for_ssa(def);
1237    mov->dest.dest = nir_dest_for_reg(reg);
1238    mov->dest.write_mask = write_mask & BITFIELD_MASK(reg->num_components);
1239    nir_builder_instr_insert(build, &mov->instr);
1240 }
1241
1242 static inline nir_ssa_def *
1243 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1244                            enum gl_access_qualifier access)
1245 {
1246    nir_intrinsic_instr *load =
1247       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1248    load->num_components = glsl_get_vector_elements(deref->type);
1249    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1250    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1251                      glsl_get_bit_size(deref->type), NULL);
1252    nir_intrinsic_set_access(load, access);
1253    nir_builder_instr_insert(build, &load->instr);
1254    return &load->dest.ssa;
1255 }
1256
1257 static inline nir_ssa_def *
1258 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1259 {
1260    return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1261 }
1262
1263 static inline void
1264 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1265                             nir_ssa_def *value, unsigned writemask,
1266                             enum gl_access_qualifier access)
1267 {
1268    nir_intrinsic_instr *store =
1269       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1270    store->num_components = glsl_get_vector_elements(deref->type);
1271    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1272    store->src[1] = nir_src_for_ssa(value);
1273    nir_intrinsic_set_write_mask(store,
1274                                 writemask & ((1 << store->num_components) - 1));
1275    nir_intrinsic_set_access(store, access);
1276    nir_builder_instr_insert(build, &store->instr);
1277 }
1278
1279 static inline void
1280 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1281                 nir_ssa_def *value, unsigned writemask)
1282 {
1283    nir_store_deref_with_access(build, deref, value, writemask,
1284                                (enum gl_access_qualifier)0);
1285 }
1286
1287 static inline void
1288 nir_copy_deref_with_access(nir_builder *build, nir_deref_instr *dest,
1289                            nir_deref_instr *src,
1290                            enum gl_access_qualifier dest_access,
1291                            enum gl_access_qualifier src_access)
1292 {
1293    nir_intrinsic_instr *copy =
1294       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1295    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1296    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1297    nir_intrinsic_set_dst_access(copy, dest_access);
1298    nir_intrinsic_set_src_access(copy, src_access);
1299    nir_builder_instr_insert(build, &copy->instr);
1300 }
1301
1302 static inline void
1303 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1304 {
1305    nir_copy_deref_with_access(build, dest, src,
1306                               (enum gl_access_qualifier) 0,
1307                               (enum gl_access_qualifier) 0);
1308 }
1309
1310 static inline nir_ssa_def *
1311 nir_load_var(nir_builder *build, nir_variable *var)
1312 {
1313    return nir_load_deref(build, nir_build_deref_var(build, var));
1314 }
1315
1316 static inline void
1317 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1318               unsigned writemask)
1319 {
1320    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1321 }
1322
1323 static inline void
1324 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1325 {
1326    nir_copy_deref(build, nir_build_deref_var(build, dest),
1327                          nir_build_deref_var(build, src));
1328 }
1329
1330 static inline nir_ssa_def *
1331 nir_load_param(nir_builder *build, uint32_t param_idx)
1332 {
1333    assert(param_idx < build->impl->function->num_params);
1334    nir_parameter *param = &build->impl->function->params[param_idx];
1335
1336    nir_intrinsic_instr *load =
1337       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1338    nir_intrinsic_set_param_idx(load, param_idx);
1339    load->num_components = param->num_components;
1340    nir_ssa_dest_init(&load->instr, &load->dest,
1341                      param->num_components, param->bit_size, NULL);
1342    nir_builder_instr_insert(build, &load->instr);
1343    return &load->dest.ssa;
1344 }
1345
1346 #include "nir_builder_opcodes.h"
1347
1348 static inline nir_ssa_def *
1349 nir_f2b(nir_builder *build, nir_ssa_def *f)
1350 {
1351    return nir_f2b1(build, f);
1352 }
1353
1354 static inline nir_ssa_def *
1355 nir_i2b(nir_builder *build, nir_ssa_def *i)
1356 {
1357    return nir_i2b1(build, i);
1358 }
1359
1360 static inline nir_ssa_def *
1361 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1362 {
1363    switch (bit_size) {
1364    case 64: return nir_b2f64(build, b);
1365    case 32: return nir_b2f32(build, b);
1366    case 16: return nir_b2f16(build, b);
1367    default:
1368       unreachable("Invalid bit-size");
1369    };
1370 }
1371
1372 static inline nir_ssa_def *
1373 nir_b2i(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1374 {
1375    switch (bit_size) {
1376    case 64: return nir_b2i64(build, b);
1377    case 32: return nir_b2i32(build, b);
1378    case 16: return nir_b2i16(build, b);
1379    case 8:  return nir_b2i8(build, b);
1380    default:
1381       unreachable("Invalid bit-size");
1382    };
1383 }
1384 static inline nir_ssa_def *
1385 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1386                      unsigned interp_mode)
1387 {
1388    unsigned num_components = op == nir_intrinsic_load_barycentric_model ? 3 : 2;
1389    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1390    nir_ssa_dest_init(&bary->instr, &bary->dest, num_components, 32, NULL);
1391    nir_intrinsic_set_interp_mode(bary, interp_mode);
1392    nir_builder_instr_insert(build, &bary->instr);
1393    return &bary->dest.ssa;
1394 }
1395
1396 static inline void
1397 nir_jump(nir_builder *build, nir_jump_type jump_type)
1398 {
1399    assert(jump_type != nir_jump_goto && jump_type != nir_jump_goto_if);
1400    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1401    nir_builder_instr_insert(build, &jump->instr);
1402 }
1403
1404 static inline void
1405 nir_goto(nir_builder *build, struct nir_block *target)
1406 {
1407    assert(!build->impl->structured);
1408    nir_jump_instr *jump = nir_jump_instr_create(build->shader, nir_jump_goto);
1409    jump->target = target;
1410    nir_builder_instr_insert(build, &jump->instr);
1411 }
1412
1413 static inline void
1414 nir_goto_if(nir_builder *build, struct nir_block *target, nir_src cond,
1415             struct nir_block *else_target)
1416 {
1417    assert(!build->impl->structured);
1418    nir_jump_instr *jump = nir_jump_instr_create(build->shader, nir_jump_goto_if);
1419    jump->condition = cond;
1420    jump->target = target;
1421    jump->else_target = else_target;
1422    nir_builder_instr_insert(build, &jump->instr);
1423 }
1424
1425 static inline nir_ssa_def *
1426 nir_compare_func(nir_builder *b, enum compare_func func,
1427                  nir_ssa_def *src0, nir_ssa_def *src1)
1428 {
1429    switch (func) {
1430    case COMPARE_FUNC_NEVER:
1431       return nir_imm_int(b, 0);
1432    case COMPARE_FUNC_ALWAYS:
1433       return nir_imm_int(b, ~0);
1434    case COMPARE_FUNC_EQUAL:
1435       return nir_feq(b, src0, src1);
1436    case COMPARE_FUNC_NOTEQUAL:
1437       return nir_fneu(b, src0, src1);
1438    case COMPARE_FUNC_GREATER:
1439       return nir_flt(b, src1, src0);
1440    case COMPARE_FUNC_GEQUAL:
1441       return nir_fge(b, src0, src1);
1442    case COMPARE_FUNC_LESS:
1443       return nir_flt(b, src0, src1);
1444    case COMPARE_FUNC_LEQUAL:
1445       return nir_fge(b, src1, src0);
1446    }
1447    unreachable("bad compare func");
1448 }
1449
1450 static inline void
1451 nir_scoped_barrier(nir_builder *b,
1452                    nir_scope exec_scope,
1453                    nir_scope mem_scope,
1454                    nir_memory_semantics mem_semantics,
1455                    nir_variable_mode mem_modes)
1456 {
1457    nir_intrinsic_instr *intrin =
1458       nir_intrinsic_instr_create(b->shader, nir_intrinsic_scoped_barrier);
1459    nir_intrinsic_set_execution_scope(intrin, exec_scope);
1460    nir_intrinsic_set_memory_scope(intrin, mem_scope);
1461    nir_intrinsic_set_memory_semantics(intrin, mem_semantics);
1462    nir_intrinsic_set_memory_modes(intrin, mem_modes);
1463    nir_builder_instr_insert(b, &intrin->instr);
1464 }
1465
1466 static inline void
1467 nir_scoped_memory_barrier(nir_builder *b,
1468                           nir_scope scope,
1469                           nir_memory_semantics semantics,
1470                           nir_variable_mode modes)
1471 {
1472    nir_scoped_barrier(b, NIR_SCOPE_NONE, scope, semantics, modes);
1473 }
1474
1475 static inline nir_ssa_def *
1476 nir_convert_to_bit_size(nir_builder *b,
1477                     nir_ssa_def *src,
1478                     nir_alu_type type,
1479                     unsigned bit_size)
1480 {
1481    nir_alu_type base_type = nir_alu_type_get_base_type(type);
1482    nir_alu_type dst_type = (nir_alu_type)(bit_size | base_type);
1483
1484    nir_op opcode =
1485       nir_type_conversion_op(type, dst_type, nir_rounding_mode_undef);
1486
1487    return nir_build_alu(b, opcode, src, NULL, NULL, NULL);
1488 }
1489
1490 static inline nir_ssa_def *
1491 nir_i2iN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1492 {
1493    return nir_convert_to_bit_size(b, src, nir_type_int, bit_size);
1494 }
1495
1496 static inline nir_ssa_def *
1497 nir_u2uN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1498 {
1499    return nir_convert_to_bit_size(b, src, nir_type_uint, bit_size);
1500 }
1501
1502 static inline nir_ssa_def *
1503 nir_b2bN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1504 {
1505    return nir_convert_to_bit_size(b, src, nir_type_bool, bit_size);
1506 }
1507
1508 static inline nir_ssa_def *
1509 nir_f2fN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1510 {
1511    return nir_convert_to_bit_size(b, src, nir_type_float, bit_size);
1512 }
1513
1514 #endif /* NIR_BUILDER_H */