src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = nir_src_for_ssa(condition);
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_else(nir_builder *build, nir_if *nif)
 110 {
 111    if (nif) {
 112       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 113    } else {
 114       nir_block *block = nir_cursor_current_block(build->cursor);
 115       nif = nir_cf_node_as_if(block->cf_node.parent);
 116    }
 117    build->cursor = nir_before_cf_list(&nif->else_list);
 118    return nif;
 119 }
 120
 121 static inline void
 122 nir_pop_if(nir_builder *build, nir_if *nif)
 123 {
 124    if (nif) {
 125       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 126    } else {
 127       nir_block *block = nir_cursor_current_block(build->cursor);
 128       nif = nir_cf_node_as_if(block->cf_node.parent);
 129    }
 130    build->cursor = nir_after_cf_node(&nif->cf_node);
 131 }
 132
 133 static inline nir_ssa_def *
 134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 135 {
 136    nir_block *block = nir_cursor_current_block(build->cursor);
 137    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 138
 139    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 140
 141    nir_phi_src *src = ralloc(phi, nir_phi_src);
 142    src->pred = nir_if_last_then_block(nif);
 143    src->src = nir_src_for_ssa(then_def);
 144    exec_list_push_tail(&phi->srcs, &src->node);
 145
 146    src = ralloc(phi, nir_phi_src);
 147    src->pred = nir_if_last_else_block(nif);
 148    src->src = nir_src_for_ssa(else_def);
 149    exec_list_push_tail(&phi->srcs, &src->node);
 150
 151    assert(then_def->num_components == else_def->num_components);
 152    assert(then_def->bit_size == else_def->bit_size);
 153    nir_ssa_dest_init(&phi->instr, &phi->dest,
 154                      then_def->num_components, then_def->bit_size, NULL);
 155
 156    nir_builder_instr_insert(build, &phi->instr);
 157
 158    return &phi->dest.ssa;
 159 }
 160
 161 static inline nir_loop *
 162 nir_push_loop(nir_builder *build)
 163 {
 164    nir_loop *loop = nir_loop_create(build->shader);
 165    nir_builder_cf_insert(build, &loop->cf_node);
 166    build->cursor = nir_before_cf_list(&loop->body);
 167    return loop;
 168 }
 169
 170 static inline void
 171 nir_pop_loop(nir_builder *build, nir_loop *loop)
 172 {
 173    if (loop) {
 174       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 175    } else {
 176       nir_block *block = nir_cursor_current_block(build->cursor);
 177       loop = nir_cf_node_as_loop(block->cf_node.parent);
 178    }
 179    build->cursor = nir_after_cf_node(&loop->cf_node);
 180 }
 181
 182 static inline nir_ssa_def *
 183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 184 {
 185    nir_ssa_undef_instr *undef =
 186       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 187    if (!undef)
 188       return NULL;
 189
 190    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 191
 192    return &undef->def;
 193 }
 194
 195 static inline nir_ssa_def *
 196 nir_build_imm(nir_builder *build, unsigned num_components,
 197               unsigned bit_size, nir_const_value value)
 198 {
 199    nir_load_const_instr *load_const =
 200       nir_load_const_instr_create(build->shader, num_components, bit_size);
 201    if (!load_const)
 202       return NULL;
 203
 204    load_const->value = value;
 205
 206    nir_builder_instr_insert(build, &load_const->instr);
 207
 208    return &load_const->def;
 209 }
 210
 211 static inline nir_ssa_def *
 212 nir_imm_bool(nir_builder *build, bool x)
 213 {
 214    nir_const_value v;
 215
 216    memset(&v, 0, sizeof(v));
 217    v.b[0] = x;
 218
 219    return nir_build_imm(build, 1, 1, v);
 220 }
 221
 222 static inline nir_ssa_def *
 223 nir_imm_true(nir_builder *build)
 224 {
 225    return nir_imm_bool(build, true);
 226 }
 227
 228 static inline nir_ssa_def *
 229 nir_imm_false(nir_builder *build)
 230 {
 231    return nir_imm_bool(build, false);
 232 }
 233
 234 static inline nir_ssa_def *
 235 nir_imm_float16(nir_builder *build, float x)
 236 {
 237    nir_const_value v;
 238
 239    memset(&v, 0, sizeof(v));
 240    v.u16[0] = _mesa_float_to_half(x);
 241
 242    return nir_build_imm(build, 1, 16, v);
 243 }
 244
 245 static inline nir_ssa_def *
 246 nir_imm_float(nir_builder *build, float x)
 247 {
 248    nir_const_value v;
 249
 250    memset(&v, 0, sizeof(v));
 251    v.f32[0] = x;
 252
 253    return nir_build_imm(build, 1, 32, v);
 254 }
 255
 256 static inline nir_ssa_def *
 257 nir_imm_double(nir_builder *build, double x)
 258 {
 259    nir_const_value v;
 260
 261    memset(&v, 0, sizeof(v));
 262    v.f64[0] = x;
 263
 264    return nir_build_imm(build, 1, 64, v);
 265 }
 266
 267 static inline nir_ssa_def *
 268 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 269 {
 270    switch (bit_size) {
 271    case 16:
 272       return nir_imm_float16(build, x);
 273    case 32:
 274       return nir_imm_float(build, x);
 275    case 64:
 276       return nir_imm_double(build, x);
 277    }
 278
 279    unreachable("unknown float immediate bit size");
 280 }
 281
 282 static inline nir_ssa_def *
 283 nir_imm_vec2(nir_builder *build, float x, float y)
 284 {
 285    nir_const_value v;
 286
 287    memset(&v, 0, sizeof(v));
 288    v.f32[0] = x;
 289    v.f32[1] = y;
 290
 291    return nir_build_imm(build, 2, 32, v);
 292 }
 293
 294 static inline nir_ssa_def *
 295 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 296 {
 297    nir_const_value v;
 298
 299    memset(&v, 0, sizeof(v));
 300    v.f32[0] = x;
 301    v.f32[1] = y;
 302    v.f32[2] = z;
 303    v.f32[3] = w;
 304
 305    return nir_build_imm(build, 4, 32, v);
 306 }
 307
 308 static inline nir_ssa_def *
 309 nir_imm_ivec2(nir_builder *build, int x, int y)
 310 {
 311    nir_const_value v;
 312
 313    memset(&v, 0, sizeof(v));
 314    v.i32[0] = x;
 315    v.i32[1] = y;
 316
 317    return nir_build_imm(build, 2, 32, v);
 318 }
 319
 320 static inline nir_ssa_def *
 321 nir_imm_int(nir_builder *build, int x)
 322 {
 323    nir_const_value v;
 324
 325    memset(&v, 0, sizeof(v));
 326    v.i32[0] = x;
 327
 328    return nir_build_imm(build, 1, 32, v);
 329 }
 330
 331 static inline nir_ssa_def *
 332 nir_imm_int64(nir_builder *build, int64_t x)
 333 {
 334    nir_const_value v;
 335
 336    memset(&v, 0, sizeof(v));
 337    v.i64[0] = x;
 338
 339    return nir_build_imm(build, 1, 64, v);
 340 }
 341
 342 static inline nir_ssa_def *
 343 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 344 {
 345    nir_const_value v;
 346
 347    memset(&v, 0, sizeof(v));
 348    assert(bit_size <= 64);
 349    if (bit_size == 1)
 350       v.b[0] = x & 1;
 351    else
 352       v.i64[0] = x & (~0ull >> (64 - bit_size));
 353
 354    return nir_build_imm(build, 1, bit_size, v);
 355 }
 356
 357 static inline nir_ssa_def *
 358 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 359 {
 360    nir_const_value v;
 361
 362    memset(&v, 0, sizeof(v));
 363    v.i32[0] = x;
 364    v.i32[1] = y;
 365    v.i32[2] = z;
 366    v.i32[3] = w;
 367
 368    return nir_build_imm(build, 4, 32, v);
 369 }
 370
 371 static inline nir_ssa_def *
 372 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 373 {
 374    /* We use a 0/-1 convention for all booleans regardless of size */
 375    return nir_imm_intN_t(build, -(int)x, bit_size);
 376 }
 377
 378 static inline nir_ssa_def *
 379 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 380               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 381 {
 382    const nir_op_info *op_info = &nir_op_infos[op];
 383    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 384    if (!instr)
 385       return NULL;
 386
 387    instr->exact = build->exact;
 388
 389    instr->src[0].src = nir_src_for_ssa(src0);
 390    if (src1)
 391       instr->src[1].src = nir_src_for_ssa(src1);
 392    if (src2)
 393       instr->src[2].src = nir_src_for_ssa(src2);
 394    if (src3)
 395       instr->src[3].src = nir_src_for_ssa(src3);
 396
 397    /* Guess the number of components the destination temporary should have
 398     * based on our input sizes, if it's not fixed for the op.
 399     */
 400    unsigned num_components = op_info->output_size;
 401    if (num_components == 0) {
 402       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 403          if (op_info->input_sizes[i] == 0)
 404             num_components = MAX2(num_components,
 405                                   instr->src[i].src.ssa->num_components);
 406       }
 407    }
 408    assert(num_components != 0);
 409
 410    /* Figure out the bitwidth based on the source bitwidth if the instruction
 411     * is variable-width.
 412     */
 413    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 414    if (bit_size == 0) {
 415       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 416          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 417          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 418             if (bit_size)
 419                assert(src_bit_size == bit_size);
 420             else
 421                bit_size = src_bit_size;
 422          } else {
 423             assert(src_bit_size ==
 424                nir_alu_type_get_type_size(op_info->input_types[i]));
 425          }
 426       }
 427    }
 428
 429    /* When in doubt, assume 32. */
 430    if (bit_size == 0)
 431       bit_size = 32;
 432
 433    /* Make sure we don't swizzle from outside of our source vector (like if a
 434     * scalar value was passed into a multiply with a vector).
 435     */
 436    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 437       for (unsigned j = instr->src[i].src.ssa->num_components;
 438            j < NIR_MAX_VEC_COMPONENTS; j++) {
 439          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 440       }
 441    }
 442
 443    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 444                      bit_size, NULL);
 445    instr->dest.write_mask = (1 << num_components) - 1;
 446
 447    nir_builder_instr_insert(build, &instr->instr);
 448
 449    return &instr->dest.dest.ssa;
 450 }
 451
 452 #include "nir_builder_opcodes.h"
 453
 454 static inline nir_ssa_def *
 455 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 456 {
 457    switch (num_components) {
 458    case 4:
 459       return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
 460    case 3:
 461       return nir_vec3(build, comp[0], comp[1], comp[2]);
 462    case 2:
 463       return nir_vec2(build, comp[0], comp[1]);
 464    case 1:
 465       return comp[0];
 466    default:
 467       unreachable("bad component count");
 468       return NULL;
 469    }
 470 }
 471
 472 /**
 473  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 474  */
 475 static inline nir_ssa_def *
 476 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 477 {
 478    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 479    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 480                      nir_src_bit_size(src.src), NULL);
 481    mov->exact = build->exact;
 482    mov->dest.write_mask = (1 << num_components) - 1;
 483    mov->src[0] = src;
 484    nir_builder_instr_insert(build, &mov->instr);
 485
 486    return &mov->dest.dest.ssa;
 487 }
 488
 489 static inline nir_ssa_def *
 490 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 491 {
 492    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 493    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 494                      nir_src_bit_size(src.src), NULL);
 495    mov->exact = build->exact;
 496    mov->dest.write_mask = (1 << num_components) - 1;
 497    mov->src[0] = src;
 498    nir_builder_instr_insert(build, &mov->instr);
 499
 500    return &mov->dest.dest.ssa;
 501 }
 502
 503 /**
 504  * Construct an fmov or imov that reswizzles the source's components.
 505  */
 506 static inline nir_ssa_def *
 507 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 508             unsigned num_components, bool use_fmov)
 509 {
 510    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 511    nir_alu_src alu_src = { NIR_SRC_INIT };
 512    alu_src.src = nir_src_for_ssa(src);
 513
 514    bool is_identity_swizzle = true;
 515    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 516       if (swiz[i] != i)
 517          is_identity_swizzle = false;
 518       alu_src.swizzle[i] = swiz[i];
 519    }
 520
 521    if (num_components == src->num_components && is_identity_swizzle)
 522       return src;
 523
 524    return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
 525                      nir_imov_alu(build, alu_src, num_components);
 526 }
 527
 528 /* Selects the right fdot given the number of components in each source. */
 529 static inline nir_ssa_def *
 530 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 531 {
 532    assert(src0->num_components == src1->num_components);
 533    switch (src0->num_components) {
 534    case 1: return nir_fmul(build, src0, src1);
 535    case 2: return nir_fdot2(build, src0, src1);
 536    case 3: return nir_fdot3(build, src0, src1);
 537    case 4: return nir_fdot4(build, src0, src1);
 538    default:
 539       unreachable("bad component size");
 540    }
 541
 542    return NULL;
 543 }
 544
 545 static inline nir_ssa_def *
 546 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 547 {
 548    switch (src0->num_components) {
 549    case 1: return nir_ine(b, src0, src1);
 550    case 2: return nir_bany_inequal2(b, src0, src1);
 551    case 3: return nir_bany_inequal3(b, src0, src1);
 552    case 4: return nir_bany_inequal4(b, src0, src1);
 553    default:
 554       unreachable("bad component size");
 555    }
 556 }
 557
 558 static inline nir_ssa_def *
 559 nir_bany(nir_builder *b, nir_ssa_def *src)
 560 {
 561    return nir_bany_inequal(b, src, nir_imm_false(b));
 562 }
 563
 564 static inline nir_ssa_def *
 565 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 566 {
 567    return nir_swizzle(b, def, &c, 1, false);
 568 }
 569
 570 static inline nir_ssa_def *
 571 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 572 {
 573    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 574
 575    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 576       if ((mask & (1 << i)) == 0)
 577          continue;
 578       swizzle[num_channels++] = i;
 579    }
 580
 581    return nir_swizzle(b, def, swizzle, num_channels, false);
 582 }
 583
 584 static inline nir_ssa_def *
 585 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
 586                            unsigned start, unsigned end)
 587 {
 588    if (start == end - 1) {
 589       return nir_channel(b, vec, start);
 590    } else {
 591       unsigned mid = start + (end - start) / 2;
 592       return nir_bcsel(b, nir_ilt(b, c, nir_imm_int(b, mid)),
 593                        _nir_vector_extract_helper(b, vec, c, start, mid),
 594                        _nir_vector_extract_helper(b, vec, c, mid, end));
 595    }
 596 }
 597
 598 static inline nir_ssa_def *
 599 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
 600 {
 601    nir_src c_src = nir_src_for_ssa(c);
 602    if (nir_src_is_const(c_src)) {
 603       unsigned c_const = nir_src_as_uint(c_src);
 604       if (c_const < vec->num_components)
 605          return nir_channel(b, vec, c_const);
 606       else
 607          return nir_ssa_undef(b, 1, vec->bit_size);
 608    } else {
 609       return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
 610    }
 611 }
 612
 613 static inline nir_ssa_def *
 614 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 615 {
 616    if (x->bit_size == dest_bit_size)
 617       return x;
 618
 619    switch (dest_bit_size) {
 620    case 64: return nir_i2i64(build, x);
 621    case 32: return nir_i2i32(build, x);
 622    case 16: return nir_i2i16(build, x);
 623    case 8:  return nir_i2i8(build, x);
 624    default: unreachable("Invalid bit size");
 625    }
 626 }
 627
 628 static inline nir_ssa_def *
 629 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 630 {
 631    if (x->bit_size == dest_bit_size)
 632       return x;
 633
 634    switch (dest_bit_size) {
 635    case 64: return nir_u2u64(build, x);
 636    case 32: return nir_u2u32(build, x);
 637    case 16: return nir_u2u16(build, x);
 638    case 8:  return nir_u2u8(build, x);
 639    default: unreachable("Invalid bit size");
 640    }
 641 }
 642
 643 static inline nir_ssa_def *
 644 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 645 {
 646    assert(x->bit_size <= 64);
 647    if (x->bit_size < 64)
 648       y &= (1ull << x->bit_size) - 1;
 649
 650    if (y == 0) {
 651       return x;
 652    } else {
 653       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 654    }
 655 }
 656
 657 static inline nir_ssa_def *
 658 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 659 {
 660    assert(x->bit_size <= 64);
 661    if (x->bit_size < 64)
 662       y &= (1ull << x->bit_size) - 1;
 663
 664    if (y == 0) {
 665       return nir_imm_intN_t(build, 0, x->bit_size);
 666    } else if (y == 1) {
 667       return x;
 668    } else if (util_is_power_of_two_or_zero64(y)) {
 669       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 670    } else {
 671       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 672    }
 673 }
 674
 675 static inline nir_ssa_def *
 676 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 677 {
 678    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 679 }
 680
 681 static inline nir_ssa_def *
 682 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 683 {
 684    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 685 }
 686
 687 static inline nir_ssa_def *
 688 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 689 {
 690    assert(src->num_components * src->bit_size == dest_bit_size);
 691
 692    switch (dest_bit_size) {
 693    case 64:
 694       switch (src->bit_size) {
 695       case 32: return nir_pack_64_2x32(b, src);
 696       case 16: return nir_pack_64_4x16(b, src);
 697       default: break;
 698       }
 699       break;
 700
 701    case 32:
 702       if (src->bit_size == 16)
 703          return nir_pack_32_2x16(b, src);
 704       break;
 705
 706    default:
 707       break;
 708    }
 709
 710    /* If we got here, we have no dedicated unpack opcode. */
 711    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 712    for (unsigned i = 0; i < src->num_components; i++) {
 713       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 714       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 715       dest = nir_ior(b, dest, val);
 716    }
 717    return dest;
 718 }
 719
 720 static inline nir_ssa_def *
 721 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 722 {
 723    assert(src->num_components == 1);
 724    assert(src->bit_size > dest_bit_size);
 725    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 726    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 727
 728    switch (src->bit_size) {
 729    case 64:
 730       switch (dest_bit_size) {
 731       case 32: return nir_unpack_64_2x32(b, src);
 732       case 16: return nir_unpack_64_4x16(b, src);
 733       default: break;
 734       }
 735       break;
 736
 737    case 32:
 738       if (dest_bit_size == 16)
 739          return nir_unpack_32_2x16(b, src);
 740       break;
 741
 742    default:
 743       break;
 744    }
 745
 746    /* If we got here, we have no dedicated unpack opcode. */
 747    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 748    for (unsigned i = 0; i < dest_num_components; i++) {
 749       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 750       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 751    }
 752    return nir_vec(b, dest_comps, dest_num_components);
 753 }
 754
 755 static inline nir_ssa_def *
 756 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 757 {
 758    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 759    const unsigned dest_num_components =
 760       (src->bit_size * src->num_components) / dest_bit_size;
 761    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 762
 763    if (src->bit_size > dest_bit_size) {
 764       assert(src->bit_size % dest_bit_size == 0);
 765       if (src->num_components == 1) {
 766          return nir_unpack_bits(b, src, dest_bit_size);
 767       } else {
 768          const unsigned divisor = src->bit_size / dest_bit_size;
 769          assert(src->num_components * divisor == dest_num_components);
 770          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 771          for (unsigned i = 0; i < src->num_components; i++) {
 772             nir_ssa_def *unpacked =
 773                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 774             assert(unpacked->num_components == divisor);
 775             for (unsigned j = 0; j < divisor; j++)
 776                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 777          }
 778          return nir_vec(b, dest, dest_num_components);
 779       }
 780    } else if (src->bit_size < dest_bit_size) {
 781       assert(dest_bit_size % src->bit_size == 0);
 782       if (dest_num_components == 1) {
 783          return nir_pack_bits(b, src, dest_bit_size);
 784       } else {
 785          const unsigned divisor = dest_bit_size / src->bit_size;
 786          assert(src->num_components == dest_num_components * divisor);
 787          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 788          for (unsigned i = 0; i < dest_num_components; i++) {
 789             nir_component_mask_t src_mask =
 790                ((1 << divisor) - 1) << (i * divisor);
 791             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 792                                        dest_bit_size);
 793          }
 794          return nir_vec(b, dest, dest_num_components);
 795       }
 796    } else {
 797       assert(src->bit_size == dest_bit_size);
 798       return src;
 799    }
 800 }
 801
 802 /**
 803  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 804  * nir_build_alu()-based builder calls.
 805  *
 806  * See nir_ssa_for_alu_src() for alu instructions.
 807  */
 808 static inline nir_ssa_def *
 809 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 810 {
 811    if (src.is_ssa && src.ssa->num_components == num_components)
 812       return src.ssa;
 813
 814    nir_alu_src alu = { NIR_SRC_INIT };
 815    alu.src = src;
 816    for (int j = 0; j < 4; j++)
 817       alu.swizzle[j] = j;
 818
 819    return nir_imov_alu(build, alu, num_components);
 820 }
 821
 822 /**
 823  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 824  * nir_alu_src's swizzle.
 825  */
 826 static inline nir_ssa_def *
 827 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 828 {
 829    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 830    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 831       trivial_swizzle[i] = i;
 832    nir_alu_src *src = &instr->src[srcn];
 833    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 834
 835    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 836        !src->abs && !src->negate &&
 837        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 838       return src->src.ssa;
 839
 840    return nir_imov_alu(build, *src, num_components);
 841 }
 842
 843 static inline unsigned
 844 nir_get_ptr_bitsize(nir_builder *build)
 845 {
 846    if (build->shader->info.stage == MESA_SHADER_KERNEL)
 847       return build->shader->info.cs.ptr_size;
 848    return 32;
 849 }
 850
 851 static inline nir_deref_instr *
 852 nir_build_deref_var(nir_builder *build, nir_variable *var)
 853 {
 854    nir_deref_instr *deref =
 855       nir_deref_instr_create(build->shader, nir_deref_type_var);
 856
 857    deref->mode = var->data.mode;
 858    deref->type = var->type;
 859    deref->var = var;
 860
 861    nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
 862                      nir_get_ptr_bitsize(build), NULL);
 863
 864    nir_builder_instr_insert(build, &deref->instr);
 865
 866    return deref;
 867 }
 868
 869 static inline nir_deref_instr *
 870 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 871                       nir_ssa_def *index)
 872 {
 873    assert(glsl_type_is_array(parent->type) ||
 874           glsl_type_is_matrix(parent->type) ||
 875           glsl_type_is_vector(parent->type));
 876
 877    assert(index->bit_size == parent->dest.ssa.bit_size);
 878
 879    nir_deref_instr *deref =
 880       nir_deref_instr_create(build->shader, nir_deref_type_array);
 881
 882    deref->mode = parent->mode;
 883    deref->type = glsl_get_array_element(parent->type);
 884    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 885    deref->arr.index = nir_src_for_ssa(index);
 886
 887    nir_ssa_dest_init(&deref->instr, &deref->dest,
 888                      parent->dest.ssa.num_components,
 889                      parent->dest.ssa.bit_size, NULL);
 890
 891    nir_builder_instr_insert(build, &deref->instr);
 892
 893    return deref;
 894 }
 895
 896 static inline nir_deref_instr *
 897 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
 898                           int64_t index)
 899 {
 900    assert(parent->dest.is_ssa);
 901    nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
 902                                          parent->dest.ssa.bit_size);
 903
 904    return nir_build_deref_array(build, parent, idx_ssa);
 905 }
 906
 907 static inline nir_deref_instr *
 908 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
 909                              nir_ssa_def *index)
 910 {
 911    assert(parent->deref_type == nir_deref_type_array ||
 912           parent->deref_type == nir_deref_type_ptr_as_array ||
 913           parent->deref_type == nir_deref_type_cast);
 914
 915    assert(index->bit_size == parent->dest.ssa.bit_size);
 916
 917    nir_deref_instr *deref =
 918       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
 919
 920    deref->mode = parent->mode;
 921    deref->type = parent->type;
 922    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 923    deref->arr.index = nir_src_for_ssa(index);
 924
 925    nir_ssa_dest_init(&deref->instr, &deref->dest,
 926                      parent->dest.ssa.num_components,
 927                      parent->dest.ssa.bit_size, NULL);
 928
 929    nir_builder_instr_insert(build, &deref->instr);
 930
 931    return deref;
 932 }
 933
 934 static inline nir_deref_instr *
 935 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 936 {
 937    assert(glsl_type_is_array(parent->type) ||
 938           glsl_type_is_matrix(parent->type));
 939
 940    nir_deref_instr *deref =
 941       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 942
 943    deref->mode = parent->mode;
 944    deref->type = glsl_get_array_element(parent->type);
 945    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 946
 947    nir_ssa_dest_init(&deref->instr, &deref->dest,
 948                      parent->dest.ssa.num_components,
 949                      parent->dest.ssa.bit_size, NULL);
 950
 951    nir_builder_instr_insert(build, &deref->instr);
 952
 953    return deref;
 954 }
 955
 956 static inline nir_deref_instr *
 957 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 958                        unsigned index)
 959 {
 960    assert(glsl_type_is_struct_or_ifc(parent->type));
 961
 962    nir_deref_instr *deref =
 963       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 964
 965    deref->mode = parent->mode;
 966    deref->type = glsl_get_struct_field(parent->type, index);
 967    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 968    deref->strct.index = index;
 969
 970    nir_ssa_dest_init(&deref->instr, &deref->dest,
 971                      parent->dest.ssa.num_components,
 972                      parent->dest.ssa.bit_size, NULL);
 973
 974    nir_builder_instr_insert(build, &deref->instr);
 975
 976    return deref;
 977 }
 978
 979 static inline nir_deref_instr *
 980 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
 981                      nir_variable_mode mode, const struct glsl_type *type,
 982                      unsigned ptr_stride)
 983 {
 984    nir_deref_instr *deref =
 985       nir_deref_instr_create(build->shader, nir_deref_type_cast);
 986
 987    deref->mode = mode;
 988    deref->type = type;
 989    deref->parent = nir_src_for_ssa(parent);
 990    deref->cast.ptr_stride = ptr_stride;
 991
 992    nir_ssa_dest_init(&deref->instr, &deref->dest,
 993                      parent->num_components, parent->bit_size, NULL);
 994
 995    nir_builder_instr_insert(build, &deref->instr);
 996
 997    return deref;
 998 }
 999
1000 /** Returns a deref that follows another but starting from the given parent
1001  *
1002  * The new deref will be the same type and take the same array or struct index
1003  * as the leader deref but it may have a different parent.  This is very
1004  * useful for walking deref paths.
1005  */
1006 static inline nir_deref_instr *
1007 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1008                          nir_deref_instr *leader)
1009 {
1010    /* If the derefs would have the same parent, don't make a new one */
1011    assert(leader->parent.is_ssa);
1012    if (leader->parent.ssa == &parent->dest.ssa)
1013       return leader;
1014
1015    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1016
1017    switch (leader->deref_type) {
1018    case nir_deref_type_var:
1019       unreachable("A var dereference cannot have a parent");
1020       break;
1021
1022    case nir_deref_type_array:
1023    case nir_deref_type_array_wildcard:
1024       assert(glsl_type_is_matrix(parent->type) ||
1025              glsl_type_is_array(parent->type) ||
1026              (leader->deref_type == nir_deref_type_array &&
1027               glsl_type_is_vector(parent->type)));
1028       assert(glsl_get_length(parent->type) ==
1029              glsl_get_length(leader_parent->type));
1030
1031       if (leader->deref_type == nir_deref_type_array) {
1032          assert(leader->arr.index.is_ssa);
1033          nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1034                                          parent->dest.ssa.bit_size);
1035          return nir_build_deref_array(b, parent, index);
1036       } else {
1037          return nir_build_deref_array_wildcard(b, parent);
1038       }
1039
1040    case nir_deref_type_struct:
1041       assert(glsl_type_is_struct_or_ifc(parent->type));
1042       assert(glsl_get_length(parent->type) ==
1043              glsl_get_length(leader_parent->type));
1044
1045       return nir_build_deref_struct(b, parent, leader->strct.index);
1046
1047    default:
1048       unreachable("Invalid deref instruction type");
1049    }
1050 }
1051
1052 static inline nir_ssa_def *
1053 nir_load_reg(nir_builder *build, nir_register *reg)
1054 {
1055    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1056 }
1057
1058 static inline nir_ssa_def *
1059 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1060                            enum gl_access_qualifier access)
1061 {
1062    nir_intrinsic_instr *load =
1063       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1064    load->num_components = glsl_get_vector_elements(deref->type);
1065    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1066    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1067                      glsl_get_bit_size(deref->type), NULL);
1068    nir_intrinsic_set_access(load, access);
1069    nir_builder_instr_insert(build, &load->instr);
1070    return &load->dest.ssa;
1071 }
1072
1073 static inline nir_ssa_def *
1074 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1075 {
1076    return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1077 }
1078
1079 static inline void
1080 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1081                             nir_ssa_def *value, unsigned writemask,
1082                             enum gl_access_qualifier access)
1083 {
1084    nir_intrinsic_instr *store =
1085       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1086    store->num_components = glsl_get_vector_elements(deref->type);
1087    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1088    store->src[1] = nir_src_for_ssa(value);
1089    nir_intrinsic_set_write_mask(store,
1090                                 writemask & ((1 << store->num_components) - 1));
1091    nir_intrinsic_set_access(store, access);
1092    nir_builder_instr_insert(build, &store->instr);
1093 }
1094
1095 static inline void
1096 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1097                 nir_ssa_def *value, unsigned writemask)
1098 {
1099    nir_store_deref_with_access(build, deref, value, writemask,
1100                                (enum gl_access_qualifier)0);
1101 }
1102
1103 static inline void
1104 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1105 {
1106    nir_intrinsic_instr *copy =
1107       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1108    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1109    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1110    nir_builder_instr_insert(build, &copy->instr);
1111 }
1112
1113 static inline nir_ssa_def *
1114 nir_load_var(nir_builder *build, nir_variable *var)
1115 {
1116    return nir_load_deref(build, nir_build_deref_var(build, var));
1117 }
1118
1119 static inline void
1120 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1121               unsigned writemask)
1122 {
1123    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1124 }
1125
1126 static inline void
1127 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1128 {
1129    nir_copy_deref(build, nir_build_deref_var(build, dest),
1130                          nir_build_deref_var(build, src));
1131 }
1132
1133 static inline nir_ssa_def *
1134 nir_load_param(nir_builder *build, uint32_t param_idx)
1135 {
1136    assert(param_idx < build->impl->function->num_params);
1137    nir_parameter *param = &build->impl->function->params[param_idx];
1138
1139    nir_intrinsic_instr *load =
1140       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1141    nir_intrinsic_set_param_idx(load, param_idx);
1142    load->num_components = param->num_components;
1143    nir_ssa_dest_init(&load->instr, &load->dest,
1144                      param->num_components, param->bit_size, NULL);
1145    nir_builder_instr_insert(build, &load->instr);
1146    return &load->dest.ssa;
1147 }
1148
1149 #include "nir_builder_opcodes.h"
1150
1151 static inline nir_ssa_def *
1152 nir_f2b(nir_builder *build, nir_ssa_def *f)
1153 {
1154    return nir_f2b1(build, f);
1155 }
1156
1157 static inline nir_ssa_def *
1158 nir_i2b(nir_builder *build, nir_ssa_def *i)
1159 {
1160    return nir_i2b1(build, i);
1161 }
1162
1163 static inline nir_ssa_def *
1164 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1165 {
1166    switch (bit_size) {
1167    case 64: return nir_b2f64(build, b);
1168    case 32: return nir_b2f32(build, b);
1169    case 16: return nir_b2f16(build, b);
1170    default:
1171       unreachable("Invalid bit-size");
1172    };
1173 }
1174
1175 static inline nir_ssa_def *
1176 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1177                      unsigned interp_mode)
1178 {
1179    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1180    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1181    nir_intrinsic_set_interp_mode(bary, interp_mode);
1182    nir_builder_instr_insert(build, &bary->instr);
1183    return &bary->dest.ssa;
1184 }
1185
1186 static inline void
1187 nir_jump(nir_builder *build, nir_jump_type jump_type)
1188 {
1189    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1190    nir_builder_instr_insert(build, &jump->instr);
1191 }
1192
1193 static inline nir_ssa_def *
1194 nir_compare_func(nir_builder *b, enum compare_func func,
1195                  nir_ssa_def *src0, nir_ssa_def *src1)
1196 {
1197    switch (func) {
1198    case COMPARE_FUNC_NEVER:
1199       return nir_imm_int(b, 0);
1200    case COMPARE_FUNC_ALWAYS:
1201       return nir_imm_int(b, ~0);
1202    case COMPARE_FUNC_EQUAL:
1203       return nir_feq(b, src0, src1);
1204    case COMPARE_FUNC_NOTEQUAL:
1205       return nir_fne(b, src0, src1);
1206    case COMPARE_FUNC_GREATER:
1207       return nir_flt(b, src1, src0);
1208    case COMPARE_FUNC_GEQUAL:
1209       return nir_fge(b, src0, src1);
1210    case COMPARE_FUNC_LESS:
1211       return nir_flt(b, src0, src1);
1212    case COMPARE_FUNC_LEQUAL:
1213       return nir_fge(b, src1, src0);
1214    }
1215    unreachable("bad compare func");
1216 }
1217
1218 #endif /* NIR_BUILDER_H */