src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/half_float.h"
  29
  30 struct exec_list;
  31
  32 typedef struct nir_builder {
  33    nir_cursor cursor;
  34
  35    /* Whether new ALU instructions will be marked "exact" */
  36    bool exact;
  37
  38    nir_shader *shader;
  39    nir_function_impl *impl;
  40 } nir_builder;
  41
  42 static inline void
  43 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  44 {
  45    memset(build, 0, sizeof(*build));
  46    build->exact = false;
  47    build->impl = impl;
  48    build->shader = impl->function->shader;
  49 }
  50
  51 static inline void
  52 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  53                                gl_shader_stage stage,
  54                                const nir_shader_compiler_options *options)
  55 {
  56    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  57    nir_function *func = nir_function_create(build->shader, "main");
  58    build->exact = false;
  59    build->impl = nir_function_impl_create(func);
  60    build->cursor = nir_after_cf_list(&build->impl->body);
  61 }
  62
  63 static inline void
  64 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  65 {
  66    nir_instr_insert(build->cursor, instr);
  67
  68    /* Move the cursor forward. */
  69    build->cursor = nir_after_instr(instr);
  70 }
  71
  72 static inline nir_instr *
  73 nir_builder_last_instr(nir_builder *build)
  74 {
  75    assert(build->cursor.option == nir_cursor_after_instr);
  76    return build->cursor.instr;
  77 }
  78
  79 static inline void
  80 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  81 {
  82    nir_cf_node_insert(build->cursor, cf);
  83 }
  84
  85 static inline bool
  86 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  87 {
  88    nir_block *block = nir_cursor_current_block(build->cursor);
  89    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  90       if (n == cf_node)
  91          return true;
  92    }
  93    return false;
  94 }
  95
  96 static inline nir_if *
  97 nir_push_if(nir_builder *build, nir_ssa_def *condition)
  98 {
  99    nir_if *nif = nir_if_create(build->shader);
 100    nif->condition = nir_src_for_ssa(condition);
 101    nir_builder_cf_insert(build, &nif->cf_node);
 102    build->cursor = nir_before_cf_list(&nif->then_list);
 103    return nif;
 104 }
 105
 106 static inline nir_if *
 107 nir_push_else(nir_builder *build, nir_if *nif)
 108 {
 109    if (nif) {
 110       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 111    } else {
 112       nir_block *block = nir_cursor_current_block(build->cursor);
 113       nif = nir_cf_node_as_if(block->cf_node.parent);
 114    }
 115    build->cursor = nir_before_cf_list(&nif->else_list);
 116    return nif;
 117 }
 118
 119 static inline void
 120 nir_pop_if(nir_builder *build, nir_if *nif)
 121 {
 122    if (nif) {
 123       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 124    } else {
 125       nir_block *block = nir_cursor_current_block(build->cursor);
 126       nif = nir_cf_node_as_if(block->cf_node.parent);
 127    }
 128    build->cursor = nir_after_cf_node(&nif->cf_node);
 129 }
 130
 131 static inline nir_ssa_def *
 132 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 133 {
 134    nir_block *block = nir_cursor_current_block(build->cursor);
 135    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 136
 137    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 138
 139    nir_phi_src *src = ralloc(phi, nir_phi_src);
 140    src->pred = nir_if_last_then_block(nif);
 141    src->src = nir_src_for_ssa(then_def);
 142    exec_list_push_tail(&phi->srcs, &src->node);
 143
 144    src = ralloc(phi, nir_phi_src);
 145    src->pred = nir_if_last_else_block(nif);
 146    src->src = nir_src_for_ssa(else_def);
 147    exec_list_push_tail(&phi->srcs, &src->node);
 148
 149    assert(then_def->num_components == else_def->num_components);
 150    assert(then_def->bit_size == else_def->bit_size);
 151    nir_ssa_dest_init(&phi->instr, &phi->dest,
 152                      then_def->num_components, then_def->bit_size, NULL);
 153
 154    nir_builder_instr_insert(build, &phi->instr);
 155
 156    return &phi->dest.ssa;
 157 }
 158
 159 static inline nir_loop *
 160 nir_push_loop(nir_builder *build)
 161 {
 162    nir_loop *loop = nir_loop_create(build->shader);
 163    nir_builder_cf_insert(build, &loop->cf_node);
 164    build->cursor = nir_before_cf_list(&loop->body);
 165    return loop;
 166 }
 167
 168 static inline void
 169 nir_pop_loop(nir_builder *build, nir_loop *loop)
 170 {
 171    if (loop) {
 172       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 173    } else {
 174       nir_block *block = nir_cursor_current_block(build->cursor);
 175       loop = nir_cf_node_as_loop(block->cf_node.parent);
 176    }
 177    build->cursor = nir_after_cf_node(&loop->cf_node);
 178 }
 179
 180 static inline nir_ssa_def *
 181 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 182 {
 183    nir_ssa_undef_instr *undef =
 184       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 185    if (!undef)
 186       return NULL;
 187
 188    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 189
 190    return &undef->def;
 191 }
 192
 193 static inline nir_ssa_def *
 194 nir_build_imm(nir_builder *build, unsigned num_components,
 195               unsigned bit_size, nir_const_value value)
 196 {
 197    nir_load_const_instr *load_const =
 198       nir_load_const_instr_create(build->shader, num_components, bit_size);
 199    if (!load_const)
 200       return NULL;
 201
 202    load_const->value = value;
 203
 204    nir_builder_instr_insert(build, &load_const->instr);
 205
 206    return &load_const->def;
 207 }
 208
 209 static inline nir_ssa_def *
 210 nir_imm_bool(nir_builder *build, bool x)
 211 {
 212    nir_const_value v;
 213
 214    memset(&v, 0, sizeof(v));
 215    v.u32[0] = x ? NIR_TRUE : NIR_FALSE;
 216
 217    return nir_build_imm(build, 1, 32, v);
 218 }
 219
 220 static inline nir_ssa_def *
 221 nir_imm_true(nir_builder *build)
 222 {
 223    return nir_imm_bool(build, true);
 224 }
 225
 226 static inline nir_ssa_def *
 227 nir_imm_false(nir_builder *build)
 228 {
 229    return nir_imm_bool(build, false);
 230 }
 231
 232 static inline nir_ssa_def *
 233 nir_imm_float16(nir_builder *build, float x)
 234 {
 235    nir_const_value v;
 236
 237    memset(&v, 0, sizeof(v));
 238    v.u16[0] = _mesa_float_to_half(x);
 239
 240    return nir_build_imm(build, 1, 16, v);
 241 }
 242
 243 static inline nir_ssa_def *
 244 nir_imm_float(nir_builder *build, float x)
 245 {
 246    nir_const_value v;
 247
 248    memset(&v, 0, sizeof(v));
 249    v.f32[0] = x;
 250
 251    return nir_build_imm(build, 1, 32, v);
 252 }
 253
 254 static inline nir_ssa_def *
 255 nir_imm_double(nir_builder *build, double x)
 256 {
 257    nir_const_value v;
 258
 259    memset(&v, 0, sizeof(v));
 260    v.f64[0] = x;
 261
 262    return nir_build_imm(build, 1, 64, v);
 263 }
 264
 265 static inline nir_ssa_def *
 266 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 267 {
 268    switch (bit_size) {
 269    case 16:
 270       return nir_imm_float16(build, x);
 271    case 32:
 272       return nir_imm_float(build, x);
 273    case 64:
 274       return nir_imm_double(build, x);
 275    }
 276
 277    unreachable("unknown float immediate bit size");
 278 }
 279
 280 static inline nir_ssa_def *
 281 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 282 {
 283    nir_const_value v;
 284
 285    memset(&v, 0, sizeof(v));
 286    v.f32[0] = x;
 287    v.f32[1] = y;
 288    v.f32[2] = z;
 289    v.f32[3] = w;
 290
 291    return nir_build_imm(build, 4, 32, v);
 292 }
 293
 294 static inline nir_ssa_def *
 295 nir_imm_ivec2(nir_builder *build, int x, int y)
 296 {
 297    nir_const_value v;
 298
 299    memset(&v, 0, sizeof(v));
 300    v.i32[0] = x;
 301    v.i32[1] = y;
 302
 303    return nir_build_imm(build, 2, 32, v);
 304 }
 305
 306 static inline nir_ssa_def *
 307 nir_imm_int(nir_builder *build, int x)
 308 {
 309    nir_const_value v;
 310
 311    memset(&v, 0, sizeof(v));
 312    v.i32[0] = x;
 313
 314    return nir_build_imm(build, 1, 32, v);
 315 }
 316
 317 static inline nir_ssa_def *
 318 nir_imm_int64(nir_builder *build, int64_t x)
 319 {
 320    nir_const_value v;
 321
 322    memset(&v, 0, sizeof(v));
 323    v.i64[0] = x;
 324
 325    return nir_build_imm(build, 1, 64, v);
 326 }
 327
 328 static inline nir_ssa_def *
 329 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 330 {
 331    nir_const_value v;
 332
 333    memset(&v, 0, sizeof(v));
 334    assert(bit_size <= 64);
 335    v.i64[0] = x & (~0ull >> (64 - bit_size));
 336
 337    return nir_build_imm(build, 1, bit_size, v);
 338 }
 339
 340 static inline nir_ssa_def *
 341 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 342 {
 343    nir_const_value v;
 344
 345    memset(&v, 0, sizeof(v));
 346    v.i32[0] = x;
 347    v.i32[1] = y;
 348    v.i32[2] = z;
 349    v.i32[3] = w;
 350
 351    return nir_build_imm(build, 4, 32, v);
 352 }
 353
 354 static inline nir_ssa_def *
 355 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 356               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 357 {
 358    const nir_op_info *op_info = &nir_op_infos[op];
 359    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 360    if (!instr)
 361       return NULL;
 362
 363    instr->exact = build->exact;
 364
 365    instr->src[0].src = nir_src_for_ssa(src0);
 366    if (src1)
 367       instr->src[1].src = nir_src_for_ssa(src1);
 368    if (src2)
 369       instr->src[2].src = nir_src_for_ssa(src2);
 370    if (src3)
 371       instr->src[3].src = nir_src_for_ssa(src3);
 372
 373    /* Guess the number of components the destination temporary should have
 374     * based on our input sizes, if it's not fixed for the op.
 375     */
 376    unsigned num_components = op_info->output_size;
 377    if (num_components == 0) {
 378       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 379          if (op_info->input_sizes[i] == 0)
 380             num_components = MAX2(num_components,
 381                                   instr->src[i].src.ssa->num_components);
 382       }
 383    }
 384    assert(num_components != 0);
 385
 386    /* Figure out the bitwidth based on the source bitwidth if the instruction
 387     * is variable-width.
 388     */
 389    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 390    if (bit_size == 0) {
 391       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 392          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 393          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 394             if (bit_size)
 395                assert(src_bit_size == bit_size);
 396             else
 397                bit_size = src_bit_size;
 398          } else {
 399             assert(src_bit_size ==
 400                nir_alu_type_get_type_size(op_info->input_types[i]));
 401          }
 402       }
 403    }
 404
 405    /* When in doubt, assume 32. */
 406    if (bit_size == 0)
 407       bit_size = 32;
 408
 409    /* Make sure we don't swizzle from outside of our source vector (like if a
 410     * scalar value was passed into a multiply with a vector).
 411     */
 412    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 413       for (unsigned j = instr->src[i].src.ssa->num_components;
 414            j < NIR_MAX_VEC_COMPONENTS; j++) {
 415          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 416       }
 417    }
 418
 419    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 420                      bit_size, NULL);
 421    instr->dest.write_mask = (1 << num_components) - 1;
 422
 423    nir_builder_instr_insert(build, &instr->instr);
 424
 425    return &instr->dest.dest.ssa;
 426 }
 427
 428 #include "nir_builder_opcodes.h"
 429
 430 static inline nir_ssa_def *
 431 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 432 {
 433    switch (num_components) {
 434    case 4:
 435       return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
 436    case 3:
 437       return nir_vec3(build, comp[0], comp[1], comp[2]);
 438    case 2:
 439       return nir_vec2(build, comp[0], comp[1]);
 440    case 1:
 441       return comp[0];
 442    default:
 443       unreachable("bad component count");
 444       return NULL;
 445    }
 446 }
 447
 448 /**
 449  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 450  */
 451 static inline nir_ssa_def *
 452 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 453 {
 454    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 455    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 456                      nir_src_bit_size(src.src), NULL);
 457    mov->exact = build->exact;
 458    mov->dest.write_mask = (1 << num_components) - 1;
 459    mov->src[0] = src;
 460    nir_builder_instr_insert(build, &mov->instr);
 461
 462    return &mov->dest.dest.ssa;
 463 }
 464
 465 static inline nir_ssa_def *
 466 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 467 {
 468    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 469    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 470                      nir_src_bit_size(src.src), NULL);
 471    mov->exact = build->exact;
 472    mov->dest.write_mask = (1 << num_components) - 1;
 473    mov->src[0] = src;
 474    nir_builder_instr_insert(build, &mov->instr);
 475
 476    return &mov->dest.dest.ssa;
 477 }
 478
 479 /**
 480  * Construct an fmov or imov that reswizzles the source's components.
 481  */
 482 static inline nir_ssa_def *
 483 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 484             unsigned num_components, bool use_fmov)
 485 {
 486    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 487    nir_alu_src alu_src = { NIR_SRC_INIT };
 488    alu_src.src = nir_src_for_ssa(src);
 489    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++)
 490       alu_src.swizzle[i] = swiz[i];
 491
 492    return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
 493                      nir_imov_alu(build, alu_src, num_components);
 494 }
 495
 496 /* Selects the right fdot given the number of components in each source. */
 497 static inline nir_ssa_def *
 498 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 499 {
 500    assert(src0->num_components == src1->num_components);
 501    switch (src0->num_components) {
 502    case 1: return nir_fmul(build, src0, src1);
 503    case 2: return nir_fdot2(build, src0, src1);
 504    case 3: return nir_fdot3(build, src0, src1);
 505    case 4: return nir_fdot4(build, src0, src1);
 506    default:
 507       unreachable("bad component size");
 508    }
 509
 510    return NULL;
 511 }
 512
 513 static inline nir_ssa_def *
 514 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 515 {
 516    switch (src0->num_components) {
 517    case 1: return nir_ine(b, src0, src1);
 518    case 2: return nir_bany_inequal2(b, src0, src1);
 519    case 3: return nir_bany_inequal3(b, src0, src1);
 520    case 4: return nir_bany_inequal4(b, src0, src1);
 521    default:
 522       unreachable("bad component size");
 523    }
 524 }
 525
 526 static inline nir_ssa_def *
 527 nir_bany(nir_builder *b, nir_ssa_def *src)
 528 {
 529    return nir_bany_inequal(b, src, nir_imm_false(b));
 530 }
 531
 532 static inline nir_ssa_def *
 533 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 534 {
 535    return nir_swizzle(b, def, &c, 1, false);
 536 }
 537
 538 static inline nir_ssa_def *
 539 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 540 {
 541    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 542
 543    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 544       if ((mask & (1 << i)) == 0)
 545          continue;
 546       swizzle[num_channels++] = i;
 547    }
 548
 549    return nir_swizzle(b, def, swizzle, num_channels, false);
 550 }
 551
 552 static inline nir_ssa_def *
 553 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 554 {
 555    return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 556 }
 557
 558 static inline nir_ssa_def *
 559 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 560 {
 561    return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 562 }
 563
 564 static inline nir_ssa_def *
 565 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 566 {
 567    assert(src->num_components * src->bit_size == dest_bit_size);
 568
 569    switch (dest_bit_size) {
 570    case 64:
 571       switch (src->bit_size) {
 572       case 32: return nir_pack_64_2x32(b, src);
 573       case 16: return nir_pack_64_4x16(b, src);
 574       default: break;
 575       }
 576       break;
 577
 578    case 32:
 579       if (src->bit_size == 16)
 580          return nir_pack_32_2x16(b, src);
 581       break;
 582
 583    default:
 584       break;
 585    }
 586
 587    /* If we got here, we have no dedicated unpack opcode. */
 588    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 589    for (unsigned i = 0; i < src->num_components; i++) {
 590       nir_ssa_def *val;
 591       switch (dest_bit_size) {
 592       case 64: val = nir_u2u64(b, nir_channel(b, src, i));  break;
 593       case 32: val = nir_u2u32(b, nir_channel(b, src, i));  break;
 594       case 16: val = nir_u2u16(b, nir_channel(b, src, i));  break;
 595       default: unreachable("Invalid bit size");
 596       }
 597       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 598       dest = nir_ior(b, dest, val);
 599    }
 600    return dest;
 601 }
 602
 603 static inline nir_ssa_def *
 604 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 605 {
 606    assert(src->num_components == 1);
 607    assert(src->bit_size > dest_bit_size);
 608    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 609    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 610
 611    switch (src->bit_size) {
 612    case 64:
 613       switch (dest_bit_size) {
 614       case 32: return nir_unpack_64_2x32(b, src);
 615       case 16: return nir_unpack_64_4x16(b, src);
 616       default: break;
 617       }
 618       break;
 619
 620    case 32:
 621       if (dest_bit_size == 16)
 622          return nir_unpack_32_2x16(b, src);
 623       break;
 624
 625    default:
 626       break;
 627    }
 628
 629    /* If we got here, we have no dedicated unpack opcode. */
 630    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 631    for (unsigned i = 0; i < dest_num_components; i++) {
 632       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 633       switch (dest_bit_size) {
 634       case 32: dest_comps[i] = nir_u2u32(b, val);  break;
 635       case 16: dest_comps[i] = nir_u2u16(b, val);  break;
 636       case 8:  dest_comps[i] = nir_u2u8(b, val);   break;
 637       default: unreachable("Invalid bit size");
 638       }
 639    }
 640    return nir_vec(b, dest_comps, dest_num_components);
 641 }
 642
 643 static inline nir_ssa_def *
 644 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 645 {
 646    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 647    const unsigned dest_num_components =
 648       (src->bit_size * src->num_components) / dest_bit_size;
 649    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 650
 651    if (src->bit_size > dest_bit_size) {
 652       assert(src->bit_size % dest_bit_size == 0);
 653       if (src->num_components == 1) {
 654          return nir_unpack_bits(b, src, dest_bit_size);
 655       } else {
 656          const unsigned divisor = src->bit_size / dest_bit_size;
 657          assert(src->num_components * divisor == dest_num_components);
 658          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 659          for (unsigned i = 0; i < src->num_components; i++) {
 660             nir_ssa_def *unpacked =
 661                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 662             assert(unpacked->num_components == divisor);
 663             for (unsigned j = 0; j < divisor; j++)
 664                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 665          }
 666          return nir_vec(b, dest, dest_num_components);
 667       }
 668    } else if (src->bit_size < dest_bit_size) {
 669       assert(dest_bit_size % src->bit_size == 0);
 670       if (dest_num_components == 1) {
 671          return nir_pack_bits(b, src, dest_bit_size);
 672       } else {
 673          const unsigned divisor = dest_bit_size / src->bit_size;
 674          assert(src->num_components == dest_num_components * divisor);
 675          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 676          for (unsigned i = 0; i < dest_num_components; i++) {
 677             nir_component_mask_t src_mask =
 678                ((1 << divisor) - 1) << (i * divisor);
 679             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 680                                        dest_bit_size);
 681          }
 682          return nir_vec(b, dest, dest_num_components);
 683       }
 684    } else {
 685       assert(src->bit_size == dest_bit_size);
 686       return src;
 687    }
 688 }
 689
 690 /**
 691  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 692  * nir_build_alu()-based builder calls.
 693  *
 694  * See nir_ssa_for_alu_src() for alu instructions.
 695  */
 696 static inline nir_ssa_def *
 697 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 698 {
 699    if (src.is_ssa && src.ssa->num_components == num_components)
 700       return src.ssa;
 701
 702    nir_alu_src alu = { NIR_SRC_INIT };
 703    alu.src = src;
 704    for (int j = 0; j < 4; j++)
 705       alu.swizzle[j] = j;
 706
 707    return nir_imov_alu(build, alu, num_components);
 708 }
 709
 710 /**
 711  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 712  * nir_alu_src's swizzle.
 713  */
 714 static inline nir_ssa_def *
 715 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 716 {
 717    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 718    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 719       trivial_swizzle[i] = i;
 720    nir_alu_src *src = &instr->src[srcn];
 721    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 722
 723    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 724        !src->abs && !src->negate &&
 725        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 726       return src->src.ssa;
 727
 728    return nir_imov_alu(build, *src, num_components);
 729 }
 730
 731 static inline nir_deref_instr *
 732 nir_build_deref_var(nir_builder *build, nir_variable *var)
 733 {
 734    nir_deref_instr *deref =
 735       nir_deref_instr_create(build->shader, nir_deref_type_var);
 736
 737    deref->mode = var->data.mode;
 738    deref->type = var->type;
 739    deref->var = var;
 740
 741    nir_ssa_dest_init(&deref->instr, &deref->dest, 1, 32, NULL);
 742
 743    nir_builder_instr_insert(build, &deref->instr);
 744
 745    return deref;
 746 }
 747
 748 static inline nir_deref_instr *
 749 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 750                       nir_ssa_def *index)
 751 {
 752    assert(glsl_type_is_array(parent->type) ||
 753           glsl_type_is_matrix(parent->type) ||
 754           glsl_type_is_vector(parent->type));
 755
 756    nir_deref_instr *deref =
 757       nir_deref_instr_create(build->shader, nir_deref_type_array);
 758
 759    deref->mode = parent->mode;
 760    deref->type = glsl_get_array_element(parent->type);
 761    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 762    deref->arr.index = nir_src_for_ssa(index);
 763
 764    nir_ssa_dest_init(&deref->instr, &deref->dest,
 765                      parent->dest.ssa.num_components,
 766                      parent->dest.ssa.bit_size, NULL);
 767
 768    nir_builder_instr_insert(build, &deref->instr);
 769
 770    return deref;
 771 }
 772
 773 static inline nir_deref_instr *
 774 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 775 {
 776    assert(glsl_type_is_array(parent->type) ||
 777           glsl_type_is_matrix(parent->type));
 778
 779    nir_deref_instr *deref =
 780       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 781
 782    deref->mode = parent->mode;
 783    deref->type = glsl_get_array_element(parent->type);
 784    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 785
 786    nir_ssa_dest_init(&deref->instr, &deref->dest,
 787                      parent->dest.ssa.num_components,
 788                      parent->dest.ssa.bit_size, NULL);
 789
 790    nir_builder_instr_insert(build, &deref->instr);
 791
 792    return deref;
 793 }
 794
 795 static inline nir_deref_instr *
 796 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 797                        unsigned index)
 798 {
 799    assert(glsl_type_is_struct(parent->type));
 800
 801    nir_deref_instr *deref =
 802       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 803
 804    deref->mode = parent->mode;
 805    deref->type = glsl_get_struct_field(parent->type, index);
 806    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 807    deref->strct.index = index;
 808
 809    nir_ssa_dest_init(&deref->instr, &deref->dest,
 810                      parent->dest.ssa.num_components,
 811                      parent->dest.ssa.bit_size, NULL);
 812
 813    nir_builder_instr_insert(build, &deref->instr);
 814
 815    return deref;
 816 }
 817
 818 static inline nir_deref_instr *
 819 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
 820                      nir_variable_mode mode, const struct glsl_type *type)
 821 {
 822    nir_deref_instr *deref =
 823       nir_deref_instr_create(build->shader, nir_deref_type_cast);
 824
 825    deref->mode = mode;
 826    deref->type = type;
 827    deref->parent = nir_src_for_ssa(parent);
 828
 829    nir_ssa_dest_init(&deref->instr, &deref->dest,
 830                      parent->num_components, parent->bit_size, NULL);
 831
 832    nir_builder_instr_insert(build, &deref->instr);
 833
 834    return deref;
 835 }
 836
 837 /** Returns a deref that follows another but starting from the given parent
 838  *
 839  * The new deref will be the same type and take the same array or struct index
 840  * as the leader deref but it may have a different parent.  This is very
 841  * useful for walking deref paths.
 842  */
 843 static inline nir_deref_instr *
 844 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
 845                          nir_deref_instr *leader)
 846 {
 847    /* If the derefs would have the same parent, don't make a new one */
 848    assert(leader->parent.is_ssa);
 849    if (leader->parent.ssa == &parent->dest.ssa)
 850       return leader;
 851
 852    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
 853
 854    switch (leader->deref_type) {
 855    case nir_deref_type_var:
 856       unreachable("A var dereference cannot have a parent");
 857       break;
 858
 859    case nir_deref_type_array:
 860    case nir_deref_type_array_wildcard:
 861       assert(glsl_type_is_matrix(parent->type) ||
 862              glsl_type_is_array(parent->type));
 863       assert(glsl_get_length(parent->type) ==
 864              glsl_get_length(leader_parent->type));
 865
 866       if (leader->deref_type == nir_deref_type_array) {
 867          assert(leader->arr.index.is_ssa);
 868          return nir_build_deref_array(b, parent, leader->arr.index.ssa);
 869       } else {
 870          return nir_build_deref_array_wildcard(b, parent);
 871       }
 872
 873    case nir_deref_type_struct:
 874       assert(glsl_type_is_struct(parent->type));
 875       assert(glsl_get_length(parent->type) ==
 876              glsl_get_length(leader_parent->type));
 877
 878       return nir_build_deref_struct(b, parent, leader->strct.index);
 879
 880    default:
 881       unreachable("Invalid deref instruction type");
 882    }
 883 }
 884
 885 static inline nir_ssa_def *
 886 nir_load_reg(nir_builder *build, nir_register *reg)
 887 {
 888    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
 889 }
 890
 891 static inline nir_ssa_def *
 892 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
 893 {
 894    nir_intrinsic_instr *load =
 895       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
 896    load->num_components = glsl_get_vector_elements(deref->type);
 897    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
 898    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
 899                      glsl_get_bit_size(deref->type), NULL);
 900    nir_builder_instr_insert(build, &load->instr);
 901    return &load->dest.ssa;
 902 }
 903
 904 static inline void
 905 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
 906                 nir_ssa_def *value, unsigned writemask)
 907 {
 908    nir_intrinsic_instr *store =
 909       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
 910    store->num_components = glsl_get_vector_elements(deref->type);
 911    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
 912    store->src[1] = nir_src_for_ssa(value);
 913    nir_intrinsic_set_write_mask(store,
 914                                 writemask & ((1 << store->num_components) - 1));
 915    nir_builder_instr_insert(build, &store->instr);
 916 }
 917
 918 static inline void
 919 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
 920 {
 921    nir_intrinsic_instr *copy =
 922       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
 923    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
 924    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
 925    nir_builder_instr_insert(build, &copy->instr);
 926 }
 927
 928 static inline nir_ssa_def *
 929 nir_load_var(nir_builder *build, nir_variable *var)
 930 {
 931    return nir_load_deref(build, nir_build_deref_var(build, var));
 932 }
 933
 934 static inline void
 935 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
 936               unsigned writemask)
 937 {
 938    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
 939 }
 940
 941 static inline void
 942 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
 943 {
 944    nir_copy_deref(build, nir_build_deref_var(build, dest),
 945                          nir_build_deref_var(build, src));
 946 }
 947
 948 static inline nir_ssa_def *
 949 nir_load_param(nir_builder *build, uint32_t param_idx)
 950 {
 951    assert(param_idx < build->impl->function->num_params);
 952    nir_parameter *param = &build->impl->function->params[param_idx];
 953
 954    nir_intrinsic_instr *load =
 955       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
 956    nir_intrinsic_set_param_idx(load, param_idx);
 957    load->num_components = param->num_components;
 958    nir_ssa_dest_init(&load->instr, &load->dest,
 959                      param->num_components, param->bit_size, NULL);
 960    nir_builder_instr_insert(build, &load->instr);
 961    return &load->dest.ssa;
 962 }
 963
 964 #include "nir_builder_opcodes.h"
 965
 966 static inline nir_ssa_def *
 967 nir_f2b(nir_builder *build, nir_ssa_def *f)
 968 {
 969    return nir_f2b32(build, f);
 970 }
 971
 972 static inline nir_ssa_def *
 973 nir_i2b(nir_builder *build, nir_ssa_def *i)
 974 {
 975    return nir_i2b32(build, i);
 976 }
 977
 978 static inline nir_ssa_def *
 979 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
 980                      unsigned interp_mode)
 981 {
 982    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
 983    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
 984    nir_intrinsic_set_interp_mode(bary, interp_mode);
 985    nir_builder_instr_insert(build, &bary->instr);
 986    return &bary->dest.ssa;
 987 }
 988
 989 static inline void
 990 nir_jump(nir_builder *build, nir_jump_type jump_type)
 991 {
 992    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
 993    nir_builder_instr_insert(build, &jump->instr);
 994 }
 995
 996 static inline nir_ssa_def *
 997 nir_compare_func(nir_builder *b, enum compare_func func,
 998                  nir_ssa_def *src0, nir_ssa_def *src1)
 999 {
1000    switch (func) {
1001    case COMPARE_FUNC_NEVER:
1002       return nir_imm_int(b, 0);
1003    case COMPARE_FUNC_ALWAYS:
1004       return nir_imm_int(b, ~0);
1005    case COMPARE_FUNC_EQUAL:
1006       return nir_feq(b, src0, src1);
1007    case COMPARE_FUNC_NOTEQUAL:
1008       return nir_fne(b, src0, src1);
1009    case COMPARE_FUNC_GREATER:
1010       return nir_flt(b, src1, src0);
1011    case COMPARE_FUNC_GEQUAL:
1012       return nir_fge(b, src0, src1);
1013    case COMPARE_FUNC_LESS:
1014       return nir_flt(b, src0, src1);
1015    case COMPARE_FUNC_LEQUAL:
1016       return nir_fge(b, src1, src0);
1017    }
1018    unreachable("bad compare func");
1019 }
1020
1021 #endif /* NIR_BUILDER_H */