src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = nir_src_for_ssa(condition);
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_else(nir_builder *build, nir_if *nif)
 110 {
 111    if (nif) {
 112       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 113    } else {
 114       nir_block *block = nir_cursor_current_block(build->cursor);
 115       nif = nir_cf_node_as_if(block->cf_node.parent);
 116    }
 117    build->cursor = nir_before_cf_list(&nif->else_list);
 118    return nif;
 119 }
 120
 121 static inline void
 122 nir_pop_if(nir_builder *build, nir_if *nif)
 123 {
 124    if (nif) {
 125       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 126    } else {
 127       nir_block *block = nir_cursor_current_block(build->cursor);
 128       nif = nir_cf_node_as_if(block->cf_node.parent);
 129    }
 130    build->cursor = nir_after_cf_node(&nif->cf_node);
 131 }
 132
 133 static inline nir_ssa_def *
 134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 135 {
 136    nir_block *block = nir_cursor_current_block(build->cursor);
 137    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 138
 139    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 140
 141    nir_phi_src *src = ralloc(phi, nir_phi_src);
 142    src->pred = nir_if_last_then_block(nif);
 143    src->src = nir_src_for_ssa(then_def);
 144    exec_list_push_tail(&phi->srcs, &src->node);
 145
 146    src = ralloc(phi, nir_phi_src);
 147    src->pred = nir_if_last_else_block(nif);
 148    src->src = nir_src_for_ssa(else_def);
 149    exec_list_push_tail(&phi->srcs, &src->node);
 150
 151    assert(then_def->num_components == else_def->num_components);
 152    assert(then_def->bit_size == else_def->bit_size);
 153    nir_ssa_dest_init(&phi->instr, &phi->dest,
 154                      then_def->num_components, then_def->bit_size, NULL);
 155
 156    nir_builder_instr_insert(build, &phi->instr);
 157
 158    return &phi->dest.ssa;
 159 }
 160
 161 static inline nir_loop *
 162 nir_push_loop(nir_builder *build)
 163 {
 164    nir_loop *loop = nir_loop_create(build->shader);
 165    nir_builder_cf_insert(build, &loop->cf_node);
 166    build->cursor = nir_before_cf_list(&loop->body);
 167    return loop;
 168 }
 169
 170 static inline void
 171 nir_pop_loop(nir_builder *build, nir_loop *loop)
 172 {
 173    if (loop) {
 174       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 175    } else {
 176       nir_block *block = nir_cursor_current_block(build->cursor);
 177       loop = nir_cf_node_as_loop(block->cf_node.parent);
 178    }
 179    build->cursor = nir_after_cf_node(&loop->cf_node);
 180 }
 181
 182 static inline nir_ssa_def *
 183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 184 {
 185    nir_ssa_undef_instr *undef =
 186       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 187    if (!undef)
 188       return NULL;
 189
 190    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 191
 192    return &undef->def;
 193 }
 194
 195 static inline nir_ssa_def *
 196 nir_build_imm(nir_builder *build, unsigned num_components,
 197               unsigned bit_size, const nir_const_value *value)
 198 {
 199    nir_load_const_instr *load_const =
 200       nir_load_const_instr_create(build->shader, num_components, bit_size);
 201    if (!load_const)
 202       return NULL;
 203
 204    memcpy(load_const->value, value, sizeof(nir_const_value) * num_components);
 205
 206    nir_builder_instr_insert(build, &load_const->instr);
 207
 208    return &load_const->def;
 209 }
 210
 211 static inline nir_ssa_def *
 212 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
 213 {
 214    nir_load_const_instr *load_const =
 215       nir_load_const_instr_create(build->shader, num_components, bit_size);
 216
 217    /* nir_load_const_instr_create uses rzalloc so it's already zero */
 218
 219    nir_builder_instr_insert(build, &load_const->instr);
 220
 221    return &load_const->def;
 222 }
 223
 224 static inline nir_ssa_def *
 225 nir_imm_bool(nir_builder *build, bool x)
 226 {
 227    nir_const_value v;
 228
 229    memset(&v, 0, sizeof(v));
 230    v.b = x;
 231
 232    return nir_build_imm(build, 1, 1, &v);
 233 }
 234
 235 static inline nir_ssa_def *
 236 nir_imm_true(nir_builder *build)
 237 {
 238    return nir_imm_bool(build, true);
 239 }
 240
 241 static inline nir_ssa_def *
 242 nir_imm_false(nir_builder *build)
 243 {
 244    return nir_imm_bool(build, false);
 245 }
 246
 247 static inline nir_ssa_def *
 248 nir_imm_float16(nir_builder *build, float x)
 249 {
 250    nir_const_value v;
 251
 252    memset(&v, 0, sizeof(v));
 253    v.u16 = _mesa_float_to_half(x);
 254
 255    return nir_build_imm(build, 1, 16, &v);
 256 }
 257
 258 static inline nir_ssa_def *
 259 nir_imm_float(nir_builder *build, float x)
 260 {
 261    nir_const_value v;
 262
 263    memset(&v, 0, sizeof(v));
 264    v.f32 = x;
 265
 266    return nir_build_imm(build, 1, 32, &v);
 267 }
 268
 269 static inline nir_ssa_def *
 270 nir_imm_double(nir_builder *build, double x)
 271 {
 272    nir_const_value v;
 273
 274    memset(&v, 0, sizeof(v));
 275    v.f64 = x;
 276
 277    return nir_build_imm(build, 1, 64, &v);
 278 }
 279
 280 static inline nir_ssa_def *
 281 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 282 {
 283    switch (bit_size) {
 284    case 16:
 285       return nir_imm_float16(build, x);
 286    case 32:
 287       return nir_imm_float(build, x);
 288    case 64:
 289       return nir_imm_double(build, x);
 290    }
 291
 292    unreachable("unknown float immediate bit size");
 293 }
 294
 295 static inline nir_ssa_def *
 296 nir_imm_vec2(nir_builder *build, float x, float y)
 297 {
 298    nir_const_value v[2];
 299
 300    memset(v, 0, sizeof(v));
 301    v[0].f32 = x;
 302    v[1].f32 = y;
 303
 304    return nir_build_imm(build, 2, 32, v);
 305 }
 306
 307 static inline nir_ssa_def *
 308 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 309 {
 310    nir_const_value v[4];
 311
 312    memset(v, 0, sizeof(v));
 313    v[0].f32 = x;
 314    v[1].f32 = y;
 315    v[2].f32 = z;
 316    v[3].f32 = w;
 317
 318    return nir_build_imm(build, 4, 32, v);
 319 }
 320
 321 static inline nir_ssa_def *
 322 nir_imm_ivec2(nir_builder *build, int x, int y)
 323 {
 324    nir_const_value v[2];
 325
 326    memset(v, 0, sizeof(v));
 327    v[0].i32 = x;
 328    v[1].i32 = y;
 329
 330    return nir_build_imm(build, 2, 32, v);
 331 }
 332
 333 static inline nir_ssa_def *
 334 nir_imm_int(nir_builder *build, int x)
 335 {
 336    nir_const_value v;
 337
 338    memset(&v, 0, sizeof(v));
 339    v.i32 = x;
 340
 341    return nir_build_imm(build, 1, 32, &v);
 342 }
 343
 344 static inline nir_ssa_def *
 345 nir_imm_int64(nir_builder *build, int64_t x)
 346 {
 347    nir_const_value v;
 348
 349    memset(&v, 0, sizeof(v));
 350    v.i64 = x;
 351
 352    return nir_build_imm(build, 1, 64, &v);
 353 }
 354
 355 static inline nir_ssa_def *
 356 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 357 {
 358    nir_const_value v;
 359
 360    memset(&v, 0, sizeof(v));
 361    assert(bit_size <= 64);
 362    if (bit_size == 1)
 363       v.b = x & 1;
 364    else
 365       v.i64 = x & (~0ull >> (64 - bit_size));
 366
 367    return nir_build_imm(build, 1, bit_size, &v);
 368 }
 369
 370 static inline nir_ssa_def *
 371 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 372 {
 373    nir_const_value v[4];
 374
 375    memset(v, 0, sizeof(v));
 376    v[0].i32 = x;
 377    v[1].i32 = y;
 378    v[2].i32 = z;
 379    v[3].i32 = w;
 380
 381    return nir_build_imm(build, 4, 32, v);
 382 }
 383
 384 static inline nir_ssa_def *
 385 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 386 {
 387    /* We use a 0/-1 convention for all booleans regardless of size */
 388    return nir_imm_intN_t(build, -(int)x, bit_size);
 389 }
 390
 391 static inline nir_ssa_def *
 392 nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr)
 393 {
 394    const nir_op_info *op_info = &nir_op_infos[instr->op];
 395
 396    instr->exact = build->exact;
 397
 398    /* Guess the number of components the destination temporary should have
 399     * based on our input sizes, if it's not fixed for the op.
 400     */
 401    unsigned num_components = op_info->output_size;
 402    if (num_components == 0) {
 403       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 404          if (op_info->input_sizes[i] == 0)
 405             num_components = MAX2(num_components,
 406                                   instr->src[i].src.ssa->num_components);
 407       }
 408    }
 409    assert(num_components != 0);
 410
 411    /* Figure out the bitwidth based on the source bitwidth if the instruction
 412     * is variable-width.
 413     */
 414    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 415    if (bit_size == 0) {
 416       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 417          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 418          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 419             if (bit_size)
 420                assert(src_bit_size == bit_size);
 421             else
 422                bit_size = src_bit_size;
 423          } else {
 424             assert(src_bit_size ==
 425                nir_alu_type_get_type_size(op_info->input_types[i]));
 426          }
 427       }
 428    }
 429
 430    /* When in doubt, assume 32. */
 431    if (bit_size == 0)
 432       bit_size = 32;
 433
 434    /* Make sure we don't swizzle from outside of our source vector (like if a
 435     * scalar value was passed into a multiply with a vector).
 436     */
 437    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 438       for (unsigned j = instr->src[i].src.ssa->num_components;
 439            j < NIR_MAX_VEC_COMPONENTS; j++) {
 440          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 441       }
 442    }
 443
 444    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 445                      bit_size, NULL);
 446    instr->dest.write_mask = (1 << num_components) - 1;
 447
 448    nir_builder_instr_insert(build, &instr->instr);
 449
 450    return &instr->dest.dest.ssa;
 451 }
 452
 453 static inline nir_ssa_def *
 454 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 455               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 456 {
 457    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 458    if (!instr)
 459       return NULL;
 460
 461    instr->src[0].src = nir_src_for_ssa(src0);
 462    if (src1)
 463       instr->src[1].src = nir_src_for_ssa(src1);
 464    if (src2)
 465       instr->src[2].src = nir_src_for_ssa(src2);
 466    if (src3)
 467       instr->src[3].src = nir_src_for_ssa(src3);
 468
 469    return nir_builder_alu_instr_finish_and_insert(build, instr);
 470 }
 471
 472 /* for the couple special cases with more than 4 src args: */
 473 static inline nir_ssa_def *
 474 nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs)
 475 {
 476    const nir_op_info *op_info = &nir_op_infos[op];
 477    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 478    if (!instr)
 479       return NULL;
 480
 481    for (unsigned i = 0; i < op_info->num_inputs; i++)
 482       instr->src[i].src = nir_src_for_ssa(srcs[i]);
 483
 484    return nir_builder_alu_instr_finish_and_insert(build, instr);
 485 }
 486
 487 #include "nir_builder_opcodes.h"
 488
 489 static inline nir_ssa_def *
 490 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 491 {
 492    return nir_build_alu_src_arr(build, nir_op_vec(num_components), comp);
 493 }
 494
 495 /**
 496  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 497  */
 498 static inline nir_ssa_def *
 499 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 500 {
 501    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 502    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 503                      nir_src_bit_size(src.src), NULL);
 504    mov->exact = build->exact;
 505    mov->dest.write_mask = (1 << num_components) - 1;
 506    mov->src[0] = src;
 507    nir_builder_instr_insert(build, &mov->instr);
 508
 509    return &mov->dest.dest.ssa;
 510 }
 511
 512 static inline nir_ssa_def *
 513 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 514 {
 515    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 516    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 517                      nir_src_bit_size(src.src), NULL);
 518    mov->exact = build->exact;
 519    mov->dest.write_mask = (1 << num_components) - 1;
 520    mov->src[0] = src;
 521    nir_builder_instr_insert(build, &mov->instr);
 522
 523    return &mov->dest.dest.ssa;
 524 }
 525
 526 /**
 527  * Construct an fmov or imov that reswizzles the source's components.
 528  */
 529 static inline nir_ssa_def *
 530 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 531             unsigned num_components)
 532 {
 533    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 534    nir_alu_src alu_src = { NIR_SRC_INIT };
 535    alu_src.src = nir_src_for_ssa(src);
 536
 537    bool is_identity_swizzle = true;
 538    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 539       if (swiz[i] != i)
 540          is_identity_swizzle = false;
 541       alu_src.swizzle[i] = swiz[i];
 542    }
 543
 544    if (num_components == src->num_components && is_identity_swizzle)
 545       return src;
 546
 547    return nir_imov_alu(build, alu_src, num_components);
 548 }
 549
 550 /* Selects the right fdot given the number of components in each source. */
 551 static inline nir_ssa_def *
 552 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 553 {
 554    assert(src0->num_components == src1->num_components);
 555    switch (src0->num_components) {
 556    case 1: return nir_fmul(build, src0, src1);
 557    case 2: return nir_fdot2(build, src0, src1);
 558    case 3: return nir_fdot3(build, src0, src1);
 559    case 4: return nir_fdot4(build, src0, src1);
 560    default:
 561       unreachable("bad component size");
 562    }
 563
 564    return NULL;
 565 }
 566
 567 static inline nir_ssa_def *
 568 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 569 {
 570    switch (src0->num_components) {
 571    case 1: return nir_ine(b, src0, src1);
 572    case 2: return nir_bany_inequal2(b, src0, src1);
 573    case 3: return nir_bany_inequal3(b, src0, src1);
 574    case 4: return nir_bany_inequal4(b, src0, src1);
 575    default:
 576       unreachable("bad component size");
 577    }
 578 }
 579
 580 static inline nir_ssa_def *
 581 nir_bany(nir_builder *b, nir_ssa_def *src)
 582 {
 583    return nir_bany_inequal(b, src, nir_imm_false(b));
 584 }
 585
 586 static inline nir_ssa_def *
 587 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 588 {
 589    return nir_swizzle(b, def, &c, 1);
 590 }
 591
 592 static inline nir_ssa_def *
 593 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 594 {
 595    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 596
 597    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 598       if ((mask & (1 << i)) == 0)
 599          continue;
 600       swizzle[num_channels++] = i;
 601    }
 602
 603    return nir_swizzle(b, def, swizzle, num_channels);
 604 }
 605
 606 static inline nir_ssa_def *
 607 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
 608                            unsigned start, unsigned end)
 609 {
 610    if (start == end - 1) {
 611       return nir_channel(b, vec, start);
 612    } else {
 613       unsigned mid = start + (end - start) / 2;
 614       return nir_bcsel(b, nir_ilt(b, c, nir_imm_int(b, mid)),
 615                        _nir_vector_extract_helper(b, vec, c, start, mid),
 616                        _nir_vector_extract_helper(b, vec, c, mid, end));
 617    }
 618 }
 619
 620 static inline nir_ssa_def *
 621 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
 622 {
 623    nir_src c_src = nir_src_for_ssa(c);
 624    if (nir_src_is_const(c_src)) {
 625       unsigned c_const = nir_src_as_uint(c_src);
 626       if (c_const < vec->num_components)
 627          return nir_channel(b, vec, c_const);
 628       else
 629          return nir_ssa_undef(b, 1, vec->bit_size);
 630    } else {
 631       return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
 632    }
 633 }
 634
 635 static inline nir_ssa_def *
 636 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 637 {
 638    if (x->bit_size == dest_bit_size)
 639       return x;
 640
 641    switch (dest_bit_size) {
 642    case 64: return nir_i2i64(build, x);
 643    case 32: return nir_i2i32(build, x);
 644    case 16: return nir_i2i16(build, x);
 645    case 8:  return nir_i2i8(build, x);
 646    default: unreachable("Invalid bit size");
 647    }
 648 }
 649
 650 static inline nir_ssa_def *
 651 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 652 {
 653    if (x->bit_size == dest_bit_size)
 654       return x;
 655
 656    switch (dest_bit_size) {
 657    case 64: return nir_u2u64(build, x);
 658    case 32: return nir_u2u32(build, x);
 659    case 16: return nir_u2u16(build, x);
 660    case 8:  return nir_u2u8(build, x);
 661    default: unreachable("Invalid bit size");
 662    }
 663 }
 664
 665 static inline nir_ssa_def *
 666 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 667 {
 668    assert(x->bit_size <= 64);
 669    if (x->bit_size < 64)
 670       y &= (1ull << x->bit_size) - 1;
 671
 672    if (y == 0) {
 673       return x;
 674    } else {
 675       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 676    }
 677 }
 678
 679 static inline nir_ssa_def *
 680 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 681 {
 682    assert(x->bit_size <= 64);
 683    if (x->bit_size < 64)
 684       y &= (1ull << x->bit_size) - 1;
 685
 686    if (y == 0) {
 687       return nir_imm_intN_t(build, 0, x->bit_size);
 688    } else if (y == 1) {
 689       return x;
 690    } else if (util_is_power_of_two_or_zero64(y)) {
 691       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 692    } else {
 693       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 694    }
 695 }
 696
 697 static inline nir_ssa_def *
 698 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 699 {
 700    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 701 }
 702
 703 static inline nir_ssa_def *
 704 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 705 {
 706    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 707 }
 708
 709 static inline nir_ssa_def *
 710 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 711 {
 712    assert(src->num_components * src->bit_size == dest_bit_size);
 713
 714    switch (dest_bit_size) {
 715    case 64:
 716       switch (src->bit_size) {
 717       case 32: return nir_pack_64_2x32(b, src);
 718       case 16: return nir_pack_64_4x16(b, src);
 719       default: break;
 720       }
 721       break;
 722
 723    case 32:
 724       if (src->bit_size == 16)
 725          return nir_pack_32_2x16(b, src);
 726       break;
 727
 728    default:
 729       break;
 730    }
 731
 732    /* If we got here, we have no dedicated unpack opcode. */
 733    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 734    for (unsigned i = 0; i < src->num_components; i++) {
 735       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 736       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 737       dest = nir_ior(b, dest, val);
 738    }
 739    return dest;
 740 }
 741
 742 static inline nir_ssa_def *
 743 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 744 {
 745    assert(src->num_components == 1);
 746    assert(src->bit_size > dest_bit_size);
 747    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 748    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 749
 750    switch (src->bit_size) {
 751    case 64:
 752       switch (dest_bit_size) {
 753       case 32: return nir_unpack_64_2x32(b, src);
 754       case 16: return nir_unpack_64_4x16(b, src);
 755       default: break;
 756       }
 757       break;
 758
 759    case 32:
 760       if (dest_bit_size == 16)
 761          return nir_unpack_32_2x16(b, src);
 762       break;
 763
 764    default:
 765       break;
 766    }
 767
 768    /* If we got here, we have no dedicated unpack opcode. */
 769    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 770    for (unsigned i = 0; i < dest_num_components; i++) {
 771       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 772       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 773    }
 774    return nir_vec(b, dest_comps, dest_num_components);
 775 }
 776
 777 static inline nir_ssa_def *
 778 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 779 {
 780    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 781    const unsigned dest_num_components =
 782       (src->bit_size * src->num_components) / dest_bit_size;
 783    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 784
 785    if (src->bit_size > dest_bit_size) {
 786       assert(src->bit_size % dest_bit_size == 0);
 787       if (src->num_components == 1) {
 788          return nir_unpack_bits(b, src, dest_bit_size);
 789       } else {
 790          const unsigned divisor = src->bit_size / dest_bit_size;
 791          assert(src->num_components * divisor == dest_num_components);
 792          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 793          for (unsigned i = 0; i < src->num_components; i++) {
 794             nir_ssa_def *unpacked =
 795                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 796             assert(unpacked->num_components == divisor);
 797             for (unsigned j = 0; j < divisor; j++)
 798                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 799          }
 800          return nir_vec(b, dest, dest_num_components);
 801       }
 802    } else if (src->bit_size < dest_bit_size) {
 803       assert(dest_bit_size % src->bit_size == 0);
 804       if (dest_num_components == 1) {
 805          return nir_pack_bits(b, src, dest_bit_size);
 806       } else {
 807          const unsigned divisor = dest_bit_size / src->bit_size;
 808          assert(src->num_components == dest_num_components * divisor);
 809          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 810          for (unsigned i = 0; i < dest_num_components; i++) {
 811             nir_component_mask_t src_mask =
 812                ((1 << divisor) - 1) << (i * divisor);
 813             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 814                                        dest_bit_size);
 815          }
 816          return nir_vec(b, dest, dest_num_components);
 817       }
 818    } else {
 819       assert(src->bit_size == dest_bit_size);
 820       return src;
 821    }
 822 }
 823
 824 /**
 825  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 826  * nir_build_alu()-based builder calls.
 827  *
 828  * See nir_ssa_for_alu_src() for alu instructions.
 829  */
 830 static inline nir_ssa_def *
 831 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 832 {
 833    if (src.is_ssa && src.ssa->num_components == num_components)
 834       return src.ssa;
 835
 836    nir_alu_src alu = { NIR_SRC_INIT };
 837    alu.src = src;
 838    for (int j = 0; j < 4; j++)
 839       alu.swizzle[j] = j;
 840
 841    return nir_imov_alu(build, alu, num_components);
 842 }
 843
 844 /**
 845  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 846  * nir_alu_src's swizzle.
 847  */
 848 static inline nir_ssa_def *
 849 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 850 {
 851    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 852    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 853       trivial_swizzle[i] = i;
 854    nir_alu_src *src = &instr->src[srcn];
 855    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 856
 857    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 858        !src->abs && !src->negate &&
 859        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 860       return src->src.ssa;
 861
 862    return nir_imov_alu(build, *src, num_components);
 863 }
 864
 865 static inline unsigned
 866 nir_get_ptr_bitsize(nir_builder *build)
 867 {
 868    if (build->shader->info.stage == MESA_SHADER_KERNEL)
 869       return build->shader->info.cs.ptr_size;
 870    return 32;
 871 }
 872
 873 static inline nir_deref_instr *
 874 nir_build_deref_var(nir_builder *build, nir_variable *var)
 875 {
 876    nir_deref_instr *deref =
 877       nir_deref_instr_create(build->shader, nir_deref_type_var);
 878
 879    deref->mode = var->data.mode;
 880    deref->type = var->type;
 881    deref->var = var;
 882
 883    nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
 884                      nir_get_ptr_bitsize(build), NULL);
 885
 886    nir_builder_instr_insert(build, &deref->instr);
 887
 888    return deref;
 889 }
 890
 891 static inline nir_deref_instr *
 892 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 893                       nir_ssa_def *index)
 894 {
 895    assert(glsl_type_is_array(parent->type) ||
 896           glsl_type_is_matrix(parent->type) ||
 897           glsl_type_is_vector(parent->type));
 898
 899    assert(index->bit_size == parent->dest.ssa.bit_size);
 900
 901    nir_deref_instr *deref =
 902       nir_deref_instr_create(build->shader, nir_deref_type_array);
 903
 904    deref->mode = parent->mode;
 905    deref->type = glsl_get_array_element(parent->type);
 906    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 907    deref->arr.index = nir_src_for_ssa(index);
 908
 909    nir_ssa_dest_init(&deref->instr, &deref->dest,
 910                      parent->dest.ssa.num_components,
 911                      parent->dest.ssa.bit_size, NULL);
 912
 913    nir_builder_instr_insert(build, &deref->instr);
 914
 915    return deref;
 916 }
 917
 918 static inline nir_deref_instr *
 919 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
 920                           int64_t index)
 921 {
 922    assert(parent->dest.is_ssa);
 923    nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
 924                                          parent->dest.ssa.bit_size);
 925
 926    return nir_build_deref_array(build, parent, idx_ssa);
 927 }
 928
 929 static inline nir_deref_instr *
 930 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
 931                              nir_ssa_def *index)
 932 {
 933    assert(parent->deref_type == nir_deref_type_array ||
 934           parent->deref_type == nir_deref_type_ptr_as_array ||
 935           parent->deref_type == nir_deref_type_cast);
 936
 937    assert(index->bit_size == parent->dest.ssa.bit_size);
 938
 939    nir_deref_instr *deref =
 940       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
 941
 942    deref->mode = parent->mode;
 943    deref->type = parent->type;
 944    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 945    deref->arr.index = nir_src_for_ssa(index);
 946
 947    nir_ssa_dest_init(&deref->instr, &deref->dest,
 948                      parent->dest.ssa.num_components,
 949                      parent->dest.ssa.bit_size, NULL);
 950
 951    nir_builder_instr_insert(build, &deref->instr);
 952
 953    return deref;
 954 }
 955
 956 static inline nir_deref_instr *
 957 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 958 {
 959    assert(glsl_type_is_array(parent->type) ||
 960           glsl_type_is_matrix(parent->type));
 961
 962    nir_deref_instr *deref =
 963       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 964
 965    deref->mode = parent->mode;
 966    deref->type = glsl_get_array_element(parent->type);
 967    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 968
 969    nir_ssa_dest_init(&deref->instr, &deref->dest,
 970                      parent->dest.ssa.num_components,
 971                      parent->dest.ssa.bit_size, NULL);
 972
 973    nir_builder_instr_insert(build, &deref->instr);
 974
 975    return deref;
 976 }
 977
 978 static inline nir_deref_instr *
 979 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 980                        unsigned index)
 981 {
 982    assert(glsl_type_is_struct_or_ifc(parent->type));
 983
 984    nir_deref_instr *deref =
 985       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 986
 987    deref->mode = parent->mode;
 988    deref->type = glsl_get_struct_field(parent->type, index);
 989    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 990    deref->strct.index = index;
 991
 992    nir_ssa_dest_init(&deref->instr, &deref->dest,
 993                      parent->dest.ssa.num_components,
 994                      parent->dest.ssa.bit_size, NULL);
 995
 996    nir_builder_instr_insert(build, &deref->instr);
 997
 998    return deref;
 999 }
1000
1001 static inline nir_deref_instr *
1002 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
1003                      nir_variable_mode mode, const struct glsl_type *type,
1004                      unsigned ptr_stride)
1005 {
1006    nir_deref_instr *deref =
1007       nir_deref_instr_create(build->shader, nir_deref_type_cast);
1008
1009    deref->mode = mode;
1010    deref->type = type;
1011    deref->parent = nir_src_for_ssa(parent);
1012    deref->cast.ptr_stride = ptr_stride;
1013
1014    nir_ssa_dest_init(&deref->instr, &deref->dest,
1015                      parent->num_components, parent->bit_size, NULL);
1016
1017    nir_builder_instr_insert(build, &deref->instr);
1018
1019    return deref;
1020 }
1021
1022 /** Returns a deref that follows another but starting from the given parent
1023  *
1024  * The new deref will be the same type and take the same array or struct index
1025  * as the leader deref but it may have a different parent.  This is very
1026  * useful for walking deref paths.
1027  */
1028 static inline nir_deref_instr *
1029 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1030                          nir_deref_instr *leader)
1031 {
1032    /* If the derefs would have the same parent, don't make a new one */
1033    assert(leader->parent.is_ssa);
1034    if (leader->parent.ssa == &parent->dest.ssa)
1035       return leader;
1036
1037    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1038
1039    switch (leader->deref_type) {
1040    case nir_deref_type_var:
1041       unreachable("A var dereference cannot have a parent");
1042       break;
1043
1044    case nir_deref_type_array:
1045    case nir_deref_type_array_wildcard:
1046       assert(glsl_type_is_matrix(parent->type) ||
1047              glsl_type_is_array(parent->type) ||
1048              (leader->deref_type == nir_deref_type_array &&
1049               glsl_type_is_vector(parent->type)));
1050       assert(glsl_get_length(parent->type) ==
1051              glsl_get_length(leader_parent->type));
1052
1053       if (leader->deref_type == nir_deref_type_array) {
1054          assert(leader->arr.index.is_ssa);
1055          nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1056                                          parent->dest.ssa.bit_size);
1057          return nir_build_deref_array(b, parent, index);
1058       } else {
1059          return nir_build_deref_array_wildcard(b, parent);
1060       }
1061
1062    case nir_deref_type_struct:
1063       assert(glsl_type_is_struct_or_ifc(parent->type));
1064       assert(glsl_get_length(parent->type) ==
1065              glsl_get_length(leader_parent->type));
1066
1067       return nir_build_deref_struct(b, parent, leader->strct.index);
1068
1069    default:
1070       unreachable("Invalid deref instruction type");
1071    }
1072 }
1073
1074 static inline nir_ssa_def *
1075 nir_load_reg(nir_builder *build, nir_register *reg)
1076 {
1077    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1078 }
1079
1080 static inline nir_ssa_def *
1081 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1082                            enum gl_access_qualifier access)
1083 {
1084    nir_intrinsic_instr *load =
1085       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1086    load->num_components = glsl_get_vector_elements(deref->type);
1087    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1088    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1089                      glsl_get_bit_size(deref->type), NULL);
1090    nir_intrinsic_set_access(load, access);
1091    nir_builder_instr_insert(build, &load->instr);
1092    return &load->dest.ssa;
1093 }
1094
1095 static inline nir_ssa_def *
1096 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1097 {
1098    return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1099 }
1100
1101 static inline void
1102 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1103                             nir_ssa_def *value, unsigned writemask,
1104                             enum gl_access_qualifier access)
1105 {
1106    nir_intrinsic_instr *store =
1107       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1108    store->num_components = glsl_get_vector_elements(deref->type);
1109    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1110    store->src[1] = nir_src_for_ssa(value);
1111    nir_intrinsic_set_write_mask(store,
1112                                 writemask & ((1 << store->num_components) - 1));
1113    nir_intrinsic_set_access(store, access);
1114    nir_builder_instr_insert(build, &store->instr);
1115 }
1116
1117 static inline void
1118 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1119                 nir_ssa_def *value, unsigned writemask)
1120 {
1121    nir_store_deref_with_access(build, deref, value, writemask,
1122                                (enum gl_access_qualifier)0);
1123 }
1124
1125 static inline void
1126 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1127 {
1128    nir_intrinsic_instr *copy =
1129       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1130    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1131    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1132    nir_builder_instr_insert(build, &copy->instr);
1133 }
1134
1135 static inline nir_ssa_def *
1136 nir_load_var(nir_builder *build, nir_variable *var)
1137 {
1138    return nir_load_deref(build, nir_build_deref_var(build, var));
1139 }
1140
1141 static inline void
1142 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1143               unsigned writemask)
1144 {
1145    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1146 }
1147
1148 static inline void
1149 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1150 {
1151    nir_copy_deref(build, nir_build_deref_var(build, dest),
1152                          nir_build_deref_var(build, src));
1153 }
1154
1155 static inline nir_ssa_def *
1156 nir_load_param(nir_builder *build, uint32_t param_idx)
1157 {
1158    assert(param_idx < build->impl->function->num_params);
1159    nir_parameter *param = &build->impl->function->params[param_idx];
1160
1161    nir_intrinsic_instr *load =
1162       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1163    nir_intrinsic_set_param_idx(load, param_idx);
1164    load->num_components = param->num_components;
1165    nir_ssa_dest_init(&load->instr, &load->dest,
1166                      param->num_components, param->bit_size, NULL);
1167    nir_builder_instr_insert(build, &load->instr);
1168    return &load->dest.ssa;
1169 }
1170
1171 #include "nir_builder_opcodes.h"
1172
1173 static inline nir_ssa_def *
1174 nir_f2b(nir_builder *build, nir_ssa_def *f)
1175 {
1176    return nir_f2b1(build, f);
1177 }
1178
1179 static inline nir_ssa_def *
1180 nir_i2b(nir_builder *build, nir_ssa_def *i)
1181 {
1182    return nir_i2b1(build, i);
1183 }
1184
1185 static inline nir_ssa_def *
1186 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1187 {
1188    switch (bit_size) {
1189    case 64: return nir_b2f64(build, b);
1190    case 32: return nir_b2f32(build, b);
1191    case 16: return nir_b2f16(build, b);
1192    default:
1193       unreachable("Invalid bit-size");
1194    };
1195 }
1196
1197 static inline nir_ssa_def *
1198 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1199                      unsigned interp_mode)
1200 {
1201    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1202    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1203    nir_intrinsic_set_interp_mode(bary, interp_mode);
1204    nir_builder_instr_insert(build, &bary->instr);
1205    return &bary->dest.ssa;
1206 }
1207
1208 static inline void
1209 nir_jump(nir_builder *build, nir_jump_type jump_type)
1210 {
1211    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1212    nir_builder_instr_insert(build, &jump->instr);
1213 }
1214
1215 static inline nir_ssa_def *
1216 nir_compare_func(nir_builder *b, enum compare_func func,
1217                  nir_ssa_def *src0, nir_ssa_def *src1)
1218 {
1219    switch (func) {
1220    case COMPARE_FUNC_NEVER:
1221       return nir_imm_int(b, 0);
1222    case COMPARE_FUNC_ALWAYS:
1223       return nir_imm_int(b, ~0);
1224    case COMPARE_FUNC_EQUAL:
1225       return nir_feq(b, src0, src1);
1226    case COMPARE_FUNC_NOTEQUAL:
1227       return nir_fne(b, src0, src1);
1228    case COMPARE_FUNC_GREATER:
1229       return nir_flt(b, src1, src0);
1230    case COMPARE_FUNC_GEQUAL:
1231       return nir_fge(b, src0, src1);
1232    case COMPARE_FUNC_LESS:
1233       return nir_flt(b, src0, src1);
1234    case COMPARE_FUNC_LEQUAL:
1235       return nir_fge(b, src1, src0);
1236    }
1237    unreachable("bad compare func");
1238 }
1239
1240 #endif /* NIR_BUILDER_H */