compiler: Add a system value for the line coord
[mesa.git] / src / compiler / nir / nir_divergence_analysis.c
1 /*
2 * Copyright © 2018 Valve Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 #include "nir.h"
26
27 /* This pass computes for each ssa definition if it is uniform.
28 * That is, the variable has the same value for all invocations
29 * of the group.
30 *
31 * This divergence analysis pass expects the shader to be in LCSSA-form.
32 *
33 * This algorithm implements "The Simple Divergence Analysis" from
34 * Diogo Sampaio, Rafael De Souza, Sylvain Collange, Fernando Magno Quintão Pereira.
35 * Divergence Analysis. ACM Transactions on Programming Languages and Systems (TOPLAS),
36 * ACM, 2013, 35 (4), pp.13:1-13:36. <10.1145/2523815>. <hal-00909072v2>
37 */
38
39 struct divergence_state {
40 const nir_divergence_options options;
41 const gl_shader_stage stage;
42
43 /** current control flow state */
44 /* True if some loop-active invocations might take a different control-flow path.
45 * A divergent break does not cause subsequent control-flow to be considered
46 * divergent because those invocations are no longer active in the loop.
47 * For a divergent if, both sides are considered divergent flow because
48 * the other side is still loop-active. */
49 bool divergent_loop_cf;
50 /* True if a divergent continue happened since the loop header */
51 bool divergent_loop_continue;
52 /* True if a divergent break happened since the loop header */
53 bool divergent_loop_break;
54
55 /* True if we visit the block for the fist time */
56 bool first_visit;
57 };
58
59 static bool
60 visit_cf_list(struct exec_list *list, struct divergence_state *state);
61
62 static bool
63 visit_alu(nir_alu_instr *instr)
64 {
65 if (instr->dest.dest.ssa.divergent)
66 return false;
67
68 unsigned num_src = nir_op_infos[instr->op].num_inputs;
69
70 for (unsigned i = 0; i < num_src; i++) {
71 if (instr->src[i].src.ssa->divergent) {
72 instr->dest.dest.ssa.divergent = true;
73 return true;
74 }
75 }
76
77 return false;
78 }
79
80 static bool
81 visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state)
82 {
83 if (!nir_intrinsic_infos[instr->intrinsic].has_dest)
84 return false;
85
86 if (instr->dest.ssa.divergent)
87 return false;
88
89 nir_divergence_options options = state->options;
90 gl_shader_stage stage = state->stage;
91 bool is_divergent = false;
92 switch (instr->intrinsic) {
93 /* Intrinsics which are always uniform */
94 case nir_intrinsic_shader_clock:
95 case nir_intrinsic_ballot:
96 case nir_intrinsic_read_invocation:
97 case nir_intrinsic_read_first_invocation:
98 case nir_intrinsic_vote_any:
99 case nir_intrinsic_vote_all:
100 case nir_intrinsic_vote_feq:
101 case nir_intrinsic_vote_ieq:
102 case nir_intrinsic_load_work_dim:
103 case nir_intrinsic_load_work_group_id:
104 case nir_intrinsic_load_num_work_groups:
105 case nir_intrinsic_load_local_group_size:
106 case nir_intrinsic_load_subgroup_id:
107 case nir_intrinsic_load_num_subgroups:
108 case nir_intrinsic_load_subgroup_size:
109 case nir_intrinsic_load_subgroup_eq_mask:
110 case nir_intrinsic_load_subgroup_ge_mask:
111 case nir_intrinsic_load_subgroup_gt_mask:
112 case nir_intrinsic_load_subgroup_le_mask:
113 case nir_intrinsic_load_subgroup_lt_mask:
114 case nir_intrinsic_first_invocation:
115 case nir_intrinsic_load_base_instance:
116 case nir_intrinsic_load_base_vertex:
117 case nir_intrinsic_load_first_vertex:
118 case nir_intrinsic_load_draw_id:
119 case nir_intrinsic_load_is_indexed_draw:
120 case nir_intrinsic_load_viewport_scale:
121 case nir_intrinsic_load_alpha_ref_float:
122 case nir_intrinsic_load_user_clip_plane:
123 case nir_intrinsic_load_viewport_x_scale:
124 case nir_intrinsic_load_viewport_y_scale:
125 case nir_intrinsic_load_viewport_z_scale:
126 case nir_intrinsic_load_viewport_offset:
127 case nir_intrinsic_load_viewport_z_offset:
128 case nir_intrinsic_load_blend_const_color_a_float:
129 case nir_intrinsic_load_blend_const_color_b_float:
130 case nir_intrinsic_load_blend_const_color_g_float:
131 case nir_intrinsic_load_blend_const_color_r_float:
132 case nir_intrinsic_load_blend_const_color_rgba:
133 case nir_intrinsic_load_blend_const_color_aaaa8888_unorm:
134 case nir_intrinsic_load_blend_const_color_rgba8888_unorm:
135 is_divergent = false;
136 break;
137
138 /* Intrinsics with divergence depending on shader stage and hardware */
139 case nir_intrinsic_load_input:
140 is_divergent = instr->src[0].ssa->divergent;
141 if (stage == MESA_SHADER_FRAGMENT)
142 is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
143 else if (stage == MESA_SHADER_TESS_EVAL)
144 is_divergent |= !(options & nir_divergence_single_patch_per_tes_subgroup);
145 else
146 is_divergent = true;
147 break;
148 case nir_intrinsic_load_per_vertex_input:
149 is_divergent = instr->src[0].ssa->divergent ||
150 instr->src[1].ssa->divergent;
151 if (stage == MESA_SHADER_TESS_CTRL)
152 is_divergent |= !(options & nir_divergence_single_patch_per_tcs_subgroup);
153 if (stage == MESA_SHADER_TESS_EVAL)
154 is_divergent |= !(options & nir_divergence_single_patch_per_tes_subgroup);
155 else
156 is_divergent = true;
157 break;
158 case nir_intrinsic_load_input_vertex:
159 is_divergent = instr->src[1].ssa->divergent;
160 assert(stage == MESA_SHADER_FRAGMENT);
161 is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
162 break;
163 case nir_intrinsic_load_output:
164 assert(stage == MESA_SHADER_TESS_CTRL || stage == MESA_SHADER_FRAGMENT);
165 is_divergent = instr->src[0].ssa->divergent;
166 if (stage == MESA_SHADER_TESS_CTRL)
167 is_divergent |= !(options & nir_divergence_single_patch_per_tcs_subgroup);
168 else
169 is_divergent = true;
170 break;
171 case nir_intrinsic_load_per_vertex_output:
172 assert(stage == MESA_SHADER_TESS_CTRL);
173 is_divergent = instr->src[0].ssa->divergent ||
174 instr->src[1].ssa->divergent ||
175 !(options & nir_divergence_single_patch_per_tcs_subgroup);
176 break;
177 case nir_intrinsic_load_layer_id:
178 case nir_intrinsic_load_front_face:
179 assert(stage == MESA_SHADER_FRAGMENT);
180 is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
181 break;
182 case nir_intrinsic_load_view_index:
183 assert(stage != MESA_SHADER_COMPUTE && stage != MESA_SHADER_KERNEL);
184 if (options & nir_divergence_view_index_uniform)
185 is_divergent = false;
186 else if (stage == MESA_SHADER_FRAGMENT)
187 is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
188 break;
189 case nir_intrinsic_load_fs_input_interp_deltas:
190 assert(stage == MESA_SHADER_FRAGMENT);
191 is_divergent = instr->src[0].ssa->divergent;
192 is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
193 break;
194 case nir_intrinsic_load_primitive_id:
195 if (stage == MESA_SHADER_FRAGMENT)
196 is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
197 else if (stage == MESA_SHADER_TESS_CTRL)
198 is_divergent = !(options & nir_divergence_single_patch_per_tcs_subgroup);
199 else if (stage == MESA_SHADER_TESS_EVAL)
200 is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
201 else if (stage == MESA_SHADER_GEOMETRY)
202 is_divergent = true;
203 else
204 unreachable("Invalid stage for load_primitive_id");
205 break;
206 case nir_intrinsic_load_tess_level_inner:
207 case nir_intrinsic_load_tess_level_outer:
208 if (stage == MESA_SHADER_TESS_CTRL)
209 is_divergent = !(options & nir_divergence_single_patch_per_tcs_subgroup);
210 else if (stage == MESA_SHADER_TESS_EVAL)
211 is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
212 else
213 unreachable("Invalid stage for load_primitive_tess_level_*");
214 break;
215 case nir_intrinsic_load_patch_vertices_in:
216 if (stage == MESA_SHADER_TESS_EVAL)
217 is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
218 else
219 assert(stage == MESA_SHADER_TESS_CTRL);
220 break;
221
222 /* Clustered reductions are uniform if cluster_size == subgroup_size or
223 * the source is uniform and the operation is invariant.
224 * Inclusive scans are uniform if
225 * the source is uniform and the operation is invariant
226 */
227 case nir_intrinsic_reduce:
228 if (nir_intrinsic_cluster_size(instr) == 0)
229 return false;
230 /* fallthrough */
231 case nir_intrinsic_inclusive_scan: {
232 nir_op op = nir_intrinsic_reduction_op(instr);
233 is_divergent = instr->src[0].ssa->divergent;
234 if (op != nir_op_umin && op != nir_op_imin && op != nir_op_fmin &&
235 op != nir_op_umax && op != nir_op_imax && op != nir_op_fmax &&
236 op != nir_op_iand && op != nir_op_ior)
237 is_divergent = true;
238 break;
239 }
240
241 /* Intrinsics with divergence depending on sources */
242 case nir_intrinsic_ballot_bitfield_extract:
243 case nir_intrinsic_ballot_find_lsb:
244 case nir_intrinsic_ballot_find_msb:
245 case nir_intrinsic_ballot_bit_count_reduce:
246 case nir_intrinsic_shuffle_xor:
247 case nir_intrinsic_shuffle_up:
248 case nir_intrinsic_shuffle_down:
249 case nir_intrinsic_quad_broadcast:
250 case nir_intrinsic_quad_swap_horizontal:
251 case nir_intrinsic_quad_swap_vertical:
252 case nir_intrinsic_quad_swap_diagonal:
253 case nir_intrinsic_load_deref:
254 case nir_intrinsic_load_ubo:
255 case nir_intrinsic_load_ssbo:
256 case nir_intrinsic_load_shared:
257 case nir_intrinsic_load_global:
258 case nir_intrinsic_load_uniform:
259 case nir_intrinsic_load_push_constant:
260 case nir_intrinsic_load_constant:
261 case nir_intrinsic_load_sample_pos_from_id:
262 case nir_intrinsic_load_kernel_input:
263 case nir_intrinsic_image_load:
264 case nir_intrinsic_image_deref_load:
265 case nir_intrinsic_bindless_image_load:
266 case nir_intrinsic_image_samples:
267 case nir_intrinsic_image_deref_samples:
268 case nir_intrinsic_bindless_image_samples:
269 case nir_intrinsic_get_buffer_size:
270 case nir_intrinsic_image_size:
271 case nir_intrinsic_image_deref_size:
272 case nir_intrinsic_bindless_image_size:
273 case nir_intrinsic_copy_deref:
274 case nir_intrinsic_deref_buffer_array_length:
275 case nir_intrinsic_vulkan_resource_index:
276 case nir_intrinsic_vulkan_resource_reindex:
277 case nir_intrinsic_load_vulkan_descriptor:
278 case nir_intrinsic_atomic_counter_read:
279 case nir_intrinsic_atomic_counter_read_deref:
280 case nir_intrinsic_quad_swizzle_amd:
281 case nir_intrinsic_masked_swizzle_amd: {
282 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
283 for (unsigned i = 0; i < num_srcs; i++) {
284 if (instr->src[i].ssa->divergent) {
285 is_divergent = true;
286 break;
287 }
288 }
289 break;
290 }
291
292 case nir_intrinsic_shuffle:
293 is_divergent = instr->src[0].ssa->divergent &&
294 instr->src[1].ssa->divergent;
295 break;
296
297 /* Intrinsics which are always divergent */
298 case nir_intrinsic_load_color0:
299 case nir_intrinsic_load_color1:
300 case nir_intrinsic_load_param:
301 case nir_intrinsic_load_sample_id:
302 case nir_intrinsic_load_sample_id_no_per_sample:
303 case nir_intrinsic_load_sample_mask_in:
304 case nir_intrinsic_load_interpolated_input:
305 case nir_intrinsic_load_barycentric_pixel:
306 case nir_intrinsic_load_barycentric_centroid:
307 case nir_intrinsic_load_barycentric_sample:
308 case nir_intrinsic_load_barycentric_model:
309 case nir_intrinsic_load_barycentric_at_sample:
310 case nir_intrinsic_load_barycentric_at_offset:
311 case nir_intrinsic_interp_deref_at_offset:
312 case nir_intrinsic_interp_deref_at_sample:
313 case nir_intrinsic_interp_deref_at_centroid:
314 case nir_intrinsic_interp_deref_at_vertex:
315 case nir_intrinsic_load_tess_coord:
316 case nir_intrinsic_load_point_coord:
317 case nir_intrinsic_load_line_coord:
318 case nir_intrinsic_load_frag_coord:
319 case nir_intrinsic_load_sample_pos:
320 case nir_intrinsic_load_vertex_id_zero_base:
321 case nir_intrinsic_load_vertex_id:
322 case nir_intrinsic_load_instance_id:
323 case nir_intrinsic_load_invocation_id:
324 case nir_intrinsic_load_local_invocation_id:
325 case nir_intrinsic_load_local_invocation_index:
326 case nir_intrinsic_load_global_invocation_id:
327 case nir_intrinsic_load_global_invocation_index:
328 case nir_intrinsic_load_subgroup_invocation:
329 case nir_intrinsic_load_helper_invocation:
330 case nir_intrinsic_is_helper_invocation:
331 case nir_intrinsic_load_scratch:
332 case nir_intrinsic_deref_atomic_add:
333 case nir_intrinsic_deref_atomic_imin:
334 case nir_intrinsic_deref_atomic_umin:
335 case nir_intrinsic_deref_atomic_imax:
336 case nir_intrinsic_deref_atomic_umax:
337 case nir_intrinsic_deref_atomic_and:
338 case nir_intrinsic_deref_atomic_or:
339 case nir_intrinsic_deref_atomic_xor:
340 case nir_intrinsic_deref_atomic_exchange:
341 case nir_intrinsic_deref_atomic_comp_swap:
342 case nir_intrinsic_deref_atomic_fadd:
343 case nir_intrinsic_deref_atomic_fmin:
344 case nir_intrinsic_deref_atomic_fmax:
345 case nir_intrinsic_deref_atomic_fcomp_swap:
346 case nir_intrinsic_ssbo_atomic_add:
347 case nir_intrinsic_ssbo_atomic_imin:
348 case nir_intrinsic_ssbo_atomic_umin:
349 case nir_intrinsic_ssbo_atomic_imax:
350 case nir_intrinsic_ssbo_atomic_umax:
351 case nir_intrinsic_ssbo_atomic_and:
352 case nir_intrinsic_ssbo_atomic_or:
353 case nir_intrinsic_ssbo_atomic_xor:
354 case nir_intrinsic_ssbo_atomic_exchange:
355 case nir_intrinsic_ssbo_atomic_comp_swap:
356 case nir_intrinsic_ssbo_atomic_fadd:
357 case nir_intrinsic_ssbo_atomic_fmax:
358 case nir_intrinsic_ssbo_atomic_fmin:
359 case nir_intrinsic_ssbo_atomic_fcomp_swap:
360 case nir_intrinsic_image_deref_atomic_add:
361 case nir_intrinsic_image_deref_atomic_imin:
362 case nir_intrinsic_image_deref_atomic_umin:
363 case nir_intrinsic_image_deref_atomic_imax:
364 case nir_intrinsic_image_deref_atomic_umax:
365 case nir_intrinsic_image_deref_atomic_and:
366 case nir_intrinsic_image_deref_atomic_or:
367 case nir_intrinsic_image_deref_atomic_xor:
368 case nir_intrinsic_image_deref_atomic_exchange:
369 case nir_intrinsic_image_deref_atomic_comp_swap:
370 case nir_intrinsic_image_deref_atomic_fadd:
371 case nir_intrinsic_image_atomic_add:
372 case nir_intrinsic_image_atomic_imin:
373 case nir_intrinsic_image_atomic_umin:
374 case nir_intrinsic_image_atomic_imax:
375 case nir_intrinsic_image_atomic_umax:
376 case nir_intrinsic_image_atomic_and:
377 case nir_intrinsic_image_atomic_or:
378 case nir_intrinsic_image_atomic_xor:
379 case nir_intrinsic_image_atomic_exchange:
380 case nir_intrinsic_image_atomic_comp_swap:
381 case nir_intrinsic_image_atomic_fadd:
382 case nir_intrinsic_bindless_image_atomic_add:
383 case nir_intrinsic_bindless_image_atomic_imin:
384 case nir_intrinsic_bindless_image_atomic_umin:
385 case nir_intrinsic_bindless_image_atomic_imax:
386 case nir_intrinsic_bindless_image_atomic_umax:
387 case nir_intrinsic_bindless_image_atomic_and:
388 case nir_intrinsic_bindless_image_atomic_or:
389 case nir_intrinsic_bindless_image_atomic_xor:
390 case nir_intrinsic_bindless_image_atomic_exchange:
391 case nir_intrinsic_bindless_image_atomic_comp_swap:
392 case nir_intrinsic_bindless_image_atomic_fadd:
393 case nir_intrinsic_shared_atomic_add:
394 case nir_intrinsic_shared_atomic_imin:
395 case nir_intrinsic_shared_atomic_umin:
396 case nir_intrinsic_shared_atomic_imax:
397 case nir_intrinsic_shared_atomic_umax:
398 case nir_intrinsic_shared_atomic_and:
399 case nir_intrinsic_shared_atomic_or:
400 case nir_intrinsic_shared_atomic_xor:
401 case nir_intrinsic_shared_atomic_exchange:
402 case nir_intrinsic_shared_atomic_comp_swap:
403 case nir_intrinsic_shared_atomic_fadd:
404 case nir_intrinsic_shared_atomic_fmin:
405 case nir_intrinsic_shared_atomic_fmax:
406 case nir_intrinsic_shared_atomic_fcomp_swap:
407 case nir_intrinsic_global_atomic_add:
408 case nir_intrinsic_global_atomic_imin:
409 case nir_intrinsic_global_atomic_umin:
410 case nir_intrinsic_global_atomic_imax:
411 case nir_intrinsic_global_atomic_umax:
412 case nir_intrinsic_global_atomic_and:
413 case nir_intrinsic_global_atomic_or:
414 case nir_intrinsic_global_atomic_xor:
415 case nir_intrinsic_global_atomic_exchange:
416 case nir_intrinsic_global_atomic_comp_swap:
417 case nir_intrinsic_global_atomic_fadd:
418 case nir_intrinsic_global_atomic_fmin:
419 case nir_intrinsic_global_atomic_fmax:
420 case nir_intrinsic_global_atomic_fcomp_swap:
421 case nir_intrinsic_atomic_counter_add:
422 case nir_intrinsic_atomic_counter_min:
423 case nir_intrinsic_atomic_counter_max:
424 case nir_intrinsic_atomic_counter_and:
425 case nir_intrinsic_atomic_counter_or:
426 case nir_intrinsic_atomic_counter_xor:
427 case nir_intrinsic_atomic_counter_inc:
428 case nir_intrinsic_atomic_counter_pre_dec:
429 case nir_intrinsic_atomic_counter_post_dec:
430 case nir_intrinsic_atomic_counter_exchange:
431 case nir_intrinsic_atomic_counter_comp_swap:
432 case nir_intrinsic_atomic_counter_add_deref:
433 case nir_intrinsic_atomic_counter_min_deref:
434 case nir_intrinsic_atomic_counter_max_deref:
435 case nir_intrinsic_atomic_counter_and_deref:
436 case nir_intrinsic_atomic_counter_or_deref:
437 case nir_intrinsic_atomic_counter_xor_deref:
438 case nir_intrinsic_atomic_counter_inc_deref:
439 case nir_intrinsic_atomic_counter_pre_dec_deref:
440 case nir_intrinsic_atomic_counter_post_dec_deref:
441 case nir_intrinsic_atomic_counter_exchange_deref:
442 case nir_intrinsic_atomic_counter_comp_swap_deref:
443 case nir_intrinsic_exclusive_scan:
444 case nir_intrinsic_ballot_bit_count_exclusive:
445 case nir_intrinsic_ballot_bit_count_inclusive:
446 case nir_intrinsic_write_invocation_amd:
447 case nir_intrinsic_mbcnt_amd:
448 case nir_intrinsic_elect:
449 is_divergent = true;
450 break;
451
452 default:
453 #ifdef NDEBUG
454 is_divergent = true;
455 break;
456 #else
457 nir_print_instr(&instr->instr, stderr);
458 unreachable("\nNIR divergence analysis: Unhandled intrinsic.");
459 #endif
460 }
461
462 instr->dest.ssa.divergent = is_divergent;
463 return is_divergent;
464 }
465
466 static bool
467 visit_tex(nir_tex_instr *instr)
468 {
469 if (instr->dest.ssa.divergent)
470 return false;
471
472 bool is_divergent = false;
473
474 for (unsigned i = 0; i < instr->num_srcs; i++) {
475 switch (instr->src[i].src_type) {
476 case nir_tex_src_sampler_deref:
477 case nir_tex_src_sampler_handle:
478 case nir_tex_src_sampler_offset:
479 is_divergent |= instr->src[i].src.ssa->divergent &&
480 instr->sampler_non_uniform;
481 break;
482 case nir_tex_src_texture_deref:
483 case nir_tex_src_texture_handle:
484 case nir_tex_src_texture_offset:
485 is_divergent |= instr->src[i].src.ssa->divergent &&
486 instr->texture_non_uniform;
487 break;
488 default:
489 is_divergent |= instr->src[i].src.ssa->divergent;
490 break;
491 }
492 }
493
494 instr->dest.ssa.divergent = is_divergent;
495 return is_divergent;
496 }
497
498 static bool
499 visit_load_const(nir_load_const_instr *instr)
500 {
501 return false;
502 }
503
504 static bool
505 visit_ssa_undef(nir_ssa_undef_instr *instr)
506 {
507 return false;
508 }
509
510 static bool
511 nir_variable_mode_is_uniform(nir_variable_mode mode) {
512 switch (mode) {
513 case nir_var_uniform:
514 case nir_var_mem_ubo:
515 case nir_var_mem_ssbo:
516 case nir_var_mem_shared:
517 case nir_var_mem_global:
518 return true;
519 default:
520 return false;
521 }
522 }
523
524 static bool
525 nir_variable_is_uniform(nir_variable *var, struct divergence_state *state)
526 {
527 if (nir_variable_mode_is_uniform(var->data.mode))
528 return true;
529
530 if (state->stage == MESA_SHADER_FRAGMENT &&
531 (state->options & nir_divergence_single_prim_per_subgroup) &&
532 var->data.mode == nir_var_shader_in &&
533 var->data.interpolation == INTERP_MODE_FLAT)
534 return true;
535
536 if (state->stage == MESA_SHADER_TESS_CTRL &&
537 (state->options & nir_divergence_single_patch_per_tcs_subgroup) &&
538 var->data.mode == nir_var_shader_out && var->data.patch)
539 return true;
540
541 if (state->stage == MESA_SHADER_TESS_EVAL &&
542 (state->options & nir_divergence_single_patch_per_tes_subgroup) &&
543 var->data.mode == nir_var_shader_in && var->data.patch)
544 return true;
545
546 return false;
547 }
548
549 static bool
550 visit_deref(nir_deref_instr *deref, struct divergence_state *state)
551 {
552 if (deref->dest.ssa.divergent)
553 return false;
554
555 bool is_divergent = false;
556 switch (deref->deref_type) {
557 case nir_deref_type_var:
558 is_divergent = !nir_variable_is_uniform(deref->var, state);
559 break;
560 case nir_deref_type_array:
561 case nir_deref_type_ptr_as_array:
562 is_divergent = deref->arr.index.ssa->divergent;
563 /* fallthrough */
564 case nir_deref_type_struct:
565 case nir_deref_type_array_wildcard:
566 is_divergent |= deref->parent.ssa->divergent;
567 break;
568 case nir_deref_type_cast:
569 is_divergent = !nir_variable_mode_is_uniform(deref->var->data.mode) ||
570 deref->parent.ssa->divergent;
571 break;
572 }
573
574 deref->dest.ssa.divergent = is_divergent;
575 return is_divergent;
576 }
577
578 static bool
579 visit_jump(nir_jump_instr *jump, struct divergence_state *state)
580 {
581 switch (jump->type) {
582 case nir_jump_continue:
583 if (state->divergent_loop_continue)
584 return false;
585 if (state->divergent_loop_cf)
586 state->divergent_loop_continue = true;
587 return state->divergent_loop_continue;
588 case nir_jump_break:
589 if (state->divergent_loop_break)
590 return false;
591 if (state->divergent_loop_cf)
592 state->divergent_loop_break = true;
593 return state->divergent_loop_break;
594 case nir_jump_return:
595 unreachable("NIR divergence analysis: Unsupported return instruction.");
596 }
597 return false;
598 }
599
600 static bool
601 set_ssa_def_not_divergent(nir_ssa_def *def, UNUSED void *_state)
602 {
603 def->divergent = false;
604 return true;
605 }
606
607 static bool
608 visit_block(nir_block *block, struct divergence_state *state)
609 {
610 bool has_changed = false;
611
612 nir_foreach_instr(instr, block) {
613 /* phis are handled when processing the branches */
614 if (instr->type == nir_instr_type_phi)
615 continue;
616
617 if (state->first_visit)
618 nir_foreach_ssa_def(instr, set_ssa_def_not_divergent, NULL);
619
620 switch (instr->type) {
621 case nir_instr_type_alu:
622 has_changed |= visit_alu(nir_instr_as_alu(instr));
623 break;
624 case nir_instr_type_intrinsic:
625 has_changed |= visit_intrinsic(nir_instr_as_intrinsic(instr), state);
626 break;
627 case nir_instr_type_tex:
628 has_changed |= visit_tex(nir_instr_as_tex(instr));
629 break;
630 case nir_instr_type_load_const:
631 has_changed |= visit_load_const(nir_instr_as_load_const(instr));
632 break;
633 case nir_instr_type_ssa_undef:
634 has_changed |= visit_ssa_undef(nir_instr_as_ssa_undef(instr));
635 break;
636 case nir_instr_type_deref:
637 has_changed |= visit_deref(nir_instr_as_deref(instr), state);
638 break;
639 case nir_instr_type_jump:
640 has_changed |= visit_jump(nir_instr_as_jump(instr), state);
641 break;
642 case nir_instr_type_phi:
643 case nir_instr_type_call:
644 case nir_instr_type_parallel_copy:
645 unreachable("NIR divergence analysis: Unsupported instruction type.");
646 }
647 }
648
649 return has_changed;
650 }
651
652 /* There are 3 types of phi instructions:
653 * (1) gamma: represent the joining point of different paths
654 * created by an “if-then-else” branch.
655 * The resulting value is divergent if the branch condition
656 * or any of the source values is divergent. */
657 static bool
658 visit_if_merge_phi(nir_phi_instr *phi, bool if_cond_divergent)
659 {
660 if (phi->dest.ssa.divergent)
661 return false;
662
663 unsigned defined_srcs = 0;
664 nir_foreach_phi_src(src, phi) {
665 /* if any source value is divergent, the resulting value is divergent */
666 if (src->src.ssa->divergent) {
667 phi->dest.ssa.divergent = true;
668 return true;
669 }
670 if (src->src.ssa->parent_instr->type != nir_instr_type_ssa_undef) {
671 defined_srcs++;
672 }
673 }
674
675 /* if the condition is divergent and two sources defined, the definition is divergent */
676 if (defined_srcs > 1 && if_cond_divergent) {
677 phi->dest.ssa.divergent = true;
678 return true;
679 }
680
681 return false;
682 }
683
684 /* There are 3 types of phi instructions:
685 * (2) mu: which only exist at loop headers,
686 * merge initial and loop-carried values.
687 * The resulting value is divergent if any source value
688 * is divergent or a divergent loop continue condition
689 * is associated with a different ssa-def. */
690 static bool
691 visit_loop_header_phi(nir_phi_instr *phi, nir_block *preheader, bool divergent_continue)
692 {
693 if (phi->dest.ssa.divergent)
694 return false;
695
696 nir_ssa_def* same = NULL;
697 nir_foreach_phi_src(src, phi) {
698 /* if any source value is divergent, the resulting value is divergent */
699 if (src->src.ssa->divergent) {
700 phi->dest.ssa.divergent = true;
701 return true;
702 }
703 /* if this loop is uniform, we're done here */
704 if (!divergent_continue)
705 continue;
706 /* skip the loop preheader */
707 if (src->pred == preheader)
708 continue;
709 /* skip undef values */
710 if (src->src.ssa->parent_instr->type == nir_instr_type_ssa_undef)
711 continue;
712
713 /* check if all loop-carried values are from the same ssa-def */
714 if (!same)
715 same = src->src.ssa;
716 else if (same != src->src.ssa) {
717 phi->dest.ssa.divergent = true;
718 return true;
719 }
720 }
721
722 return false;
723 }
724
725 /* There are 3 types of phi instructions:
726 * (3) eta: represent values that leave a loop.
727 * The resulting value is divergent if the source value is divergent
728 * or any loop exit condition is divergent for a value which is
729 * not loop-invariant.
730 * (note: there should be no phi for loop-invariant variables.) */
731 static bool
732 visit_loop_exit_phi(nir_phi_instr *phi, bool divergent_break)
733 {
734 if (phi->dest.ssa.divergent)
735 return false;
736
737 if (divergent_break) {
738 phi->dest.ssa.divergent = true;
739 return true;
740 }
741
742 /* if any source value is divergent, the resulting value is divergent */
743 nir_foreach_phi_src(src, phi) {
744 if (src->src.ssa->divergent) {
745 phi->dest.ssa.divergent = true;
746 return true;
747 }
748 }
749
750 return false;
751 }
752
753 static bool
754 visit_if(nir_if *if_stmt, struct divergence_state *state)
755 {
756 bool progress = false;
757
758 struct divergence_state then_state = *state;
759 then_state.divergent_loop_cf |= if_stmt->condition.ssa->divergent;
760 progress |= visit_cf_list(&if_stmt->then_list, &then_state);
761
762 struct divergence_state else_state = *state;
763 else_state.divergent_loop_cf |= if_stmt->condition.ssa->divergent;
764 progress |= visit_cf_list(&if_stmt->else_list, &else_state);
765
766 /* handle phis after the IF */
767 nir_foreach_instr(instr, nir_cf_node_cf_tree_next(&if_stmt->cf_node)) {
768 if (instr->type != nir_instr_type_phi)
769 break;
770
771 if (state->first_visit)
772 nir_instr_as_phi(instr)->dest.ssa.divergent = false;
773 progress |= visit_if_merge_phi(nir_instr_as_phi(instr),
774 if_stmt->condition.ssa->divergent);
775 }
776
777 /* join loop divergence information from both branch legs */
778 state->divergent_loop_continue |= then_state.divergent_loop_continue ||
779 else_state.divergent_loop_continue;
780 state->divergent_loop_break |= then_state.divergent_loop_break ||
781 else_state.divergent_loop_break;
782
783 /* A divergent continue makes succeeding loop CF divergent:
784 * not all loop-active invocations participate in the remaining loop-body
785 * which means that a following break might be taken by some invocations, only */
786 state->divergent_loop_cf |= state->divergent_loop_continue;
787
788 return progress;
789 }
790
791 static bool
792 visit_loop(nir_loop *loop, struct divergence_state *state)
793 {
794 bool progress = false;
795 nir_block *loop_header = nir_loop_first_block(loop);
796 nir_block *loop_preheader = nir_block_cf_tree_prev(loop_header);
797
798 /* handle loop header phis first: we have no knowledge yet about
799 * the loop's control flow or any loop-carried sources. */
800 nir_foreach_instr(instr, loop_header) {
801 if (instr->type != nir_instr_type_phi)
802 break;
803
804 nir_phi_instr *phi = nir_instr_as_phi(instr);
805 if (!state->first_visit && phi->dest.ssa.divergent)
806 continue;
807
808 nir_foreach_phi_src(src, phi) {
809 if (src->pred == loop_preheader) {
810 phi->dest.ssa.divergent = src->src.ssa->divergent;
811 break;
812 }
813 }
814 progress |= phi->dest.ssa.divergent;
815 }
816
817 /* setup loop state */
818 struct divergence_state loop_state = *state;
819 loop_state.divergent_loop_cf = false;
820 loop_state.divergent_loop_continue = false;
821 loop_state.divergent_loop_break = false;
822
823 /* process loop body until no further changes are made */
824 bool repeat;
825 do {
826 progress |= visit_cf_list(&loop->body, &loop_state);
827 repeat = false;
828
829 /* revisit loop header phis to see if something has changed */
830 nir_foreach_instr(instr, loop_header) {
831 if (instr->type != nir_instr_type_phi)
832 break;
833
834 repeat |= visit_loop_header_phi(nir_instr_as_phi(instr),
835 loop_preheader,
836 loop_state.divergent_loop_continue);
837 }
838
839 loop_state.divergent_loop_cf = false;
840 loop_state.first_visit = false;
841 } while (repeat);
842
843 /* handle phis after the loop */
844 nir_foreach_instr(instr, nir_cf_node_cf_tree_next(&loop->cf_node)) {
845 if (instr->type != nir_instr_type_phi)
846 break;
847
848 if (state->first_visit)
849 nir_instr_as_phi(instr)->dest.ssa.divergent = false;
850 progress |= visit_loop_exit_phi(nir_instr_as_phi(instr),
851 loop_state.divergent_loop_break);
852 }
853
854 return progress;
855 }
856
857 static bool
858 visit_cf_list(struct exec_list *list, struct divergence_state *state)
859 {
860 bool has_changed = false;
861
862 foreach_list_typed(nir_cf_node, node, node, list) {
863 switch (node->type) {
864 case nir_cf_node_block:
865 has_changed |= visit_block(nir_cf_node_as_block(node), state);
866 break;
867 case nir_cf_node_if:
868 has_changed |= visit_if(nir_cf_node_as_if(node), state);
869 break;
870 case nir_cf_node_loop:
871 has_changed |= visit_loop(nir_cf_node_as_loop(node), state);
872 break;
873 case nir_cf_node_function:
874 unreachable("NIR divergence analysis: Unsupported cf_node type.");
875 }
876 }
877
878 return has_changed;
879 }
880
881 void
882 nir_divergence_analysis(nir_shader *shader, nir_divergence_options options)
883 {
884 struct divergence_state state = {
885 .options = options,
886 .stage = shader->info.stage,
887 .divergent_loop_cf = false,
888 .divergent_loop_continue = false,
889 .divergent_loop_break = false,
890 .first_visit = true,
891 };
892
893 visit_cf_list(&nir_shader_get_entrypoint(shader)->body, &state);
894 }
895