src/compiler/nir/nir_divergence_analysis.c

   1 /*
   2  * Copyright © 2018 Valve Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include "nir.h"
  26
  27 /* This pass computes for each ssa definition if it is uniform.
  28  * That is, the variable has the same value for all invocations
  29  * of the group.
  30  *
  31  * This divergence analysis pass expects the shader to be in LCSSA-form.
  32  *
  33  * This algorithm implements "The Simple Divergence Analysis" from
  34  * Diogo Sampaio, Rafael De Souza, Sylvain Collange, Fernando Magno Quintão Pereira.
  35  * Divergence Analysis.  ACM Transactions on Programming Languages and Systems (TOPLAS),
  36  * ACM, 2013, 35 (4), pp.13:1-13:36. <10.1145/2523815>. <hal-00909072v2>
  37  */
  38
  39 struct divergence_state {
  40    const nir_divergence_options options;
  41    const gl_shader_stage stage;
  42 };
  43
  44 static bool
  45 visit_cf_list(struct exec_list *list, struct divergence_state *state);
  46
  47 static bool
  48 visit_alu(nir_alu_instr *instr)
  49 {
  50    if (instr->dest.dest.ssa.divergent)
  51       return false;
  52
  53    unsigned num_src = nir_op_infos[instr->op].num_inputs;
  54
  55    for (unsigned i = 0; i < num_src; i++) {
  56       if (instr->src[i].src.ssa->divergent) {
  57          instr->dest.dest.ssa.divergent = true;
  58          return true;
  59       }
  60    }
  61
  62    return false;
  63 }
  64
  65 static bool
  66 visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state)
  67 {
  68    if (!nir_intrinsic_infos[instr->intrinsic].has_dest)
  69       return false;
  70
  71    if (instr->dest.ssa.divergent)
  72       return false;
  73
  74    nir_divergence_options options = state->options;
  75    gl_shader_stage stage = state->stage;
  76    bool is_divergent = false;
  77    switch (instr->intrinsic) {
  78    /* Intrinsics which are always uniform */
  79    case nir_intrinsic_shader_clock:
  80    case nir_intrinsic_ballot:
  81    case nir_intrinsic_read_invocation:
  82    case nir_intrinsic_read_first_invocation:
  83    case nir_intrinsic_vote_any:
  84    case nir_intrinsic_vote_all:
  85    case nir_intrinsic_vote_feq:
  86    case nir_intrinsic_vote_ieq:
  87    case nir_intrinsic_load_work_dim:
  88    case nir_intrinsic_load_work_group_id:
  89    case nir_intrinsic_load_num_work_groups:
  90    case nir_intrinsic_load_local_group_size:
  91    case nir_intrinsic_load_subgroup_id:
  92    case nir_intrinsic_load_num_subgroups:
  93    case nir_intrinsic_load_subgroup_size:
  94    case nir_intrinsic_load_subgroup_eq_mask:
  95    case nir_intrinsic_load_subgroup_ge_mask:
  96    case nir_intrinsic_load_subgroup_gt_mask:
  97    case nir_intrinsic_load_subgroup_le_mask:
  98    case nir_intrinsic_load_subgroup_lt_mask:
  99    case nir_intrinsic_first_invocation:
 100    case nir_intrinsic_load_base_instance:
 101    case nir_intrinsic_load_base_vertex:
 102    case nir_intrinsic_load_first_vertex:
 103    case nir_intrinsic_load_draw_id:
 104    case nir_intrinsic_load_is_indexed_draw:
 105    case nir_intrinsic_load_viewport_scale:
 106    case nir_intrinsic_load_alpha_ref_float:
 107    case nir_intrinsic_load_user_clip_plane:
 108    case nir_intrinsic_load_viewport_x_scale:
 109    case nir_intrinsic_load_viewport_y_scale:
 110    case nir_intrinsic_load_viewport_z_scale:
 111    case nir_intrinsic_load_viewport_offset:
 112    case nir_intrinsic_load_viewport_z_offset:
 113    case nir_intrinsic_load_blend_const_color_a_float:
 114    case nir_intrinsic_load_blend_const_color_b_float:
 115    case nir_intrinsic_load_blend_const_color_g_float:
 116    case nir_intrinsic_load_blend_const_color_r_float:
 117    case nir_intrinsic_load_blend_const_color_rgba:
 118    case nir_intrinsic_load_blend_const_color_aaaa8888_unorm:
 119    case nir_intrinsic_load_blend_const_color_rgba8888_unorm:
 120       is_divergent = false;
 121       break;
 122
 123    /* Intrinsics with divergence depending on shader stage and hardware */
 124    case nir_intrinsic_load_input:
 125       is_divergent = instr->src[0].ssa->divergent;
 126       if (stage == MESA_SHADER_FRAGMENT)
 127          is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
 128       else if (stage == MESA_SHADER_TESS_EVAL)
 129          is_divergent |= !(options & nir_divergence_single_patch_per_tes_subgroup);
 130       else
 131          is_divergent = true;
 132       break;
 133    case nir_intrinsic_load_input_vertex:
 134       is_divergent = instr->src[1].ssa->divergent;
 135       assert(stage == MESA_SHADER_FRAGMENT);
 136       is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
 137       break;
 138    case nir_intrinsic_load_output:
 139       assert(stage == MESA_SHADER_TESS_CTRL || stage == MESA_SHADER_FRAGMENT);
 140       is_divergent = instr->src[0].ssa->divergent;
 141       if (stage == MESA_SHADER_TESS_CTRL)
 142          is_divergent |= !(options & nir_divergence_single_patch_per_tcs_subgroup);
 143       else
 144          is_divergent = true;
 145       break;
 146    case nir_intrinsic_load_layer_id:
 147    case nir_intrinsic_load_front_face:
 148       assert(stage == MESA_SHADER_FRAGMENT);
 149       is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
 150       break;
 151    case nir_intrinsic_load_view_index:
 152       assert(stage != MESA_SHADER_COMPUTE && stage != MESA_SHADER_KERNEL);
 153       if (options & nir_divergence_view_index_uniform)
 154          is_divergent = false;
 155       else if (stage == MESA_SHADER_FRAGMENT)
 156          is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
 157       break;
 158    case nir_intrinsic_load_fs_input_interp_deltas:
 159       assert(stage == MESA_SHADER_FRAGMENT);
 160       is_divergent = instr->src[0].ssa->divergent;
 161       is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
 162       break;
 163    case nir_intrinsic_load_primitive_id:
 164       if (stage == MESA_SHADER_FRAGMENT)
 165          is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
 166       else if (stage == MESA_SHADER_TESS_CTRL)
 167          is_divergent = !(options & nir_divergence_single_patch_per_tcs_subgroup);
 168       else if (stage == MESA_SHADER_TESS_EVAL)
 169          is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
 170       else if (stage == MESA_SHADER_GEOMETRY)
 171          is_divergent = true;
 172       else
 173          unreachable("Invalid stage for load_primitive_id");
 174       break;
 175    case nir_intrinsic_load_tess_level_inner:
 176    case nir_intrinsic_load_tess_level_outer:
 177       if (stage == MESA_SHADER_TESS_CTRL)
 178          is_divergent = !(options & nir_divergence_single_patch_per_tcs_subgroup);
 179       else if (stage == MESA_SHADER_TESS_EVAL)
 180          is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
 181       else
 182          unreachable("Invalid stage for load_primitive_tess_level_*");
 183       break;
 184    case nir_intrinsic_load_patch_vertices_in:
 185       if (stage == MESA_SHADER_TESS_EVAL)
 186          is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
 187       else
 188          assert(stage == MESA_SHADER_TESS_CTRL);
 189       break;
 190
 191    /* Clustered reductions are uniform if cluster_size == subgroup_size or
 192     * the source is uniform and the operation is invariant.
 193     * Inclusive scans are uniform if
 194     * the source is uniform and the operation is invariant
 195     */
 196    case nir_intrinsic_reduce:
 197       if (nir_intrinsic_cluster_size(instr) == 0)
 198          return false;
 199       /* fallthrough */
 200    case nir_intrinsic_inclusive_scan: {
 201       nir_op op = nir_intrinsic_reduction_op(instr);
 202       is_divergent = instr->src[0].ssa->divergent;
 203       if (op != nir_op_umin && op != nir_op_imin && op != nir_op_fmin &&
 204           op != nir_op_umax && op != nir_op_imax && op != nir_op_fmax &&
 205           op != nir_op_iand && op != nir_op_ior)
 206          is_divergent = true;
 207       break;
 208    }
 209
 210    /* Intrinsics with divergence depending on sources */
 211    case nir_intrinsic_ballot_bitfield_extract:
 212    case nir_intrinsic_ballot_find_lsb:
 213    case nir_intrinsic_ballot_find_msb:
 214    case nir_intrinsic_ballot_bit_count_reduce:
 215    case nir_intrinsic_shuffle_xor:
 216    case nir_intrinsic_shuffle_up:
 217    case nir_intrinsic_shuffle_down:
 218    case nir_intrinsic_quad_broadcast:
 219    case nir_intrinsic_quad_swap_horizontal:
 220    case nir_intrinsic_quad_swap_vertical:
 221    case nir_intrinsic_quad_swap_diagonal:
 222    case nir_intrinsic_load_deref:
 223    case nir_intrinsic_load_ubo:
 224    case nir_intrinsic_load_ssbo:
 225    case nir_intrinsic_load_shared:
 226    case nir_intrinsic_load_global:
 227    case nir_intrinsic_load_uniform:
 228    case nir_intrinsic_load_push_constant:
 229    case nir_intrinsic_load_constant:
 230    case nir_intrinsic_load_sample_pos_from_id:
 231    case nir_intrinsic_load_kernel_input:
 232    case nir_intrinsic_image_load:
 233    case nir_intrinsic_image_deref_load:
 234    case nir_intrinsic_bindless_image_load:
 235    case nir_intrinsic_image_samples:
 236    case nir_intrinsic_image_deref_samples:
 237    case nir_intrinsic_bindless_image_samples:
 238    case nir_intrinsic_get_buffer_size:
 239    case nir_intrinsic_image_size:
 240    case nir_intrinsic_image_deref_size:
 241    case nir_intrinsic_bindless_image_size:
 242    case nir_intrinsic_copy_deref:
 243    case nir_intrinsic_deref_buffer_array_length:
 244    case nir_intrinsic_vulkan_resource_index:
 245    case nir_intrinsic_vulkan_resource_reindex:
 246    case nir_intrinsic_load_vulkan_descriptor:
 247    case nir_intrinsic_atomic_counter_read:
 248    case nir_intrinsic_atomic_counter_read_deref:
 249    case nir_intrinsic_quad_swizzle_amd:
 250    case nir_intrinsic_masked_swizzle_amd: {
 251       unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
 252       for (unsigned i = 0; i < num_srcs; i++) {
 253          if (instr->src[i].ssa->divergent) {
 254             is_divergent = true;
 255             break;
 256          }
 257       }
 258       break;
 259    }
 260
 261    case nir_intrinsic_shuffle:
 262       is_divergent = instr->src[0].ssa->divergent &&
 263                      instr->src[1].ssa->divergent;
 264       break;
 265
 266    /* Intrinsics which are always divergent */
 267    case nir_intrinsic_load_color0:
 268    case nir_intrinsic_load_color1:
 269    case nir_intrinsic_load_param:
 270    case nir_intrinsic_load_sample_id:
 271    case nir_intrinsic_load_sample_id_no_per_sample:
 272    case nir_intrinsic_load_sample_mask_in:
 273    case nir_intrinsic_load_interpolated_input:
 274    case nir_intrinsic_load_barycentric_pixel:
 275    case nir_intrinsic_load_barycentric_centroid:
 276    case nir_intrinsic_load_barycentric_sample:
 277    case nir_intrinsic_load_barycentric_model:
 278    case nir_intrinsic_load_barycentric_at_sample:
 279    case nir_intrinsic_load_barycentric_at_offset:
 280    case nir_intrinsic_interp_deref_at_offset:
 281    case nir_intrinsic_interp_deref_at_sample:
 282    case nir_intrinsic_interp_deref_at_centroid:
 283    case nir_intrinsic_interp_deref_at_vertex:
 284    case nir_intrinsic_load_tess_coord:
 285    case nir_intrinsic_load_point_coord:
 286    case nir_intrinsic_load_frag_coord:
 287    case nir_intrinsic_load_sample_pos:
 288    case nir_intrinsic_load_vertex_id_zero_base:
 289    case nir_intrinsic_load_vertex_id:
 290    case nir_intrinsic_load_per_vertex_input:
 291    case nir_intrinsic_load_per_vertex_output:
 292    case nir_intrinsic_load_instance_id:
 293    case nir_intrinsic_load_invocation_id:
 294    case nir_intrinsic_load_local_invocation_id:
 295    case nir_intrinsic_load_local_invocation_index:
 296    case nir_intrinsic_load_global_invocation_id:
 297    case nir_intrinsic_load_global_invocation_index:
 298    case nir_intrinsic_load_subgroup_invocation:
 299    case nir_intrinsic_load_helper_invocation:
 300    case nir_intrinsic_is_helper_invocation:
 301    case nir_intrinsic_load_scratch:
 302    case nir_intrinsic_deref_atomic_add:
 303    case nir_intrinsic_deref_atomic_imin:
 304    case nir_intrinsic_deref_atomic_umin:
 305    case nir_intrinsic_deref_atomic_imax:
 306    case nir_intrinsic_deref_atomic_umax:
 307    case nir_intrinsic_deref_atomic_and:
 308    case nir_intrinsic_deref_atomic_or:
 309    case nir_intrinsic_deref_atomic_xor:
 310    case nir_intrinsic_deref_atomic_exchange:
 311    case nir_intrinsic_deref_atomic_comp_swap:
 312    case nir_intrinsic_deref_atomic_fadd:
 313    case nir_intrinsic_deref_atomic_fmin:
 314    case nir_intrinsic_deref_atomic_fmax:
 315    case nir_intrinsic_deref_atomic_fcomp_swap:
 316    case nir_intrinsic_ssbo_atomic_add:
 317    case nir_intrinsic_ssbo_atomic_imin:
 318    case nir_intrinsic_ssbo_atomic_umin:
 319    case nir_intrinsic_ssbo_atomic_imax:
 320    case nir_intrinsic_ssbo_atomic_umax:
 321    case nir_intrinsic_ssbo_atomic_and:
 322    case nir_intrinsic_ssbo_atomic_or:
 323    case nir_intrinsic_ssbo_atomic_xor:
 324    case nir_intrinsic_ssbo_atomic_exchange:
 325    case nir_intrinsic_ssbo_atomic_comp_swap:
 326    case nir_intrinsic_ssbo_atomic_fadd:
 327    case nir_intrinsic_ssbo_atomic_fmax:
 328    case nir_intrinsic_ssbo_atomic_fmin:
 329    case nir_intrinsic_ssbo_atomic_fcomp_swap:
 330    case nir_intrinsic_image_deref_atomic_add:
 331    case nir_intrinsic_image_deref_atomic_imin:
 332    case nir_intrinsic_image_deref_atomic_umin:
 333    case nir_intrinsic_image_deref_atomic_imax:
 334    case nir_intrinsic_image_deref_atomic_umax:
 335    case nir_intrinsic_image_deref_atomic_and:
 336    case nir_intrinsic_image_deref_atomic_or:
 337    case nir_intrinsic_image_deref_atomic_xor:
 338    case nir_intrinsic_image_deref_atomic_exchange:
 339    case nir_intrinsic_image_deref_atomic_comp_swap:
 340    case nir_intrinsic_image_deref_atomic_fadd:
 341    case nir_intrinsic_image_atomic_add:
 342    case nir_intrinsic_image_atomic_imin:
 343    case nir_intrinsic_image_atomic_umin:
 344    case nir_intrinsic_image_atomic_imax:
 345    case nir_intrinsic_image_atomic_umax:
 346    case nir_intrinsic_image_atomic_and:
 347    case nir_intrinsic_image_atomic_or:
 348    case nir_intrinsic_image_atomic_xor:
 349    case nir_intrinsic_image_atomic_exchange:
 350    case nir_intrinsic_image_atomic_comp_swap:
 351    case nir_intrinsic_image_atomic_fadd:
 352    case nir_intrinsic_bindless_image_atomic_add:
 353    case nir_intrinsic_bindless_image_atomic_imin:
 354    case nir_intrinsic_bindless_image_atomic_umin:
 355    case nir_intrinsic_bindless_image_atomic_imax:
 356    case nir_intrinsic_bindless_image_atomic_umax:
 357    case nir_intrinsic_bindless_image_atomic_and:
 358    case nir_intrinsic_bindless_image_atomic_or:
 359    case nir_intrinsic_bindless_image_atomic_xor:
 360    case nir_intrinsic_bindless_image_atomic_exchange:
 361    case nir_intrinsic_bindless_image_atomic_comp_swap:
 362    case nir_intrinsic_bindless_image_atomic_fadd:
 363    case nir_intrinsic_shared_atomic_add:
 364    case nir_intrinsic_shared_atomic_imin:
 365    case nir_intrinsic_shared_atomic_umin:
 366    case nir_intrinsic_shared_atomic_imax:
 367    case nir_intrinsic_shared_atomic_umax:
 368    case nir_intrinsic_shared_atomic_and:
 369    case nir_intrinsic_shared_atomic_or:
 370    case nir_intrinsic_shared_atomic_xor:
 371    case nir_intrinsic_shared_atomic_exchange:
 372    case nir_intrinsic_shared_atomic_comp_swap:
 373    case nir_intrinsic_shared_atomic_fadd:
 374    case nir_intrinsic_shared_atomic_fmin:
 375    case nir_intrinsic_shared_atomic_fmax:
 376    case nir_intrinsic_shared_atomic_fcomp_swap:
 377    case nir_intrinsic_global_atomic_add:
 378    case nir_intrinsic_global_atomic_imin:
 379    case nir_intrinsic_global_atomic_umin:
 380    case nir_intrinsic_global_atomic_imax:
 381    case nir_intrinsic_global_atomic_umax:
 382    case nir_intrinsic_global_atomic_and:
 383    case nir_intrinsic_global_atomic_or:
 384    case nir_intrinsic_global_atomic_xor:
 385    case nir_intrinsic_global_atomic_exchange:
 386    case nir_intrinsic_global_atomic_comp_swap:
 387    case nir_intrinsic_global_atomic_fadd:
 388    case nir_intrinsic_global_atomic_fmin:
 389    case nir_intrinsic_global_atomic_fmax:
 390    case nir_intrinsic_global_atomic_fcomp_swap:
 391    case nir_intrinsic_atomic_counter_add:
 392    case nir_intrinsic_atomic_counter_min:
 393    case nir_intrinsic_atomic_counter_max:
 394    case nir_intrinsic_atomic_counter_and:
 395    case nir_intrinsic_atomic_counter_or:
 396    case nir_intrinsic_atomic_counter_xor:
 397    case nir_intrinsic_atomic_counter_inc:
 398    case nir_intrinsic_atomic_counter_pre_dec:
 399    case nir_intrinsic_atomic_counter_post_dec:
 400    case nir_intrinsic_atomic_counter_exchange:
 401    case nir_intrinsic_atomic_counter_comp_swap:
 402    case nir_intrinsic_atomic_counter_add_deref:
 403    case nir_intrinsic_atomic_counter_min_deref:
 404    case nir_intrinsic_atomic_counter_max_deref:
 405    case nir_intrinsic_atomic_counter_and_deref:
 406    case nir_intrinsic_atomic_counter_or_deref:
 407    case nir_intrinsic_atomic_counter_xor_deref:
 408    case nir_intrinsic_atomic_counter_inc_deref:
 409    case nir_intrinsic_atomic_counter_pre_dec_deref:
 410    case nir_intrinsic_atomic_counter_post_dec_deref:
 411    case nir_intrinsic_atomic_counter_exchange_deref:
 412    case nir_intrinsic_atomic_counter_comp_swap_deref:
 413    case nir_intrinsic_exclusive_scan:
 414    case nir_intrinsic_ballot_bit_count_exclusive:
 415    case nir_intrinsic_ballot_bit_count_inclusive:
 416    case nir_intrinsic_write_invocation_amd:
 417    case nir_intrinsic_mbcnt_amd:
 418    case nir_intrinsic_elect:
 419       is_divergent = true;
 420       break;
 421
 422    default:
 423 #ifdef NDEBUG
 424       is_divergent = true;
 425       break;
 426 #else
 427       nir_print_instr(&instr->instr, stderr);
 428       unreachable("\nNIR divergence analysis: Unhandled intrinsic.");
 429 #endif
 430    }
 431
 432    instr->dest.ssa.divergent = is_divergent;
 433    return is_divergent;
 434 }
 435
 436 static bool
 437 visit_tex(nir_tex_instr *instr)
 438 {
 439    if (instr->dest.ssa.divergent)
 440       return false;
 441
 442    bool is_divergent = false;
 443
 444    for (unsigned i = 0; i < instr->num_srcs; i++) {
 445       switch (instr->src[i].src_type) {
 446       case nir_tex_src_sampler_deref:
 447       case nir_tex_src_sampler_handle:
 448       case nir_tex_src_sampler_offset:
 449          is_divergent |= instr->src[i].src.ssa->divergent &&
 450                          instr->sampler_non_uniform;
 451          break;
 452       case nir_tex_src_texture_deref:
 453       case nir_tex_src_texture_handle:
 454       case nir_tex_src_texture_offset:
 455          is_divergent |= instr->src[i].src.ssa->divergent &&
 456                          instr->texture_non_uniform;
 457          break;
 458       default:
 459          is_divergent |= instr->src[i].src.ssa->divergent;
 460          break;
 461       }
 462    }
 463
 464    instr->dest.ssa.divergent = is_divergent;
 465    return is_divergent;
 466 }
 467
 468 static bool
 469 visit_phi(nir_phi_instr *instr)
 470 {
 471    /* There are 3 types of phi instructions:
 472     * (1) gamma: represent the joining point of different paths
 473     *     created by an “if-then-else” branch.
 474     *     The resulting value is divergent if the branch condition
 475     *     or any of the source values is divergent.
 476     *
 477     * (2) mu: which only exist at loop headers,
 478     *     merge initial and loop-carried values.
 479     *     The resulting value is divergent if any source value
 480     *     is divergent or a divergent loop continue condition
 481     *     is associated with a different ssa-def.
 482     *
 483     * (3) eta: represent values that leave a loop.
 484     *     The resulting value is divergent if the source value is divergent
 485     *     or any loop exit condition is divergent for a value which is
 486     *     not loop-invariant.
 487     *     (note: there should be no phi for loop-invariant variables.)
 488     */
 489
 490    if (instr->dest.ssa.divergent)
 491       return false;
 492
 493    nir_foreach_phi_src(src, instr) {
 494       /* if any source value is divergent, the resulting value is divergent */
 495       if (src->src.ssa->divergent) {
 496          instr->dest.ssa.divergent = true;
 497          return true;
 498       }
 499    }
 500
 501    nir_cf_node *prev = nir_cf_node_prev(&instr->instr.block->cf_node);
 502
 503    if (!prev) {
 504       /* mu: if no predecessor node exists, the phi must be at a loop header */
 505       nir_loop *loop = nir_cf_node_as_loop(instr->instr.block->cf_node.parent);
 506       prev = nir_cf_node_prev(&loop->cf_node);
 507       nir_ssa_def* same = NULL;
 508       bool all_same = true;
 509
 510       /* first, check if all loop-carried values are from the same ssa-def */
 511       nir_foreach_phi_src(src, instr) {
 512          if (src->pred == nir_cf_node_as_block(prev))
 513             continue;
 514          if (src->src.ssa->parent_instr->type == nir_instr_type_ssa_undef)
 515             continue;
 516          if (!same)
 517             same = src->src.ssa;
 518          else if (same != src->src.ssa)
 519             all_same = false;
 520       }
 521
 522       /* if all loop-carried values are the same, the resulting value is uniform */
 523       if (all_same)
 524          return false;
 525
 526       /* check if the loop-carried values come from different ssa-defs
 527        * and the corresponding condition is divergent. */
 528       nir_foreach_phi_src(src, instr) {
 529          /* skip the loop preheader */
 530          if (src->pred == nir_cf_node_as_block(prev))
 531             continue;
 532
 533          /* skip the unconditional back-edge */
 534          if (src->pred == nir_loop_last_block(loop))
 535             continue;
 536
 537          /* if the value is undef, we don't need to check the condition */
 538          if (src->src.ssa->parent_instr->type == nir_instr_type_ssa_undef)
 539             continue;
 540
 541          nir_cf_node *current = src->pred->cf_node.parent;
 542          /* check recursively the conditions if any is divergent */
 543          while (current->type != nir_cf_node_loop) {
 544             assert (current->type == nir_cf_node_if);
 545             nir_if *if_node = nir_cf_node_as_if(current);
 546             if (if_node->condition.ssa->divergent) {
 547                instr->dest.ssa.divergent = true;
 548                return true;
 549             }
 550             current = current->parent;
 551          }
 552          assert(current == &loop->cf_node);
 553       }
 554
 555    } else if (prev->type == nir_cf_node_if) {
 556       /* if only one of the incoming values is defined, the resulting value is uniform */
 557       unsigned defined_srcs = 0;
 558       nir_foreach_phi_src(src, instr) {
 559          if (src->src.ssa->parent_instr->type != nir_instr_type_ssa_undef)
 560             defined_srcs++;
 561       }
 562       if (defined_srcs <= 1)
 563          return false;
 564
 565       /* gamma: check if the condition is divergent */
 566       nir_if *if_node = nir_cf_node_as_if(prev);
 567       if (if_node->condition.ssa->divergent) {
 568          instr->dest.ssa.divergent = true;
 569          return true;
 570       }
 571
 572    } else {
 573       /* eta: the predecessor must be a loop */
 574       assert(prev->type == nir_cf_node_loop);
 575
 576       /* Check if any loop exit condition is divergent:
 577        * That is any break happens under divergent condition or
 578        * a break is preceeded by a divergent continue
 579        */
 580       nir_foreach_phi_src(src, instr) {
 581          nir_cf_node *current = src->pred->cf_node.parent;
 582
 583          /* check recursively the conditions if any is divergent */
 584          while (current->type != nir_cf_node_loop) {
 585             assert(current->type == nir_cf_node_if);
 586             nir_if *if_node = nir_cf_node_as_if(current);
 587             if (if_node->condition.ssa->divergent) {
 588                instr->dest.ssa.divergent = true;
 589                return true;
 590             }
 591             current = current->parent;
 592          }
 593          assert(current == prev);
 594
 595          /* check if any divergent continue happened before the break */
 596          nir_foreach_block_in_cf_node(block, prev) {
 597             if (block == src->pred)
 598                break;
 599             if (!nir_block_ends_in_jump(block))
 600                continue;
 601
 602             nir_jump_instr *jump = nir_instr_as_jump(nir_block_last_instr(block));
 603             if (jump->type != nir_jump_continue)
 604                continue;
 605
 606             current = block->cf_node.parent;
 607             bool is_divergent = false;
 608             while (current != prev) {
 609                /* the continue belongs to an inner loop */
 610                if (current->type == nir_cf_node_loop) {
 611                   is_divergent = false;
 612                   break;
 613                }
 614                assert(current->type == nir_cf_node_if);
 615                nir_if *if_node = nir_cf_node_as_if(current);
 616                is_divergent |= if_node->condition.ssa->divergent;
 617                current = current->parent;
 618             }
 619
 620             if (is_divergent) {
 621                instr->dest.ssa.divergent = true;
 622                return true;
 623             }
 624          }
 625       }
 626    }
 627
 628    return false;
 629 }
 630
 631 static bool
 632 visit_load_const(nir_load_const_instr *instr)
 633 {
 634    return false;
 635 }
 636
 637 static bool
 638 visit_ssa_undef(nir_ssa_undef_instr *instr)
 639 {
 640    return false;
 641 }
 642
 643 static bool
 644 nir_variable_mode_is_uniform(nir_variable_mode mode) {
 645    switch (mode) {
 646    case nir_var_uniform:
 647    case nir_var_mem_ubo:
 648    case nir_var_mem_ssbo:
 649    case nir_var_mem_shared:
 650    case nir_var_mem_global:
 651       return true;
 652    default:
 653       return false;
 654    }
 655 }
 656
 657 static bool
 658 nir_variable_is_uniform(nir_variable *var, struct divergence_state *state)
 659 {
 660    if (nir_variable_mode_is_uniform(var->data.mode))
 661       return true;
 662
 663    if (state->stage == MESA_SHADER_FRAGMENT &&
 664        (state->options & nir_divergence_single_prim_per_subgroup) &&
 665        var->data.mode == nir_var_shader_in &&
 666        var->data.interpolation == INTERP_MODE_FLAT)
 667       return true;
 668
 669    if (state->stage == MESA_SHADER_TESS_CTRL &&
 670        (state->options & nir_divergence_single_patch_per_tcs_subgroup) &&
 671        var->data.mode == nir_var_shader_out && var->data.patch)
 672       return true;
 673
 674    if (state->stage == MESA_SHADER_TESS_EVAL &&
 675        (state->options & nir_divergence_single_patch_per_tes_subgroup) &&
 676        var->data.mode == nir_var_shader_in && var->data.patch)
 677       return true;
 678
 679    return false;
 680 }
 681
 682 static bool
 683 visit_deref(nir_deref_instr *deref, struct divergence_state *state)
 684 {
 685    if (deref->dest.ssa.divergent)
 686       return false;
 687
 688    bool is_divergent = false;
 689    switch (deref->deref_type) {
 690    case nir_deref_type_var:
 691       is_divergent = !nir_variable_is_uniform(deref->var, state);
 692       break;
 693    case nir_deref_type_array:
 694    case nir_deref_type_ptr_as_array:
 695       is_divergent = deref->arr.index.ssa->divergent;
 696       /* fallthrough */
 697    case nir_deref_type_struct:
 698    case nir_deref_type_array_wildcard:
 699       is_divergent |= deref->parent.ssa->divergent;
 700       break;
 701    case nir_deref_type_cast:
 702       is_divergent = !nir_variable_mode_is_uniform(deref->var->data.mode) ||
 703                      deref->parent.ssa->divergent;
 704       break;
 705    }
 706
 707    deref->dest.ssa.divergent = is_divergent;
 708    return is_divergent;
 709 }
 710
 711 static bool
 712 visit_block(nir_block *block, struct divergence_state *state)
 713 {
 714    bool has_changed = false;
 715
 716    nir_foreach_instr(instr, block) {
 717       switch (instr->type) {
 718       case nir_instr_type_alu:
 719          has_changed |= visit_alu(nir_instr_as_alu(instr));
 720          break;
 721       case nir_instr_type_intrinsic:
 722          has_changed |= visit_intrinsic(nir_instr_as_intrinsic(instr), state);
 723          break;
 724       case nir_instr_type_tex:
 725          has_changed |= visit_tex(nir_instr_as_tex(instr));
 726          break;
 727       case nir_instr_type_phi:
 728          has_changed |= visit_phi(nir_instr_as_phi(instr));
 729          break;
 730       case nir_instr_type_load_const:
 731          has_changed |= visit_load_const(nir_instr_as_load_const(instr));
 732          break;
 733       case nir_instr_type_ssa_undef:
 734          has_changed |= visit_ssa_undef(nir_instr_as_ssa_undef(instr));
 735          break;
 736       case nir_instr_type_deref:
 737          has_changed |= visit_deref(nir_instr_as_deref(instr), state);
 738          break;
 739       case nir_instr_type_jump:
 740          break;
 741       case nir_instr_type_call:
 742       case nir_instr_type_parallel_copy:
 743          unreachable("NIR divergence analysis: Unsupported instruction type.");
 744       }
 745    }
 746
 747    return has_changed;
 748 }
 749
 750 static bool
 751 visit_if(nir_if *if_stmt, struct divergence_state *state)
 752 {
 753    return visit_cf_list(&if_stmt->then_list, state) |
 754           visit_cf_list(&if_stmt->else_list, state);
 755 }
 756
 757 static bool
 758 visit_loop(nir_loop *loop, struct divergence_state *state)
 759 {
 760    bool has_changed = false;
 761    bool repeat = true;
 762
 763    /* TODO: restructure this and the phi handling more efficiently */
 764    while (repeat) {
 765       repeat = visit_cf_list(&loop->body, state);
 766       has_changed |= repeat;
 767    }
 768
 769    return has_changed;
 770 }
 771
 772 static bool
 773 visit_cf_list(struct exec_list *list, struct divergence_state *state)
 774 {
 775    bool has_changed = false;
 776
 777    foreach_list_typed(nir_cf_node, node, node, list) {
 778       switch (node->type) {
 779       case nir_cf_node_block:
 780          has_changed |= visit_block(nir_cf_node_as_block(node), state);
 781          break;
 782       case nir_cf_node_if:
 783          has_changed |= visit_if(nir_cf_node_as_if(node), state);
 784          break;
 785       case nir_cf_node_loop:
 786          has_changed |= visit_loop(nir_cf_node_as_loop(node), state);
 787          break;
 788       case nir_cf_node_function:
 789          unreachable("NIR divergence analysis: Unsupported cf_node type.");
 790       }
 791    }
 792
 793    return has_changed;
 794 }
 795
 796 static bool
 797 set_ssa_def_not_divergent(nir_ssa_def *def, UNUSED void *_state)
 798 {
 799    def->divergent = false;
 800    return true;
 801 }
 802
 803 void
 804 nir_divergence_analysis(nir_shader *shader, nir_divergence_options options)
 805 {
 806    nir_function_impl *impl = nir_shader_get_entrypoint(shader);
 807
 808    /* Set all SSA defs to non-divergent to start off */
 809    nir_foreach_block(block, impl) {
 810       nir_foreach_instr(instr, block)
 811          nir_foreach_ssa_def(instr, set_ssa_def_not_divergent, NULL);
 812    }
 813
 814    struct divergence_state state = {
 815       .options = options,
 816       .stage = shader->info.stage,
 817    };
 818
 819    visit_cf_list(&impl->body, &state);
 820 }
 821