nir: Drop the vs_inputs_dual_locations option
[mesa.git] / src / compiler / nir / nir_gather_info.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir.h"
25 #include "main/menums.h"
26
27 static void
28 set_io_mask(nir_shader *shader, nir_variable *var, int offset, int len,
29 bool is_output_read)
30 {
31 for (int i = 0; i < len; i++) {
32 assert(var->data.location != -1);
33
34 int idx = var->data.location + offset + i;
35 bool is_patch_generic = var->data.patch &&
36 idx != VARYING_SLOT_TESS_LEVEL_INNER &&
37 idx != VARYING_SLOT_TESS_LEVEL_OUTER &&
38 idx != VARYING_SLOT_BOUNDING_BOX0 &&
39 idx != VARYING_SLOT_BOUNDING_BOX1;
40 uint64_t bitfield;
41
42 if (is_patch_generic) {
43 assert(idx >= VARYING_SLOT_PATCH0 && idx < VARYING_SLOT_TESS_MAX);
44 bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0);
45 }
46 else {
47 assert(idx < VARYING_SLOT_MAX);
48 bitfield = BITFIELD64_BIT(idx);
49 }
50
51 if (var->data.mode == nir_var_shader_in) {
52 if (is_patch_generic)
53 shader->info.patch_inputs_read |= bitfield;
54 else
55 shader->info.inputs_read |= bitfield;
56
57 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
58 shader->info.fs.uses_sample_qualifier |= var->data.sample;
59 }
60 } else {
61 assert(var->data.mode == nir_var_shader_out);
62 if (is_output_read) {
63 if (is_patch_generic) {
64 shader->info.patch_outputs_read |= bitfield;
65 } else {
66 shader->info.outputs_read |= bitfield;
67 }
68 } else {
69 if (is_patch_generic) {
70 shader->info.patch_outputs_written |= bitfield;
71 } else if (!var->data.read_only) {
72 shader->info.outputs_written |= bitfield;
73 }
74 }
75
76
77 if (var->data.fb_fetch_output)
78 shader->info.outputs_read |= bitfield;
79 }
80 }
81 }
82
83 /**
84 * Mark an entire variable as used. Caller must ensure that the variable
85 * represents a shader input or output.
86 */
87 static void
88 mark_whole_variable(nir_shader *shader, nir_variable *var, bool is_output_read)
89 {
90 const struct glsl_type *type = var->type;
91
92 if (nir_is_per_vertex_io(var, shader->info.stage)) {
93 assert(glsl_type_is_array(type));
94 type = glsl_get_array_element(type);
95 }
96
97 const unsigned slots =
98 var->data.compact ? DIV_ROUND_UP(glsl_get_length(type), 4)
99 : glsl_count_attribute_slots(type, false);
100
101 set_io_mask(shader, var, 0, slots, is_output_read);
102 }
103
104 static unsigned
105 get_io_offset(nir_deref_instr *deref, bool is_vertex_input)
106 {
107 unsigned offset = 0;
108
109 for (nir_deref_instr *d = deref; d; d = nir_deref_instr_parent(d)) {
110 if (d->deref_type == nir_deref_type_array) {
111 nir_const_value *const_index = nir_src_as_const_value(d->arr.index);
112
113 if (!const_index)
114 return -1;
115
116 offset += glsl_count_attribute_slots(d->type, is_vertex_input) *
117 const_index->u32[0];
118 }
119 /* TODO: we can get the offset for structs here see nir_lower_io() */
120 }
121
122 return offset;
123 }
124
125 /**
126 * Try to mark a portion of the given varying as used. Caller must ensure
127 * that the variable represents a shader input or output.
128 *
129 * If the index can't be interpreted as a constant, or some other problem
130 * occurs, then nothing will be marked and false will be returned.
131 */
132 static bool
133 try_mask_partial_io(nir_shader *shader, nir_variable *var,
134 nir_deref_instr *deref, bool is_output_read)
135 {
136 const struct glsl_type *type = var->type;
137
138 if (nir_is_per_vertex_io(var, shader->info.stage)) {
139 assert(glsl_type_is_array(type));
140 type = glsl_get_array_element(type);
141 }
142
143 /* The code below only handles:
144 *
145 * - Indexing into matrices
146 * - Indexing into arrays of (arrays, matrices, vectors, or scalars)
147 *
148 * For now, we just give up if we see varying structs and arrays of structs
149 * here marking the entire variable as used.
150 */
151 if (!(glsl_type_is_matrix(type) ||
152 (glsl_type_is_array(type) && !var->data.compact &&
153 (glsl_type_is_numeric(glsl_without_array(type)) ||
154 glsl_type_is_boolean(glsl_without_array(type)))))) {
155
156 /* If we don't know how to handle this case, give up and let the
157 * caller mark the whole variable as used.
158 */
159 return false;
160 }
161
162 unsigned offset = get_io_offset(deref, false);
163 if (offset == -1)
164 return false;
165
166 unsigned num_elems;
167 unsigned elem_width = 1;
168 unsigned mat_cols = 1;
169 if (glsl_type_is_array(type)) {
170 num_elems = glsl_get_aoa_size(type);
171 if (glsl_type_is_matrix(glsl_without_array(type)))
172 mat_cols = glsl_get_matrix_columns(glsl_without_array(type));
173 } else {
174 num_elems = glsl_get_matrix_columns(type);
175 }
176
177 /* double element width for double types that takes two slots */
178 if (glsl_type_is_dual_slot(glsl_without_array(type)))
179 elem_width *= 2;
180
181 if (offset >= num_elems * elem_width * mat_cols) {
182 /* Constant index outside the bounds of the matrix/array. This could
183 * arise as a result of constant folding of a legal GLSL program.
184 *
185 * Even though the spec says that indexing outside the bounds of a
186 * matrix/array results in undefined behaviour, we don't want to pass
187 * out-of-range values to set_io_mask() (since this could result in
188 * slots that don't exist being marked as used), so just let the caller
189 * mark the whole variable as used.
190 */
191 return false;
192 }
193
194 set_io_mask(shader, var, offset, elem_width, is_output_read);
195 return true;
196 }
197
198 static void
199 gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
200 void *dead_ctx)
201 {
202 switch (instr->intrinsic) {
203 case nir_intrinsic_discard:
204 case nir_intrinsic_discard_if:
205 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
206 shader->info.fs.uses_discard = true;
207 break;
208
209 case nir_intrinsic_interp_deref_at_centroid:
210 case nir_intrinsic_interp_deref_at_sample:
211 case nir_intrinsic_interp_deref_at_offset:
212 case nir_intrinsic_load_deref:
213 case nir_intrinsic_store_deref:{
214 nir_deref_instr *deref = nir_src_as_deref(instr->src[0]);
215 nir_variable *var = nir_deref_instr_get_variable(deref);
216
217 if (var->data.mode == nir_var_shader_in ||
218 var->data.mode == nir_var_shader_out) {
219 bool is_output_read = false;
220 if (var->data.mode == nir_var_shader_out &&
221 instr->intrinsic == nir_intrinsic_load_deref)
222 is_output_read = true;
223
224 if (!try_mask_partial_io(shader, var, deref, is_output_read))
225 mark_whole_variable(shader, var, is_output_read);
226
227 /* We need to track which input_reads bits correspond to a
228 * dvec3/dvec4 input attribute */
229 if (shader->info.stage == MESA_SHADER_VERTEX &&
230 var->data.mode == nir_var_shader_in &&
231 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
232 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, false); i++) {
233 int idx = var->data.location + i;
234 shader->info.vs.double_inputs |= BITFIELD64_BIT(idx);
235 }
236 }
237 }
238 break;
239 }
240
241 case nir_intrinsic_load_draw_id:
242 case nir_intrinsic_load_frag_coord:
243 case nir_intrinsic_load_front_face:
244 case nir_intrinsic_load_vertex_id:
245 case nir_intrinsic_load_vertex_id_zero_base:
246 case nir_intrinsic_load_base_vertex:
247 case nir_intrinsic_load_first_vertex:
248 case nir_intrinsic_load_is_indexed_draw:
249 case nir_intrinsic_load_base_instance:
250 case nir_intrinsic_load_instance_id:
251 case nir_intrinsic_load_sample_id:
252 case nir_intrinsic_load_sample_pos:
253 case nir_intrinsic_load_sample_mask_in:
254 case nir_intrinsic_load_primitive_id:
255 case nir_intrinsic_load_invocation_id:
256 case nir_intrinsic_load_local_invocation_id:
257 case nir_intrinsic_load_local_invocation_index:
258 case nir_intrinsic_load_work_group_id:
259 case nir_intrinsic_load_num_work_groups:
260 case nir_intrinsic_load_tess_coord:
261 case nir_intrinsic_load_tess_level_outer:
262 case nir_intrinsic_load_tess_level_inner:
263 case nir_intrinsic_load_patch_vertices_in:
264 shader->info.system_values_read |=
265 (1ull << nir_system_value_from_intrinsic(instr->intrinsic));
266 break;
267
268 case nir_intrinsic_end_primitive:
269 case nir_intrinsic_end_primitive_with_counter:
270 assert(shader->info.stage == MESA_SHADER_GEOMETRY);
271 shader->info.gs.uses_end_primitive = 1;
272 /* fall through */
273
274 case nir_intrinsic_emit_vertex:
275 if (nir_intrinsic_stream_id(instr) > 0)
276 shader->info.gs.uses_streams = true;
277
278 break;
279
280 default:
281 break;
282 }
283 }
284
285 static void
286 gather_tex_info(nir_tex_instr *instr, nir_shader *shader)
287 {
288 switch (instr->op) {
289 case nir_texop_tg4:
290 shader->info.uses_texture_gather = true;
291 break;
292 case nir_texop_txf:
293 case nir_texop_txf_ms:
294 case nir_texop_txf_ms_mcs:
295 shader->info.textures_used_by_txf |=
296 ((1 << MAX2(instr->texture_array_size, 1)) - 1) <<
297 instr->texture_index;
298 break;
299 default:
300 break;
301 }
302 }
303
304 static void
305 gather_alu_info(nir_alu_instr *instr, nir_shader *shader)
306 {
307 switch (instr->op) {
308 case nir_op_fddx:
309 case nir_op_fddy:
310 shader->info.uses_fddx_fddy = true;
311 break;
312 default:
313 break;
314 }
315 }
316
317 static void
318 gather_info_block(nir_block *block, nir_shader *shader, void *dead_ctx)
319 {
320 nir_foreach_instr(instr, block) {
321 switch (instr->type) {
322 case nir_instr_type_alu:
323 gather_alu_info(nir_instr_as_alu(instr), shader);
324 break;
325 case nir_instr_type_intrinsic:
326 gather_intrinsic_info(nir_instr_as_intrinsic(instr), shader, dead_ctx);
327 break;
328 case nir_instr_type_tex:
329 gather_tex_info(nir_instr_as_tex(instr), shader);
330 break;
331 case nir_instr_type_call:
332 assert(!"nir_shader_gather_info only works if functions are inlined");
333 break;
334 default:
335 break;
336 }
337 }
338 }
339
340 static unsigned
341 glsl_type_get_sampler_count(const struct glsl_type *type)
342 {
343 if (glsl_type_is_array(type)) {
344 return (glsl_get_aoa_size(type) *
345 glsl_type_get_sampler_count(glsl_without_array(type)));
346 }
347
348 if (glsl_type_is_struct(type)) {
349 unsigned count = 0;
350 for (int i = 0; i < glsl_get_length(type); i++)
351 count += glsl_type_get_sampler_count(glsl_get_struct_field(type, i));
352 return count;
353 }
354
355 if (glsl_type_is_sampler(type))
356 return 1;
357
358 return 0;
359 }
360
361 static unsigned
362 glsl_type_get_image_count(const struct glsl_type *type)
363 {
364 if (glsl_type_is_array(type)) {
365 return (glsl_get_aoa_size(type) *
366 glsl_type_get_image_count(glsl_without_array(type)));
367 }
368
369 if (glsl_type_is_struct(type)) {
370 unsigned count = 0;
371 for (int i = 0; i < glsl_get_length(type); i++)
372 count += glsl_type_get_image_count(glsl_get_struct_field(type, i));
373 return count;
374 }
375
376 if (glsl_type_is_image(type))
377 return 1;
378
379 return 0;
380 }
381
382 void
383 nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint)
384 {
385 shader->info.num_textures = 0;
386 shader->info.num_images = 0;
387 nir_foreach_variable(var, &shader->uniforms) {
388 shader->info.num_textures += glsl_type_get_sampler_count(var->type);
389 shader->info.num_images += glsl_type_get_image_count(var->type);
390 }
391
392 shader->info.inputs_read = 0;
393 shader->info.outputs_written = 0;
394 shader->info.outputs_read = 0;
395 shader->info.patch_outputs_read = 0;
396 shader->info.patch_inputs_read = 0;
397 shader->info.patch_outputs_written = 0;
398 shader->info.system_values_read = 0;
399 if (shader->info.stage == MESA_SHADER_VERTEX) {
400 shader->info.vs.double_inputs = 0;
401 }
402 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
403 shader->info.fs.uses_sample_qualifier = false;
404 }
405
406 void *dead_ctx = ralloc_context(NULL);
407 nir_foreach_block(block, entrypoint) {
408 gather_info_block(block, shader, dead_ctx);
409 }
410 ralloc_free(dead_ctx);
411 }