nir: Add and set info::uses_64bit
[mesa.git] / src / compiler / nir / nir_gather_info.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir.h"
25 #include "main/menums.h"
26
27 static void
28 set_io_mask(nir_shader *shader, nir_variable *var, int offset, int len,
29 bool is_output_read)
30 {
31 for (int i = 0; i < len; i++) {
32 assert(var->data.location != -1);
33
34 int idx = var->data.location + offset + i;
35 bool is_patch_generic = var->data.patch &&
36 idx != VARYING_SLOT_TESS_LEVEL_INNER &&
37 idx != VARYING_SLOT_TESS_LEVEL_OUTER &&
38 idx != VARYING_SLOT_BOUNDING_BOX0 &&
39 idx != VARYING_SLOT_BOUNDING_BOX1;
40 uint64_t bitfield;
41
42 if (is_patch_generic) {
43 assert(idx >= VARYING_SLOT_PATCH0 && idx < VARYING_SLOT_TESS_MAX);
44 bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0);
45 }
46 else {
47 assert(idx < VARYING_SLOT_MAX);
48 bitfield = BITFIELD64_BIT(idx);
49 }
50
51 if (var->data.mode == nir_var_shader_in) {
52 if (is_patch_generic)
53 shader->info.patch_inputs_read |= bitfield;
54 else
55 shader->info.inputs_read |= bitfield;
56
57 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
58 shader->info.fs.uses_sample_qualifier |= var->data.sample;
59 }
60 } else {
61 assert(var->data.mode == nir_var_shader_out);
62 if (is_output_read) {
63 if (is_patch_generic) {
64 shader->info.patch_outputs_read |= bitfield;
65 } else {
66 shader->info.outputs_read |= bitfield;
67 }
68 } else {
69 if (is_patch_generic) {
70 shader->info.patch_outputs_written |= bitfield;
71 } else if (!var->data.read_only) {
72 shader->info.outputs_written |= bitfield;
73 }
74 }
75
76
77 if (var->data.fb_fetch_output)
78 shader->info.outputs_read |= bitfield;
79 }
80 }
81 }
82
83 /**
84 * Mark an entire variable as used. Caller must ensure that the variable
85 * represents a shader input or output.
86 */
87 static void
88 mark_whole_variable(nir_shader *shader, nir_variable *var, bool is_output_read)
89 {
90 const struct glsl_type *type = var->type;
91
92 if (nir_is_per_vertex_io(var, shader->info.stage)) {
93 assert(glsl_type_is_array(type));
94 type = glsl_get_array_element(type);
95 }
96
97 const unsigned slots =
98 var->data.compact ? DIV_ROUND_UP(glsl_get_length(type), 4)
99 : glsl_count_attribute_slots(type, false);
100
101 set_io_mask(shader, var, 0, slots, is_output_read);
102 }
103
104 static unsigned
105 get_io_offset(nir_deref_instr *deref, bool is_vertex_input)
106 {
107 unsigned offset = 0;
108
109 for (nir_deref_instr *d = deref; d; d = nir_deref_instr_parent(d)) {
110 if (d->deref_type == nir_deref_type_array) {
111 if (!nir_src_is_const(d->arr.index))
112 return -1;
113
114 offset += glsl_count_attribute_slots(d->type, is_vertex_input) *
115 nir_src_as_uint(d->arr.index);
116 }
117 /* TODO: we can get the offset for structs here see nir_lower_io() */
118 }
119
120 return offset;
121 }
122
123 /**
124 * Try to mark a portion of the given varying as used. Caller must ensure
125 * that the variable represents a shader input or output.
126 *
127 * If the index can't be interpreted as a constant, or some other problem
128 * occurs, then nothing will be marked and false will be returned.
129 */
130 static bool
131 try_mask_partial_io(nir_shader *shader, nir_variable *var,
132 nir_deref_instr *deref, bool is_output_read)
133 {
134 const struct glsl_type *type = var->type;
135
136 if (nir_is_per_vertex_io(var, shader->info.stage)) {
137 assert(glsl_type_is_array(type));
138 type = glsl_get_array_element(type);
139 }
140
141 /* The code below only handles:
142 *
143 * - Indexing into matrices
144 * - Indexing into arrays of (arrays, matrices, vectors, or scalars)
145 *
146 * For now, we just give up if we see varying structs and arrays of structs
147 * here marking the entire variable as used.
148 */
149 if (!(glsl_type_is_matrix(type) ||
150 (glsl_type_is_array(type) && !var->data.compact &&
151 (glsl_type_is_numeric(glsl_without_array(type)) ||
152 glsl_type_is_boolean(glsl_without_array(type)))))) {
153
154 /* If we don't know how to handle this case, give up and let the
155 * caller mark the whole variable as used.
156 */
157 return false;
158 }
159
160 unsigned offset = get_io_offset(deref, false);
161 if (offset == -1)
162 return false;
163
164 unsigned num_elems;
165 unsigned elem_width = 1;
166 unsigned mat_cols = 1;
167 if (glsl_type_is_array(type)) {
168 num_elems = glsl_get_aoa_size(type);
169 if (glsl_type_is_matrix(glsl_without_array(type)))
170 mat_cols = glsl_get_matrix_columns(glsl_without_array(type));
171 } else {
172 num_elems = glsl_get_matrix_columns(type);
173 }
174
175 /* double element width for double types that takes two slots */
176 if (glsl_type_is_dual_slot(glsl_without_array(type)))
177 elem_width *= 2;
178
179 if (offset >= num_elems * elem_width * mat_cols) {
180 /* Constant index outside the bounds of the matrix/array. This could
181 * arise as a result of constant folding of a legal GLSL program.
182 *
183 * Even though the spec says that indexing outside the bounds of a
184 * matrix/array results in undefined behaviour, we don't want to pass
185 * out-of-range values to set_io_mask() (since this could result in
186 * slots that don't exist being marked as used), so just let the caller
187 * mark the whole variable as used.
188 */
189 return false;
190 }
191
192 set_io_mask(shader, var, offset, elem_width, is_output_read);
193 return true;
194 }
195
196 static void
197 gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
198 void *dead_ctx)
199 {
200 switch (instr->intrinsic) {
201 case nir_intrinsic_discard:
202 case nir_intrinsic_discard_if:
203 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
204 shader->info.fs.uses_discard = true;
205 break;
206
207 case nir_intrinsic_interp_deref_at_centroid:
208 case nir_intrinsic_interp_deref_at_sample:
209 case nir_intrinsic_interp_deref_at_offset:
210 case nir_intrinsic_load_deref:
211 case nir_intrinsic_store_deref:{
212 nir_deref_instr *deref = nir_src_as_deref(instr->src[0]);
213 if (deref->mode == nir_var_shader_in ||
214 deref->mode == nir_var_shader_out) {
215 nir_variable *var = nir_deref_instr_get_variable(deref);
216 bool is_output_read = false;
217 if (var->data.mode == nir_var_shader_out &&
218 instr->intrinsic == nir_intrinsic_load_deref)
219 is_output_read = true;
220
221 if (!try_mask_partial_io(shader, var, deref, is_output_read))
222 mark_whole_variable(shader, var, is_output_read);
223
224 /* We need to track which input_reads bits correspond to a
225 * dvec3/dvec4 input attribute */
226 if (shader->info.stage == MESA_SHADER_VERTEX &&
227 var->data.mode == nir_var_shader_in &&
228 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
229 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, false); i++) {
230 int idx = var->data.location + i;
231 shader->info.vs.double_inputs |= BITFIELD64_BIT(idx);
232 }
233 }
234 }
235 break;
236 }
237
238 case nir_intrinsic_load_draw_id:
239 case nir_intrinsic_load_frag_coord:
240 case nir_intrinsic_load_front_face:
241 case nir_intrinsic_load_vertex_id:
242 case nir_intrinsic_load_vertex_id_zero_base:
243 case nir_intrinsic_load_base_vertex:
244 case nir_intrinsic_load_first_vertex:
245 case nir_intrinsic_load_is_indexed_draw:
246 case nir_intrinsic_load_base_instance:
247 case nir_intrinsic_load_instance_id:
248 case nir_intrinsic_load_sample_id:
249 case nir_intrinsic_load_sample_pos:
250 case nir_intrinsic_load_sample_mask_in:
251 case nir_intrinsic_load_primitive_id:
252 case nir_intrinsic_load_invocation_id:
253 case nir_intrinsic_load_local_invocation_id:
254 case nir_intrinsic_load_local_invocation_index:
255 case nir_intrinsic_load_work_group_id:
256 case nir_intrinsic_load_num_work_groups:
257 case nir_intrinsic_load_tess_coord:
258 case nir_intrinsic_load_tess_level_outer:
259 case nir_intrinsic_load_tess_level_inner:
260 case nir_intrinsic_load_patch_vertices_in:
261 shader->info.system_values_read |=
262 (1ull << nir_system_value_from_intrinsic(instr->intrinsic));
263 break;
264
265 case nir_intrinsic_end_primitive:
266 case nir_intrinsic_end_primitive_with_counter:
267 assert(shader->info.stage == MESA_SHADER_GEOMETRY);
268 shader->info.gs.uses_end_primitive = 1;
269 /* fall through */
270
271 case nir_intrinsic_emit_vertex:
272 if (nir_intrinsic_stream_id(instr) > 0)
273 shader->info.gs.uses_streams = true;
274
275 break;
276
277 default:
278 break;
279 }
280 }
281
282 static void
283 gather_tex_info(nir_tex_instr *instr, nir_shader *shader)
284 {
285 switch (instr->op) {
286 case nir_texop_tg4:
287 shader->info.uses_texture_gather = true;
288 break;
289 case nir_texop_txf:
290 case nir_texop_txf_ms:
291 case nir_texop_txf_ms_mcs:
292 shader->info.textures_used_by_txf |=
293 ((1 << MAX2(instr->texture_array_size, 1)) - 1) <<
294 instr->texture_index;
295 break;
296 default:
297 break;
298 }
299 }
300
301 static void
302 gather_alu_info(nir_alu_instr *instr, nir_shader *shader)
303 {
304 switch (instr->op) {
305 case nir_op_fddx:
306 case nir_op_fddy:
307 shader->info.uses_fddx_fddy = true;
308 break;
309 default:
310 shader->info.uses_64bit |= instr->dest.dest.ssa.bit_size == 64;
311 unsigned num_srcs = nir_op_infos[instr->op].num_inputs;
312 for (unsigned i = 0; i < num_srcs; i++) {
313 shader->info.uses_64bit |= nir_src_bit_size(instr->src[i].src) == 64;
314 }
315 break;
316 }
317 }
318
319 static void
320 gather_info_block(nir_block *block, nir_shader *shader, void *dead_ctx)
321 {
322 nir_foreach_instr(instr, block) {
323 switch (instr->type) {
324 case nir_instr_type_alu:
325 gather_alu_info(nir_instr_as_alu(instr), shader);
326 break;
327 case nir_instr_type_intrinsic:
328 gather_intrinsic_info(nir_instr_as_intrinsic(instr), shader, dead_ctx);
329 break;
330 case nir_instr_type_tex:
331 gather_tex_info(nir_instr_as_tex(instr), shader);
332 break;
333 case nir_instr_type_call:
334 assert(!"nir_shader_gather_info only works if functions are inlined");
335 break;
336 default:
337 break;
338 }
339 }
340 }
341
342 static unsigned
343 glsl_type_get_sampler_count(const struct glsl_type *type)
344 {
345 if (glsl_type_is_array(type)) {
346 return (glsl_get_aoa_size(type) *
347 glsl_type_get_sampler_count(glsl_without_array(type)));
348 }
349
350 if (glsl_type_is_struct(type)) {
351 unsigned count = 0;
352 for (int i = 0; i < glsl_get_length(type); i++)
353 count += glsl_type_get_sampler_count(glsl_get_struct_field(type, i));
354 return count;
355 }
356
357 if (glsl_type_is_sampler(type))
358 return 1;
359
360 return 0;
361 }
362
363 static unsigned
364 glsl_type_get_image_count(const struct glsl_type *type)
365 {
366 if (glsl_type_is_array(type)) {
367 return (glsl_get_aoa_size(type) *
368 glsl_type_get_image_count(glsl_without_array(type)));
369 }
370
371 if (glsl_type_is_struct(type)) {
372 unsigned count = 0;
373 for (int i = 0; i < glsl_get_length(type); i++)
374 count += glsl_type_get_image_count(glsl_get_struct_field(type, i));
375 return count;
376 }
377
378 if (glsl_type_is_image(type))
379 return 1;
380
381 return 0;
382 }
383
384 void
385 nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint)
386 {
387 shader->info.num_textures = 0;
388 shader->info.num_images = 0;
389 nir_foreach_variable(var, &shader->uniforms) {
390 shader->info.num_textures += glsl_type_get_sampler_count(var->type);
391 shader->info.num_images += glsl_type_get_image_count(var->type);
392 }
393
394 shader->info.inputs_read = 0;
395 shader->info.outputs_written = 0;
396 shader->info.outputs_read = 0;
397 shader->info.patch_outputs_read = 0;
398 shader->info.patch_inputs_read = 0;
399 shader->info.patch_outputs_written = 0;
400 shader->info.system_values_read = 0;
401 if (shader->info.stage == MESA_SHADER_VERTEX) {
402 shader->info.vs.double_inputs = 0;
403 }
404 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
405 shader->info.fs.uses_sample_qualifier = false;
406 }
407
408 void *dead_ctx = ralloc_context(NULL);
409 nir_foreach_block(block, entrypoint) {
410 gather_info_block(block, shader, dead_ctx);
411 }
412 ralloc_free(dead_ctx);
413 }