nir: Report progress properly in nir_lower_bool_to_*
[mesa.git] / src / compiler / nir / nir_instr_set.c
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir_instr_set.h"
25 #include "nir_vla.h"
26 #include "util/half_float.h"
27
28 static bool
29 src_is_ssa(nir_src *src, void *data)
30 {
31 (void) data;
32 return src->is_ssa;
33 }
34
35 static bool
36 dest_is_ssa(nir_dest *dest, void *data)
37 {
38 (void) data;
39 return dest->is_ssa;
40 }
41
42 ASSERTED static inline bool
43 instr_each_src_and_dest_is_ssa(const nir_instr *instr)
44 {
45 if (!nir_foreach_dest((nir_instr *)instr, dest_is_ssa, NULL) ||
46 !nir_foreach_src((nir_instr *)instr, src_is_ssa, NULL))
47 return false;
48
49 return true;
50 }
51
52 /* This function determines if uses of an instruction can safely be rewritten
53 * to use another identical instruction instead. Note that this function must
54 * be kept in sync with hash_instr() and nir_instrs_equal() -- only
55 * instructions that pass this test will be handed on to those functions, and
56 * conversely they must handle everything that this function returns true for.
57 */
58 static bool
59 instr_can_rewrite(const nir_instr *instr)
60 {
61 /* We only handle SSA. */
62 assert(instr_each_src_and_dest_is_ssa(instr));
63
64 switch (instr->type) {
65 case nir_instr_type_alu:
66 case nir_instr_type_deref:
67 case nir_instr_type_tex:
68 case nir_instr_type_load_const:
69 case nir_instr_type_phi:
70 return true;
71 case nir_instr_type_intrinsic:
72 return nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr));
73 case nir_instr_type_call:
74 case nir_instr_type_jump:
75 case nir_instr_type_ssa_undef:
76 return false;
77 case nir_instr_type_parallel_copy:
78 default:
79 unreachable("Invalid instruction type");
80 }
81
82 return false;
83 }
84
85
86 #define HASH(hash, data) XXH32(&(data), sizeof(data), hash)
87
88 static uint32_t
89 hash_src(uint32_t hash, const nir_src *src)
90 {
91 assert(src->is_ssa);
92 hash = HASH(hash, src->ssa);
93 return hash;
94 }
95
96 static uint32_t
97 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
98 {
99 hash = HASH(hash, src->abs);
100 hash = HASH(hash, src->negate);
101
102 for (unsigned i = 0; i < num_components; i++)
103 hash = HASH(hash, src->swizzle[i]);
104
105 hash = hash_src(hash, &src->src);
106 return hash;
107 }
108
109 static uint32_t
110 hash_alu(uint32_t hash, const nir_alu_instr *instr)
111 {
112 hash = HASH(hash, instr->op);
113
114 /* We explicitly don't hash instr->exact. */
115 uint8_t flags = instr->no_signed_wrap |
116 instr->no_unsigned_wrap << 1;
117 hash = HASH(hash, flags);
118
119 hash = HASH(hash, instr->dest.dest.ssa.num_components);
120 hash = HASH(hash, instr->dest.dest.ssa.bit_size);
121
122 if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
123 assert(nir_op_infos[instr->op].num_inputs >= 2);
124
125 uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
126 nir_ssa_alu_instr_src_components(instr, 0));
127 uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
128 nir_ssa_alu_instr_src_components(instr, 1));
129 /* For commutative operations, we need some commutative way of
130 * combining the hashes. One option would be to XOR them but that
131 * means that anything with two identical sources will hash to 0 and
132 * that's common enough we probably don't want the guaranteed
133 * collision. Either addition or multiplication will also work.
134 */
135 hash = hash0 * hash1;
136
137 for (unsigned i = 2; i < nir_op_infos[instr->op].num_inputs; i++) {
138 hash = hash_alu_src(hash, &instr->src[i],
139 nir_ssa_alu_instr_src_components(instr, i));
140 }
141 } else {
142 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
143 hash = hash_alu_src(hash, &instr->src[i],
144 nir_ssa_alu_instr_src_components(instr, i));
145 }
146 }
147
148 return hash;
149 }
150
151 static uint32_t
152 hash_deref(uint32_t hash, const nir_deref_instr *instr)
153 {
154 hash = HASH(hash, instr->deref_type);
155 hash = HASH(hash, instr->mode);
156 hash = HASH(hash, instr->type);
157
158 if (instr->deref_type == nir_deref_type_var)
159 return HASH(hash, instr->var);
160
161 hash = hash_src(hash, &instr->parent);
162
163 switch (instr->deref_type) {
164 case nir_deref_type_struct:
165 hash = HASH(hash, instr->strct.index);
166 break;
167
168 case nir_deref_type_array:
169 case nir_deref_type_ptr_as_array:
170 hash = hash_src(hash, &instr->arr.index);
171 break;
172
173 case nir_deref_type_cast:
174 hash = HASH(hash, instr->cast.ptr_stride);
175 break;
176
177 case nir_deref_type_var:
178 case nir_deref_type_array_wildcard:
179 /* Nothing to do */
180 break;
181
182 default:
183 unreachable("Invalid instruction deref type");
184 }
185
186 return hash;
187 }
188
189 static uint32_t
190 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
191 {
192 hash = HASH(hash, instr->def.num_components);
193
194 if (instr->def.bit_size == 1) {
195 for (unsigned i = 0; i < instr->def.num_components; i++) {
196 uint8_t b = instr->value[i].b;
197 hash = HASH(hash, b);
198 }
199 } else {
200 unsigned size = instr->def.num_components * sizeof(*instr->value);
201 hash = XXH32(instr->value, size, hash);
202 }
203
204 return hash;
205 }
206
207 static int
208 cmp_phi_src(const void *data1, const void *data2)
209 {
210 nir_phi_src *src1 = *(nir_phi_src **)data1;
211 nir_phi_src *src2 = *(nir_phi_src **)data2;
212 return src1->pred - src2->pred;
213 }
214
215 static uint32_t
216 hash_phi(uint32_t hash, const nir_phi_instr *instr)
217 {
218 hash = HASH(hash, instr->instr.block);
219
220 /* sort sources by predecessor, since the order shouldn't matter */
221 unsigned num_preds = instr->instr.block->predecessors->entries;
222 NIR_VLA(nir_phi_src *, srcs, num_preds);
223 unsigned i = 0;
224 nir_foreach_phi_src(src, instr) {
225 srcs[i++] = src;
226 }
227
228 qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
229
230 for (i = 0; i < num_preds; i++) {
231 hash = hash_src(hash, &srcs[i]->src);
232 hash = HASH(hash, srcs[i]->pred);
233 }
234
235 return hash;
236 }
237
238 static uint32_t
239 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
240 {
241 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
242 hash = HASH(hash, instr->intrinsic);
243
244 if (info->has_dest) {
245 hash = HASH(hash, instr->dest.ssa.num_components);
246 hash = HASH(hash, instr->dest.ssa.bit_size);
247 }
248
249 hash = XXH32(instr->const_index, info->num_indices * sizeof(instr->const_index[0]), hash);
250 return hash;
251 }
252
253 static uint32_t
254 hash_tex(uint32_t hash, const nir_tex_instr *instr)
255 {
256 hash = HASH(hash, instr->op);
257 hash = HASH(hash, instr->num_srcs);
258
259 for (unsigned i = 0; i < instr->num_srcs; i++) {
260 hash = HASH(hash, instr->src[i].src_type);
261 hash = hash_src(hash, &instr->src[i].src);
262 }
263
264 hash = HASH(hash, instr->coord_components);
265 hash = HASH(hash, instr->sampler_dim);
266 hash = HASH(hash, instr->is_array);
267 hash = HASH(hash, instr->is_shadow);
268 hash = HASH(hash, instr->is_new_style_shadow);
269 unsigned component = instr->component;
270 hash = HASH(hash, component);
271 for (unsigned i = 0; i < 4; ++i)
272 for (unsigned j = 0; j < 2; ++j)
273 hash = HASH(hash, instr->tg4_offsets[i][j]);
274 hash = HASH(hash, instr->texture_index);
275 hash = HASH(hash, instr->sampler_index);
276 hash = HASH(hash, instr->texture_non_uniform);
277 hash = HASH(hash, instr->sampler_non_uniform);
278
279 return hash;
280 }
281
282 /* Computes a hash of an instruction for use in a hash table. Note that this
283 * will only work for instructions where instr_can_rewrite() returns true, and
284 * it should return identical hashes for two instructions that are the same
285 * according nir_instrs_equal().
286 */
287
288 static uint32_t
289 hash_instr(const void *data)
290 {
291 const nir_instr *instr = data;
292 uint32_t hash = 0;
293
294 switch (instr->type) {
295 case nir_instr_type_alu:
296 hash = hash_alu(hash, nir_instr_as_alu(instr));
297 break;
298 case nir_instr_type_deref:
299 hash = hash_deref(hash, nir_instr_as_deref(instr));
300 break;
301 case nir_instr_type_load_const:
302 hash = hash_load_const(hash, nir_instr_as_load_const(instr));
303 break;
304 case nir_instr_type_phi:
305 hash = hash_phi(hash, nir_instr_as_phi(instr));
306 break;
307 case nir_instr_type_intrinsic:
308 hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
309 break;
310 case nir_instr_type_tex:
311 hash = hash_tex(hash, nir_instr_as_tex(instr));
312 break;
313 default:
314 unreachable("Invalid instruction type");
315 }
316
317 return hash;
318 }
319
320 bool
321 nir_srcs_equal(nir_src src1, nir_src src2)
322 {
323 if (src1.is_ssa) {
324 if (src2.is_ssa) {
325 return src1.ssa == src2.ssa;
326 } else {
327 return false;
328 }
329 } else {
330 if (src2.is_ssa) {
331 return false;
332 } else {
333 if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
334 return false;
335
336 if (src1.reg.indirect) {
337 if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
338 return false;
339 }
340
341 return src1.reg.reg == src2.reg.reg &&
342 src1.reg.base_offset == src2.reg.base_offset;
343 }
344 }
345 }
346
347 /**
348 * If the \p s is an SSA value that was generated by a negation instruction,
349 * that instruction is returned as a \c nir_alu_instr. Otherwise \c NULL is
350 * returned.
351 */
352 static nir_alu_instr *
353 get_neg_instr(nir_src s)
354 {
355 nir_alu_instr *alu = nir_src_as_alu_instr(s);
356
357 return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
358 ? alu : NULL;
359 }
360
361 bool
362 nir_const_value_negative_equal(nir_const_value c1,
363 nir_const_value c2,
364 nir_alu_type full_type)
365 {
366 assert(nir_alu_type_get_base_type(full_type) != nir_type_invalid);
367 assert(nir_alu_type_get_type_size(full_type) != 0);
368
369 switch (full_type) {
370 case nir_type_float16:
371 return _mesa_half_to_float(c1.u16) == -_mesa_half_to_float(c2.u16);
372
373 case nir_type_float32:
374 return c1.f32 == -c2.f32;
375
376 case nir_type_float64:
377 return c1.f64 == -c2.f64;
378
379 case nir_type_int8:
380 case nir_type_uint8:
381 return c1.i8 == -c2.i8;
382
383 case nir_type_int16:
384 case nir_type_uint16:
385 return c1.i16 == -c2.i16;
386
387 case nir_type_int32:
388 case nir_type_uint32:
389 return c1.i32 == -c2.i32;
390
391 case nir_type_int64:
392 case nir_type_uint64:
393 return c1.i64 == -c2.i64;
394
395 default:
396 break;
397 }
398
399 return false;
400 }
401
402 /**
403 * Shallow compare of ALU srcs to determine if one is the negation of the other
404 *
405 * This function detects cases where \p alu1 is a constant and \p alu2 is a
406 * constant that is its negation. It will also detect cases where \p alu2 is
407 * an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
408 *
409 * This function does not detect the general case when \p alu1 and \p alu2 are
410 * SSA values that are the negations of each other (e.g., \p alu1 represents
411 * (a * b) and \p alu2 represents (-a * b)).
412 *
413 * \warning
414 * It is the responsibility of the caller to ensure that the component counts,
415 * write masks, and base types of the sources being compared are compatible.
416 */
417 bool
418 nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
419 const nir_alu_instr *alu2,
420 unsigned src1, unsigned src2)
421 {
422 #ifndef NDEBUG
423 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
424 assert(nir_alu_instr_channel_used(alu1, src1, i) ==
425 nir_alu_instr_channel_used(alu2, src2, i));
426 }
427
428 if (nir_op_infos[alu1->op].input_types[src1] == nir_type_float) {
429 assert(nir_op_infos[alu1->op].input_types[src1] ==
430 nir_op_infos[alu2->op].input_types[src2]);
431 } else {
432 assert(nir_op_infos[alu1->op].input_types[src1] == nir_type_int);
433 assert(nir_op_infos[alu2->op].input_types[src2] == nir_type_int);
434 }
435 #endif
436
437 if (alu1->src[src1].abs != alu2->src[src2].abs)
438 return false;
439
440 bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
441
442 /* Handling load_const instructions is tricky. */
443
444 const nir_const_value *const const1 =
445 nir_src_as_const_value(alu1->src[src1].src);
446
447 if (const1 != NULL) {
448 /* Assume that constant folding will eliminate source mods and unary
449 * ops.
450 */
451 if (parity)
452 return false;
453
454 const nir_const_value *const const2 =
455 nir_src_as_const_value(alu2->src[src2].src);
456
457 if (const2 == NULL)
458 return false;
459
460 if (nir_src_bit_size(alu1->src[src1].src) !=
461 nir_src_bit_size(alu2->src[src2].src))
462 return false;
463
464 const nir_alu_type full_type = nir_op_infos[alu1->op].input_types[src1] |
465 nir_src_bit_size(alu1->src[src1].src);
466 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
467 if (nir_alu_instr_channel_used(alu1, src1, i) &&
468 !nir_const_value_negative_equal(const1[alu1->src[src1].swizzle[i]],
469 const2[alu2->src[src2].swizzle[i]],
470 full_type))
471 return false;
472 }
473
474 return true;
475 }
476
477 uint8_t alu1_swizzle[4] = {0};
478 nir_src alu1_actual_src;
479 nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
480
481 if (neg1) {
482 parity = !parity;
483 alu1_actual_src = neg1->src[0].src;
484
485 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
486 alu1_swizzle[i] = neg1->src[0].swizzle[i];
487 } else {
488 alu1_actual_src = alu1->src[src1].src;
489
490 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
491 alu1_swizzle[i] = i;
492 }
493
494 uint8_t alu2_swizzle[4] = {0};
495 nir_src alu2_actual_src;
496 nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
497
498 if (neg2) {
499 parity = !parity;
500 alu2_actual_src = neg2->src[0].src;
501
502 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
503 alu2_swizzle[i] = neg2->src[0].swizzle[i];
504 } else {
505 alu2_actual_src = alu2->src[src2].src;
506
507 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
508 alu2_swizzle[i] = i;
509 }
510
511 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
512 if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
513 alu2_swizzle[alu2->src[src2].swizzle[i]])
514 return false;
515 }
516
517 return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
518 }
519
520 bool
521 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
522 unsigned src1, unsigned src2)
523 {
524 if (alu1->src[src1].abs != alu2->src[src2].abs ||
525 alu1->src[src1].negate != alu2->src[src2].negate)
526 return false;
527
528 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
529 if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
530 return false;
531 }
532
533 return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
534 }
535
536 /* Returns "true" if two instructions are equal. Note that this will only
537 * work for the subset of instructions defined by instr_can_rewrite(). Also,
538 * it should only return "true" for instructions that hash_instr() will return
539 * the same hash for (ignoring collisions, of course).
540 */
541
542 bool
543 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
544 {
545 assert(instr_can_rewrite(instr1) && instr_can_rewrite(instr2));
546
547 if (instr1->type != instr2->type)
548 return false;
549
550 switch (instr1->type) {
551 case nir_instr_type_alu: {
552 nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
553 nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
554
555 if (alu1->op != alu2->op)
556 return false;
557
558 /* We explicitly don't compare instr->exact. */
559
560 if (alu1->no_signed_wrap != alu2->no_signed_wrap)
561 return false;
562
563 if (alu1->no_unsigned_wrap != alu2->no_unsigned_wrap)
564 return false;
565
566 /* TODO: We can probably acutally do something more inteligent such
567 * as allowing different numbers and taking a maximum or something
568 * here */
569 if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
570 return false;
571
572 if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
573 return false;
574
575 if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
576 if ((!nir_alu_srcs_equal(alu1, alu2, 0, 0) ||
577 !nir_alu_srcs_equal(alu1, alu2, 1, 1)) &&
578 (!nir_alu_srcs_equal(alu1, alu2, 0, 1) ||
579 !nir_alu_srcs_equal(alu1, alu2, 1, 0)))
580 return false;
581
582 for (unsigned i = 2; i < nir_op_infos[alu1->op].num_inputs; i++) {
583 if (!nir_alu_srcs_equal(alu1, alu2, i, i))
584 return false;
585 }
586 } else {
587 for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
588 if (!nir_alu_srcs_equal(alu1, alu2, i, i))
589 return false;
590 }
591 }
592 return true;
593 }
594 case nir_instr_type_deref: {
595 nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
596 nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
597
598 if (deref1->deref_type != deref2->deref_type ||
599 deref1->mode != deref2->mode ||
600 deref1->type != deref2->type)
601 return false;
602
603 if (deref1->deref_type == nir_deref_type_var)
604 return deref1->var == deref2->var;
605
606 if (!nir_srcs_equal(deref1->parent, deref2->parent))
607 return false;
608
609 switch (deref1->deref_type) {
610 case nir_deref_type_struct:
611 if (deref1->strct.index != deref2->strct.index)
612 return false;
613 break;
614
615 case nir_deref_type_array:
616 case nir_deref_type_ptr_as_array:
617 if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
618 return false;
619 break;
620
621 case nir_deref_type_cast:
622 if (deref1->cast.ptr_stride != deref2->cast.ptr_stride)
623 return false;
624 break;
625
626 case nir_deref_type_var:
627 case nir_deref_type_array_wildcard:
628 /* Nothing to do */
629 break;
630
631 default:
632 unreachable("Invalid instruction deref type");
633 }
634 return true;
635 }
636 case nir_instr_type_tex: {
637 nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
638 nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
639
640 if (tex1->op != tex2->op)
641 return false;
642
643 if (tex1->num_srcs != tex2->num_srcs)
644 return false;
645 for (unsigned i = 0; i < tex1->num_srcs; i++) {
646 if (tex1->src[i].src_type != tex2->src[i].src_type ||
647 !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
648 return false;
649 }
650 }
651
652 if (tex1->coord_components != tex2->coord_components ||
653 tex1->sampler_dim != tex2->sampler_dim ||
654 tex1->is_array != tex2->is_array ||
655 tex1->is_shadow != tex2->is_shadow ||
656 tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
657 tex1->component != tex2->component ||
658 tex1->texture_index != tex2->texture_index ||
659 tex1->sampler_index != tex2->sampler_index) {
660 return false;
661 }
662
663 if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
664 sizeof(tex1->tg4_offsets)))
665 return false;
666
667 return true;
668 }
669 case nir_instr_type_load_const: {
670 nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
671 nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
672
673 if (load1->def.num_components != load2->def.num_components)
674 return false;
675
676 if (load1->def.bit_size != load2->def.bit_size)
677 return false;
678
679 if (load1->def.bit_size == 1) {
680 for (unsigned i = 0; i < load1->def.num_components; ++i) {
681 if (load1->value[i].b != load2->value[i].b)
682 return false;
683 }
684 } else {
685 unsigned size = load1->def.num_components * sizeof(*load1->value);
686 if (memcmp(load1->value, load2->value, size) != 0)
687 return false;
688 }
689 return true;
690 }
691 case nir_instr_type_phi: {
692 nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
693 nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
694
695 if (phi1->instr.block != phi2->instr.block)
696 return false;
697
698 nir_foreach_phi_src(src1, phi1) {
699 nir_foreach_phi_src(src2, phi2) {
700 if (src1->pred == src2->pred) {
701 if (!nir_srcs_equal(src1->src, src2->src))
702 return false;
703
704 break;
705 }
706 }
707 }
708
709 return true;
710 }
711 case nir_instr_type_intrinsic: {
712 nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
713 nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
714 const nir_intrinsic_info *info =
715 &nir_intrinsic_infos[intrinsic1->intrinsic];
716
717 if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
718 intrinsic1->num_components != intrinsic2->num_components)
719 return false;
720
721 if (info->has_dest && intrinsic1->dest.ssa.num_components !=
722 intrinsic2->dest.ssa.num_components)
723 return false;
724
725 if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
726 intrinsic2->dest.ssa.bit_size)
727 return false;
728
729 for (unsigned i = 0; i < info->num_srcs; i++) {
730 if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
731 return false;
732 }
733
734 for (unsigned i = 0; i < info->num_indices; i++) {
735 if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
736 return false;
737 }
738
739 return true;
740 }
741 case nir_instr_type_call:
742 case nir_instr_type_jump:
743 case nir_instr_type_ssa_undef:
744 case nir_instr_type_parallel_copy:
745 default:
746 unreachable("Invalid instruction type");
747 }
748
749 unreachable("All cases in the above switch should return");
750 }
751
752 static nir_ssa_def *
753 nir_instr_get_dest_ssa_def(nir_instr *instr)
754 {
755 switch (instr->type) {
756 case nir_instr_type_alu:
757 assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
758 return &nir_instr_as_alu(instr)->dest.dest.ssa;
759 case nir_instr_type_deref:
760 assert(nir_instr_as_deref(instr)->dest.is_ssa);
761 return &nir_instr_as_deref(instr)->dest.ssa;
762 case nir_instr_type_load_const:
763 return &nir_instr_as_load_const(instr)->def;
764 case nir_instr_type_phi:
765 assert(nir_instr_as_phi(instr)->dest.is_ssa);
766 return &nir_instr_as_phi(instr)->dest.ssa;
767 case nir_instr_type_intrinsic:
768 assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
769 return &nir_instr_as_intrinsic(instr)->dest.ssa;
770 case nir_instr_type_tex:
771 assert(nir_instr_as_tex(instr)->dest.is_ssa);
772 return &nir_instr_as_tex(instr)->dest.ssa;
773 default:
774 unreachable("We never ask for any of these");
775 }
776 }
777
778 static bool
779 cmp_func(const void *data1, const void *data2)
780 {
781 return nir_instrs_equal(data1, data2);
782 }
783
784 struct set *
785 nir_instr_set_create(void *mem_ctx)
786 {
787 return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
788 }
789
790 void
791 nir_instr_set_destroy(struct set *instr_set)
792 {
793 _mesa_set_destroy(instr_set, NULL);
794 }
795
796 bool
797 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
798 {
799 if (!instr_can_rewrite(instr))
800 return false;
801
802 struct set_entry *e = _mesa_set_search_or_add(instr_set, instr);
803 nir_instr *match = (nir_instr *) e->key;
804 if (match != instr) {
805 nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
806 nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
807
808 /* It's safe to replace an exact instruction with an inexact one as
809 * long as we make it exact. If we got here, the two instructions are
810 * exactly identical in every other way so, once we've set the exact
811 * bit, they are the same.
812 */
813 if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
814 nir_instr_as_alu(match)->exact = true;
815
816 nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
817 return true;
818 }
819
820 return false;
821 }
822
823 void
824 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
825 {
826 if (!instr_can_rewrite(instr))
827 return;
828
829 struct set_entry *entry = _mesa_set_search(instr_set, instr);
830 if (entry)
831 _mesa_set_remove(instr_set, entry);
832 }
833