4aa616d269e06df6ebad7649375a3425f3e3390e
[mesa.git] / src / compiler / nir / nir_intrinsics.py
1 #
2 # Copyright (C) 2018 Red Hat
3 # Copyright (C) 2014 Intel Corporation
4 #
5 # Permission is hereby granted, free of charge, to any person obtaining a
6 # copy of this software and associated documentation files (the "Software"),
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9 # and/or sell copies of the Software, and to permit persons to whom the
10 # Software is furnished to do so, subject to the following conditions:
11 #
12 # The above copyright notice and this permission notice (including the next
13 # paragraph) shall be included in all copies or substantial portions of the
14 # Software.
15 #
16 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 # IN THE SOFTWARE.
23 #
24
25 # This file defines all the available intrinsics in one place.
26 #
27 # The Intrinsic class corresponds one-to-one with nir_intrinsic_info
28 # structure.
29
30 class Intrinsic(object):
31 """Class that represents all the information about an intrinsic opcode.
32 NOTE: this must be kept in sync with nir_intrinsic_info.
33 """
34 def __init__(self, name, src_components, dest_components,
35 indices, flags, sysval, bit_sizes):
36 """Parameters:
37
38 - name: the intrinsic name
39 - src_components: list of the number of components per src, 0 means
40 vectorized instruction with number of components given in the
41 num_components field in nir_intrinsic_instr.
42 - dest_components: number of destination components, -1 means no
43 dest, 0 means number of components given in num_components field
44 in nir_intrinsic_instr.
45 - indices: list of constant indicies
46 - flags: list of semantic flags
47 - sysval: is this a system-value intrinsic
48 - bit_sizes: allowed dest bit_sizes
49 """
50 assert isinstance(name, str)
51 assert isinstance(src_components, list)
52 if src_components:
53 assert isinstance(src_components[0], int)
54 assert isinstance(dest_components, int)
55 assert isinstance(indices, list)
56 if indices:
57 assert isinstance(indices[0], str)
58 assert isinstance(flags, list)
59 if flags:
60 assert isinstance(flags[0], str)
61 assert isinstance(sysval, bool)
62 if bit_sizes:
63 assert isinstance(bit_sizes[0], int)
64
65 self.name = name
66 self.num_srcs = len(src_components)
67 self.src_components = src_components
68 self.has_dest = (dest_components >= 0)
69 self.dest_components = dest_components
70 self.num_indices = len(indices)
71 self.indices = indices
72 self.flags = flags
73 self.sysval = sysval
74 self.bit_sizes = bit_sizes
75
76 #
77 # Possible indices:
78 #
79
80 # A constant 'base' value that is added to an offset src:
81 BASE = "NIR_INTRINSIC_BASE"
82 # For store instructions, a writemask:
83 WRMASK = "NIR_INTRINSIC_WRMASK"
84 # The stream-id for GS emit_vertex/end_primitive intrinsics:
85 STREAM_ID = "NIR_INTRINSIC_STREAM_ID"
86 # The clip-plane id for load_user_clip_plane intrinsics:
87 UCP_ID = "NIR_INTRINSIC_UCP_ID"
88 # The amount of data, starting from BASE, that this instruction
89 # may access. This is used to provide bounds if the offset is
90 # not constant.
91 RANGE = "NIR_INTRINSIC_RANGE"
92 # The vulkan descriptor set binding for vulkan_resource_index
93 # intrinsic
94 DESC_SET = "NIR_INTRINSIC_DESC_SET"
95 # The vulkan descriptor set binding for vulkan_resource_index
96 # intrinsic
97 BINDING = "NIR_INTRINSIC_BINDING"
98 # Component offset
99 COMPONENT = "NIR_INTRINSIC_COMPONENT"
100 # Interpolation mode (only meaningful for FS inputs)
101 INTERP_MODE = "NIR_INTRINSIC_INTERP_MODE"
102 # A binary nir_op to use when performing a reduction or scan operation
103 REDUCTION_OP = "NIR_INTRINSIC_REDUCTION_OP"
104 # Cluster size for reduction operations
105 CLUSTER_SIZE = "NIR_INTRINSIC_CLUSTER_SIZE"
106 # Parameter index for a load_param intrinsic
107 PARAM_IDX = "NIR_INTRINSIC_PARAM_IDX"
108 # Image dimensionality for image intrinsics
109 IMAGE_DIM = "NIR_INTRINSIC_IMAGE_DIM"
110 # Non-zero if we are accessing an array image
111 IMAGE_ARRAY = "NIR_INTRINSIC_IMAGE_ARRAY"
112 # Access qualifiers for image and memory access intrinsics
113 ACCESS = "NIR_INTRINSIC_ACCESS"
114 DST_ACCESS = "NIR_INTRINSIC_DST_ACCESS"
115 SRC_ACCESS = "NIR_INTRINSIC_SRC_ACCESS"
116 # Image format for image intrinsics
117 FORMAT = "NIR_INTRINSIC_FORMAT"
118 # Offset or address alignment
119 ALIGN_MUL = "NIR_INTRINSIC_ALIGN_MUL"
120 ALIGN_OFFSET = "NIR_INTRINSIC_ALIGN_OFFSET"
121 # The vulkan descriptor type for vulkan_resource_index
122 DESC_TYPE = "NIR_INTRINSIC_DESC_TYPE"
123 # The nir_alu_type of a uniform/input/output
124 TYPE = "NIR_INTRINSIC_TYPE"
125 # The swizzle mask for quad_swizzle_amd & masked_swizzle_amd
126 SWIZZLE_MASK = "NIR_INTRINSIC_SWIZZLE_MASK"
127 # Driver location of attribute
128 DRIVER_LOCATION = "NIR_INTRINSIC_DRIVER_LOCATION"
129 # Ordering and visibility of a memory operation
130 MEMORY_SEMANTICS = "NIR_INTRINSIC_MEMORY_SEMANTICS"
131 # Modes affected by a memory operation
132 MEMORY_MODES = "NIR_INTRINSIC_MEMORY_MODES"
133 # Scope of a memory operation
134 MEMORY_SCOPE = "NIR_INTRINSIC_MEMORY_SCOPE"
135
136 #
137 # Possible flags:
138 #
139
140 CAN_ELIMINATE = "NIR_INTRINSIC_CAN_ELIMINATE"
141 CAN_REORDER = "NIR_INTRINSIC_CAN_REORDER"
142
143 INTR_OPCODES = {}
144
145 # Defines a new NIR intrinsic. By default, the intrinsic will have no sources
146 # and no destination.
147 #
148 # You can set dest_comp=n to enable a destination for the intrinsic, in which
149 # case it will have that many components, or =0 for "as many components as the
150 # NIR destination value."
151 #
152 # Set src_comp=n to enable sources for the intruction. It can be an array of
153 # component counts, or (for convenience) a scalar component count if there's
154 # only one source. If a component count is 0, it will be as many components as
155 # the intrinsic has based on the dest_comp.
156 def intrinsic(name, src_comp=[], dest_comp=-1, indices=[],
157 flags=[], sysval=False, bit_sizes=[]):
158 assert name not in INTR_OPCODES
159 INTR_OPCODES[name] = Intrinsic(name, src_comp, dest_comp,
160 indices, flags, sysval, bit_sizes)
161
162 intrinsic("nop", flags=[CAN_ELIMINATE])
163
164 intrinsic("load_param", dest_comp=0, indices=[PARAM_IDX], flags=[CAN_ELIMINATE])
165
166 intrinsic("load_deref", dest_comp=0, src_comp=[-1],
167 indices=[ACCESS], flags=[CAN_ELIMINATE])
168 intrinsic("store_deref", src_comp=[-1, 0], indices=[WRMASK, ACCESS])
169 intrinsic("copy_deref", src_comp=[-1, -1], indices=[DST_ACCESS, SRC_ACCESS])
170
171 # Interpolation of input. The interp_deref_at* intrinsics are similar to the
172 # load_var intrinsic acting on a shader input except that they interpolate the
173 # input differently. The at_sample and at_offset intrinsics take an
174 # additional source that is an integer sample id or a vec2 position offset
175 # respectively.
176
177 intrinsic("interp_deref_at_centroid", dest_comp=0, src_comp=[1],
178 flags=[ CAN_ELIMINATE, CAN_REORDER])
179 intrinsic("interp_deref_at_sample", src_comp=[1, 1], dest_comp=0,
180 flags=[CAN_ELIMINATE, CAN_REORDER])
181 intrinsic("interp_deref_at_offset", src_comp=[1, 2], dest_comp=0,
182 flags=[CAN_ELIMINATE, CAN_REORDER])
183
184 # Gets the length of an unsized array at the end of a buffer
185 intrinsic("deref_buffer_array_length", src_comp=[-1], dest_comp=1,
186 flags=[CAN_ELIMINATE, CAN_REORDER])
187
188 # Ask the driver for the size of a given buffer. It takes the buffer index
189 # as source.
190 intrinsic("get_buffer_size", src_comp=[-1], dest_comp=1,
191 flags=[CAN_ELIMINATE, CAN_REORDER])
192
193 # a barrier is an intrinsic with no inputs/outputs but which can't be moved
194 # around/optimized in general
195 def barrier(name):
196 intrinsic(name)
197
198 barrier("barrier")
199 barrier("discard")
200
201 # Demote fragment shader invocation to a helper invocation. Any stores to
202 # memory after this instruction are suppressed and the fragment does not write
203 # outputs to the framebuffer. Unlike discard, demote needs to ensure that
204 # derivatives will still work for invocations that were not demoted.
205 #
206 # As specified by SPV_EXT_demote_to_helper_invocation.
207 barrier("demote")
208 intrinsic("is_helper_invocation", dest_comp=1, flags=[CAN_ELIMINATE])
209
210
211 # Memory barrier with semantics analogous to the memoryBarrier() GLSL
212 # intrinsic.
213 barrier("memory_barrier")
214
215 # Memory barrier with explicit scope. Follows the semantics of SPIR-V
216 # OpMemoryBarrier, used to implement Vulkan Memory Model. Storage that the
217 # barrierr applies is represented using NIR variable modes.
218 intrinsic("scoped_memory_barrier",
219 indices=[MEMORY_SEMANTICS, MEMORY_MODES, MEMORY_SCOPE])
220
221 # Shader clock intrinsic with semantics analogous to the clock2x32ARB()
222 # GLSL intrinsic.
223 # The latter can be used as code motion barrier, which is currently not
224 # feasible with NIR.
225 intrinsic("shader_clock", dest_comp=2, flags=[CAN_ELIMINATE])
226
227 # Shader ballot intrinsics with semantics analogous to the
228 #
229 # ballotARB()
230 # readInvocationARB()
231 # readFirstInvocationARB()
232 #
233 # GLSL functions from ARB_shader_ballot.
234 intrinsic("ballot", src_comp=[1], dest_comp=0, flags=[CAN_ELIMINATE])
235 intrinsic("read_invocation", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
236 intrinsic("read_first_invocation", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
237
238 # Additional SPIR-V ballot intrinsics
239 #
240 # These correspond to the SPIR-V opcodes
241 #
242 # OpGroupUniformElect
243 # OpSubgroupFirstInvocationKHR
244 intrinsic("elect", dest_comp=1, flags=[CAN_ELIMINATE])
245 intrinsic("first_invocation", dest_comp=1, flags=[CAN_ELIMINATE])
246
247 # Memory barrier with semantics analogous to the compute shader
248 # groupMemoryBarrier(), memoryBarrierAtomicCounter(), memoryBarrierBuffer(),
249 # memoryBarrierImage() and memoryBarrierShared() GLSL intrinsics.
250 barrier("group_memory_barrier")
251 barrier("memory_barrier_atomic_counter")
252 barrier("memory_barrier_buffer")
253 barrier("memory_barrier_image")
254 barrier("memory_barrier_shared")
255 barrier("begin_invocation_interlock")
256 barrier("end_invocation_interlock")
257
258 # A conditional discard/demote, with a single boolean source.
259 intrinsic("discard_if", src_comp=[1])
260 intrinsic("demote_if", src_comp=[1])
261
262 # ARB_shader_group_vote intrinsics
263 intrinsic("vote_any", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
264 intrinsic("vote_all", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
265 intrinsic("vote_feq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
266 intrinsic("vote_ieq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
267
268 # Ballot ALU operations from SPIR-V.
269 #
270 # These operations work like their ALU counterparts except that the operate
271 # on a uvec4 which is treated as a 128bit integer. Also, they are, in
272 # general, free to ignore any bits which are above the subgroup size.
273 intrinsic("ballot_bitfield_extract", src_comp=[4, 1], dest_comp=1, flags=[CAN_ELIMINATE])
274 intrinsic("ballot_bit_count_reduce", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
275 intrinsic("ballot_bit_count_inclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
276 intrinsic("ballot_bit_count_exclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
277 intrinsic("ballot_find_lsb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
278 intrinsic("ballot_find_msb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
279
280 # Shuffle operations from SPIR-V.
281 intrinsic("shuffle", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
282 intrinsic("shuffle_xor", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
283 intrinsic("shuffle_up", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
284 intrinsic("shuffle_down", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
285
286 # Quad operations from SPIR-V.
287 intrinsic("quad_broadcast", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
288 intrinsic("quad_swap_horizontal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
289 intrinsic("quad_swap_vertical", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
290 intrinsic("quad_swap_diagonal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
291
292 intrinsic("reduce", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP, CLUSTER_SIZE],
293 flags=[CAN_ELIMINATE])
294 intrinsic("inclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
295 flags=[CAN_ELIMINATE])
296 intrinsic("exclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
297 flags=[CAN_ELIMINATE])
298
299 # AMD shader ballot operations
300 intrinsic("quad_swizzle_amd", src_comp=[0], dest_comp=0, indices=[SWIZZLE_MASK],
301 flags=[CAN_ELIMINATE])
302 intrinsic("masked_swizzle_amd", src_comp=[0], dest_comp=0, indices=[SWIZZLE_MASK],
303 flags=[CAN_ELIMINATE])
304 intrinsic("write_invocation_amd", src_comp=[0, 0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
305 intrinsic("mbcnt_amd", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
306
307 # Basic Geometry Shader intrinsics.
308 #
309 # emit_vertex implements GLSL's EmitStreamVertex() built-in. It takes a single
310 # index, which is the stream ID to write to.
311 #
312 # end_primitive implements GLSL's EndPrimitive() built-in.
313 intrinsic("emit_vertex", indices=[STREAM_ID])
314 intrinsic("end_primitive", indices=[STREAM_ID])
315
316 # Geometry Shader intrinsics with a vertex count.
317 #
318 # Alternatively, drivers may implement these intrinsics, and use
319 # nir_lower_gs_intrinsics() to convert from the basic intrinsics.
320 #
321 # These maintain a count of the number of vertices emitted, as an additional
322 # unsigned integer source.
323 intrinsic("emit_vertex_with_counter", src_comp=[1], indices=[STREAM_ID])
324 intrinsic("end_primitive_with_counter", src_comp=[1], indices=[STREAM_ID])
325 intrinsic("set_vertex_count", src_comp=[1])
326
327 # Atomic counters
328 #
329 # The *_var variants take an atomic_uint nir_variable, while the other,
330 # lowered, variants take a constant buffer index and register offset.
331
332 def atomic(name, flags=[]):
333 intrinsic(name + "_deref", src_comp=[-1], dest_comp=1, flags=flags)
334 intrinsic(name, src_comp=[1], dest_comp=1, indices=[BASE], flags=flags)
335
336 def atomic2(name):
337 intrinsic(name + "_deref", src_comp=[-1, 1], dest_comp=1)
338 intrinsic(name, src_comp=[1, 1], dest_comp=1, indices=[BASE])
339
340 def atomic3(name):
341 intrinsic(name + "_deref", src_comp=[-1, 1, 1], dest_comp=1)
342 intrinsic(name, src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
343
344 atomic("atomic_counter_inc")
345 atomic("atomic_counter_pre_dec")
346 atomic("atomic_counter_post_dec")
347 atomic("atomic_counter_read", flags=[CAN_ELIMINATE])
348 atomic2("atomic_counter_add")
349 atomic2("atomic_counter_min")
350 atomic2("atomic_counter_max")
351 atomic2("atomic_counter_and")
352 atomic2("atomic_counter_or")
353 atomic2("atomic_counter_xor")
354 atomic2("atomic_counter_exchange")
355 atomic3("atomic_counter_comp_swap")
356
357 # Image load, store and atomic intrinsics.
358 #
359 # All image intrinsics come in three versions. One which take an image target
360 # passed as a deref chain as the first source, one which takes an index as the
361 # first source, and one which takes a bindless handle as the first source.
362 # In the first version, the image variable contains the memory and layout
363 # qualifiers that influence the semantics of the intrinsic. In the second and
364 # third, the image format and access qualifiers are provided as constant
365 # indices.
366 #
367 # All image intrinsics take a four-coordinate vector and a sample index as
368 # 2nd and 3rd sources, determining the location within the image that will be
369 # accessed by the intrinsic. Components not applicable to the image target
370 # in use are undefined. Image store takes an additional four-component
371 # argument with the value to be written, and image atomic operations take
372 # either one or two additional scalar arguments with the same meaning as in
373 # the ARB_shader_image_load_store specification.
374 def image(name, src_comp=[], **kwargs):
375 intrinsic("image_deref_" + name, src_comp=[1] + src_comp,
376 indices=[ACCESS], **kwargs)
377 intrinsic("image_" + name, src_comp=[1] + src_comp,
378 indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
379 intrinsic("bindless_image_" + name, src_comp=[1] + src_comp,
380 indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
381
382 image("load", src_comp=[4, 1, 1], dest_comp=0, flags=[CAN_ELIMINATE])
383 image("store", src_comp=[4, 1, 0, 1])
384 image("atomic_add", src_comp=[4, 1, 1], dest_comp=1)
385 image("atomic_imin", src_comp=[4, 1, 1], dest_comp=1)
386 image("atomic_umin", src_comp=[4, 1, 1], dest_comp=1)
387 image("atomic_imax", src_comp=[4, 1, 1], dest_comp=1)
388 image("atomic_umax", src_comp=[4, 1, 1], dest_comp=1)
389 image("atomic_and", src_comp=[4, 1, 1], dest_comp=1)
390 image("atomic_or", src_comp=[4, 1, 1], dest_comp=1)
391 image("atomic_xor", src_comp=[4, 1, 1], dest_comp=1)
392 image("atomic_exchange", src_comp=[4, 1, 1], dest_comp=1)
393 image("atomic_comp_swap", src_comp=[4, 1, 1, 1], dest_comp=1)
394 image("atomic_fadd", src_comp=[1, 4, 1, 1], dest_comp=1)
395 image("size", dest_comp=0, flags=[CAN_ELIMINATE, CAN_REORDER])
396 image("samples", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
397 image("atomic_inc_wrap", src_comp=[4, 1, 1], dest_comp=1)
398 image("atomic_dec_wrap", src_comp=[4, 1, 1], dest_comp=1)
399
400 # Intel-specific query for loading from the brw_image_param struct passed
401 # into the shader as a uniform. The variable is a deref to the image
402 # variable. The const index specifies which of the six parameters to load.
403 intrinsic("image_deref_load_param_intel", src_comp=[1], dest_comp=0,
404 indices=[BASE], flags=[CAN_ELIMINATE, CAN_REORDER])
405 image("load_raw_intel", src_comp=[1], dest_comp=0,
406 flags=[CAN_ELIMINATE])
407 image("store_raw_intel", src_comp=[1, 0])
408
409 # Vulkan descriptor set intrinsics
410 #
411 # The Vulkan API uses a different binding model from GL. In the Vulkan
412 # API, all external resources are represented by a tuple:
413 #
414 # (descriptor set, binding, array index)
415 #
416 # where the array index is the only thing allowed to be indirect. The
417 # vulkan_surface_index intrinsic takes the descriptor set and binding as
418 # its first two indices and the array index as its source. The third
419 # index is a nir_variable_mode in case that's useful to the backend.
420 #
421 # The intended usage is that the shader will call vulkan_surface_index to
422 # get an index and then pass that as the buffer index ubo/ssbo calls.
423 #
424 # The vulkan_resource_reindex intrinsic takes a resource index in src0
425 # (the result of a vulkan_resource_index or vulkan_resource_reindex) which
426 # corresponds to the tuple (set, binding, index) and computes an index
427 # corresponding to tuple (set, binding, idx + src1).
428 intrinsic("vulkan_resource_index", src_comp=[1], dest_comp=0,
429 indices=[DESC_SET, BINDING, DESC_TYPE],
430 flags=[CAN_ELIMINATE, CAN_REORDER])
431 intrinsic("vulkan_resource_reindex", src_comp=[0, 1], dest_comp=0,
432 indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
433 intrinsic("load_vulkan_descriptor", src_comp=[-1], dest_comp=0,
434 indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
435
436 # variable atomic intrinsics
437 #
438 # All of these variable atomic memory operations read a value from memory,
439 # compute a new value using one of the operations below, write the new value
440 # to memory, and return the original value read.
441 #
442 # All operations take 2 sources except CompSwap that takes 3. These sources
443 # represent:
444 #
445 # 0: A deref to the memory on which to perform the atomic
446 # 1: The data parameter to the atomic function (i.e. the value to add
447 # in shared_atomic_add, etc).
448 # 2: For CompSwap only: the second data parameter.
449 intrinsic("deref_atomic_add", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
450 intrinsic("deref_atomic_imin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
451 intrinsic("deref_atomic_umin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
452 intrinsic("deref_atomic_imax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
453 intrinsic("deref_atomic_umax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
454 intrinsic("deref_atomic_and", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
455 intrinsic("deref_atomic_or", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
456 intrinsic("deref_atomic_xor", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
457 intrinsic("deref_atomic_exchange", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
458 intrinsic("deref_atomic_comp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
459 intrinsic("deref_atomic_fadd", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
460 intrinsic("deref_atomic_fmin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
461 intrinsic("deref_atomic_fmax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
462 intrinsic("deref_atomic_fcomp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
463
464 # SSBO atomic intrinsics
465 #
466 # All of the SSBO atomic memory operations read a value from memory,
467 # compute a new value using one of the operations below, write the new
468 # value to memory, and return the original value read.
469 #
470 # All operations take 3 sources except CompSwap that takes 4. These
471 # sources represent:
472 #
473 # 0: The SSBO buffer index.
474 # 1: The offset into the SSBO buffer of the variable that the atomic
475 # operation will operate on.
476 # 2: The data parameter to the atomic function (i.e. the value to add
477 # in ssbo_atomic_add, etc).
478 # 3: For CompSwap only: the second data parameter.
479 intrinsic("ssbo_atomic_add", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
480 intrinsic("ssbo_atomic_imin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
481 intrinsic("ssbo_atomic_umin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
482 intrinsic("ssbo_atomic_imax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
483 intrinsic("ssbo_atomic_umax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
484 intrinsic("ssbo_atomic_and", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
485 intrinsic("ssbo_atomic_or", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
486 intrinsic("ssbo_atomic_xor", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
487 intrinsic("ssbo_atomic_exchange", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
488 intrinsic("ssbo_atomic_comp_swap", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
489 intrinsic("ssbo_atomic_fadd", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
490 intrinsic("ssbo_atomic_fmin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
491 intrinsic("ssbo_atomic_fmax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
492 intrinsic("ssbo_atomic_fcomp_swap", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
493
494 # CS shared variable atomic intrinsics
495 #
496 # All of the shared variable atomic memory operations read a value from
497 # memory, compute a new value using one of the operations below, write the
498 # new value to memory, and return the original value read.
499 #
500 # All operations take 2 sources except CompSwap that takes 3. These
501 # sources represent:
502 #
503 # 0: The offset into the shared variable storage region that the atomic
504 # operation will operate on.
505 # 1: The data parameter to the atomic function (i.e. the value to add
506 # in shared_atomic_add, etc).
507 # 2: For CompSwap only: the second data parameter.
508 intrinsic("shared_atomic_add", src_comp=[1, 1], dest_comp=1, indices=[BASE])
509 intrinsic("shared_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
510 intrinsic("shared_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
511 intrinsic("shared_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
512 intrinsic("shared_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
513 intrinsic("shared_atomic_and", src_comp=[1, 1], dest_comp=1, indices=[BASE])
514 intrinsic("shared_atomic_or", src_comp=[1, 1], dest_comp=1, indices=[BASE])
515 intrinsic("shared_atomic_xor", src_comp=[1, 1], dest_comp=1, indices=[BASE])
516 intrinsic("shared_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
517 intrinsic("shared_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
518 intrinsic("shared_atomic_fadd", src_comp=[1, 1], dest_comp=1, indices=[BASE])
519 intrinsic("shared_atomic_fmin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
520 intrinsic("shared_atomic_fmax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
521 intrinsic("shared_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
522
523 # Global atomic intrinsics
524 #
525 # All of the shared variable atomic memory operations read a value from
526 # memory, compute a new value using one of the operations below, write the
527 # new value to memory, and return the original value read.
528 #
529 # All operations take 2 sources except CompSwap that takes 3. These
530 # sources represent:
531 #
532 # 0: The memory address that the atomic operation will operate on.
533 # 1: The data parameter to the atomic function (i.e. the value to add
534 # in shared_atomic_add, etc).
535 # 2: For CompSwap only: the second data parameter.
536 intrinsic("global_atomic_add", src_comp=[1, 1], dest_comp=1, indices=[BASE])
537 intrinsic("global_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
538 intrinsic("global_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
539 intrinsic("global_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
540 intrinsic("global_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
541 intrinsic("global_atomic_and", src_comp=[1, 1], dest_comp=1, indices=[BASE])
542 intrinsic("global_atomic_or", src_comp=[1, 1], dest_comp=1, indices=[BASE])
543 intrinsic("global_atomic_xor", src_comp=[1, 1], dest_comp=1, indices=[BASE])
544 intrinsic("global_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
545 intrinsic("global_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
546 intrinsic("global_atomic_fadd", src_comp=[1, 1], dest_comp=1, indices=[BASE])
547 intrinsic("global_atomic_fmin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
548 intrinsic("global_atomic_fmax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
549 intrinsic("global_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
550
551 def system_value(name, dest_comp, indices=[], bit_sizes=[32]):
552 intrinsic("load_" + name, [], dest_comp, indices,
553 flags=[CAN_ELIMINATE, CAN_REORDER], sysval=True,
554 bit_sizes=bit_sizes)
555
556 system_value("frag_coord", 4)
557 system_value("point_coord", 2)
558 system_value("front_face", 1, bit_sizes=[1, 32])
559 system_value("vertex_id", 1)
560 system_value("vertex_id_zero_base", 1)
561 system_value("first_vertex", 1)
562 system_value("is_indexed_draw", 1)
563 system_value("base_vertex", 1)
564 system_value("instance_id", 1)
565 system_value("base_instance", 1)
566 system_value("draw_id", 1)
567 system_value("sample_id", 1)
568 # sample_id_no_per_sample is like sample_id but does not imply per-
569 # sample shading. See the lower_helper_invocation option.
570 system_value("sample_id_no_per_sample", 1)
571 system_value("sample_pos", 2)
572 system_value("sample_mask_in", 1)
573 system_value("primitive_id", 1)
574 system_value("invocation_id", 1)
575 system_value("tess_coord", 3)
576 system_value("tess_level_outer", 4)
577 system_value("tess_level_inner", 2)
578 system_value("tess_level_outer_default", 4)
579 system_value("tess_level_inner_default", 2)
580 system_value("patch_vertices_in", 1)
581 system_value("local_invocation_id", 3)
582 system_value("local_invocation_index", 1)
583 system_value("work_group_id", 3)
584 system_value("user_clip_plane", 4, indices=[UCP_ID])
585 system_value("num_work_groups", 3)
586 system_value("helper_invocation", 1, bit_sizes=[1, 32])
587 system_value("alpha_ref_float", 1)
588 system_value("layer_id", 1)
589 system_value("view_index", 1)
590 system_value("subgroup_size", 1)
591 system_value("subgroup_invocation", 1)
592 system_value("subgroup_eq_mask", 0, bit_sizes=[32, 64])
593 system_value("subgroup_ge_mask", 0, bit_sizes=[32, 64])
594 system_value("subgroup_gt_mask", 0, bit_sizes=[32, 64])
595 system_value("subgroup_le_mask", 0, bit_sizes=[32, 64])
596 system_value("subgroup_lt_mask", 0, bit_sizes=[32, 64])
597 system_value("num_subgroups", 1)
598 system_value("subgroup_id", 1)
599 system_value("local_group_size", 3)
600 system_value("global_invocation_id", 3, bit_sizes=[32, 64])
601 system_value("global_invocation_index", 1, bit_sizes=[32, 64])
602 system_value("work_dim", 1)
603 # Driver-specific viewport scale/offset parameters.
604 #
605 # VC4 and V3D need to emit a scaled version of the position in the vertex
606 # shaders for binning, and having system values lets us move the math for that
607 # into NIR.
608 #
609 # Panfrost needs to implement all coordinate transformation in the
610 # vertex shader; system values allow us to share this routine in NIR.
611 system_value("viewport_x_scale", 1)
612 system_value("viewport_y_scale", 1)
613 system_value("viewport_z_scale", 1)
614 system_value("viewport_z_offset", 1)
615 system_value("viewport_scale", 3)
616 system_value("viewport_offset", 3)
617
618 # Blend constant color values. Float values are clamped. Vectored versions are
619 # provided as well for driver convenience
620
621 system_value("blend_const_color_r_float", 1)
622 system_value("blend_const_color_g_float", 1)
623 system_value("blend_const_color_b_float", 1)
624 system_value("blend_const_color_a_float", 1)
625 system_value("blend_const_color_rgba", 4)
626 system_value("blend_const_color_rgba8888_unorm", 1)
627 system_value("blend_const_color_aaaa8888_unorm", 1)
628
629 # System values for gl_Color, for radeonsi which interpolates these in the
630 # shader prolog to handle two-sided color without recompiles and therefore
631 # doesn't handle these in the main shader part like normal varyings.
632 system_value("color0", 4)
633 system_value("color1", 4)
634
635 # System value for internal compute shaders in radeonsi.
636 system_value("user_data_amd", 4)
637
638 # Barycentric coordinate intrinsics.
639 #
640 # These set up the barycentric coordinates for a particular interpolation.
641 # The first three are for the simple cases: pixel, centroid, or per-sample
642 # (at gl_SampleID). The next two handle interpolating at a specified
643 # sample location, or interpolating with a vec2 offset,
644 #
645 # The interp_mode index should be either the INTERP_MODE_SMOOTH or
646 # INTERP_MODE_NOPERSPECTIVE enum values.
647 #
648 # The vec2 value produced by these intrinsics is intended for use as the
649 # barycoord source of a load_interpolated_input intrinsic.
650
651 def barycentric(name, src_comp=[]):
652 intrinsic("load_barycentric_" + name, src_comp=src_comp, dest_comp=2,
653 indices=[INTERP_MODE], flags=[CAN_ELIMINATE, CAN_REORDER])
654
655 # no sources.
656 barycentric("pixel")
657 barycentric("centroid")
658 barycentric("sample")
659 # src[] = { sample_id }.
660 barycentric("at_sample", [1])
661 # src[] = { offset.xy }.
662 barycentric("at_offset", [2])
663
664 # Load sample position:
665 #
666 # Takes a sample # and returns a sample position. Used for lowering
667 # interpolateAtSample() to interpolateAtOffset()
668 intrinsic("load_sample_pos_from_id", src_comp=[1], dest_comp=2,
669 flags=[CAN_ELIMINATE, CAN_REORDER])
670
671 # Loads what I believe is the primitive size, for scaling ij to pixel size:
672 intrinsic("load_size_ir3", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
673
674 # Fragment shader input interpolation delta intrinsic.
675 #
676 # For hw where fragment shader input interpolation is handled in shader, the
677 # load_fs_input_interp deltas intrinsics can be used to load the input deltas
678 # used for interpolation as follows:
679 #
680 # vec3 iid = load_fs_input_interp_deltas(varying_slot)
681 # vec2 bary = load_barycentric_*(...)
682 # float result = iid.x + iid.y * bary.y + iid.z * bary.x
683
684 intrinsic("load_fs_input_interp_deltas", src_comp=[1], dest_comp=3,
685 indices=[BASE, COMPONENT], flags=[CAN_ELIMINATE, CAN_REORDER])
686
687 # Load operations pull data from some piece of GPU memory. All load
688 # operations operate in terms of offsets into some piece of theoretical
689 # memory. Loads from externally visible memory (UBO and SSBO) simply take a
690 # byte offset as a source. Loads from opaque memory (uniforms, inputs, etc.)
691 # take a base+offset pair where the nir_intrinsic_base() gives the location
692 # of the start of the variable being loaded and and the offset source is a
693 # offset into that variable.
694 #
695 # Uniform load operations have a nir_intrinsic_range() index that specifies the
696 # range (starting at base) of the data from which we are loading. If
697 # range == 0, then the range is unknown.
698 #
699 # Some load operations such as UBO/SSBO load and per_vertex loads take an
700 # additional source to specify which UBO/SSBO/vertex to load from.
701 #
702 # The exact address type depends on the lowering pass that generates the
703 # load/store intrinsics. Typically, this is vec4 units for things such as
704 # varying slots and float units for fragment shader inputs. UBO and SSBO
705 # offsets are always in bytes.
706
707 def load(name, num_srcs, indices=[], flags=[]):
708 intrinsic("load_" + name, [1] * num_srcs, dest_comp=0, indices=indices,
709 flags=flags)
710
711 # src[] = { offset }.
712 load("uniform", 1, [BASE, RANGE, TYPE], [CAN_ELIMINATE, CAN_REORDER])
713 # src[] = { buffer_index, offset }.
714 load("ubo", 2, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE, CAN_REORDER])
715 # src[] = { offset }.
716 load("input", 1, [BASE, COMPONENT, TYPE], [CAN_ELIMINATE, CAN_REORDER])
717 # src[] = { vertex, offset }.
718 load("per_vertex_input", 2, [BASE, COMPONENT], [CAN_ELIMINATE, CAN_REORDER])
719 # src[] = { barycoord, offset }.
720 intrinsic("load_interpolated_input", src_comp=[2, 1], dest_comp=0,
721 indices=[BASE, COMPONENT], flags=[CAN_ELIMINATE, CAN_REORDER])
722
723 # src[] = { buffer_index, offset }.
724 load("ssbo", 2, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
725 # src[] = { offset }.
726 load("output", 1, [BASE, COMPONENT], flags=[CAN_ELIMINATE])
727 # src[] = { vertex, offset }.
728 load("per_vertex_output", 2, [BASE, COMPONENT], [CAN_ELIMINATE])
729 # src[] = { offset }.
730 load("shared", 1, [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
731 # src[] = { offset }.
732 load("push_constant", 1, [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
733 # src[] = { offset }.
734 load("constant", 1, [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
735 # src[] = { address }.
736 load("global", 1, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
737 # src[] = { address }.
738 load("kernel_input", 1, [BASE, RANGE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE, CAN_REORDER])
739 # src[] = { offset }.
740 load("scratch", 1, [ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
741
742 # Stores work the same way as loads, except now the first source is the value
743 # to store and the second (and possibly third) source specify where to store
744 # the value. SSBO and shared memory stores also have a
745 # nir_intrinsic_write_mask()
746
747 def store(name, num_srcs, indices=[], flags=[]):
748 intrinsic("store_" + name, [0] + ([1] * (num_srcs - 1)), indices=indices, flags=flags)
749
750 # src[] = { value, offset }.
751 store("output", 2, [BASE, WRMASK, COMPONENT, TYPE])
752 # src[] = { value, vertex, offset }.
753 store("per_vertex_output", 3, [BASE, WRMASK, COMPONENT])
754 # src[] = { value, block_index, offset }
755 store("ssbo", 3, [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
756 # src[] = { value, offset }.
757 store("shared", 2, [BASE, WRMASK, ALIGN_MUL, ALIGN_OFFSET])
758 # src[] = { value, address }.
759 store("global", 2, [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
760 # src[] = { value, offset }.
761 store("scratch", 2, [ALIGN_MUL, ALIGN_OFFSET, WRMASK])
762
763 # IR3-specific version of most SSBO intrinsics. The only different
764 # compare to the originals is that they add an extra source to hold
765 # the dword-offset, which is needed by the backend code apart from
766 # the byte-offset already provided by NIR in one of the sources.
767 #
768 # NIR lowering pass 'ir3_nir_lower_io_offset' will replace the
769 # original SSBO intrinsics by these, placing the computed
770 # dword-offset always in the last source.
771 #
772 # The float versions are not handled because those are not supported
773 # by the backend.
774 intrinsic("store_ssbo_ir3", src_comp=[0, 1, 1, 1],
775 indices=[WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
776 intrinsic("load_ssbo_ir3", src_comp=[1, 1, 1], dest_comp=0,
777 indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
778 intrinsic("ssbo_atomic_add_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
779 intrinsic("ssbo_atomic_imin_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
780 intrinsic("ssbo_atomic_umin_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
781 intrinsic("ssbo_atomic_imax_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
782 intrinsic("ssbo_atomic_umax_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
783 intrinsic("ssbo_atomic_and_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
784 intrinsic("ssbo_atomic_or_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
785 intrinsic("ssbo_atomic_xor_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
786 intrinsic("ssbo_atomic_exchange_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
787 intrinsic("ssbo_atomic_comp_swap_ir3", src_comp=[1, 1, 1, 1, 1], dest_comp=1)
788
789 # System values for freedreno geometry shaders.
790 system_value("vs_primitive_stride_ir3", 1)
791 system_value("vs_vertex_stride_ir3", 1)
792 system_value("gs_header_ir3", 1)
793 system_value("primitive_location_ir3", 1, indices=[DRIVER_LOCATION])
794
795 # System values for freedreno tessellation shaders.
796 system_value("hs_patch_stride_ir3", 1)
797 system_value("tess_factor_base_ir3", 2)
798 system_value("tess_param_base_ir3", 2)
799 system_value("tcs_header_ir3", 1)
800
801 # IR3-specific intrinsics for tessellation control shaders. cond_end_ir3 end
802 # the shader when src0 is false and is used to narrow down the TCS shader to
803 # just thread 0 before writing out tessellation levels.
804 intrinsic("cond_end_ir3", src_comp=[1])
805 # end_patch_ir3 is used just before thread 0 exist the TCS and presumably
806 # signals the TE that the patch is complete and can be tessellated.
807 intrinsic("end_patch_ir3")
808
809 # IR3-specific load/store intrinsics. These access a buffer used to pass data
810 # between geometry stages - perhaps it's explicit access to the vertex cache.
811
812 # src[] = { value, offset }.
813 store("shared_ir3", 2, [BASE, WRMASK, ALIGN_MUL, ALIGN_OFFSET])
814 # src[] = { offset }.
815 load("shared_ir3", 1, [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
816
817 # IR3-specific load/store global intrinsics. They take a 64-bit base address
818 # and a 32-bit offset. The hardware will add the base and the offset, which
819 # saves us from doing 64-bit math on the base address.
820
821 # src[] = { value, address(vec2 of hi+lo uint32_t), offset }.
822 # const_index[] = { write_mask, align_mul, align_offset }
823 intrinsic("store_global_ir3", [0, 2, 1], indices=[WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
824 # src[] = { address(vec2 of hi+lo uint32_t), offset }.
825 # const_index[] = { access, align_mul, align_offset }
826 intrinsic("load_global_ir3", [2, 1], dest_comp=0, indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
827
828 # Intrinsics used by the Midgard/Bifrost blend pipeline. These are defined
829 # within a blend shader to read/write the raw value from the tile buffer,
830 # without applying any format conversion in the process. If the shader needs
831 # usable pixel values, it must apply format conversions itself.
832 #
833 # These definitions are generic, but they are explicitly vendored to prevent
834 # other drivers from using them, as their semantics is defined in terms of the
835 # Midgard/Bifrost hardware tile buffer and may not line up with anything sane.
836 # One notable divergence is sRGB, which is asymmetric: raw_input_pan requires
837 # an sRGB->linear conversion, but linear values should be written to
838 # raw_output_pan and the hardware handles linear->sRGB.
839 #
840 # We also have format-specific Midgard intrinsics. There are rather
841 # here-be-dragons. load_output_u8_as_fp16_pan does the equivalent of
842 # load_raw_out_pan on an RGBA8 UNORM framebuffer followed by u2u16 -> fp16 ->
843 # division by 255.
844
845 # src[] = { value }
846 store("raw_output_pan", 1, [])
847 load("raw_output_pan", 0, [], [CAN_ELIMINATE, CAN_REORDER])
848 load("output_u8_as_fp16_pan", 0, [], [CAN_ELIMINATE, CAN_REORDER])
849
850 # Loads the sampler paramaters <min_lod, max_lod, lod_bias>
851 # src[] = { sampler_index }
852 load("sampler_lod_parameters_pan", 1, [CAN_ELIMINATE, CAN_REORDER])
853
854 # V3D-specific instrinc for tile buffer color reads.
855 #
856 # The hardware requires that we read the samples and components of a pixel
857 # in order, so we cannot eliminate or remove any loads in a sequence.
858 #
859 # src[] = { render_target }
860 # BASE = sample index
861 load("tlb_color_v3d", 1, [BASE, COMPONENT], [])
862
863 # V3D-specific instrinc for per-sample tile buffer color writes.
864 #
865 # The driver backend needs to identify per-sample color writes and emit
866 # specific code for them.
867 #
868 # src[] = { value, render_target }
869 # BASE = sample index
870 store("tlb_sample_color_v3d", 2, [BASE, COMPONENT, TYPE], [])
871
872 # V3D-specific intrinsic to load the number of layers attached to
873 # the target framebuffer
874 intrinsic("load_fb_layers_v3d", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])