nir: save IO semantics in lowered IO intrinsics
[mesa.git] / src / compiler / nir / nir_intrinsics.py
1 #
2 # Copyright (C) 2018 Red Hat
3 # Copyright (C) 2014 Intel Corporation
4 #
5 # Permission is hereby granted, free of charge, to any person obtaining a
6 # copy of this software and associated documentation files (the "Software"),
7 # to deal in the Software without restriction, including without limitation
8 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 # and/or sell copies of the Software, and to permit persons to whom the
10 # Software is furnished to do so, subject to the following conditions:
11 #
12 # The above copyright notice and this permission notice (including the next
13 # paragraph) shall be included in all copies or substantial portions of the
14 # Software.
15 #
16 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 # IN THE SOFTWARE.
23 #
24
25 # This file defines all the available intrinsics in one place.
26 #
27 # The Intrinsic class corresponds one-to-one with nir_intrinsic_info
28 # structure.
29
30 class Intrinsic(object):
31 """Class that represents all the information about an intrinsic opcode.
32 NOTE: this must be kept in sync with nir_intrinsic_info.
33 """
34 def __init__(self, name, src_components, dest_components,
35 indices, flags, sysval, bit_sizes):
36 """Parameters:
37
38 - name: the intrinsic name
39 - src_components: list of the number of components per src, 0 means
40 vectorized instruction with number of components given in the
41 num_components field in nir_intrinsic_instr.
42 - dest_components: number of destination components, -1 means no
43 dest, 0 means number of components given in num_components field
44 in nir_intrinsic_instr.
45 - indices: list of constant indicies
46 - flags: list of semantic flags
47 - sysval: is this a system-value intrinsic
48 - bit_sizes: allowed dest bit_sizes
49 """
50 assert isinstance(name, str)
51 assert isinstance(src_components, list)
52 if src_components:
53 assert isinstance(src_components[0], int)
54 assert isinstance(dest_components, int)
55 assert isinstance(indices, list)
56 if indices:
57 assert isinstance(indices[0], str)
58 assert isinstance(flags, list)
59 if flags:
60 assert isinstance(flags[0], str)
61 assert isinstance(sysval, bool)
62 if bit_sizes:
63 assert isinstance(bit_sizes[0], int)
64
65 self.name = name
66 self.num_srcs = len(src_components)
67 self.src_components = src_components
68 self.has_dest = (dest_components >= 0)
69 self.dest_components = dest_components
70 self.num_indices = len(indices)
71 self.indices = indices
72 self.flags = flags
73 self.sysval = sysval
74 self.bit_sizes = bit_sizes
75
76 #
77 # Possible indices:
78 #
79
80 # A constant 'base' value that is added to an offset src:
81 BASE = "NIR_INTRINSIC_BASE"
82 # For store instructions, a writemask:
83 WRMASK = "NIR_INTRINSIC_WRMASK"
84 # The stream-id for GS emit_vertex/end_primitive intrinsics:
85 STREAM_ID = "NIR_INTRINSIC_STREAM_ID"
86 # The clip-plane id for load_user_clip_plane intrinsics:
87 UCP_ID = "NIR_INTRINSIC_UCP_ID"
88 # The amount of data, starting from BASE, that this instruction
89 # may access. This is used to provide bounds if the offset is
90 # not constant.
91 RANGE = "NIR_INTRINSIC_RANGE"
92 # The vulkan descriptor set binding for vulkan_resource_index
93 # intrinsic
94 DESC_SET = "NIR_INTRINSIC_DESC_SET"
95 # The vulkan descriptor set binding for vulkan_resource_index
96 # intrinsic
97 BINDING = "NIR_INTRINSIC_BINDING"
98 # Component offset
99 COMPONENT = "NIR_INTRINSIC_COMPONENT"
100 # Interpolation mode (only meaningful for FS inputs)
101 INTERP_MODE = "NIR_INTRINSIC_INTERP_MODE"
102 # A binary nir_op to use when performing a reduction or scan operation
103 REDUCTION_OP = "NIR_INTRINSIC_REDUCTION_OP"
104 # Cluster size for reduction operations
105 CLUSTER_SIZE = "NIR_INTRINSIC_CLUSTER_SIZE"
106 # Parameter index for a load_param intrinsic
107 PARAM_IDX = "NIR_INTRINSIC_PARAM_IDX"
108 # Image dimensionality for image intrinsics
109 IMAGE_DIM = "NIR_INTRINSIC_IMAGE_DIM"
110 # Non-zero if we are accessing an array image
111 IMAGE_ARRAY = "NIR_INTRINSIC_IMAGE_ARRAY"
112 # Access qualifiers for image and memory access intrinsics
113 ACCESS = "NIR_INTRINSIC_ACCESS"
114 DST_ACCESS = "NIR_INTRINSIC_DST_ACCESS"
115 SRC_ACCESS = "NIR_INTRINSIC_SRC_ACCESS"
116 # Image format for image intrinsics
117 FORMAT = "NIR_INTRINSIC_FORMAT"
118 # Offset or address alignment
119 ALIGN_MUL = "NIR_INTRINSIC_ALIGN_MUL"
120 ALIGN_OFFSET = "NIR_INTRINSIC_ALIGN_OFFSET"
121 # The vulkan descriptor type for vulkan_resource_index
122 DESC_TYPE = "NIR_INTRINSIC_DESC_TYPE"
123 # The nir_alu_type of a uniform/input/output
124 TYPE = "NIR_INTRINSIC_TYPE"
125 # The swizzle mask for quad_swizzle_amd & masked_swizzle_amd
126 SWIZZLE_MASK = "NIR_INTRINSIC_SWIZZLE_MASK"
127 # Driver location of attribute
128 DRIVER_LOCATION = "NIR_INTRINSIC_DRIVER_LOCATION"
129 # Ordering and visibility of a memory operation
130 MEMORY_SEMANTICS = "NIR_INTRINSIC_MEMORY_SEMANTICS"
131 # Modes affected by a memory operation
132 MEMORY_MODES = "NIR_INTRINSIC_MEMORY_MODES"
133 # Scope of a memory operation
134 MEMORY_SCOPE = "NIR_INTRINSIC_MEMORY_SCOPE"
135 # Scope of a control barrier
136 EXECUTION_SCOPE = "NIR_INTRINSIC_EXECUTION_SCOPE"
137 IO_SEMANTICS = "NIR_INTRINSIC_IO_SEMANTICS"
138
139 #
140 # Possible flags:
141 #
142
143 CAN_ELIMINATE = "NIR_INTRINSIC_CAN_ELIMINATE"
144 CAN_REORDER = "NIR_INTRINSIC_CAN_REORDER"
145
146 INTR_OPCODES = {}
147
148 # Defines a new NIR intrinsic. By default, the intrinsic will have no sources
149 # and no destination.
150 #
151 # You can set dest_comp=n to enable a destination for the intrinsic, in which
152 # case it will have that many components, or =0 for "as many components as the
153 # NIR destination value."
154 #
155 # Set src_comp=n to enable sources for the intruction. It can be an array of
156 # component counts, or (for convenience) a scalar component count if there's
157 # only one source. If a component count is 0, it will be as many components as
158 # the intrinsic has based on the dest_comp.
159 def intrinsic(name, src_comp=[], dest_comp=-1, indices=[],
160 flags=[], sysval=False, bit_sizes=[]):
161 assert name not in INTR_OPCODES
162 INTR_OPCODES[name] = Intrinsic(name, src_comp, dest_comp,
163 indices, flags, sysval, bit_sizes)
164
165 intrinsic("nop", flags=[CAN_ELIMINATE])
166
167 intrinsic("load_param", dest_comp=0, indices=[PARAM_IDX], flags=[CAN_ELIMINATE])
168
169 intrinsic("load_deref", dest_comp=0, src_comp=[-1],
170 indices=[ACCESS], flags=[CAN_ELIMINATE])
171 intrinsic("store_deref", src_comp=[-1, 0], indices=[WRMASK, ACCESS])
172 intrinsic("copy_deref", src_comp=[-1, -1], indices=[DST_ACCESS, SRC_ACCESS])
173
174 # Interpolation of input. The interp_deref_at* intrinsics are similar to the
175 # load_var intrinsic acting on a shader input except that they interpolate the
176 # input differently. The at_sample, at_offset and at_vertex intrinsics take an
177 # additional source that is an integer sample id, a vec2 position offset, or a
178 # vertex ID respectively.
179
180 intrinsic("interp_deref_at_centroid", dest_comp=0, src_comp=[1],
181 flags=[ CAN_ELIMINATE, CAN_REORDER])
182 intrinsic("interp_deref_at_sample", src_comp=[1, 1], dest_comp=0,
183 flags=[CAN_ELIMINATE, CAN_REORDER])
184 intrinsic("interp_deref_at_offset", src_comp=[1, 2], dest_comp=0,
185 flags=[CAN_ELIMINATE, CAN_REORDER])
186 intrinsic("interp_deref_at_vertex", src_comp=[1, 1], dest_comp=0,
187 flags=[CAN_ELIMINATE, CAN_REORDER])
188
189 # Gets the length of an unsized array at the end of a buffer
190 intrinsic("deref_buffer_array_length", src_comp=[-1], dest_comp=1,
191 flags=[CAN_ELIMINATE, CAN_REORDER])
192
193 # Ask the driver for the size of a given buffer. It takes the buffer index
194 # as source.
195 intrinsic("get_buffer_size", src_comp=[-1], dest_comp=1,
196 flags=[CAN_ELIMINATE, CAN_REORDER])
197
198 # a barrier is an intrinsic with no inputs/outputs but which can't be moved
199 # around/optimized in general
200 def barrier(name):
201 intrinsic(name)
202
203 barrier("discard")
204
205 # Demote fragment shader invocation to a helper invocation. Any stores to
206 # memory after this instruction are suppressed and the fragment does not write
207 # outputs to the framebuffer. Unlike discard, demote needs to ensure that
208 # derivatives will still work for invocations that were not demoted.
209 #
210 # As specified by SPV_EXT_demote_to_helper_invocation.
211 barrier("demote")
212 intrinsic("is_helper_invocation", dest_comp=1, flags=[CAN_ELIMINATE])
213
214 # A workgroup-level control barrier. Any thread which hits this barrier will
215 # pause until all threads within the current workgroup have also hit the
216 # barrier. For compute shaders, the workgroup is defined as the local group.
217 # For tessellation control shaders, the workgroup is defined as the current
218 # patch. This intrinsic does not imply any sort of memory barrier.
219 barrier("control_barrier")
220
221 # Memory barrier with semantics analogous to the memoryBarrier() GLSL
222 # intrinsic.
223 barrier("memory_barrier")
224
225 # Control/Memory barrier with explicit scope. Follows the semantics of SPIR-V
226 # OpMemoryBarrier and OpControlBarrier, used to implement Vulkan Memory Model.
227 # Storage that the barrier applies is represented using NIR variable modes.
228 # For an OpMemoryBarrier, set EXECUTION_SCOPE to NIR_SCOPE_NONE.
229 intrinsic("scoped_barrier",
230 indices=[EXECUTION_SCOPE, MEMORY_SEMANTICS, MEMORY_MODES, MEMORY_SCOPE])
231
232 # Shader clock intrinsic with semantics analogous to the clock2x32ARB()
233 # GLSL intrinsic.
234 # The latter can be used as code motion barrier, which is currently not
235 # feasible with NIR.
236 intrinsic("shader_clock", dest_comp=2, flags=[CAN_ELIMINATE],
237 indices=[MEMORY_SCOPE])
238
239 # Shader ballot intrinsics with semantics analogous to the
240 #
241 # ballotARB()
242 # readInvocationARB()
243 # readFirstInvocationARB()
244 #
245 # GLSL functions from ARB_shader_ballot.
246 intrinsic("ballot", src_comp=[1], dest_comp=0, flags=[CAN_ELIMINATE])
247 intrinsic("read_invocation", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
248 intrinsic("read_first_invocation", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
249
250 # Additional SPIR-V ballot intrinsics
251 #
252 # These correspond to the SPIR-V opcodes
253 #
254 # OpGroupUniformElect
255 # OpSubgroupFirstInvocationKHR
256 intrinsic("elect", dest_comp=1, flags=[CAN_ELIMINATE])
257 intrinsic("first_invocation", dest_comp=1, flags=[CAN_ELIMINATE])
258
259 # Memory barrier with semantics analogous to the compute shader
260 # groupMemoryBarrier(), memoryBarrierAtomicCounter(), memoryBarrierBuffer(),
261 # memoryBarrierImage() and memoryBarrierShared() GLSL intrinsics.
262 barrier("group_memory_barrier")
263 barrier("memory_barrier_atomic_counter")
264 barrier("memory_barrier_buffer")
265 barrier("memory_barrier_image")
266 barrier("memory_barrier_shared")
267 barrier("begin_invocation_interlock")
268 barrier("end_invocation_interlock")
269
270 # Memory barrier for synchronizing TCS patch outputs
271 barrier("memory_barrier_tcs_patch")
272
273 # A conditional discard/demote, with a single boolean source.
274 intrinsic("discard_if", src_comp=[1])
275 intrinsic("demote_if", src_comp=[1])
276
277 # ARB_shader_group_vote intrinsics
278 intrinsic("vote_any", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
279 intrinsic("vote_all", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
280 intrinsic("vote_feq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
281 intrinsic("vote_ieq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
282
283 # Ballot ALU operations from SPIR-V.
284 #
285 # These operations work like their ALU counterparts except that the operate
286 # on a uvec4 which is treated as a 128bit integer. Also, they are, in
287 # general, free to ignore any bits which are above the subgroup size.
288 intrinsic("ballot_bitfield_extract", src_comp=[4, 1], dest_comp=1, flags=[CAN_ELIMINATE])
289 intrinsic("ballot_bit_count_reduce", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
290 intrinsic("ballot_bit_count_inclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
291 intrinsic("ballot_bit_count_exclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
292 intrinsic("ballot_find_lsb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
293 intrinsic("ballot_find_msb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
294
295 # Shuffle operations from SPIR-V.
296 intrinsic("shuffle", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
297 intrinsic("shuffle_xor", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
298 intrinsic("shuffle_up", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
299 intrinsic("shuffle_down", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
300
301 # Quad operations from SPIR-V.
302 intrinsic("quad_broadcast", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
303 intrinsic("quad_swap_horizontal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
304 intrinsic("quad_swap_vertical", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
305 intrinsic("quad_swap_diagonal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
306
307 intrinsic("reduce", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP, CLUSTER_SIZE],
308 flags=[CAN_ELIMINATE])
309 intrinsic("inclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
310 flags=[CAN_ELIMINATE])
311 intrinsic("exclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
312 flags=[CAN_ELIMINATE])
313
314 # AMD shader ballot operations
315 intrinsic("quad_swizzle_amd", src_comp=[0], dest_comp=0, indices=[SWIZZLE_MASK],
316 flags=[CAN_ELIMINATE])
317 intrinsic("masked_swizzle_amd", src_comp=[0], dest_comp=0, indices=[SWIZZLE_MASK],
318 flags=[CAN_ELIMINATE])
319 intrinsic("write_invocation_amd", src_comp=[0, 0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
320 intrinsic("mbcnt_amd", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
321
322 # Basic Geometry Shader intrinsics.
323 #
324 # emit_vertex implements GLSL's EmitStreamVertex() built-in. It takes a single
325 # index, which is the stream ID to write to.
326 #
327 # end_primitive implements GLSL's EndPrimitive() built-in.
328 intrinsic("emit_vertex", indices=[STREAM_ID])
329 intrinsic("end_primitive", indices=[STREAM_ID])
330
331 # Geometry Shader intrinsics with a vertex count.
332 #
333 # Alternatively, drivers may implement these intrinsics, and use
334 # nir_lower_gs_intrinsics() to convert from the basic intrinsics.
335 #
336 # These maintain a count of the number of vertices emitted, as an additional
337 # unsigned integer source.
338 intrinsic("emit_vertex_with_counter", src_comp=[1], indices=[STREAM_ID])
339 intrinsic("end_primitive_with_counter", src_comp=[1], indices=[STREAM_ID])
340 intrinsic("set_vertex_count", src_comp=[1])
341
342 # Atomic counters
343 #
344 # The *_var variants take an atomic_uint nir_variable, while the other,
345 # lowered, variants take a constant buffer index and register offset.
346
347 def atomic(name, flags=[]):
348 intrinsic(name + "_deref", src_comp=[-1], dest_comp=1, flags=flags)
349 intrinsic(name, src_comp=[1], dest_comp=1, indices=[BASE], flags=flags)
350
351 def atomic2(name):
352 intrinsic(name + "_deref", src_comp=[-1, 1], dest_comp=1)
353 intrinsic(name, src_comp=[1, 1], dest_comp=1, indices=[BASE])
354
355 def atomic3(name):
356 intrinsic(name + "_deref", src_comp=[-1, 1, 1], dest_comp=1)
357 intrinsic(name, src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
358
359 atomic("atomic_counter_inc")
360 atomic("atomic_counter_pre_dec")
361 atomic("atomic_counter_post_dec")
362 atomic("atomic_counter_read", flags=[CAN_ELIMINATE])
363 atomic2("atomic_counter_add")
364 atomic2("atomic_counter_min")
365 atomic2("atomic_counter_max")
366 atomic2("atomic_counter_and")
367 atomic2("atomic_counter_or")
368 atomic2("atomic_counter_xor")
369 atomic2("atomic_counter_exchange")
370 atomic3("atomic_counter_comp_swap")
371
372 # Image load, store and atomic intrinsics.
373 #
374 # All image intrinsics come in three versions. One which take an image target
375 # passed as a deref chain as the first source, one which takes an index as the
376 # first source, and one which takes a bindless handle as the first source.
377 # In the first version, the image variable contains the memory and layout
378 # qualifiers that influence the semantics of the intrinsic. In the second and
379 # third, the image format and access qualifiers are provided as constant
380 # indices.
381 #
382 # All image intrinsics take a four-coordinate vector and a sample index as
383 # 2nd and 3rd sources, determining the location within the image that will be
384 # accessed by the intrinsic. Components not applicable to the image target
385 # in use are undefined. Image store takes an additional four-component
386 # argument with the value to be written, and image atomic operations take
387 # either one or two additional scalar arguments with the same meaning as in
388 # the ARB_shader_image_load_store specification.
389 def image(name, src_comp=[], **kwargs):
390 intrinsic("image_deref_" + name, src_comp=[1] + src_comp,
391 indices=[ACCESS], **kwargs)
392 intrinsic("image_" + name, src_comp=[1] + src_comp,
393 indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
394 intrinsic("bindless_image_" + name, src_comp=[1] + src_comp,
395 indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
396
397 image("load", src_comp=[4, 1, 1], dest_comp=0, flags=[CAN_ELIMINATE])
398 image("store", src_comp=[4, 1, 0, 1])
399 image("atomic_add", src_comp=[4, 1, 1], dest_comp=1)
400 image("atomic_imin", src_comp=[4, 1, 1], dest_comp=1)
401 image("atomic_umin", src_comp=[4, 1, 1], dest_comp=1)
402 image("atomic_imax", src_comp=[4, 1, 1], dest_comp=1)
403 image("atomic_umax", src_comp=[4, 1, 1], dest_comp=1)
404 image("atomic_and", src_comp=[4, 1, 1], dest_comp=1)
405 image("atomic_or", src_comp=[4, 1, 1], dest_comp=1)
406 image("atomic_xor", src_comp=[4, 1, 1], dest_comp=1)
407 image("atomic_exchange", src_comp=[4, 1, 1], dest_comp=1)
408 image("atomic_comp_swap", src_comp=[4, 1, 1, 1], dest_comp=1)
409 image("atomic_fadd", src_comp=[4, 1, 1], dest_comp=1)
410 image("size", dest_comp=0, src_comp=[1], flags=[CAN_ELIMINATE, CAN_REORDER])
411 image("samples", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
412 image("atomic_inc_wrap", src_comp=[4, 1, 1], dest_comp=1)
413 image("atomic_dec_wrap", src_comp=[4, 1, 1], dest_comp=1)
414
415 # Vulkan descriptor set intrinsics
416 #
417 # The Vulkan API uses a different binding model from GL. In the Vulkan
418 # API, all external resources are represented by a tuple:
419 #
420 # (descriptor set, binding, array index)
421 #
422 # where the array index is the only thing allowed to be indirect. The
423 # vulkan_surface_index intrinsic takes the descriptor set and binding as
424 # its first two indices and the array index as its source. The third
425 # index is a nir_variable_mode in case that's useful to the backend.
426 #
427 # The intended usage is that the shader will call vulkan_surface_index to
428 # get an index and then pass that as the buffer index ubo/ssbo calls.
429 #
430 # The vulkan_resource_reindex intrinsic takes a resource index in src0
431 # (the result of a vulkan_resource_index or vulkan_resource_reindex) which
432 # corresponds to the tuple (set, binding, index) and computes an index
433 # corresponding to tuple (set, binding, idx + src1).
434 intrinsic("vulkan_resource_index", src_comp=[1], dest_comp=0,
435 indices=[DESC_SET, BINDING, DESC_TYPE],
436 flags=[CAN_ELIMINATE, CAN_REORDER])
437 intrinsic("vulkan_resource_reindex", src_comp=[0, 1], dest_comp=0,
438 indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
439 intrinsic("load_vulkan_descriptor", src_comp=[-1], dest_comp=0,
440 indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
441
442 # variable atomic intrinsics
443 #
444 # All of these variable atomic memory operations read a value from memory,
445 # compute a new value using one of the operations below, write the new value
446 # to memory, and return the original value read.
447 #
448 # All operations take 2 sources except CompSwap that takes 3. These sources
449 # represent:
450 #
451 # 0: A deref to the memory on which to perform the atomic
452 # 1: The data parameter to the atomic function (i.e. the value to add
453 # in shared_atomic_add, etc).
454 # 2: For CompSwap only: the second data parameter.
455 intrinsic("deref_atomic_add", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
456 intrinsic("deref_atomic_imin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
457 intrinsic("deref_atomic_umin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
458 intrinsic("deref_atomic_imax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
459 intrinsic("deref_atomic_umax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
460 intrinsic("deref_atomic_and", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
461 intrinsic("deref_atomic_or", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
462 intrinsic("deref_atomic_xor", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
463 intrinsic("deref_atomic_exchange", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
464 intrinsic("deref_atomic_comp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
465 intrinsic("deref_atomic_fadd", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
466 intrinsic("deref_atomic_fmin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
467 intrinsic("deref_atomic_fmax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
468 intrinsic("deref_atomic_fcomp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
469
470 # SSBO atomic intrinsics
471 #
472 # All of the SSBO atomic memory operations read a value from memory,
473 # compute a new value using one of the operations below, write the new
474 # value to memory, and return the original value read.
475 #
476 # All operations take 3 sources except CompSwap that takes 4. These
477 # sources represent:
478 #
479 # 0: The SSBO buffer index.
480 # 1: The offset into the SSBO buffer of the variable that the atomic
481 # operation will operate on.
482 # 2: The data parameter to the atomic function (i.e. the value to add
483 # in ssbo_atomic_add, etc).
484 # 3: For CompSwap only: the second data parameter.
485 intrinsic("ssbo_atomic_add", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
486 intrinsic("ssbo_atomic_imin", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
487 intrinsic("ssbo_atomic_umin", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
488 intrinsic("ssbo_atomic_imax", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
489 intrinsic("ssbo_atomic_umax", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
490 intrinsic("ssbo_atomic_and", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
491 intrinsic("ssbo_atomic_or", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
492 intrinsic("ssbo_atomic_xor", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
493 intrinsic("ssbo_atomic_exchange", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
494 intrinsic("ssbo_atomic_comp_swap", src_comp=[-1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
495 intrinsic("ssbo_atomic_fadd", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
496 intrinsic("ssbo_atomic_fmin", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
497 intrinsic("ssbo_atomic_fmax", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
498 intrinsic("ssbo_atomic_fcomp_swap", src_comp=[-1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
499
500 # CS shared variable atomic intrinsics
501 #
502 # All of the shared variable atomic memory operations read a value from
503 # memory, compute a new value using one of the operations below, write the
504 # new value to memory, and return the original value read.
505 #
506 # All operations take 2 sources except CompSwap that takes 3. These
507 # sources represent:
508 #
509 # 0: The offset into the shared variable storage region that the atomic
510 # operation will operate on.
511 # 1: The data parameter to the atomic function (i.e. the value to add
512 # in shared_atomic_add, etc).
513 # 2: For CompSwap only: the second data parameter.
514 intrinsic("shared_atomic_add", src_comp=[1, 1], dest_comp=1, indices=[BASE])
515 intrinsic("shared_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
516 intrinsic("shared_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
517 intrinsic("shared_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
518 intrinsic("shared_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
519 intrinsic("shared_atomic_and", src_comp=[1, 1], dest_comp=1, indices=[BASE])
520 intrinsic("shared_atomic_or", src_comp=[1, 1], dest_comp=1, indices=[BASE])
521 intrinsic("shared_atomic_xor", src_comp=[1, 1], dest_comp=1, indices=[BASE])
522 intrinsic("shared_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
523 intrinsic("shared_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
524 intrinsic("shared_atomic_fadd", src_comp=[1, 1], dest_comp=1, indices=[BASE])
525 intrinsic("shared_atomic_fmin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
526 intrinsic("shared_atomic_fmax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
527 intrinsic("shared_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
528
529 # Global atomic intrinsics
530 #
531 # All of the shared variable atomic memory operations read a value from
532 # memory, compute a new value using one of the operations below, write the
533 # new value to memory, and return the original value read.
534 #
535 # All operations take 2 sources except CompSwap that takes 3. These
536 # sources represent:
537 #
538 # 0: The memory address that the atomic operation will operate on.
539 # 1: The data parameter to the atomic function (i.e. the value to add
540 # in shared_atomic_add, etc).
541 # 2: For CompSwap only: the second data parameter.
542 intrinsic("global_atomic_add", src_comp=[1, 1], dest_comp=1, indices=[BASE])
543 intrinsic("global_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
544 intrinsic("global_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
545 intrinsic("global_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
546 intrinsic("global_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
547 intrinsic("global_atomic_and", src_comp=[1, 1], dest_comp=1, indices=[BASE])
548 intrinsic("global_atomic_or", src_comp=[1, 1], dest_comp=1, indices=[BASE])
549 intrinsic("global_atomic_xor", src_comp=[1, 1], dest_comp=1, indices=[BASE])
550 intrinsic("global_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
551 intrinsic("global_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
552 intrinsic("global_atomic_fadd", src_comp=[1, 1], dest_comp=1, indices=[BASE])
553 intrinsic("global_atomic_fmin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
554 intrinsic("global_atomic_fmax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
555 intrinsic("global_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
556
557 def system_value(name, dest_comp, indices=[], bit_sizes=[32]):
558 intrinsic("load_" + name, [], dest_comp, indices,
559 flags=[CAN_ELIMINATE, CAN_REORDER], sysval=True,
560 bit_sizes=bit_sizes)
561
562 system_value("frag_coord", 4)
563 system_value("point_coord", 2)
564 system_value("line_coord", 1)
565 system_value("front_face", 1, bit_sizes=[1, 32])
566 system_value("vertex_id", 1)
567 system_value("vertex_id_zero_base", 1)
568 system_value("first_vertex", 1)
569 system_value("is_indexed_draw", 1)
570 system_value("base_vertex", 1)
571 system_value("instance_id", 1)
572 system_value("base_instance", 1)
573 system_value("draw_id", 1)
574 system_value("sample_id", 1)
575 # sample_id_no_per_sample is like sample_id but does not imply per-
576 # sample shading. See the lower_helper_invocation option.
577 system_value("sample_id_no_per_sample", 1)
578 system_value("sample_pos", 2)
579 system_value("sample_mask_in", 1)
580 system_value("primitive_id", 1)
581 system_value("invocation_id", 1)
582 system_value("tess_coord", 3)
583 system_value("tess_level_outer", 4)
584 system_value("tess_level_inner", 2)
585 system_value("tess_level_outer_default", 4)
586 system_value("tess_level_inner_default", 2)
587 system_value("patch_vertices_in", 1)
588 system_value("local_invocation_id", 3)
589 system_value("local_invocation_index", 1)
590 # zero_base indicates it starts from 0 for the current dispatch
591 # non-zero_base indicates the base is included
592 system_value("work_group_id", 3, bit_sizes=[32, 64])
593 system_value("work_group_id_zero_base", 3)
594 system_value("base_work_group_id", 3, bit_sizes=[32, 64])
595 system_value("user_clip_plane", 4, indices=[UCP_ID])
596 system_value("num_work_groups", 3, bit_sizes=[32, 64])
597 system_value("helper_invocation", 1, bit_sizes=[1, 32])
598 system_value("alpha_ref_float", 1)
599 system_value("layer_id", 1)
600 system_value("view_index", 1)
601 system_value("subgroup_size", 1)
602 system_value("subgroup_invocation", 1)
603 system_value("subgroup_eq_mask", 0, bit_sizes=[32, 64])
604 system_value("subgroup_ge_mask", 0, bit_sizes=[32, 64])
605 system_value("subgroup_gt_mask", 0, bit_sizes=[32, 64])
606 system_value("subgroup_le_mask", 0, bit_sizes=[32, 64])
607 system_value("subgroup_lt_mask", 0, bit_sizes=[32, 64])
608 system_value("num_subgroups", 1)
609 system_value("subgroup_id", 1)
610 system_value("local_group_size", 3)
611 # note: the definition of global_invocation_id_zero_base is based on
612 # (work_group_id * local_group_size) + local_invocation_id.
613 # it is *not* based on work_group_id_zero_base, meaning the work group
614 # base is already accounted for, and the global base is additive on top of that
615 system_value("global_invocation_id", 3, bit_sizes=[32, 64])
616 system_value("global_invocation_id_zero_base", 3, bit_sizes=[32, 64])
617 system_value("base_global_invocation_id", 3, bit_sizes=[32, 64])
618 system_value("global_invocation_index", 1, bit_sizes=[32, 64])
619 system_value("work_dim", 1)
620 system_value("line_width", 1)
621 system_value("aa_line_width", 1)
622 # BASE=0 for global/shader, BASE=1 for local/function
623 system_value("scratch_base_ptr", 0, bit_sizes=[32,64], indices=[BASE])
624
625 # Driver-specific viewport scale/offset parameters.
626 #
627 # VC4 and V3D need to emit a scaled version of the position in the vertex
628 # shaders for binning, and having system values lets us move the math for that
629 # into NIR.
630 #
631 # Panfrost needs to implement all coordinate transformation in the
632 # vertex shader; system values allow us to share this routine in NIR.
633 system_value("viewport_x_scale", 1)
634 system_value("viewport_y_scale", 1)
635 system_value("viewport_z_scale", 1)
636 system_value("viewport_z_offset", 1)
637 system_value("viewport_scale", 3)
638 system_value("viewport_offset", 3)
639
640 # Blend constant color values. Float values are clamped. Vectored versions are
641 # provided as well for driver convenience
642
643 system_value("blend_const_color_r_float", 1)
644 system_value("blend_const_color_g_float", 1)
645 system_value("blend_const_color_b_float", 1)
646 system_value("blend_const_color_a_float", 1)
647 system_value("blend_const_color_rgba", 4)
648 system_value("blend_const_color_rgba8888_unorm", 1)
649 system_value("blend_const_color_aaaa8888_unorm", 1)
650
651 # System values for gl_Color, for radeonsi which interpolates these in the
652 # shader prolog to handle two-sided color without recompiles and therefore
653 # doesn't handle these in the main shader part like normal varyings.
654 system_value("color0", 4)
655 system_value("color1", 4)
656
657 # System value for internal compute shaders in radeonsi.
658 system_value("user_data_amd", 4)
659
660 # Barycentric coordinate intrinsics.
661 #
662 # These set up the barycentric coordinates for a particular interpolation.
663 # The first four are for the simple cases: pixel, centroid, per-sample
664 # (at gl_SampleID), or pull model (1/W, 1/I, 1/J) at the pixel center. The next
665 # three two handle interpolating at a specified sample location, or
666 # interpolating with a vec2 offset,
667 #
668 # The interp_mode index should be either the INTERP_MODE_SMOOTH or
669 # INTERP_MODE_NOPERSPECTIVE enum values.
670 #
671 # The vec2 value produced by these intrinsics is intended for use as the
672 # barycoord source of a load_interpolated_input intrinsic.
673
674 def barycentric(name, dst_comp, src_comp=[]):
675 intrinsic("load_barycentric_" + name, src_comp=src_comp, dest_comp=dst_comp,
676 indices=[INTERP_MODE], flags=[CAN_ELIMINATE, CAN_REORDER])
677
678 # no sources.
679 barycentric("pixel", 2)
680 barycentric("centroid", 2)
681 barycentric("sample", 2)
682 barycentric("model", 3)
683 # src[] = { sample_id }.
684 barycentric("at_sample", 2, [1])
685 # src[] = { offset.xy }.
686 barycentric("at_offset", 2, [2])
687
688 # Load sample position:
689 #
690 # Takes a sample # and returns a sample position. Used for lowering
691 # interpolateAtSample() to interpolateAtOffset()
692 intrinsic("load_sample_pos_from_id", src_comp=[1], dest_comp=2,
693 flags=[CAN_ELIMINATE, CAN_REORDER])
694
695 # Loads what I believe is the primitive size, for scaling ij to pixel size:
696 intrinsic("load_size_ir3", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
697
698 # Fragment shader input interpolation delta intrinsic.
699 #
700 # For hw where fragment shader input interpolation is handled in shader, the
701 # load_fs_input_interp deltas intrinsics can be used to load the input deltas
702 # used for interpolation as follows:
703 #
704 # vec3 iid = load_fs_input_interp_deltas(varying_slot)
705 # vec2 bary = load_barycentric_*(...)
706 # float result = iid.x + iid.y * bary.y + iid.z * bary.x
707
708 intrinsic("load_fs_input_interp_deltas", src_comp=[1], dest_comp=3,
709 indices=[BASE, COMPONENT], flags=[CAN_ELIMINATE, CAN_REORDER])
710
711 # Load operations pull data from some piece of GPU memory. All load
712 # operations operate in terms of offsets into some piece of theoretical
713 # memory. Loads from externally visible memory (UBO and SSBO) simply take a
714 # byte offset as a source. Loads from opaque memory (uniforms, inputs, etc.)
715 # take a base+offset pair where the nir_intrinsic_base() gives the location
716 # of the start of the variable being loaded and and the offset source is a
717 # offset into that variable.
718 #
719 # Uniform load operations have a nir_intrinsic_range() index that specifies the
720 # range (starting at base) of the data from which we are loading. If
721 # range == 0, then the range is unknown.
722 #
723 # Some load operations such as UBO/SSBO load and per_vertex loads take an
724 # additional source to specify which UBO/SSBO/vertex to load from.
725 #
726 # The exact address type depends on the lowering pass that generates the
727 # load/store intrinsics. Typically, this is vec4 units for things such as
728 # varying slots and float units for fragment shader inputs. UBO and SSBO
729 # offsets are always in bytes.
730
731 def load(name, src_comp, indices=[], flags=[]):
732 intrinsic("load_" + name, src_comp, dest_comp=0, indices=indices,
733 flags=flags)
734
735 # src[] = { offset }.
736 load("uniform", [1], [BASE, RANGE, TYPE], [CAN_ELIMINATE, CAN_REORDER])
737 # src[] = { buffer_index, offset }.
738 load("ubo", [-1, 1], [ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE, CAN_REORDER])
739 # src[] = { buffer_index, offset in vec4 units }
740 load("ubo_vec4", [-1, 1], [ACCESS, COMPONENT], flags=[CAN_ELIMINATE, CAN_REORDER])
741 # src[] = { offset }.
742 load("input", [1], [BASE, COMPONENT, TYPE, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER])
743 # src[] = { vertex_id, offset }.
744 load("input_vertex", [1, 1], [BASE, COMPONENT, TYPE, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER])
745 # src[] = { vertex, offset }.
746 load("per_vertex_input", [1, 1], [BASE, COMPONENT, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER])
747 # src[] = { barycoord, offset }.
748 load("interpolated_input", [2, 1], [BASE, COMPONENT, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER])
749
750 # src[] = { buffer_index, offset }.
751 load("ssbo", [-1, 1], [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
752 # src[] = { buffer_index }
753 load("ssbo_address", [1], [], [CAN_ELIMINATE, CAN_REORDER])
754 # src[] = { offset }.
755 load("output", [1], [BASE, COMPONENT, IO_SEMANTICS], flags=[CAN_ELIMINATE])
756 # src[] = { vertex, offset }.
757 load("per_vertex_output", [1, 1], [BASE, COMPONENT, IO_SEMANTICS], [CAN_ELIMINATE])
758 # src[] = { offset }.
759 load("shared", [1], [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
760 # src[] = { offset }.
761 load("push_constant", [1], [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
762 # src[] = { offset }.
763 load("constant", [1], [BASE, RANGE, ALIGN_MUL, ALIGN_OFFSET],
764 [CAN_ELIMINATE, CAN_REORDER])
765 # src[] = { address }.
766 load("global", [1], [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
767 # src[] = { address }.
768 load("kernel_input", [1], [BASE, RANGE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE, CAN_REORDER])
769 # src[] = { offset }.
770 load("scratch", [1], [ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
771
772 # Stores work the same way as loads, except now the first source is the value
773 # to store and the second (and possibly third) source specify where to store
774 # the value. SSBO and shared memory stores also have a
775 # nir_intrinsic_write_mask()
776
777 def store(name, srcs, indices=[], flags=[]):
778 intrinsic("store_" + name, [0] + srcs, indices=indices, flags=flags)
779
780 # src[] = { value, offset }.
781 store("output", [1], [BASE, WRMASK, COMPONENT, TYPE, IO_SEMANTICS])
782 # src[] = { value, vertex, offset }.
783 store("per_vertex_output", [1, 1], [BASE, WRMASK, COMPONENT, IO_SEMANTICS])
784 # src[] = { value, block_index, offset }
785 store("ssbo", [-1, 1], [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
786 # src[] = { value, offset }.
787 store("shared", [1], [BASE, WRMASK, ALIGN_MUL, ALIGN_OFFSET])
788 # src[] = { value, address }.
789 store("global", [1], [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
790 # src[] = { value, offset }.
791 store("scratch", [1], [ALIGN_MUL, ALIGN_OFFSET, WRMASK])
792
793 # IR3-specific version of most SSBO intrinsics. The only different
794 # compare to the originals is that they add an extra source to hold
795 # the dword-offset, which is needed by the backend code apart from
796 # the byte-offset already provided by NIR in one of the sources.
797 #
798 # NIR lowering pass 'ir3_nir_lower_io_offset' will replace the
799 # original SSBO intrinsics by these, placing the computed
800 # dword-offset always in the last source.
801 #
802 # The float versions are not handled because those are not supported
803 # by the backend.
804 store("ssbo_ir3", [1, 1, 1],
805 indices=[WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
806 load("ssbo_ir3", [1, 1, 1],
807 indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
808 intrinsic("ssbo_atomic_add_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
809 intrinsic("ssbo_atomic_imin_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
810 intrinsic("ssbo_atomic_umin_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
811 intrinsic("ssbo_atomic_imax_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
812 intrinsic("ssbo_atomic_umax_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
813 intrinsic("ssbo_atomic_and_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
814 intrinsic("ssbo_atomic_or_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
815 intrinsic("ssbo_atomic_xor_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
816 intrinsic("ssbo_atomic_exchange_ir3", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
817 intrinsic("ssbo_atomic_comp_swap_ir3", src_comp=[1, 1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
818
819 # System values for freedreno geometry shaders.
820 system_value("vs_primitive_stride_ir3", 1)
821 system_value("vs_vertex_stride_ir3", 1)
822 system_value("gs_header_ir3", 1)
823 system_value("primitive_location_ir3", 1, indices=[DRIVER_LOCATION])
824
825 # System values for freedreno tessellation shaders.
826 system_value("hs_patch_stride_ir3", 1)
827 system_value("tess_factor_base_ir3", 2)
828 system_value("tess_param_base_ir3", 2)
829 system_value("tcs_header_ir3", 1)
830
831 # IR3-specific intrinsics for tessellation control shaders. cond_end_ir3 end
832 # the shader when src0 is false and is used to narrow down the TCS shader to
833 # just thread 0 before writing out tessellation levels.
834 intrinsic("cond_end_ir3", src_comp=[1])
835 # end_patch_ir3 is used just before thread 0 exist the TCS and presumably
836 # signals the TE that the patch is complete and can be tessellated.
837 intrinsic("end_patch_ir3")
838
839 # IR3-specific load/store intrinsics. These access a buffer used to pass data
840 # between geometry stages - perhaps it's explicit access to the vertex cache.
841
842 # src[] = { value, offset }.
843 store("shared_ir3", [1], [BASE, ALIGN_MUL, ALIGN_OFFSET])
844 # src[] = { offset }.
845 load("shared_ir3", [1], [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
846
847 # IR3-specific load/store global intrinsics. They take a 64-bit base address
848 # and a 32-bit offset. The hardware will add the base and the offset, which
849 # saves us from doing 64-bit math on the base address.
850
851 # src[] = { value, address(vec2 of hi+lo uint32_t), offset }.
852 # const_index[] = { write_mask, align_mul, align_offset }
853 store("global_ir3", [2, 1], indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET])
854 # src[] = { address(vec2 of hi+lo uint32_t), offset }.
855 # const_index[] = { access, align_mul, align_offset }
856 load("global_ir3", [2, 1], indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
857
858 # IR3-specific bindless handle specifier. Similar to vulkan_resource_index, but
859 # without the binding because the hardware expects a single flattened index
860 # rather than a (binding, index) pair. We may also want to use this with GL.
861 # Note that this doesn't actually turn into a HW instruction.
862 intrinsic("bindless_resource_ir3", [1], dest_comp=1, indices=[DESC_SET], flags=[CAN_ELIMINATE, CAN_REORDER])
863
864 # Intrinsics used by the Midgard/Bifrost blend pipeline. These are defined
865 # within a blend shader to read/write the raw value from the tile buffer,
866 # without applying any format conversion in the process. If the shader needs
867 # usable pixel values, it must apply format conversions itself.
868 #
869 # These definitions are generic, but they are explicitly vendored to prevent
870 # other drivers from using them, as their semantics is defined in terms of the
871 # Midgard/Bifrost hardware tile buffer and may not line up with anything sane.
872 # One notable divergence is sRGB, which is asymmetric: raw_input_pan requires
873 # an sRGB->linear conversion, but linear values should be written to
874 # raw_output_pan and the hardware handles linear->sRGB.
875
876 # src[] = { value }
877 store("raw_output_pan", [], [])
878 store("combined_output_pan", [1, 1, 1], [BASE, COMPONENT])
879 load("raw_output_pan", [1], [BASE], [CAN_ELIMINATE, CAN_REORDER])
880
881 # Loads the sampler paramaters <min_lod, max_lod, lod_bias>
882 # src[] = { sampler_index }
883 load("sampler_lod_parameters_pan", [1], [CAN_ELIMINATE, CAN_REORDER])
884
885 # R600 specific instrincs
886 #
887 # R600 can only fetch 16 byte aligned data from an UBO, and the actual offset
888 # is given in vec4 units, so we have to fetch the a vec4 and get the component
889 # later
890 # src[] = { buffer_index, offset }.
891 load("ubo_r600", [1, 1], [ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE, CAN_REORDER])
892
893 # location where the tesselation data is stored in LDS
894 system_value("tcs_in_param_base_r600", 4)
895 system_value("tcs_out_param_base_r600", 4)
896 system_value("tcs_rel_patch_id_r600", 1)
897 system_value("tcs_tess_factor_base_r600", 1)
898
899 # load as many components as needed giving per-component addresses
900 intrinsic("load_local_shared_r600", src_comp=[0], dest_comp=0, indices = [COMPONENT], flags = [CAN_ELIMINATE, CAN_REORDER])
901
902 store("local_shared_r600", [1], [WRMASK])
903 store("tf_r600", [])
904
905 # V3D-specific instrinc for tile buffer color reads.
906 #
907 # The hardware requires that we read the samples and components of a pixel
908 # in order, so we cannot eliminate or remove any loads in a sequence.
909 #
910 # src[] = { render_target }
911 # BASE = sample index
912 load("tlb_color_v3d", [1], [BASE, COMPONENT], [])
913
914 # V3D-specific instrinc for per-sample tile buffer color writes.
915 #
916 # The driver backend needs to identify per-sample color writes and emit
917 # specific code for them.
918 #
919 # src[] = { value, render_target }
920 # BASE = sample index
921 store("tlb_sample_color_v3d", [1], [BASE, COMPONENT, TYPE], [])
922
923 # V3D-specific intrinsic to load the number of layers attached to
924 # the target framebuffer
925 intrinsic("load_fb_layers_v3d", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
926
927 # Intel-specific query for loading from the brw_image_param struct passed
928 # into the shader as a uniform. The variable is a deref to the image
929 # variable. The const index specifies which of the six parameters to load.
930 intrinsic("image_deref_load_param_intel", src_comp=[1], dest_comp=0,
931 indices=[BASE], flags=[CAN_ELIMINATE, CAN_REORDER])
932 image("load_raw_intel", src_comp=[1], dest_comp=0,
933 flags=[CAN_ELIMINATE])
934 image("store_raw_intel", src_comp=[1, 0])
935
936 # Number of data items being operated on for a SIMD program.
937 system_value("simd_width_intel", 1)