src/compiler/nir/nir_lower_alu_to_scalar.c

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir.h"
  25 #include "nir_builder.h"
  26
  27 /** @file nir_lower_alu_to_scalar.c
  28  *
  29  * Replaces nir_alu_instr operations with more than one channel used in the
  30  * arguments with individual per-channel operations.
  31  */
  32
  33 static bool
  34 inst_is_vector_alu(const nir_instr *instr, const void *_state)
  35 {
  36    if (instr->type != nir_instr_type_alu)
  37       return false;
  38
  39    nir_alu_instr *alu = nir_instr_as_alu(instr);
  40
  41    /* There is no ALU instruction which has a scalar destination, scalar
  42     * src[0], and some other vector source.
  43     */
  44    assert(alu->dest.dest.is_ssa);
  45    assert(alu->src[0].src.is_ssa);
  46    return alu->dest.dest.ssa.num_components > 1 ||
  47           nir_op_infos[alu->op].input_sizes[0] > 1;
  48 }
  49
  50 static void
  51 nir_alu_ssa_dest_init(nir_alu_instr *alu, unsigned num_components,
  52                       unsigned bit_size)
  53 {
  54    nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components,
  55                      bit_size, NULL);
  56    alu->dest.write_mask = (1 << num_components) - 1;
  57 }
  58
  59 static nir_ssa_def *
  60 lower_reduction(nir_alu_instr *alu, nir_op chan_op, nir_op merge_op,
  61                 nir_builder *builder)
  62 {
  63    unsigned num_components = nir_op_infos[alu->op].input_sizes[0];
  64
  65    nir_ssa_def *last = NULL;
  66    for (unsigned i = 0; i < num_components; i++) {
  67       nir_alu_instr *chan = nir_alu_instr_create(builder->shader, chan_op);
  68       nir_alu_ssa_dest_init(chan, 1, alu->dest.dest.ssa.bit_size);
  69       nir_alu_src_copy(&chan->src[0], &alu->src[0], chan);
  70       chan->src[0].swizzle[0] = chan->src[0].swizzle[i];
  71       if (nir_op_infos[chan_op].num_inputs > 1) {
  72          assert(nir_op_infos[chan_op].num_inputs == 2);
  73          nir_alu_src_copy(&chan->src[1], &alu->src[1], chan);
  74          chan->src[1].swizzle[0] = chan->src[1].swizzle[i];
  75       }
  76       chan->exact = alu->exact;
  77
  78       nir_builder_instr_insert(builder, &chan->instr);
  79
  80       if (i == 0) {
  81          last = &chan->dest.dest.ssa;
  82       } else {
  83          last = nir_build_alu(builder, merge_op,
  84                               last, &chan->dest.dest.ssa, NULL, NULL);
  85       }
  86    }
  87
  88    return last;
  89 }
  90
  91 static nir_ssa_def *
  92 lower_alu_instr_scalar(nir_builder *b, nir_instr *instr, void *_state)
  93 {
  94    BITSET_WORD *lower_set = _state;
  95    nir_alu_instr *alu = nir_instr_as_alu(instr);
  96    unsigned num_src = nir_op_infos[alu->op].num_inputs;
  97    unsigned i, chan;
  98
  99    assert(alu->dest.dest.is_ssa);
 100    assert(alu->dest.write_mask != 0);
 101
 102    b->cursor = nir_before_instr(&alu->instr);
 103    b->exact = alu->exact;
 104
 105    if (lower_set && !BITSET_TEST(lower_set, alu->op))
 106       return NULL;
 107
 108 #define LOWER_REDUCTION(name, chan, merge) \
 109    case name##2: \
 110    case name##3: \
 111    case name##4: \
 112       return lower_reduction(alu, chan, merge, b); \
 113
 114    switch (alu->op) {
 115    case nir_op_vec4:
 116    case nir_op_vec3:
 117    case nir_op_vec2:
 118    case nir_op_cube_face_coord:
 119    case nir_op_cube_face_index:
 120       /* We don't need to scalarize these ops, they're the ones generated to
 121        * group up outputs into a value that can be SSAed.
 122        */
 123       return NULL;
 124
 125    case nir_op_pack_half_2x16: {
 126       if (!b->shader->options->lower_pack_half_2x16)
 127          return NULL;
 128
 129       nir_ssa_def *src_vec2 = nir_ssa_for_alu_src(b, alu, 0);
 130       return nir_pack_half_2x16_split(b, nir_channel(b, src_vec2, 0),
 131                                          nir_channel(b, src_vec2, 1));
 132    }
 133
 134    case nir_op_unpack_unorm_4x8:
 135    case nir_op_unpack_snorm_4x8:
 136    case nir_op_unpack_unorm_2x16:
 137    case nir_op_unpack_snorm_2x16:
 138       /* There is no scalar version of these ops, unless we were to break it
 139        * down to bitshifts and math (which is definitely not intended).
 140        */
 141       return NULL;
 142
 143    case nir_op_unpack_half_2x16: {
 144       if (!b->shader->options->lower_unpack_half_2x16)
 145          return NULL;
 146
 147       nir_ssa_def *packed = nir_ssa_for_alu_src(b, alu, 0);
 148       return nir_vec2(b, nir_unpack_half_2x16_split_x(b, packed),
 149                          nir_unpack_half_2x16_split_y(b, packed));
 150    }
 151
 152    case nir_op_pack_uvec2_to_uint: {
 153       assert(b->shader->options->lower_pack_snorm_2x16 ||
 154              b->shader->options->lower_pack_unorm_2x16);
 155
 156       nir_ssa_def *word = nir_extract_u16(b, nir_ssa_for_alu_src(b, alu, 0),
 157                                              nir_imm_int(b, 0));
 158       return nir_ior(b, nir_ishl(b, nir_channel(b, word, 1),
 159                                     nir_imm_int(b, 16)),
 160                         nir_channel(b, word, 0));
 161    }
 162
 163    case nir_op_pack_uvec4_to_uint: {
 164       assert(b->shader->options->lower_pack_snorm_4x8 ||
 165              b->shader->options->lower_pack_unorm_4x8);
 166
 167       nir_ssa_def *byte = nir_extract_u8(b, nir_ssa_for_alu_src(b, alu, 0),
 168                                             nir_imm_int(b, 0));
 169       return nir_ior(b, nir_ior(b, nir_ishl(b, nir_channel(b, byte, 3),
 170                                                nir_imm_int(b, 24)),
 171                                    nir_ishl(b, nir_channel(b, byte, 2),
 172                                                nir_imm_int(b, 16))),
 173                         nir_ior(b, nir_ishl(b, nir_channel(b, byte, 1),
 174                                                nir_imm_int(b, 8)),
 175                                    nir_channel(b, byte, 0)));
 176    }
 177
 178    case nir_op_fdph: {
 179       nir_ssa_def *src0_vec = nir_ssa_for_alu_src(b, alu, 0);
 180       nir_ssa_def *src1_vec = nir_ssa_for_alu_src(b, alu, 1);
 181
 182       nir_ssa_def *sum[4];
 183       for (unsigned i = 0; i < 3; i++) {
 184          sum[i] = nir_fmul(b, nir_channel(b, src0_vec, i),
 185                               nir_channel(b, src1_vec, i));
 186       }
 187       sum[3] = nir_channel(b, src1_vec, 3);
 188
 189       return nir_fadd(b, nir_fadd(b, sum[0], sum[1]),
 190                          nir_fadd(b, sum[2], sum[3]));
 191    }
 192
 193    case nir_op_unpack_64_2x32:
 194    case nir_op_unpack_32_2x16:
 195       return NULL;
 196
 197       LOWER_REDUCTION(nir_op_fdot, nir_op_fmul, nir_op_fadd);
 198       LOWER_REDUCTION(nir_op_ball_fequal, nir_op_feq, nir_op_iand);
 199       LOWER_REDUCTION(nir_op_ball_iequal, nir_op_ieq, nir_op_iand);
 200       LOWER_REDUCTION(nir_op_bany_fnequal, nir_op_fne, nir_op_ior);
 201       LOWER_REDUCTION(nir_op_bany_inequal, nir_op_ine, nir_op_ior);
 202       LOWER_REDUCTION(nir_op_b32all_fequal, nir_op_feq32, nir_op_iand);
 203       LOWER_REDUCTION(nir_op_b32all_iequal, nir_op_ieq32, nir_op_iand);
 204       LOWER_REDUCTION(nir_op_b32any_fnequal, nir_op_fne32, nir_op_ior);
 205       LOWER_REDUCTION(nir_op_b32any_inequal, nir_op_ine32, nir_op_ior);
 206       LOWER_REDUCTION(nir_op_fall_equal, nir_op_seq, nir_op_fmin);
 207       LOWER_REDUCTION(nir_op_fany_nequal, nir_op_sne, nir_op_fmax);
 208
 209    default:
 210       break;
 211    }
 212
 213    if (alu->dest.dest.ssa.num_components == 1)
 214       return NULL;
 215
 216    unsigned num_components = alu->dest.dest.ssa.num_components;
 217    nir_ssa_def *comps[NIR_MAX_VEC_COMPONENTS] = { NULL };
 218
 219    for (chan = 0; chan < NIR_MAX_VEC_COMPONENTS; chan++) {
 220       if (!(alu->dest.write_mask & (1 << chan)))
 221          continue;
 222
 223       nir_alu_instr *lower = nir_alu_instr_create(b->shader, alu->op);
 224       for (i = 0; i < num_src; i++) {
 225          /* We only handle same-size-as-dest (input_sizes[] == 0) or scalar
 226           * args (input_sizes[] == 1).
 227           */
 228          assert(nir_op_infos[alu->op].input_sizes[i] < 2);
 229          unsigned src_chan = (nir_op_infos[alu->op].input_sizes[i] == 1 ?
 230                               0 : chan);
 231
 232          nir_alu_src_copy(&lower->src[i], &alu->src[i], lower);
 233          for (int j = 0; j < NIR_MAX_VEC_COMPONENTS; j++)
 234             lower->src[i].swizzle[j] = alu->src[i].swizzle[src_chan];
 235       }
 236
 237       nir_alu_ssa_dest_init(lower, 1, alu->dest.dest.ssa.bit_size);
 238       lower->dest.saturate = alu->dest.saturate;
 239       comps[chan] = &lower->dest.dest.ssa;
 240       lower->exact = alu->exact;
 241
 242       nir_builder_instr_insert(b, &lower->instr);
 243    }
 244
 245    return nir_vec(b, comps, num_components);
 246 }
 247
 248 bool
 249 nir_lower_alu_to_scalar(nir_shader *shader, BITSET_WORD *lower_set)
 250 {
 251    return nir_shader_lower_instructions(shader,
 252                                         inst_is_vector_alu,
 253                                         lower_alu_instr_scalar,
 254                                         lower_set);
 255 }