intel/nir: Extract add_const_offset_to_base
[mesa.git] / src / compiler / nir / nir_lower_io.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 * Jason Ekstrand (jason@jlekstrand.net)
26 *
27 */
28
29 /*
30 * This lowering pass converts references to input/output variables with
31 * loads/stores to actual input/output intrinsics.
32 */
33
34 #include "nir.h"
35 #include "nir_builder.h"
36 #include "nir_deref.h"
37
38 struct lower_io_state {
39 void *dead_ctx;
40 nir_builder builder;
41 int (*type_size)(const struct glsl_type *type, bool);
42 nir_variable_mode modes;
43 nir_lower_io_options options;
44 };
45
46 static nir_intrinsic_op
47 ssbo_atomic_for_deref(nir_intrinsic_op deref_op)
48 {
49 switch (deref_op) {
50 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_ssbo_##O;
51 OP(atomic_exchange)
52 OP(atomic_comp_swap)
53 OP(atomic_add)
54 OP(atomic_imin)
55 OP(atomic_umin)
56 OP(atomic_imax)
57 OP(atomic_umax)
58 OP(atomic_and)
59 OP(atomic_or)
60 OP(atomic_xor)
61 OP(atomic_fadd)
62 OP(atomic_fmin)
63 OP(atomic_fmax)
64 OP(atomic_fcomp_swap)
65 #undef OP
66 default:
67 unreachable("Invalid SSBO atomic");
68 }
69 }
70
71 static nir_intrinsic_op
72 global_atomic_for_deref(nir_intrinsic_op deref_op)
73 {
74 switch (deref_op) {
75 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_global_##O;
76 OP(atomic_exchange)
77 OP(atomic_comp_swap)
78 OP(atomic_add)
79 OP(atomic_imin)
80 OP(atomic_umin)
81 OP(atomic_imax)
82 OP(atomic_umax)
83 OP(atomic_and)
84 OP(atomic_or)
85 OP(atomic_xor)
86 OP(atomic_fadd)
87 OP(atomic_fmin)
88 OP(atomic_fmax)
89 OP(atomic_fcomp_swap)
90 #undef OP
91 default:
92 unreachable("Invalid SSBO atomic");
93 }
94 }
95
96 void
97 nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
98 int (*type_size)(const struct glsl_type *, bool))
99 {
100 unsigned location = 0;
101
102 nir_foreach_variable(var, var_list) {
103 /*
104 * UBOs have their own address spaces, so don't count them towards the
105 * number of global uniforms
106 */
107 if (var->data.mode == nir_var_mem_ubo || var->data.mode == nir_var_mem_ssbo)
108 continue;
109
110 var->data.driver_location = location;
111 bool bindless_type_size = var->data.mode == nir_var_shader_in ||
112 var->data.mode == nir_var_shader_out ||
113 var->data.bindless;
114 location += type_size(var->type, bindless_type_size);
115 }
116
117 *size = location;
118 }
119
120 /**
121 * Return true if the given variable is a per-vertex input/output array.
122 * (such as geometry shader inputs).
123 */
124 bool
125 nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage)
126 {
127 if (var->data.patch || !glsl_type_is_array(var->type))
128 return false;
129
130 if (var->data.mode == nir_var_shader_in)
131 return stage == MESA_SHADER_GEOMETRY ||
132 stage == MESA_SHADER_TESS_CTRL ||
133 stage == MESA_SHADER_TESS_EVAL;
134
135 if (var->data.mode == nir_var_shader_out)
136 return stage == MESA_SHADER_TESS_CTRL;
137
138 return false;
139 }
140
141 static nir_ssa_def *
142 get_io_offset(nir_builder *b, nir_deref_instr *deref,
143 nir_ssa_def **vertex_index,
144 int (*type_size)(const struct glsl_type *, bool),
145 unsigned *component, bool bts)
146 {
147 nir_deref_path path;
148 nir_deref_path_init(&path, deref, NULL);
149
150 assert(path.path[0]->deref_type == nir_deref_type_var);
151 nir_deref_instr **p = &path.path[1];
152
153 /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
154 * outermost array index separate. Process the rest normally.
155 */
156 if (vertex_index != NULL) {
157 assert((*p)->deref_type == nir_deref_type_array);
158 *vertex_index = nir_ssa_for_src(b, (*p)->arr.index, 1);
159 p++;
160 }
161
162 if (path.path[0]->var->data.compact) {
163 assert((*p)->deref_type == nir_deref_type_array);
164 assert(glsl_type_is_scalar((*p)->type));
165
166 /* We always lower indirect dereferences for "compact" array vars. */
167 const unsigned index = nir_src_as_uint((*p)->arr.index);
168 const unsigned total_offset = *component + index;
169 const unsigned slot_offset = total_offset / 4;
170 *component = total_offset % 4;
171 return nir_imm_int(b, type_size(glsl_vec4_type(), bts) * slot_offset);
172 }
173
174 /* Just emit code and let constant-folding go to town */
175 nir_ssa_def *offset = nir_imm_int(b, 0);
176
177 for (; *p; p++) {
178 if ((*p)->deref_type == nir_deref_type_array) {
179 unsigned size = type_size((*p)->type, bts);
180
181 nir_ssa_def *mul =
182 nir_imul_imm(b, nir_ssa_for_src(b, (*p)->arr.index, 1), size);
183
184 offset = nir_iadd(b, offset, mul);
185 } else if ((*p)->deref_type == nir_deref_type_struct) {
186 /* p starts at path[1], so this is safe */
187 nir_deref_instr *parent = *(p - 1);
188
189 unsigned field_offset = 0;
190 for (unsigned i = 0; i < (*p)->strct.index; i++) {
191 field_offset += type_size(glsl_get_struct_field(parent->type, i), bts);
192 }
193 offset = nir_iadd_imm(b, offset, field_offset);
194 } else {
195 unreachable("Unsupported deref type");
196 }
197 }
198
199 nir_deref_path_finish(&path);
200
201 return offset;
202 }
203
204 static nir_intrinsic_instr *
205 lower_load(nir_intrinsic_instr *intrin, struct lower_io_state *state,
206 nir_ssa_def *vertex_index, nir_variable *var, nir_ssa_def *offset,
207 unsigned component, const struct glsl_type *type)
208 {
209 const nir_shader *nir = state->builder.shader;
210 nir_variable_mode mode = var->data.mode;
211 nir_ssa_def *barycentric = NULL;
212
213 nir_intrinsic_op op;
214 switch (mode) {
215 case nir_var_shader_in:
216 if (nir->info.stage == MESA_SHADER_FRAGMENT &&
217 nir->options->use_interpolated_input_intrinsics &&
218 var->data.interpolation != INTERP_MODE_FLAT) {
219 assert(vertex_index == NULL);
220
221 nir_intrinsic_op bary_op;
222 if (var->data.sample ||
223 (state->options & nir_lower_io_force_sample_interpolation))
224 bary_op = nir_intrinsic_load_barycentric_sample;
225 else if (var->data.centroid)
226 bary_op = nir_intrinsic_load_barycentric_centroid;
227 else
228 bary_op = nir_intrinsic_load_barycentric_pixel;
229
230 barycentric = nir_load_barycentric(&state->builder, bary_op,
231 var->data.interpolation);
232 op = nir_intrinsic_load_interpolated_input;
233 } else {
234 op = vertex_index ? nir_intrinsic_load_per_vertex_input :
235 nir_intrinsic_load_input;
236 }
237 break;
238 case nir_var_shader_out:
239 op = vertex_index ? nir_intrinsic_load_per_vertex_output :
240 nir_intrinsic_load_output;
241 break;
242 case nir_var_uniform:
243 op = nir_intrinsic_load_uniform;
244 break;
245 case nir_var_mem_shared:
246 op = nir_intrinsic_load_shared;
247 break;
248 default:
249 unreachable("Unknown variable mode");
250 }
251
252 nir_intrinsic_instr *load =
253 nir_intrinsic_instr_create(state->builder.shader, op);
254 load->num_components = intrin->num_components;
255
256 nir_intrinsic_set_base(load, var->data.driver_location);
257 if (mode == nir_var_shader_in || mode == nir_var_shader_out)
258 nir_intrinsic_set_component(load, component);
259
260 if (load->intrinsic == nir_intrinsic_load_uniform)
261 nir_intrinsic_set_range(load,
262 state->type_size(var->type, var->data.bindless));
263
264 if (load->intrinsic == nir_intrinsic_load_input ||
265 load->intrinsic == nir_intrinsic_load_uniform)
266 nir_intrinsic_set_type(load, nir_get_nir_type_for_glsl_type(type));
267
268 if (vertex_index) {
269 load->src[0] = nir_src_for_ssa(vertex_index);
270 load->src[1] = nir_src_for_ssa(offset);
271 } else if (barycentric) {
272 load->src[0] = nir_src_for_ssa(barycentric);
273 load->src[1] = nir_src_for_ssa(offset);
274 } else {
275 load->src[0] = nir_src_for_ssa(offset);
276 }
277
278 return load;
279 }
280
281 static nir_intrinsic_instr *
282 lower_store(nir_intrinsic_instr *intrin, struct lower_io_state *state,
283 nir_ssa_def *vertex_index, nir_variable *var, nir_ssa_def *offset,
284 unsigned component, const struct glsl_type *type)
285 {
286 nir_variable_mode mode = var->data.mode;
287
288 nir_intrinsic_op op;
289 if (mode == nir_var_mem_shared) {
290 op = nir_intrinsic_store_shared;
291 } else {
292 assert(mode == nir_var_shader_out);
293 op = vertex_index ? nir_intrinsic_store_per_vertex_output :
294 nir_intrinsic_store_output;
295 }
296
297 nir_intrinsic_instr *store =
298 nir_intrinsic_instr_create(state->builder.shader, op);
299 store->num_components = intrin->num_components;
300
301 nir_src_copy(&store->src[0], &intrin->src[1], store);
302
303 nir_intrinsic_set_base(store, var->data.driver_location);
304
305 if (mode == nir_var_shader_out)
306 nir_intrinsic_set_component(store, component);
307
308 if (store->intrinsic == nir_intrinsic_store_output)
309 nir_intrinsic_set_type(store, nir_get_nir_type_for_glsl_type(type));
310
311 nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(intrin));
312
313 if (vertex_index)
314 store->src[1] = nir_src_for_ssa(vertex_index);
315
316 store->src[vertex_index ? 2 : 1] = nir_src_for_ssa(offset);
317
318 return store;
319 }
320
321 static nir_intrinsic_instr *
322 lower_atomic(nir_intrinsic_instr *intrin, struct lower_io_state *state,
323 nir_variable *var, nir_ssa_def *offset)
324 {
325 assert(var->data.mode == nir_var_mem_shared);
326
327 nir_intrinsic_op op;
328 switch (intrin->intrinsic) {
329 #define OP(O) case nir_intrinsic_deref_##O: op = nir_intrinsic_shared_##O; break;
330 OP(atomic_exchange)
331 OP(atomic_comp_swap)
332 OP(atomic_add)
333 OP(atomic_imin)
334 OP(atomic_umin)
335 OP(atomic_imax)
336 OP(atomic_umax)
337 OP(atomic_and)
338 OP(atomic_or)
339 OP(atomic_xor)
340 OP(atomic_fadd)
341 OP(atomic_fmin)
342 OP(atomic_fmax)
343 OP(atomic_fcomp_swap)
344 #undef OP
345 default:
346 unreachable("Invalid atomic");
347 }
348
349 nir_intrinsic_instr *atomic =
350 nir_intrinsic_instr_create(state->builder.shader, op);
351
352 nir_intrinsic_set_base(atomic, var->data.driver_location);
353
354 atomic->src[0] = nir_src_for_ssa(offset);
355 assert(nir_intrinsic_infos[intrin->intrinsic].num_srcs ==
356 nir_intrinsic_infos[op].num_srcs);
357 for (unsigned i = 1; i < nir_intrinsic_infos[op].num_srcs; i++) {
358 nir_src_copy(&atomic->src[i], &intrin->src[i], atomic);
359 }
360
361 return atomic;
362 }
363
364 static nir_intrinsic_instr *
365 lower_interpolate_at(nir_intrinsic_instr *intrin, struct lower_io_state *state,
366 nir_variable *var, nir_ssa_def *offset, unsigned component,
367 const struct glsl_type *type)
368 {
369 assert(var->data.mode == nir_var_shader_in);
370
371 /* Ignore interpolateAt() for flat variables - flat is flat. */
372 if (var->data.interpolation == INTERP_MODE_FLAT)
373 return lower_load(intrin, state, NULL, var, offset, component, type);
374
375 nir_intrinsic_op bary_op;
376 switch (intrin->intrinsic) {
377 case nir_intrinsic_interp_deref_at_centroid:
378 bary_op = (state->options & nir_lower_io_force_sample_interpolation) ?
379 nir_intrinsic_load_barycentric_sample :
380 nir_intrinsic_load_barycentric_centroid;
381 break;
382 case nir_intrinsic_interp_deref_at_sample:
383 bary_op = nir_intrinsic_load_barycentric_at_sample;
384 break;
385 case nir_intrinsic_interp_deref_at_offset:
386 bary_op = nir_intrinsic_load_barycentric_at_offset;
387 break;
388 default:
389 unreachable("Bogus interpolateAt() intrinsic.");
390 }
391
392 nir_intrinsic_instr *bary_setup =
393 nir_intrinsic_instr_create(state->builder.shader, bary_op);
394
395 nir_ssa_dest_init(&bary_setup->instr, &bary_setup->dest, 2, 32, NULL);
396 nir_intrinsic_set_interp_mode(bary_setup, var->data.interpolation);
397
398 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_sample ||
399 intrin->intrinsic == nir_intrinsic_interp_deref_at_offset)
400 nir_src_copy(&bary_setup->src[0], &intrin->src[1], bary_setup);
401
402 nir_builder_instr_insert(&state->builder, &bary_setup->instr);
403
404 nir_intrinsic_instr *load =
405 nir_intrinsic_instr_create(state->builder.shader,
406 nir_intrinsic_load_interpolated_input);
407 load->num_components = intrin->num_components;
408
409 nir_intrinsic_set_base(load, var->data.driver_location);
410 nir_intrinsic_set_component(load, component);
411
412 load->src[0] = nir_src_for_ssa(&bary_setup->dest.ssa);
413 load->src[1] = nir_src_for_ssa(offset);
414
415 return load;
416 }
417
418 static bool
419 nir_lower_io_block(nir_block *block,
420 struct lower_io_state *state)
421 {
422 nir_builder *b = &state->builder;
423 const nir_shader_compiler_options *options = b->shader->options;
424 bool progress = false;
425
426 nir_foreach_instr_safe(instr, block) {
427 if (instr->type != nir_instr_type_intrinsic)
428 continue;
429
430 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
431
432 switch (intrin->intrinsic) {
433 case nir_intrinsic_load_deref:
434 case nir_intrinsic_store_deref:
435 case nir_intrinsic_deref_atomic_add:
436 case nir_intrinsic_deref_atomic_imin:
437 case nir_intrinsic_deref_atomic_umin:
438 case nir_intrinsic_deref_atomic_imax:
439 case nir_intrinsic_deref_atomic_umax:
440 case nir_intrinsic_deref_atomic_and:
441 case nir_intrinsic_deref_atomic_or:
442 case nir_intrinsic_deref_atomic_xor:
443 case nir_intrinsic_deref_atomic_exchange:
444 case nir_intrinsic_deref_atomic_comp_swap:
445 case nir_intrinsic_deref_atomic_fadd:
446 case nir_intrinsic_deref_atomic_fmin:
447 case nir_intrinsic_deref_atomic_fmax:
448 case nir_intrinsic_deref_atomic_fcomp_swap:
449 /* We can lower the io for this nir instrinsic */
450 break;
451 case nir_intrinsic_interp_deref_at_centroid:
452 case nir_intrinsic_interp_deref_at_sample:
453 case nir_intrinsic_interp_deref_at_offset:
454 /* We can optionally lower these to load_interpolated_input */
455 if (options->use_interpolated_input_intrinsics)
456 break;
457 default:
458 /* We can't lower the io for this nir instrinsic, so skip it */
459 continue;
460 }
461
462 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
463
464 nir_variable *var = nir_deref_instr_get_variable(deref);
465 nir_variable_mode mode = var->data.mode;
466
467 if ((state->modes & mode) == 0)
468 continue;
469
470 if (mode != nir_var_shader_in &&
471 mode != nir_var_shader_out &&
472 mode != nir_var_mem_shared &&
473 mode != nir_var_uniform)
474 continue;
475
476 b->cursor = nir_before_instr(instr);
477
478 const bool per_vertex = nir_is_per_vertex_io(var, b->shader->info.stage);
479
480 nir_ssa_def *offset;
481 nir_ssa_def *vertex_index = NULL;
482 unsigned component_offset = var->data.location_frac;
483 bool bindless_type_size = mode == nir_var_shader_in ||
484 mode == nir_var_shader_out ||
485 var->data.bindless;
486
487 offset = get_io_offset(b, deref, per_vertex ? &vertex_index : NULL,
488 state->type_size, &component_offset,
489 bindless_type_size);
490
491 nir_intrinsic_instr *replacement;
492
493 switch (intrin->intrinsic) {
494 case nir_intrinsic_load_deref:
495 replacement = lower_load(intrin, state, vertex_index, var, offset,
496 component_offset, deref->type);
497 break;
498
499 case nir_intrinsic_store_deref:
500 replacement = lower_store(intrin, state, vertex_index, var, offset,
501 component_offset, deref->type);
502 break;
503
504 case nir_intrinsic_deref_atomic_add:
505 case nir_intrinsic_deref_atomic_imin:
506 case nir_intrinsic_deref_atomic_umin:
507 case nir_intrinsic_deref_atomic_imax:
508 case nir_intrinsic_deref_atomic_umax:
509 case nir_intrinsic_deref_atomic_and:
510 case nir_intrinsic_deref_atomic_or:
511 case nir_intrinsic_deref_atomic_xor:
512 case nir_intrinsic_deref_atomic_exchange:
513 case nir_intrinsic_deref_atomic_comp_swap:
514 case nir_intrinsic_deref_atomic_fadd:
515 case nir_intrinsic_deref_atomic_fmin:
516 case nir_intrinsic_deref_atomic_fmax:
517 case nir_intrinsic_deref_atomic_fcomp_swap:
518 assert(vertex_index == NULL);
519 replacement = lower_atomic(intrin, state, var, offset);
520 break;
521
522 case nir_intrinsic_interp_deref_at_centroid:
523 case nir_intrinsic_interp_deref_at_sample:
524 case nir_intrinsic_interp_deref_at_offset:
525 assert(vertex_index == NULL);
526 replacement = lower_interpolate_at(intrin, state, var, offset,
527 component_offset, deref->type);
528 break;
529
530 default:
531 continue;
532 }
533
534 if (nir_intrinsic_infos[intrin->intrinsic].has_dest) {
535 if (intrin->dest.is_ssa) {
536 nir_ssa_dest_init(&replacement->instr, &replacement->dest,
537 intrin->dest.ssa.num_components,
538 intrin->dest.ssa.bit_size, NULL);
539 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
540 nir_src_for_ssa(&replacement->dest.ssa));
541 } else {
542 nir_dest_copy(&replacement->dest, &intrin->dest, &intrin->instr);
543 }
544 }
545
546 nir_instr_insert_before(&intrin->instr, &replacement->instr);
547 nir_instr_remove(&intrin->instr);
548 progress = true;
549 }
550
551 return progress;
552 }
553
554 static bool
555 nir_lower_io_impl(nir_function_impl *impl,
556 nir_variable_mode modes,
557 int (*type_size)(const struct glsl_type *, bool),
558 nir_lower_io_options options)
559 {
560 struct lower_io_state state;
561 bool progress = false;
562
563 nir_builder_init(&state.builder, impl);
564 state.dead_ctx = ralloc_context(NULL);
565 state.modes = modes;
566 state.type_size = type_size;
567 state.options = options;
568
569 nir_foreach_block(block, impl) {
570 progress |= nir_lower_io_block(block, &state);
571 }
572
573 ralloc_free(state.dead_ctx);
574
575 nir_metadata_preserve(impl, nir_metadata_block_index |
576 nir_metadata_dominance);
577 return progress;
578 }
579
580 bool
581 nir_lower_io(nir_shader *shader, nir_variable_mode modes,
582 int (*type_size)(const struct glsl_type *, bool),
583 nir_lower_io_options options)
584 {
585 bool progress = false;
586
587 nir_foreach_function(function, shader) {
588 if (function->impl) {
589 progress |= nir_lower_io_impl(function->impl, modes,
590 type_size, options);
591 }
592 }
593
594 return progress;
595 }
596
597 static unsigned
598 type_scalar_size_bytes(const struct glsl_type *type)
599 {
600 assert(glsl_type_is_vector_or_scalar(type) ||
601 glsl_type_is_matrix(type));
602 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
603 }
604
605 static nir_ssa_def *
606 build_addr_iadd(nir_builder *b, nir_ssa_def *addr,
607 nir_address_format addr_format, nir_ssa_def *offset)
608 {
609 assert(offset->num_components == 1);
610 assert(addr->bit_size == offset->bit_size);
611
612 switch (addr_format) {
613 case nir_address_format_32bit_global:
614 case nir_address_format_64bit_global:
615 case nir_address_format_32bit_offset:
616 assert(addr->num_components == 1);
617 return nir_iadd(b, addr, offset);
618
619 case nir_address_format_64bit_bounded_global:
620 assert(addr->num_components == 4);
621 return nir_vec4(b, nir_channel(b, addr, 0),
622 nir_channel(b, addr, 1),
623 nir_channel(b, addr, 2),
624 nir_iadd(b, nir_channel(b, addr, 3), offset));
625
626 case nir_address_format_32bit_index_offset:
627 assert(addr->num_components == 2);
628 return nir_vec2(b, nir_channel(b, addr, 0),
629 nir_iadd(b, nir_channel(b, addr, 1), offset));
630 case nir_address_format_logical:
631 unreachable("Unsupported address format");
632 }
633 unreachable("Invalid address format");
634 }
635
636 static nir_ssa_def *
637 build_addr_iadd_imm(nir_builder *b, nir_ssa_def *addr,
638 nir_address_format addr_format, int64_t offset)
639 {
640 return build_addr_iadd(b, addr, addr_format,
641 nir_imm_intN_t(b, offset, addr->bit_size));
642 }
643
644 static nir_ssa_def *
645 addr_to_index(nir_builder *b, nir_ssa_def *addr,
646 nir_address_format addr_format)
647 {
648 assert(addr_format == nir_address_format_32bit_index_offset);
649 assert(addr->num_components == 2);
650 return nir_channel(b, addr, 0);
651 }
652
653 static nir_ssa_def *
654 addr_to_offset(nir_builder *b, nir_ssa_def *addr,
655 nir_address_format addr_format)
656 {
657 assert(addr_format == nir_address_format_32bit_index_offset);
658 assert(addr->num_components == 2);
659 return nir_channel(b, addr, 1);
660 }
661
662 /** Returns true if the given address format resolves to a global address */
663 static bool
664 addr_format_is_global(nir_address_format addr_format)
665 {
666 return addr_format == nir_address_format_32bit_global ||
667 addr_format == nir_address_format_64bit_global ||
668 addr_format == nir_address_format_64bit_bounded_global;
669 }
670
671 static nir_ssa_def *
672 addr_to_global(nir_builder *b, nir_ssa_def *addr,
673 nir_address_format addr_format)
674 {
675 switch (addr_format) {
676 case nir_address_format_32bit_global:
677 case nir_address_format_64bit_global:
678 assert(addr->num_components == 1);
679 return addr;
680
681 case nir_address_format_64bit_bounded_global:
682 assert(addr->num_components == 4);
683 return nir_iadd(b, nir_pack_64_2x32(b, nir_channels(b, addr, 0x3)),
684 nir_u2u64(b, nir_channel(b, addr, 3)));
685
686 case nir_address_format_32bit_index_offset:
687 case nir_address_format_32bit_offset:
688 case nir_address_format_logical:
689 unreachable("Cannot get a 64-bit address with this address format");
690 }
691
692 unreachable("Invalid address format");
693 }
694
695 static bool
696 addr_format_needs_bounds_check(nir_address_format addr_format)
697 {
698 return addr_format == nir_address_format_64bit_bounded_global;
699 }
700
701 static nir_ssa_def *
702 addr_is_in_bounds(nir_builder *b, nir_ssa_def *addr,
703 nir_address_format addr_format, unsigned size)
704 {
705 assert(addr_format == nir_address_format_64bit_bounded_global);
706 assert(addr->num_components == 4);
707 return nir_ige(b, nir_channel(b, addr, 2),
708 nir_iadd_imm(b, nir_channel(b, addr, 3), size));
709 }
710
711 static nir_ssa_def *
712 build_explicit_io_load(nir_builder *b, nir_intrinsic_instr *intrin,
713 nir_ssa_def *addr, nir_address_format addr_format,
714 unsigned num_components)
715 {
716 nir_variable_mode mode = nir_src_as_deref(intrin->src[0])->mode;
717
718 nir_intrinsic_op op;
719 switch (mode) {
720 case nir_var_mem_ubo:
721 op = nir_intrinsic_load_ubo;
722 break;
723 case nir_var_mem_ssbo:
724 if (addr_format_is_global(addr_format))
725 op = nir_intrinsic_load_global;
726 else
727 op = nir_intrinsic_load_ssbo;
728 break;
729 case nir_var_mem_global:
730 assert(addr_format_is_global(addr_format));
731 op = nir_intrinsic_load_global;
732 break;
733 case nir_var_shader_in:
734 assert(addr_format_is_global(addr_format));
735 op = nir_intrinsic_load_kernel_input;
736 break;
737 default:
738 unreachable("Unsupported explicit IO variable mode");
739 }
740
741 nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, op);
742
743 if (addr_format_is_global(addr_format)) {
744 load->src[0] = nir_src_for_ssa(addr_to_global(b, addr, addr_format));
745 } else {
746 load->src[0] = nir_src_for_ssa(addr_to_index(b, addr, addr_format));
747 load->src[1] = nir_src_for_ssa(addr_to_offset(b, addr, addr_format));
748 }
749
750 if (mode != nir_var_mem_ubo && mode != nir_var_shader_in)
751 nir_intrinsic_set_access(load, nir_intrinsic_access(intrin));
752
753 /* TODO: We should try and provide a better alignment. For OpenCL, we need
754 * to plumb the alignment through from SPIR-V when we have one.
755 */
756 nir_intrinsic_set_align(load, intrin->dest.ssa.bit_size / 8, 0);
757
758 assert(intrin->dest.is_ssa);
759 load->num_components = num_components;
760 nir_ssa_dest_init(&load->instr, &load->dest, num_components,
761 intrin->dest.ssa.bit_size, intrin->dest.ssa.name);
762
763 assert(load->dest.ssa.bit_size % 8 == 0);
764
765 if (addr_format_needs_bounds_check(addr_format)) {
766 /* The Vulkan spec for robustBufferAccess gives us quite a few options
767 * as to what we can do with an OOB read. Unfortunately, returning
768 * undefined values isn't one of them so we return an actual zero.
769 */
770 nir_ssa_def *zero = nir_imm_zero(b, load->num_components,
771 load->dest.ssa.bit_size);
772
773 const unsigned load_size =
774 (load->dest.ssa.bit_size / 8) * load->num_components;
775 nir_push_if(b, addr_is_in_bounds(b, addr, addr_format, load_size));
776
777 nir_builder_instr_insert(b, &load->instr);
778
779 nir_pop_if(b, NULL);
780
781 return nir_if_phi(b, &load->dest.ssa, zero);
782 } else {
783 nir_builder_instr_insert(b, &load->instr);
784 return &load->dest.ssa;
785 }
786 }
787
788 static void
789 build_explicit_io_store(nir_builder *b, nir_intrinsic_instr *intrin,
790 nir_ssa_def *addr, nir_address_format addr_format,
791 nir_ssa_def *value, nir_component_mask_t write_mask)
792 {
793 nir_variable_mode mode = nir_src_as_deref(intrin->src[0])->mode;
794
795 nir_intrinsic_op op;
796 switch (mode) {
797 case nir_var_mem_ssbo:
798 if (addr_format_is_global(addr_format))
799 op = nir_intrinsic_store_global;
800 else
801 op = nir_intrinsic_store_ssbo;
802 break;
803 case nir_var_mem_global:
804 assert(addr_format_is_global(addr_format));
805 op = nir_intrinsic_store_global;
806 break;
807 default:
808 unreachable("Unsupported explicit IO variable mode");
809 }
810
811 nir_intrinsic_instr *store = nir_intrinsic_instr_create(b->shader, op);
812
813 store->src[0] = nir_src_for_ssa(value);
814 if (addr_format_is_global(addr_format)) {
815 store->src[1] = nir_src_for_ssa(addr_to_global(b, addr, addr_format));
816 } else {
817 store->src[1] = nir_src_for_ssa(addr_to_index(b, addr, addr_format));
818 store->src[2] = nir_src_for_ssa(addr_to_offset(b, addr, addr_format));
819 }
820
821 nir_intrinsic_set_write_mask(store, write_mask);
822
823 nir_intrinsic_set_access(store, nir_intrinsic_access(intrin));
824
825 /* TODO: We should try and provide a better alignment. For OpenCL, we need
826 * to plumb the alignment through from SPIR-V when we have one.
827 */
828 nir_intrinsic_set_align(store, value->bit_size / 8, 0);
829
830 assert(value->num_components == 1 ||
831 value->num_components == intrin->num_components);
832 store->num_components = value->num_components;
833
834 assert(value->bit_size % 8 == 0);
835
836 if (addr_format_needs_bounds_check(addr_format)) {
837 const unsigned store_size = (value->bit_size / 8) * store->num_components;
838 nir_push_if(b, addr_is_in_bounds(b, addr, addr_format, store_size));
839
840 nir_builder_instr_insert(b, &store->instr);
841
842 nir_pop_if(b, NULL);
843 } else {
844 nir_builder_instr_insert(b, &store->instr);
845 }
846 }
847
848 static nir_ssa_def *
849 build_explicit_io_atomic(nir_builder *b, nir_intrinsic_instr *intrin,
850 nir_ssa_def *addr, nir_address_format addr_format)
851 {
852 nir_variable_mode mode = nir_src_as_deref(intrin->src[0])->mode;
853 const unsigned num_data_srcs =
854 nir_intrinsic_infos[intrin->intrinsic].num_srcs - 1;
855
856 nir_intrinsic_op op;
857 switch (mode) {
858 case nir_var_mem_ssbo:
859 if (addr_format_is_global(addr_format))
860 op = global_atomic_for_deref(intrin->intrinsic);
861 else
862 op = ssbo_atomic_for_deref(intrin->intrinsic);
863 break;
864 case nir_var_mem_global:
865 assert(addr_format_is_global(addr_format));
866 op = global_atomic_for_deref(intrin->intrinsic);
867 break;
868 default:
869 unreachable("Unsupported explicit IO variable mode");
870 }
871
872 nir_intrinsic_instr *atomic = nir_intrinsic_instr_create(b->shader, op);
873
874 unsigned src = 0;
875 if (addr_format_is_global(addr_format)) {
876 atomic->src[src++] = nir_src_for_ssa(addr_to_global(b, addr, addr_format));
877 } else {
878 atomic->src[src++] = nir_src_for_ssa(addr_to_index(b, addr, addr_format));
879 atomic->src[src++] = nir_src_for_ssa(addr_to_offset(b, addr, addr_format));
880 }
881 for (unsigned i = 0; i < num_data_srcs; i++) {
882 atomic->src[src++] = nir_src_for_ssa(intrin->src[1 + i].ssa);
883 }
884
885 /* Global atomics don't have access flags because they assume that the
886 * address may be non-uniform.
887 */
888 if (!addr_format_is_global(addr_format))
889 nir_intrinsic_set_access(atomic, nir_intrinsic_access(intrin));
890
891 assert(intrin->dest.ssa.num_components == 1);
892 nir_ssa_dest_init(&atomic->instr, &atomic->dest,
893 1, intrin->dest.ssa.bit_size, intrin->dest.ssa.name);
894
895 assert(atomic->dest.ssa.bit_size % 8 == 0);
896
897 if (addr_format_needs_bounds_check(addr_format)) {
898 const unsigned atomic_size = atomic->dest.ssa.bit_size / 8;
899 nir_push_if(b, addr_is_in_bounds(b, addr, addr_format, atomic_size));
900
901 nir_builder_instr_insert(b, &atomic->instr);
902
903 nir_pop_if(b, NULL);
904 return nir_if_phi(b, &atomic->dest.ssa,
905 nir_ssa_undef(b, 1, atomic->dest.ssa.bit_size));
906 } else {
907 nir_builder_instr_insert(b, &atomic->instr);
908 return &atomic->dest.ssa;
909 }
910 }
911
912 nir_ssa_def *
913 nir_explicit_io_address_from_deref(nir_builder *b, nir_deref_instr *deref,
914 nir_ssa_def *base_addr,
915 nir_address_format addr_format)
916 {
917 assert(deref->dest.is_ssa);
918 switch (deref->deref_type) {
919 case nir_deref_type_var:
920 assert(deref->mode == nir_var_shader_in);
921 return nir_imm_intN_t(b, deref->var->data.driver_location,
922 deref->dest.ssa.bit_size);
923
924 case nir_deref_type_array: {
925 nir_deref_instr *parent = nir_deref_instr_parent(deref);
926
927 unsigned stride = glsl_get_explicit_stride(parent->type);
928 if ((glsl_type_is_matrix(parent->type) &&
929 glsl_matrix_type_is_row_major(parent->type)) ||
930 (glsl_type_is_vector(parent->type) && stride == 0))
931 stride = type_scalar_size_bytes(parent->type);
932
933 assert(stride > 0);
934
935 nir_ssa_def *index = nir_ssa_for_src(b, deref->arr.index, 1);
936 index = nir_i2i(b, index, base_addr->bit_size);
937 return build_addr_iadd(b, base_addr, addr_format,
938 nir_imul_imm(b, index, stride));
939 }
940
941 case nir_deref_type_ptr_as_array: {
942 nir_ssa_def *index = nir_ssa_for_src(b, deref->arr.index, 1);
943 index = nir_i2i(b, index, base_addr->bit_size);
944 unsigned stride = nir_deref_instr_ptr_as_array_stride(deref);
945 return build_addr_iadd(b, base_addr, addr_format,
946 nir_imul_imm(b, index, stride));
947 }
948
949 case nir_deref_type_array_wildcard:
950 unreachable("Wildcards should be lowered by now");
951 break;
952
953 case nir_deref_type_struct: {
954 nir_deref_instr *parent = nir_deref_instr_parent(deref);
955 int offset = glsl_get_struct_field_offset(parent->type,
956 deref->strct.index);
957 assert(offset >= 0);
958 return build_addr_iadd_imm(b, base_addr, addr_format, offset);
959 }
960
961 case nir_deref_type_cast:
962 /* Nothing to do here */
963 return base_addr;
964 }
965
966 unreachable("Invalid NIR deref type");
967 }
968
969 void
970 nir_lower_explicit_io_instr(nir_builder *b,
971 nir_intrinsic_instr *intrin,
972 nir_ssa_def *addr,
973 nir_address_format addr_format)
974 {
975 b->cursor = nir_after_instr(&intrin->instr);
976
977 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
978 unsigned vec_stride = glsl_get_explicit_stride(deref->type);
979 unsigned scalar_size = type_scalar_size_bytes(deref->type);
980 assert(vec_stride == 0 || glsl_type_is_vector(deref->type));
981 assert(vec_stride == 0 || vec_stride >= scalar_size);
982
983 if (intrin->intrinsic == nir_intrinsic_load_deref) {
984 nir_ssa_def *value;
985 if (vec_stride > scalar_size) {
986 nir_ssa_def *comps[4] = { NULL, };
987 for (unsigned i = 0; i < intrin->num_components; i++) {
988 nir_ssa_def *comp_addr = build_addr_iadd_imm(b, addr, addr_format,
989 vec_stride * i);
990 comps[i] = build_explicit_io_load(b, intrin, comp_addr,
991 addr_format, 1);
992 }
993 value = nir_vec(b, comps, intrin->num_components);
994 } else {
995 value = build_explicit_io_load(b, intrin, addr, addr_format,
996 intrin->num_components);
997 }
998 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(value));
999 } else if (intrin->intrinsic == nir_intrinsic_store_deref) {
1000 assert(intrin->src[1].is_ssa);
1001 nir_ssa_def *value = intrin->src[1].ssa;
1002 nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin);
1003 if (vec_stride > scalar_size) {
1004 for (unsigned i = 0; i < intrin->num_components; i++) {
1005 if (!(write_mask & (1 << i)))
1006 continue;
1007
1008 nir_ssa_def *comp_addr = build_addr_iadd_imm(b, addr, addr_format,
1009 vec_stride * i);
1010 build_explicit_io_store(b, intrin, comp_addr, addr_format,
1011 nir_channel(b, value, i), 1);
1012 }
1013 } else {
1014 build_explicit_io_store(b, intrin, addr, addr_format,
1015 value, write_mask);
1016 }
1017 } else {
1018 nir_ssa_def *value =
1019 build_explicit_io_atomic(b, intrin, addr, addr_format);
1020 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(value));
1021 }
1022
1023 nir_instr_remove(&intrin->instr);
1024 }
1025
1026 static void
1027 lower_explicit_io_deref(nir_builder *b, nir_deref_instr *deref,
1028 nir_address_format addr_format)
1029 {
1030 /* Just delete the deref if it's not used. We can't use
1031 * nir_deref_instr_remove_if_unused here because it may remove more than
1032 * one deref which could break our list walking since we walk the list
1033 * backwards.
1034 */
1035 assert(list_empty(&deref->dest.ssa.if_uses));
1036 if (list_empty(&deref->dest.ssa.uses)) {
1037 nir_instr_remove(&deref->instr);
1038 return;
1039 }
1040
1041 b->cursor = nir_after_instr(&deref->instr);
1042
1043 nir_ssa_def *base_addr = NULL;
1044 if (deref->deref_type != nir_deref_type_var) {
1045 assert(deref->parent.is_ssa);
1046 base_addr = deref->parent.ssa;
1047 }
1048
1049 nir_ssa_def *addr = nir_explicit_io_address_from_deref(b, deref, base_addr,
1050 addr_format);
1051
1052 nir_instr_remove(&deref->instr);
1053 nir_ssa_def_rewrite_uses(&deref->dest.ssa, nir_src_for_ssa(addr));
1054 }
1055
1056 static void
1057 lower_explicit_io_access(nir_builder *b, nir_intrinsic_instr *intrin,
1058 nir_address_format addr_format)
1059 {
1060 assert(intrin->src[0].is_ssa);
1061 nir_lower_explicit_io_instr(b, intrin, intrin->src[0].ssa, addr_format);
1062 }
1063
1064 static void
1065 lower_explicit_io_array_length(nir_builder *b, nir_intrinsic_instr *intrin,
1066 nir_address_format addr_format)
1067 {
1068 b->cursor = nir_after_instr(&intrin->instr);
1069
1070 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
1071
1072 assert(glsl_type_is_array(deref->type));
1073 assert(glsl_get_length(deref->type) == 0);
1074 unsigned stride = glsl_get_explicit_stride(deref->type);
1075 assert(stride > 0);
1076
1077 assert(addr_format == nir_address_format_32bit_index_offset);
1078 nir_ssa_def *addr = &deref->dest.ssa;
1079 nir_ssa_def *index = addr_to_index(b, addr, addr_format);
1080 nir_ssa_def *offset = addr_to_offset(b, addr, addr_format);
1081
1082 nir_intrinsic_instr *bsize =
1083 nir_intrinsic_instr_create(b->shader, nir_intrinsic_get_buffer_size);
1084 bsize->src[0] = nir_src_for_ssa(index);
1085 nir_ssa_dest_init(&bsize->instr, &bsize->dest, 1, 32, NULL);
1086 nir_builder_instr_insert(b, &bsize->instr);
1087
1088 nir_ssa_def *arr_size =
1089 nir_idiv(b, nir_isub(b, &bsize->dest.ssa, offset),
1090 nir_imm_int(b, stride));
1091
1092 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(arr_size));
1093 nir_instr_remove(&intrin->instr);
1094 }
1095
1096 static bool
1097 nir_lower_explicit_io_impl(nir_function_impl *impl, nir_variable_mode modes,
1098 nir_address_format addr_format)
1099 {
1100 bool progress = false;
1101
1102 nir_builder b;
1103 nir_builder_init(&b, impl);
1104
1105 /* Walk in reverse order so that we can see the full deref chain when we
1106 * lower the access operations. We lower them assuming that the derefs
1107 * will be turned into address calculations later.
1108 */
1109 nir_foreach_block_reverse(block, impl) {
1110 nir_foreach_instr_reverse_safe(instr, block) {
1111 switch (instr->type) {
1112 case nir_instr_type_deref: {
1113 nir_deref_instr *deref = nir_instr_as_deref(instr);
1114 if (deref->mode & modes) {
1115 lower_explicit_io_deref(&b, deref, addr_format);
1116 progress = true;
1117 }
1118 break;
1119 }
1120
1121 case nir_instr_type_intrinsic: {
1122 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1123 switch (intrin->intrinsic) {
1124 case nir_intrinsic_load_deref:
1125 case nir_intrinsic_store_deref:
1126 case nir_intrinsic_deref_atomic_add:
1127 case nir_intrinsic_deref_atomic_imin:
1128 case nir_intrinsic_deref_atomic_umin:
1129 case nir_intrinsic_deref_atomic_imax:
1130 case nir_intrinsic_deref_atomic_umax:
1131 case nir_intrinsic_deref_atomic_and:
1132 case nir_intrinsic_deref_atomic_or:
1133 case nir_intrinsic_deref_atomic_xor:
1134 case nir_intrinsic_deref_atomic_exchange:
1135 case nir_intrinsic_deref_atomic_comp_swap:
1136 case nir_intrinsic_deref_atomic_fadd:
1137 case nir_intrinsic_deref_atomic_fmin:
1138 case nir_intrinsic_deref_atomic_fmax:
1139 case nir_intrinsic_deref_atomic_fcomp_swap: {
1140 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
1141 if (deref->mode & modes) {
1142 lower_explicit_io_access(&b, intrin, addr_format);
1143 progress = true;
1144 }
1145 break;
1146 }
1147
1148 case nir_intrinsic_deref_buffer_array_length: {
1149 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
1150 if (deref->mode & modes) {
1151 lower_explicit_io_array_length(&b, intrin, addr_format);
1152 progress = true;
1153 }
1154 break;
1155 }
1156
1157 default:
1158 break;
1159 }
1160 break;
1161 }
1162
1163 default:
1164 /* Nothing to do */
1165 break;
1166 }
1167 }
1168 }
1169
1170 if (progress) {
1171 nir_metadata_preserve(impl, nir_metadata_block_index |
1172 nir_metadata_dominance);
1173 }
1174
1175 return progress;
1176 }
1177
1178 bool
1179 nir_lower_explicit_io(nir_shader *shader, nir_variable_mode modes,
1180 nir_address_format addr_format)
1181 {
1182 bool progress = false;
1183
1184 nir_foreach_function(function, shader) {
1185 if (function->impl &&
1186 nir_lower_explicit_io_impl(function->impl, modes, addr_format))
1187 progress = true;
1188 }
1189
1190 return progress;
1191 }
1192
1193 /**
1194 * Return the offset source for a load/store intrinsic.
1195 */
1196 nir_src *
1197 nir_get_io_offset_src(nir_intrinsic_instr *instr)
1198 {
1199 switch (instr->intrinsic) {
1200 case nir_intrinsic_load_input:
1201 case nir_intrinsic_load_output:
1202 case nir_intrinsic_load_shared:
1203 case nir_intrinsic_load_uniform:
1204 case nir_intrinsic_load_global:
1205 case nir_intrinsic_load_scratch:
1206 case nir_intrinsic_load_fs_input_interp_deltas:
1207 return &instr->src[0];
1208 case nir_intrinsic_load_ubo:
1209 case nir_intrinsic_load_ssbo:
1210 case nir_intrinsic_load_per_vertex_input:
1211 case nir_intrinsic_load_per_vertex_output:
1212 case nir_intrinsic_load_interpolated_input:
1213 case nir_intrinsic_store_output:
1214 case nir_intrinsic_store_shared:
1215 case nir_intrinsic_store_global:
1216 case nir_intrinsic_store_scratch:
1217 return &instr->src[1];
1218 case nir_intrinsic_store_ssbo:
1219 case nir_intrinsic_store_per_vertex_output:
1220 return &instr->src[2];
1221 default:
1222 return NULL;
1223 }
1224 }
1225
1226 /**
1227 * Return the vertex index source for a load/store per_vertex intrinsic.
1228 */
1229 nir_src *
1230 nir_get_io_vertex_index_src(nir_intrinsic_instr *instr)
1231 {
1232 switch (instr->intrinsic) {
1233 case nir_intrinsic_load_per_vertex_input:
1234 case nir_intrinsic_load_per_vertex_output:
1235 return &instr->src[0];
1236 case nir_intrinsic_store_per_vertex_output:
1237 return &instr->src[1];
1238 default:
1239 return NULL;
1240 }
1241 }
1242
1243 /**
1244 * Return the numeric constant that identify a NULL pointer for each address
1245 * format.
1246 */
1247 const nir_const_value *
1248 nir_address_format_null_value(nir_address_format addr_format)
1249 {
1250 const static nir_const_value null_values[][NIR_MAX_VEC_COMPONENTS] = {
1251 [nir_address_format_32bit_global] = {{0}},
1252 [nir_address_format_64bit_global] = {{0}},
1253 [nir_address_format_64bit_bounded_global] = {{0}},
1254 [nir_address_format_32bit_index_offset] = {{.u32 = ~0}, {.u32 = ~0}},
1255 [nir_address_format_32bit_offset] = {{.u32 = ~0}},
1256 [nir_address_format_logical] = {{.u32 = ~0}},
1257 };
1258
1259 assert(addr_format < ARRAY_SIZE(null_values));
1260 return null_values[addr_format];
1261 }
1262
1263 nir_ssa_def *
1264 nir_build_addr_ieq(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
1265 nir_address_format addr_format)
1266 {
1267 switch (addr_format) {
1268 case nir_address_format_32bit_global:
1269 case nir_address_format_64bit_global:
1270 case nir_address_format_64bit_bounded_global:
1271 case nir_address_format_32bit_index_offset:
1272 case nir_address_format_32bit_offset:
1273 return nir_ball_iequal(b, addr0, addr1);
1274
1275 case nir_address_format_logical:
1276 unreachable("Unsupported address format");
1277 }
1278
1279 unreachable("Invalid address format");
1280 }
1281
1282 nir_ssa_def *
1283 nir_build_addr_isub(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
1284 nir_address_format addr_format)
1285 {
1286 switch (addr_format) {
1287 case nir_address_format_32bit_global:
1288 case nir_address_format_64bit_global:
1289 case nir_address_format_32bit_offset:
1290 assert(addr0->num_components == 1);
1291 assert(addr1->num_components == 1);
1292 return nir_isub(b, addr0, addr1);
1293
1294 case nir_address_format_64bit_bounded_global:
1295 return nir_isub(b, addr_to_global(b, addr0, addr_format),
1296 addr_to_global(b, addr1, addr_format));
1297
1298 case nir_address_format_32bit_index_offset:
1299 assert(addr0->num_components == 2);
1300 assert(addr1->num_components == 2);
1301 /* Assume the same buffer index. */
1302 return nir_isub(b, nir_channel(b, addr0, 1), nir_channel(b, addr1, 1));
1303
1304 case nir_address_format_logical:
1305 unreachable("Unsupported address format");
1306 }
1307
1308 unreachable("Invalid address format");
1309 }
1310
1311 static bool
1312 is_input(nir_intrinsic_instr *intrin)
1313 {
1314 return intrin->intrinsic == nir_intrinsic_load_input ||
1315 intrin->intrinsic == nir_intrinsic_load_per_vertex_input ||
1316 intrin->intrinsic == nir_intrinsic_load_interpolated_input ||
1317 intrin->intrinsic == nir_intrinsic_load_fs_input_interp_deltas;
1318 }
1319
1320 static bool
1321 is_output(nir_intrinsic_instr *intrin)
1322 {
1323 return intrin->intrinsic == nir_intrinsic_load_output ||
1324 intrin->intrinsic == nir_intrinsic_load_per_vertex_output ||
1325 intrin->intrinsic == nir_intrinsic_store_output ||
1326 intrin->intrinsic == nir_intrinsic_store_per_vertex_output;
1327 }
1328
1329
1330 /**
1331 * This pass adds constant offsets to instr->const_index[0] for input/output
1332 * intrinsics, and resets the offset source to 0. Non-constant offsets remain
1333 * unchanged - since we don't know what part of a compound variable is
1334 * accessed, we allocate storage for the entire thing. For drivers that use
1335 * nir_lower_io_to_temporaries() before nir_lower_io(), this guarantees that
1336 * the offset source will be 0, so that they don't have to add it in manually.
1337 */
1338
1339 static bool
1340 add_const_offset_to_base_block(nir_block *block, nir_builder *b,
1341 nir_variable_mode mode)
1342 {
1343 bool progress = false;
1344 nir_foreach_instr_safe(instr, block) {
1345 if (instr->type != nir_instr_type_intrinsic)
1346 continue;
1347
1348 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1349
1350 if ((mode == nir_var_shader_in && is_input(intrin)) ||
1351 (mode == nir_var_shader_out && is_output(intrin))) {
1352 nir_src *offset = nir_get_io_offset_src(intrin);
1353
1354 if (nir_src_is_const(*offset)) {
1355 intrin->const_index[0] += nir_src_as_uint(*offset);
1356 b->cursor = nir_before_instr(&intrin->instr);
1357 nir_instr_rewrite_src(&intrin->instr, offset,
1358 nir_src_for_ssa(nir_imm_int(b, 0)));
1359 progress = true;
1360 }
1361 }
1362 }
1363
1364 return progress;
1365 }
1366
1367 bool
1368 nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode)
1369 {
1370 bool progress = false;
1371
1372 nir_foreach_function(f, nir) {
1373 if (f->impl) {
1374 nir_builder b;
1375 nir_builder_init(&b, f->impl);
1376 nir_foreach_block(block, f->impl) {
1377 progress |= add_const_offset_to_base_block(block, &b, mode);
1378 }
1379 }
1380 }
1381
1382 return progress;
1383 }
1384