2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
25 * Jason Ekstrand (jason@jlekstrand.net)
30 * This lowering pass converts references to input/output variables with
31 * loads/stores to actual input/output intrinsics.
35 #include "nir_builder.h"
36 #include "nir_deref.h"
38 #include "util/u_math.h"
40 struct lower_io_state
{
43 int (*type_size
)(const struct glsl_type
*type
, bool);
44 nir_variable_mode modes
;
45 nir_lower_io_options options
;
48 static nir_intrinsic_op
49 ssbo_atomic_for_deref(nir_intrinsic_op deref_op
)
52 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_ssbo_##O;
69 unreachable("Invalid SSBO atomic");
73 static nir_intrinsic_op
74 global_atomic_for_deref(nir_intrinsic_op deref_op
)
77 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_global_##O;
94 unreachable("Invalid SSBO atomic");
98 static nir_intrinsic_op
99 shared_atomic_for_deref(nir_intrinsic_op deref_op
)
102 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_shared_##O;
116 OP(atomic_fcomp_swap
)
119 unreachable("Invalid shared atomic");
124 nir_assign_var_locations(struct exec_list
*var_list
, unsigned *size
,
125 int (*type_size
)(const struct glsl_type
*, bool))
127 unsigned location
= 0;
129 nir_foreach_variable(var
, var_list
) {
131 * UBOs have their own address spaces, so don't count them towards the
132 * number of global uniforms
134 if (var
->data
.mode
== nir_var_mem_ubo
|| var
->data
.mode
== nir_var_mem_ssbo
)
137 var
->data
.driver_location
= location
;
138 bool bindless_type_size
= var
->data
.mode
== nir_var_shader_in
||
139 var
->data
.mode
== nir_var_shader_out
||
141 location
+= type_size(var
->type
, bindless_type_size
);
148 * Return true if the given variable is a per-vertex input/output array.
149 * (such as geometry shader inputs).
152 nir_is_per_vertex_io(const nir_variable
*var
, gl_shader_stage stage
)
154 if (var
->data
.patch
|| !glsl_type_is_array(var
->type
))
157 if (var
->data
.mode
== nir_var_shader_in
)
158 return stage
== MESA_SHADER_GEOMETRY
||
159 stage
== MESA_SHADER_TESS_CTRL
||
160 stage
== MESA_SHADER_TESS_EVAL
;
162 if (var
->data
.mode
== nir_var_shader_out
)
163 return stage
== MESA_SHADER_TESS_CTRL
;
169 get_io_offset(nir_builder
*b
, nir_deref_instr
*deref
,
170 nir_ssa_def
**vertex_index
,
171 int (*type_size
)(const struct glsl_type
*, bool),
172 unsigned *component
, bool bts
)
175 nir_deref_path_init(&path
, deref
, NULL
);
177 assert(path
.path
[0]->deref_type
== nir_deref_type_var
);
178 nir_deref_instr
**p
= &path
.path
[1];
180 /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
181 * outermost array index separate. Process the rest normally.
183 if (vertex_index
!= NULL
) {
184 assert((*p
)->deref_type
== nir_deref_type_array
);
185 *vertex_index
= nir_ssa_for_src(b
, (*p
)->arr
.index
, 1);
189 if (path
.path
[0]->var
->data
.compact
) {
190 assert((*p
)->deref_type
== nir_deref_type_array
);
191 assert(glsl_type_is_scalar((*p
)->type
));
193 /* We always lower indirect dereferences for "compact" array vars. */
194 const unsigned index
= nir_src_as_uint((*p
)->arr
.index
);
195 const unsigned total_offset
= *component
+ index
;
196 const unsigned slot_offset
= total_offset
/ 4;
197 *component
= total_offset
% 4;
198 return nir_imm_int(b
, type_size(glsl_vec4_type(), bts
) * slot_offset
);
201 /* Just emit code and let constant-folding go to town */
202 nir_ssa_def
*offset
= nir_imm_int(b
, 0);
205 if ((*p
)->deref_type
== nir_deref_type_array
) {
206 unsigned size
= type_size((*p
)->type
, bts
);
209 nir_imul_imm(b
, nir_ssa_for_src(b
, (*p
)->arr
.index
, 1), size
);
211 offset
= nir_iadd(b
, offset
, mul
);
212 } else if ((*p
)->deref_type
== nir_deref_type_struct
) {
213 /* p starts at path[1], so this is safe */
214 nir_deref_instr
*parent
= *(p
- 1);
216 unsigned field_offset
= 0;
217 for (unsigned i
= 0; i
< (*p
)->strct
.index
; i
++) {
218 field_offset
+= type_size(glsl_get_struct_field(parent
->type
, i
), bts
);
220 offset
= nir_iadd_imm(b
, offset
, field_offset
);
222 unreachable("Unsupported deref type");
226 nir_deref_path_finish(&path
);
232 emit_load(struct lower_io_state
*state
,
233 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
234 unsigned component
, unsigned num_components
, unsigned bit_size
,
237 nir_builder
*b
= &state
->builder
;
238 const nir_shader
*nir
= b
->shader
;
239 nir_variable_mode mode
= var
->data
.mode
;
240 nir_ssa_def
*barycentric
= NULL
;
244 case nir_var_shader_in
:
245 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
&&
246 nir
->options
->use_interpolated_input_intrinsics
&&
247 var
->data
.interpolation
!= INTERP_MODE_FLAT
) {
248 assert(vertex_index
== NULL
);
250 nir_intrinsic_op bary_op
;
251 if (var
->data
.sample
||
252 (state
->options
& nir_lower_io_force_sample_interpolation
))
253 bary_op
= nir_intrinsic_load_barycentric_sample
;
254 else if (var
->data
.centroid
)
255 bary_op
= nir_intrinsic_load_barycentric_centroid
;
257 bary_op
= nir_intrinsic_load_barycentric_pixel
;
259 barycentric
= nir_load_barycentric(&state
->builder
, bary_op
,
260 var
->data
.interpolation
);
261 op
= nir_intrinsic_load_interpolated_input
;
263 op
= vertex_index
? nir_intrinsic_load_per_vertex_input
:
264 nir_intrinsic_load_input
;
267 case nir_var_shader_out
:
268 op
= vertex_index
? nir_intrinsic_load_per_vertex_output
:
269 nir_intrinsic_load_output
;
271 case nir_var_uniform
:
272 op
= nir_intrinsic_load_uniform
;
274 case nir_var_mem_shared
:
275 op
= nir_intrinsic_load_shared
;
278 unreachable("Unknown variable mode");
281 nir_intrinsic_instr
*load
=
282 nir_intrinsic_instr_create(state
->builder
.shader
, op
);
283 load
->num_components
= num_components
;
285 nir_intrinsic_set_base(load
, var
->data
.driver_location
);
286 if (mode
== nir_var_shader_in
|| mode
== nir_var_shader_out
)
287 nir_intrinsic_set_component(load
, component
);
289 if (load
->intrinsic
== nir_intrinsic_load_uniform
)
290 nir_intrinsic_set_range(load
,
291 state
->type_size(var
->type
, var
->data
.bindless
));
293 if (load
->intrinsic
== nir_intrinsic_load_input
||
294 load
->intrinsic
== nir_intrinsic_load_uniform
)
295 nir_intrinsic_set_type(load
, type
);
298 load
->src
[0] = nir_src_for_ssa(vertex_index
);
299 load
->src
[1] = nir_src_for_ssa(offset
);
300 } else if (barycentric
) {
301 load
->src
[0] = nir_src_for_ssa(barycentric
);
302 load
->src
[1] = nir_src_for_ssa(offset
);
304 load
->src
[0] = nir_src_for_ssa(offset
);
307 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
308 num_components
, bit_size
, NULL
);
309 nir_builder_instr_insert(b
, &load
->instr
);
311 return &load
->dest
.ssa
;
315 lower_load(nir_intrinsic_instr
*intrin
, struct lower_io_state
*state
,
316 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
317 unsigned component
, const struct glsl_type
*type
)
319 assert(intrin
->dest
.is_ssa
);
320 if (intrin
->dest
.ssa
.bit_size
== 64 &&
321 (state
->options
& nir_lower_io_lower_64bit_to_32
)) {
322 nir_builder
*b
= &state
->builder
;
324 const unsigned slot_size
= state
->type_size(glsl_dvec_type(2), false);
326 nir_ssa_def
*comp64
[4];
327 assert(component
== 0 || component
== 2);
328 unsigned dest_comp
= 0;
329 while (dest_comp
< intrin
->dest
.ssa
.num_components
) {
330 const unsigned num_comps
=
331 MIN2(intrin
->dest
.ssa
.num_components
- dest_comp
,
332 (4 - component
) / 2);
334 nir_ssa_def
*data32
=
335 emit_load(state
, vertex_index
, var
, offset
, component
,
336 num_comps
* 2, 32, nir_type_uint32
);
337 for (unsigned i
= 0; i
< num_comps
; i
++) {
338 comp64
[dest_comp
+ i
] =
339 nir_pack_64_2x32(b
, nir_channels(b
, data32
, 3 << (i
* 2)));
342 /* Only the first store has a component offset */
344 dest_comp
+= num_comps
;
345 offset
= nir_iadd_imm(b
, offset
, slot_size
);
348 return nir_vec(b
, comp64
, intrin
->dest
.ssa
.num_components
);
350 return emit_load(state
, vertex_index
, var
, offset
, component
,
351 intrin
->dest
.ssa
.num_components
,
352 intrin
->dest
.ssa
.bit_size
,
353 nir_get_nir_type_for_glsl_type(type
));
358 emit_store(struct lower_io_state
*state
, nir_ssa_def
*data
,
359 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
360 unsigned component
, unsigned num_components
,
361 nir_component_mask_t write_mask
, nir_alu_type type
)
363 nir_builder
*b
= &state
->builder
;
364 nir_variable_mode mode
= var
->data
.mode
;
367 if (mode
== nir_var_mem_shared
) {
368 op
= nir_intrinsic_store_shared
;
370 assert(mode
== nir_var_shader_out
);
371 op
= vertex_index
? nir_intrinsic_store_per_vertex_output
:
372 nir_intrinsic_store_output
;
375 nir_intrinsic_instr
*store
=
376 nir_intrinsic_instr_create(state
->builder
.shader
, op
);
377 store
->num_components
= num_components
;
379 store
->src
[0] = nir_src_for_ssa(data
);
381 nir_intrinsic_set_base(store
, var
->data
.driver_location
);
383 if (mode
== nir_var_shader_out
)
384 nir_intrinsic_set_component(store
, component
);
386 if (store
->intrinsic
== nir_intrinsic_store_output
)
387 nir_intrinsic_set_type(store
, type
);
389 nir_intrinsic_set_write_mask(store
, write_mask
);
392 store
->src
[1] = nir_src_for_ssa(vertex_index
);
394 store
->src
[vertex_index
? 2 : 1] = nir_src_for_ssa(offset
);
396 nir_builder_instr_insert(b
, &store
->instr
);
400 lower_store(nir_intrinsic_instr
*intrin
, struct lower_io_state
*state
,
401 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
402 unsigned component
, const struct glsl_type
*type
)
404 assert(intrin
->src
[1].is_ssa
);
405 if (intrin
->src
[1].ssa
->bit_size
== 64 &&
406 (state
->options
& nir_lower_io_lower_64bit_to_32
)) {
407 nir_builder
*b
= &state
->builder
;
409 const unsigned slot_size
= state
->type_size(glsl_dvec_type(2), false);
411 assert(component
== 0 || component
== 2);
412 unsigned src_comp
= 0;
413 nir_component_mask_t write_mask
= nir_intrinsic_write_mask(intrin
);
414 while (src_comp
< intrin
->num_components
) {
415 const unsigned num_comps
=
416 MIN2(intrin
->num_components
- src_comp
,
417 (4 - component
) / 2);
419 if (write_mask
& BITFIELD_MASK(num_comps
)) {
421 nir_channels(b
, intrin
->src
[1].ssa
,
422 BITFIELD_RANGE(src_comp
, num_comps
));
423 nir_ssa_def
*data32
= nir_bitcast_vector(b
, data
, 32);
425 nir_component_mask_t write_mask32
= 0;
426 for (unsigned i
= 0; i
< num_comps
; i
++) {
427 if (write_mask
& BITFIELD_MASK(num_comps
) & (1 << i
))
428 write_mask32
|= 3 << (i
* 2);
431 emit_store(state
, data32
, vertex_index
, var
, offset
,
432 component
, data32
->num_components
, write_mask32
,
436 /* Only the first store has a component offset */
438 src_comp
+= num_comps
;
439 write_mask
>>= num_comps
;
440 offset
= nir_iadd_imm(b
, offset
, slot_size
);
443 emit_store(state
, intrin
->src
[1].ssa
, vertex_index
, var
, offset
,
444 component
, intrin
->num_components
,
445 nir_intrinsic_write_mask(intrin
),
446 nir_get_nir_type_for_glsl_type(type
));
451 lower_atomic(nir_intrinsic_instr
*intrin
, struct lower_io_state
*state
,
452 nir_variable
*var
, nir_ssa_def
*offset
)
454 nir_builder
*b
= &state
->builder
;
455 assert(var
->data
.mode
== nir_var_mem_shared
);
457 nir_intrinsic_op op
= shared_atomic_for_deref(intrin
->intrinsic
);
459 nir_intrinsic_instr
*atomic
=
460 nir_intrinsic_instr_create(state
->builder
.shader
, op
);
462 nir_intrinsic_set_base(atomic
, var
->data
.driver_location
);
464 atomic
->src
[0] = nir_src_for_ssa(offset
);
465 assert(nir_intrinsic_infos
[intrin
->intrinsic
].num_srcs
==
466 nir_intrinsic_infos
[op
].num_srcs
);
467 for (unsigned i
= 1; i
< nir_intrinsic_infos
[op
].num_srcs
; i
++) {
468 nir_src_copy(&atomic
->src
[i
], &intrin
->src
[i
], atomic
);
471 if (nir_intrinsic_infos
[op
].has_dest
) {
472 assert(intrin
->dest
.is_ssa
);
473 assert(nir_intrinsic_infos
[intrin
->intrinsic
].has_dest
);
474 nir_ssa_dest_init(&atomic
->instr
, &atomic
->dest
,
475 intrin
->dest
.ssa
.num_components
,
476 intrin
->dest
.ssa
.bit_size
, NULL
);
479 nir_builder_instr_insert(b
, &atomic
->instr
);
481 return nir_intrinsic_infos
[op
].has_dest
? &atomic
->dest
.ssa
: NULL
;
485 lower_interpolate_at(nir_intrinsic_instr
*intrin
, struct lower_io_state
*state
,
486 nir_variable
*var
, nir_ssa_def
*offset
, unsigned component
,
487 const struct glsl_type
*type
)
489 nir_builder
*b
= &state
->builder
;
490 assert(var
->data
.mode
== nir_var_shader_in
);
492 /* Ignore interpolateAt() for flat variables - flat is flat. */
493 if (var
->data
.interpolation
== INTERP_MODE_FLAT
)
494 return lower_load(intrin
, state
, NULL
, var
, offset
, component
, type
);
496 /* None of the supported APIs allow interpolation on 64-bit things */
497 assert(intrin
->dest
.is_ssa
&& intrin
->dest
.ssa
.bit_size
<= 32);
499 nir_intrinsic_op bary_op
;
500 switch (intrin
->intrinsic
) {
501 case nir_intrinsic_interp_deref_at_centroid
:
502 bary_op
= (state
->options
& nir_lower_io_force_sample_interpolation
) ?
503 nir_intrinsic_load_barycentric_sample
:
504 nir_intrinsic_load_barycentric_centroid
;
506 case nir_intrinsic_interp_deref_at_sample
:
507 bary_op
= nir_intrinsic_load_barycentric_at_sample
;
509 case nir_intrinsic_interp_deref_at_offset
:
510 bary_op
= nir_intrinsic_load_barycentric_at_offset
;
513 unreachable("Bogus interpolateAt() intrinsic.");
516 nir_intrinsic_instr
*bary_setup
=
517 nir_intrinsic_instr_create(state
->builder
.shader
, bary_op
);
519 nir_ssa_dest_init(&bary_setup
->instr
, &bary_setup
->dest
, 2, 32, NULL
);
520 nir_intrinsic_set_interp_mode(bary_setup
, var
->data
.interpolation
);
522 if (intrin
->intrinsic
== nir_intrinsic_interp_deref_at_sample
||
523 intrin
->intrinsic
== nir_intrinsic_interp_deref_at_offset
)
524 nir_src_copy(&bary_setup
->src
[0], &intrin
->src
[1], bary_setup
);
526 nir_builder_instr_insert(b
, &bary_setup
->instr
);
528 nir_intrinsic_instr
*load
=
529 nir_intrinsic_instr_create(state
->builder
.shader
,
530 nir_intrinsic_load_interpolated_input
);
531 load
->num_components
= intrin
->num_components
;
533 nir_intrinsic_set_base(load
, var
->data
.driver_location
);
534 nir_intrinsic_set_component(load
, component
);
536 load
->src
[0] = nir_src_for_ssa(&bary_setup
->dest
.ssa
);
537 load
->src
[1] = nir_src_for_ssa(offset
);
539 assert(intrin
->dest
.is_ssa
);
540 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
541 intrin
->dest
.ssa
.num_components
,
542 intrin
->dest
.ssa
.bit_size
, NULL
);
543 nir_builder_instr_insert(b
, &load
->instr
);
545 return &load
->dest
.ssa
;
549 nir_lower_io_block(nir_block
*block
,
550 struct lower_io_state
*state
)
552 nir_builder
*b
= &state
->builder
;
553 const nir_shader_compiler_options
*options
= b
->shader
->options
;
554 bool progress
= false;
556 nir_foreach_instr_safe(instr
, block
) {
557 if (instr
->type
!= nir_instr_type_intrinsic
)
560 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
562 switch (intrin
->intrinsic
) {
563 case nir_intrinsic_load_deref
:
564 case nir_intrinsic_store_deref
:
565 case nir_intrinsic_deref_atomic_add
:
566 case nir_intrinsic_deref_atomic_imin
:
567 case nir_intrinsic_deref_atomic_umin
:
568 case nir_intrinsic_deref_atomic_imax
:
569 case nir_intrinsic_deref_atomic_umax
:
570 case nir_intrinsic_deref_atomic_and
:
571 case nir_intrinsic_deref_atomic_or
:
572 case nir_intrinsic_deref_atomic_xor
:
573 case nir_intrinsic_deref_atomic_exchange
:
574 case nir_intrinsic_deref_atomic_comp_swap
:
575 case nir_intrinsic_deref_atomic_fadd
:
576 case nir_intrinsic_deref_atomic_fmin
:
577 case nir_intrinsic_deref_atomic_fmax
:
578 case nir_intrinsic_deref_atomic_fcomp_swap
:
579 /* We can lower the io for this nir instrinsic */
581 case nir_intrinsic_interp_deref_at_centroid
:
582 case nir_intrinsic_interp_deref_at_sample
:
583 case nir_intrinsic_interp_deref_at_offset
:
584 /* We can optionally lower these to load_interpolated_input */
585 if (options
->use_interpolated_input_intrinsics
)
588 /* We can't lower the io for this nir instrinsic, so skip it */
592 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
594 nir_variable_mode mode
= deref
->mode
;
596 if ((state
->modes
& mode
) == 0)
599 if (mode
!= nir_var_shader_in
&&
600 mode
!= nir_var_shader_out
&&
601 mode
!= nir_var_mem_shared
&&
602 mode
!= nir_var_uniform
)
605 nir_variable
*var
= nir_deref_instr_get_variable(deref
);
607 b
->cursor
= nir_before_instr(instr
);
609 const bool per_vertex
= nir_is_per_vertex_io(var
, b
->shader
->info
.stage
);
612 nir_ssa_def
*vertex_index
= NULL
;
613 unsigned component_offset
= var
->data
.location_frac
;
614 bool bindless_type_size
= mode
== nir_var_shader_in
||
615 mode
== nir_var_shader_out
||
618 offset
= get_io_offset(b
, deref
, per_vertex
? &vertex_index
: NULL
,
619 state
->type_size
, &component_offset
,
622 nir_ssa_def
*replacement
= NULL
;
624 switch (intrin
->intrinsic
) {
625 case nir_intrinsic_load_deref
:
626 replacement
= lower_load(intrin
, state
, vertex_index
, var
, offset
,
627 component_offset
, deref
->type
);
630 case nir_intrinsic_store_deref
:
631 lower_store(intrin
, state
, vertex_index
, var
, offset
,
632 component_offset
, deref
->type
);
635 case nir_intrinsic_deref_atomic_add
:
636 case nir_intrinsic_deref_atomic_imin
:
637 case nir_intrinsic_deref_atomic_umin
:
638 case nir_intrinsic_deref_atomic_imax
:
639 case nir_intrinsic_deref_atomic_umax
:
640 case nir_intrinsic_deref_atomic_and
:
641 case nir_intrinsic_deref_atomic_or
:
642 case nir_intrinsic_deref_atomic_xor
:
643 case nir_intrinsic_deref_atomic_exchange
:
644 case nir_intrinsic_deref_atomic_comp_swap
:
645 case nir_intrinsic_deref_atomic_fadd
:
646 case nir_intrinsic_deref_atomic_fmin
:
647 case nir_intrinsic_deref_atomic_fmax
:
648 case nir_intrinsic_deref_atomic_fcomp_swap
:
649 assert(vertex_index
== NULL
);
650 replacement
= lower_atomic(intrin
, state
, var
, offset
);
653 case nir_intrinsic_interp_deref_at_centroid
:
654 case nir_intrinsic_interp_deref_at_sample
:
655 case nir_intrinsic_interp_deref_at_offset
:
656 assert(vertex_index
== NULL
);
657 replacement
= lower_interpolate_at(intrin
, state
, var
, offset
,
658 component_offset
, deref
->type
);
666 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
,
667 nir_src_for_ssa(replacement
));
669 nir_instr_remove(&intrin
->instr
);
677 nir_lower_io_impl(nir_function_impl
*impl
,
678 nir_variable_mode modes
,
679 int (*type_size
)(const struct glsl_type
*, bool),
680 nir_lower_io_options options
)
682 struct lower_io_state state
;
683 bool progress
= false;
685 nir_builder_init(&state
.builder
, impl
);
686 state
.dead_ctx
= ralloc_context(NULL
);
688 state
.type_size
= type_size
;
689 state
.options
= options
;
691 nir_foreach_block(block
, impl
) {
692 progress
|= nir_lower_io_block(block
, &state
);
695 ralloc_free(state
.dead_ctx
);
697 nir_metadata_preserve(impl
, nir_metadata_block_index
|
698 nir_metadata_dominance
);
703 nir_lower_io(nir_shader
*shader
, nir_variable_mode modes
,
704 int (*type_size
)(const struct glsl_type
*, bool),
705 nir_lower_io_options options
)
707 bool progress
= false;
709 nir_foreach_function(function
, shader
) {
710 if (function
->impl
) {
711 progress
|= nir_lower_io_impl(function
->impl
, modes
,
720 type_scalar_size_bytes(const struct glsl_type
*type
)
722 assert(glsl_type_is_vector_or_scalar(type
) ||
723 glsl_type_is_matrix(type
));
724 return glsl_type_is_boolean(type
) ? 4 : glsl_get_bit_size(type
) / 8;
728 build_addr_iadd(nir_builder
*b
, nir_ssa_def
*addr
,
729 nir_address_format addr_format
, nir_ssa_def
*offset
)
731 assert(offset
->num_components
== 1);
732 assert(addr
->bit_size
== offset
->bit_size
);
734 switch (addr_format
) {
735 case nir_address_format_32bit_global
:
736 case nir_address_format_64bit_global
:
737 case nir_address_format_32bit_offset
:
738 assert(addr
->num_components
== 1);
739 return nir_iadd(b
, addr
, offset
);
741 case nir_address_format_64bit_bounded_global
:
742 assert(addr
->num_components
== 4);
743 return nir_vec4(b
, nir_channel(b
, addr
, 0),
744 nir_channel(b
, addr
, 1),
745 nir_channel(b
, addr
, 2),
746 nir_iadd(b
, nir_channel(b
, addr
, 3), offset
));
748 case nir_address_format_32bit_index_offset
:
749 assert(addr
->num_components
== 2);
750 return nir_vec2(b
, nir_channel(b
, addr
, 0),
751 nir_iadd(b
, nir_channel(b
, addr
, 1), offset
));
752 case nir_address_format_logical
:
753 unreachable("Unsupported address format");
755 unreachable("Invalid address format");
759 build_addr_iadd_imm(nir_builder
*b
, nir_ssa_def
*addr
,
760 nir_address_format addr_format
, int64_t offset
)
762 return build_addr_iadd(b
, addr
, addr_format
,
763 nir_imm_intN_t(b
, offset
, addr
->bit_size
));
767 addr_to_index(nir_builder
*b
, nir_ssa_def
*addr
,
768 nir_address_format addr_format
)
770 assert(addr_format
== nir_address_format_32bit_index_offset
);
771 assert(addr
->num_components
== 2);
772 return nir_channel(b
, addr
, 0);
776 addr_to_offset(nir_builder
*b
, nir_ssa_def
*addr
,
777 nir_address_format addr_format
)
779 assert(addr_format
== nir_address_format_32bit_index_offset
);
780 assert(addr
->num_components
== 2);
781 return nir_channel(b
, addr
, 1);
784 /** Returns true if the given address format resolves to a global address */
786 addr_format_is_global(nir_address_format addr_format
)
788 return addr_format
== nir_address_format_32bit_global
||
789 addr_format
== nir_address_format_64bit_global
||
790 addr_format
== nir_address_format_64bit_bounded_global
;
794 addr_to_global(nir_builder
*b
, nir_ssa_def
*addr
,
795 nir_address_format addr_format
)
797 switch (addr_format
) {
798 case nir_address_format_32bit_global
:
799 case nir_address_format_64bit_global
:
800 assert(addr
->num_components
== 1);
803 case nir_address_format_64bit_bounded_global
:
804 assert(addr
->num_components
== 4);
805 return nir_iadd(b
, nir_pack_64_2x32(b
, nir_channels(b
, addr
, 0x3)),
806 nir_u2u64(b
, nir_channel(b
, addr
, 3)));
808 case nir_address_format_32bit_index_offset
:
809 case nir_address_format_32bit_offset
:
810 case nir_address_format_logical
:
811 unreachable("Cannot get a 64-bit address with this address format");
814 unreachable("Invalid address format");
818 addr_format_needs_bounds_check(nir_address_format addr_format
)
820 return addr_format
== nir_address_format_64bit_bounded_global
;
824 addr_is_in_bounds(nir_builder
*b
, nir_ssa_def
*addr
,
825 nir_address_format addr_format
, unsigned size
)
827 assert(addr_format
== nir_address_format_64bit_bounded_global
);
828 assert(addr
->num_components
== 4);
829 return nir_ige(b
, nir_channel(b
, addr
, 2),
830 nir_iadd_imm(b
, nir_channel(b
, addr
, 3), size
));
834 build_explicit_io_load(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
835 nir_ssa_def
*addr
, nir_address_format addr_format
,
836 unsigned num_components
)
838 nir_variable_mode mode
= nir_src_as_deref(intrin
->src
[0])->mode
;
842 case nir_var_mem_ubo
:
843 op
= nir_intrinsic_load_ubo
;
845 case nir_var_mem_ssbo
:
846 if (addr_format_is_global(addr_format
))
847 op
= nir_intrinsic_load_global
;
849 op
= nir_intrinsic_load_ssbo
;
851 case nir_var_mem_global
:
852 assert(addr_format_is_global(addr_format
));
853 op
= nir_intrinsic_load_global
;
855 case nir_var_shader_in
:
856 assert(addr_format_is_global(addr_format
));
857 op
= nir_intrinsic_load_kernel_input
;
859 case nir_var_mem_shared
:
860 assert(addr_format
== nir_address_format_32bit_offset
);
861 op
= nir_intrinsic_load_shared
;
864 unreachable("Unsupported explicit IO variable mode");
867 nir_intrinsic_instr
*load
= nir_intrinsic_instr_create(b
->shader
, op
);
869 if (addr_format_is_global(addr_format
)) {
870 load
->src
[0] = nir_src_for_ssa(addr_to_global(b
, addr
, addr_format
));
871 } else if (addr_format
== nir_address_format_32bit_offset
) {
872 assert(addr
->num_components
== 1);
873 load
->src
[0] = nir_src_for_ssa(addr
);
875 load
->src
[0] = nir_src_for_ssa(addr_to_index(b
, addr
, addr_format
));
876 load
->src
[1] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
879 if (mode
!= nir_var_mem_ubo
&& mode
!= nir_var_shader_in
&& mode
!= nir_var_mem_shared
)
880 nir_intrinsic_set_access(load
, nir_intrinsic_access(intrin
));
882 /* TODO: We should try and provide a better alignment. For OpenCL, we need
883 * to plumb the alignment through from SPIR-V when we have one.
885 nir_intrinsic_set_align(load
, intrin
->dest
.ssa
.bit_size
/ 8, 0);
887 assert(intrin
->dest
.is_ssa
);
888 load
->num_components
= num_components
;
889 nir_ssa_dest_init(&load
->instr
, &load
->dest
, num_components
,
890 intrin
->dest
.ssa
.bit_size
, intrin
->dest
.ssa
.name
);
892 assert(load
->dest
.ssa
.bit_size
% 8 == 0);
894 if (addr_format_needs_bounds_check(addr_format
)) {
895 /* The Vulkan spec for robustBufferAccess gives us quite a few options
896 * as to what we can do with an OOB read. Unfortunately, returning
897 * undefined values isn't one of them so we return an actual zero.
899 nir_ssa_def
*zero
= nir_imm_zero(b
, load
->num_components
,
900 load
->dest
.ssa
.bit_size
);
902 const unsigned load_size
=
903 (load
->dest
.ssa
.bit_size
/ 8) * load
->num_components
;
904 nir_push_if(b
, addr_is_in_bounds(b
, addr
, addr_format
, load_size
));
906 nir_builder_instr_insert(b
, &load
->instr
);
910 return nir_if_phi(b
, &load
->dest
.ssa
, zero
);
912 nir_builder_instr_insert(b
, &load
->instr
);
913 return &load
->dest
.ssa
;
918 build_explicit_io_store(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
919 nir_ssa_def
*addr
, nir_address_format addr_format
,
920 nir_ssa_def
*value
, nir_component_mask_t write_mask
)
922 nir_variable_mode mode
= nir_src_as_deref(intrin
->src
[0])->mode
;
926 case nir_var_mem_ssbo
:
927 if (addr_format_is_global(addr_format
))
928 op
= nir_intrinsic_store_global
;
930 op
= nir_intrinsic_store_ssbo
;
932 case nir_var_mem_global
:
933 assert(addr_format_is_global(addr_format
));
934 op
= nir_intrinsic_store_global
;
936 case nir_var_mem_shared
:
937 assert(addr_format
== nir_address_format_32bit_offset
);
938 op
= nir_intrinsic_store_shared
;
941 unreachable("Unsupported explicit IO variable mode");
944 nir_intrinsic_instr
*store
= nir_intrinsic_instr_create(b
->shader
, op
);
946 store
->src
[0] = nir_src_for_ssa(value
);
947 if (addr_format_is_global(addr_format
)) {
948 store
->src
[1] = nir_src_for_ssa(addr_to_global(b
, addr
, addr_format
));
949 } else if (addr_format
== nir_address_format_32bit_offset
) {
950 assert(addr
->num_components
== 1);
951 store
->src
[1] = nir_src_for_ssa(addr
);
953 store
->src
[1] = nir_src_for_ssa(addr_to_index(b
, addr
, addr_format
));
954 store
->src
[2] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
957 nir_intrinsic_set_write_mask(store
, write_mask
);
959 if (mode
!= nir_var_mem_shared
)
960 nir_intrinsic_set_access(store
, nir_intrinsic_access(intrin
));
962 /* TODO: We should try and provide a better alignment. For OpenCL, we need
963 * to plumb the alignment through from SPIR-V when we have one.
965 nir_intrinsic_set_align(store
, value
->bit_size
/ 8, 0);
967 assert(value
->num_components
== 1 ||
968 value
->num_components
== intrin
->num_components
);
969 store
->num_components
= value
->num_components
;
971 assert(value
->bit_size
% 8 == 0);
973 if (addr_format_needs_bounds_check(addr_format
)) {
974 const unsigned store_size
= (value
->bit_size
/ 8) * store
->num_components
;
975 nir_push_if(b
, addr_is_in_bounds(b
, addr
, addr_format
, store_size
));
977 nir_builder_instr_insert(b
, &store
->instr
);
981 nir_builder_instr_insert(b
, &store
->instr
);
986 build_explicit_io_atomic(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
987 nir_ssa_def
*addr
, nir_address_format addr_format
)
989 nir_variable_mode mode
= nir_src_as_deref(intrin
->src
[0])->mode
;
990 const unsigned num_data_srcs
=
991 nir_intrinsic_infos
[intrin
->intrinsic
].num_srcs
- 1;
995 case nir_var_mem_ssbo
:
996 if (addr_format_is_global(addr_format
))
997 op
= global_atomic_for_deref(intrin
->intrinsic
);
999 op
= ssbo_atomic_for_deref(intrin
->intrinsic
);
1001 case nir_var_mem_global
:
1002 assert(addr_format_is_global(addr_format
));
1003 op
= global_atomic_for_deref(intrin
->intrinsic
);
1005 case nir_var_mem_shared
:
1006 assert(addr_format
== nir_address_format_32bit_offset
);
1007 op
= shared_atomic_for_deref(intrin
->intrinsic
);
1010 unreachable("Unsupported explicit IO variable mode");
1013 nir_intrinsic_instr
*atomic
= nir_intrinsic_instr_create(b
->shader
, op
);
1016 if (addr_format_is_global(addr_format
)) {
1017 atomic
->src
[src
++] = nir_src_for_ssa(addr_to_global(b
, addr
, addr_format
));
1018 } else if (addr_format
== nir_address_format_32bit_offset
) {
1019 assert(addr
->num_components
== 1);
1020 atomic
->src
[src
++] = nir_src_for_ssa(addr
);
1022 atomic
->src
[src
++] = nir_src_for_ssa(addr_to_index(b
, addr
, addr_format
));
1023 atomic
->src
[src
++] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
1025 for (unsigned i
= 0; i
< num_data_srcs
; i
++) {
1026 atomic
->src
[src
++] = nir_src_for_ssa(intrin
->src
[1 + i
].ssa
);
1029 /* Global atomics don't have access flags because they assume that the
1030 * address may be non-uniform.
1032 if (!addr_format_is_global(addr_format
) && mode
!= nir_var_mem_shared
)
1033 nir_intrinsic_set_access(atomic
, nir_intrinsic_access(intrin
));
1035 assert(intrin
->dest
.ssa
.num_components
== 1);
1036 nir_ssa_dest_init(&atomic
->instr
, &atomic
->dest
,
1037 1, intrin
->dest
.ssa
.bit_size
, intrin
->dest
.ssa
.name
);
1039 assert(atomic
->dest
.ssa
.bit_size
% 8 == 0);
1041 if (addr_format_needs_bounds_check(addr_format
)) {
1042 const unsigned atomic_size
= atomic
->dest
.ssa
.bit_size
/ 8;
1043 nir_push_if(b
, addr_is_in_bounds(b
, addr
, addr_format
, atomic_size
));
1045 nir_builder_instr_insert(b
, &atomic
->instr
);
1047 nir_pop_if(b
, NULL
);
1048 return nir_if_phi(b
, &atomic
->dest
.ssa
,
1049 nir_ssa_undef(b
, 1, atomic
->dest
.ssa
.bit_size
));
1051 nir_builder_instr_insert(b
, &atomic
->instr
);
1052 return &atomic
->dest
.ssa
;
1057 nir_explicit_io_address_from_deref(nir_builder
*b
, nir_deref_instr
*deref
,
1058 nir_ssa_def
*base_addr
,
1059 nir_address_format addr_format
)
1061 assert(deref
->dest
.is_ssa
);
1062 switch (deref
->deref_type
) {
1063 case nir_deref_type_var
:
1064 assert(deref
->mode
& (nir_var_shader_in
| nir_var_mem_shared
));
1065 return nir_imm_intN_t(b
, deref
->var
->data
.driver_location
,
1066 deref
->dest
.ssa
.bit_size
);
1068 case nir_deref_type_array
: {
1069 nir_deref_instr
*parent
= nir_deref_instr_parent(deref
);
1071 unsigned stride
= glsl_get_explicit_stride(parent
->type
);
1072 if ((glsl_type_is_matrix(parent
->type
) &&
1073 glsl_matrix_type_is_row_major(parent
->type
)) ||
1074 (glsl_type_is_vector(parent
->type
) && stride
== 0))
1075 stride
= type_scalar_size_bytes(parent
->type
);
1079 nir_ssa_def
*index
= nir_ssa_for_src(b
, deref
->arr
.index
, 1);
1080 index
= nir_i2i(b
, index
, base_addr
->bit_size
);
1081 return build_addr_iadd(b
, base_addr
, addr_format
,
1082 nir_imul_imm(b
, index
, stride
));
1085 case nir_deref_type_ptr_as_array
: {
1086 nir_ssa_def
*index
= nir_ssa_for_src(b
, deref
->arr
.index
, 1);
1087 index
= nir_i2i(b
, index
, base_addr
->bit_size
);
1088 unsigned stride
= nir_deref_instr_ptr_as_array_stride(deref
);
1089 return build_addr_iadd(b
, base_addr
, addr_format
,
1090 nir_imul_imm(b
, index
, stride
));
1093 case nir_deref_type_array_wildcard
:
1094 unreachable("Wildcards should be lowered by now");
1097 case nir_deref_type_struct
: {
1098 nir_deref_instr
*parent
= nir_deref_instr_parent(deref
);
1099 int offset
= glsl_get_struct_field_offset(parent
->type
,
1100 deref
->strct
.index
);
1101 assert(offset
>= 0);
1102 return build_addr_iadd_imm(b
, base_addr
, addr_format
, offset
);
1105 case nir_deref_type_cast
:
1106 /* Nothing to do here */
1110 unreachable("Invalid NIR deref type");
1114 nir_lower_explicit_io_instr(nir_builder
*b
,
1115 nir_intrinsic_instr
*intrin
,
1117 nir_address_format addr_format
)
1119 b
->cursor
= nir_after_instr(&intrin
->instr
);
1121 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1122 unsigned vec_stride
= glsl_get_explicit_stride(deref
->type
);
1123 unsigned scalar_size
= type_scalar_size_bytes(deref
->type
);
1124 assert(vec_stride
== 0 || glsl_type_is_vector(deref
->type
));
1125 assert(vec_stride
== 0 || vec_stride
>= scalar_size
);
1127 if (intrin
->intrinsic
== nir_intrinsic_load_deref
) {
1129 if (vec_stride
> scalar_size
) {
1130 nir_ssa_def
*comps
[4] = { NULL
, };
1131 for (unsigned i
= 0; i
< intrin
->num_components
; i
++) {
1132 nir_ssa_def
*comp_addr
= build_addr_iadd_imm(b
, addr
, addr_format
,
1134 comps
[i
] = build_explicit_io_load(b
, intrin
, comp_addr
,
1137 value
= nir_vec(b
, comps
, intrin
->num_components
);
1139 value
= build_explicit_io_load(b
, intrin
, addr
, addr_format
,
1140 intrin
->num_components
);
1142 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
, nir_src_for_ssa(value
));
1143 } else if (intrin
->intrinsic
== nir_intrinsic_store_deref
) {
1144 assert(intrin
->src
[1].is_ssa
);
1145 nir_ssa_def
*value
= intrin
->src
[1].ssa
;
1146 nir_component_mask_t write_mask
= nir_intrinsic_write_mask(intrin
);
1147 if (vec_stride
> scalar_size
) {
1148 for (unsigned i
= 0; i
< intrin
->num_components
; i
++) {
1149 if (!(write_mask
& (1 << i
)))
1152 nir_ssa_def
*comp_addr
= build_addr_iadd_imm(b
, addr
, addr_format
,
1154 build_explicit_io_store(b
, intrin
, comp_addr
, addr_format
,
1155 nir_channel(b
, value
, i
), 1);
1158 build_explicit_io_store(b
, intrin
, addr
, addr_format
,
1162 nir_ssa_def
*value
=
1163 build_explicit_io_atomic(b
, intrin
, addr
, addr_format
);
1164 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
, nir_src_for_ssa(value
));
1167 nir_instr_remove(&intrin
->instr
);
1171 lower_explicit_io_deref(nir_builder
*b
, nir_deref_instr
*deref
,
1172 nir_address_format addr_format
)
1174 /* Just delete the deref if it's not used. We can't use
1175 * nir_deref_instr_remove_if_unused here because it may remove more than
1176 * one deref which could break our list walking since we walk the list
1179 assert(list_empty(&deref
->dest
.ssa
.if_uses
));
1180 if (list_empty(&deref
->dest
.ssa
.uses
)) {
1181 nir_instr_remove(&deref
->instr
);
1185 b
->cursor
= nir_after_instr(&deref
->instr
);
1187 nir_ssa_def
*base_addr
= NULL
;
1188 if (deref
->deref_type
!= nir_deref_type_var
) {
1189 assert(deref
->parent
.is_ssa
);
1190 base_addr
= deref
->parent
.ssa
;
1193 nir_ssa_def
*addr
= nir_explicit_io_address_from_deref(b
, deref
, base_addr
,
1196 nir_instr_remove(&deref
->instr
);
1197 nir_ssa_def_rewrite_uses(&deref
->dest
.ssa
, nir_src_for_ssa(addr
));
1201 lower_explicit_io_access(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
1202 nir_address_format addr_format
)
1204 assert(intrin
->src
[0].is_ssa
);
1205 nir_lower_explicit_io_instr(b
, intrin
, intrin
->src
[0].ssa
, addr_format
);
1209 lower_explicit_io_array_length(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
1210 nir_address_format addr_format
)
1212 b
->cursor
= nir_after_instr(&intrin
->instr
);
1214 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1216 assert(glsl_type_is_array(deref
->type
));
1217 assert(glsl_get_length(deref
->type
) == 0);
1218 unsigned stride
= glsl_get_explicit_stride(deref
->type
);
1221 assert(addr_format
== nir_address_format_32bit_index_offset
);
1222 nir_ssa_def
*addr
= &deref
->dest
.ssa
;
1223 nir_ssa_def
*index
= addr_to_index(b
, addr
, addr_format
);
1224 nir_ssa_def
*offset
= addr_to_offset(b
, addr
, addr_format
);
1226 nir_intrinsic_instr
*bsize
=
1227 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_get_buffer_size
);
1228 bsize
->src
[0] = nir_src_for_ssa(index
);
1229 nir_ssa_dest_init(&bsize
->instr
, &bsize
->dest
, 1, 32, NULL
);
1230 nir_builder_instr_insert(b
, &bsize
->instr
);
1232 nir_ssa_def
*arr_size
=
1233 nir_idiv(b
, nir_isub(b
, &bsize
->dest
.ssa
, offset
),
1234 nir_imm_int(b
, stride
));
1236 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
, nir_src_for_ssa(arr_size
));
1237 nir_instr_remove(&intrin
->instr
);
1241 nir_lower_explicit_io_impl(nir_function_impl
*impl
, nir_variable_mode modes
,
1242 nir_address_format addr_format
)
1244 bool progress
= false;
1247 nir_builder_init(&b
, impl
);
1249 /* Walk in reverse order so that we can see the full deref chain when we
1250 * lower the access operations. We lower them assuming that the derefs
1251 * will be turned into address calculations later.
1253 nir_foreach_block_reverse(block
, impl
) {
1254 nir_foreach_instr_reverse_safe(instr
, block
) {
1255 switch (instr
->type
) {
1256 case nir_instr_type_deref
: {
1257 nir_deref_instr
*deref
= nir_instr_as_deref(instr
);
1258 if (deref
->mode
& modes
) {
1259 lower_explicit_io_deref(&b
, deref
, addr_format
);
1265 case nir_instr_type_intrinsic
: {
1266 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
1267 switch (intrin
->intrinsic
) {
1268 case nir_intrinsic_load_deref
:
1269 case nir_intrinsic_store_deref
:
1270 case nir_intrinsic_deref_atomic_add
:
1271 case nir_intrinsic_deref_atomic_imin
:
1272 case nir_intrinsic_deref_atomic_umin
:
1273 case nir_intrinsic_deref_atomic_imax
:
1274 case nir_intrinsic_deref_atomic_umax
:
1275 case nir_intrinsic_deref_atomic_and
:
1276 case nir_intrinsic_deref_atomic_or
:
1277 case nir_intrinsic_deref_atomic_xor
:
1278 case nir_intrinsic_deref_atomic_exchange
:
1279 case nir_intrinsic_deref_atomic_comp_swap
:
1280 case nir_intrinsic_deref_atomic_fadd
:
1281 case nir_intrinsic_deref_atomic_fmin
:
1282 case nir_intrinsic_deref_atomic_fmax
:
1283 case nir_intrinsic_deref_atomic_fcomp_swap
: {
1284 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1285 if (deref
->mode
& modes
) {
1286 lower_explicit_io_access(&b
, intrin
, addr_format
);
1292 case nir_intrinsic_deref_buffer_array_length
: {
1293 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1294 if (deref
->mode
& modes
) {
1295 lower_explicit_io_array_length(&b
, intrin
, addr_format
);
1315 nir_metadata_preserve(impl
, nir_metadata_block_index
|
1316 nir_metadata_dominance
);
1323 nir_lower_explicit_io(nir_shader
*shader
, nir_variable_mode modes
,
1324 nir_address_format addr_format
)
1326 bool progress
= false;
1328 nir_foreach_function(function
, shader
) {
1329 if (function
->impl
&&
1330 nir_lower_explicit_io_impl(function
->impl
, modes
, addr_format
))
1338 nir_lower_vars_to_explicit_types_impl(nir_function_impl
*impl
,
1339 nir_variable_mode modes
,
1340 glsl_type_size_align_func type_info
)
1342 bool progress
= false;
1344 nir_foreach_block(block
, impl
) {
1345 nir_foreach_instr(instr
, block
) {
1346 if (instr
->type
!= nir_instr_type_deref
)
1349 nir_deref_instr
*deref
= nir_instr_as_deref(instr
);
1350 if (!(deref
->mode
& modes
))
1353 unsigned size
, alignment
;
1354 const struct glsl_type
*new_type
=
1355 glsl_get_explicit_type_for_size_align(deref
->type
, type_info
, &size
, &alignment
);
1356 if (new_type
!= deref
->type
) {
1358 deref
->type
= new_type
;
1360 if (deref
->deref_type
== nir_deref_type_cast
) {
1361 /* See also glsl_type::get_explicit_type_for_size_align() */
1362 unsigned new_stride
= align(size
, alignment
);
1363 if (new_stride
!= deref
->cast
.ptr_stride
) {
1364 deref
->cast
.ptr_stride
= new_stride
;
1372 nir_metadata_preserve(impl
, nir_metadata_block_index
|
1373 nir_metadata_dominance
|
1374 nir_metadata_live_ssa_defs
|
1375 nir_metadata_loop_analysis
);
1382 lower_vars_to_explicit(nir_shader
*shader
,
1383 struct exec_list
*vars
, nir_variable_mode mode
,
1384 glsl_type_size_align_func type_info
)
1386 bool progress
= false;
1387 unsigned offset
= 0;
1388 nir_foreach_variable(var
, vars
) {
1389 unsigned size
, align
;
1390 const struct glsl_type
*explicit_type
=
1391 glsl_get_explicit_type_for_size_align(var
->type
, type_info
, &size
, &align
);
1393 if (explicit_type
!= var
->type
) {
1395 var
->type
= explicit_type
;
1398 var
->data
.driver_location
= ALIGN_POT(offset
, align
);
1399 offset
= var
->data
.driver_location
+ size
;
1402 if (mode
== nir_var_mem_shared
) {
1403 shader
->info
.cs
.shared_size
= offset
;
1404 shader
->num_shared
= offset
;
1411 nir_lower_vars_to_explicit_types(nir_shader
*shader
,
1412 nir_variable_mode modes
,
1413 glsl_type_size_align_func type_info
)
1415 /* TODO: Situations which need to be handled to support more modes:
1416 * - row-major matrices
1417 * - compact shader inputs/outputs
1420 nir_variable_mode supported
= nir_var_mem_shared
| nir_var_shader_temp
| nir_var_function_temp
;
1421 assert(!(modes
& ~supported
) && "unsupported");
1423 bool progress
= false;
1425 if (modes
& nir_var_mem_shared
)
1426 progress
|= lower_vars_to_explicit(shader
, &shader
->shared
, nir_var_mem_shared
, type_info
);
1427 if (modes
& nir_var_shader_temp
)
1428 progress
|= lower_vars_to_explicit(shader
, &shader
->globals
, nir_var_shader_temp
, type_info
);
1430 nir_foreach_function(function
, shader
) {
1431 if (function
->impl
) {
1432 if (modes
& nir_var_function_temp
)
1433 progress
|= lower_vars_to_explicit(shader
, &function
->impl
->locals
, nir_var_function_temp
, type_info
);
1435 progress
|= nir_lower_vars_to_explicit_types_impl(function
->impl
, modes
, type_info
);
1443 * Return the offset source for a load/store intrinsic.
1446 nir_get_io_offset_src(nir_intrinsic_instr
*instr
)
1448 switch (instr
->intrinsic
) {
1449 case nir_intrinsic_load_input
:
1450 case nir_intrinsic_load_output
:
1451 case nir_intrinsic_load_shared
:
1452 case nir_intrinsic_load_uniform
:
1453 case nir_intrinsic_load_global
:
1454 case nir_intrinsic_load_scratch
:
1455 case nir_intrinsic_load_fs_input_interp_deltas
:
1456 return &instr
->src
[0];
1457 case nir_intrinsic_load_ubo
:
1458 case nir_intrinsic_load_ssbo
:
1459 case nir_intrinsic_load_per_vertex_input
:
1460 case nir_intrinsic_load_per_vertex_output
:
1461 case nir_intrinsic_load_interpolated_input
:
1462 case nir_intrinsic_store_output
:
1463 case nir_intrinsic_store_shared
:
1464 case nir_intrinsic_store_global
:
1465 case nir_intrinsic_store_scratch
:
1466 return &instr
->src
[1];
1467 case nir_intrinsic_store_ssbo
:
1468 case nir_intrinsic_store_per_vertex_output
:
1469 return &instr
->src
[2];
1476 * Return the vertex index source for a load/store per_vertex intrinsic.
1479 nir_get_io_vertex_index_src(nir_intrinsic_instr
*instr
)
1481 switch (instr
->intrinsic
) {
1482 case nir_intrinsic_load_per_vertex_input
:
1483 case nir_intrinsic_load_per_vertex_output
:
1484 return &instr
->src
[0];
1485 case nir_intrinsic_store_per_vertex_output
:
1486 return &instr
->src
[1];
1493 * Return the numeric constant that identify a NULL pointer for each address
1496 const nir_const_value
*
1497 nir_address_format_null_value(nir_address_format addr_format
)
1499 const static nir_const_value null_values
[][NIR_MAX_VEC_COMPONENTS
] = {
1500 [nir_address_format_32bit_global
] = {{0}},
1501 [nir_address_format_64bit_global
] = {{0}},
1502 [nir_address_format_64bit_bounded_global
] = {{0}},
1503 [nir_address_format_32bit_index_offset
] = {{.u32
= ~0}, {.u32
= ~0}},
1504 [nir_address_format_32bit_offset
] = {{.u32
= ~0}},
1505 [nir_address_format_logical
] = {{.u32
= ~0}},
1508 assert(addr_format
< ARRAY_SIZE(null_values
));
1509 return null_values
[addr_format
];
1513 nir_build_addr_ieq(nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
1514 nir_address_format addr_format
)
1516 switch (addr_format
) {
1517 case nir_address_format_32bit_global
:
1518 case nir_address_format_64bit_global
:
1519 case nir_address_format_64bit_bounded_global
:
1520 case nir_address_format_32bit_index_offset
:
1521 case nir_address_format_32bit_offset
:
1522 return nir_ball_iequal(b
, addr0
, addr1
);
1524 case nir_address_format_logical
:
1525 unreachable("Unsupported address format");
1528 unreachable("Invalid address format");
1532 nir_build_addr_isub(nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
1533 nir_address_format addr_format
)
1535 switch (addr_format
) {
1536 case nir_address_format_32bit_global
:
1537 case nir_address_format_64bit_global
:
1538 case nir_address_format_32bit_offset
:
1539 assert(addr0
->num_components
== 1);
1540 assert(addr1
->num_components
== 1);
1541 return nir_isub(b
, addr0
, addr1
);
1543 case nir_address_format_64bit_bounded_global
:
1544 return nir_isub(b
, addr_to_global(b
, addr0
, addr_format
),
1545 addr_to_global(b
, addr1
, addr_format
));
1547 case nir_address_format_32bit_index_offset
:
1548 assert(addr0
->num_components
== 2);
1549 assert(addr1
->num_components
== 2);
1550 /* Assume the same buffer index. */
1551 return nir_isub(b
, nir_channel(b
, addr0
, 1), nir_channel(b
, addr1
, 1));
1553 case nir_address_format_logical
:
1554 unreachable("Unsupported address format");
1557 unreachable("Invalid address format");
1561 is_input(nir_intrinsic_instr
*intrin
)
1563 return intrin
->intrinsic
== nir_intrinsic_load_input
||
1564 intrin
->intrinsic
== nir_intrinsic_load_per_vertex_input
||
1565 intrin
->intrinsic
== nir_intrinsic_load_interpolated_input
||
1566 intrin
->intrinsic
== nir_intrinsic_load_fs_input_interp_deltas
;
1570 is_output(nir_intrinsic_instr
*intrin
)
1572 return intrin
->intrinsic
== nir_intrinsic_load_output
||
1573 intrin
->intrinsic
== nir_intrinsic_load_per_vertex_output
||
1574 intrin
->intrinsic
== nir_intrinsic_store_output
||
1575 intrin
->intrinsic
== nir_intrinsic_store_per_vertex_output
;
1580 * This pass adds constant offsets to instr->const_index[0] for input/output
1581 * intrinsics, and resets the offset source to 0. Non-constant offsets remain
1582 * unchanged - since we don't know what part of a compound variable is
1583 * accessed, we allocate storage for the entire thing. For drivers that use
1584 * nir_lower_io_to_temporaries() before nir_lower_io(), this guarantees that
1585 * the offset source will be 0, so that they don't have to add it in manually.
1589 add_const_offset_to_base_block(nir_block
*block
, nir_builder
*b
,
1590 nir_variable_mode mode
)
1592 bool progress
= false;
1593 nir_foreach_instr_safe(instr
, block
) {
1594 if (instr
->type
!= nir_instr_type_intrinsic
)
1597 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
1599 if ((mode
== nir_var_shader_in
&& is_input(intrin
)) ||
1600 (mode
== nir_var_shader_out
&& is_output(intrin
))) {
1601 nir_src
*offset
= nir_get_io_offset_src(intrin
);
1603 if (nir_src_is_const(*offset
)) {
1604 intrin
->const_index
[0] += nir_src_as_uint(*offset
);
1605 b
->cursor
= nir_before_instr(&intrin
->instr
);
1606 nir_instr_rewrite_src(&intrin
->instr
, offset
,
1607 nir_src_for_ssa(nir_imm_int(b
, 0)));
1617 nir_io_add_const_offset_to_base(nir_shader
*nir
, nir_variable_mode mode
)
1619 bool progress
= false;
1621 nir_foreach_function(f
, nir
) {
1624 nir_builder_init(&b
, f
->impl
);
1625 nir_foreach_block(block
, f
->impl
) {
1626 progress
|= add_const_offset_to_base_block(block
, &b
, mode
);