nir: support lowering clipdist to arrays
[mesa.git] / src / compiler / nir / nir_lower_io_to_vector.c
1 /*
2 * Copyright © 2019 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir.h"
25 #include "nir_builder.h"
26 #include "nir_deref.h"
27
28 /** @file nir_lower_io_to_vector.c
29 *
30 * Merges compatible input/output variables residing in different components
31 * of the same location. It's expected that further passes such as
32 * nir_lower_io_to_temporaries will combine loads and stores of the merged
33 * variables, producing vector nir_load_input/nir_store_output instructions
34 * when all is said and done.
35 */
36
37 /* FRAG_RESULT_MAX+1 instead of just FRAG_RESULT_MAX because of how this pass
38 * handles dual source blending */
39 #define MAX_SLOTS MAX2(VARYING_SLOT_TESS_MAX, FRAG_RESULT_MAX+1)
40
41 static unsigned
42 get_slot(const nir_variable *var)
43 {
44 /* This handling of dual-source blending might not be correct when more than
45 * one render target is supported, but it seems no driver supports more than
46 * one. */
47 return var->data.location + var->data.index;
48 }
49
50 static const struct glsl_type *
51 get_per_vertex_type(const nir_shader *shader, const nir_variable *var,
52 unsigned *num_vertices)
53 {
54 if (nir_is_per_vertex_io(var, shader->info.stage)) {
55 assert(glsl_type_is_array(var->type));
56 if (num_vertices)
57 *num_vertices = glsl_get_length(var->type);
58 return glsl_get_array_element(var->type);
59 } else {
60 if (num_vertices)
61 *num_vertices = 0;
62 return var->type;
63 }
64 }
65
66 static const struct glsl_type *
67 resize_array_vec_type(const struct glsl_type *type, unsigned num_components)
68 {
69 if (glsl_type_is_array(type)) {
70 const struct glsl_type *arr_elem =
71 resize_array_vec_type(glsl_get_array_element(type), num_components);
72 return glsl_array_type(arr_elem, glsl_get_length(type), 0);
73 } else {
74 assert(glsl_type_is_vector_or_scalar(type));
75 return glsl_vector_type(glsl_get_base_type(type), num_components);
76 }
77 }
78
79 static bool
80 variables_can_merge(const nir_shader *shader,
81 const nir_variable *a, const nir_variable *b,
82 bool same_array_structure)
83 {
84 if (a->data.compact || b->data.compact)
85 return false;
86
87 const struct glsl_type *a_type_tail = a->type;
88 const struct glsl_type *b_type_tail = b->type;
89
90 if (nir_is_per_vertex_io(a, shader->info.stage) !=
91 nir_is_per_vertex_io(b, shader->info.stage))
92 return false;
93
94 /* They must have the same array structure */
95 if (same_array_structure) {
96 while (glsl_type_is_array(a_type_tail)) {
97 if (!glsl_type_is_array(b_type_tail))
98 return false;
99
100 if (glsl_get_length(a_type_tail) != glsl_get_length(b_type_tail))
101 return false;
102
103 a_type_tail = glsl_get_array_element(a_type_tail);
104 b_type_tail = glsl_get_array_element(b_type_tail);
105 }
106 if (glsl_type_is_array(b_type_tail))
107 return false;
108 } else {
109 a_type_tail = glsl_without_array(a_type_tail);
110 b_type_tail = glsl_without_array(b_type_tail);
111 }
112
113 if (!glsl_type_is_vector_or_scalar(a_type_tail) ||
114 !glsl_type_is_vector_or_scalar(b_type_tail))
115 return false;
116
117 if (glsl_get_base_type(a_type_tail) != glsl_get_base_type(b_type_tail))
118 return false;
119
120 /* TODO: add 64/16bit support ? */
121 if (glsl_get_bit_size(a_type_tail) != 32)
122 return false;
123
124 assert(a->data.mode == b->data.mode);
125 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
126 a->data.mode == nir_var_shader_in &&
127 a->data.interpolation != b->data.interpolation)
128 return false;
129
130 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
131 a->data.mode == nir_var_shader_out &&
132 a->data.index != b->data.index)
133 return false;
134
135 return true;
136 }
137
138 static const struct glsl_type *
139 get_flat_type(const nir_shader *shader, nir_variable *old_vars[MAX_SLOTS][4],
140 unsigned *loc, nir_variable **first_var, unsigned *num_vertices)
141 {
142 unsigned todo = 1;
143 unsigned slots = 0;
144 unsigned num_vars = 0;
145 enum glsl_base_type base;
146 *num_vertices = 0;
147 *first_var = NULL;
148
149 while (todo) {
150 assert(*loc < MAX_SLOTS);
151 for (unsigned frac = 0; frac < 4; frac++) {
152 nir_variable *var = old_vars[*loc][frac];
153 if (!var)
154 continue;
155 if ((*first_var &&
156 !variables_can_merge(shader, var, *first_var, false)) ||
157 var->data.compact) {
158 (*loc)++;
159 return NULL;
160 }
161
162 if (!*first_var) {
163 if (!glsl_type_is_vector_or_scalar(glsl_without_array(var->type))) {
164 (*loc)++;
165 return NULL;
166 }
167 *first_var = var;
168 base = glsl_get_base_type(
169 glsl_without_array(get_per_vertex_type(shader, var, NULL)));
170 }
171
172 bool vs_in = shader->info.stage == MESA_SHADER_VERTEX &&
173 var->data.mode == nir_var_shader_in;
174 unsigned var_slots = glsl_count_attribute_slots(
175 get_per_vertex_type(shader, var, num_vertices), vs_in);
176 todo = MAX2(todo, var_slots);
177 num_vars++;
178 }
179 todo--;
180 slots++;
181 (*loc)++;
182 }
183
184 if (num_vars <= 1)
185 return NULL;
186
187 return glsl_array_type(glsl_vector_type(base, 4), slots, 0);
188 }
189
190 static bool
191 create_new_io_vars(nir_shader *shader, struct exec_list *io_list,
192 nir_variable *new_vars[MAX_SLOTS][4],
193 bool flat_vars[MAX_SLOTS])
194 {
195 if (exec_list_is_empty(io_list))
196 return false;
197
198 nir_variable *old_vars[MAX_SLOTS][4] = {{0}};
199
200 nir_foreach_variable(var, io_list) {
201 unsigned frac = var->data.location_frac;
202 old_vars[get_slot(var)][frac] = var;
203 }
204
205 bool merged_any_vars = false;
206
207 for (unsigned loc = 0; loc < MAX_SLOTS; loc++) {
208 unsigned frac = 0;
209 while (frac < 4) {
210 nir_variable *first_var = old_vars[loc][frac];
211 if (!first_var) {
212 frac++;
213 continue;
214 }
215
216 int first = frac;
217 bool found_merge = false;
218
219 while (frac < 4) {
220 nir_variable *var = old_vars[loc][frac];
221 if (!var)
222 break;
223
224 if (var != first_var) {
225 if (!variables_can_merge(shader, first_var, var, true))
226 break;
227
228 found_merge = true;
229 }
230
231 const unsigned num_components =
232 glsl_get_components(glsl_without_array(var->type));
233 if (!num_components) {
234 assert(frac == 0);
235 frac++;
236 break; /* The type was a struct. */
237 }
238
239 /* We had better not have any overlapping vars */
240 for (unsigned i = 1; i < num_components; i++)
241 assert(old_vars[loc][frac + i] == NULL);
242
243 frac += num_components;
244 }
245
246 if (!found_merge)
247 continue;
248
249 merged_any_vars = true;
250
251 nir_variable *var = nir_variable_clone(old_vars[loc][first], shader);
252 var->data.location_frac = first;
253 var->type = resize_array_vec_type(var->type, frac - first);
254
255 nir_shader_add_variable(shader, var);
256 for (unsigned i = first; i < frac; i++) {
257 new_vars[loc][i] = var;
258 old_vars[loc][i] = NULL;
259 }
260
261 old_vars[loc][first] = var;
262 }
263 }
264
265 /* "flat" mode: tries to ensure there is at most one variable per slot by
266 * merging variables into vec4s
267 */
268 for (unsigned loc = 0; loc < MAX_SLOTS;) {
269 nir_variable *first_var;
270 unsigned num_vertices;
271 unsigned new_loc = loc;
272 const struct glsl_type *flat_type =
273 get_flat_type(shader, old_vars, &new_loc, &first_var, &num_vertices);
274 if (flat_type) {
275 merged_any_vars = true;
276
277 nir_variable *var = nir_variable_clone(first_var, shader);
278 var->data.location_frac = 0;
279 if (num_vertices)
280 var->type = glsl_array_type(flat_type, num_vertices, 0);
281 else
282 var->type = flat_type;
283
284 nir_shader_add_variable(shader, var);
285 for (unsigned i = 0; i < glsl_get_length(flat_type); i++) {
286 for (unsigned j = 0; j < 4; j++)
287 new_vars[loc + i][j] = var;
288 flat_vars[loc + i] = true;
289 }
290 }
291 loc = new_loc;
292 }
293
294 return merged_any_vars;
295 }
296
297 static nir_deref_instr *
298 build_array_deref_of_new_var(nir_builder *b, nir_variable *new_var,
299 nir_deref_instr *leader)
300 {
301 if (leader->deref_type == nir_deref_type_var)
302 return nir_build_deref_var(b, new_var);
303
304 nir_deref_instr *parent =
305 build_array_deref_of_new_var(b, new_var, nir_deref_instr_parent(leader));
306
307 return nir_build_deref_follower(b, parent, leader);
308 }
309
310 static nir_ssa_def *
311 build_array_index(nir_builder *b, nir_deref_instr *deref, nir_ssa_def *base,
312 bool vs_in)
313 {
314 switch (deref->deref_type) {
315 case nir_deref_type_var:
316 return base;
317 case nir_deref_type_array: {
318 nir_ssa_def *index = nir_i2i(b, deref->arr.index.ssa,
319 deref->dest.ssa.bit_size);
320 return nir_iadd(
321 b, build_array_index(b, nir_deref_instr_parent(deref), base, vs_in),
322 nir_imul_imm(b, index, glsl_count_attribute_slots(deref->type, vs_in)));
323 }
324 default:
325 unreachable("Invalid deref instruction type");
326 }
327 }
328
329 static nir_deref_instr *
330 build_array_deref_of_new_var_flat(nir_shader *shader,
331 nir_builder *b, nir_variable *new_var,
332 nir_deref_instr *leader, unsigned base)
333 {
334 nir_deref_instr *deref = nir_build_deref_var(b, new_var);
335
336 if (nir_is_per_vertex_io(new_var, shader->info.stage)) {
337 assert(leader->deref_type == nir_deref_type_array);
338 nir_ssa_def *index = leader->arr.index.ssa;
339 leader = nir_deref_instr_parent(leader);
340 deref = nir_build_deref_array(b, deref, index);
341 }
342
343 bool vs_in = shader->info.stage == MESA_SHADER_VERTEX &&
344 new_var->data.mode == nir_var_shader_in;
345 return nir_build_deref_array(
346 b, deref, build_array_index(b, leader, nir_imm_int(b, base), vs_in));
347 }
348
349 static bool
350 nir_lower_io_to_vector_impl(nir_function_impl *impl, nir_variable_mode modes)
351 {
352 assert(!(modes & ~(nir_var_shader_in | nir_var_shader_out)));
353
354 nir_builder b;
355 nir_builder_init(&b, impl);
356
357 nir_metadata_require(impl, nir_metadata_dominance);
358
359 nir_shader *shader = impl->function->shader;
360 nir_variable *new_inputs[MAX_SLOTS][4] = {{0}};
361 nir_variable *new_outputs[MAX_SLOTS][4] = {{0}};
362 bool flat_inputs[MAX_SLOTS] = {0};
363 bool flat_outputs[MAX_SLOTS] = {0};
364
365 if (modes & nir_var_shader_in) {
366 /* Vertex shaders support overlapping inputs. We don't do those */
367 assert(b.shader->info.stage != MESA_SHADER_VERTEX);
368
369 /* If we don't actually merge any variables, remove that bit from modes
370 * so we don't bother doing extra non-work.
371 */
372 if (!create_new_io_vars(shader, &shader->inputs,
373 new_inputs, flat_inputs))
374 modes &= ~nir_var_shader_in;
375 }
376
377 if (modes & nir_var_shader_out) {
378 /* If we don't actually merge any variables, remove that bit from modes
379 * so we don't bother doing extra non-work.
380 */
381 if (!create_new_io_vars(shader, &shader->outputs,
382 new_outputs, flat_outputs))
383 modes &= ~nir_var_shader_out;
384 }
385
386 if (!modes)
387 return false;
388
389 bool progress = false;
390
391 /* Actually lower all the IO load/store intrinsics. Load instructions are
392 * lowered to a vector load and an ALU instruction to grab the channels we
393 * want. Outputs are lowered to a write-masked store of the vector output.
394 * For non-TCS outputs, we then run nir_lower_io_to_temporaries at the end
395 * to clean up the partial writes.
396 */
397 nir_foreach_block(block, impl) {
398 nir_foreach_instr_safe(instr, block) {
399 if (instr->type != nir_instr_type_intrinsic)
400 continue;
401
402 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
403
404 switch (intrin->intrinsic) {
405 case nir_intrinsic_load_deref:
406 case nir_intrinsic_interp_deref_at_centroid:
407 case nir_intrinsic_interp_deref_at_sample:
408 case nir_intrinsic_interp_deref_at_offset: {
409 nir_deref_instr *old_deref = nir_src_as_deref(intrin->src[0]);
410 if (!(old_deref->mode & modes))
411 break;
412
413 if (old_deref->mode == nir_var_shader_out)
414 assert(b.shader->info.stage == MESA_SHADER_TESS_CTRL ||
415 b.shader->info.stage == MESA_SHADER_FRAGMENT);
416
417 nir_variable *old_var = nir_deref_instr_get_variable(old_deref);
418
419 const unsigned loc = get_slot(old_var);
420 const unsigned old_frac = old_var->data.location_frac;
421 nir_variable *new_var = old_deref->mode == nir_var_shader_in ?
422 new_inputs[loc][old_frac] :
423 new_outputs[loc][old_frac];
424 bool flat = old_deref->mode == nir_var_shader_in ?
425 flat_inputs[loc] : flat_outputs[loc];
426 if (!new_var)
427 break;
428
429 const unsigned new_frac = new_var->data.location_frac;
430
431 nir_component_mask_t vec4_comp_mask =
432 ((1 << intrin->num_components) - 1) << old_frac;
433
434 b.cursor = nir_before_instr(&intrin->instr);
435
436 /* Rewrite the load to use the new variable and only select a
437 * portion of the result.
438 */
439 nir_deref_instr *new_deref;
440 if (flat) {
441 new_deref = build_array_deref_of_new_var_flat(
442 shader, &b, new_var, old_deref, loc - get_slot(new_var));
443 } else {
444 assert(get_slot(new_var) == loc);
445 new_deref = build_array_deref_of_new_var(&b, new_var, old_deref);
446 assert(glsl_type_is_vector(new_deref->type));
447 }
448 nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
449 nir_src_for_ssa(&new_deref->dest.ssa));
450
451 intrin->num_components =
452 glsl_get_components(new_deref->type);
453 intrin->dest.ssa.num_components = intrin->num_components;
454
455 b.cursor = nir_after_instr(&intrin->instr);
456
457 nir_ssa_def *new_vec = nir_channels(&b, &intrin->dest.ssa,
458 vec4_comp_mask >> new_frac);
459 nir_ssa_def_rewrite_uses_after(&intrin->dest.ssa,
460 nir_src_for_ssa(new_vec),
461 new_vec->parent_instr);
462
463 progress = true;
464 break;
465 }
466
467 case nir_intrinsic_store_deref: {
468 nir_deref_instr *old_deref = nir_src_as_deref(intrin->src[0]);
469 if (old_deref->mode != nir_var_shader_out)
470 break;
471
472 nir_variable *old_var = nir_deref_instr_get_variable(old_deref);
473
474 const unsigned loc = get_slot(old_var);
475 const unsigned old_frac = old_var->data.location_frac;
476 nir_variable *new_var = new_outputs[loc][old_frac];
477 bool flat = flat_outputs[loc];
478 if (!new_var)
479 break;
480
481 const unsigned new_frac = new_var->data.location_frac;
482
483 b.cursor = nir_before_instr(&intrin->instr);
484
485 /* Rewrite the store to be a masked store to the new variable */
486 nir_deref_instr *new_deref;
487 if (flat) {
488 new_deref = build_array_deref_of_new_var_flat(
489 shader, &b, new_var, old_deref, loc - get_slot(new_var));
490 } else {
491 assert(get_slot(new_var) == loc);
492 new_deref = build_array_deref_of_new_var(&b, new_var, old_deref);
493 assert(glsl_type_is_vector(new_deref->type));
494 }
495 nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
496 nir_src_for_ssa(&new_deref->dest.ssa));
497
498 intrin->num_components =
499 glsl_get_components(new_deref->type);
500
501 nir_component_mask_t old_wrmask = nir_intrinsic_write_mask(intrin);
502
503 assert(intrin->src[1].is_ssa);
504 nir_ssa_def *old_value = intrin->src[1].ssa;
505 nir_ssa_def *comps[4];
506 for (unsigned c = 0; c < intrin->num_components; c++) {
507 if (new_frac + c >= old_frac &&
508 (old_wrmask & 1 << (new_frac + c - old_frac))) {
509 comps[c] = nir_channel(&b, old_value,
510 new_frac + c - old_frac);
511 } else {
512 comps[c] = nir_ssa_undef(&b, old_value->num_components,
513 old_value->bit_size);
514 }
515 }
516 nir_ssa_def *new_value = nir_vec(&b, comps, intrin->num_components);
517 nir_instr_rewrite_src(&intrin->instr, &intrin->src[1],
518 nir_src_for_ssa(new_value));
519
520 nir_intrinsic_set_write_mask(intrin,
521 old_wrmask << (old_frac - new_frac));
522
523 progress = true;
524 break;
525 }
526
527 default:
528 break;
529 }
530 }
531 }
532
533 if (progress) {
534 nir_metadata_preserve(impl, nir_metadata_block_index |
535 nir_metadata_dominance);
536 }
537
538 return progress;
539 }
540
541 bool
542 nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode modes)
543 {
544 bool progress = false;
545
546 nir_foreach_function(function, shader) {
547 if (function->impl)
548 progress |= nir_lower_io_to_vector_impl(function->impl, modes);
549 }
550
551 return progress;
552 }