2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "nir/nir_builder.h"
26 #include "nir_constant_expressions.h"
27 #include "nir_control_flow.h"
28 #include "nir_loop_analyze.h"
30 static nir_ssa_def
*clone_alu_and_replace_src_defs(nir_builder
*b
,
31 const nir_alu_instr
*alu
,
32 nir_ssa_def
**src_defs
);
35 * Gets the single block that jumps back to the loop header. Already assumes
36 * there is exactly one such block.
39 find_continue_block(nir_loop
*loop
)
41 nir_block
*header_block
= nir_loop_first_block(loop
);
42 nir_block
*prev_block
=
43 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
45 assert(header_block
->predecessors
->entries
== 2);
47 set_foreach(header_block
->predecessors
, pred_entry
) {
48 if (pred_entry
->key
!= prev_block
)
49 return (nir_block
*)pred_entry
->key
;
52 unreachable("Continue block not found!");
56 * Does a phi have one constant value from outside a loop and one from inside?
59 phi_has_constant_from_outside_and_one_from_inside_loop(nir_phi_instr
*phi
,
60 const nir_block
*entry_block
,
64 /* We already know we have exactly one continue */
65 assert(exec_list_length(&phi
->srcs
) == 2);
68 *continue_val
= false;
70 nir_foreach_phi_src(src
, phi
) {
71 if (!nir_src_is_const(src
->src
))
74 if (src
->pred
!= entry_block
) {
75 *continue_val
= nir_src_as_bool(src
->src
);
77 *entry_val
= nir_src_as_bool(src
->src
);
85 * This optimization detects if statements at the tops of loops where the
86 * condition is a phi node of two constants and moves half of the if to above
87 * the loop and the other half of the if to the end of the loop. A simple for
88 * loop "for (int i = 0; i < 4; i++)", when run through the SPIR-V front-end,
89 * ends up looking something like this:
91 * vec1 32 ssa_0 = load_const (0x00000000)
92 * vec1 32 ssa_1 = load_const (0xffffffff)
95 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
96 * vec1 32 ssa_3 = phi block_0: ssa_0, block_7: ssa_1
99 * vec1 32 ssa_4 = load_const (0x00000001)
100 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
105 * vec1 32 ssa_6 = load_const (0x00000004)
106 * vec1 32 ssa_7 = ilt ssa_5, ssa_6
116 * This turns it into something like this:
118 * // Stuff from block 1
119 * // Stuff from block 3
122 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
123 * vec1 32 ssa_6 = load_const (0x00000004)
124 * vec1 32 ssa_7 = ilt ssa_2, ssa_6
132 * // Stuff from block 1
133 * // Stuff from block 2
134 * vec1 32 ssa_4 = load_const (0x00000001)
135 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
139 opt_peel_loop_initial_if(nir_loop
*loop
)
141 nir_block
*header_block
= nir_loop_first_block(loop
);
142 nir_block
*const prev_block
=
143 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
145 /* It would be insane if this were not true */
146 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
148 /* The loop must have exactly one continue block which could be a block
149 * ending in a continue instruction or the "natural" continue from the
150 * last block in the loop back to the top.
152 if (header_block
->predecessors
->entries
!= 2)
155 nir_cf_node
*if_node
= nir_cf_node_next(&header_block
->cf_node
);
156 if (!if_node
|| if_node
->type
!= nir_cf_node_if
)
159 nir_if
*nif
= nir_cf_node_as_if(if_node
);
160 assert(nif
->condition
.is_ssa
);
162 nir_ssa_def
*cond
= nif
->condition
.ssa
;
163 if (cond
->parent_instr
->type
!= nir_instr_type_phi
)
166 nir_phi_instr
*cond_phi
= nir_instr_as_phi(cond
->parent_instr
);
167 if (cond
->parent_instr
->block
!= header_block
)
170 bool entry_val
= false, continue_val
= false;
171 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
177 /* If they both execute or both don't execute, this is a job for
178 * nir_dead_cf, not this pass.
180 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
183 struct exec_list
*continue_list
, *entry_list
;
185 continue_list
= &nif
->then_list
;
186 entry_list
= &nif
->else_list
;
188 continue_list
= &nif
->else_list
;
189 entry_list
= &nif
->then_list
;
192 /* We want to be moving the contents of entry_list to above the loop so it
193 * can't contain any break or continue instructions.
195 foreach_list_typed(nir_cf_node
, cf_node
, node
, entry_list
) {
196 nir_foreach_block_in_cf_node(block
, cf_node
) {
197 nir_instr
*last_instr
= nir_block_last_instr(block
);
198 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
)
203 /* We're about to re-arrange a bunch of blocks so make sure that we don't
204 * have deref uses which cross block boundaries. We don't want a deref
205 * accidentally ending up in a phi.
207 nir_rematerialize_derefs_in_use_blocks_impl(
208 nir_cf_node_get_function(&loop
->cf_node
));
210 /* Before we do anything, convert the loop to LCSSA. We're about to
211 * replace a bunch of SSA defs with registers and this will prevent any of
212 * it from leaking outside the loop.
214 nir_convert_loop_to_lcssa(loop
);
216 nir_block
*after_if_block
=
217 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
219 /* Get rid of phis in the header block since we will be duplicating it */
220 nir_lower_phis_to_regs_block(header_block
);
221 /* Get rid of phis after the if since dominance will change */
222 nir_lower_phis_to_regs_block(after_if_block
);
224 /* Get rid of SSA defs in the pieces we're about to move around */
225 nir_lower_ssa_defs_to_regs_block(header_block
);
226 nir_foreach_block_in_cf_node(block
, &nif
->cf_node
)
227 nir_lower_ssa_defs_to_regs_block(block
);
229 nir_cf_list header
, tmp
;
230 nir_cf_extract(&header
, nir_before_block(header_block
),
231 nir_after_block(header_block
));
233 nir_cf_list_clone(&tmp
, &header
, &loop
->cf_node
, NULL
);
234 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
235 nir_cf_extract(&tmp
, nir_before_cf_list(entry_list
),
236 nir_after_cf_list(entry_list
));
237 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
239 nir_cf_reinsert(&header
,
240 nir_after_block_before_jump(find_continue_block(loop
)));
242 bool continue_list_jumps
=
243 nir_block_ends_in_jump(exec_node_data(nir_block
,
244 exec_list_get_tail(continue_list
),
247 nir_cf_extract(&tmp
, nir_before_cf_list(continue_list
),
248 nir_after_cf_list(continue_list
));
250 /* Get continue block again as the previous reinsert might have removed the
251 * block. Also, if both the continue list and the continue block ends in
252 * jump instructions, removes the jump from the latter, as it will not be
253 * executed if we insert the continue list before it. */
255 nir_block
*continue_block
= find_continue_block(loop
);
257 if (continue_list_jumps
) {
258 nir_instr
*last_instr
= nir_block_last_instr(continue_block
);
259 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
)
260 nir_instr_remove(last_instr
);
263 nir_cf_reinsert(&tmp
,
264 nir_after_block_before_jump(continue_block
));
266 nir_cf_node_remove(&nif
->cf_node
);
272 alu_instr_is_comparison(const nir_alu_instr
*alu
)
287 return nir_alu_instr_is_comparison(alu
);
292 alu_instr_is_type_conversion(const nir_alu_instr
*alu
)
294 return nir_op_infos
[alu
->op
].num_inputs
== 1 &&
295 nir_op_infos
[alu
->op
].output_type
!= nir_op_infos
[alu
->op
].input_types
[0];
299 * Splits ALU instructions that have a source that is a phi node
301 * ALU instructions in the header block of a loop that meet the following
302 * criteria can be split.
304 * - The loop has no continue instructions other than the "natural" continue
305 * at the bottom of the loop.
307 * - At least one source of the instruction is a phi node from the header block.
309 * - The phi node selects a constant or undef from the block before the loop.
311 * - Any non-phi sources of the ALU instruction come from a block that
312 * dominates the block before the loop. The most common failure mode for
313 * this check is sources that are generated in the loop header block.
315 * The split process splits the original ALU instruction into two, one at the
316 * bottom of the loop and one at the block before the loop. The instruction
317 * before the loop computes the value on the first iteration, and the
318 * instruction at the bottom computes the value on the second, third, and so
319 * on. A new phi node is added to the header block that selects either the
320 * instruction before the loop or the one at the end, and uses of the original
321 * instruction are replaced by this phi.
323 * The splitting transforms a loop like:
325 * vec1 32 ssa_8 = load_const (0x00000001)
326 * vec1 32 ssa_10 = load_const (0x00000000)
330 * // preds: block_0 block_4
331 * vec1 32 ssa_11 = phi block_0: ssa_10, block_4: ssa_15
332 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
333 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
334 * vec1 32 ssa_14 = iadd ssa_11, ssa_8
335 * vec1 32 ssa_15 = b32csel ssa_13, ssa_14, ssa_12
342 * vec1 32 ssa_8 = load_const (0x00000001)
343 * vec1 32 ssa_10 = load_const (0x00000000)
344 * vec1 32 ssa_22 = iadd ssa_10, ssa_8
348 * // preds: block_0 block_4
349 * vec1 32 ssa_11 = phi block_0: ssa_10, block_4: ssa_15
350 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
351 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
352 * vec1 32 ssa_21 = phi block_0: ssa_22, block_4: ssa_20
353 * vec1 32 ssa_15 = b32csel ssa_13, ssa_21, ssa_12
355 * vec1 32 ssa_20 = iadd ssa_15, ssa_8
360 opt_split_alu_of_phi(nir_builder
*b
, nir_loop
*loop
)
362 bool progress
= false;
363 nir_block
*header_block
= nir_loop_first_block(loop
);
364 nir_block
*const prev_block
=
365 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
367 /* It would be insane if this were not true */
368 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
370 /* The loop must have exactly one continue block which could be a block
371 * ending in a continue instruction or the "natural" continue from the
372 * last block in the loop back to the top.
374 if (header_block
->predecessors
->entries
!= 2)
377 nir_foreach_instr_safe(instr
, header_block
) {
378 if (instr
->type
!= nir_instr_type_alu
)
381 nir_alu_instr
*const alu
= nir_instr_as_alu(instr
);
383 /* nir_op_vec{2,3,4} and nir_op_mov are excluded because they can easily
384 * lead to infinite optimization loops. Splitting comparisons can lead
385 * to loop unrolling not recognizing loop termintators, and type
386 * conversions also lead to regressions.
388 if (nir_op_is_vec(alu
->op
) ||
389 alu_instr_is_comparison(alu
) ||
390 alu_instr_is_type_conversion(alu
))
393 bool has_phi_src_from_prev_block
= false;
394 bool all_non_phi_exist_in_prev_block
= true;
395 bool is_prev_result_undef
= true;
396 bool is_prev_result_const
= true;
397 nir_ssa_def
*prev_srcs
[8]; // FINISHME: Array size?
398 nir_ssa_def
*continue_srcs
[8]; // FINISHME: Array size?
400 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
401 nir_instr
*const src_instr
= alu
->src
[i
].src
.ssa
->parent_instr
;
403 /* If the source is a phi in the loop header block, then the
404 * prev_srcs and continue_srcs will come from the different sources
407 if (src_instr
->type
== nir_instr_type_phi
&&
408 src_instr
->block
== header_block
) {
409 nir_phi_instr
*const phi
= nir_instr_as_phi(src_instr
);
411 /* Only strictly need to NULL out the pointers when the assertions
412 * (below) are compiled in. Debugging a NULL pointer deref in the
413 * wild is easier than debugging a random pointer deref, so set
414 * NULL unconditionally just to be safe.
417 continue_srcs
[i
] = NULL
;
419 nir_foreach_phi_src(src_of_phi
, phi
) {
420 if (src_of_phi
->pred
== prev_block
) {
421 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
422 nir_instr_type_ssa_undef
) {
423 is_prev_result_undef
= false;
426 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
427 nir_instr_type_load_const
) {
428 is_prev_result_const
= false;
431 prev_srcs
[i
] = src_of_phi
->src
.ssa
;
432 has_phi_src_from_prev_block
= true;
434 continue_srcs
[i
] = src_of_phi
->src
.ssa
;
437 assert(prev_srcs
[i
] != NULL
);
438 assert(continue_srcs
[i
] != NULL
);
440 /* If the source is not a phi (or a phi in a block other than the
441 * loop header), then the value must exist in prev_block.
443 if (!nir_block_dominates(src_instr
->block
, prev_block
)) {
444 all_non_phi_exist_in_prev_block
= false;
448 prev_srcs
[i
] = alu
->src
[i
].src
.ssa
;
449 continue_srcs
[i
] = alu
->src
[i
].src
.ssa
;
453 if (has_phi_src_from_prev_block
&& all_non_phi_exist_in_prev_block
&&
454 (is_prev_result_undef
|| is_prev_result_const
)) {
455 nir_block
*const continue_block
= find_continue_block(loop
);
457 b
->cursor
= nir_after_block(prev_block
);
458 nir_ssa_def
*prev_value
= clone_alu_and_replace_src_defs(b
, alu
, prev_srcs
);
460 /* Make a copy of the original ALU instruction. Replace the sources
461 * of the new instruction that read a phi with an undef source from
462 * prev_block with the non-undef source of that phi.
464 * Insert the new instruction at the end of the continue block.
466 b
->cursor
= nir_after_block_before_jump(continue_block
);
468 nir_ssa_def
*const alu_copy
=
469 clone_alu_and_replace_src_defs(b
, alu
, continue_srcs
);
471 /* Make a new phi node that selects a value from prev_block and the
472 * result of the new instruction from continue_block.
474 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
475 nir_phi_src
*phi_src
;
477 phi_src
= ralloc(phi
, nir_phi_src
);
478 phi_src
->pred
= prev_block
;
479 phi_src
->src
= nir_src_for_ssa(prev_value
);
480 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
482 phi_src
= ralloc(phi
, nir_phi_src
);
483 phi_src
->pred
= continue_block
;
484 phi_src
->src
= nir_src_for_ssa(alu_copy
);
485 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
487 nir_ssa_dest_init(&phi
->instr
, &phi
->dest
,
488 alu_copy
->num_components
, alu_copy
->bit_size
, NULL
);
490 b
->cursor
= nir_after_phis(header_block
);
491 nir_builder_instr_insert(b
, &phi
->instr
);
493 /* Modify all readers of the original ALU instruction to read the
496 nir_foreach_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
497 nir_instr_rewrite_src(use_src
->parent_instr
,
499 nir_src_for_ssa(&phi
->dest
.ssa
));
502 nir_foreach_if_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
503 nir_if_rewrite_condition(use_src
->parent_if
,
504 nir_src_for_ssa(&phi
->dest
.ssa
));
507 /* Since the original ALU instruction no longer has any readers, just
510 nir_instr_remove_v(&alu
->instr
);
521 * Get the SSA value from a phi node that corresponds to a specific block
524 ssa_for_phi_from_block(nir_phi_instr
*phi
, nir_block
*block
)
526 nir_foreach_phi_src(src
, phi
) {
527 if (src
->pred
== block
)
531 assert(!"Block is not a predecessor of phi.");
536 * Simplify a bcsel whose sources are all phi nodes from the loop header block
538 * bcsel instructions in a loop that meet the following criteria can be
539 * converted to phi nodes:
541 * - The loop has no continue instructions other than the "natural" continue
542 * at the bottom of the loop.
544 * - All of the sources of the bcsel are phi nodes in the header block of the
547 * - The phi node representing the condition of the bcsel instruction chooses
548 * only constant values.
550 * The contant value from the condition will select one of the other sources
551 * when entered from outside the loop and the remaining source when entered
552 * from the continue block. Since each of these sources is also a phi node in
553 * the header block, the value of the phi node can be "evaluated." These
554 * evaluated phi nodes provide the sources for a new phi node. All users of
555 * the bcsel result are updated to use the phi node result.
557 * The replacement transforms loops like:
559 * vec1 32 ssa_7 = undefined
560 * vec1 32 ssa_8 = load_const (0x00000001)
561 * vec1 32 ssa_9 = load_const (0x000000c8)
562 * vec1 32 ssa_10 = load_const (0x00000000)
566 * // preds: block_0 block_4
567 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
568 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
569 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
570 * vec1 32 ssa_14 = b32csel ssa_12, ssa_13, ssa_11
571 * vec1 32 ssa_16 = ige32 ssa_14, ssa_9
573 * vec1 32 ssa_15 = load_const (0xffffffff)
575 * vec1 32 ssa_25 = iadd ssa_14, ssa_8
581 * vec1 32 ssa_7 = undefined
582 * vec1 32 ssa_8 = load_const (0x00000001)
583 * vec1 32 ssa_9 = load_const (0x000000c8)
584 * vec1 32 ssa_10 = load_const (0x00000000)
588 * // preds: block_0 block_4
589 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
590 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
591 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
592 * vec1 32 sss_26 = phi block_0: ssa_1, block_4: ssa_25
593 * vec1 32 ssa_16 = ige32 ssa_26, ssa_9
595 * vec1 32 ssa_15 = load_const (0xffffffff)
597 * vec1 32 ssa_25 = iadd ssa_26, ssa_8
602 * It may be possible modify this function to not require a phi node as the
603 * source of the bcsel that is selected when entering from outside the loop.
604 * The only restriction is that the source must be geneated outside the loop
605 * (since it will become the source of a phi node in the header block of the
609 opt_simplify_bcsel_of_phi(nir_builder
*b
, nir_loop
*loop
)
611 bool progress
= false;
612 nir_block
*header_block
= nir_loop_first_block(loop
);
613 nir_block
*const prev_block
=
614 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
616 /* It would be insane if this were not true */
617 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
619 /* The loop must have exactly one continue block which could be a block
620 * ending in a continue instruction or the "natural" continue from the
621 * last block in the loop back to the top.
623 if (header_block
->predecessors
->entries
!= 2)
626 /* We can move any bcsel that can guaranteed to execut on every iteration
627 * of a loop. For now this is accomplished by only taking bcsels from the
628 * header_block. In the future, this could be expanced to include any
629 * bcsel that must come before any break.
631 * For more details, see
632 * https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/170#note_110305
634 nir_foreach_instr_safe(instr
, header_block
) {
635 if (instr
->type
!= nir_instr_type_alu
)
638 nir_alu_instr
*const bcsel
= nir_instr_as_alu(instr
);
639 if (bcsel
->op
!= nir_op_bcsel
&&
640 bcsel
->op
!= nir_op_b32csel
&&
641 bcsel
->op
!= nir_op_fcsel
)
645 for (unsigned i
= 0; i
< 3; i
++) {
646 /* FINISHME: The abs and negate cases could be handled by adding
647 * move instructions at the bottom of the continue block and more
648 * phi nodes in the header_block.
650 if (!bcsel
->src
[i
].src
.is_ssa
||
651 bcsel
->src
[i
].src
.ssa
->parent_instr
->type
!= nir_instr_type_phi
||
652 bcsel
->src
[i
].src
.ssa
->parent_instr
->block
!= header_block
||
653 bcsel
->src
[i
].negate
|| bcsel
->src
[i
].abs
) {
662 nir_phi_instr
*const cond_phi
=
663 nir_instr_as_phi(bcsel
->src
[0].src
.ssa
->parent_instr
);
665 bool entry_val
= false, continue_val
= false;
666 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
672 /* If they both execute or both don't execute, this is a job for
673 * nir_dead_cf, not this pass.
675 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
678 const unsigned entry_src
= entry_val
? 1 : 2;
679 const unsigned continue_src
= entry_val
? 2 : 1;
681 /* Create a new phi node that selects the value for prev_block from
682 * the bcsel source that is selected by entry_val and the value for
683 * continue_block from the other bcsel source. Both sources have
684 * already been verified to be phi nodes.
686 nir_block
*const continue_block
= find_continue_block(loop
);
687 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
688 nir_phi_src
*phi_src
;
690 phi_src
= ralloc(phi
, nir_phi_src
);
691 phi_src
->pred
= prev_block
;
693 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[entry_src
].src
.ssa
->parent_instr
),
695 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
697 phi_src
= ralloc(phi
, nir_phi_src
);
698 phi_src
->pred
= continue_block
;
700 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[continue_src
].src
.ssa
->parent_instr
),
702 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
704 nir_ssa_dest_init(&phi
->instr
,
706 nir_dest_num_components(bcsel
->dest
.dest
),
707 nir_dest_bit_size(bcsel
->dest
.dest
),
710 b
->cursor
= nir_after_phis(header_block
);
711 nir_builder_instr_insert(b
, &phi
->instr
);
713 /* Modify all readers of the bcsel instruction to read the result of
716 nir_foreach_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
717 nir_instr_rewrite_src(use_src
->parent_instr
,
719 nir_src_for_ssa(&phi
->dest
.ssa
));
722 nir_foreach_if_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
723 nir_if_rewrite_condition(use_src
->parent_if
,
724 nir_src_for_ssa(&phi
->dest
.ssa
));
727 /* Since the original bcsel instruction no longer has any readers,
730 nir_instr_remove_v(&bcsel
->instr
);
740 is_block_empty(nir_block
*block
)
742 return nir_cf_node_is_last(&block
->cf_node
) &&
743 exec_list_is_empty(&block
->instr_list
);
747 nir_block_ends_in_continue(nir_block
*block
)
749 if (exec_list_is_empty(&block
->instr_list
))
752 nir_instr
*instr
= nir_block_last_instr(block
);
753 return instr
->type
== nir_instr_type_jump
&&
754 nir_instr_as_jump(instr
)->type
== nir_jump_continue
;
758 * This optimization turns:
782 * The continue should then be removed by nir_opt_trivial_continues() and the
783 * loop can potentially be unrolled.
785 * Note: Unless the function param aggressive_last_continue==true do_work_2()
786 * is only ever blocks and nested loops. We avoid nesting other if-statments
787 * in the branch as this can result in increased register pressure, and in
788 * the i965 driver it causes a large amount of spilling in shader-db.
789 * For RADV however nesting these if-statements allows further continues to be
790 * remove and provides a significant FPS boost in Doom, which is why we have
791 * opted for this special bool to enable more aggresive optimisations.
792 * TODO: The GCM pass solves most of the spilling regressions in i965, if it
793 * is ever enabled we should consider removing the aggressive_last_continue
797 opt_if_loop_last_continue(nir_loop
*loop
, bool aggressive_last_continue
)
800 bool then_ends_in_continue
= false;
801 bool else_ends_in_continue
= false;
803 /* Scan the control flow of the loop from the last to the first node
804 * looking for an if-statement we can optimise.
806 nir_block
*last_block
= nir_loop_last_block(loop
);
807 nir_cf_node
*if_node
= nir_cf_node_prev(&last_block
->cf_node
);
809 if (if_node
->type
== nir_cf_node_if
) {
810 nif
= nir_cf_node_as_if(if_node
);
811 nir_block
*then_block
= nir_if_last_then_block(nif
);
812 nir_block
*else_block
= nir_if_last_else_block(nif
);
814 then_ends_in_continue
= nir_block_ends_in_continue(then_block
);
815 else_ends_in_continue
= nir_block_ends_in_continue(else_block
);
817 /* If both branches end in a jump do nothing, this should be handled
818 * by nir_opt_dead_cf().
820 if ((then_ends_in_continue
|| nir_block_ends_in_break(then_block
)) &&
821 (else_ends_in_continue
|| nir_block_ends_in_break(else_block
)))
824 /* If continue found stop scanning and attempt optimisation, or
826 if (then_ends_in_continue
|| else_ends_in_continue
||
827 !aggressive_last_continue
)
831 if_node
= nir_cf_node_prev(if_node
);
834 /* If we didn't find an if to optimise return */
835 if (!then_ends_in_continue
&& !else_ends_in_continue
)
838 /* If there is nothing after the if-statement we bail */
839 if (&nif
->cf_node
== nir_cf_node_prev(&last_block
->cf_node
) &&
840 exec_list_is_empty(&last_block
->instr_list
))
843 /* Move the last block of the loop inside the last if-statement */
845 nir_cf_extract(&tmp
, nir_after_cf_node(if_node
),
846 nir_after_block(last_block
));
847 if (then_ends_in_continue
)
848 nir_cf_reinsert(&tmp
, nir_after_cf_list(&nif
->else_list
));
850 nir_cf_reinsert(&tmp
, nir_after_cf_list(&nif
->then_list
));
852 /* In order to avoid running nir_lower_regs_to_ssa_impl() every time an if
853 * opt makes progress we leave nir_opt_trivial_continues() to remove the
854 * continue now that the end of the loop has been simplified.
860 /* Walk all the phis in the block immediately following the if statement and
864 rewrite_phi_predecessor_blocks(nir_if
*nif
,
865 nir_block
*old_then_block
,
866 nir_block
*old_else_block
,
867 nir_block
*new_then_block
,
868 nir_block
*new_else_block
)
870 nir_block
*after_if_block
=
871 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
873 nir_foreach_instr(instr
, after_if_block
) {
874 if (instr
->type
!= nir_instr_type_phi
)
877 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
879 foreach_list_typed(nir_phi_src
, src
, node
, &phi
->srcs
) {
880 if (src
->pred
== old_then_block
) {
881 src
->pred
= new_then_block
;
882 } else if (src
->pred
== old_else_block
) {
883 src
->pred
= new_else_block
;
890 * This optimization turns:
905 opt_if_simplification(nir_builder
*b
, nir_if
*nif
)
907 /* Only simplify if the then block is empty and the else block is not. */
908 if (!is_block_empty(nir_if_first_then_block(nif
)) ||
909 is_block_empty(nir_if_first_else_block(nif
)))
912 /* Make sure the condition is a comparison operation. */
913 nir_instr
*src_instr
= nif
->condition
.ssa
->parent_instr
;
914 if (src_instr
->type
!= nir_instr_type_alu
)
917 nir_alu_instr
*alu_instr
= nir_instr_as_alu(src_instr
);
918 if (!nir_alu_instr_is_comparison(alu_instr
))
921 /* Insert the inverted instruction and rewrite the condition. */
922 b
->cursor
= nir_after_instr(&alu_instr
->instr
);
924 nir_ssa_def
*new_condition
=
925 nir_inot(b
, &alu_instr
->dest
.dest
.ssa
);
927 nir_if_rewrite_condition(nif
, nir_src_for_ssa(new_condition
));
929 /* Grab pointers to the last then/else blocks for fixing up the phis. */
930 nir_block
*then_block
= nir_if_last_then_block(nif
);
931 nir_block
*else_block
= nir_if_last_else_block(nif
);
933 if (nir_block_ends_in_jump(else_block
)) {
934 /* Even though this if statement has a jump on one side, we may still have
935 * phis afterwards. Single-source phis can be produced by loop unrolling
936 * or dead control-flow passes and are perfectly legal. Run a quick phi
937 * removal on the block after the if to clean up any such phis.
939 nir_block
*const next_block
=
940 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
941 nir_opt_remove_phis_block(next_block
);
944 rewrite_phi_predecessor_blocks(nif
, then_block
, else_block
, else_block
,
947 /* Finally, move the else block to the then block. */
949 nir_cf_extract(&tmp
, nir_before_cf_list(&nif
->else_list
),
950 nir_after_cf_list(&nif
->else_list
));
951 nir_cf_reinsert(&tmp
, nir_before_cf_list(&nif
->then_list
));
957 * This optimization simplifies potential loop terminators which then allows
958 * other passes such as opt_if_simplification() and loop unrolling to progress
962 * ... then block instructions ...
975 * ... then block instructions ...
978 opt_if_loop_terminator(nir_if
*nif
)
980 nir_block
*break_blk
= NULL
;
981 nir_block
*continue_from_blk
= NULL
;
982 bool continue_from_then
= true;
984 nir_block
*last_then
= nir_if_last_then_block(nif
);
985 nir_block
*last_else
= nir_if_last_else_block(nif
);
987 if (nir_block_ends_in_break(last_then
)) {
988 break_blk
= last_then
;
989 continue_from_blk
= last_else
;
990 continue_from_then
= false;
991 } else if (nir_block_ends_in_break(last_else
)) {
992 break_blk
= last_else
;
993 continue_from_blk
= last_then
;
996 /* Continue if the if-statement contained no jumps at all */
1000 /* If the continue from block is empty then return as there is nothing to
1003 nir_block
*first_continue_from_blk
= continue_from_then
?
1004 nir_if_first_then_block(nif
) :
1005 nir_if_first_else_block(nif
);
1006 if (is_block_empty(first_continue_from_blk
))
1009 if (nir_block_ends_in_jump(continue_from_blk
))
1012 /* Even though this if statement has a jump on one side, we may still have
1013 * phis afterwards. Single-source phis can be produced by loop unrolling
1014 * or dead control-flow passes and are perfectly legal. Run a quick phi
1015 * removal on the block after the if to clean up any such phis.
1017 nir_opt_remove_phis_block(nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
)));
1019 /* Finally, move the continue from branch after the if-statement. */
1021 nir_cf_extract(&tmp
, nir_before_block(first_continue_from_blk
),
1022 nir_after_block(continue_from_blk
));
1023 nir_cf_reinsert(&tmp
, nir_after_cf_node(&nif
->cf_node
));
1029 evaluate_if_condition(nir_if
*nif
, nir_cursor cursor
, bool *value
)
1031 nir_block
*use_block
= nir_cursor_current_block(cursor
);
1032 if (nir_block_dominates(nir_if_first_then_block(nif
), use_block
)) {
1035 } else if (nir_block_dominates(nir_if_first_else_block(nif
), use_block
)) {
1043 static nir_ssa_def
*
1044 clone_alu_and_replace_src_defs(nir_builder
*b
, const nir_alu_instr
*alu
,
1045 nir_ssa_def
**src_defs
)
1047 nir_alu_instr
*nalu
= nir_alu_instr_create(b
->shader
, alu
->op
);
1048 nalu
->exact
= alu
->exact
;
1050 nir_ssa_dest_init(&nalu
->instr
, &nalu
->dest
.dest
,
1051 alu
->dest
.dest
.ssa
.num_components
,
1052 alu
->dest
.dest
.ssa
.bit_size
, alu
->dest
.dest
.ssa
.name
);
1054 nalu
->dest
.saturate
= alu
->dest
.saturate
;
1055 nalu
->dest
.write_mask
= alu
->dest
.write_mask
;
1057 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1058 assert(alu
->src
[i
].src
.is_ssa
);
1059 nalu
->src
[i
].src
= nir_src_for_ssa(src_defs
[i
]);
1060 nalu
->src
[i
].negate
= alu
->src
[i
].negate
;
1061 nalu
->src
[i
].abs
= alu
->src
[i
].abs
;
1062 memcpy(nalu
->src
[i
].swizzle
, alu
->src
[i
].swizzle
,
1063 sizeof(nalu
->src
[i
].swizzle
));
1066 nir_builder_instr_insert(b
, &nalu
->instr
);
1068 return &nalu
->dest
.dest
.ssa
;;
1072 * This propagates if condition evaluation down the chain of some alu
1073 * instructions. For example by checking the use of some of the following alu
1074 * instruction we can eventually replace ssa_107 with NIR_TRUE.
1078 * vec1 32 ssa_85 = load_const (0x00000002)
1079 * vec1 32 ssa_86 = ieq ssa_48, ssa_85
1080 * vec1 32 ssa_87 = load_const (0x00000001)
1081 * vec1 32 ssa_88 = ieq ssa_48, ssa_87
1082 * vec1 32 ssa_89 = ior ssa_86, ssa_88
1083 * vec1 32 ssa_90 = ieq ssa_48, ssa_0
1084 * vec1 32 ssa_91 = ior ssa_89, ssa_90
1109 * vec1 32 ssa_107 = inot ssa_91
1119 propagate_condition_eval(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1120 nir_src
*alu_use
, nir_alu_instr
*alu
,
1121 bool is_if_condition
)
1124 b
->cursor
= nir_before_src(alu_use
, is_if_condition
);
1125 if (!evaluate_if_condition(nif
, b
->cursor
, &bool_value
))
1128 nir_ssa_def
*def
[4] = {0};
1129 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1130 if (alu
->src
[i
].src
.ssa
== use_src
->ssa
) {
1131 def
[i
] = nir_imm_bool(b
, bool_value
);
1133 def
[i
] = alu
->src
[i
].src
.ssa
;
1137 nir_ssa_def
*nalu
= clone_alu_and_replace_src_defs(b
, alu
, def
);
1139 /* Rewrite use to use new alu instruction */
1140 nir_src new_src
= nir_src_for_ssa(nalu
);
1142 if (is_if_condition
)
1143 nir_if_rewrite_condition(alu_use
->parent_if
, new_src
);
1145 nir_instr_rewrite_src(alu_use
->parent_instr
, alu_use
, new_src
);
1151 can_propagate_through_alu(nir_src
*src
)
1153 if (src
->parent_instr
->type
!= nir_instr_type_alu
)
1156 nir_alu_instr
*alu
= nir_instr_as_alu(src
->parent_instr
);
1164 return src
== &alu
->src
[0].src
;
1171 evaluate_condition_use(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1172 bool is_if_condition
)
1174 bool progress
= false;
1176 b
->cursor
= nir_before_src(use_src
, is_if_condition
);
1179 if (evaluate_if_condition(nif
, b
->cursor
, &bool_value
)) {
1180 /* Rewrite use to use const */
1181 nir_src imm_src
= nir_src_for_ssa(nir_imm_bool(b
, bool_value
));
1182 if (is_if_condition
)
1183 nir_if_rewrite_condition(use_src
->parent_if
, imm_src
);
1185 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, imm_src
);
1190 if (!is_if_condition
&& can_propagate_through_alu(use_src
)) {
1191 nir_alu_instr
*alu
= nir_instr_as_alu(use_src
->parent_instr
);
1193 nir_foreach_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1194 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1198 nir_foreach_if_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1199 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1208 opt_if_evaluate_condition_use(nir_builder
*b
, nir_if
*nif
)
1210 bool progress
= false;
1212 /* Evaluate any uses of the if condition inside the if branches */
1213 assert(nif
->condition
.is_ssa
);
1214 nir_foreach_use_safe(use_src
, nif
->condition
.ssa
) {
1215 progress
|= evaluate_condition_use(b
, nif
, use_src
, false);
1218 nir_foreach_if_use_safe(use_src
, nif
->condition
.ssa
) {
1219 if (use_src
->parent_if
!= nif
)
1220 progress
|= evaluate_condition_use(b
, nif
, use_src
, true);
1227 simple_merge_if(nir_if
*dest_if
, nir_if
*src_if
, bool dest_if_then
,
1230 /* Now merge the if branch */
1231 nir_block
*dest_blk
= dest_if_then
? nir_if_last_then_block(dest_if
)
1232 : nir_if_last_else_block(dest_if
);
1234 struct exec_list
*list
= src_if_then
? &src_if
->then_list
1235 : &src_if
->else_list
;
1237 nir_cf_list if_cf_list
;
1238 nir_cf_extract(&if_cf_list
, nir_before_cf_list(list
),
1239 nir_after_cf_list(list
));
1240 nir_cf_reinsert(&if_cf_list
, nir_after_block(dest_blk
));
1244 opt_if_merge(nir_if
*nif
)
1246 bool progress
= false;
1248 nir_block
*next_blk
= nir_cf_node_cf_tree_next(&nif
->cf_node
);
1249 if (next_blk
&& nif
->condition
.is_ssa
) {
1250 nir_if
*next_if
= nir_block_get_following_if(next_blk
);
1251 if (next_if
&& next_if
->condition
.is_ssa
) {
1253 /* Here we merge two consecutive ifs that have the same
1267 * Note: This only merges if-statements when the block between them
1268 * is empty. The reason we don't try to merge ifs that just have phis
1269 * between them is because this can results in increased register
1270 * pressure. For example when merging if ladders created by indirect
1273 if (nif
->condition
.ssa
== next_if
->condition
.ssa
&&
1274 exec_list_is_empty(&next_blk
->instr_list
)) {
1276 simple_merge_if(nif
, next_if
, true, true);
1277 simple_merge_if(nif
, next_if
, false, false);
1279 nir_block
*new_then_block
= nir_if_last_then_block(nif
);
1280 nir_block
*new_else_block
= nir_if_last_else_block(nif
);
1282 nir_block
*old_then_block
= nir_if_last_then_block(next_if
);
1283 nir_block
*old_else_block
= nir_if_last_else_block(next_if
);
1285 /* Rewrite the predecessor block for any phis following the second
1288 rewrite_phi_predecessor_blocks(next_if
, old_then_block
,
1293 /* Move phis after merged if to avoid them being deleted when we
1294 * remove the merged if-statement.
1296 nir_block
*after_next_if_block
=
1297 nir_cf_node_as_block(nir_cf_node_next(&next_if
->cf_node
));
1299 nir_foreach_instr_safe(instr
, after_next_if_block
) {
1300 if (instr
->type
!= nir_instr_type_phi
)
1303 exec_node_remove(&instr
->node
);
1304 exec_list_push_tail(&next_blk
->instr_list
, &instr
->node
);
1305 instr
->block
= next_blk
;
1308 nir_cf_node_remove(&next_if
->cf_node
);
1319 opt_if_cf_list(nir_builder
*b
, struct exec_list
*cf_list
,
1320 bool aggressive_last_continue
)
1322 bool progress
= false;
1323 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1324 switch (cf_node
->type
) {
1325 case nir_cf_node_block
:
1328 case nir_cf_node_if
: {
1329 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1330 progress
|= opt_if_cf_list(b
, &nif
->then_list
,
1331 aggressive_last_continue
);
1332 progress
|= opt_if_cf_list(b
, &nif
->else_list
,
1333 aggressive_last_continue
);
1334 progress
|= opt_if_loop_terminator(nif
);
1335 progress
|= opt_if_merge(nif
);
1336 progress
|= opt_if_simplification(b
, nif
);
1340 case nir_cf_node_loop
: {
1341 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1342 progress
|= opt_if_cf_list(b
, &loop
->body
,
1343 aggressive_last_continue
);
1344 progress
|= opt_simplify_bcsel_of_phi(b
, loop
);
1345 progress
|= opt_if_loop_last_continue(loop
,
1346 aggressive_last_continue
);
1350 case nir_cf_node_function
:
1351 unreachable("Invalid cf type");
1359 opt_peel_loop_initial_if_cf_list(struct exec_list
*cf_list
)
1361 bool progress
= false;
1362 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1363 switch (cf_node
->type
) {
1364 case nir_cf_node_block
:
1367 case nir_cf_node_if
: {
1368 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1369 progress
|= opt_peel_loop_initial_if_cf_list(&nif
->then_list
);
1370 progress
|= opt_peel_loop_initial_if_cf_list(&nif
->else_list
);
1374 case nir_cf_node_loop
: {
1375 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1376 progress
|= opt_peel_loop_initial_if_cf_list(&loop
->body
);
1377 progress
|= opt_peel_loop_initial_if(loop
);
1381 case nir_cf_node_function
:
1382 unreachable("Invalid cf type");
1390 * These optimisations depend on nir_metadata_block_index and therefore must
1391 * not do anything to cause the metadata to become invalid.
1394 opt_if_safe_cf_list(nir_builder
*b
, struct exec_list
*cf_list
)
1396 bool progress
= false;
1397 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1398 switch (cf_node
->type
) {
1399 case nir_cf_node_block
:
1402 case nir_cf_node_if
: {
1403 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1404 progress
|= opt_if_safe_cf_list(b
, &nif
->then_list
);
1405 progress
|= opt_if_safe_cf_list(b
, &nif
->else_list
);
1406 progress
|= opt_if_evaluate_condition_use(b
, nif
);
1410 case nir_cf_node_loop
: {
1411 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1412 progress
|= opt_if_safe_cf_list(b
, &loop
->body
);
1413 progress
|= opt_split_alu_of_phi(b
, loop
);
1417 case nir_cf_node_function
:
1418 unreachable("Invalid cf type");
1426 nir_opt_if(nir_shader
*shader
, bool aggressive_last_continue
)
1428 bool progress
= false;
1430 nir_foreach_function(function
, shader
) {
1431 if (function
->impl
== NULL
)
1435 nir_builder_init(&b
, function
->impl
);
1437 nir_metadata_require(function
->impl
, nir_metadata_block_index
|
1438 nir_metadata_dominance
);
1439 progress
= opt_if_safe_cf_list(&b
, &function
->impl
->body
);
1440 nir_metadata_preserve(function
->impl
, nir_metadata_block_index
|
1441 nir_metadata_dominance
);
1443 bool preserve
= true;
1445 if (opt_if_cf_list(&b
, &function
->impl
->body
, aggressive_last_continue
)) {
1450 if (opt_peel_loop_initial_if_cf_list(&function
->impl
->body
)) {
1454 /* If that made progress, we're no longer really in SSA form. We
1455 * need to convert registers back into SSA defs and clean up SSA defs
1456 * that don't dominate their uses.
1458 nir_lower_regs_to_ssa_impl(function
->impl
);
1462 nir_metadata_preserve(function
->impl
, nir_metadata_none
);
1464 nir_metadata_preserve(function
->impl
, nir_metadata_all
);