2 * Copyright (c) 2019 Etnaviv Project
3 * Copyright (c) 2019 Zodiac Inflight Innovations
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Christian Gmeiner <christian.gmeiner@gmail.com>
29 #include <sys/ioctl.h>
30 #include "drm-uapi/etnaviv_drm.h"
31 #include "drm-shim/drm_shim.h"
32 #include "util/u_debug.h"
37 const uint64_t *reg_map
;
40 static const struct etna_shim_gpu gpus
[] = {
43 .reg_map
= (const uint64_t[]){
44 [ETNAVIV_PARAM_GPU_MODEL
] = 0x400,
45 [ETNAVIV_PARAM_GPU_REVISION
] = 0x4652,
46 [ETNAVIV_PARAM_GPU_FEATURES_0
] = 0xa0e9e004,
47 [ETNAVIV_PARAM_GPU_FEATURES_1
] = 0xe1299fff,
48 [ETNAVIV_PARAM_GPU_FEATURES_2
] = 0xbe13b219,
49 [ETNAVIV_PARAM_GPU_FEATURES_3
] = 0xce110010,
50 [ETNAVIV_PARAM_GPU_FEATURES_4
] = 0x8000001,
51 [ETNAVIV_PARAM_GPU_FEATURES_5
] = 0x20102,
52 [ETNAVIV_PARAM_GPU_FEATURES_6
] = 0x120000,
53 [ETNAVIV_PARAM_GPU_FEATURES_7
] = 0x0,
54 [ETNAVIV_PARAM_GPU_STREAM_COUNT
] = 0x4,
55 [ETNAVIV_PARAM_GPU_REGISTER_MAX
] = 0x40,
56 [ETNAVIV_PARAM_GPU_THREAD_COUNT
] = 0x80,
57 [ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE
] = 0x8,
58 [ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT
] = 0x1,
59 [ETNAVIV_PARAM_GPU_PIXEL_PIPES
] = 0x1,
60 [ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE
] = 0x80,
61 [ETNAVIV_PARAM_GPU_BUFFER_SIZE
] = 0x0,
62 [ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT
] = 0x100,
63 [ETNAVIV_PARAM_GPU_NUM_CONSTANTS
] = 0x140,
64 [ETNAVIV_PARAM_GPU_NUM_VARYINGS
] = 0x8,
65 [ETNAVIV_PARAM_SOFTPIN_START_ADDR
] = ~0ULL,
70 .reg_map
= (const uint64_t[]){
71 [ETNAVIV_PARAM_GPU_MODEL
] = 0x2000,
72 [ETNAVIV_PARAM_GPU_REVISION
] = 0x5108,
73 [ETNAVIV_PARAM_GPU_FEATURES_0
] = 0xe0296cad,
74 [ETNAVIV_PARAM_GPU_FEATURES_1
] = 0xc9799eff,
75 [ETNAVIV_PARAM_GPU_FEATURES_2
] = 0x2efbf2d9,
76 [ETNAVIV_PARAM_GPU_FEATURES_3
] = 0x0,
77 [ETNAVIV_PARAM_GPU_FEATURES_4
] = 0x0,
78 [ETNAVIV_PARAM_GPU_FEATURES_5
] = 0x0,
79 [ETNAVIV_PARAM_GPU_FEATURES_6
] = 0x0,
80 [ETNAVIV_PARAM_GPU_FEATURES_7
] = 0x0,
81 [ETNAVIV_PARAM_GPU_STREAM_COUNT
] = 0x8,
82 [ETNAVIV_PARAM_GPU_REGISTER_MAX
] = 0x40,
83 [ETNAVIV_PARAM_GPU_THREAD_COUNT
] = 0x400,
84 [ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE
] = 0x10,
85 [ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT
] = 0x4,
86 [ETNAVIV_PARAM_GPU_PIXEL_PIPES
] = 0x2,
87 [ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE
] = 0x200,
88 [ETNAVIV_PARAM_GPU_BUFFER_SIZE
] = 0x0,
89 [ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT
] = 0x200,
90 [ETNAVIV_PARAM_GPU_NUM_CONSTANTS
] = 0xa8,
91 [ETNAVIV_PARAM_GPU_NUM_VARYINGS
] = 0xb,
92 [ETNAVIV_PARAM_SOFTPIN_START_ADDR
] = ~0ULL,
97 .reg_map
= (const uint64_t[]){
98 [ETNAVIV_PARAM_GPU_MODEL
] = 0x3000,
99 [ETNAVIV_PARAM_GPU_REVISION
] = 0x5450,
100 [ETNAVIV_PARAM_GPU_FEATURES_0
] = 0xe0287cad,
101 [ETNAVIV_PARAM_GPU_FEATURES_1
] = 0xc9799efb,
102 [ETNAVIV_PARAM_GPU_FEATURES_2
] = 0xfefbfadb,
103 [ETNAVIV_PARAM_GPU_FEATURES_3
] = 0xeb9d4bbf,
104 [ETNAVIV_PARAM_GPU_FEATURES_4
] = 0xedffdced,
105 [ETNAVIV_PARAM_GPU_FEATURES_5
] = 0x930d2f47,
106 [ETNAVIV_PARAM_GPU_FEATURES_6
] = 0x10000133,
107 [ETNAVIV_PARAM_GPU_FEATURES_7
] = 0x0,
108 [ETNAVIV_PARAM_GPU_STREAM_COUNT
] = 0x10,
109 [ETNAVIV_PARAM_GPU_REGISTER_MAX
] = 0x40,
110 [ETNAVIV_PARAM_GPU_THREAD_COUNT
] = 0x400,
111 [ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE
] = 0x10,
112 [ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT
] = 0x4,
113 [ETNAVIV_PARAM_GPU_PIXEL_PIPES
] = 0x2,
114 [ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE
] = 0x400,
115 [ETNAVIV_PARAM_GPU_BUFFER_SIZE
] = 0x0,
116 [ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT
] = 0x100,
117 [ETNAVIV_PARAM_GPU_NUM_CONSTANTS
] = 0x140,
118 [ETNAVIV_PARAM_GPU_NUM_VARYINGS
] = 0x10,
119 [ETNAVIV_PARAM_SOFTPIN_START_ADDR
] = ~0ULL,
124 .reg_map
= (const uint64_t[]){
125 [ETNAVIV_PARAM_GPU_MODEL
] = 0x7000,
126 [ETNAVIV_PARAM_GPU_REVISION
] = 0x6214,
127 [ETNAVIV_PARAM_GPU_FEATURES_0
] = 0xe0287cad,
128 [ETNAVIV_PARAM_GPU_FEATURES_1
] = 0xc1799eff,
129 [ETNAVIV_PARAM_GPU_FEATURES_2
] = 0xfefbfad9,
130 [ETNAVIV_PARAM_GPU_FEATURES_3
] = 0xeb9d4fbf,
131 [ETNAVIV_PARAM_GPU_FEATURES_4
] = 0xedfffced,
132 [ETNAVIV_PARAM_GPU_FEATURES_5
] = 0xdb0dafc7,
133 [ETNAVIV_PARAM_GPU_FEATURES_6
] = 0xbb5ac333,
134 [ETNAVIV_PARAM_GPU_FEATURES_7
] = 0xfc8ee200,
135 [ETNAVIV_PARAM_GPU_STREAM_COUNT
] = 0x10,
136 [ETNAVIV_PARAM_GPU_REGISTER_MAX
] = 0x40,
137 [ETNAVIV_PARAM_GPU_THREAD_COUNT
] = 0x400,
138 [ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE
] = 0x10,
139 [ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT
] = 0x4,
140 [ETNAVIV_PARAM_GPU_PIXEL_PIPES
] = 0x2,
141 [ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE
] = 0x400,
142 [ETNAVIV_PARAM_GPU_BUFFER_SIZE
] = 0x0,
143 [ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT
] = 0x200,
144 [ETNAVIV_PARAM_GPU_NUM_CONSTANTS
] = 0x140,
145 [ETNAVIV_PARAM_GPU_NUM_VARYINGS
] = 0x10,
146 [ETNAVIV_PARAM_SOFTPIN_START_ADDR
] = 0x00400000,
151 static const struct etna_shim_gpu
*shim_gpu
;
154 etnaviv_ioctl_noop(int fd
, unsigned long request
, void *arg
)
160 etnaviv_ioctl_gem_new(int fd
, unsigned long request
, void *arg
)
162 struct shim_fd
*shim_fd
= drm_shim_fd_lookup(fd
);
163 struct drm_etnaviv_gem_new
*create
= arg
;
164 struct shim_bo
*bo
= calloc(1, sizeof(*bo
));
166 drm_shim_bo_init(bo
, create
->size
);
167 create
->handle
= drm_shim_bo_get_handle(shim_fd
, bo
);
174 etnaviv_ioctl_gem_info(int fd
, unsigned long request
, void *arg
)
176 struct shim_fd
*shim_fd
= drm_shim_fd_lookup(fd
);
177 struct drm_etnaviv_gem_info
*args
= arg
;
178 struct shim_bo
*bo
= drm_shim_bo_lookup(shim_fd
, args
->handle
);
180 args
->offset
= drm_shim_bo_get_mmap_offset(shim_fd
, bo
);
187 etnaviv_ioctl_get_param(int fd
, unsigned long request
, void *arg
)
189 struct drm_etnaviv_param
*gp
= arg
;
191 if (gp
->param
> ETNAVIV_PARAM_SOFTPIN_START_ADDR
) {
192 fprintf(stderr
, "Unknown DRM_IOCTL_ETNAVIV_GET_PARAM %d\n", gp
->param
);
196 gp
->value
= shim_gpu
->reg_map
[gp
->param
];
201 static ioctl_fn_t driver_ioctls
[] = {
202 [DRM_ETNAVIV_GET_PARAM
] = etnaviv_ioctl_get_param
,
203 [DRM_ETNAVIV_GEM_NEW
] = etnaviv_ioctl_gem_new
,
204 [DRM_ETNAVIV_GEM_INFO
] = etnaviv_ioctl_gem_info
,
205 [DRM_ETNAVIV_GEM_CPU_PREP
] = etnaviv_ioctl_noop
,
206 [DRM_ETNAVIV_GEM_CPU_FINI
] = etnaviv_ioctl_noop
,
207 [DRM_ETNAVIV_GEM_SUBMIT
] = etnaviv_ioctl_noop
,
208 [DRM_ETNAVIV_WAIT_FENCE
] = etnaviv_ioctl_noop
,
209 [DRM_ETNAVIV_GEM_USERPTR
] = etnaviv_ioctl_noop
,
210 [DRM_ETNAVIV_GEM_WAIT
] = etnaviv_ioctl_noop
,
211 [DRM_ETNAVIV_PM_QUERY_DOM
] = etnaviv_ioctl_noop
,
212 [DRM_ETNAVIV_PM_QUERY_SIG
] = etnaviv_ioctl_noop
,
216 drm_shim_driver_init(void)
218 shim_device
.driver_name
= "etnaviv";
219 shim_device
.driver_ioctls
= driver_ioctls
;
220 shim_device
.driver_ioctl_count
= ARRAY_SIZE(driver_ioctls
);
222 /* etnaviv uses the DRM version to expose features, instead of getparam. */
223 shim_device
.version_major
= 1;
224 shim_device
.version_minor
= 1;
225 shim_device
.version_patchlevel
= 0;
227 drm_shim_override_file("DRIVER=etnaviv\n"
228 "MODALIAS=platform:etnaviv\n",
229 "/sys/dev/char/%d:%d/device/uevent",
230 DRM_MAJOR
, render_node_minor
);
232 /* decide what GPU to emulate */
233 const char *gpu
= debug_get_option("ETNA_SHIM_GPU", "GC2000");
235 for (unsigned i
= 0; i
< ARRAY_SIZE(gpus
); i
++) {
236 if (strncasecmp(gpu
, gpus
[i
].name
, strlen(gpus
[i
].name
)) == 0) {
242 /* NOTE: keep keep default value and fallback index in sync */
246 fprintf(stderr
, "Using %s as shim gpu\n", shim_gpu
->name
);