2 * Copyright © 2019 Google LLC
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5 * copy of this software and associated documentation files (the "Software"),
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7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
27 #include <sys/ioctl.h>
28 #include "drm-uapi/msm_drm.h"
29 #include "drm-shim/drm_shim.h"
36 static struct msm_bo
*
37 msm_bo(struct shim_bo
*bo
)
39 return (struct msm_bo
*)bo
;
46 static struct msm_device msm
= {
47 .next_offset
= 0x1000,
51 msm_ioctl_noop(int fd
, unsigned long request
, void *arg
)
57 msm_ioctl_gem_new(int fd
, unsigned long request
, void *arg
)
59 struct shim_fd
*shim_fd
= drm_shim_fd_lookup(fd
);
60 struct drm_msm_gem_new
*create
= arg
;
61 struct msm_bo
*bo
= calloc(1, sizeof(*bo
));
63 drm_shim_bo_init(&bo
->base
, create
->size
);
65 assert(UINT_MAX
- msm
.next_offset
> create
->size
);
67 bo
->offset
= msm
.next_offset
;
68 msm
.next_offset
+= create
->size
;
70 create
->handle
= drm_shim_bo_get_handle(shim_fd
, &bo
->base
);
72 drm_shim_bo_put(&bo
->base
);
78 msm_ioctl_gem_info(int fd
, unsigned long request
, void *arg
)
80 struct shim_fd
*shim_fd
= drm_shim_fd_lookup(fd
);
81 struct drm_msm_gem_info
*args
= arg
;
82 struct shim_bo
*bo
= drm_shim_bo_lookup(shim_fd
, args
->handle
);
85 case MSM_INFO_GET_OFFSET
:
86 args
->value
= drm_shim_bo_get_mmap_offset(shim_fd
, bo
);
88 case MSM_INFO_GET_IOVA
:
89 args
->value
= msm_bo(bo
)->offset
;
91 case MSM_INFO_SET_NAME
:
94 fprintf(stderr
, "Unknown DRM_IOCTL_MSM_GEM_INFO %d\n", args
->info
);
104 msm_ioctl_get_param(int fd
, unsigned long request
, void *arg
)
106 struct drm_msm_param
*gp
= arg
;
109 case MSM_PARAM_GPU_ID
:
112 case MSM_PARAM_GMEM_SIZE
:
113 gp
->value
= 1024 * 1024;
115 case MSM_PARAM_GMEM_BASE
:
116 gp
->value
= 0x100000;
118 case MSM_PARAM_CHIP_ID
:
119 gp
->value
= (6 << 24) | (3 << 16) | (0 << 8) | (0xff << 0);
121 case MSM_PARAM_NR_RINGS
:
124 case MSM_PARAM_MAX_FREQ
:
127 case MSM_PARAM_TIMESTAMP
:
130 case MSM_PARAM_PP_PGTABLE
:
133 case MSM_PARAM_FAULTS
:
137 fprintf(stderr
, "Unknown DRM_IOCTL_MSM_GET_PARAM %d\n",
144 msm_ioctl_gem_madvise(int fd
, unsigned long request
, void *arg
)
146 struct drm_msm_gem_madvise
*args
= arg
;
148 args
->retained
= true;
153 static ioctl_fn_t driver_ioctls
[] = {
154 [DRM_MSM_GET_PARAM
] = msm_ioctl_get_param
,
155 [DRM_MSM_GEM_NEW
] = msm_ioctl_gem_new
,
156 [DRM_MSM_GEM_INFO
] = msm_ioctl_gem_info
,
157 [DRM_MSM_GEM_CPU_PREP
] = msm_ioctl_noop
,
158 [DRM_MSM_GEM_CPU_FINI
] = msm_ioctl_noop
,
159 [DRM_MSM_GEM_SUBMIT
] = msm_ioctl_noop
,
160 [DRM_MSM_WAIT_FENCE
] = msm_ioctl_noop
,
161 [DRM_MSM_GEM_MADVISE
] = msm_ioctl_gem_madvise
,
162 [DRM_MSM_SUBMITQUEUE_NEW
] = msm_ioctl_noop
,
163 [DRM_MSM_SUBMITQUEUE_CLOSE
] = msm_ioctl_noop
,
164 [DRM_MSM_SUBMITQUEUE_QUERY
] = msm_ioctl_noop
,
168 drm_shim_driver_init(void)
170 shim_device
.driver_name
= "msm";
171 shim_device
.driver_ioctls
= driver_ioctls
;
172 shim_device
.driver_ioctl_count
= ARRAY_SIZE(driver_ioctls
);
174 /* msm uses the DRM version to expose features, instead of getparam. */
175 shim_device
.version_major
= 1;
176 shim_device
.version_minor
= 5;
177 shim_device
.version_patchlevel
= 0;
179 drm_shim_override_file("OF_FULLNAME=/rdb/msm\n"
180 "OF_COMPATIBLE_N=1\n"
181 "OF_COMPATIBLE_0=qcom,adreno\n",
182 "/sys/dev/char/%d:%d/device/uevent",
183 DRM_MAJOR
, render_node_minor
);