2 * Copyright (c) 2013 Rob Clark <robdclark@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #include <util/u_debug.h>
33 #include "instr-a3xx.h"
35 /* bitmask of debug flags */
37 PRINT_RAW
= 0x1, /* dump raw hexdump */
42 static enum debug_t debug
;
44 #define printf debug_printf
46 static const char *levels
[] = {
65 static const char *component
= "xyzw";
67 static const char *type
[] = {
83 /* current instruction repeat flag: */
85 /* current instruction repeat indx/offset (for --expand): */
89 static void print_reg(struct disasm_ctx
*ctx
, reg_t reg
, bool full
, bool r
,
90 bool c
, bool im
, bool neg
, bool abs
, bool addr_rel
)
92 const char type
= c
? 'c' : 'r';
94 // XXX I prefer - and || for neg/abs, but preserving format used
95 // by libllvm-a3xx for easy diffing..
98 fprintf(ctx
->out
, "(absneg)");
100 fprintf(ctx
->out
, "(neg)");
102 fprintf(ctx
->out
, "(abs)");
105 fprintf(ctx
->out
, "(r)");
108 fprintf(ctx
->out
, "%d", reg
.iim_val
);
109 } else if (addr_rel
) {
110 /* I would just use %+d but trying to make it diff'able with
114 fprintf(ctx
->out
, "%s%c<a0.x - %d>", full
? "" : "h", type
, -reg
.iim_val
);
115 else if (reg
.iim_val
> 0)
116 fprintf(ctx
->out
, "%s%c<a0.x + %d>", full
? "" : "h", type
, reg
.iim_val
);
118 fprintf(ctx
->out
, "%s%c<a0.x>", full
? "" : "h", type
);
119 } else if ((reg
.num
== REG_A0
) && !c
) {
120 fprintf(ctx
->out
, "a0.%c", component
[reg
.comp
]);
121 } else if ((reg
.num
== REG_P0
) && !c
) {
122 fprintf(ctx
->out
, "p0.%c", component
[reg
.comp
]);
124 fprintf(ctx
->out
, "%s%c%d.%c", full
? "" : "h", type
, reg
.num
, component
[reg
.comp
]);
128 static unsigned regidx(reg_t reg
)
130 return (4 * reg
.num
) + reg
.comp
;
133 static reg_t
idxreg(unsigned idx
)
141 static void print_reg_dst(struct disasm_ctx
*ctx
, reg_t reg
, bool full
, bool addr_rel
)
143 reg
= idxreg(regidx(reg
) + ctx
->repeatidx
);
144 print_reg(ctx
, reg
, full
, false, false, false, false, false, addr_rel
);
147 static void print_reg_src(struct disasm_ctx
*ctx
, reg_t reg
, bool full
, bool r
,
148 bool c
, bool im
, bool neg
, bool abs
, bool addr_rel
)
151 reg
= idxreg(regidx(reg
) + ctx
->repeatidx
);
153 print_reg(ctx
, reg
, full
, r
, c
, im
, neg
, abs
, addr_rel
);
156 /* TODO switch to using reginfo struct everywhere, since more readable
157 * than passing a bunch of bools to print_reg_src
171 static void print_src(struct disasm_ctx
*ctx
, struct reginfo
*info
)
173 print_reg_src(ctx
, info
->reg
, info
->full
, info
->r
, info
->c
, info
->im
,
174 info
->neg
, info
->abs
, info
->addr_rel
);
177 //static void print_dst(struct disasm_ctx *ctx, struct reginfo *info)
179 // print_reg_dst(ctx, info->reg, info->full, info->addr_rel);
182 static void print_instr_cat0(struct disasm_ctx
*ctx
, instr_t
*instr
)
184 instr_cat0_t
*cat0
= &instr
->cat0
;
189 fprintf(ctx
->out
, " %sp0.%c", cat0
->inv
? "!" : "",
190 component
[cat0
->comp
]);
193 fprintf(ctx
->out
, " %sp0.%c, #%d", cat0
->inv
? "!" : "",
194 component
[cat0
->comp
], cat0
->a3xx
.immed
);
198 fprintf(ctx
->out
, " #%d", cat0
->a3xx
.immed
);
202 if ((debug
& PRINT_VERBOSE
) && (cat0
->dummy2
|cat0
->dummy3
|cat0
->dummy4
))
203 fprintf(ctx
->out
, "\t{0: %x,%x,%x}", cat0
->dummy2
, cat0
->dummy3
, cat0
->dummy4
);
206 static void print_instr_cat1(struct disasm_ctx
*ctx
, instr_t
*instr
)
208 instr_cat1_t
*cat1
= &instr
->cat1
;
211 fprintf(ctx
->out
, "(ul)");
213 if (cat1
->src_type
== cat1
->dst_type
) {
214 if ((cat1
->src_type
== TYPE_S16
) && (((reg_t
)cat1
->dst
).num
== REG_A0
)) {
215 /* special case (nmemonic?): */
216 fprintf(ctx
->out
, "mova");
218 fprintf(ctx
->out
, "mov.%s%s", type
[cat1
->src_type
], type
[cat1
->dst_type
]);
221 fprintf(ctx
->out
, "cov.%s%s", type
[cat1
->src_type
], type
[cat1
->dst_type
]);
224 fprintf(ctx
->out
, " ");
227 fprintf(ctx
->out
, "(even)");
230 fprintf(ctx
->out
, "(pos_infinity)");
232 print_reg_dst(ctx
, (reg_t
)(cat1
->dst
), type_size(cat1
->dst_type
) == 32,
235 fprintf(ctx
->out
, ", ");
237 /* ugg, have to special case this.. vs print_reg().. */
239 if (type_float(cat1
->src_type
))
240 fprintf(ctx
->out
, "(%f)", cat1
->fim_val
);
241 else if (type_uint(cat1
->src_type
))
242 fprintf(ctx
->out
, "0x%08x", cat1
->uim_val
);
244 fprintf(ctx
->out
, "%d", cat1
->iim_val
);
245 } else if (cat1
->src_rel
&& !cat1
->src_c
) {
246 /* I would just use %+d but trying to make it diff'able with
249 char type
= cat1
->src_rel_c
? 'c' : 'r';
251 fprintf(ctx
->out
, "%c<a0.x - %d>", type
, -cat1
->off
);
252 else if (cat1
->off
> 0)
253 fprintf(ctx
->out
, "%c<a0.x + %d>", type
, cat1
->off
);
255 fprintf(ctx
->out
, "%c<a0.x>", type
);
257 print_reg_src(ctx
, (reg_t
)(cat1
->src
), type_size(cat1
->src_type
) == 32,
258 cat1
->src_r
, cat1
->src_c
, cat1
->src_im
, false, false, false);
261 if ((debug
& PRINT_VERBOSE
) && (cat1
->must_be_0
))
262 fprintf(ctx
->out
, "\t{1: %x}", cat1
->must_be_0
);
265 static void print_instr_cat2(struct disasm_ctx
*ctx
, instr_t
*instr
)
267 instr_cat2_t
*cat2
= &instr
->cat2
;
268 static const char *cond
[] = {
278 switch (_OPC(2, cat2
->opc
)) {
285 fprintf(ctx
->out
, ".%s", cond
[cat2
->cond
]);
289 fprintf(ctx
->out
, " ");
291 fprintf(ctx
->out
, "(ei)");
292 print_reg_dst(ctx
, (reg_t
)(cat2
->dst
), cat2
->full
^ cat2
->dst_half
, false);
293 fprintf(ctx
->out
, ", ");
295 unsigned src1_r
= cat2
->repeat
? cat2
->src1_r
: 0;
296 if (cat2
->c1
.src1_c
) {
297 print_reg_src(ctx
, (reg_t
)(cat2
->c1
.src1
), cat2
->full
, src1_r
,
298 cat2
->c1
.src1_c
, cat2
->src1_im
, cat2
->src1_neg
,
299 cat2
->src1_abs
, false);
300 } else if (cat2
->rel1
.src1_rel
) {
301 print_reg_src(ctx
, (reg_t
)(cat2
->rel1
.src1
), cat2
->full
, src1_r
,
302 cat2
->rel1
.src1_c
, cat2
->src1_im
, cat2
->src1_neg
,
303 cat2
->src1_abs
, cat2
->rel1
.src1_rel
);
305 print_reg_src(ctx
, (reg_t
)(cat2
->src1
), cat2
->full
, src1_r
,
306 false, cat2
->src1_im
, cat2
->src1_neg
,
307 cat2
->src1_abs
, false);
310 unsigned src2_r
= cat2
->repeat
? cat2
->src2_r
: 0;
311 switch (_OPC(2, cat2
->opc
)) {
326 /* these only have one src reg */
329 fprintf(ctx
->out
, ", ");
330 if (cat2
->c2
.src2_c
) {
331 print_reg_src(ctx
, (reg_t
)(cat2
->c2
.src2
), cat2
->full
, src2_r
,
332 cat2
->c2
.src2_c
, cat2
->src2_im
, cat2
->src2_neg
,
333 cat2
->src2_abs
, false);
334 } else if (cat2
->rel2
.src2_rel
) {
335 print_reg_src(ctx
, (reg_t
)(cat2
->rel2
.src2
), cat2
->full
, src2_r
,
336 cat2
->rel2
.src2_c
, cat2
->src2_im
, cat2
->src2_neg
,
337 cat2
->src2_abs
, cat2
->rel2
.src2_rel
);
339 print_reg_src(ctx
, (reg_t
)(cat2
->src2
), cat2
->full
, src2_r
,
340 false, cat2
->src2_im
, cat2
->src2_neg
,
341 cat2
->src2_abs
, false);
347 static void print_instr_cat3(struct disasm_ctx
*ctx
, instr_t
*instr
)
349 instr_cat3_t
*cat3
= &instr
->cat3
;
350 bool full
= instr_cat3_full(cat3
);
352 fprintf(ctx
->out
, " ");
353 print_reg_dst(ctx
, (reg_t
)(cat3
->dst
), full
^ cat3
->dst_half
, false);
354 fprintf(ctx
->out
, ", ");
355 unsigned src1_r
= cat3
->repeat
? cat3
->src1_r
: 0;
356 if (cat3
->c1
.src1_c
) {
357 print_reg_src(ctx
, (reg_t
)(cat3
->c1
.src1
), full
,
358 src1_r
, cat3
->c1
.src1_c
, false, cat3
->src1_neg
,
360 } else if (cat3
->rel1
.src1_rel
) {
361 print_reg_src(ctx
, (reg_t
)(cat3
->rel1
.src1
), full
,
362 src1_r
, cat3
->rel1
.src1_c
, false, cat3
->src1_neg
,
363 false, cat3
->rel1
.src1_rel
);
365 print_reg_src(ctx
, (reg_t
)(cat3
->src1
), full
,
366 src1_r
, false, false, cat3
->src1_neg
,
369 fprintf(ctx
->out
, ", ");
370 unsigned src2_r
= cat3
->repeat
? cat3
->src2_r
: 0;
371 print_reg_src(ctx
, (reg_t
)cat3
->src2
, full
,
372 src2_r
, cat3
->src2_c
, false, cat3
->src2_neg
,
374 fprintf(ctx
->out
, ", ");
375 if (cat3
->c2
.src3_c
) {
376 print_reg_src(ctx
, (reg_t
)(cat3
->c2
.src3
), full
,
377 cat3
->src3_r
, cat3
->c2
.src3_c
, false, cat3
->src3_neg
,
379 } else if (cat3
->rel2
.src3_rel
) {
380 print_reg_src(ctx
, (reg_t
)(cat3
->rel2
.src3
), full
,
381 cat3
->src3_r
, cat3
->rel2
.src3_c
, false, cat3
->src3_neg
,
382 false, cat3
->rel2
.src3_rel
);
384 print_reg_src(ctx
, (reg_t
)(cat3
->src3
), full
,
385 cat3
->src3_r
, false, false, cat3
->src3_neg
,
390 static void print_instr_cat4(struct disasm_ctx
*ctx
, instr_t
*instr
)
392 instr_cat4_t
*cat4
= &instr
->cat4
;
394 fprintf(ctx
->out
, " ");
395 print_reg_dst(ctx
, (reg_t
)(cat4
->dst
), cat4
->full
^ cat4
->dst_half
, false);
396 fprintf(ctx
->out
, ", ");
399 print_reg_src(ctx
, (reg_t
)(cat4
->c
.src
), cat4
->full
,
400 cat4
->src_r
, cat4
->c
.src_c
, cat4
->src_im
,
401 cat4
->src_neg
, cat4
->src_abs
, false);
402 } else if (cat4
->rel
.src_rel
) {
403 print_reg_src(ctx
, (reg_t
)(cat4
->rel
.src
), cat4
->full
,
404 cat4
->src_r
, cat4
->rel
.src_c
, cat4
->src_im
,
405 cat4
->src_neg
, cat4
->src_abs
, cat4
->rel
.src_rel
);
407 print_reg_src(ctx
, (reg_t
)(cat4
->src
), cat4
->full
,
408 cat4
->src_r
, false, cat4
->src_im
,
409 cat4
->src_neg
, cat4
->src_abs
, false);
412 if ((debug
& PRINT_VERBOSE
) && (cat4
->dummy1
|cat4
->dummy2
))
413 fprintf(ctx
->out
, "\t{4: %x,%x}", cat4
->dummy1
, cat4
->dummy2
);
416 static void print_instr_cat5(struct disasm_ctx
*ctx
, instr_t
*instr
)
418 static const struct {
419 bool src1
, src2
, samp
, tex
;
421 [opc_op(OPC_ISAM
)] = { true, false, true, true, },
422 [opc_op(OPC_ISAML
)] = { true, true, true, true, },
423 [opc_op(OPC_ISAMM
)] = { true, false, true, true, },
424 [opc_op(OPC_SAM
)] = { true, false, true, true, },
425 [opc_op(OPC_SAMB
)] = { true, true, true, true, },
426 [opc_op(OPC_SAML
)] = { true, true, true, true, },
427 [opc_op(OPC_SAMGQ
)] = { true, false, true, true, },
428 [opc_op(OPC_GETLOD
)] = { true, false, true, true, },
429 [opc_op(OPC_CONV
)] = { true, true, true, true, },
430 [opc_op(OPC_CONVM
)] = { true, true, true, true, },
431 [opc_op(OPC_GETSIZE
)] = { true, false, false, true, },
432 [opc_op(OPC_GETBUF
)] = { false, false, false, true, },
433 [opc_op(OPC_GETPOS
)] = { true, false, false, true, },
434 [opc_op(OPC_GETINFO
)] = { false, false, false, true, },
435 [opc_op(OPC_DSX
)] = { true, false, false, false, },
436 [opc_op(OPC_DSY
)] = { true, false, false, false, },
437 [opc_op(OPC_GATHER4R
)] = { true, false, true, true, },
438 [opc_op(OPC_GATHER4G
)] = { true, false, true, true, },
439 [opc_op(OPC_GATHER4B
)] = { true, false, true, true, },
440 [opc_op(OPC_GATHER4A
)] = { true, false, true, true, },
441 [opc_op(OPC_SAMGP0
)] = { true, false, true, true, },
442 [opc_op(OPC_SAMGP1
)] = { true, false, true, true, },
443 [opc_op(OPC_SAMGP2
)] = { true, false, true, true, },
444 [opc_op(OPC_SAMGP3
)] = { true, false, true, true, },
445 [opc_op(OPC_DSXPP_1
)] = { true, false, false, false, },
446 [opc_op(OPC_DSYPP_1
)] = { true, false, false, false, },
447 [opc_op(OPC_RGETPOS
)] = { true, false, false, false, },
448 [opc_op(OPC_RGETINFO
)] = { false, false, false, false, },
450 instr_cat5_t
*cat5
= &instr
->cat5
;
453 if (cat5
->is_3d
) fprintf(ctx
->out
, ".3d");
454 if (cat5
->is_a
) fprintf(ctx
->out
, ".a");
455 if (cat5
->is_o
) fprintf(ctx
->out
, ".o");
456 if (cat5
->is_p
) fprintf(ctx
->out
, ".p");
457 if (cat5
->is_s
) fprintf(ctx
->out
, ".s");
458 if (cat5
->is_s2en
) fprintf(ctx
->out
, ".s2en");
460 fprintf(ctx
->out
, " ");
462 switch (_OPC(5, cat5
->opc
)) {
467 fprintf(ctx
->out
, "(%s)", type
[cat5
->type
]);
471 fprintf(ctx
->out
, "(");
472 for (i
= 0; i
< 4; i
++)
473 if (cat5
->wrmask
& (1 << i
))
474 fprintf(ctx
->out
, "%c", "xyzw"[i
]);
475 fprintf(ctx
->out
, ")");
477 print_reg_dst(ctx
, (reg_t
)(cat5
->dst
), type_size(cat5
->type
) == 32, false);
479 if (info
[cat5
->opc
].src1
) {
480 fprintf(ctx
->out
, ", ");
481 print_reg_src(ctx
, (reg_t
)(cat5
->src1
), cat5
->full
, false, false, false,
482 false, false, false);
486 if (cat5
->is_o
|| info
[cat5
->opc
].src2
) {
487 fprintf(ctx
->out
, ", ");
488 print_reg_src(ctx
, (reg_t
)(cat5
->s2en
.src2
), cat5
->full
,
489 false, false, false, false, false, false);
491 fprintf(ctx
->out
, ", ");
492 print_reg_src(ctx
, (reg_t
)(cat5
->s2en
.src3
), false, false, false, false,
493 false, false, false);
495 if (cat5
->is_o
|| info
[cat5
->opc
].src2
) {
496 fprintf(ctx
->out
, ", ");
497 print_reg_src(ctx
, (reg_t
)(cat5
->norm
.src2
), cat5
->full
,
498 false, false, false, false, false, false);
500 if (info
[cat5
->opc
].samp
)
501 fprintf(ctx
->out
, ", s#%d", cat5
->norm
.samp
);
502 if (info
[cat5
->opc
].tex
)
503 fprintf(ctx
->out
, ", t#%d", cat5
->norm
.tex
);
506 if (debug
& PRINT_VERBOSE
) {
508 if ((debug
& PRINT_VERBOSE
) && (cat5
->s2en
.dummy1
|cat5
->s2en
.dummy2
|cat5
->dummy2
))
509 fprintf(ctx
->out
, "\t{5: %x,%x,%x}", cat5
->s2en
.dummy1
, cat5
->s2en
.dummy2
, cat5
->dummy2
);
511 if ((debug
& PRINT_VERBOSE
) && (cat5
->norm
.dummy1
|cat5
->dummy2
))
512 fprintf(ctx
->out
, "\t{5: %x,%x}", cat5
->norm
.dummy1
, cat5
->dummy2
);
517 static void print_instr_cat6_a3xx(struct disasm_ctx
*ctx
, instr_t
*instr
)
519 instr_cat6_t
*cat6
= &instr
->cat6
;
520 char sd
= 0, ss
= 0; /* dst/src address space */
522 struct reginfo dst
, src1
, src2
;
523 int src1off
= 0, dstoff
= 0;
525 memset(&dst
, 0, sizeof(dst
));
526 memset(&src1
, 0, sizeof(src1
));
527 memset(&src2
, 0, sizeof(src2
));
529 switch (_OPC(6, cat6
->opc
)) {
532 dst
.full
= type_size(cat6
->type
) == 32;
533 src1
.full
= type_size(cat6
->type
) == 32;
534 src2
.full
= type_size(cat6
->type
) == 32;
548 src1
.full
= type_size(cat6
->type
) == 32;
549 src2
.full
= type_size(cat6
->type
) == 32;
552 dst
.full
= type_size(cat6
->type
) == 32;
558 switch (_OPC(6, cat6
->opc
)) {
562 fprintf(ctx
->out
, ".%dd", cat6
->ldgb
.d
+ 1);
565 fprintf(ctx
->out
, ".%s", cat6
->ldgb
.typed
? "typed" : "untyped");
566 fprintf(ctx
->out
, ".%dd", cat6
->ldgb
.d
+ 1);
567 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
568 fprintf(ctx
->out
, ".%d", cat6
->ldgb
.type_size
+ 1);
572 fprintf(ctx
->out
, ".%s", cat6
->stgb
.typed
? "typed" : "untyped");
573 fprintf(ctx
->out
, ".%dd", cat6
->stgb
.d
+ 1);
574 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
575 fprintf(ctx
->out
, ".%d", cat6
->stgb
.type_size
+ 1);
579 case OPC_ATOMIC_XCHG
:
582 case OPC_ATOMIC_CMPXCHG
:
588 ss
= cat6
->g
? 'g' : 'l';
589 fprintf(ctx
->out
, ".%s", cat6
->ldgb
.typed
? "typed" : "untyped");
590 fprintf(ctx
->out
, ".%dd", cat6
->ldgb
.d
+ 1);
591 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
592 fprintf(ctx
->out
, ".%d", cat6
->ldgb
.type_size
+ 1);
593 fprintf(ctx
->out
, ".%c", ss
);
596 dst
.im
= cat6
->g
&& !cat6
->dst_off
;
597 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
600 fprintf(ctx
->out
, " ");
602 switch (_OPC(6, cat6
->opc
)) {
643 if ((_OPC(6, cat6
->opc
) == OPC_STGB
) || (_OPC(6, cat6
->opc
) == OPC_STIB
)) {
646 memset(&src3
, 0, sizeof(src3
));
648 src1
.reg
= (reg_t
)(cat6
->stgb
.src1
);
649 src2
.reg
= (reg_t
)(cat6
->stgb
.src2
);
650 src2
.im
= cat6
->stgb
.src2_im
;
651 src3
.reg
= (reg_t
)(cat6
->stgb
.src3
);
652 src3
.im
= cat6
->stgb
.src3_im
;
655 fprintf(ctx
->out
, "g[%u], ", cat6
->stgb
.dst_ssbo
);
656 print_src(ctx
, &src1
);
657 fprintf(ctx
->out
, ", ");
658 print_src(ctx
, &src2
);
659 fprintf(ctx
->out
, ", ");
660 print_src(ctx
, &src3
);
662 if (debug
& PRINT_VERBOSE
)
663 fprintf(ctx
->out
, " (pad0=%x, pad3=%x)", cat6
->stgb
.pad0
, cat6
->stgb
.pad3
);
668 if (is_atomic(_OPC(6, cat6
->opc
))) {
670 src1
.reg
= (reg_t
)(cat6
->ldgb
.src1
);
671 src1
.im
= cat6
->ldgb
.src1_im
;
672 src2
.reg
= (reg_t
)(cat6
->ldgb
.src2
);
673 src2
.im
= cat6
->ldgb
.src2_im
;
674 dst
.reg
= (reg_t
)(cat6
->ldgb
.dst
);
676 print_src(ctx
, &dst
);
677 fprintf(ctx
->out
, ", ");
680 memset(&src3
, 0, sizeof(src3
));
682 src3
.reg
= (reg_t
)(cat6
->ldgb
.src3
);
685 /* For images, the ".typed" variant is used and src2 is
686 * the ivecN coordinates, ie ivec2 for 2d.
688 * For SSBOs, the ".untyped" variant is used and src2 is
689 * a simple dword offset.. src3 appears to be
690 * uvec2(offset * 4, 0). Not sure the point of that.
693 fprintf(ctx
->out
, "g[%u], ", cat6
->ldgb
.src_ssbo
);
694 print_src(ctx
, &src1
); /* value */
695 fprintf(ctx
->out
, ", ");
696 print_src(ctx
, &src2
); /* offset/coords */
697 fprintf(ctx
->out
, ", ");
698 print_src(ctx
, &src3
); /* 64b byte offset.. */
700 if (debug
& PRINT_VERBOSE
) {
701 fprintf(ctx
->out
, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6
->ldgb
.pad0
,
702 cat6
->ldgb
.pad3
, cat6
->ldgb
.mustbe0
);
704 } else { /* ss == 'l' */
705 fprintf(ctx
->out
, "l[");
706 print_src(ctx
, &src1
); /* simple byte offset */
707 fprintf(ctx
->out
, "], ");
708 print_src(ctx
, &src2
); /* value */
710 if (debug
& PRINT_VERBOSE
) {
711 fprintf(ctx
->out
, " (src3=%x, pad0=%x, pad3=%x, mustbe0=%x)",
712 cat6
->ldgb
.src3
, cat6
->ldgb
.pad0
,
713 cat6
->ldgb
.pad3
, cat6
->ldgb
.mustbe0
);
718 } else if (_OPC(6, cat6
->opc
) == OPC_RESINFO
) {
719 dst
.reg
= (reg_t
)(cat6
->ldgb
.dst
);
721 print_src(ctx
, &dst
);
722 fprintf(ctx
->out
, ", ");
723 fprintf(ctx
->out
, "g[%u]", cat6
->ldgb
.src_ssbo
);
726 } else if (_OPC(6, cat6
->opc
) == OPC_LDGB
) {
728 src1
.reg
= (reg_t
)(cat6
->ldgb
.src1
);
729 src1
.im
= cat6
->ldgb
.src1_im
;
730 src2
.reg
= (reg_t
)(cat6
->ldgb
.src2
);
731 src2
.im
= cat6
->ldgb
.src2_im
;
732 dst
.reg
= (reg_t
)(cat6
->ldgb
.dst
);
734 print_src(ctx
, &dst
);
735 fprintf(ctx
->out
, ", ");
736 fprintf(ctx
->out
, "g[%u], ", cat6
->ldgb
.src_ssbo
);
737 print_src(ctx
, &src1
);
738 fprintf(ctx
->out
, ", ");
739 print_src(ctx
, &src2
);
741 if (debug
& PRINT_VERBOSE
)
742 fprintf(ctx
->out
, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6
->ldgb
.pad0
, cat6
->ldgb
.pad3
, cat6
->ldgb
.mustbe0
);
745 } else if (_OPC(6, cat6
->opc
) == OPC_LDG
&& cat6
->a
.src1_im
&& cat6
->a
.src2_im
) {
748 memset(&src3
, 0, sizeof(src3
));
749 src1
.reg
= (reg_t
)(cat6
->a
.src1
);
750 src2
.reg
= (reg_t
)(cat6
->a
.src2
);
751 src2
.im
= cat6
->a
.src2_im
;
752 src3
.reg
= (reg_t
)(cat6
->a
.off
);
754 dst
.reg
= (reg_t
)(cat6
->d
.dst
);
756 print_src(ctx
, &dst
);
757 fprintf(ctx
->out
, ", g[");
758 print_src(ctx
, &src1
);
759 fprintf(ctx
->out
, "+");
760 print_src(ctx
, &src3
);
761 fprintf(ctx
->out
, "], ");
762 print_src(ctx
, &src2
);
767 dst
.reg
= (reg_t
)(cat6
->c
.dst
);
768 dstoff
= cat6
->c
.off
;
770 dst
.reg
= (reg_t
)(cat6
->d
.dst
);
774 src1
.reg
= (reg_t
)(cat6
->a
.src1
);
775 src1
.im
= cat6
->a
.src1_im
;
776 src2
.reg
= (reg_t
)(cat6
->a
.src2
);
777 src2
.im
= cat6
->a
.src2_im
;
778 src1off
= cat6
->a
.off
;
780 src1
.reg
= (reg_t
)(cat6
->b
.src1
);
781 src1
.im
= cat6
->b
.src1_im
;
782 src2
.reg
= (reg_t
)(cat6
->b
.src2
);
783 src2
.im
= cat6
->b
.src2_im
;
788 fprintf(ctx
->out
, "%c[", sd
);
789 /* note: dst might actually be a src (ie. address to store to) */
790 print_src(ctx
, &dst
);
791 if (cat6
->dst_off
&& cat6
->g
) {
792 struct reginfo dstoff_reg
= {0};
793 dstoff_reg
.reg
= (reg_t
) cat6
->c
.off
;
794 dstoff_reg
.full
= true;
795 fprintf(ctx
->out
, "+");
796 print_src(ctx
, &dstoff_reg
);
798 fprintf(ctx
->out
, "%+d", dstoff
);
800 fprintf(ctx
->out
, "]");
801 fprintf(ctx
->out
, ", ");
805 fprintf(ctx
->out
, "%c[", ss
);
807 /* can have a larger than normal immed, so hack: */
809 fprintf(ctx
->out
, "%u", src1
.reg
.dummy13
);
811 print_src(ctx
, &src1
);
814 if (cat6
->src_off
&& cat6
->g
)
815 print_src(ctx
, &src2
);
817 fprintf(ctx
->out
, "%+d", src1off
);
819 fprintf(ctx
->out
, "]");
821 switch (_OPC(6, cat6
->opc
)) {
826 fprintf(ctx
->out
, ", ");
827 print_src(ctx
, &src2
);
832 static void print_instr_cat6_a6xx(struct disasm_ctx
*ctx
, instr_t
*instr
)
834 instr_cat6_a6xx_t
*cat6
= &instr
->cat6_a6xx
;
835 struct reginfo src1
, src2
;
836 bool has_dest
= _OPC(6, cat6
->opc
) == OPC_LDIB
;
839 memset(&src1
, 0, sizeof(src1
));
840 memset(&src2
, 0, sizeof(src2
));
842 fprintf(ctx
->out
, ".%s", cat6
->typed
? "typed" : "untyped");
843 fprintf(ctx
->out
, ".%dd", cat6
->d
+ 1);
844 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
845 fprintf(ctx
->out
, ".%u ", cat6
->type_size
+ 1);
848 src2
.reg
= (reg_t
)(cat6
->src2
);
849 src2
.full
= true; // XXX
850 print_src(ctx
, &src2
);
852 fprintf(ctx
->out
, ", ");
855 /* NOTE: blob seems to use old encoding for ldl/stl (local memory) */
858 fprintf(ctx
->out
, "%c[%u", ss
, cat6
->ssbo
);
859 fprintf(ctx
->out
, "] + ");
860 src1
.reg
= (reg_t
)(cat6
->src1
);
861 src1
.full
= true; // XXX
862 print_src(ctx
, &src1
);
865 fprintf(ctx
->out
, ", ");
867 src2
.reg
= (reg_t
)(cat6
->src2
);
868 src2
.full
= true; // XXX
869 print_src(ctx
, &src2
);
872 if (debug
& PRINT_VERBOSE
) {
873 fprintf(ctx
->out
, " (pad1=%x, pad2=%x, pad3=%x, pad4=%x)", cat6
->pad1
,
874 cat6
->pad2
, cat6
->pad3
, cat6
->pad4
);
878 static void print_instr_cat6(struct disasm_ctx
*ctx
, instr_t
*instr
)
880 if (!is_cat6_legacy(instr
, ctx
->gpu_id
)) {
881 print_instr_cat6_a6xx(ctx
, instr
);
882 if (debug
& PRINT_VERBOSE
)
883 fprintf(ctx
->out
, " NEW");
885 print_instr_cat6_a3xx(ctx
, instr
);
886 if (debug
& PRINT_VERBOSE
)
887 fprintf(ctx
->out
, " LEGACY");
890 static void print_instr_cat7(struct disasm_ctx
*ctx
, instr_t
*instr
)
892 instr_cat7_t
*cat7
= &instr
->cat7
;
895 fprintf(ctx
->out
, ".g");
897 fprintf(ctx
->out
, ".l");
899 if (_OPC(7, cat7
->opc
) == OPC_FENCE
) {
901 fprintf(ctx
->out
, ".r");
903 fprintf(ctx
->out
, ".w");
907 /* size of largest OPC field of all the instruction categories: */
910 static const struct opc_info
{
914 void (*print
)(struct disasm_ctx
*ctx
, instr_t
*instr
);
915 } opcs
[1 << (3+NOPC_BITS
)] = {
916 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat }
918 OPC(0, OPC_NOP
, nop
),
920 OPC(0, OPC_JUMP
, jump
),
921 OPC(0, OPC_CALL
, call
),
922 OPC(0, OPC_RET
, ret
),
923 OPC(0, OPC_KILL
, kill
),
924 OPC(0, OPC_END
, end
),
925 OPC(0, OPC_EMIT
, emit
),
926 OPC(0, OPC_CUT
, cut
),
927 OPC(0, OPC_CHMASK
, chmask
),
928 OPC(0, OPC_CHSH
, chsh
),
929 OPC(0, OPC_FLOW_REV
, flow_rev
),
930 OPC(0, OPC_CONDEND
, condend
),
931 OPC(0, OPC_ENDPATCH
, endpatch
),
937 OPC(2, OPC_ADD_F
, add
.f
),
938 OPC(2, OPC_MIN_F
, min
.f
),
939 OPC(2, OPC_MAX_F
, max
.f
),
940 OPC(2, OPC_MUL_F
, mul
.f
),
941 OPC(2, OPC_SIGN_F
, sign
.f
),
942 OPC(2, OPC_CMPS_F
, cmps
.f
),
943 OPC(2, OPC_ABSNEG_F
, absneg
.f
),
944 OPC(2, OPC_CMPV_F
, cmpv
.f
),
945 OPC(2, OPC_FLOOR_F
, floor
.f
),
946 OPC(2, OPC_CEIL_F
, ceil
.f
),
947 OPC(2, OPC_RNDNE_F
, rndne
.f
),
948 OPC(2, OPC_RNDAZ_F
, rndaz
.f
),
949 OPC(2, OPC_TRUNC_F
, trunc
.f
),
950 OPC(2, OPC_ADD_U
, add
.u
),
951 OPC(2, OPC_ADD_S
, add
.s
),
952 OPC(2, OPC_SUB_U
, sub
.u
),
953 OPC(2, OPC_SUB_S
, sub
.s
),
954 OPC(2, OPC_CMPS_U
, cmps
.u
),
955 OPC(2, OPC_CMPS_S
, cmps
.s
),
956 OPC(2, OPC_MIN_U
, min
.u
),
957 OPC(2, OPC_MIN_S
, min
.s
),
958 OPC(2, OPC_MAX_U
, max
.u
),
959 OPC(2, OPC_MAX_S
, max
.s
),
960 OPC(2, OPC_ABSNEG_S
, absneg
.s
),
961 OPC(2, OPC_AND_B
, and.b
),
962 OPC(2, OPC_OR_B
, or.b
),
963 OPC(2, OPC_NOT_B
, not.b
),
964 OPC(2, OPC_XOR_B
, xor.b
),
965 OPC(2, OPC_CMPV_U
, cmpv
.u
),
966 OPC(2, OPC_CMPV_S
, cmpv
.s
),
967 OPC(2, OPC_MUL_U24
, mul
.u24
),
968 OPC(2, OPC_MUL_S24
, mul
.s24
),
969 OPC(2, OPC_MULL_U
, mull
.u
),
970 OPC(2, OPC_BFREV_B
, bfrev
.b
),
971 OPC(2, OPC_CLZ_S
, clz
.s
),
972 OPC(2, OPC_CLZ_B
, clz
.b
),
973 OPC(2, OPC_SHL_B
, shl
.b
),
974 OPC(2, OPC_SHR_B
, shr
.b
),
975 OPC(2, OPC_ASHR_B
, ashr
.b
),
976 OPC(2, OPC_BARY_F
, bary
.f
),
977 OPC(2, OPC_MGEN_B
, mgen
.b
),
978 OPC(2, OPC_GETBIT_B
, getbit
.b
),
979 OPC(2, OPC_SETRM
, setrm
),
980 OPC(2, OPC_CBITS_B
, cbits
.b
),
981 OPC(2, OPC_SHB
, shb
),
982 OPC(2, OPC_MSAD
, msad
),
985 OPC(3, OPC_MAD_U16
, mad
.u16
),
986 OPC(3, OPC_MADSH_U16
, madsh
.u16
),
987 OPC(3, OPC_MAD_S16
, mad
.s16
),
988 OPC(3, OPC_MADSH_M16
, madsh
.m16
),
989 OPC(3, OPC_MAD_U24
, mad
.u24
),
990 OPC(3, OPC_MAD_S24
, mad
.s24
),
991 OPC(3, OPC_MAD_F16
, mad
.f16
),
992 OPC(3, OPC_MAD_F32
, mad
.f32
),
993 OPC(3, OPC_SEL_B16
, sel
.b16
),
994 OPC(3, OPC_SEL_B32
, sel
.b32
),
995 OPC(3, OPC_SEL_S16
, sel
.s16
),
996 OPC(3, OPC_SEL_S32
, sel
.s32
),
997 OPC(3, OPC_SEL_F16
, sel
.f16
),
998 OPC(3, OPC_SEL_F32
, sel
.f32
),
999 OPC(3, OPC_SAD_S16
, sad
.s16
),
1000 OPC(3, OPC_SAD_S32
, sad
.s32
),
1003 OPC(4, OPC_RCP
, rcp
),
1004 OPC(4, OPC_RSQ
, rsq
),
1005 OPC(4, OPC_LOG2
, log2
),
1006 OPC(4, OPC_EXP2
, exp2
),
1007 OPC(4, OPC_SIN
, sin
),
1008 OPC(4, OPC_COS
, cos
),
1009 OPC(4, OPC_SQRT
, sqrt
),
1010 OPC(4, OPC_HRSQ
, hrsq
),
1011 OPC(4, OPC_HLOG2
, hlog2
),
1012 OPC(4, OPC_HEXP2
, hexp2
),
1015 OPC(5, OPC_ISAM
, isam
),
1016 OPC(5, OPC_ISAML
, isaml
),
1017 OPC(5, OPC_ISAMM
, isamm
),
1018 OPC(5, OPC_SAM
, sam
),
1019 OPC(5, OPC_SAMB
, samb
),
1020 OPC(5, OPC_SAML
, saml
),
1021 OPC(5, OPC_SAMGQ
, samgq
),
1022 OPC(5, OPC_GETLOD
, getlod
),
1023 OPC(5, OPC_CONV
, conv
),
1024 OPC(5, OPC_CONVM
, convm
),
1025 OPC(5, OPC_GETSIZE
, getsize
),
1026 OPC(5, OPC_GETBUF
, getbuf
),
1027 OPC(5, OPC_GETPOS
, getpos
),
1028 OPC(5, OPC_GETINFO
, getinfo
),
1029 OPC(5, OPC_DSX
, dsx
),
1030 OPC(5, OPC_DSY
, dsy
),
1031 OPC(5, OPC_GATHER4R
, gather4r
),
1032 OPC(5, OPC_GATHER4G
, gather4g
),
1033 OPC(5, OPC_GATHER4B
, gather4b
),
1034 OPC(5, OPC_GATHER4A
, gather4a
),
1035 OPC(5, OPC_SAMGP0
, samgp0
),
1036 OPC(5, OPC_SAMGP1
, samgp1
),
1037 OPC(5, OPC_SAMGP2
, samgp2
),
1038 OPC(5, OPC_SAMGP3
, samgp3
),
1039 OPC(5, OPC_DSXPP_1
, dsxpp
.1),
1040 OPC(5, OPC_DSYPP_1
, dsypp
.1),
1041 OPC(5, OPC_RGETPOS
, rgetpos
),
1042 OPC(5, OPC_RGETINFO
, rgetinfo
),
1046 OPC(6, OPC_LDG
, ldg
),
1047 OPC(6, OPC_LDL
, ldl
),
1048 OPC(6, OPC_LDP
, ldp
),
1049 OPC(6, OPC_STG
, stg
),
1050 OPC(6, OPC_STL
, stl
),
1051 OPC(6, OPC_STP
, stp
),
1052 OPC(6, OPC_LDIB
, ldib
),
1053 OPC(6, OPC_G2L
, g2l
),
1054 OPC(6, OPC_L2G
, l2g
),
1055 OPC(6, OPC_PREFETCH
, prefetch
),
1056 OPC(6, OPC_LDLW
, ldlw
),
1057 OPC(6, OPC_STLW
, stlw
),
1058 OPC(6, OPC_RESFMT
, resfmt
),
1059 OPC(6, OPC_RESINFO
, resinfo
),
1060 OPC(6, OPC_ATOMIC_ADD
, atomic
.add
),
1061 OPC(6, OPC_ATOMIC_SUB
, atomic
.sub
),
1062 OPC(6, OPC_ATOMIC_XCHG
, atomic
.xchg
),
1063 OPC(6, OPC_ATOMIC_INC
, atomic
.inc
),
1064 OPC(6, OPC_ATOMIC_DEC
, atomic
.dec
),
1065 OPC(6, OPC_ATOMIC_CMPXCHG
, atomic
.cmpxchg
),
1066 OPC(6, OPC_ATOMIC_MIN
, atomic
.min
),
1067 OPC(6, OPC_ATOMIC_MAX
, atomic
.max
),
1068 OPC(6, OPC_ATOMIC_AND
, atomic
.and),
1069 OPC(6, OPC_ATOMIC_OR
, atomic
.or),
1070 OPC(6, OPC_ATOMIC_XOR
, atomic
.xor),
1071 OPC(6, OPC_LDGB
, ldgb
),
1072 OPC(6, OPC_STGB
, stgb
),
1073 OPC(6, OPC_STIB
, stib
),
1074 OPC(6, OPC_LDC
, ldc
),
1075 OPC(6, OPC_LDLV
, ldlv
),
1077 OPC(7, OPC_BAR
, bar
),
1078 OPC(7, OPC_FENCE
, fence
),
1083 #define GETINFO(instr) (&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr, ctx->gpu_id)]))
1085 // XXX hack.. probably should move this table somewhere common:
1087 const char *ir3_instr_name(struct ir3_instruction
*instr
)
1089 if (opc_cat(instr
->opc
) == -1) return "??meta??";
1090 return opcs
[instr
->opc
].name
;
1093 static void print_single_instr(struct disasm_ctx
*ctx
, instr_t
*instr
)
1095 const char *name
= GETINFO(instr
)->name
;
1096 uint32_t opc
= instr_opc(instr
, ctx
->gpu_id
);
1099 fprintf(ctx
->out
, "%s", name
);
1100 GETINFO(instr
)->print(ctx
, instr
);
1102 fprintf(ctx
->out
, "unknown(%d,%d)", instr
->opc_cat
, opc
);
1104 switch (instr
->opc_cat
) {
1105 case 0: print_instr_cat0(ctx
, instr
); break;
1106 case 1: print_instr_cat1(ctx
, instr
); break;
1107 case 2: print_instr_cat2(ctx
, instr
); break;
1108 case 3: print_instr_cat3(ctx
, instr
); break;
1109 case 4: print_instr_cat4(ctx
, instr
); break;
1110 case 5: print_instr_cat5(ctx
, instr
); break;
1111 case 6: print_instr_cat6(ctx
, instr
); break;
1112 case 7: print_instr_cat7(ctx
, instr
); break;
1117 static bool print_instr(struct disasm_ctx
*ctx
, uint32_t *dwords
, int n
)
1119 instr_t
*instr
= (instr_t
*)dwords
;
1120 uint32_t opc
= instr_opc(instr
, ctx
->gpu_id
);
1123 if (debug
& PRINT_VERBOSE
)
1124 fprintf(ctx
->out
, "%s%04d[%08xx_%08xx] ", levels
[ctx
->level
], n
, dwords
[1], dwords
[0]);
1126 /* NOTE: order flags are printed is a bit fugly.. but for now I
1127 * try to match the order in llvm-a3xx disassembler for easy
1131 ctx
->repeat
= instr_repeat(instr
);
1134 fprintf(ctx
->out
, "(sy)");
1136 if (instr
->ss
&& ((instr
->opc_cat
<= 4) || (instr
->opc_cat
== 7))) {
1137 fprintf(ctx
->out
, "(ss)");
1140 fprintf(ctx
->out
, "(jp)");
1141 if (instr_sat(instr
))
1142 fprintf(ctx
->out
, "(sat)");
1144 fprintf(ctx
->out
, "(rpt%d)", ctx
->repeat
);
1145 else if ((instr
->opc_cat
== 2) && (instr
->cat2
.src1_r
|| instr
->cat2
.src2_r
))
1146 nop
= (instr
->cat2
.src2_r
* 2) + instr
->cat2
.src1_r
;
1147 else if ((instr
->opc_cat
== 3) && (instr
->cat3
.src1_r
|| instr
->cat3
.src2_r
))
1148 nop
= (instr
->cat3
.src2_r
* 2) + instr
->cat3
.src1_r
;
1150 fprintf(ctx
->out
, "(nop%d)", nop
);
1152 if (instr
->ul
&& ((2 <= instr
->opc_cat
) && (instr
->opc_cat
<= 4)))
1153 fprintf(ctx
->out
, "(ul)");
1155 print_single_instr(ctx
, instr
);
1156 fprintf(ctx
->out
, "\n");
1158 if ((instr
->opc_cat
<= 4) && (debug
& EXPAND_REPEAT
)) {
1160 for (i
= 0; i
< nop
; i
++) {
1161 fprintf(ctx
->out
, "%s%04d[ ] ", levels
[ctx
->level
], n
);
1162 fprintf(ctx
->out
, "nop\n");
1164 for (i
= 0; i
< ctx
->repeat
; i
++) {
1165 ctx
->repeatidx
= i
+ 1;
1166 fprintf(ctx
->out
, "%s%04d[ ] ", levels
[ctx
->level
], n
);
1168 print_single_instr(ctx
, instr
);
1169 fprintf(ctx
->out
, "\n");
1174 return (instr
->opc_cat
== 0) && (opc
== OPC_END
);
1177 int disasm_a3xx(uint32_t *dwords
, int sizedwords
, int level
, FILE *out
, unsigned gpu_id
)
1179 struct disasm_ctx ctx
;
1183 assert((sizedwords
% 2) == 0);
1185 memset(&ctx
, 0, sizeof(ctx
));
1188 ctx
.gpu_id
= gpu_id
;
1190 for (i
= 0; i
< sizedwords
; i
+= 2) {
1191 print_instr(&ctx
, &dwords
[i
], i
/2);
1192 if (dwords
[i
] == 0 && dwords
[i
+ 1] == 0)