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ir3: Add bindless instruction encoding
[mesa.git] / src / freedreno / ir3 / disasm-a3xx.c
1 /*
2 * Copyright (c) 2013 Rob Clark <robdclark@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <stdlib.h>
26 #include <stdint.h>
27 #include <stdbool.h>
28 #include <string.h>
29 #include <assert.h>
30
31 #include <util/u_debug.h>
32
33 #include "instr-a3xx.h"
34
35 /* bitmask of debug flags */
36 enum debug_t {
37 PRINT_RAW = 0x1, /* dump raw hexdump */
38 PRINT_VERBOSE = 0x2,
39 EXPAND_REPEAT = 0x4,
40 };
41
42 static enum debug_t debug;
43
44 #define printf debug_printf
45
46 static const char *levels[] = {
47 "",
48 "\t",
49 "\t\t",
50 "\t\t\t",
51 "\t\t\t\t",
52 "\t\t\t\t\t",
53 "\t\t\t\t\t\t",
54 "\t\t\t\t\t\t\t",
55 "\t\t\t\t\t\t\t\t",
56 "\t\t\t\t\t\t\t\t\t",
57 "x",
58 "x",
59 "x",
60 "x",
61 "x",
62 "x",
63 };
64
65 static const char *component = "xyzw";
66
67 static const char *type[] = {
68 [TYPE_F16] = "f16",
69 [TYPE_F32] = "f32",
70 [TYPE_U16] = "u16",
71 [TYPE_U32] = "u32",
72 [TYPE_S16] = "s16",
73 [TYPE_S32] = "s32",
74 [TYPE_U8] = "u8",
75 [TYPE_S8] = "s8",
76 };
77
78 struct disasm_ctx {
79 FILE *out;
80 int level;
81 unsigned gpu_id;
82
83 /* current instruction repeat flag: */
84 unsigned repeat;
85 /* current instruction repeat indx/offset (for --expand): */
86 unsigned repeatidx;
87 };
88
89 static void print_reg(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
90 bool c, bool im, bool neg, bool abs, bool addr_rel)
91 {
92 const char type = c ? 'c' : 'r';
93
94 // XXX I prefer - and || for neg/abs, but preserving format used
95 // by libllvm-a3xx for easy diffing..
96
97 if (abs && neg)
98 fprintf(ctx->out, "(absneg)");
99 else if (neg)
100 fprintf(ctx->out, "(neg)");
101 else if (abs)
102 fprintf(ctx->out, "(abs)");
103
104 if (r)
105 fprintf(ctx->out, "(r)");
106
107 if (im) {
108 fprintf(ctx->out, "%d", reg.iim_val);
109 } else if (addr_rel) {
110 /* I would just use %+d but trying to make it diff'able with
111 * libllvm-a3xx...
112 */
113 if (reg.iim_val < 0)
114 fprintf(ctx->out, "%s%c<a0.x - %d>", full ? "" : "h", type, -reg.iim_val);
115 else if (reg.iim_val > 0)
116 fprintf(ctx->out, "%s%c<a0.x + %d>", full ? "" : "h", type, reg.iim_val);
117 else
118 fprintf(ctx->out, "%s%c<a0.x>", full ? "" : "h", type);
119 } else if ((reg.num == REG_A0) && !c) {
120 /* This matches libllvm output, the second (scalar) address register
121 * seems to be called a1.x instead of a0.y.
122 */
123 fprintf(ctx->out, "a%d.x", reg.comp);
124 } else if ((reg.num == REG_P0) && !c) {
125 fprintf(ctx->out, "p0.%c", component[reg.comp]);
126 } else {
127 fprintf(ctx->out, "%s%c%d.%c", full ? "" : "h", type, reg.num, component[reg.comp]);
128 }
129 }
130
131 static unsigned regidx(reg_t reg)
132 {
133 return (4 * reg.num) + reg.comp;
134 }
135
136 static reg_t idxreg(unsigned idx)
137 {
138 return (reg_t){
139 .comp = idx & 0x3,
140 .num = idx >> 2,
141 };
142 }
143
144 static void print_reg_dst(struct disasm_ctx *ctx, reg_t reg, bool full, bool addr_rel)
145 {
146 reg = idxreg(regidx(reg) + ctx->repeatidx);
147 print_reg(ctx, reg, full, false, false, false, false, false, addr_rel);
148 }
149
150 static void print_reg_src(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
151 bool c, bool im, bool neg, bool abs, bool addr_rel)
152 {
153 if (r)
154 reg = idxreg(regidx(reg) + ctx->repeatidx);
155
156 print_reg(ctx, reg, full, r, c, im, neg, abs, addr_rel);
157 }
158
159 /* TODO switch to using reginfo struct everywhere, since more readable
160 * than passing a bunch of bools to print_reg_src
161 */
162
163 struct reginfo {
164 reg_t reg;
165 bool full;
166 bool r;
167 bool c;
168 bool im;
169 bool neg;
170 bool abs;
171 bool addr_rel;
172 };
173
174 static void print_src(struct disasm_ctx *ctx, struct reginfo *info)
175 {
176 print_reg_src(ctx, info->reg, info->full, info->r, info->c, info->im,
177 info->neg, info->abs, info->addr_rel);
178 }
179
180 //static void print_dst(struct disasm_ctx *ctx, struct reginfo *info)
181 //{
182 // print_reg_dst(ctx, info->reg, info->full, info->addr_rel);
183 //}
184
185 static void print_instr_cat0(struct disasm_ctx *ctx, instr_t *instr)
186 {
187 instr_cat0_t *cat0 = &instr->cat0;
188
189 switch (cat0->opc) {
190 case OPC_KILL:
191 case OPC_IF:
192 fprintf(ctx->out, " %sp0.%c", cat0->inv ? "!" : "",
193 component[cat0->comp]);
194 break;
195 case OPC_BR:
196 fprintf(ctx->out, " %sp0.%c, #%d", cat0->inv ? "!" : "",
197 component[cat0->comp], cat0->a3xx.immed);
198 break;
199 case OPC_JUMP:
200 case OPC_CALL:
201 fprintf(ctx->out, " #%d", cat0->a3xx.immed);
202 break;
203 }
204
205 if ((debug & PRINT_VERBOSE) && (cat0->dummy2|cat0->dummy3|cat0->dummy4))
206 fprintf(ctx->out, "\t{0: %x,%x,%x}", cat0->dummy2, cat0->dummy3, cat0->dummy4);
207 }
208
209 static void print_instr_cat1(struct disasm_ctx *ctx, instr_t *instr)
210 {
211 instr_cat1_t *cat1 = &instr->cat1;
212
213 if (cat1->ul)
214 fprintf(ctx->out, "(ul)");
215
216 if (cat1->src_type == cat1->dst_type) {
217 if ((cat1->src_type == TYPE_S16) && (((reg_t)cat1->dst).num == REG_A0)) {
218 /* special case (nmemonic?): */
219 fprintf(ctx->out, "mova");
220 } else {
221 fprintf(ctx->out, "mov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
222 }
223 } else {
224 fprintf(ctx->out, "cov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
225 }
226
227 fprintf(ctx->out, " ");
228
229 if (cat1->even)
230 fprintf(ctx->out, "(even)");
231
232 if (cat1->pos_inf)
233 fprintf(ctx->out, "(pos_infinity)");
234
235 print_reg_dst(ctx, (reg_t)(cat1->dst), type_size(cat1->dst_type) == 32,
236 cat1->dst_rel);
237
238 fprintf(ctx->out, ", ");
239
240 /* ugg, have to special case this.. vs print_reg().. */
241 if (cat1->src_im) {
242 if (type_float(cat1->src_type))
243 fprintf(ctx->out, "(%f)", cat1->fim_val);
244 else if (type_uint(cat1->src_type))
245 fprintf(ctx->out, "0x%08x", cat1->uim_val);
246 else
247 fprintf(ctx->out, "%d", cat1->iim_val);
248 } else if (cat1->src_rel && !cat1->src_c) {
249 /* I would just use %+d but trying to make it diff'able with
250 * libllvm-a3xx...
251 */
252 char type = cat1->src_rel_c ? 'c' : 'r';
253 const char *full = (type_size(cat1->src_type) == 32) ? "" : "h";
254 if (cat1->off < 0)
255 fprintf(ctx->out, "%s%c<a0.x - %d>", full, type, -cat1->off);
256 else if (cat1->off > 0)
257 fprintf(ctx->out, "%s%c<a0.x + %d>", full, type, cat1->off);
258 else
259 fprintf(ctx->out, "%s%c<a0.x>", full, type);
260 } else {
261 print_reg_src(ctx, (reg_t)(cat1->src), type_size(cat1->src_type) == 32,
262 cat1->src_r, cat1->src_c, cat1->src_im, false, false, false);
263 }
264
265 if ((debug & PRINT_VERBOSE) && (cat1->must_be_0))
266 fprintf(ctx->out, "\t{1: %x}", cat1->must_be_0);
267 }
268
269 static void print_instr_cat2(struct disasm_ctx *ctx, instr_t *instr)
270 {
271 instr_cat2_t *cat2 = &instr->cat2;
272 static const char *cond[] = {
273 "lt",
274 "le",
275 "gt",
276 "ge",
277 "eq",
278 "ne",
279 "?6?",
280 };
281
282 switch (_OPC(2, cat2->opc)) {
283 case OPC_CMPS_F:
284 case OPC_CMPS_U:
285 case OPC_CMPS_S:
286 case OPC_CMPV_F:
287 case OPC_CMPV_U:
288 case OPC_CMPV_S:
289 fprintf(ctx->out, ".%s", cond[cat2->cond]);
290 break;
291 }
292
293 fprintf(ctx->out, " ");
294 if (cat2->ei)
295 fprintf(ctx->out, "(ei)");
296 print_reg_dst(ctx, (reg_t)(cat2->dst), cat2->full ^ cat2->dst_half, false);
297 fprintf(ctx->out, ", ");
298
299 unsigned src1_r = cat2->repeat ? cat2->src1_r : 0;
300 if (cat2->c1.src1_c) {
301 print_reg_src(ctx, (reg_t)(cat2->c1.src1), cat2->full, src1_r,
302 cat2->c1.src1_c, cat2->src1_im, cat2->src1_neg,
303 cat2->src1_abs, false);
304 } else if (cat2->rel1.src1_rel) {
305 print_reg_src(ctx, (reg_t)(cat2->rel1.src1), cat2->full, src1_r,
306 cat2->rel1.src1_c, cat2->src1_im, cat2->src1_neg,
307 cat2->src1_abs, cat2->rel1.src1_rel);
308 } else {
309 print_reg_src(ctx, (reg_t)(cat2->src1), cat2->full, src1_r,
310 false, cat2->src1_im, cat2->src1_neg,
311 cat2->src1_abs, false);
312 }
313
314 unsigned src2_r = cat2->repeat ? cat2->src2_r : 0;
315 switch (_OPC(2, cat2->opc)) {
316 case OPC_ABSNEG_F:
317 case OPC_ABSNEG_S:
318 case OPC_CLZ_B:
319 case OPC_CLZ_S:
320 case OPC_SIGN_F:
321 case OPC_FLOOR_F:
322 case OPC_CEIL_F:
323 case OPC_RNDNE_F:
324 case OPC_RNDAZ_F:
325 case OPC_TRUNC_F:
326 case OPC_NOT_B:
327 case OPC_BFREV_B:
328 case OPC_SETRM:
329 case OPC_CBITS_B:
330 /* these only have one src reg */
331 break;
332 default:
333 fprintf(ctx->out, ", ");
334 if (cat2->c2.src2_c) {
335 print_reg_src(ctx, (reg_t)(cat2->c2.src2), cat2->full, src2_r,
336 cat2->c2.src2_c, cat2->src2_im, cat2->src2_neg,
337 cat2->src2_abs, false);
338 } else if (cat2->rel2.src2_rel) {
339 print_reg_src(ctx, (reg_t)(cat2->rel2.src2), cat2->full, src2_r,
340 cat2->rel2.src2_c, cat2->src2_im, cat2->src2_neg,
341 cat2->src2_abs, cat2->rel2.src2_rel);
342 } else {
343 print_reg_src(ctx, (reg_t)(cat2->src2), cat2->full, src2_r,
344 false, cat2->src2_im, cat2->src2_neg,
345 cat2->src2_abs, false);
346 }
347 break;
348 }
349 }
350
351 static void print_instr_cat3(struct disasm_ctx *ctx, instr_t *instr)
352 {
353 instr_cat3_t *cat3 = &instr->cat3;
354 bool full = instr_cat3_full(cat3);
355
356 fprintf(ctx->out, " ");
357 print_reg_dst(ctx, (reg_t)(cat3->dst), full ^ cat3->dst_half, false);
358 fprintf(ctx->out, ", ");
359 unsigned src1_r = cat3->repeat ? cat3->src1_r : 0;
360 if (cat3->c1.src1_c) {
361 print_reg_src(ctx, (reg_t)(cat3->c1.src1), full,
362 src1_r, cat3->c1.src1_c, false, cat3->src1_neg,
363 false, false);
364 } else if (cat3->rel1.src1_rel) {
365 print_reg_src(ctx, (reg_t)(cat3->rel1.src1), full,
366 src1_r, cat3->rel1.src1_c, false, cat3->src1_neg,
367 false, cat3->rel1.src1_rel);
368 } else {
369 print_reg_src(ctx, (reg_t)(cat3->src1), full,
370 src1_r, false, false, cat3->src1_neg,
371 false, false);
372 }
373 fprintf(ctx->out, ", ");
374 unsigned src2_r = cat3->repeat ? cat3->src2_r : 0;
375 print_reg_src(ctx, (reg_t)cat3->src2, full,
376 src2_r, cat3->src2_c, false, cat3->src2_neg,
377 false, false);
378 fprintf(ctx->out, ", ");
379 if (cat3->c2.src3_c) {
380 print_reg_src(ctx, (reg_t)(cat3->c2.src3), full,
381 cat3->src3_r, cat3->c2.src3_c, false, cat3->src3_neg,
382 false, false);
383 } else if (cat3->rel2.src3_rel) {
384 print_reg_src(ctx, (reg_t)(cat3->rel2.src3), full,
385 cat3->src3_r, cat3->rel2.src3_c, false, cat3->src3_neg,
386 false, cat3->rel2.src3_rel);
387 } else {
388 print_reg_src(ctx, (reg_t)(cat3->src3), full,
389 cat3->src3_r, false, false, cat3->src3_neg,
390 false, false);
391 }
392 }
393
394 static void print_instr_cat4(struct disasm_ctx *ctx, instr_t *instr)
395 {
396 instr_cat4_t *cat4 = &instr->cat4;
397
398 fprintf(ctx->out, " ");
399 print_reg_dst(ctx, (reg_t)(cat4->dst), cat4->full ^ cat4->dst_half, false);
400 fprintf(ctx->out, ", ");
401
402 if (cat4->c.src_c) {
403 print_reg_src(ctx, (reg_t)(cat4->c.src), cat4->full,
404 cat4->src_r, cat4->c.src_c, cat4->src_im,
405 cat4->src_neg, cat4->src_abs, false);
406 } else if (cat4->rel.src_rel) {
407 print_reg_src(ctx, (reg_t)(cat4->rel.src), cat4->full,
408 cat4->src_r, cat4->rel.src_c, cat4->src_im,
409 cat4->src_neg, cat4->src_abs, cat4->rel.src_rel);
410 } else {
411 print_reg_src(ctx, (reg_t)(cat4->src), cat4->full,
412 cat4->src_r, false, cat4->src_im,
413 cat4->src_neg, cat4->src_abs, false);
414 }
415
416 if ((debug & PRINT_VERBOSE) && (cat4->dummy1|cat4->dummy2))
417 fprintf(ctx->out, "\t{4: %x,%x}", cat4->dummy1, cat4->dummy2);
418 }
419
420 static void print_instr_cat5(struct disasm_ctx *ctx, instr_t *instr)
421 {
422 static const struct {
423 bool src1, src2, samp, tex;
424 } info[0x1f] = {
425 [opc_op(OPC_ISAM)] = { true, false, true, true, },
426 [opc_op(OPC_ISAML)] = { true, true, true, true, },
427 [opc_op(OPC_ISAMM)] = { true, false, true, true, },
428 [opc_op(OPC_SAM)] = { true, false, true, true, },
429 [opc_op(OPC_SAMB)] = { true, true, true, true, },
430 [opc_op(OPC_SAML)] = { true, true, true, true, },
431 [opc_op(OPC_SAMGQ)] = { true, false, true, true, },
432 [opc_op(OPC_GETLOD)] = { true, false, true, true, },
433 [opc_op(OPC_CONV)] = { true, true, true, true, },
434 [opc_op(OPC_CONVM)] = { true, true, true, true, },
435 [opc_op(OPC_GETSIZE)] = { true, false, false, true, },
436 [opc_op(OPC_GETBUF)] = { false, false, false, true, },
437 [opc_op(OPC_GETPOS)] = { true, false, false, true, },
438 [opc_op(OPC_GETINFO)] = { false, false, false, true, },
439 [opc_op(OPC_DSX)] = { true, false, false, false, },
440 [opc_op(OPC_DSY)] = { true, false, false, false, },
441 [opc_op(OPC_GATHER4R)] = { true, false, true, true, },
442 [opc_op(OPC_GATHER4G)] = { true, false, true, true, },
443 [opc_op(OPC_GATHER4B)] = { true, false, true, true, },
444 [opc_op(OPC_GATHER4A)] = { true, false, true, true, },
445 [opc_op(OPC_SAMGP0)] = { true, false, true, true, },
446 [opc_op(OPC_SAMGP1)] = { true, false, true, true, },
447 [opc_op(OPC_SAMGP2)] = { true, false, true, true, },
448 [opc_op(OPC_SAMGP3)] = { true, false, true, true, },
449 [opc_op(OPC_DSXPP_1)] = { true, false, false, false, },
450 [opc_op(OPC_DSYPP_1)] = { true, false, false, false, },
451 [opc_op(OPC_RGETPOS)] = { true, false, false, false, },
452 [opc_op(OPC_RGETINFO)] = { false, false, false, false, },
453 };
454
455 static const struct {
456 bool indirect;
457 bool bindless;
458 bool use_a1;
459 bool uniform;
460 } desc_features[8] = {
461 [CAT5_NONUNIFORM] = { .indirect = true, },
462 [CAT5_UNIFORM] = { .indirect = true, .uniform = true, },
463 [CAT5_BINDLESS_IMM] = { .bindless = true, },
464 [CAT5_BINDLESS_UNIFORM] = {
465 .bindless = true,
466 .indirect = true,
467 .uniform = true,
468 },
469 [CAT5_BINDLESS_NONUNIFORM] = {
470 .bindless = true,
471 .indirect = true,
472 },
473 [CAT5_BINDLESS_A1_IMM] = {
474 .bindless = true,
475 .use_a1 = true,
476 },
477 [CAT5_BINDLESS_A1_UNIFORM] = {
478 .bindless = true,
479 .indirect = true,
480 .uniform = true,
481 .use_a1 = true,
482 },
483 [CAT5_BINDLESS_A1_NONUNIFORM] = {
484 .bindless = true,
485 .indirect = true,
486 .use_a1 = true,
487 },
488 };
489
490 instr_cat5_t *cat5 = &instr->cat5;
491 int i;
492
493 bool desc_indirect =
494 cat5->is_s2en_bindless &&
495 desc_features[cat5->s2en_bindless.desc_mode].indirect;
496 bool bindless =
497 cat5->is_s2en_bindless &&
498 desc_features[cat5->s2en_bindless.desc_mode].bindless;
499 bool use_a1 =
500 cat5->is_s2en_bindless &&
501 desc_features[cat5->s2en_bindless.desc_mode].use_a1;
502 bool uniform =
503 cat5->is_s2en_bindless &&
504 desc_features[cat5->s2en_bindless.desc_mode].uniform;
505
506 if (cat5->is_3d) fprintf(ctx->out, ".3d");
507 if (cat5->is_a) fprintf(ctx->out, ".a");
508 if (cat5->is_o) fprintf(ctx->out, ".o");
509 if (cat5->is_p) fprintf(ctx->out, ".p");
510 if (cat5->is_s) fprintf(ctx->out, ".s");
511 if (desc_indirect) fprintf(ctx->out, ".s2en");
512 if (uniform) fprintf(ctx->out, ".uniform");
513
514 if (bindless) {
515 unsigned base = (cat5->s2en_bindless.base_hi << 1) | cat5->base_lo;
516 fprintf(ctx->out, ".base%d", base);
517 }
518
519 fprintf(ctx->out, " ");
520
521 switch (_OPC(5, cat5->opc)) {
522 case OPC_DSXPP_1:
523 case OPC_DSYPP_1:
524 break;
525 default:
526 fprintf(ctx->out, "(%s)", type[cat5->type]);
527 break;
528 }
529
530 fprintf(ctx->out, "(");
531 for (i = 0; i < 4; i++)
532 if (cat5->wrmask & (1 << i))
533 fprintf(ctx->out, "%c", "xyzw"[i]);
534 fprintf(ctx->out, ")");
535
536 print_reg_dst(ctx, (reg_t)(cat5->dst), type_size(cat5->type) == 32, false);
537
538 if (info[cat5->opc].src1) {
539 fprintf(ctx->out, ", ");
540 print_reg_src(ctx, (reg_t)(cat5->src1), cat5->full, false, false, false,
541 false, false, false);
542 }
543
544 if (cat5->is_o || info[cat5->opc].src2) {
545 fprintf(ctx->out, ", ");
546 print_reg_src(ctx, (reg_t)(cat5->src2), cat5->full,
547 false, false, false, false, false, false);
548 }
549 if (cat5->is_s2en_bindless) {
550 if (!desc_indirect) {
551 if (info[cat5->opc].samp) {
552 if (use_a1)
553 fprintf(ctx->out, ", s#%d", cat5->s2en_bindless.src3);
554 else
555 fprintf(ctx->out, ", s#%d", cat5->s2en_bindless.src3 & 0xf);
556 }
557
558 if (info[cat5->opc].tex && !use_a1) {
559 fprintf(ctx->out, ", t#%d", cat5->s2en_bindless.src3 >> 4);
560 }
561 }
562 } else {
563 if (info[cat5->opc].samp)
564 fprintf(ctx->out, ", s#%d", cat5->norm.samp);
565 if (info[cat5->opc].tex)
566 fprintf(ctx->out, ", t#%d", cat5->norm.tex);
567 }
568
569 if (desc_indirect) {
570 fprintf(ctx->out, ", ");
571 print_reg_src(ctx, (reg_t)(cat5->s2en_bindless.src3), bindless,
572 false, false, false, false, false, false);
573 }
574
575 if (use_a1)
576 fprintf(ctx->out, ", a1.x");
577
578 if (debug & PRINT_VERBOSE) {
579 if (cat5->is_s2en_bindless) {
580 if ((debug & PRINT_VERBOSE) && cat5->s2en_bindless.dummy1)
581 fprintf(ctx->out, "\t{5: %x}", cat5->s2en_bindless.dummy1);
582 } else {
583 if ((debug & PRINT_VERBOSE) && cat5->norm.dummy1)
584 fprintf(ctx->out, "\t{5: %x}", cat5->norm.dummy1);
585 }
586 }
587 }
588
589 static void print_instr_cat6_a3xx(struct disasm_ctx *ctx, instr_t *instr)
590 {
591 instr_cat6_t *cat6 = &instr->cat6;
592 char sd = 0, ss = 0; /* dst/src address space */
593 bool nodst = false;
594 struct reginfo dst, src1, src2;
595 int src1off = 0, dstoff = 0;
596
597 memset(&dst, 0, sizeof(dst));
598 memset(&src1, 0, sizeof(src1));
599 memset(&src2, 0, sizeof(src2));
600
601 switch (_OPC(6, cat6->opc)) {
602 case OPC_RESINFO:
603 case OPC_RESFMT:
604 dst.full = type_size(cat6->type) == 32;
605 src1.full = type_size(cat6->type) == 32;
606 src2.full = type_size(cat6->type) == 32;
607 break;
608 case OPC_L2G:
609 case OPC_G2L:
610 dst.full = true;
611 src1.full = true;
612 src2.full = true;
613 break;
614 case OPC_STG:
615 case OPC_STL:
616 case OPC_STP:
617 case OPC_STLW:
618 case OPC_STIB:
619 dst.full = true;
620 src1.full = type_size(cat6->type) == 32;
621 src2.full = type_size(cat6->type) == 32;
622 break;
623 default:
624 dst.full = type_size(cat6->type) == 32;
625 src1.full = true;
626 src2.full = true;
627 break;
628 }
629
630 switch (_OPC(6, cat6->opc)) {
631 case OPC_PREFETCH:
632 break;
633 case OPC_RESINFO:
634 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
635 break;
636 case OPC_LDGB:
637 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
638 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
639 fprintf(ctx->out, ".%s", type[cat6->type]);
640 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
641 break;
642 case OPC_STGB:
643 case OPC_STIB:
644 fprintf(ctx->out, ".%s", cat6->stgb.typed ? "typed" : "untyped");
645 fprintf(ctx->out, ".%dd", cat6->stgb.d + 1);
646 fprintf(ctx->out, ".%s", type[cat6->type]);
647 fprintf(ctx->out, ".%d", cat6->stgb.type_size + 1);
648 break;
649 case OPC_ATOMIC_ADD:
650 case OPC_ATOMIC_SUB:
651 case OPC_ATOMIC_XCHG:
652 case OPC_ATOMIC_INC:
653 case OPC_ATOMIC_DEC:
654 case OPC_ATOMIC_CMPXCHG:
655 case OPC_ATOMIC_MIN:
656 case OPC_ATOMIC_MAX:
657 case OPC_ATOMIC_AND:
658 case OPC_ATOMIC_OR:
659 case OPC_ATOMIC_XOR:
660 ss = cat6->g ? 'g' : 'l';
661 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
662 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
663 fprintf(ctx->out, ".%s", type[cat6->type]);
664 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
665 fprintf(ctx->out, ".%c", ss);
666 break;
667 default:
668 dst.im = cat6->g && !cat6->dst_off;
669 fprintf(ctx->out, ".%s", type[cat6->type]);
670 break;
671 }
672 fprintf(ctx->out, " ");
673
674 switch (_OPC(6, cat6->opc)) {
675 case OPC_STG:
676 sd = 'g';
677 break;
678 case OPC_STP:
679 sd = 'p';
680 break;
681 case OPC_STL:
682 case OPC_STLW:
683 sd = 'l';
684 break;
685
686 case OPC_LDG:
687 case OPC_LDC:
688 ss = 'g';
689 break;
690 case OPC_LDP:
691 ss = 'p';
692 break;
693 case OPC_LDL:
694 case OPC_LDLW:
695 case OPC_LDLV:
696 ss = 'l';
697 break;
698
699 case OPC_L2G:
700 ss = 'l';
701 sd = 'g';
702 break;
703
704 case OPC_G2L:
705 ss = 'g';
706 sd = 'l';
707 break;
708
709 case OPC_PREFETCH:
710 ss = 'g';
711 nodst = true;
712 break;
713 }
714
715 if ((_OPC(6, cat6->opc) == OPC_STGB) || (_OPC(6, cat6->opc) == OPC_STIB)) {
716 struct reginfo src3;
717
718 memset(&src3, 0, sizeof(src3));
719
720 src1.reg = (reg_t)(cat6->stgb.src1);
721 src2.reg = (reg_t)(cat6->stgb.src2);
722 src2.im = cat6->stgb.src2_im;
723 src3.reg = (reg_t)(cat6->stgb.src3);
724 src3.im = cat6->stgb.src3_im;
725 src3.full = true;
726
727 fprintf(ctx->out, "g[%u], ", cat6->stgb.dst_ssbo);
728 print_src(ctx, &src1);
729 fprintf(ctx->out, ", ");
730 print_src(ctx, &src2);
731 fprintf(ctx->out, ", ");
732 print_src(ctx, &src3);
733
734 if (debug & PRINT_VERBOSE)
735 fprintf(ctx->out, " (pad0=%x, pad3=%x)", cat6->stgb.pad0, cat6->stgb.pad3);
736
737 return;
738 }
739
740 if (is_atomic(_OPC(6, cat6->opc))) {
741
742 src1.reg = (reg_t)(cat6->ldgb.src1);
743 src1.im = cat6->ldgb.src1_im;
744 src2.reg = (reg_t)(cat6->ldgb.src2);
745 src2.im = cat6->ldgb.src2_im;
746 dst.reg = (reg_t)(cat6->ldgb.dst);
747
748 print_src(ctx, &dst);
749 fprintf(ctx->out, ", ");
750 if (ss == 'g') {
751 struct reginfo src3;
752 memset(&src3, 0, sizeof(src3));
753
754 src3.reg = (reg_t)(cat6->ldgb.src3);
755 src3.full = true;
756
757 /* For images, the ".typed" variant is used and src2 is
758 * the ivecN coordinates, ie ivec2 for 2d.
759 *
760 * For SSBOs, the ".untyped" variant is used and src2 is
761 * a simple dword offset.. src3 appears to be
762 * uvec2(offset * 4, 0). Not sure the point of that.
763 */
764
765 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
766 print_src(ctx, &src1); /* value */
767 fprintf(ctx->out, ", ");
768 print_src(ctx, &src2); /* offset/coords */
769 fprintf(ctx->out, ", ");
770 print_src(ctx, &src3); /* 64b byte offset.. */
771
772 if (debug & PRINT_VERBOSE) {
773 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0,
774 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
775 }
776 } else { /* ss == 'l' */
777 fprintf(ctx->out, "l[");
778 print_src(ctx, &src1); /* simple byte offset */
779 fprintf(ctx->out, "], ");
780 print_src(ctx, &src2); /* value */
781
782 if (debug & PRINT_VERBOSE) {
783 fprintf(ctx->out, " (src3=%x, pad0=%x, pad3=%x, mustbe0=%x)",
784 cat6->ldgb.src3, cat6->ldgb.pad0,
785 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
786 }
787 }
788
789 return;
790 } else if (_OPC(6, cat6->opc) == OPC_RESINFO) {
791 dst.reg = (reg_t)(cat6->ldgb.dst);
792
793 print_src(ctx, &dst);
794 fprintf(ctx->out, ", ");
795 fprintf(ctx->out, "g[%u]", cat6->ldgb.src_ssbo);
796
797 return;
798 } else if (_OPC(6, cat6->opc) == OPC_LDGB) {
799
800 src1.reg = (reg_t)(cat6->ldgb.src1);
801 src1.im = cat6->ldgb.src1_im;
802 src2.reg = (reg_t)(cat6->ldgb.src2);
803 src2.im = cat6->ldgb.src2_im;
804 dst.reg = (reg_t)(cat6->ldgb.dst);
805
806 print_src(ctx, &dst);
807 fprintf(ctx->out, ", ");
808 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
809 print_src(ctx, &src1);
810 fprintf(ctx->out, ", ");
811 print_src(ctx, &src2);
812
813 if (debug & PRINT_VERBOSE)
814 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0, cat6->ldgb.pad3, cat6->ldgb.mustbe0);
815
816 return;
817 } else if (_OPC(6, cat6->opc) == OPC_LDG && cat6->a.src1_im && cat6->a.src2_im) {
818 struct reginfo src3;
819
820 memset(&src3, 0, sizeof(src3));
821 src1.reg = (reg_t)(cat6->a.src1);
822 src2.reg = (reg_t)(cat6->a.src2);
823 src2.im = cat6->a.src2_im;
824 src3.reg = (reg_t)(cat6->a.off);
825 src3.full = true;
826 dst.reg = (reg_t)(cat6->d.dst);
827
828 print_src(ctx, &dst);
829 fprintf(ctx->out, ", g[");
830 print_src(ctx, &src1);
831 fprintf(ctx->out, "+");
832 print_src(ctx, &src3);
833 fprintf(ctx->out, "], ");
834 print_src(ctx, &src2);
835
836 return;
837 }
838 if (cat6->dst_off) {
839 dst.reg = (reg_t)(cat6->c.dst);
840 dstoff = cat6->c.off;
841 } else {
842 dst.reg = (reg_t)(cat6->d.dst);
843 }
844
845 if (cat6->src_off) {
846 src1.reg = (reg_t)(cat6->a.src1);
847 src1.im = cat6->a.src1_im;
848 src2.reg = (reg_t)(cat6->a.src2);
849 src2.im = cat6->a.src2_im;
850 src1off = cat6->a.off;
851 } else {
852 src1.reg = (reg_t)(cat6->b.src1);
853 src1.im = cat6->b.src1_im;
854 src2.reg = (reg_t)(cat6->b.src2);
855 src2.im = cat6->b.src2_im;
856 }
857
858 if (!nodst) {
859 if (sd)
860 fprintf(ctx->out, "%c[", sd);
861 /* note: dst might actually be a src (ie. address to store to) */
862 print_src(ctx, &dst);
863 if (cat6->dst_off && cat6->g) {
864 struct reginfo dstoff_reg = {0};
865 dstoff_reg.reg = (reg_t) cat6->c.off;
866 dstoff_reg.full = true;
867 fprintf(ctx->out, "+");
868 print_src(ctx, &dstoff_reg);
869 } else if (dstoff)
870 fprintf(ctx->out, "%+d", dstoff);
871 if (sd)
872 fprintf(ctx->out, "]");
873 fprintf(ctx->out, ", ");
874 }
875
876 if (ss)
877 fprintf(ctx->out, "%c[", ss);
878
879 /* can have a larger than normal immed, so hack: */
880 if (src1.im) {
881 fprintf(ctx->out, "%u", src1.reg.dummy13);
882 } else {
883 print_src(ctx, &src1);
884 }
885
886 if (cat6->src_off && cat6->g)
887 print_src(ctx, &src2);
888 else if (src1off)
889 fprintf(ctx->out, "%+d", src1off);
890 if (ss)
891 fprintf(ctx->out, "]");
892
893 switch (_OPC(6, cat6->opc)) {
894 case OPC_RESINFO:
895 case OPC_RESFMT:
896 break;
897 default:
898 fprintf(ctx->out, ", ");
899 print_src(ctx, &src2);
900 break;
901 }
902 }
903
904 static void print_instr_cat6_a6xx(struct disasm_ctx *ctx, instr_t *instr)
905 {
906 instr_cat6_a6xx_t *cat6 = &instr->cat6_a6xx;
907 struct reginfo src1, src2, ssbo;
908 bool uses_type = _OPC(6, cat6->opc) != OPC_LDC;
909
910 static const struct {
911 bool indirect;
912 bool bindless;
913 bool uniform;
914 } desc_features[8] = {
915 [CAT6_IMM] = { false },
916 [CAT6_BINDLESS_IMM] = { .bindless = true, },
917 [CAT6_BINDLESS_UNIFORM] = {
918 .bindless = true,
919 .indirect = true,
920 .uniform = true,
921 },
922 [CAT6_BINDLESS_NONUNIFORM] = {
923 .bindless = true,
924 .indirect = true,
925 },
926 };
927
928 bool indirect_ssbo = desc_features[cat6->desc_mode].indirect;
929 bool bindless = desc_features[cat6->desc_mode].bindless;
930 bool uniform = desc_features[cat6->desc_mode].uniform;
931
932
933 memset(&src1, 0, sizeof(src1));
934 memset(&src2, 0, sizeof(src2));
935 memset(&ssbo, 0, sizeof(ssbo));
936
937 if (uses_type) {
938 fprintf(ctx->out, ".%s", cat6->typed ? "typed" : "untyped");
939 fprintf(ctx->out, ".%dd", cat6->d + 1);
940 fprintf(ctx->out, ".%s", type[cat6->type]);
941 }
942 fprintf(ctx->out, ".%u", cat6->type_size + 1);
943
944 if (bindless)
945 fprintf(ctx->out, ".base%d", cat6->base);
946 if (uniform)
947 fprintf(ctx->out, ".uniform");
948 fprintf(ctx->out, " ");
949
950 src2.reg = (reg_t)(cat6->src2);
951 src2.full = true; // XXX
952 print_src(ctx, &src2);
953 fprintf(ctx->out, ", ");
954
955 src1.reg = (reg_t)(cat6->src1);
956 src1.full = true; // XXX
957 print_src(ctx, &src1);
958 fprintf(ctx->out, ", ");
959 ssbo.reg = (reg_t)(cat6->ssbo);
960 ssbo.im = !indirect_ssbo;
961 ssbo.full = true;
962 print_src(ctx, &ssbo);
963
964 if (debug & PRINT_VERBOSE) {
965 fprintf(ctx->out, " (pad1=%x, pad2=%x, pad3=%x, pad4=%x, pad5=%x)",
966 cat6->pad1, cat6->pad2, cat6->pad3, cat6->pad4, cat6->pad5);
967 }
968 }
969
970 static void print_instr_cat6(struct disasm_ctx *ctx, instr_t *instr)
971 {
972 if (!is_cat6_legacy(instr, ctx->gpu_id)) {
973 print_instr_cat6_a6xx(ctx, instr);
974 if (debug & PRINT_VERBOSE)
975 fprintf(ctx->out, " NEW");
976 } else {
977 print_instr_cat6_a3xx(ctx, instr);
978 if (debug & PRINT_VERBOSE)
979 fprintf(ctx->out, " LEGACY");
980 }
981 }
982 static void print_instr_cat7(struct disasm_ctx *ctx, instr_t *instr)
983 {
984 instr_cat7_t *cat7 = &instr->cat7;
985
986 if (cat7->g)
987 fprintf(ctx->out, ".g");
988 if (cat7->l)
989 fprintf(ctx->out, ".l");
990
991 if (_OPC(7, cat7->opc) == OPC_FENCE) {
992 if (cat7->r)
993 fprintf(ctx->out, ".r");
994 if (cat7->w)
995 fprintf(ctx->out, ".w");
996 }
997 }
998
999 /* size of largest OPC field of all the instruction categories: */
1000 #define NOPC_BITS 6
1001
1002 static const struct opc_info {
1003 uint16_t cat;
1004 uint16_t opc;
1005 const char *name;
1006 void (*print)(struct disasm_ctx *ctx, instr_t *instr);
1007 } opcs[1 << (3+NOPC_BITS)] = {
1008 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat }
1009 /* category 0: */
1010 OPC(0, OPC_NOP, nop),
1011 OPC(0, OPC_BR, br),
1012 OPC(0, OPC_JUMP, jump),
1013 OPC(0, OPC_CALL, call),
1014 OPC(0, OPC_RET, ret),
1015 OPC(0, OPC_KILL, kill),
1016 OPC(0, OPC_END, end),
1017 OPC(0, OPC_EMIT, emit),
1018 OPC(0, OPC_CUT, cut),
1019 OPC(0, OPC_CHMASK, chmask),
1020 OPC(0, OPC_CHSH, chsh),
1021 OPC(0, OPC_FLOW_REV, flow_rev),
1022 OPC(0, OPC_IF, if),
1023 OPC(0, OPC_ELSE, else),
1024 OPC(0, OPC_ENDIF, endif),
1025
1026 /* category 1: */
1027 OPC(1, OPC_MOV, ),
1028
1029 /* category 2: */
1030 OPC(2, OPC_ADD_F, add.f),
1031 OPC(2, OPC_MIN_F, min.f),
1032 OPC(2, OPC_MAX_F, max.f),
1033 OPC(2, OPC_MUL_F, mul.f),
1034 OPC(2, OPC_SIGN_F, sign.f),
1035 OPC(2, OPC_CMPS_F, cmps.f),
1036 OPC(2, OPC_ABSNEG_F, absneg.f),
1037 OPC(2, OPC_CMPV_F, cmpv.f),
1038 OPC(2, OPC_FLOOR_F, floor.f),
1039 OPC(2, OPC_CEIL_F, ceil.f),
1040 OPC(2, OPC_RNDNE_F, rndne.f),
1041 OPC(2, OPC_RNDAZ_F, rndaz.f),
1042 OPC(2, OPC_TRUNC_F, trunc.f),
1043 OPC(2, OPC_ADD_U, add.u),
1044 OPC(2, OPC_ADD_S, add.s),
1045 OPC(2, OPC_SUB_U, sub.u),
1046 OPC(2, OPC_SUB_S, sub.s),
1047 OPC(2, OPC_CMPS_U, cmps.u),
1048 OPC(2, OPC_CMPS_S, cmps.s),
1049 OPC(2, OPC_MIN_U, min.u),
1050 OPC(2, OPC_MIN_S, min.s),
1051 OPC(2, OPC_MAX_U, max.u),
1052 OPC(2, OPC_MAX_S, max.s),
1053 OPC(2, OPC_ABSNEG_S, absneg.s),
1054 OPC(2, OPC_AND_B, and.b),
1055 OPC(2, OPC_OR_B, or.b),
1056 OPC(2, OPC_NOT_B, not.b),
1057 OPC(2, OPC_XOR_B, xor.b),
1058 OPC(2, OPC_CMPV_U, cmpv.u),
1059 OPC(2, OPC_CMPV_S, cmpv.s),
1060 OPC(2, OPC_MUL_U24, mul.u24),
1061 OPC(2, OPC_MUL_S24, mul.s24),
1062 OPC(2, OPC_MULL_U, mull.u),
1063 OPC(2, OPC_BFREV_B, bfrev.b),
1064 OPC(2, OPC_CLZ_S, clz.s),
1065 OPC(2, OPC_CLZ_B, clz.b),
1066 OPC(2, OPC_SHL_B, shl.b),
1067 OPC(2, OPC_SHR_B, shr.b),
1068 OPC(2, OPC_ASHR_B, ashr.b),
1069 OPC(2, OPC_BARY_F, bary.f),
1070 OPC(2, OPC_MGEN_B, mgen.b),
1071 OPC(2, OPC_GETBIT_B, getbit.b),
1072 OPC(2, OPC_SETRM, setrm),
1073 OPC(2, OPC_CBITS_B, cbits.b),
1074 OPC(2, OPC_SHB, shb),
1075 OPC(2, OPC_MSAD, msad),
1076
1077 /* category 3: */
1078 OPC(3, OPC_MAD_U16, mad.u16),
1079 OPC(3, OPC_MADSH_U16, madsh.u16),
1080 OPC(3, OPC_MAD_S16, mad.s16),
1081 OPC(3, OPC_MADSH_M16, madsh.m16),
1082 OPC(3, OPC_MAD_U24, mad.u24),
1083 OPC(3, OPC_MAD_S24, mad.s24),
1084 OPC(3, OPC_MAD_F16, mad.f16),
1085 OPC(3, OPC_MAD_F32, mad.f32),
1086 OPC(3, OPC_SEL_B16, sel.b16),
1087 OPC(3, OPC_SEL_B32, sel.b32),
1088 OPC(3, OPC_SEL_S16, sel.s16),
1089 OPC(3, OPC_SEL_S32, sel.s32),
1090 OPC(3, OPC_SEL_F16, sel.f16),
1091 OPC(3, OPC_SEL_F32, sel.f32),
1092 OPC(3, OPC_SAD_S16, sad.s16),
1093 OPC(3, OPC_SAD_S32, sad.s32),
1094
1095 /* category 4: */
1096 OPC(4, OPC_RCP, rcp),
1097 OPC(4, OPC_RSQ, rsq),
1098 OPC(4, OPC_LOG2, log2),
1099 OPC(4, OPC_EXP2, exp2),
1100 OPC(4, OPC_SIN, sin),
1101 OPC(4, OPC_COS, cos),
1102 OPC(4, OPC_SQRT, sqrt),
1103 OPC(4, OPC_HRSQ, hrsq),
1104 OPC(4, OPC_HLOG2, hlog2),
1105 OPC(4, OPC_HEXP2, hexp2),
1106
1107 /* category 5: */
1108 OPC(5, OPC_ISAM, isam),
1109 OPC(5, OPC_ISAML, isaml),
1110 OPC(5, OPC_ISAMM, isamm),
1111 OPC(5, OPC_SAM, sam),
1112 OPC(5, OPC_SAMB, samb),
1113 OPC(5, OPC_SAML, saml),
1114 OPC(5, OPC_SAMGQ, samgq),
1115 OPC(5, OPC_GETLOD, getlod),
1116 OPC(5, OPC_CONV, conv),
1117 OPC(5, OPC_CONVM, convm),
1118 OPC(5, OPC_GETSIZE, getsize),
1119 OPC(5, OPC_GETBUF, getbuf),
1120 OPC(5, OPC_GETPOS, getpos),
1121 OPC(5, OPC_GETINFO, getinfo),
1122 OPC(5, OPC_DSX, dsx),
1123 OPC(5, OPC_DSY, dsy),
1124 OPC(5, OPC_GATHER4R, gather4r),
1125 OPC(5, OPC_GATHER4G, gather4g),
1126 OPC(5, OPC_GATHER4B, gather4b),
1127 OPC(5, OPC_GATHER4A, gather4a),
1128 OPC(5, OPC_SAMGP0, samgp0),
1129 OPC(5, OPC_SAMGP1, samgp1),
1130 OPC(5, OPC_SAMGP2, samgp2),
1131 OPC(5, OPC_SAMGP3, samgp3),
1132 OPC(5, OPC_DSXPP_1, dsxpp.1),
1133 OPC(5, OPC_DSYPP_1, dsypp.1),
1134 OPC(5, OPC_RGETPOS, rgetpos),
1135 OPC(5, OPC_RGETINFO, rgetinfo),
1136
1137
1138 /* category 6: */
1139 OPC(6, OPC_LDG, ldg),
1140 OPC(6, OPC_LDL, ldl),
1141 OPC(6, OPC_LDP, ldp),
1142 OPC(6, OPC_STG, stg),
1143 OPC(6, OPC_STL, stl),
1144 OPC(6, OPC_STP, stp),
1145 OPC(6, OPC_LDIB, ldib),
1146 OPC(6, OPC_G2L, g2l),
1147 OPC(6, OPC_L2G, l2g),
1148 OPC(6, OPC_PREFETCH, prefetch),
1149 OPC(6, OPC_LDLW, ldlw),
1150 OPC(6, OPC_STLW, stlw),
1151 OPC(6, OPC_RESFMT, resfmt),
1152 OPC(6, OPC_RESINFO, resinfo),
1153 OPC(6, OPC_ATOMIC_ADD, atomic.add),
1154 OPC(6, OPC_ATOMIC_SUB, atomic.sub),
1155 OPC(6, OPC_ATOMIC_XCHG, atomic.xchg),
1156 OPC(6, OPC_ATOMIC_INC, atomic.inc),
1157 OPC(6, OPC_ATOMIC_DEC, atomic.dec),
1158 OPC(6, OPC_ATOMIC_CMPXCHG, atomic.cmpxchg),
1159 OPC(6, OPC_ATOMIC_MIN, atomic.min),
1160 OPC(6, OPC_ATOMIC_MAX, atomic.max),
1161 OPC(6, OPC_ATOMIC_AND, atomic.and),
1162 OPC(6, OPC_ATOMIC_OR, atomic.or),
1163 OPC(6, OPC_ATOMIC_XOR, atomic.xor),
1164 OPC(6, OPC_LDGB, ldgb),
1165 OPC(6, OPC_STGB, stgb),
1166 OPC(6, OPC_STIB, stib),
1167 OPC(6, OPC_LDC, ldc),
1168 OPC(6, OPC_LDLV, ldlv),
1169
1170 OPC(7, OPC_BAR, bar),
1171 OPC(7, OPC_FENCE, fence),
1172
1173 #undef OPC
1174 };
1175
1176 #define GETINFO(instr) (&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr, ctx->gpu_id)]))
1177
1178 // XXX hack.. probably should move this table somewhere common:
1179 #include "ir3.h"
1180 const char *ir3_instr_name(struct ir3_instruction *instr)
1181 {
1182 if (opc_cat(instr->opc) == -1) return "??meta??";
1183 return opcs[instr->opc].name;
1184 }
1185
1186 static void print_single_instr(struct disasm_ctx *ctx, instr_t *instr)
1187 {
1188 const char *name = GETINFO(instr)->name;
1189 uint32_t opc = instr_opc(instr, ctx->gpu_id);
1190
1191 if (name) {
1192 fprintf(ctx->out, "%s", name);
1193 GETINFO(instr)->print(ctx, instr);
1194 } else {
1195 fprintf(ctx->out, "unknown(%d,%d)", instr->opc_cat, opc);
1196
1197 switch (instr->opc_cat) {
1198 case 0: print_instr_cat0(ctx, instr); break;
1199 case 1: print_instr_cat1(ctx, instr); break;
1200 case 2: print_instr_cat2(ctx, instr); break;
1201 case 3: print_instr_cat3(ctx, instr); break;
1202 case 4: print_instr_cat4(ctx, instr); break;
1203 case 5: print_instr_cat5(ctx, instr); break;
1204 case 6: print_instr_cat6(ctx, instr); break;
1205 case 7: print_instr_cat7(ctx, instr); break;
1206 }
1207 }
1208 }
1209
1210 static bool print_instr(struct disasm_ctx *ctx, uint32_t *dwords, int n)
1211 {
1212 instr_t *instr = (instr_t *)dwords;
1213 uint32_t opc = instr_opc(instr, ctx->gpu_id);
1214 unsigned nop = 0;
1215
1216 if (debug & PRINT_VERBOSE)
1217 fprintf(ctx->out, "%s%04d[%08xx_%08xx] ", levels[ctx->level], n, dwords[1], dwords[0]);
1218
1219 /* NOTE: order flags are printed is a bit fugly.. but for now I
1220 * try to match the order in llvm-a3xx disassembler for easy
1221 * diff'ing..
1222 */
1223
1224 ctx->repeat = instr_repeat(instr);
1225
1226 if (instr->sync) {
1227 fprintf(ctx->out, "(sy)");
1228 }
1229 if (instr->ss && ((instr->opc_cat <= 4) || (instr->opc_cat == 7))) {
1230 fprintf(ctx->out, "(ss)");
1231 }
1232 if (instr->jmp_tgt)
1233 fprintf(ctx->out, "(jp)");
1234 if (instr_sat(instr))
1235 fprintf(ctx->out, "(sat)");
1236 if (ctx->repeat)
1237 fprintf(ctx->out, "(rpt%d)", ctx->repeat);
1238 else if ((instr->opc_cat == 2) && (instr->cat2.src1_r || instr->cat2.src2_r))
1239 nop = (instr->cat2.src2_r * 2) + instr->cat2.src1_r;
1240 else if ((instr->opc_cat == 3) && (instr->cat3.src1_r || instr->cat3.src2_r))
1241 nop = (instr->cat3.src2_r * 2) + instr->cat3.src1_r;
1242 if (nop)
1243 fprintf(ctx->out, "(nop%d)", nop);
1244
1245 if (instr->ul && ((2 <= instr->opc_cat) && (instr->opc_cat <= 4)))
1246 fprintf(ctx->out, "(ul)");
1247
1248 print_single_instr(ctx, instr);
1249 fprintf(ctx->out, "\n");
1250
1251 if ((instr->opc_cat <= 4) && (debug & EXPAND_REPEAT)) {
1252 int i;
1253 for (i = 0; i < nop; i++) {
1254 fprintf(ctx->out, "%s%04d[ ] ", levels[ctx->level], n);
1255 fprintf(ctx->out, "nop\n");
1256 }
1257 for (i = 0; i < ctx->repeat; i++) {
1258 ctx->repeatidx = i + 1;
1259 fprintf(ctx->out, "%s%04d[ ] ", levels[ctx->level], n);
1260
1261 print_single_instr(ctx, instr);
1262 fprintf(ctx->out, "\n");
1263 }
1264 ctx->repeatidx = 0;
1265 }
1266
1267 return (instr->opc_cat == 0) && (opc == OPC_END);
1268 }
1269
1270 int disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out, unsigned gpu_id)
1271 {
1272 struct disasm_ctx ctx;
1273 int i;
1274 int nop_count = 0;
1275
1276 assert((sizedwords % 2) == 0);
1277
1278 memset(&ctx, 0, sizeof(ctx));
1279 ctx.out = out;
1280 ctx.level = level;
1281 ctx.gpu_id = gpu_id;
1282
1283 for (i = 0; i < sizedwords; i += 2) {
1284 print_instr(&ctx, &dwords[i], i/2);
1285 if (dwords[i] == 0 && dwords[i + 1] == 0)
1286 nop_count++;
1287 else
1288 nop_count = 0;
1289 if (nop_count > 3)
1290 break;
1291 }
1292
1293 return 0;
1294 }