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freedreno/ir3: sync instr/disasm
[mesa.git] / src / freedreno / ir3 / disasm-a3xx.c
1 /*
2 * Copyright (c) 2013 Rob Clark <robdclark@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <stdlib.h>
26 #include <stdint.h>
27 #include <stdbool.h>
28 #include <string.h>
29 #include <assert.h>
30
31 #include <util/u_debug.h>
32
33 #include "instr-a3xx.h"
34
35 /* bitmask of debug flags */
36 enum debug_t {
37 PRINT_RAW = 0x1, /* dump raw hexdump */
38 PRINT_VERBOSE = 0x2,
39 };
40
41 static enum debug_t debug;
42
43 #define printf debug_printf
44
45 static const char *levels[] = {
46 "",
47 "\t",
48 "\t\t",
49 "\t\t\t",
50 "\t\t\t\t",
51 "\t\t\t\t\t",
52 "\t\t\t\t\t\t",
53 "\t\t\t\t\t\t\t",
54 "\t\t\t\t\t\t\t\t",
55 "\t\t\t\t\t\t\t\t\t",
56 "x",
57 "x",
58 "x",
59 "x",
60 "x",
61 "x",
62 };
63
64 static const char *component = "xyzw";
65
66 static const char *type[] = {
67 [TYPE_F16] = "f16",
68 [TYPE_F32] = "f32",
69 [TYPE_U16] = "u16",
70 [TYPE_U32] = "u32",
71 [TYPE_S16] = "s16",
72 [TYPE_S32] = "s32",
73 [TYPE_U8] = "u8",
74 [TYPE_S8] = "s8",
75 };
76
77 struct disasm_ctx {
78 FILE *out;
79 int level;
80 unsigned gpu_id;
81
82 /* current instruction repeat flag: */
83 unsigned repeat;
84 };
85
86 static void print_reg(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
87 bool c, bool im, bool neg, bool abs, bool addr_rel)
88 {
89 const char type = c ? 'c' : 'r';
90
91 // XXX I prefer - and || for neg/abs, but preserving format used
92 // by libllvm-a3xx for easy diffing..
93
94 if (abs && neg)
95 fprintf(ctx->out, "(absneg)");
96 else if (neg)
97 fprintf(ctx->out, "(neg)");
98 else if (abs)
99 fprintf(ctx->out, "(abs)");
100
101 if (r)
102 fprintf(ctx->out, "(r)");
103
104 if (im) {
105 fprintf(ctx->out, "%d", reg.iim_val);
106 } else if (addr_rel) {
107 /* I would just use %+d but trying to make it diff'able with
108 * libllvm-a3xx...
109 */
110 if (reg.iim_val < 0)
111 fprintf(ctx->out, "%s%c<a0.x - %d>", full ? "" : "h", type, -reg.iim_val);
112 else if (reg.iim_val > 0)
113 fprintf(ctx->out, "%s%c<a0.x + %d>", full ? "" : "h", type, reg.iim_val);
114 else
115 fprintf(ctx->out, "%s%c<a0.x>", full ? "" : "h", type);
116 } else if ((reg.num == REG_A0) && !c) {
117 fprintf(ctx->out, "a0.%c", component[reg.comp]);
118 } else if ((reg.num == REG_P0) && !c) {
119 fprintf(ctx->out, "p0.%c", component[reg.comp]);
120 } else {
121 fprintf(ctx->out, "%s%c%d.%c", full ? "" : "h", type, reg.num, component[reg.comp]);
122 }
123 }
124
125
126 static void print_reg_dst(struct disasm_ctx *ctx, reg_t reg, bool full, bool addr_rel)
127 {
128 print_reg(ctx, reg, full, false, false, false, false, false, addr_rel);
129 }
130
131 static void print_reg_src(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
132 bool c, bool im, bool neg, bool abs, bool addr_rel)
133 {
134 print_reg(ctx, reg, full, r, c, im, neg, abs, addr_rel);
135 }
136
137 /* TODO switch to using reginfo struct everywhere, since more readable
138 * than passing a bunch of bools to print_reg_src
139 */
140
141 struct reginfo {
142 reg_t reg;
143 bool full;
144 bool r;
145 bool c;
146 bool im;
147 bool neg;
148 bool abs;
149 bool addr_rel;
150 };
151
152 static void print_src(struct disasm_ctx *ctx, struct reginfo *info)
153 {
154 print_reg_src(ctx, info->reg, info->full, info->r, info->c, info->im,
155 info->neg, info->abs, info->addr_rel);
156 }
157
158 //static void print_dst(struct disasm_ctx *ctx, struct reginfo *info)
159 //{
160 // print_reg_dst(ctx, info->reg, info->full, info->addr_rel);
161 //}
162
163 static void print_instr_cat0(struct disasm_ctx *ctx, instr_t *instr)
164 {
165 instr_cat0_t *cat0 = &instr->cat0;
166
167 switch (cat0->opc) {
168 case OPC_KILL:
169 fprintf(ctx->out, " %sp0.%c", cat0->inv ? "!" : "",
170 component[cat0->comp]);
171 break;
172 case OPC_BR:
173 fprintf(ctx->out, " %sp0.%c, #%d", cat0->inv ? "!" : "",
174 component[cat0->comp], cat0->a3xx.immed);
175 break;
176 case OPC_JUMP:
177 case OPC_CALL:
178 fprintf(ctx->out, " #%d", cat0->a3xx.immed);
179 break;
180 }
181
182 if ((debug & PRINT_VERBOSE) && (cat0->dummy2|cat0->dummy3|cat0->dummy4))
183 fprintf(ctx->out, "\t{0: %x,%x,%x}", cat0->dummy2, cat0->dummy3, cat0->dummy4);
184 }
185
186 static void print_instr_cat1(struct disasm_ctx *ctx, instr_t *instr)
187 {
188 instr_cat1_t *cat1 = &instr->cat1;
189
190 if (cat1->ul)
191 fprintf(ctx->out, "(ul)");
192
193 if (cat1->src_type == cat1->dst_type) {
194 if ((cat1->src_type == TYPE_S16) && (((reg_t)cat1->dst).num == REG_A0)) {
195 /* special case (nmemonic?): */
196 fprintf(ctx->out, "mova");
197 } else {
198 fprintf(ctx->out, "mov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
199 }
200 } else {
201 fprintf(ctx->out, "cov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
202 }
203
204 fprintf(ctx->out, " ");
205
206 if (cat1->even)
207 fprintf(ctx->out, "(even)");
208
209 if (cat1->pos_inf)
210 fprintf(ctx->out, "(pos_infinity)");
211
212 print_reg_dst(ctx, (reg_t)(cat1->dst), type_size(cat1->dst_type) == 32,
213 cat1->dst_rel);
214
215 fprintf(ctx->out, ", ");
216
217 /* ugg, have to special case this.. vs print_reg().. */
218 if (cat1->src_im) {
219 if (type_float(cat1->src_type))
220 fprintf(ctx->out, "(%f)", cat1->fim_val);
221 else if (type_uint(cat1->src_type))
222 fprintf(ctx->out, "0x%08x", cat1->uim_val);
223 else
224 fprintf(ctx->out, "%d", cat1->iim_val);
225 } else if (cat1->src_rel && !cat1->src_c) {
226 /* I would just use %+d but trying to make it diff'able with
227 * libllvm-a3xx...
228 */
229 char type = cat1->src_rel_c ? 'c' : 'r';
230 if (cat1->off < 0)
231 fprintf(ctx->out, "%c<a0.x - %d>", type, -cat1->off);
232 else if (cat1->off > 0)
233 fprintf(ctx->out, "%c<a0.x + %d>", type, cat1->off);
234 else
235 fprintf(ctx->out, "%c<a0.x>", type);
236 } else {
237 print_reg_src(ctx, (reg_t)(cat1->src), type_size(cat1->src_type) == 32,
238 cat1->src_r, cat1->src_c, cat1->src_im, false, false, false);
239 }
240
241 if ((debug & PRINT_VERBOSE) && (cat1->must_be_0))
242 fprintf(ctx->out, "\t{1: %x}", cat1->must_be_0);
243 }
244
245 static void print_instr_cat2(struct disasm_ctx *ctx, instr_t *instr)
246 {
247 instr_cat2_t *cat2 = &instr->cat2;
248 static const char *cond[] = {
249 "lt",
250 "le",
251 "gt",
252 "ge",
253 "eq",
254 "ne",
255 "?6?",
256 };
257
258 switch (_OPC(2, cat2->opc)) {
259 case OPC_CMPS_F:
260 case OPC_CMPS_U:
261 case OPC_CMPS_S:
262 case OPC_CMPV_F:
263 case OPC_CMPV_U:
264 case OPC_CMPV_S:
265 fprintf(ctx->out, ".%s", cond[cat2->cond]);
266 break;
267 }
268
269 fprintf(ctx->out, " ");
270 if (cat2->ei)
271 fprintf(ctx->out, "(ei)");
272 print_reg_dst(ctx, (reg_t)(cat2->dst), cat2->full ^ cat2->dst_half, false);
273 fprintf(ctx->out, ", ");
274
275 unsigned src1_r = cat2->repeat ? cat2->src1_r : 0;
276 if (cat2->c1.src1_c) {
277 print_reg_src(ctx, (reg_t)(cat2->c1.src1), cat2->full, src1_r,
278 cat2->c1.src1_c, cat2->src1_im, cat2->src1_neg,
279 cat2->src1_abs, false);
280 } else if (cat2->rel1.src1_rel) {
281 print_reg_src(ctx, (reg_t)(cat2->rel1.src1), cat2->full, src1_r,
282 cat2->rel1.src1_c, cat2->src1_im, cat2->src1_neg,
283 cat2->src1_abs, cat2->rel1.src1_rel);
284 } else {
285 print_reg_src(ctx, (reg_t)(cat2->src1), cat2->full, src1_r,
286 false, cat2->src1_im, cat2->src1_neg,
287 cat2->src1_abs, false);
288 }
289
290 unsigned src2_r = cat2->repeat ? cat2->src2_r : 0;
291 switch (_OPC(2, cat2->opc)) {
292 case OPC_ABSNEG_F:
293 case OPC_ABSNEG_S:
294 case OPC_CLZ_B:
295 case OPC_CLZ_S:
296 case OPC_SIGN_F:
297 case OPC_FLOOR_F:
298 case OPC_CEIL_F:
299 case OPC_RNDNE_F:
300 case OPC_RNDAZ_F:
301 case OPC_TRUNC_F:
302 case OPC_NOT_B:
303 case OPC_BFREV_B:
304 case OPC_SETRM:
305 case OPC_CBITS_B:
306 /* these only have one src reg */
307 break;
308 default:
309 fprintf(ctx->out, ", ");
310 if (cat2->c2.src2_c) {
311 print_reg_src(ctx, (reg_t)(cat2->c2.src2), cat2->full, src2_r,
312 cat2->c2.src2_c, cat2->src2_im, cat2->src2_neg,
313 cat2->src2_abs, false);
314 } else if (cat2->rel2.src2_rel) {
315 print_reg_src(ctx, (reg_t)(cat2->rel2.src2), cat2->full, src2_r,
316 cat2->rel2.src2_c, cat2->src2_im, cat2->src2_neg,
317 cat2->src2_abs, cat2->rel2.src2_rel);
318 } else {
319 print_reg_src(ctx, (reg_t)(cat2->src2), cat2->full, src2_r,
320 false, cat2->src2_im, cat2->src2_neg,
321 cat2->src2_abs, false);
322 }
323 break;
324 }
325 }
326
327 static void print_instr_cat3(struct disasm_ctx *ctx, instr_t *instr)
328 {
329 instr_cat3_t *cat3 = &instr->cat3;
330 bool full = instr_cat3_full(cat3);
331
332 fprintf(ctx->out, " ");
333 print_reg_dst(ctx, (reg_t)(cat3->dst), full ^ cat3->dst_half, false);
334 fprintf(ctx->out, ", ");
335 unsigned src1_r = cat3->repeat ? cat3->src1_r : 0;
336 if (cat3->c1.src1_c) {
337 print_reg_src(ctx, (reg_t)(cat3->c1.src1), full,
338 src1_r, cat3->c1.src1_c, false, cat3->src1_neg,
339 false, false);
340 } else if (cat3->rel1.src1_rel) {
341 print_reg_src(ctx, (reg_t)(cat3->rel1.src1), full,
342 src1_r, cat3->rel1.src1_c, false, cat3->src1_neg,
343 false, cat3->rel1.src1_rel);
344 } else {
345 print_reg_src(ctx, (reg_t)(cat3->src1), full,
346 src1_r, false, false, cat3->src1_neg,
347 false, false);
348 }
349 fprintf(ctx->out, ", ");
350 unsigned src2_r = cat3->repeat ? cat3->src2_r : 0;
351 print_reg_src(ctx, (reg_t)cat3->src2, full,
352 src2_r, cat3->src2_c, false, cat3->src2_neg,
353 false, false);
354 fprintf(ctx->out, ", ");
355 if (cat3->c2.src3_c) {
356 print_reg_src(ctx, (reg_t)(cat3->c2.src3), full,
357 cat3->src3_r, cat3->c2.src3_c, false, cat3->src3_neg,
358 false, false);
359 } else if (cat3->rel2.src3_rel) {
360 print_reg_src(ctx, (reg_t)(cat3->rel2.src3), full,
361 cat3->src3_r, cat3->rel2.src3_c, false, cat3->src3_neg,
362 false, cat3->rel2.src3_rel);
363 } else {
364 print_reg_src(ctx, (reg_t)(cat3->src3), full,
365 cat3->src3_r, false, false, cat3->src3_neg,
366 false, false);
367 }
368 }
369
370 static void print_instr_cat4(struct disasm_ctx *ctx, instr_t *instr)
371 {
372 instr_cat4_t *cat4 = &instr->cat4;
373
374 fprintf(ctx->out, " ");
375 print_reg_dst(ctx, (reg_t)(cat4->dst), cat4->full ^ cat4->dst_half, false);
376 fprintf(ctx->out, ", ");
377
378 if (cat4->c.src_c) {
379 print_reg_src(ctx, (reg_t)(cat4->c.src), cat4->full,
380 cat4->src_r, cat4->c.src_c, cat4->src_im,
381 cat4->src_neg, cat4->src_abs, false);
382 } else if (cat4->rel.src_rel) {
383 print_reg_src(ctx, (reg_t)(cat4->rel.src), cat4->full,
384 cat4->src_r, cat4->rel.src_c, cat4->src_im,
385 cat4->src_neg, cat4->src_abs, cat4->rel.src_rel);
386 } else {
387 print_reg_src(ctx, (reg_t)(cat4->src), cat4->full,
388 cat4->src_r, false, cat4->src_im,
389 cat4->src_neg, cat4->src_abs, false);
390 }
391
392 if ((debug & PRINT_VERBOSE) && (cat4->dummy1|cat4->dummy2))
393 fprintf(ctx->out, "\t{4: %x,%x}", cat4->dummy1, cat4->dummy2);
394 }
395
396 static void print_instr_cat5(struct disasm_ctx *ctx, instr_t *instr)
397 {
398 static const struct {
399 bool src1, src2, samp, tex;
400 } info[0x1f] = {
401 [opc_op(OPC_ISAM)] = { true, false, true, true, },
402 [opc_op(OPC_ISAML)] = { true, true, true, true, },
403 [opc_op(OPC_ISAMM)] = { true, false, true, true, },
404 [opc_op(OPC_SAM)] = { true, false, true, true, },
405 [opc_op(OPC_SAMB)] = { true, true, true, true, },
406 [opc_op(OPC_SAML)] = { true, true, true, true, },
407 [opc_op(OPC_SAMGQ)] = { true, false, true, true, },
408 [opc_op(OPC_GETLOD)] = { true, false, true, true, },
409 [opc_op(OPC_CONV)] = { true, true, true, true, },
410 [opc_op(OPC_CONVM)] = { true, true, true, true, },
411 [opc_op(OPC_GETSIZE)] = { true, false, false, true, },
412 [opc_op(OPC_GETBUF)] = { false, false, false, true, },
413 [opc_op(OPC_GETPOS)] = { true, false, false, true, },
414 [opc_op(OPC_GETINFO)] = { false, false, false, true, },
415 [opc_op(OPC_DSX)] = { true, false, false, false, },
416 [opc_op(OPC_DSY)] = { true, false, false, false, },
417 [opc_op(OPC_GATHER4R)] = { true, false, true, true, },
418 [opc_op(OPC_GATHER4G)] = { true, false, true, true, },
419 [opc_op(OPC_GATHER4B)] = { true, false, true, true, },
420 [opc_op(OPC_GATHER4A)] = { true, false, true, true, },
421 [opc_op(OPC_SAMGP0)] = { true, false, true, true, },
422 [opc_op(OPC_SAMGP1)] = { true, false, true, true, },
423 [opc_op(OPC_SAMGP2)] = { true, false, true, true, },
424 [opc_op(OPC_SAMGP3)] = { true, false, true, true, },
425 [opc_op(OPC_DSXPP_1)] = { true, false, false, false, },
426 [opc_op(OPC_DSYPP_1)] = { true, false, false, false, },
427 [opc_op(OPC_RGETPOS)] = { false, false, false, false, },
428 [opc_op(OPC_RGETINFO)] = { false, false, false, false, },
429 };
430 instr_cat5_t *cat5 = &instr->cat5;
431 int i;
432
433 if (cat5->is_3d) fprintf(ctx->out, ".3d");
434 if (cat5->is_a) fprintf(ctx->out, ".a");
435 if (cat5->is_o) fprintf(ctx->out, ".o");
436 if (cat5->is_p) fprintf(ctx->out, ".p");
437 if (cat5->is_s) fprintf(ctx->out, ".s");
438 if (cat5->is_s2en) fprintf(ctx->out, ".s2en");
439
440 fprintf(ctx->out, " ");
441
442 switch (_OPC(5, cat5->opc)) {
443 case OPC_DSXPP_1:
444 case OPC_DSYPP_1:
445 break;
446 default:
447 fprintf(ctx->out, "(%s)", type[cat5->type]);
448 break;
449 }
450
451 fprintf(ctx->out, "(");
452 for (i = 0; i < 4; i++)
453 if (cat5->wrmask & (1 << i))
454 fprintf(ctx->out, "%c", "xyzw"[i]);
455 fprintf(ctx->out, ")");
456
457 print_reg_dst(ctx, (reg_t)(cat5->dst), type_size(cat5->type) == 32, false);
458
459 if (info[cat5->opc].src1) {
460 fprintf(ctx->out, ", ");
461 print_reg_src(ctx, (reg_t)(cat5->src1), cat5->full, false, false, false,
462 false, false, false);
463 }
464
465 if (cat5->is_s2en) {
466 fprintf(ctx->out, ", ");
467 print_reg_src(ctx, (reg_t)(cat5->s2en.src2), cat5->full, false, false, false,
468 false, false, false);
469 fprintf(ctx->out, ", ");
470 print_reg_src(ctx, (reg_t)(cat5->s2en.src3), false, false, false, false,
471 false, false, false);
472 } else {
473 if (cat5->is_o || info[cat5->opc].src2) {
474 fprintf(ctx->out, ", ");
475 print_reg_src(ctx, (reg_t)(cat5->norm.src2), cat5->full,
476 false, false, false, false, false, false);
477 }
478 if (info[cat5->opc].samp)
479 fprintf(ctx->out, ", s#%d", cat5->norm.samp);
480 if (info[cat5->opc].tex)
481 fprintf(ctx->out, ", t#%d", cat5->norm.tex);
482 }
483
484 if (debug & PRINT_VERBOSE) {
485 if (cat5->is_s2en) {
486 if ((debug & PRINT_VERBOSE) && (cat5->s2en.dummy1|cat5->s2en.dummy2|cat5->dummy2))
487 fprintf(ctx->out, "\t{5: %x,%x,%x}", cat5->s2en.dummy1, cat5->s2en.dummy2, cat5->dummy2);
488 } else {
489 if ((debug & PRINT_VERBOSE) && (cat5->norm.dummy1|cat5->dummy2))
490 fprintf(ctx->out, "\t{5: %x,%x}", cat5->norm.dummy1, cat5->dummy2);
491 }
492 }
493 }
494
495 static void print_instr_cat6_a3xx(struct disasm_ctx *ctx, instr_t *instr)
496 {
497 instr_cat6_t *cat6 = &instr->cat6;
498 char sd = 0, ss = 0; /* dst/src address space */
499 bool nodst = false;
500 struct reginfo dst, src1, src2;
501 int src1off = 0, dstoff = 0;
502
503 memset(&dst, 0, sizeof(dst));
504 memset(&src1, 0, sizeof(src1));
505 memset(&src2, 0, sizeof(src2));
506
507 switch (_OPC(6, cat6->opc)) {
508 case OPC_RESINFO:
509 case OPC_RESFMT:
510 dst.full = type_size(cat6->type) == 32;
511 src1.full = type_size(cat6->type) == 32;
512 src2.full = type_size(cat6->type) == 32;
513 break;
514 case OPC_L2G:
515 case OPC_G2L:
516 dst.full = true;
517 src1.full = true;
518 src2.full = true;
519 break;
520 case OPC_STG:
521 case OPC_STL:
522 case OPC_STP:
523 case OPC_STI:
524 case OPC_STLW:
525 case OPC_STIB:
526 dst.full = true;
527 src1.full = type_size(cat6->type) == 32;
528 src2.full = type_size(cat6->type) == 32;
529 break;
530 default:
531 dst.full = type_size(cat6->type) == 32;
532 src1.full = true;
533 src2.full = true;
534 break;
535 }
536
537 switch (_OPC(6, cat6->opc)) {
538 case OPC_PREFETCH:
539 break;
540 case OPC_RESINFO:
541 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
542 break;
543 case OPC_LDGB:
544 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
545 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
546 fprintf(ctx->out, ".%s", type[cat6->type]);
547 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
548 break;
549 case OPC_STGB:
550 case OPC_STIB:
551 fprintf(ctx->out, ".%s", cat6->stgb.typed ? "typed" : "untyped");
552 fprintf(ctx->out, ".%dd", cat6->stgb.d + 1);
553 fprintf(ctx->out, ".%s", type[cat6->type]);
554 fprintf(ctx->out, ".%d", cat6->stgb.type_size + 1);
555 break;
556 case OPC_ATOMIC_ADD:
557 case OPC_ATOMIC_SUB:
558 case OPC_ATOMIC_XCHG:
559 case OPC_ATOMIC_INC:
560 case OPC_ATOMIC_DEC:
561 case OPC_ATOMIC_CMPXCHG:
562 case OPC_ATOMIC_MIN:
563 case OPC_ATOMIC_MAX:
564 case OPC_ATOMIC_AND:
565 case OPC_ATOMIC_OR:
566 case OPC_ATOMIC_XOR:
567 ss = cat6->g ? 'g' : 'l';
568 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
569 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
570 fprintf(ctx->out, ".%s", type[cat6->type]);
571 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
572 fprintf(ctx->out, ".%c", ss);
573 break;
574 default:
575 dst.im = cat6->g && !cat6->dst_off;
576 fprintf(ctx->out, ".%s", type[cat6->type]);
577 break;
578 }
579 fprintf(ctx->out, " ");
580
581 switch (_OPC(6, cat6->opc)) {
582 case OPC_STG:
583 sd = 'g';
584 break;
585 case OPC_STP:
586 sd = 'p';
587 break;
588 case OPC_STL:
589 case OPC_STLW:
590 sd = 'l';
591 break;
592
593 case OPC_LDG:
594 case OPC_LDC:
595 ss = 'g';
596 break;
597 case OPC_LDP:
598 ss = 'p';
599 break;
600 case OPC_LDL:
601 case OPC_LDLW:
602 case OPC_LDLV:
603 ss = 'l';
604 break;
605
606 case OPC_L2G:
607 ss = 'l';
608 sd = 'g';
609 break;
610
611 case OPC_G2L:
612 ss = 'g';
613 sd = 'l';
614 break;
615
616 case OPC_PREFETCH:
617 ss = 'g';
618 nodst = true;
619 break;
620
621 case OPC_STI:
622 dst.full = false; // XXX or inverts??
623 break;
624 }
625
626 if ((_OPC(6, cat6->opc) == OPC_STGB) || (_OPC(6, cat6->opc) == OPC_STIB)) {
627 struct reginfo src3;
628
629 memset(&src3, 0, sizeof(src3));
630
631 src1.reg = (reg_t)(cat6->stgb.src1);
632 src2.reg = (reg_t)(cat6->stgb.src2);
633 src2.im = cat6->stgb.src2_im;
634 src3.reg = (reg_t)(cat6->stgb.src3);
635 src3.im = cat6->stgb.src3_im;
636 src3.full = true;
637
638 fprintf(ctx->out, "g[%u], ", cat6->stgb.dst_ssbo);
639 print_src(ctx, &src1);
640 fprintf(ctx->out, ", ");
641 print_src(ctx, &src2);
642 fprintf(ctx->out, ", ");
643 print_src(ctx, &src3);
644
645 if (debug & PRINT_VERBOSE)
646 fprintf(ctx->out, " (pad0=%x, pad3=%x)", cat6->stgb.pad0, cat6->stgb.pad3);
647
648 return;
649 }
650
651 if (is_atomic(_OPC(6, cat6->opc))) {
652
653 src1.reg = (reg_t)(cat6->ldgb.src1);
654 src1.im = cat6->ldgb.src1_im;
655 src2.reg = (reg_t)(cat6->ldgb.src2);
656 src2.im = cat6->ldgb.src2_im;
657 dst.reg = (reg_t)(cat6->ldgb.dst);
658
659 print_src(ctx, &dst);
660 fprintf(ctx->out, ", ");
661 if (ss == 'g') {
662 struct reginfo src3;
663 memset(&src3, 0, sizeof(src3));
664
665 src3.reg = (reg_t)(cat6->ldgb.src3);
666 src3.full = true;
667
668 /* For images, the ".typed" variant is used and src2 is
669 * the ivecN coordinates, ie ivec2 for 2d.
670 *
671 * For SSBOs, the ".untyped" variant is used and src2 is
672 * a simple dword offset.. src3 appears to be
673 * uvec2(offset * 4, 0). Not sure the point of that.
674 */
675
676 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
677 print_src(ctx, &src1); /* value */
678 fprintf(ctx->out, ", ");
679 print_src(ctx, &src2); /* offset/coords */
680 fprintf(ctx->out, ", ");
681 print_src(ctx, &src3); /* 64b byte offset.. */
682
683 if (debug & PRINT_VERBOSE) {
684 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0,
685 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
686 }
687 } else { /* ss == 'l' */
688 fprintf(ctx->out, "l[");
689 print_src(ctx, &src1); /* simple byte offset */
690 fprintf(ctx->out, "], ");
691 print_src(ctx, &src2); /* value */
692
693 if (debug & PRINT_VERBOSE) {
694 fprintf(ctx->out, " (src3=%x, pad0=%x, pad3=%x, mustbe0=%x)",
695 cat6->ldgb.src3, cat6->ldgb.pad0,
696 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
697 }
698 }
699
700 return;
701 } else if (_OPC(6, cat6->opc) == OPC_RESINFO) {
702 dst.reg = (reg_t)(cat6->ldgb.dst);
703
704 print_src(ctx, &dst);
705 fprintf(ctx->out, ", ");
706 fprintf(ctx->out, "g[%u]", cat6->ldgb.src_ssbo);
707
708 return;
709 } else if (_OPC(6, cat6->opc) == OPC_LDGB) {
710
711 src1.reg = (reg_t)(cat6->ldgb.src1);
712 src1.im = cat6->ldgb.src1_im;
713 src2.reg = (reg_t)(cat6->ldgb.src2);
714 src2.im = cat6->ldgb.src2_im;
715 dst.reg = (reg_t)(cat6->ldgb.dst);
716
717 print_src(ctx, &dst);
718 fprintf(ctx->out, ", ");
719 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
720 print_src(ctx, &src1);
721 fprintf(ctx->out, ", ");
722 print_src(ctx, &src2);
723
724 if (debug & PRINT_VERBOSE)
725 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0, cat6->ldgb.pad3, cat6->ldgb.mustbe0);
726
727 return;
728 }
729 if (cat6->dst_off) {
730 dst.reg = (reg_t)(cat6->c.dst);
731 dstoff = cat6->c.off;
732 } else {
733 dst.reg = (reg_t)(cat6->d.dst);
734 }
735
736 if (cat6->src_off) {
737 src1.reg = (reg_t)(cat6->a.src1);
738 src1.im = cat6->a.src1_im;
739 src2.reg = (reg_t)(cat6->a.src2);
740 src2.im = cat6->a.src2_im;
741 src1off = cat6->a.off;
742 } else {
743 src1.reg = (reg_t)(cat6->b.src1);
744 src1.im = cat6->b.src1_im;
745 src2.reg = (reg_t)(cat6->b.src2);
746 src2.im = cat6->b.src2_im;
747 }
748
749 if (!nodst) {
750 if (sd)
751 fprintf(ctx->out, "%c[", sd);
752 /* note: dst might actually be a src (ie. address to store to) */
753 print_src(ctx, &dst);
754 if (dstoff)
755 fprintf(ctx->out, "%+d", dstoff);
756 if (sd)
757 fprintf(ctx->out, "]");
758 fprintf(ctx->out, ", ");
759 }
760
761 if (ss)
762 fprintf(ctx->out, "%c[", ss);
763
764 /* can have a larger than normal immed, so hack: */
765 if (src1.im) {
766 fprintf(ctx->out, "%u", src1.reg.dummy13);
767 } else {
768 print_src(ctx, &src1);
769 }
770
771 if (src1off)
772 fprintf(ctx->out, "%+d", src1off);
773 if (ss)
774 fprintf(ctx->out, "]");
775
776 switch (_OPC(6, cat6->opc)) {
777 case OPC_RESINFO:
778 case OPC_RESFMT:
779 break;
780 default:
781 fprintf(ctx->out, ", ");
782 print_src(ctx, &src2);
783 break;
784 }
785 }
786
787 static void print_instr_cat6_a6xx(struct disasm_ctx *ctx, instr_t *instr)
788 {
789 instr_cat6_a6xx_t *cat6 = &instr->cat6_a6xx;
790 struct reginfo src1, src2;
791 char ss = 0;
792
793 memset(&src1, 0, sizeof(src1));
794 memset(&src2, 0, sizeof(src2));
795
796 fprintf(ctx->out, ".%s", cat6->typed ? "typed" : "untyped");
797 fprintf(ctx->out, ".%dd", cat6->d + 1);
798 fprintf(ctx->out, ".%s", type[cat6->type]);
799 fprintf(ctx->out, ".%u ", cat6->type_size + 1);
800
801 /* NOTE: blob seems to use old encoding for ldl/stl (local memory) */
802 ss = 'g';
803
804 fprintf(ctx->out, "%c[%u", ss, cat6->ssbo);
805 fprintf(ctx->out, "] + ");
806 src1.reg = (reg_t)(cat6->src1);
807 src1.full = true; // XXX
808 print_src(ctx, &src1);
809 fprintf(ctx->out, ", ");
810
811 src2.reg = (reg_t)(cat6->src2);
812 src2.full = true; // XXX
813 print_src(ctx, &src2);
814
815 if (debug & PRINT_VERBOSE) {
816 fprintf(ctx->out, " (pad1=%x, pad2=%x, pad3=%x, pad4=%x)", cat6->pad1,
817 cat6->pad2, cat6->pad3, cat6->pad4);
818 }
819 }
820
821 static void print_instr_cat6(struct disasm_ctx *ctx, instr_t *instr)
822 {
823 // TODO not sure if this is the best way to figure
824 // out if new vs old encoding, but it kinda seems
825 // to work:
826 if ((ctx->gpu_id >= 600) && (instr->cat6.opc == 0)) {
827 print_instr_cat6_a6xx(ctx, instr);
828 if (debug & PRINT_VERBOSE)
829 fprintf(ctx->out, " NEW");
830 } else {
831 print_instr_cat6_a3xx(ctx, instr);
832 if (debug & PRINT_VERBOSE)
833 fprintf(ctx->out, " LEGACY");
834 }
835 }
836 static void print_instr_cat7(struct disasm_ctx *ctx, instr_t *instr)
837 {
838 instr_cat7_t *cat7 = &instr->cat7;
839
840 if (cat7->g)
841 fprintf(ctx->out, ".g");
842 if (cat7->l)
843 fprintf(ctx->out, ".l");
844
845 if (_OPC(7, cat7->opc) == OPC_FENCE) {
846 if (cat7->r)
847 fprintf(ctx->out, ".r");
848 if (cat7->w)
849 fprintf(ctx->out, ".w");
850 }
851 }
852
853 /* size of largest OPC field of all the instruction categories: */
854 #define NOPC_BITS 6
855
856 static const struct opc_info {
857 uint16_t cat;
858 uint16_t opc;
859 const char *name;
860 void (*print)(struct disasm_ctx *ctx, instr_t *instr);
861 } opcs[1 << (3+NOPC_BITS)] = {
862 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat }
863 /* category 0: */
864 OPC(0, OPC_NOP, nop),
865 OPC(0, OPC_BR, br),
866 OPC(0, OPC_JUMP, jump),
867 OPC(0, OPC_CALL, call),
868 OPC(0, OPC_RET, ret),
869 OPC(0, OPC_KILL, kill),
870 OPC(0, OPC_END, end),
871 OPC(0, OPC_EMIT, emit),
872 OPC(0, OPC_CUT, cut),
873 OPC(0, OPC_CHMASK, chmask),
874 OPC(0, OPC_CHSH, chsh),
875 OPC(0, OPC_FLOW_REV, flow_rev),
876
877 /* category 1: */
878 OPC(1, OPC_MOV, ),
879
880 /* category 2: */
881 OPC(2, OPC_ADD_F, add.f),
882 OPC(2, OPC_MIN_F, min.f),
883 OPC(2, OPC_MAX_F, max.f),
884 OPC(2, OPC_MUL_F, mul.f),
885 OPC(2, OPC_SIGN_F, sign.f),
886 OPC(2, OPC_CMPS_F, cmps.f),
887 OPC(2, OPC_ABSNEG_F, absneg.f),
888 OPC(2, OPC_CMPV_F, cmpv.f),
889 OPC(2, OPC_FLOOR_F, floor.f),
890 OPC(2, OPC_CEIL_F, ceil.f),
891 OPC(2, OPC_RNDNE_F, rndne.f),
892 OPC(2, OPC_RNDAZ_F, rndaz.f),
893 OPC(2, OPC_TRUNC_F, trunc.f),
894 OPC(2, OPC_ADD_U, add.u),
895 OPC(2, OPC_ADD_S, add.s),
896 OPC(2, OPC_SUB_U, sub.u),
897 OPC(2, OPC_SUB_S, sub.s),
898 OPC(2, OPC_CMPS_U, cmps.u),
899 OPC(2, OPC_CMPS_S, cmps.s),
900 OPC(2, OPC_MIN_U, min.u),
901 OPC(2, OPC_MIN_S, min.s),
902 OPC(2, OPC_MAX_U, max.u),
903 OPC(2, OPC_MAX_S, max.s),
904 OPC(2, OPC_ABSNEG_S, absneg.s),
905 OPC(2, OPC_AND_B, and.b),
906 OPC(2, OPC_OR_B, or.b),
907 OPC(2, OPC_NOT_B, not.b),
908 OPC(2, OPC_XOR_B, xor.b),
909 OPC(2, OPC_CMPV_U, cmpv.u),
910 OPC(2, OPC_CMPV_S, cmpv.s),
911 OPC(2, OPC_MUL_U, mul.u),
912 OPC(2, OPC_MUL_S, mul.s),
913 OPC(2, OPC_MULL_U, mull.u),
914 OPC(2, OPC_BFREV_B, bfrev.b),
915 OPC(2, OPC_CLZ_S, clz.s),
916 OPC(2, OPC_CLZ_B, clz.b),
917 OPC(2, OPC_SHL_B, shl.b),
918 OPC(2, OPC_SHR_B, shr.b),
919 OPC(2, OPC_ASHR_B, ashr.b),
920 OPC(2, OPC_BARY_F, bary.f),
921 OPC(2, OPC_MGEN_B, mgen.b),
922 OPC(2, OPC_GETBIT_B, getbit.b),
923 OPC(2, OPC_SETRM, setrm),
924 OPC(2, OPC_CBITS_B, cbits.b),
925 OPC(2, OPC_SHB, shb),
926 OPC(2, OPC_MSAD, msad),
927
928 /* category 3: */
929 OPC(3, OPC_MAD_U16, mad.u16),
930 OPC(3, OPC_MADSH_U16, madsh.u16),
931 OPC(3, OPC_MAD_S16, mad.s16),
932 OPC(3, OPC_MADSH_M16, madsh.m16),
933 OPC(3, OPC_MAD_U24, mad.u24),
934 OPC(3, OPC_MAD_S24, mad.s24),
935 OPC(3, OPC_MAD_F16, mad.f16),
936 OPC(3, OPC_MAD_F32, mad.f32),
937 OPC(3, OPC_SEL_B16, sel.b16),
938 OPC(3, OPC_SEL_B32, sel.b32),
939 OPC(3, OPC_SEL_S16, sel.s16),
940 OPC(3, OPC_SEL_S32, sel.s32),
941 OPC(3, OPC_SEL_F16, sel.f16),
942 OPC(3, OPC_SEL_F32, sel.f32),
943 OPC(3, OPC_SAD_S16, sad.s16),
944 OPC(3, OPC_SAD_S32, sad.s32),
945
946 /* category 4: */
947 OPC(4, OPC_RCP, rcp),
948 OPC(4, OPC_RSQ, rsq),
949 OPC(4, OPC_LOG2, log2),
950 OPC(4, OPC_EXP2, exp2),
951 OPC(4, OPC_SIN, sin),
952 OPC(4, OPC_COS, cos),
953 OPC(4, OPC_SQRT, sqrt),
954
955 /* category 5: */
956 OPC(5, OPC_ISAM, isam),
957 OPC(5, OPC_ISAML, isaml),
958 OPC(5, OPC_ISAMM, isamm),
959 OPC(5, OPC_SAM, sam),
960 OPC(5, OPC_SAMB, samb),
961 OPC(5, OPC_SAML, saml),
962 OPC(5, OPC_SAMGQ, samgq),
963 OPC(5, OPC_GETLOD, getlod),
964 OPC(5, OPC_CONV, conv),
965 OPC(5, OPC_CONVM, convm),
966 OPC(5, OPC_GETSIZE, getsize),
967 OPC(5, OPC_GETBUF, getbuf),
968 OPC(5, OPC_GETPOS, getpos),
969 OPC(5, OPC_GETINFO, getinfo),
970 OPC(5, OPC_DSX, dsx),
971 OPC(5, OPC_DSY, dsy),
972 OPC(5, OPC_GATHER4R, gather4r),
973 OPC(5, OPC_GATHER4G, gather4g),
974 OPC(5, OPC_GATHER4B, gather4b),
975 OPC(5, OPC_GATHER4A, gather4a),
976 OPC(5, OPC_SAMGP0, samgp0),
977 OPC(5, OPC_SAMGP1, samgp1),
978 OPC(5, OPC_SAMGP2, samgp2),
979 OPC(5, OPC_SAMGP3, samgp3),
980 OPC(5, OPC_DSXPP_1, dsxpp.1),
981 OPC(5, OPC_DSYPP_1, dsypp.1),
982 OPC(5, OPC_RGETPOS, rgetpos),
983 OPC(5, OPC_RGETINFO, rgetinfo),
984
985
986 /* category 6: */
987 OPC(6, OPC_LDG, ldg),
988 OPC(6, OPC_LDL, ldl),
989 OPC(6, OPC_LDP, ldp),
990 OPC(6, OPC_STG, stg),
991 OPC(6, OPC_STL, stl),
992 OPC(6, OPC_STP, stp),
993 OPC(6, OPC_STI, sti),
994 OPC(6, OPC_G2L, g2l),
995 OPC(6, OPC_L2G, l2g),
996 OPC(6, OPC_PREFETCH, prefetch),
997 OPC(6, OPC_LDLW, ldlw),
998 OPC(6, OPC_STLW, stlw),
999 OPC(6, OPC_RESFMT, resfmt),
1000 OPC(6, OPC_RESINFO, resinfo),
1001 OPC(6, OPC_ATOMIC_ADD, atomic.add),
1002 OPC(6, OPC_ATOMIC_SUB, atomic.sub),
1003 OPC(6, OPC_ATOMIC_XCHG, atomic.xchg),
1004 OPC(6, OPC_ATOMIC_INC, atomic.inc),
1005 OPC(6, OPC_ATOMIC_DEC, atomic.dec),
1006 OPC(6, OPC_ATOMIC_CMPXCHG, atomic.cmpxchg),
1007 OPC(6, OPC_ATOMIC_MIN, atomic.min),
1008 OPC(6, OPC_ATOMIC_MAX, atomic.max),
1009 OPC(6, OPC_ATOMIC_AND, atomic.and),
1010 OPC(6, OPC_ATOMIC_OR, atomic.or),
1011 OPC(6, OPC_ATOMIC_XOR, atomic.xor),
1012 OPC(6, OPC_LDGB, ldgb),
1013 OPC(6, OPC_STGB, stgb),
1014 OPC(6, OPC_STIB, stib),
1015 OPC(6, OPC_LDC, ldc),
1016 OPC(6, OPC_LDLV, ldlv),
1017
1018 OPC(7, OPC_BAR, bar),
1019 OPC(7, OPC_FENCE, fence),
1020
1021 #undef OPC
1022 };
1023
1024 #define GETINFO(instr) (&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr, ctx->gpu_id)]))
1025
1026 // XXX hack.. probably should move this table somewhere common:
1027 #include "ir3.h"
1028 const char *ir3_instr_name(struct ir3_instruction *instr)
1029 {
1030 if (opc_cat(instr->opc) == -1) return "??meta??";
1031 return opcs[instr->opc].name;
1032 }
1033
1034 static bool print_instr(struct disasm_ctx *ctx, uint32_t *dwords, int n)
1035 {
1036 instr_t *instr = (instr_t *)dwords;
1037 uint32_t opc = instr_opc(instr, ctx->gpu_id);
1038 const char *name;
1039
1040 if (debug & PRINT_VERBOSE)
1041 fprintf(ctx->out, "%s%04d[%08xx_%08xx] ", levels[ctx->level], n, dwords[1], dwords[0]);
1042
1043 /* NOTE: order flags are printed is a bit fugly.. but for now I
1044 * try to match the order in llvm-a3xx disassembler for easy
1045 * diff'ing..
1046 */
1047
1048 ctx->repeat = instr_repeat(instr);
1049
1050 if (instr->sync)
1051 fprintf(ctx->out, "(sy)");
1052 if (instr->ss && ((instr->opc_cat <= 4) || (instr->opc_cat == 7)))
1053 fprintf(ctx->out, "(ss)");
1054 if (instr->jmp_tgt)
1055 fprintf(ctx->out, "(jp)");
1056 if (instr_sat(instr))
1057 fprintf(ctx->out, "(sat)");
1058 if (ctx->repeat) {
1059 fprintf(ctx->out, "(rpt%d)", ctx->repeat);
1060 } else if ((instr->opc_cat == 2) && (instr->cat2.src1_r || instr->cat2.src2_r)) {
1061 unsigned nop = (instr->cat2.src2_r * 2) + instr->cat2.src1_r;
1062 fprintf(ctx->out, "(nop%d)", nop);
1063 } else if ((instr->opc_cat == 3) && (instr->cat3.src1_r || instr->cat3.src2_r)) {
1064 unsigned nop = (instr->cat3.src2_r * 2) + instr->cat3.src1_r;
1065 fprintf(ctx->out, "(nop%d)", nop);
1066 }
1067 if (instr->ul && ((2 <= instr->opc_cat) && (instr->opc_cat <= 4)))
1068 fprintf(ctx->out, "(ul)");
1069
1070 name = GETINFO(instr)->name;
1071
1072 if (name) {
1073 fprintf(ctx->out, "%s", name);
1074 GETINFO(instr)->print(ctx, instr);
1075 } else {
1076 fprintf(ctx->out, "unknown(%d,%d)", instr->opc_cat, opc);
1077 }
1078
1079 fprintf(ctx->out, "\n");
1080
1081 return (instr->opc_cat == 0) && (opc == OPC_END);
1082 }
1083
1084 int disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out, unsigned gpu_id)
1085 {
1086 struct disasm_ctx ctx;
1087 int i;
1088
1089 assert((sizedwords % 2) == 0);
1090
1091 memset(&ctx, 0, sizeof(ctx));
1092 ctx.out = out;
1093 ctx.level = level;
1094 ctx.gpu_id = gpu_id;
1095
1096 for (i = 0; i < sizedwords; i += 2)
1097 print_instr(&ctx, &dwords[i], i/2);
1098
1099 return 0;
1100 }