2 * Copyright (c) 2013 Rob Clark <robdclark@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #include <util/u_debug.h>
33 #include "instr-a3xx.h"
35 /* bitmask of debug flags */
37 PRINT_RAW
= 0x1, /* dump raw hexdump */
42 static enum debug_t debug
;
44 #define printf debug_printf
46 static const char *levels
[] = {
65 static const char *component
= "xyzw";
67 static const char *type
[] = {
83 /* current instruction repeat flag: */
85 /* current instruction repeat indx/offset (for --expand): */
88 unsigned instructions
;
91 static void print_reg(struct disasm_ctx
*ctx
, reg_t reg
, bool full
, bool r
,
92 bool c
, bool im
, bool neg
, bool abs
, bool addr_rel
)
94 const char type
= c
? 'c' : 'r';
96 // XXX I prefer - and || for neg/abs, but preserving format used
97 // by libllvm-a3xx for easy diffing..
100 fprintf(ctx
->out
, "(absneg)");
102 fprintf(ctx
->out
, "(neg)");
104 fprintf(ctx
->out
, "(abs)");
107 fprintf(ctx
->out
, "(r)");
110 fprintf(ctx
->out
, "%d", reg
.iim_val
);
111 } else if (addr_rel
) {
112 /* I would just use %+d but trying to make it diff'able with
116 fprintf(ctx
->out
, "%s%c<a0.x - %d>", full
? "" : "h", type
, -reg
.iim_val
);
117 else if (reg
.iim_val
> 0)
118 fprintf(ctx
->out
, "%s%c<a0.x + %d>", full
? "" : "h", type
, reg
.iim_val
);
120 fprintf(ctx
->out
, "%s%c<a0.x>", full
? "" : "h", type
);
121 } else if ((reg
.num
== REG_A0
) && !c
) {
122 /* This matches libllvm output, the second (scalar) address register
123 * seems to be called a1.x instead of a0.y.
125 fprintf(ctx
->out
, "a%d.x", reg
.comp
);
126 } else if ((reg
.num
== REG_P0
) && !c
) {
127 fprintf(ctx
->out
, "p0.%c", component
[reg
.comp
]);
129 fprintf(ctx
->out
, "%s%c%d.%c", full
? "" : "h", type
, reg
.num
, component
[reg
.comp
]);
133 static unsigned regidx(reg_t reg
)
135 return (4 * reg
.num
) + reg
.comp
;
138 static reg_t
idxreg(unsigned idx
)
146 static void print_reg_dst(struct disasm_ctx
*ctx
, reg_t reg
, bool full
, bool addr_rel
)
148 reg
= idxreg(regidx(reg
) + ctx
->repeatidx
);
149 print_reg(ctx
, reg
, full
, false, false, false, false, false, addr_rel
);
152 static void print_reg_src(struct disasm_ctx
*ctx
, reg_t reg
, bool full
, bool r
,
153 bool c
, bool im
, bool neg
, bool abs
, bool addr_rel
)
156 reg
= idxreg(regidx(reg
) + ctx
->repeatidx
);
158 print_reg(ctx
, reg
, full
, r
, c
, im
, neg
, abs
, addr_rel
);
161 /* TODO switch to using reginfo struct everywhere, since more readable
162 * than passing a bunch of bools to print_reg_src
176 static void print_src(struct disasm_ctx
*ctx
, struct reginfo
*info
)
178 print_reg_src(ctx
, info
->reg
, info
->full
, info
->r
, info
->c
, info
->im
,
179 info
->neg
, info
->abs
, info
->addr_rel
);
182 //static void print_dst(struct disasm_ctx *ctx, struct reginfo *info)
184 // print_reg_dst(ctx, info->reg, info->full, info->addr_rel);
187 static void print_instr_cat0(struct disasm_ctx
*ctx
, instr_t
*instr
)
189 instr_cat0_t
*cat0
= &instr
->cat0
;
194 fprintf(ctx
->out
, " %sp0.%c", cat0
->inv
? "!" : "",
195 component
[cat0
->comp
]);
198 fprintf(ctx
->out
, " %sp0.%c, #%d", cat0
->inv
? "!" : "",
199 component
[cat0
->comp
], cat0
->a3xx
.immed
);
203 fprintf(ctx
->out
, " #%d", cat0
->a3xx
.immed
);
207 if ((debug
& PRINT_VERBOSE
) && (cat0
->dummy2
|cat0
->dummy3
|cat0
->dummy4
))
208 fprintf(ctx
->out
, "\t{0: %x,%x,%x}", cat0
->dummy2
, cat0
->dummy3
, cat0
->dummy4
);
211 static void print_instr_cat1(struct disasm_ctx
*ctx
, instr_t
*instr
)
213 instr_cat1_t
*cat1
= &instr
->cat1
;
216 fprintf(ctx
->out
, "(ul)");
218 if (cat1
->src_type
== cat1
->dst_type
) {
219 if ((cat1
->src_type
== TYPE_S16
) && (((reg_t
)cat1
->dst
).num
== REG_A0
)) {
220 /* special case (nmemonic?): */
221 fprintf(ctx
->out
, "mova");
223 fprintf(ctx
->out
, "mov.%s%s", type
[cat1
->src_type
], type
[cat1
->dst_type
]);
226 fprintf(ctx
->out
, "cov.%s%s", type
[cat1
->src_type
], type
[cat1
->dst_type
]);
229 fprintf(ctx
->out
, " ");
232 fprintf(ctx
->out
, "(even)");
235 fprintf(ctx
->out
, "(pos_infinity)");
237 print_reg_dst(ctx
, (reg_t
)(cat1
->dst
), type_size(cat1
->dst_type
) == 32,
240 fprintf(ctx
->out
, ", ");
242 /* ugg, have to special case this.. vs print_reg().. */
244 if (type_float(cat1
->src_type
))
245 fprintf(ctx
->out
, "(%f)", cat1
->fim_val
);
246 else if (type_uint(cat1
->src_type
))
247 fprintf(ctx
->out
, "0x%08x", cat1
->uim_val
);
249 fprintf(ctx
->out
, "%d", cat1
->iim_val
);
250 } else if (cat1
->src_rel
&& !cat1
->src_c
) {
251 /* I would just use %+d but trying to make it diff'able with
254 char type
= cat1
->src_rel_c
? 'c' : 'r';
255 const char *full
= (type_size(cat1
->src_type
) == 32) ? "" : "h";
257 fprintf(ctx
->out
, "%s%c<a0.x - %d>", full
, type
, -cat1
->off
);
258 else if (cat1
->off
> 0)
259 fprintf(ctx
->out
, "%s%c<a0.x + %d>", full
, type
, cat1
->off
);
261 fprintf(ctx
->out
, "%s%c<a0.x>", full
, type
);
263 print_reg_src(ctx
, (reg_t
)(cat1
->src
), type_size(cat1
->src_type
) == 32,
264 cat1
->src_r
, cat1
->src_c
, cat1
->src_im
, false, false, false);
267 if ((debug
& PRINT_VERBOSE
) && (cat1
->must_be_0
))
268 fprintf(ctx
->out
, "\t{1: %x}", cat1
->must_be_0
);
271 static void print_instr_cat2(struct disasm_ctx
*ctx
, instr_t
*instr
)
273 instr_cat2_t
*cat2
= &instr
->cat2
;
274 static const char *cond
[] = {
284 switch (_OPC(2, cat2
->opc
)) {
291 fprintf(ctx
->out
, ".%s", cond
[cat2
->cond
]);
295 fprintf(ctx
->out
, " ");
297 fprintf(ctx
->out
, "(ei)");
298 print_reg_dst(ctx
, (reg_t
)(cat2
->dst
), cat2
->full
^ cat2
->dst_half
, false);
299 fprintf(ctx
->out
, ", ");
301 unsigned src1_r
= cat2
->repeat
? cat2
->src1_r
: 0;
302 if (cat2
->c1
.src1_c
) {
303 print_reg_src(ctx
, (reg_t
)(cat2
->c1
.src1
), cat2
->full
, src1_r
,
304 cat2
->c1
.src1_c
, cat2
->src1_im
, cat2
->src1_neg
,
305 cat2
->src1_abs
, false);
306 } else if (cat2
->rel1
.src1_rel
) {
307 print_reg_src(ctx
, (reg_t
)(cat2
->rel1
.src1
), cat2
->full
, src1_r
,
308 cat2
->rel1
.src1_c
, cat2
->src1_im
, cat2
->src1_neg
,
309 cat2
->src1_abs
, cat2
->rel1
.src1_rel
);
311 print_reg_src(ctx
, (reg_t
)(cat2
->src1
), cat2
->full
, src1_r
,
312 false, cat2
->src1_im
, cat2
->src1_neg
,
313 cat2
->src1_abs
, false);
316 unsigned src2_r
= cat2
->repeat
? cat2
->src2_r
: 0;
317 switch (_OPC(2, cat2
->opc
)) {
332 /* these only have one src reg */
335 fprintf(ctx
->out
, ", ");
336 if (cat2
->c2
.src2_c
) {
337 print_reg_src(ctx
, (reg_t
)(cat2
->c2
.src2
), cat2
->full
, src2_r
,
338 cat2
->c2
.src2_c
, cat2
->src2_im
, cat2
->src2_neg
,
339 cat2
->src2_abs
, false);
340 } else if (cat2
->rel2
.src2_rel
) {
341 print_reg_src(ctx
, (reg_t
)(cat2
->rel2
.src2
), cat2
->full
, src2_r
,
342 cat2
->rel2
.src2_c
, cat2
->src2_im
, cat2
->src2_neg
,
343 cat2
->src2_abs
, cat2
->rel2
.src2_rel
);
345 print_reg_src(ctx
, (reg_t
)(cat2
->src2
), cat2
->full
, src2_r
,
346 false, cat2
->src2_im
, cat2
->src2_neg
,
347 cat2
->src2_abs
, false);
353 static void print_instr_cat3(struct disasm_ctx
*ctx
, instr_t
*instr
)
355 instr_cat3_t
*cat3
= &instr
->cat3
;
356 bool full
= instr_cat3_full(cat3
);
358 fprintf(ctx
->out
, " ");
359 print_reg_dst(ctx
, (reg_t
)(cat3
->dst
), full
^ cat3
->dst_half
, false);
360 fprintf(ctx
->out
, ", ");
361 unsigned src1_r
= cat3
->repeat
? cat3
->src1_r
: 0;
362 if (cat3
->c1
.src1_c
) {
363 print_reg_src(ctx
, (reg_t
)(cat3
->c1
.src1
), full
,
364 src1_r
, cat3
->c1
.src1_c
, false, cat3
->src1_neg
,
366 } else if (cat3
->rel1
.src1_rel
) {
367 print_reg_src(ctx
, (reg_t
)(cat3
->rel1
.src1
), full
,
368 src1_r
, cat3
->rel1
.src1_c
, false, cat3
->src1_neg
,
369 false, cat3
->rel1
.src1_rel
);
371 print_reg_src(ctx
, (reg_t
)(cat3
->src1
), full
,
372 src1_r
, false, false, cat3
->src1_neg
,
375 fprintf(ctx
->out
, ", ");
376 unsigned src2_r
= cat3
->repeat
? cat3
->src2_r
: 0;
377 print_reg_src(ctx
, (reg_t
)cat3
->src2
, full
,
378 src2_r
, cat3
->src2_c
, false, cat3
->src2_neg
,
380 fprintf(ctx
->out
, ", ");
381 if (cat3
->c2
.src3_c
) {
382 print_reg_src(ctx
, (reg_t
)(cat3
->c2
.src3
), full
,
383 cat3
->src3_r
, cat3
->c2
.src3_c
, false, cat3
->src3_neg
,
385 } else if (cat3
->rel2
.src3_rel
) {
386 print_reg_src(ctx
, (reg_t
)(cat3
->rel2
.src3
), full
,
387 cat3
->src3_r
, cat3
->rel2
.src3_c
, false, cat3
->src3_neg
,
388 false, cat3
->rel2
.src3_rel
);
390 print_reg_src(ctx
, (reg_t
)(cat3
->src3
), full
,
391 cat3
->src3_r
, false, false, cat3
->src3_neg
,
396 static void print_instr_cat4(struct disasm_ctx
*ctx
, instr_t
*instr
)
398 instr_cat4_t
*cat4
= &instr
->cat4
;
400 fprintf(ctx
->out
, " ");
401 print_reg_dst(ctx
, (reg_t
)(cat4
->dst
), cat4
->full
^ cat4
->dst_half
, false);
402 fprintf(ctx
->out
, ", ");
405 print_reg_src(ctx
, (reg_t
)(cat4
->c
.src
), cat4
->full
,
406 cat4
->src_r
, cat4
->c
.src_c
, cat4
->src_im
,
407 cat4
->src_neg
, cat4
->src_abs
, false);
408 } else if (cat4
->rel
.src_rel
) {
409 print_reg_src(ctx
, (reg_t
)(cat4
->rel
.src
), cat4
->full
,
410 cat4
->src_r
, cat4
->rel
.src_c
, cat4
->src_im
,
411 cat4
->src_neg
, cat4
->src_abs
, cat4
->rel
.src_rel
);
413 print_reg_src(ctx
, (reg_t
)(cat4
->src
), cat4
->full
,
414 cat4
->src_r
, false, cat4
->src_im
,
415 cat4
->src_neg
, cat4
->src_abs
, false);
418 if ((debug
& PRINT_VERBOSE
) && (cat4
->dummy1
|cat4
->dummy2
))
419 fprintf(ctx
->out
, "\t{4: %x,%x}", cat4
->dummy1
, cat4
->dummy2
);
422 static void print_instr_cat5(struct disasm_ctx
*ctx
, instr_t
*instr
)
424 static const struct {
425 bool src1
, src2
, samp
, tex
;
427 [opc_op(OPC_ISAM
)] = { true, false, true, true, },
428 [opc_op(OPC_ISAML
)] = { true, true, true, true, },
429 [opc_op(OPC_ISAMM
)] = { true, false, true, true, },
430 [opc_op(OPC_SAM
)] = { true, false, true, true, },
431 [opc_op(OPC_SAMB
)] = { true, true, true, true, },
432 [opc_op(OPC_SAML
)] = { true, true, true, true, },
433 [opc_op(OPC_SAMGQ
)] = { true, false, true, true, },
434 [opc_op(OPC_GETLOD
)] = { true, false, true, true, },
435 [opc_op(OPC_CONV
)] = { true, true, true, true, },
436 [opc_op(OPC_CONVM
)] = { true, true, true, true, },
437 [opc_op(OPC_GETSIZE
)] = { true, false, false, true, },
438 [opc_op(OPC_GETBUF
)] = { false, false, false, true, },
439 [opc_op(OPC_GETPOS
)] = { true, false, false, true, },
440 [opc_op(OPC_GETINFO
)] = { false, false, false, true, },
441 [opc_op(OPC_DSX
)] = { true, false, false, false, },
442 [opc_op(OPC_DSY
)] = { true, false, false, false, },
443 [opc_op(OPC_GATHER4R
)] = { true, false, true, true, },
444 [opc_op(OPC_GATHER4G
)] = { true, false, true, true, },
445 [opc_op(OPC_GATHER4B
)] = { true, false, true, true, },
446 [opc_op(OPC_GATHER4A
)] = { true, false, true, true, },
447 [opc_op(OPC_SAMGP0
)] = { true, false, true, true, },
448 [opc_op(OPC_SAMGP1
)] = { true, false, true, true, },
449 [opc_op(OPC_SAMGP2
)] = { true, false, true, true, },
450 [opc_op(OPC_SAMGP3
)] = { true, false, true, true, },
451 [opc_op(OPC_DSXPP_1
)] = { true, false, false, false, },
452 [opc_op(OPC_DSYPP_1
)] = { true, false, false, false, },
453 [opc_op(OPC_RGETPOS
)] = { true, false, false, false, },
454 [opc_op(OPC_RGETINFO
)] = { false, false, false, false, },
457 static const struct {
462 } desc_features
[8] = {
463 [CAT5_NONUNIFORM
] = { .indirect
= true, },
464 [CAT5_UNIFORM
] = { .indirect
= true, .uniform
= true, },
465 [CAT5_BINDLESS_IMM
] = { .bindless
= true, },
466 [CAT5_BINDLESS_UNIFORM
] = {
471 [CAT5_BINDLESS_NONUNIFORM
] = {
475 [CAT5_BINDLESS_A1_IMM
] = {
479 [CAT5_BINDLESS_A1_UNIFORM
] = {
485 [CAT5_BINDLESS_A1_NONUNIFORM
] = {
492 instr_cat5_t
*cat5
= &instr
->cat5
;
496 cat5
->is_s2en_bindless
&&
497 desc_features
[cat5
->s2en_bindless
.desc_mode
].indirect
;
499 cat5
->is_s2en_bindless
&&
500 desc_features
[cat5
->s2en_bindless
.desc_mode
].bindless
;
502 cat5
->is_s2en_bindless
&&
503 desc_features
[cat5
->s2en_bindless
.desc_mode
].use_a1
;
505 cat5
->is_s2en_bindless
&&
506 desc_features
[cat5
->s2en_bindless
.desc_mode
].uniform
;
508 if (cat5
->is_3d
) fprintf(ctx
->out
, ".3d");
509 if (cat5
->is_a
) fprintf(ctx
->out
, ".a");
510 if (cat5
->is_o
) fprintf(ctx
->out
, ".o");
511 if (cat5
->is_p
) fprintf(ctx
->out
, ".p");
512 if (cat5
->is_s
) fprintf(ctx
->out
, ".s");
513 if (desc_indirect
) fprintf(ctx
->out
, ".s2en");
514 if (uniform
) fprintf(ctx
->out
, ".uniform");
517 unsigned base
= (cat5
->s2en_bindless
.base_hi
<< 1) | cat5
->base_lo
;
518 fprintf(ctx
->out
, ".base%d", base
);
521 fprintf(ctx
->out
, " ");
523 switch (_OPC(5, cat5
->opc
)) {
528 fprintf(ctx
->out
, "(%s)", type
[cat5
->type
]);
532 fprintf(ctx
->out
, "(");
533 for (i
= 0; i
< 4; i
++)
534 if (cat5
->wrmask
& (1 << i
))
535 fprintf(ctx
->out
, "%c", "xyzw"[i
]);
536 fprintf(ctx
->out
, ")");
538 print_reg_dst(ctx
, (reg_t
)(cat5
->dst
), type_size(cat5
->type
) == 32, false);
540 if (info
[cat5
->opc
].src1
) {
541 fprintf(ctx
->out
, ", ");
542 print_reg_src(ctx
, (reg_t
)(cat5
->src1
), cat5
->full
, false, false, false,
543 false, false, false);
546 if (cat5
->is_o
|| info
[cat5
->opc
].src2
) {
547 fprintf(ctx
->out
, ", ");
548 print_reg_src(ctx
, (reg_t
)(cat5
->src2
), cat5
->full
,
549 false, false, false, false, false, false);
551 if (cat5
->is_s2en_bindless
) {
552 if (!desc_indirect
) {
553 if (info
[cat5
->opc
].samp
) {
555 fprintf(ctx
->out
, ", s#%d", cat5
->s2en_bindless
.src3
);
557 fprintf(ctx
->out
, ", s#%d", cat5
->s2en_bindless
.src3
& 0xf);
560 if (info
[cat5
->opc
].tex
&& !use_a1
) {
561 fprintf(ctx
->out
, ", t#%d", cat5
->s2en_bindless
.src3
>> 4);
565 if (info
[cat5
->opc
].samp
)
566 fprintf(ctx
->out
, ", s#%d", cat5
->norm
.samp
);
567 if (info
[cat5
->opc
].tex
)
568 fprintf(ctx
->out
, ", t#%d", cat5
->norm
.tex
);
572 fprintf(ctx
->out
, ", ");
573 print_reg_src(ctx
, (reg_t
)(cat5
->s2en_bindless
.src3
), bindless
,
574 false, false, false, false, false, false);
578 fprintf(ctx
->out
, ", a1.x");
580 if (debug
& PRINT_VERBOSE
) {
581 if (cat5
->is_s2en_bindless
) {
582 if ((debug
& PRINT_VERBOSE
) && cat5
->s2en_bindless
.dummy1
)
583 fprintf(ctx
->out
, "\t{5: %x}", cat5
->s2en_bindless
.dummy1
);
585 if ((debug
& PRINT_VERBOSE
) && cat5
->norm
.dummy1
)
586 fprintf(ctx
->out
, "\t{5: %x}", cat5
->norm
.dummy1
);
591 static void print_instr_cat6_a3xx(struct disasm_ctx
*ctx
, instr_t
*instr
)
593 instr_cat6_t
*cat6
= &instr
->cat6
;
594 char sd
= 0, ss
= 0; /* dst/src address space */
596 struct reginfo dst
, src1
, src2
;
597 int src1off
= 0, dstoff
= 0;
599 memset(&dst
, 0, sizeof(dst
));
600 memset(&src1
, 0, sizeof(src1
));
601 memset(&src2
, 0, sizeof(src2
));
603 switch (_OPC(6, cat6
->opc
)) {
606 dst
.full
= type_size(cat6
->type
) == 32;
607 src1
.full
= type_size(cat6
->type
) == 32;
608 src2
.full
= type_size(cat6
->type
) == 32;
622 src1
.full
= type_size(cat6
->type
) == 32;
623 src2
.full
= type_size(cat6
->type
) == 32;
626 dst
.full
= type_size(cat6
->type
) == 32;
632 switch (_OPC(6, cat6
->opc
)) {
636 fprintf(ctx
->out
, ".%dd", cat6
->ldgb
.d
+ 1);
639 fprintf(ctx
->out
, ".%s", cat6
->ldgb
.typed
? "typed" : "untyped");
640 fprintf(ctx
->out
, ".%dd", cat6
->ldgb
.d
+ 1);
641 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
642 fprintf(ctx
->out
, ".%d", cat6
->ldgb
.type_size
+ 1);
646 fprintf(ctx
->out
, ".%s", cat6
->stgb
.typed
? "typed" : "untyped");
647 fprintf(ctx
->out
, ".%dd", cat6
->stgb
.d
+ 1);
648 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
649 fprintf(ctx
->out
, ".%d", cat6
->stgb
.type_size
+ 1);
653 case OPC_ATOMIC_XCHG
:
656 case OPC_ATOMIC_CMPXCHG
:
662 ss
= cat6
->g
? 'g' : 'l';
663 fprintf(ctx
->out
, ".%s", cat6
->ldgb
.typed
? "typed" : "untyped");
664 fprintf(ctx
->out
, ".%dd", cat6
->ldgb
.d
+ 1);
665 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
666 fprintf(ctx
->out
, ".%d", cat6
->ldgb
.type_size
+ 1);
667 fprintf(ctx
->out
, ".%c", ss
);
670 dst
.im
= cat6
->g
&& !cat6
->dst_off
;
671 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
674 fprintf(ctx
->out
, " ");
676 switch (_OPC(6, cat6
->opc
)) {
717 if ((_OPC(6, cat6
->opc
) == OPC_STGB
) || (_OPC(6, cat6
->opc
) == OPC_STIB
)) {
720 memset(&src3
, 0, sizeof(src3
));
722 src1
.reg
= (reg_t
)(cat6
->stgb
.src1
);
723 src2
.reg
= (reg_t
)(cat6
->stgb
.src2
);
724 src2
.im
= cat6
->stgb
.src2_im
;
725 src3
.reg
= (reg_t
)(cat6
->stgb
.src3
);
726 src3
.im
= cat6
->stgb
.src3_im
;
729 fprintf(ctx
->out
, "g[%u], ", cat6
->stgb
.dst_ssbo
);
730 print_src(ctx
, &src1
);
731 fprintf(ctx
->out
, ", ");
732 print_src(ctx
, &src2
);
733 fprintf(ctx
->out
, ", ");
734 print_src(ctx
, &src3
);
736 if (debug
& PRINT_VERBOSE
)
737 fprintf(ctx
->out
, " (pad0=%x, pad3=%x)", cat6
->stgb
.pad0
, cat6
->stgb
.pad3
);
742 if (is_atomic(_OPC(6, cat6
->opc
))) {
744 src1
.reg
= (reg_t
)(cat6
->ldgb
.src1
);
745 src1
.im
= cat6
->ldgb
.src1_im
;
746 src2
.reg
= (reg_t
)(cat6
->ldgb
.src2
);
747 src2
.im
= cat6
->ldgb
.src2_im
;
748 dst
.reg
= (reg_t
)(cat6
->ldgb
.dst
);
750 print_src(ctx
, &dst
);
751 fprintf(ctx
->out
, ", ");
754 memset(&src3
, 0, sizeof(src3
));
756 src3
.reg
= (reg_t
)(cat6
->ldgb
.src3
);
759 /* For images, the ".typed" variant is used and src2 is
760 * the ivecN coordinates, ie ivec2 for 2d.
762 * For SSBOs, the ".untyped" variant is used and src2 is
763 * a simple dword offset.. src3 appears to be
764 * uvec2(offset * 4, 0). Not sure the point of that.
767 fprintf(ctx
->out
, "g[%u], ", cat6
->ldgb
.src_ssbo
);
768 print_src(ctx
, &src1
); /* value */
769 fprintf(ctx
->out
, ", ");
770 print_src(ctx
, &src2
); /* offset/coords */
771 fprintf(ctx
->out
, ", ");
772 print_src(ctx
, &src3
); /* 64b byte offset.. */
774 if (debug
& PRINT_VERBOSE
) {
775 fprintf(ctx
->out
, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6
->ldgb
.pad0
,
776 cat6
->ldgb
.pad3
, cat6
->ldgb
.mustbe0
);
778 } else { /* ss == 'l' */
779 fprintf(ctx
->out
, "l[");
780 print_src(ctx
, &src1
); /* simple byte offset */
781 fprintf(ctx
->out
, "], ");
782 print_src(ctx
, &src2
); /* value */
784 if (debug
& PRINT_VERBOSE
) {
785 fprintf(ctx
->out
, " (src3=%x, pad0=%x, pad3=%x, mustbe0=%x)",
786 cat6
->ldgb
.src3
, cat6
->ldgb
.pad0
,
787 cat6
->ldgb
.pad3
, cat6
->ldgb
.mustbe0
);
792 } else if (_OPC(6, cat6
->opc
) == OPC_RESINFO
) {
793 dst
.reg
= (reg_t
)(cat6
->ldgb
.dst
);
795 print_src(ctx
, &dst
);
796 fprintf(ctx
->out
, ", ");
797 fprintf(ctx
->out
, "g[%u]", cat6
->ldgb
.src_ssbo
);
800 } else if (_OPC(6, cat6
->opc
) == OPC_LDGB
) {
802 src1
.reg
= (reg_t
)(cat6
->ldgb
.src1
);
803 src1
.im
= cat6
->ldgb
.src1_im
;
804 src2
.reg
= (reg_t
)(cat6
->ldgb
.src2
);
805 src2
.im
= cat6
->ldgb
.src2_im
;
806 dst
.reg
= (reg_t
)(cat6
->ldgb
.dst
);
808 print_src(ctx
, &dst
);
809 fprintf(ctx
->out
, ", ");
810 fprintf(ctx
->out
, "g[%u], ", cat6
->ldgb
.src_ssbo
);
811 print_src(ctx
, &src1
);
812 fprintf(ctx
->out
, ", ");
813 print_src(ctx
, &src2
);
815 if (debug
& PRINT_VERBOSE
)
816 fprintf(ctx
->out
, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6
->ldgb
.pad0
, cat6
->ldgb
.pad3
, cat6
->ldgb
.mustbe0
);
819 } else if (_OPC(6, cat6
->opc
) == OPC_LDG
&& cat6
->a
.src1_im
&& cat6
->a
.src2_im
) {
822 memset(&src3
, 0, sizeof(src3
));
823 src1
.reg
= (reg_t
)(cat6
->a
.src1
);
824 src2
.reg
= (reg_t
)(cat6
->a
.src2
);
825 src2
.im
= cat6
->a
.src2_im
;
826 src3
.reg
= (reg_t
)(cat6
->a
.off
);
828 dst
.reg
= (reg_t
)(cat6
->d
.dst
);
830 print_src(ctx
, &dst
);
831 fprintf(ctx
->out
, ", g[");
832 print_src(ctx
, &src1
);
833 fprintf(ctx
->out
, "+");
834 print_src(ctx
, &src3
);
835 fprintf(ctx
->out
, "], ");
836 print_src(ctx
, &src2
);
841 dst
.reg
= (reg_t
)(cat6
->c
.dst
);
842 dstoff
= cat6
->c
.off
;
844 dst
.reg
= (reg_t
)(cat6
->d
.dst
);
848 src1
.reg
= (reg_t
)(cat6
->a
.src1
);
849 src1
.im
= cat6
->a
.src1_im
;
850 src2
.reg
= (reg_t
)(cat6
->a
.src2
);
851 src2
.im
= cat6
->a
.src2_im
;
852 src1off
= cat6
->a
.off
;
854 src1
.reg
= (reg_t
)(cat6
->b
.src1
);
855 src1
.im
= cat6
->b
.src1_im
;
856 src2
.reg
= (reg_t
)(cat6
->b
.src2
);
857 src2
.im
= cat6
->b
.src2_im
;
862 fprintf(ctx
->out
, "%c[", sd
);
863 /* note: dst might actually be a src (ie. address to store to) */
864 print_src(ctx
, &dst
);
865 if (cat6
->dst_off
&& cat6
->g
) {
866 struct reginfo dstoff_reg
= {0};
867 dstoff_reg
.reg
= (reg_t
) cat6
->c
.off
;
868 dstoff_reg
.full
= true;
869 fprintf(ctx
->out
, "+");
870 print_src(ctx
, &dstoff_reg
);
872 fprintf(ctx
->out
, "%+d", dstoff
);
874 fprintf(ctx
->out
, "]");
875 fprintf(ctx
->out
, ", ");
879 fprintf(ctx
->out
, "%c[", ss
);
881 /* can have a larger than normal immed, so hack: */
883 fprintf(ctx
->out
, "%u", src1
.reg
.dummy13
);
885 print_src(ctx
, &src1
);
888 if (cat6
->src_off
&& cat6
->g
)
889 print_src(ctx
, &src2
);
891 fprintf(ctx
->out
, "%+d", src1off
);
893 fprintf(ctx
->out
, "]");
895 switch (_OPC(6, cat6
->opc
)) {
900 fprintf(ctx
->out
, ", ");
901 print_src(ctx
, &src2
);
906 static void print_instr_cat6_a6xx(struct disasm_ctx
*ctx
, instr_t
*instr
)
908 instr_cat6_a6xx_t
*cat6
= &instr
->cat6_a6xx
;
909 struct reginfo src1
, src2
, ssbo
;
910 bool uses_type
= _OPC(6, cat6
->opc
) != OPC_LDC
;
912 static const struct {
916 } desc_features
[8] = {
917 [CAT6_IMM
] = { false },
918 [CAT6_BINDLESS_IMM
] = { .bindless
= true, },
919 [CAT6_BINDLESS_UNIFORM
] = {
924 [CAT6_BINDLESS_NONUNIFORM
] = {
930 bool indirect_ssbo
= desc_features
[cat6
->desc_mode
].indirect
;
931 bool bindless
= desc_features
[cat6
->desc_mode
].bindless
;
932 bool uniform
= desc_features
[cat6
->desc_mode
].uniform
;
933 bool type_full
= cat6
->type
!= TYPE_U16
;
936 memset(&src1
, 0, sizeof(src1
));
937 memset(&src2
, 0, sizeof(src2
));
938 memset(&ssbo
, 0, sizeof(ssbo
));
941 fprintf(ctx
->out
, ".%s", cat6
->typed
? "typed" : "untyped");
942 fprintf(ctx
->out
, ".%dd", cat6
->d
+ 1);
943 fprintf(ctx
->out
, ".%s", type
[cat6
->type
]);
945 fprintf(ctx
->out
, ".offset%d", cat6
->d
);
947 fprintf(ctx
->out
, ".%u", cat6
->type_size
+ 1);
950 fprintf(ctx
->out
, ".base%d", cat6
->base
);
952 fprintf(ctx
->out
, ".uniform");
953 fprintf(ctx
->out
, " ");
955 src2
.reg
= (reg_t
)(cat6
->src2
);
956 src2
.full
= type_full
;
957 print_src(ctx
, &src2
);
958 fprintf(ctx
->out
, ", ");
960 src1
.reg
= (reg_t
)(cat6
->src1
);
961 src1
.full
= true; // XXX
962 print_src(ctx
, &src1
);
963 fprintf(ctx
->out
, ", ");
964 ssbo
.reg
= (reg_t
)(cat6
->ssbo
);
965 ssbo
.im
= !indirect_ssbo
;
967 print_src(ctx
, &ssbo
);
969 if (debug
& PRINT_VERBOSE
) {
970 fprintf(ctx
->out
, " (pad1=%x, pad2=%x, pad3=%x, pad4=%x, pad5=%x)",
971 cat6
->pad1
, cat6
->pad2
, cat6
->pad3
, cat6
->pad4
, cat6
->pad5
);
975 static void print_instr_cat6(struct disasm_ctx
*ctx
, instr_t
*instr
)
977 if (!is_cat6_legacy(instr
, ctx
->gpu_id
)) {
978 print_instr_cat6_a6xx(ctx
, instr
);
979 if (debug
& PRINT_VERBOSE
)
980 fprintf(ctx
->out
, " NEW");
982 print_instr_cat6_a3xx(ctx
, instr
);
983 if (debug
& PRINT_VERBOSE
)
984 fprintf(ctx
->out
, " LEGACY");
987 static void print_instr_cat7(struct disasm_ctx
*ctx
, instr_t
*instr
)
989 instr_cat7_t
*cat7
= &instr
->cat7
;
992 fprintf(ctx
->out
, ".g");
994 fprintf(ctx
->out
, ".l");
996 if (_OPC(7, cat7
->opc
) == OPC_FENCE
) {
998 fprintf(ctx
->out
, ".r");
1000 fprintf(ctx
->out
, ".w");
1004 /* size of largest OPC field of all the instruction categories: */
1007 static const struct opc_info
{
1011 void (*print
)(struct disasm_ctx
*ctx
, instr_t
*instr
);
1012 } opcs
[1 << (3+NOPC_BITS
)] = {
1013 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat }
1015 OPC(0, OPC_NOP
, nop
),
1017 OPC(0, OPC_JUMP
, jump
),
1018 OPC(0, OPC_CALL
, call
),
1019 OPC(0, OPC_RET
, ret
),
1020 OPC(0, OPC_KILL
, kill
),
1021 OPC(0, OPC_END
, end
),
1022 OPC(0, OPC_EMIT
, emit
),
1023 OPC(0, OPC_CUT
, cut
),
1024 OPC(0, OPC_CHMASK
, chmask
),
1025 OPC(0, OPC_CHSH
, chsh
),
1026 OPC(0, OPC_FLOW_REV
, flow_rev
),
1028 OPC(0, OPC_ELSE
, else),
1029 OPC(0, OPC_ENDIF
, endif
),
1035 OPC(2, OPC_ADD_F
, add
.f
),
1036 OPC(2, OPC_MIN_F
, min
.f
),
1037 OPC(2, OPC_MAX_F
, max
.f
),
1038 OPC(2, OPC_MUL_F
, mul
.f
),
1039 OPC(2, OPC_SIGN_F
, sign
.f
),
1040 OPC(2, OPC_CMPS_F
, cmps
.f
),
1041 OPC(2, OPC_ABSNEG_F
, absneg
.f
),
1042 OPC(2, OPC_CMPV_F
, cmpv
.f
),
1043 OPC(2, OPC_FLOOR_F
, floor
.f
),
1044 OPC(2, OPC_CEIL_F
, ceil
.f
),
1045 OPC(2, OPC_RNDNE_F
, rndne
.f
),
1046 OPC(2, OPC_RNDAZ_F
, rndaz
.f
),
1047 OPC(2, OPC_TRUNC_F
, trunc
.f
),
1048 OPC(2, OPC_ADD_U
, add
.u
),
1049 OPC(2, OPC_ADD_S
, add
.s
),
1050 OPC(2, OPC_SUB_U
, sub
.u
),
1051 OPC(2, OPC_SUB_S
, sub
.s
),
1052 OPC(2, OPC_CMPS_U
, cmps
.u
),
1053 OPC(2, OPC_CMPS_S
, cmps
.s
),
1054 OPC(2, OPC_MIN_U
, min
.u
),
1055 OPC(2, OPC_MIN_S
, min
.s
),
1056 OPC(2, OPC_MAX_U
, max
.u
),
1057 OPC(2, OPC_MAX_S
, max
.s
),
1058 OPC(2, OPC_ABSNEG_S
, absneg
.s
),
1059 OPC(2, OPC_AND_B
, and.b
),
1060 OPC(2, OPC_OR_B
, or.b
),
1061 OPC(2, OPC_NOT_B
, not.b
),
1062 OPC(2, OPC_XOR_B
, xor.b
),
1063 OPC(2, OPC_CMPV_U
, cmpv
.u
),
1064 OPC(2, OPC_CMPV_S
, cmpv
.s
),
1065 OPC(2, OPC_MUL_U24
, mul
.u24
),
1066 OPC(2, OPC_MUL_S24
, mul
.s24
),
1067 OPC(2, OPC_MULL_U
, mull
.u
),
1068 OPC(2, OPC_BFREV_B
, bfrev
.b
),
1069 OPC(2, OPC_CLZ_S
, clz
.s
),
1070 OPC(2, OPC_CLZ_B
, clz
.b
),
1071 OPC(2, OPC_SHL_B
, shl
.b
),
1072 OPC(2, OPC_SHR_B
, shr
.b
),
1073 OPC(2, OPC_ASHR_B
, ashr
.b
),
1074 OPC(2, OPC_BARY_F
, bary
.f
),
1075 OPC(2, OPC_MGEN_B
, mgen
.b
),
1076 OPC(2, OPC_GETBIT_B
, getbit
.b
),
1077 OPC(2, OPC_SETRM
, setrm
),
1078 OPC(2, OPC_CBITS_B
, cbits
.b
),
1079 OPC(2, OPC_SHB
, shb
),
1080 OPC(2, OPC_MSAD
, msad
),
1083 OPC(3, OPC_MAD_U16
, mad
.u16
),
1084 OPC(3, OPC_MADSH_U16
, madsh
.u16
),
1085 OPC(3, OPC_MAD_S16
, mad
.s16
),
1086 OPC(3, OPC_MADSH_M16
, madsh
.m16
),
1087 OPC(3, OPC_MAD_U24
, mad
.u24
),
1088 OPC(3, OPC_MAD_S24
, mad
.s24
),
1089 OPC(3, OPC_MAD_F16
, mad
.f16
),
1090 OPC(3, OPC_MAD_F32
, mad
.f32
),
1091 OPC(3, OPC_SEL_B16
, sel
.b16
),
1092 OPC(3, OPC_SEL_B32
, sel
.b32
),
1093 OPC(3, OPC_SEL_S16
, sel
.s16
),
1094 OPC(3, OPC_SEL_S32
, sel
.s32
),
1095 OPC(3, OPC_SEL_F16
, sel
.f16
),
1096 OPC(3, OPC_SEL_F32
, sel
.f32
),
1097 OPC(3, OPC_SAD_S16
, sad
.s16
),
1098 OPC(3, OPC_SAD_S32
, sad
.s32
),
1101 OPC(4, OPC_RCP
, rcp
),
1102 OPC(4, OPC_RSQ
, rsq
),
1103 OPC(4, OPC_LOG2
, log2
),
1104 OPC(4, OPC_EXP2
, exp2
),
1105 OPC(4, OPC_SIN
, sin
),
1106 OPC(4, OPC_COS
, cos
),
1107 OPC(4, OPC_SQRT
, sqrt
),
1108 OPC(4, OPC_HRSQ
, hrsq
),
1109 OPC(4, OPC_HLOG2
, hlog2
),
1110 OPC(4, OPC_HEXP2
, hexp2
),
1113 OPC(5, OPC_ISAM
, isam
),
1114 OPC(5, OPC_ISAML
, isaml
),
1115 OPC(5, OPC_ISAMM
, isamm
),
1116 OPC(5, OPC_SAM
, sam
),
1117 OPC(5, OPC_SAMB
, samb
),
1118 OPC(5, OPC_SAML
, saml
),
1119 OPC(5, OPC_SAMGQ
, samgq
),
1120 OPC(5, OPC_GETLOD
, getlod
),
1121 OPC(5, OPC_CONV
, conv
),
1122 OPC(5, OPC_CONVM
, convm
),
1123 OPC(5, OPC_GETSIZE
, getsize
),
1124 OPC(5, OPC_GETBUF
, getbuf
),
1125 OPC(5, OPC_GETPOS
, getpos
),
1126 OPC(5, OPC_GETINFO
, getinfo
),
1127 OPC(5, OPC_DSX
, dsx
),
1128 OPC(5, OPC_DSY
, dsy
),
1129 OPC(5, OPC_GATHER4R
, gather4r
),
1130 OPC(5, OPC_GATHER4G
, gather4g
),
1131 OPC(5, OPC_GATHER4B
, gather4b
),
1132 OPC(5, OPC_GATHER4A
, gather4a
),
1133 OPC(5, OPC_SAMGP0
, samgp0
),
1134 OPC(5, OPC_SAMGP1
, samgp1
),
1135 OPC(5, OPC_SAMGP2
, samgp2
),
1136 OPC(5, OPC_SAMGP3
, samgp3
),
1137 OPC(5, OPC_DSXPP_1
, dsxpp
.1),
1138 OPC(5, OPC_DSYPP_1
, dsypp
.1),
1139 OPC(5, OPC_RGETPOS
, rgetpos
),
1140 OPC(5, OPC_RGETINFO
, rgetinfo
),
1144 OPC(6, OPC_LDG
, ldg
),
1145 OPC(6, OPC_LDL
, ldl
),
1146 OPC(6, OPC_LDP
, ldp
),
1147 OPC(6, OPC_STG
, stg
),
1148 OPC(6, OPC_STL
, stl
),
1149 OPC(6, OPC_STP
, stp
),
1150 OPC(6, OPC_LDIB
, ldib
),
1151 OPC(6, OPC_G2L
, g2l
),
1152 OPC(6, OPC_L2G
, l2g
),
1153 OPC(6, OPC_PREFETCH
, prefetch
),
1154 OPC(6, OPC_LDLW
, ldlw
),
1155 OPC(6, OPC_STLW
, stlw
),
1156 OPC(6, OPC_RESFMT
, resfmt
),
1157 OPC(6, OPC_RESINFO
, resinfo
),
1158 OPC(6, OPC_ATOMIC_ADD
, atomic
.add
),
1159 OPC(6, OPC_ATOMIC_SUB
, atomic
.sub
),
1160 OPC(6, OPC_ATOMIC_XCHG
, atomic
.xchg
),
1161 OPC(6, OPC_ATOMIC_INC
, atomic
.inc
),
1162 OPC(6, OPC_ATOMIC_DEC
, atomic
.dec
),
1163 OPC(6, OPC_ATOMIC_CMPXCHG
, atomic
.cmpxchg
),
1164 OPC(6, OPC_ATOMIC_MIN
, atomic
.min
),
1165 OPC(6, OPC_ATOMIC_MAX
, atomic
.max
),
1166 OPC(6, OPC_ATOMIC_AND
, atomic
.and),
1167 OPC(6, OPC_ATOMIC_OR
, atomic
.or),
1168 OPC(6, OPC_ATOMIC_XOR
, atomic
.xor),
1169 OPC(6, OPC_LDGB
, ldgb
),
1170 OPC(6, OPC_STGB
, stgb
),
1171 OPC(6, OPC_STIB
, stib
),
1172 OPC(6, OPC_LDC
, ldc
),
1173 OPC(6, OPC_LDLV
, ldlv
),
1175 OPC(7, OPC_BAR
, bar
),
1176 OPC(7, OPC_FENCE
, fence
),
1181 #define GETINFO(instr) (&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr, ctx->gpu_id)]))
1183 // XXX hack.. probably should move this table somewhere common:
1185 const char *ir3_instr_name(struct ir3_instruction
*instr
)
1187 if (opc_cat(instr
->opc
) == -1) return "??meta??";
1188 return opcs
[instr
->opc
].name
;
1191 static void print_single_instr(struct disasm_ctx
*ctx
, instr_t
*instr
)
1193 const char *name
= GETINFO(instr
)->name
;
1194 uint32_t opc
= instr_opc(instr
, ctx
->gpu_id
);
1197 fprintf(ctx
->out
, "%s", name
);
1198 GETINFO(instr
)->print(ctx
, instr
);
1200 fprintf(ctx
->out
, "unknown(%d,%d)", instr
->opc_cat
, opc
);
1202 switch (instr
->opc_cat
) {
1203 case 0: print_instr_cat0(ctx
, instr
); break;
1204 case 1: print_instr_cat1(ctx
, instr
); break;
1205 case 2: print_instr_cat2(ctx
, instr
); break;
1206 case 3: print_instr_cat3(ctx
, instr
); break;
1207 case 4: print_instr_cat4(ctx
, instr
); break;
1208 case 5: print_instr_cat5(ctx
, instr
); break;
1209 case 6: print_instr_cat6(ctx
, instr
); break;
1210 case 7: print_instr_cat7(ctx
, instr
); break;
1215 static bool print_instr(struct disasm_ctx
*ctx
, uint32_t *dwords
, int n
)
1217 instr_t
*instr
= (instr_t
*)dwords
;
1218 uint32_t opc
= instr_opc(instr
, ctx
->gpu_id
);
1220 unsigned cycles
= ctx
->instructions
;
1222 if (debug
& PRINT_VERBOSE
) {
1223 fprintf(ctx
->out
, "%s%04d:%04d[%08xx_%08xx] ", levels
[ctx
->level
],
1224 n
, cycles
++, dwords
[1], dwords
[0]);
1227 /* NOTE: order flags are printed is a bit fugly.. but for now I
1228 * try to match the order in llvm-a3xx disassembler for easy
1232 ctx
->repeat
= instr_repeat(instr
);
1233 ctx
->instructions
+= 1 + ctx
->repeat
;
1236 fprintf(ctx
->out
, "(sy)");
1238 if (instr
->ss
&& ((instr
->opc_cat
<= 4) || (instr
->opc_cat
== 7))) {
1239 fprintf(ctx
->out
, "(ss)");
1242 fprintf(ctx
->out
, "(jp)");
1243 if (instr_sat(instr
))
1244 fprintf(ctx
->out
, "(sat)");
1246 fprintf(ctx
->out
, "(rpt%d)", ctx
->repeat
);
1247 else if ((instr
->opc_cat
== 2) && (instr
->cat2
.src1_r
|| instr
->cat2
.src2_r
))
1248 nop
= (instr
->cat2
.src2_r
* 2) + instr
->cat2
.src1_r
;
1249 else if ((instr
->opc_cat
== 3) && (instr
->cat3
.src1_r
|| instr
->cat3
.src2_r
))
1250 nop
= (instr
->cat3
.src2_r
* 2) + instr
->cat3
.src1_r
;
1251 ctx
->instructions
+= nop
;
1253 fprintf(ctx
->out
, "(nop%d)", nop
);
1255 if (instr
->ul
&& ((2 <= instr
->opc_cat
) && (instr
->opc_cat
<= 4)))
1256 fprintf(ctx
->out
, "(ul)");
1258 print_single_instr(ctx
, instr
);
1259 fprintf(ctx
->out
, "\n");
1261 if ((instr
->opc_cat
<= 4) && (debug
& EXPAND_REPEAT
)) {
1263 for (i
= 0; i
< nop
; i
++) {
1264 if (debug
& PRINT_VERBOSE
) {
1265 fprintf(ctx
->out
, "%s%04d:%04d[ ] ",
1266 levels
[ctx
->level
], n
, cycles
++);
1268 fprintf(ctx
->out
, "nop\n");
1270 for (i
= 0; i
< ctx
->repeat
; i
++) {
1271 ctx
->repeatidx
= i
+ 1;
1272 if (debug
& PRINT_VERBOSE
) {
1273 fprintf(ctx
->out
, "%s%04d:%04d[ ] ",
1274 levels
[ctx
->level
], n
, cycles
++);
1276 print_single_instr(ctx
, instr
);
1277 fprintf(ctx
->out
, "\n");
1282 return (instr
->opc_cat
== 0) && (opc
== OPC_END
);
1285 int disasm_a3xx(uint32_t *dwords
, int sizedwords
, int level
, FILE *out
, unsigned gpu_id
)
1287 struct disasm_ctx ctx
;
1291 assert((sizedwords
% 2) == 0);
1293 memset(&ctx
, 0, sizeof(ctx
));
1296 ctx
.gpu_id
= gpu_id
;
1298 for (i
= 0; i
< sizedwords
; i
+= 2) {
1299 print_instr(&ctx
, &dwords
[i
], i
/2);
1300 if (dwords
[i
] == 0 && dwords
[i
+ 1] == 0)