2 * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
28 #include "util/debug.h"
31 #include "ir3_compiler.h"
32 #include "ir3_shader.h"
34 static const nir_shader_compiler_options options
= {
45 .lower_uadd_carry
= true,
46 .lower_mul_high
= true,
48 .native_integers
= true,
49 .vertex_id_zero_based
= true,
50 .lower_extract_byte
= true,
51 .lower_extract_word
= true,
52 .lower_all_io_to_elements
= true,
53 .lower_helper_invocation
= true,
54 .lower_bitfield_insert_to_shifts
= true,
55 .lower_bitfield_extract_to_shifts
= true,
57 .use_interpolated_input_intrinsics
= true,
60 /* we don't want to lower vertex_id to _zero_based on newer gpus: */
61 static const nir_shader_compiler_options options_a6xx
= {
72 .lower_uadd_carry
= true,
73 .lower_mul_high
= true,
75 .native_integers
= true,
76 .vertex_id_zero_based
= false,
77 .lower_extract_byte
= true,
78 .lower_extract_word
= true,
79 .lower_all_io_to_elements
= true,
80 .lower_helper_invocation
= true,
81 .lower_bitfield_insert_to_shifts
= true,
82 .lower_bitfield_extract_to_shifts
= true,
84 .use_interpolated_input_intrinsics
= true,
87 const nir_shader_compiler_options
*
88 ir3_get_compiler_options(struct ir3_compiler
*compiler
)
90 if (compiler
->gpu_id
>= 600)
95 /* for given shader key, are any steps handled in nir? */
97 ir3_key_lowers_nir(const struct ir3_shader_key
*key
)
99 return key
->fsaturate_s
| key
->fsaturate_t
| key
->fsaturate_r
|
100 key
->vsaturate_s
| key
->vsaturate_t
| key
->vsaturate_r
|
101 key
->ucp_enables
| key
->color_two_side
|
102 key
->fclamp_color
| key
->vclamp_color
;
105 #define OPT(nir, pass, ...) ({ \
106 bool this_progress = false; \
107 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
111 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
114 ir3_optimize_loop(nir_shader
*s
)
120 OPT_V(s
, nir_lower_vars_to_ssa
);
121 progress
|= OPT(s
, nir_opt_copy_prop_vars
);
122 progress
|= OPT(s
, nir_opt_dead_write_vars
);
123 progress
|= OPT(s
, nir_lower_alu_to_scalar
);
124 progress
|= OPT(s
, nir_lower_phis_to_scalar
);
126 progress
|= OPT(s
, nir_copy_prop
);
127 progress
|= OPT(s
, nir_opt_dce
);
128 progress
|= OPT(s
, nir_opt_cse
);
131 gcm
= env_var_as_unsigned("GCM", 0);
133 progress
|= OPT(s
, nir_opt_gcm
, true);
135 progress
|= OPT(s
, nir_opt_gcm
, false);
136 progress
|= OPT(s
, nir_opt_peephole_select
, 16, true, true);
137 progress
|= OPT(s
, nir_opt_intrinsics
);
138 progress
|= OPT(s
, nir_opt_algebraic
);
139 progress
|= OPT(s
, nir_opt_constant_folding
);
140 progress
|= OPT(s
, nir_opt_dead_cf
);
141 if (OPT(s
, nir_opt_trivial_continues
)) {
143 /* If nir_opt_trivial_continues makes progress, then we need to clean
144 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
147 OPT(s
, nir_copy_prop
);
150 progress
|= OPT(s
, nir_opt_if
, false);
151 progress
|= OPT(s
, nir_opt_remove_phis
);
152 progress
|= OPT(s
, nir_opt_undef
);
158 ir3_optimize_nir(struct ir3_shader
*shader
, nir_shader
*s
,
159 const struct ir3_shader_key
*key
)
161 struct nir_lower_tex_options tex_options
= {
163 .lower_tg4_offsets
= true,
167 switch (shader
->type
) {
168 case MESA_SHADER_FRAGMENT
:
169 tex_options
.saturate_s
= key
->fsaturate_s
;
170 tex_options
.saturate_t
= key
->fsaturate_t
;
171 tex_options
.saturate_r
= key
->fsaturate_r
;
173 case MESA_SHADER_VERTEX
:
174 tex_options
.saturate_s
= key
->vsaturate_s
;
175 tex_options
.saturate_t
= key
->vsaturate_t
;
176 tex_options
.saturate_r
= key
->vsaturate_r
;
184 if (shader
->compiler
->gpu_id
>= 400) {
185 /* a4xx seems to have *no* sam.p */
186 tex_options
.lower_txp
= ~0; /* lower all txp */
188 /* a3xx just needs to avoid sam.p for 3d tex */
189 tex_options
.lower_txp
= (1 << GLSL_SAMPLER_DIM_3D
);
192 if (ir3_shader_debug
& IR3_DBG_DISASM
) {
193 debug_printf("----------------------\n");
194 nir_print_shader(s
, stdout
);
195 debug_printf("----------------------\n");
198 OPT_V(s
, nir_lower_regs_to_ssa
);
199 OPT_V(s
, ir3_nir_lower_io_offsets
);
202 if (s
->info
.stage
== MESA_SHADER_VERTEX
) {
203 OPT_V(s
, nir_lower_clip_vs
, key
->ucp_enables
, false);
204 if (key
->vclamp_color
)
205 OPT_V(s
, nir_lower_clamp_color_outputs
);
206 } else if (s
->info
.stage
== MESA_SHADER_FRAGMENT
) {
207 OPT_V(s
, nir_lower_clip_fs
, key
->ucp_enables
);
208 if (key
->fclamp_color
)
209 OPT_V(s
, nir_lower_clamp_color_outputs
);
211 if (key
->color_two_side
) {
212 OPT_V(s
, nir_lower_two_sided_color
);
215 /* only want to do this the first time (when key is null)
216 * and not again on any potential 2nd variant lowering pass:
218 OPT_V(s
, ir3_nir_apply_trig_workarounds
);
221 OPT_V(s
, nir_lower_tex
, &tex_options
);
222 OPT_V(s
, nir_lower_load_const_to_scalar
);
223 if (shader
->compiler
->gpu_id
< 500)
224 OPT_V(s
, ir3_nir_lower_tg4_to_tex
);
226 ir3_optimize_loop(s
);
228 /* do ubo load and idiv lowering after first opt loop to get a chance to
229 * propagate constants for divide by immed power-of-two and constant ubo
232 * NOTE that UBO analysis pass should only be done once, before variants
234 const bool ubo_progress
= !key
&& OPT(s
, ir3_nir_analyze_ubo_ranges
, shader
);
235 const bool idiv_progress
= OPT(s
, nir_lower_idiv
);
236 if (ubo_progress
|| idiv_progress
)
237 ir3_optimize_loop(s
);
239 OPT_V(s
, nir_remove_dead_variables
, nir_var_function_temp
);
241 OPT_V(s
, nir_move_load_const
);
243 if (ir3_shader_debug
& IR3_DBG_DISASM
) {
244 debug_printf("----------------------\n");
245 nir_print_shader(s
, stdout
);
246 debug_printf("----------------------\n");
255 ir3_nir_scan_driver_consts(nir_shader
*shader
,
256 struct ir3_driver_const_layout
*layout
)
258 nir_foreach_function(function
, shader
) {
262 nir_foreach_block(block
, function
->impl
) {
263 nir_foreach_instr(instr
, block
) {
264 if (instr
->type
!= nir_instr_type_intrinsic
)
267 nir_intrinsic_instr
*intr
=
268 nir_instr_as_intrinsic(instr
);
271 switch (intr
->intrinsic
) {
272 case nir_intrinsic_get_buffer_size
:
273 idx
= nir_src_as_uint(intr
->src
[0]);
274 if (layout
->ssbo_size
.mask
& (1 << idx
))
276 layout
->ssbo_size
.mask
|= (1 << idx
);
277 layout
->ssbo_size
.off
[idx
] =
278 layout
->ssbo_size
.count
;
279 layout
->ssbo_size
.count
+= 1; /* one const per */
281 case nir_intrinsic_image_deref_atomic_add
:
282 case nir_intrinsic_image_deref_atomic_min
:
283 case nir_intrinsic_image_deref_atomic_max
:
284 case nir_intrinsic_image_deref_atomic_and
:
285 case nir_intrinsic_image_deref_atomic_or
:
286 case nir_intrinsic_image_deref_atomic_xor
:
287 case nir_intrinsic_image_deref_atomic_exchange
:
288 case nir_intrinsic_image_deref_atomic_comp_swap
:
289 case nir_intrinsic_image_deref_store
:
290 case nir_intrinsic_image_deref_size
:
291 idx
= nir_intrinsic_get_var(intr
, 0)->data
.driver_location
;
292 if (layout
->image_dims
.mask
& (1 << idx
))
294 layout
->image_dims
.mask
|= (1 << idx
);
295 layout
->image_dims
.off
[idx
] =
296 layout
->image_dims
.count
;
297 layout
->image_dims
.count
+= 3; /* three const per */