src/freedreno/ir3/ir3_nir.c

   1 /*
   2  * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27
  28 #include "util/debug.h"
  29
  30 #include "ir3_nir.h"
  31 #include "ir3_compiler.h"
  32 #include "ir3_shader.h"
  33
  34 static const nir_shader_compiler_options options = {
  35                 .lower_fpow = true,
  36                 .lower_scmp = true,
  37                 .lower_flrp32 = true,
  38                 .lower_flrp64 = true,
  39                 .lower_ffract = true,
  40                 .lower_fmod32 = true,
  41                 .lower_fmod64 = true,
  42                 .lower_fdiv = true,
  43                 .lower_isign = true,
  44                 .lower_ldexp = true,
  45                 .lower_uadd_carry = true,
  46                 .lower_mul_high = true,
  47                 .fuse_ffma = true,
  48                 .native_integers = true,
  49                 .vertex_id_zero_based = true,
  50                 .lower_extract_byte = true,
  51                 .lower_extract_word = true,
  52                 .lower_all_io_to_elements = true,
  53                 .lower_helper_invocation = true,
  54                 .lower_bitfield_insert_to_shifts = true,
  55                 .lower_bitfield_extract_to_shifts = true,
  56                 .lower_bfm = true,
  57                 .use_interpolated_input_intrinsics = true,
  58 };
  59
  60 /* we don't want to lower vertex_id to _zero_based on newer gpus: */
  61 static const nir_shader_compiler_options options_a6xx = {
  62                 .lower_fpow = true,
  63                 .lower_scmp = true,
  64                 .lower_flrp32 = true,
  65                 .lower_flrp64 = true,
  66                 .lower_ffract = true,
  67                 .lower_fmod32 = true,
  68                 .lower_fmod64 = true,
  69                 .lower_fdiv = true,
  70                 .lower_isign = true,
  71                 .lower_ldexp = true,
  72                 .lower_uadd_carry = true,
  73                 .lower_mul_high = true,
  74                 .fuse_ffma = true,
  75                 .native_integers = true,
  76                 .vertex_id_zero_based = false,
  77                 .lower_extract_byte = true,
  78                 .lower_extract_word = true,
  79                 .lower_all_io_to_elements = true,
  80                 .lower_helper_invocation = true,
  81                 .lower_bitfield_insert_to_shifts = true,
  82                 .lower_bitfield_extract_to_shifts = true,
  83                 .lower_bfm = true,
  84                 .use_interpolated_input_intrinsics = true,
  85 };
  86
  87 const nir_shader_compiler_options *
  88 ir3_get_compiler_options(struct ir3_compiler *compiler)
  89 {
  90         if (compiler->gpu_id >= 600)
  91                 return &options_a6xx;
  92         return &options;
  93 }
  94
  95 /* for given shader key, are any steps handled in nir? */
  96 bool
  97 ir3_key_lowers_nir(const struct ir3_shader_key *key)
  98 {
  99         return key->fsaturate_s | key->fsaturate_t | key->fsaturate_r |
 100                         key->vsaturate_s | key->vsaturate_t | key->vsaturate_r |
 101                         key->ucp_enables | key->color_two_side |
 102                         key->fclamp_color | key->vclamp_color;
 103 }
 104
 105 #define OPT(nir, pass, ...) ({                             \
 106    bool this_progress = false;                             \
 107    NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__);      \
 108    this_progress;                                          \
 109 })
 110
 111 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
 112
 113 static void
 114 ir3_optimize_loop(nir_shader *s)
 115 {
 116         bool progress;
 117         do {
 118                 progress = false;
 119
 120                 OPT_V(s, nir_lower_vars_to_ssa);
 121                 progress |= OPT(s, nir_opt_copy_prop_vars);
 122                 progress |= OPT(s, nir_opt_dead_write_vars);
 123                 progress |= OPT(s, nir_lower_alu_to_scalar);
 124                 progress |= OPT(s, nir_lower_phis_to_scalar);
 125
 126                 progress |= OPT(s, nir_copy_prop);
 127                 progress |= OPT(s, nir_opt_dce);
 128                 progress |= OPT(s, nir_opt_cse);
 129                 static int gcm = -1;
 130                 if (gcm == -1)
 131                         gcm = env_var_as_unsigned("GCM", 0);
 132                 if (gcm == 1)
 133                         progress |= OPT(s, nir_opt_gcm, true);
 134                 else if (gcm == 2)
 135                         progress |= OPT(s, nir_opt_gcm, false);
 136                 progress |= OPT(s, nir_opt_peephole_select, 16, true, true);
 137                 progress |= OPT(s, nir_opt_intrinsics);
 138                 progress |= OPT(s, nir_opt_algebraic);
 139                 progress |= OPT(s, nir_opt_constant_folding);
 140                 progress |= OPT(s, nir_opt_dead_cf);
 141                 if (OPT(s, nir_opt_trivial_continues)) {
 142                         progress |= true;
 143                         /* If nir_opt_trivial_continues makes progress, then we need to clean
 144                          * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
 145                          * to make progress.
 146                          */
 147                         OPT(s, nir_copy_prop);
 148                         OPT(s, nir_opt_dce);
 149                 }
 150                 progress |= OPT(s, nir_opt_if, false);
 151                 progress |= OPT(s, nir_opt_remove_phis);
 152                 progress |= OPT(s, nir_opt_undef);
 153
 154         } while (progress);
 155 }
 156
 157 struct nir_shader *
 158 ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s,
 159                 const struct ir3_shader_key *key)
 160 {
 161         struct nir_lower_tex_options tex_options = {
 162                         .lower_rect = 0,
 163                         .lower_tg4_offsets = true,
 164         };
 165
 166         if (key) {
 167                 switch (shader->type) {
 168                 case MESA_SHADER_FRAGMENT:
 169                         tex_options.saturate_s = key->fsaturate_s;
 170                         tex_options.saturate_t = key->fsaturate_t;
 171                         tex_options.saturate_r = key->fsaturate_r;
 172                         break;
 173                 case MESA_SHADER_VERTEX:
 174                         tex_options.saturate_s = key->vsaturate_s;
 175                         tex_options.saturate_t = key->vsaturate_t;
 176                         tex_options.saturate_r = key->vsaturate_r;
 177                         break;
 178                 default:
 179                         /* TODO */
 180                         break;
 181                 }
 182         }
 183
 184         if (shader->compiler->gpu_id >= 400) {
 185                 /* a4xx seems to have *no* sam.p */
 186                 tex_options.lower_txp = ~0;  /* lower all txp */
 187         } else {
 188                 /* a3xx just needs to avoid sam.p for 3d tex */
 189                 tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
 190         }
 191
 192         if (ir3_shader_debug & IR3_DBG_DISASM) {
 193                 debug_printf("----------------------\n");
 194                 nir_print_shader(s, stdout);
 195                 debug_printf("----------------------\n");
 196         }
 197
 198         OPT_V(s, nir_lower_regs_to_ssa);
 199         OPT_V(s, ir3_nir_lower_io_offsets);
 200
 201         if (key) {
 202                 if (s->info.stage == MESA_SHADER_VERTEX) {
 203                         OPT_V(s, nir_lower_clip_vs, key->ucp_enables, false);
 204                         if (key->vclamp_color)
 205                                 OPT_V(s, nir_lower_clamp_color_outputs);
 206                 } else if (s->info.stage == MESA_SHADER_FRAGMENT) {
 207                         OPT_V(s, nir_lower_clip_fs, key->ucp_enables);
 208                         if (key->fclamp_color)
 209                                 OPT_V(s, nir_lower_clamp_color_outputs);
 210                 }
 211                 if (key->color_two_side) {
 212                         OPT_V(s, nir_lower_two_sided_color);
 213                 }
 214         } else {
 215                 /* only want to do this the first time (when key is null)
 216                  * and not again on any potential 2nd variant lowering pass:
 217                  */
 218                 OPT_V(s, ir3_nir_apply_trig_workarounds);
 219         }
 220
 221         OPT_V(s, nir_lower_tex, &tex_options);
 222         OPT_V(s, nir_lower_load_const_to_scalar);
 223         if (shader->compiler->gpu_id < 500)
 224                 OPT_V(s, ir3_nir_lower_tg4_to_tex);
 225
 226         ir3_optimize_loop(s);
 227
 228         /* do ubo load and idiv lowering after first opt loop to get a chance to
 229          * propagate constants for divide by immed power-of-two and constant ubo
 230          * block/offsets:
 231          *
 232          * NOTE that UBO analysis pass should only be done once, before variants
 233          */
 234         const bool ubo_progress = !key && OPT(s, ir3_nir_analyze_ubo_ranges, shader);
 235         const bool idiv_progress = OPT(s, nir_lower_idiv);
 236         if (ubo_progress || idiv_progress)
 237                 ir3_optimize_loop(s);
 238
 239         OPT_V(s, nir_remove_dead_variables, nir_var_function_temp);
 240
 241         OPT_V(s, nir_move_load_const);
 242
 243         if (ir3_shader_debug & IR3_DBG_DISASM) {
 244                 debug_printf("----------------------\n");
 245                 nir_print_shader(s, stdout);
 246                 debug_printf("----------------------\n");
 247         }
 248
 249         nir_sweep(s);
 250
 251         return s;
 252 }
 253
 254 void
 255 ir3_nir_scan_driver_consts(nir_shader *shader,
 256                 struct ir3_driver_const_layout *layout)
 257 {
 258         nir_foreach_function(function, shader) {
 259                 if (!function->impl)
 260                         continue;
 261
 262                 nir_foreach_block(block, function->impl) {
 263                         nir_foreach_instr(instr, block) {
 264                                 if (instr->type != nir_instr_type_intrinsic)
 265                                         continue;
 266
 267                                 nir_intrinsic_instr *intr =
 268                                         nir_instr_as_intrinsic(instr);
 269                                 unsigned idx;
 270
 271                                 switch (intr->intrinsic) {
 272                                 case nir_intrinsic_get_buffer_size:
 273                                         idx = nir_src_as_uint(intr->src[0]);
 274                                         if (layout->ssbo_size.mask & (1 << idx))
 275                                                 break;
 276                                         layout->ssbo_size.mask |= (1 << idx);
 277                                         layout->ssbo_size.off[idx] =
 278                                                 layout->ssbo_size.count;
 279                                         layout->ssbo_size.count += 1; /* one const per */
 280                                         break;
 281                                 case nir_intrinsic_image_deref_atomic_add:
 282                                 case nir_intrinsic_image_deref_atomic_min:
 283                                 case nir_intrinsic_image_deref_atomic_max:
 284                                 case nir_intrinsic_image_deref_atomic_and:
 285                                 case nir_intrinsic_image_deref_atomic_or:
 286                                 case nir_intrinsic_image_deref_atomic_xor:
 287                                 case nir_intrinsic_image_deref_atomic_exchange:
 288                                 case nir_intrinsic_image_deref_atomic_comp_swap:
 289                                 case nir_intrinsic_image_deref_store:
 290                                 case nir_intrinsic_image_deref_size:
 291                                         idx = nir_intrinsic_get_var(intr, 0)->data.driver_location;
 292                                         if (layout->image_dims.mask & (1 << idx))
 293                                                 break;
 294                                         layout->image_dims.mask |= (1 << idx);
 295                                         layout->image_dims.off[idx] =
 296                                                 layout->image_dims.count;
 297                                         layout->image_dims.count += 3; /* three const per */
 298                                         break;
 299                                 default:
 300                                         break;
 301                                 }
 302                         }
 303                 }
 304         }
 305 }