src/freedreno/ir3/ir3_nir.c

   1 /*
   2  * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27
  28 #include "util/debug.h"
  29
  30 #include "ir3_nir.h"
  31 #include "ir3_compiler.h"
  32 #include "ir3_shader.h"
  33
  34 static const nir_shader_compiler_options options = {
  35                 .lower_fpow = true,
  36                 .lower_scmp = true,
  37                 .lower_flrp32 = true,
  38                 .lower_flrp64 = true,
  39                 .lower_ffract = true,
  40                 .lower_fmod32 = true,
  41                 .lower_fmod64 = true,
  42                 .lower_fdiv = true,
  43                 .lower_isign = true,
  44                 .lower_ldexp = true,
  45                 .fuse_ffma = true,
  46                 .native_integers = true,
  47                 .vertex_id_zero_based = true,
  48                 .lower_extract_byte = true,
  49                 .lower_extract_word = true,
  50                 .lower_all_io_to_temps = true,
  51                 .lower_helper_invocation = true,
  52 };
  53
  54 const nir_shader_compiler_options *
  55 ir3_get_compiler_options(struct ir3_compiler *compiler)
  56 {
  57         return &options;
  58 }
  59
  60 /* for given shader key, are any steps handled in nir? */
  61 bool
  62 ir3_key_lowers_nir(const struct ir3_shader_key *key)
  63 {
  64         return key->fsaturate_s | key->fsaturate_t | key->fsaturate_r |
  65                         key->vsaturate_s | key->vsaturate_t | key->vsaturate_r |
  66                         key->ucp_enables | key->color_two_side |
  67                         key->fclamp_color | key->vclamp_color;
  68 }
  69
  70 #define OPT(nir, pass, ...) ({                             \
  71    bool this_progress = false;                             \
  72    NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__);      \
  73    this_progress;                                          \
  74 })
  75
  76 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
  77
  78 static void
  79 ir3_optimize_loop(nir_shader *s)
  80 {
  81         bool progress;
  82         do {
  83                 progress = false;
  84
  85                 OPT_V(s, nir_lower_vars_to_ssa);
  86                 progress |= OPT(s, nir_opt_copy_prop_vars);
  87                 progress |= OPT(s, nir_opt_dead_write_vars);
  88                 progress |= OPT(s, nir_lower_alu_to_scalar);
  89                 progress |= OPT(s, nir_lower_phis_to_scalar);
  90
  91                 progress |= OPT(s, nir_copy_prop);
  92                 progress |= OPT(s, nir_opt_dce);
  93                 progress |= OPT(s, nir_opt_cse);
  94                 static int gcm = -1;
  95                 if (gcm == -1)
  96                         gcm = env_var_as_unsigned("GCM", 0);
  97                 if (gcm == 1)
  98                         progress |= OPT(s, nir_opt_gcm, true);
  99                 else if (gcm == 2)
 100                         progress |= OPT(s, nir_opt_gcm, false);
 101                 progress |= OPT(s, nir_opt_peephole_select, 16, true, true);
 102                 progress |= OPT(s, nir_opt_intrinsics);
 103                 progress |= OPT(s, nir_opt_algebraic);
 104                 progress |= OPT(s, nir_opt_constant_folding);
 105                 progress |= OPT(s, nir_opt_dead_cf);
 106                 if (OPT(s, nir_opt_trivial_continues)) {
 107                         progress |= true;
 108                         /* If nir_opt_trivial_continues makes progress, then we need to clean
 109                          * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
 110                          * to make progress.
 111                          */
 112                         OPT(s, nir_copy_prop);
 113                         OPT(s, nir_opt_dce);
 114                 }
 115                 progress |= OPT(s, nir_opt_if);
 116                 progress |= OPT(s, nir_opt_remove_phis);
 117                 progress |= OPT(s, nir_opt_undef);
 118
 119         } while (progress);
 120 }
 121
 122 struct nir_shader *
 123 ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s,
 124                 const struct ir3_shader_key *key)
 125 {
 126         struct nir_lower_tex_options tex_options = {
 127                         .lower_rect = 0,
 128         };
 129
 130         if (key) {
 131                 switch (shader->type) {
 132                 case MESA_SHADER_FRAGMENT:
 133                         tex_options.saturate_s = key->fsaturate_s;
 134                         tex_options.saturate_t = key->fsaturate_t;
 135                         tex_options.saturate_r = key->fsaturate_r;
 136                         break;
 137                 case MESA_SHADER_VERTEX:
 138                         tex_options.saturate_s = key->vsaturate_s;
 139                         tex_options.saturate_t = key->vsaturate_t;
 140                         tex_options.saturate_r = key->vsaturate_r;
 141                         break;
 142                 default:
 143                         /* TODO */
 144                         break;
 145                 }
 146         }
 147
 148         if (shader->compiler->gpu_id >= 400) {
 149                 /* a4xx seems to have *no* sam.p */
 150                 tex_options.lower_txp = ~0;  /* lower all txp */
 151         } else {
 152                 /* a3xx just needs to avoid sam.p for 3d tex */
 153                 tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
 154         }
 155
 156         if (ir3_shader_debug & IR3_DBG_DISASM) {
 157                 debug_printf("----------------------\n");
 158                 nir_print_shader(s, stdout);
 159                 debug_printf("----------------------\n");
 160         }
 161
 162         OPT_V(s, nir_opt_global_to_local);
 163         OPT_V(s, nir_lower_regs_to_ssa);
 164
 165         if (key) {
 166                 if (s->info.stage == MESA_SHADER_VERTEX) {
 167                         OPT_V(s, nir_lower_clip_vs, key->ucp_enables, false);
 168                         if (key->vclamp_color)
 169                                 OPT_V(s, nir_lower_clamp_color_outputs);
 170                 } else if (s->info.stage == MESA_SHADER_FRAGMENT) {
 171                         OPT_V(s, nir_lower_clip_fs, key->ucp_enables);
 172                         if (key->fclamp_color)
 173                                 OPT_V(s, nir_lower_clamp_color_outputs);
 174                 }
 175                 if (key->color_two_side) {
 176                         OPT_V(s, nir_lower_two_sided_color);
 177                 }
 178         } else {
 179                 /* only want to do this the first time (when key is null)
 180                  * and not again on any potential 2nd variant lowering pass:
 181                  */
 182                 OPT_V(s, ir3_nir_apply_trig_workarounds);
 183         }
 184
 185         OPT_V(s, nir_lower_tex, &tex_options);
 186         OPT_V(s, nir_lower_load_const_to_scalar);
 187         if (shader->compiler->gpu_id < 500)
 188                 OPT_V(s, ir3_nir_lower_tg4_to_tex);
 189
 190         ir3_optimize_loop(s);
 191
 192         /* do idiv lowering after first opt loop to give a chance for
 193          * divide by immed power-of-two to be caught first:
 194          */
 195         if (OPT(s, nir_lower_idiv))
 196                 ir3_optimize_loop(s);
 197
 198         OPT_V(s, nir_remove_dead_variables, nir_var_function_temp);
 199
 200         OPT_V(s, nir_move_load_const);
 201
 202         if (ir3_shader_debug & IR3_DBG_DISASM) {
 203                 debug_printf("----------------------\n");
 204                 nir_print_shader(s, stdout);
 205                 debug_printf("----------------------\n");
 206         }
 207
 208         nir_sweep(s);
 209
 210         return s;
 211 }
 212
 213 void
 214 ir3_nir_scan_driver_consts(nir_shader *shader,
 215                 struct ir3_driver_const_layout *layout)
 216 {
 217         nir_foreach_function(function, shader) {
 218                 if (!function->impl)
 219                         continue;
 220
 221                 nir_foreach_block(block, function->impl) {
 222                         nir_foreach_instr(instr, block) {
 223                                 if (instr->type != nir_instr_type_intrinsic)
 224                                         continue;
 225
 226                                 nir_intrinsic_instr *intr =
 227                                         nir_instr_as_intrinsic(instr);
 228                                 unsigned idx;
 229
 230                                 switch (intr->intrinsic) {
 231                                 case nir_intrinsic_get_buffer_size:
 232                                         idx = nir_src_as_const_value(intr->src[0])->u32[0];
 233                                         if (layout->ssbo_size.mask & (1 << idx))
 234                                                 break;
 235                                         layout->ssbo_size.mask |= (1 << idx);
 236                                         layout->ssbo_size.off[idx] =
 237                                                 layout->ssbo_size.count;
 238                                         layout->ssbo_size.count += 1; /* one const per */
 239                                         break;
 240                                 case nir_intrinsic_image_deref_atomic_add:
 241                                 case nir_intrinsic_image_deref_atomic_min:
 242                                 case nir_intrinsic_image_deref_atomic_max:
 243                                 case nir_intrinsic_image_deref_atomic_and:
 244                                 case nir_intrinsic_image_deref_atomic_or:
 245                                 case nir_intrinsic_image_deref_atomic_xor:
 246                                 case nir_intrinsic_image_deref_atomic_exchange:
 247                                 case nir_intrinsic_image_deref_atomic_comp_swap:
 248                                 case nir_intrinsic_image_deref_store:
 249                                 case nir_intrinsic_image_deref_size:
 250                                         idx = nir_intrinsic_get_var(intr, 0)->data.driver_location;
 251                                         if (layout->image_dims.mask & (1 << idx))
 252                                                 break;
 253                                         layout->image_dims.mask |= (1 << idx);
 254                                         layout->image_dims.off[idx] =
 255                                                 layout->image_dims.count;
 256                                         layout->image_dims.count += 3; /* three const per */
 257                                         break;
 258                                 default:
 259                                         break;
 260                                 }
 261                         }
 262                 }
 263         }
 264 }