2 * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
28 #include "util/debug.h"
31 #include "ir3_compiler.h"
32 #include "ir3_shader.h"
34 static const nir_shader_compiler_options options
= {
45 .lower_uadd_carry
= true,
46 .lower_mul_high
= true,
48 .vertex_id_zero_based
= true,
49 .lower_extract_byte
= true,
50 .lower_extract_word
= true,
51 .lower_all_io_to_elements
= true,
52 .lower_helper_invocation
= true,
53 .lower_bitfield_insert_to_shifts
= true,
54 .lower_bitfield_extract_to_shifts
= true,
56 .use_interpolated_input_intrinsics
= true,
59 /* we don't want to lower vertex_id to _zero_based on newer gpus: */
60 static const nir_shader_compiler_options options_a6xx
= {
71 .lower_uadd_carry
= true,
72 .lower_mul_high
= true,
74 .vertex_id_zero_based
= false,
75 .lower_extract_byte
= true,
76 .lower_extract_word
= true,
77 .lower_all_io_to_elements
= true,
78 .lower_helper_invocation
= true,
79 .lower_bitfield_insert_to_shifts
= true,
80 .lower_bitfield_extract_to_shifts
= true,
82 .use_interpolated_input_intrinsics
= true,
85 const nir_shader_compiler_options
*
86 ir3_get_compiler_options(struct ir3_compiler
*compiler
)
88 if (compiler
->gpu_id
>= 600)
93 /* for given shader key, are any steps handled in nir? */
95 ir3_key_lowers_nir(const struct ir3_shader_key
*key
)
97 return key
->fsaturate_s
| key
->fsaturate_t
| key
->fsaturate_r
|
98 key
->vsaturate_s
| key
->vsaturate_t
| key
->vsaturate_r
|
99 key
->ucp_enables
| key
->color_two_side
|
100 key
->fclamp_color
| key
->vclamp_color
;
103 #define OPT(nir, pass, ...) ({ \
104 bool this_progress = false; \
105 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
109 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
112 ir3_optimize_loop(nir_shader
*s
)
115 unsigned lower_flrp
=
116 (s
->options
->lower_flrp16
? 16 : 0) |
117 (s
->options
->lower_flrp32
? 32 : 0) |
118 (s
->options
->lower_flrp64
? 64 : 0);
123 OPT_V(s
, nir_lower_vars_to_ssa
);
124 progress
|= OPT(s
, nir_opt_copy_prop_vars
);
125 progress
|= OPT(s
, nir_opt_dead_write_vars
);
126 progress
|= OPT(s
, nir_lower_alu_to_scalar
);
127 progress
|= OPT(s
, nir_lower_phis_to_scalar
);
129 progress
|= OPT(s
, nir_copy_prop
);
130 progress
|= OPT(s
, nir_opt_dce
);
131 progress
|= OPT(s
, nir_opt_cse
);
134 gcm
= env_var_as_unsigned("GCM", 0);
136 progress
|= OPT(s
, nir_opt_gcm
, true);
138 progress
|= OPT(s
, nir_opt_gcm
, false);
139 progress
|= OPT(s
, nir_opt_peephole_select
, 16, true, true);
140 progress
|= OPT(s
, nir_opt_intrinsics
);
141 progress
|= OPT(s
, nir_opt_algebraic
);
142 progress
|= OPT(s
, nir_opt_constant_folding
);
144 if (lower_flrp
!= 0) {
145 if (OPT(s
, nir_lower_flrp
,
147 false /* always_precise */,
148 s
->options
->lower_ffma
)) {
149 OPT(s
, nir_opt_constant_folding
);
153 /* Nothing should rematerialize any flrps, so we only
154 * need to do this lowering once.
159 progress
|= OPT(s
, nir_opt_dead_cf
);
160 if (OPT(s
, nir_opt_trivial_continues
)) {
162 /* If nir_opt_trivial_continues makes progress, then we need to clean
163 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
166 OPT(s
, nir_copy_prop
);
169 progress
|= OPT(s
, nir_opt_if
, false);
170 progress
|= OPT(s
, nir_opt_remove_phis
);
171 progress
|= OPT(s
, nir_opt_undef
);
177 ir3_optimize_nir(struct ir3_shader
*shader
, nir_shader
*s
,
178 const struct ir3_shader_key
*key
)
180 struct nir_lower_tex_options tex_options
= {
182 .lower_tg4_offsets
= true,
186 switch (shader
->type
) {
187 case MESA_SHADER_FRAGMENT
:
188 tex_options
.saturate_s
= key
->fsaturate_s
;
189 tex_options
.saturate_t
= key
->fsaturate_t
;
190 tex_options
.saturate_r
= key
->fsaturate_r
;
192 case MESA_SHADER_VERTEX
:
193 tex_options
.saturate_s
= key
->vsaturate_s
;
194 tex_options
.saturate_t
= key
->vsaturate_t
;
195 tex_options
.saturate_r
= key
->vsaturate_r
;
203 if (shader
->compiler
->gpu_id
>= 400) {
204 /* a4xx seems to have *no* sam.p */
205 tex_options
.lower_txp
= ~0; /* lower all txp */
207 /* a3xx just needs to avoid sam.p for 3d tex */
208 tex_options
.lower_txp
= (1 << GLSL_SAMPLER_DIM_3D
);
211 if (ir3_shader_debug
& IR3_DBG_DISASM
) {
212 debug_printf("----------------------\n");
213 nir_print_shader(s
, stdout
);
214 debug_printf("----------------------\n");
217 OPT_V(s
, nir_lower_regs_to_ssa
);
218 OPT_V(s
, ir3_nir_lower_io_offsets
);
221 if (s
->info
.stage
== MESA_SHADER_VERTEX
) {
222 OPT_V(s
, nir_lower_clip_vs
, key
->ucp_enables
, false);
223 if (key
->vclamp_color
)
224 OPT_V(s
, nir_lower_clamp_color_outputs
);
225 } else if (s
->info
.stage
== MESA_SHADER_FRAGMENT
) {
226 OPT_V(s
, nir_lower_clip_fs
, key
->ucp_enables
);
227 if (key
->fclamp_color
)
228 OPT_V(s
, nir_lower_clamp_color_outputs
);
230 if (key
->color_two_side
) {
231 OPT_V(s
, nir_lower_two_sided_color
);
234 /* only want to do this the first time (when key is null)
235 * and not again on any potential 2nd variant lowering pass:
237 OPT_V(s
, ir3_nir_apply_trig_workarounds
);
239 /* This wouldn't hurt to run multiple times, but there is
242 if (shader
->type
== MESA_SHADER_FRAGMENT
)
243 OPT_V(s
, nir_lower_fb_read
);
246 OPT_V(s
, nir_lower_tex
, &tex_options
);
247 OPT_V(s
, nir_lower_load_const_to_scalar
);
248 if (shader
->compiler
->gpu_id
< 500)
249 OPT_V(s
, ir3_nir_lower_tg4_to_tex
);
251 ir3_optimize_loop(s
);
253 /* do ubo load and idiv lowering after first opt loop to get a chance to
254 * propagate constants for divide by immed power-of-two and constant ubo
257 * NOTE that UBO analysis pass should only be done once, before variants
259 const bool ubo_progress
= !key
&& OPT(s
, ir3_nir_analyze_ubo_ranges
, shader
);
260 const bool idiv_progress
= OPT(s
, nir_lower_idiv
);
261 if (ubo_progress
|| idiv_progress
)
262 ir3_optimize_loop(s
);
264 OPT_V(s
, nir_remove_dead_variables
, nir_var_function_temp
);
266 OPT_V(s
, nir_move_load_const
);
268 if (ir3_shader_debug
& IR3_DBG_DISASM
) {
269 debug_printf("----------------------\n");
270 nir_print_shader(s
, stdout
);
271 debug_printf("----------------------\n");
280 ir3_nir_scan_driver_consts(nir_shader
*shader
,
281 struct ir3_driver_const_layout
*layout
)
283 nir_foreach_function(function
, shader
) {
287 nir_foreach_block(block
, function
->impl
) {
288 nir_foreach_instr(instr
, block
) {
289 if (instr
->type
!= nir_instr_type_intrinsic
)
292 nir_intrinsic_instr
*intr
=
293 nir_instr_as_intrinsic(instr
);
296 switch (intr
->intrinsic
) {
297 case nir_intrinsic_get_buffer_size
:
298 idx
= nir_src_as_uint(intr
->src
[0]);
299 if (layout
->ssbo_size
.mask
& (1 << idx
))
301 layout
->ssbo_size
.mask
|= (1 << idx
);
302 layout
->ssbo_size
.off
[idx
] =
303 layout
->ssbo_size
.count
;
304 layout
->ssbo_size
.count
+= 1; /* one const per */
306 case nir_intrinsic_image_deref_atomic_add
:
307 case nir_intrinsic_image_deref_atomic_min
:
308 case nir_intrinsic_image_deref_atomic_max
:
309 case nir_intrinsic_image_deref_atomic_and
:
310 case nir_intrinsic_image_deref_atomic_or
:
311 case nir_intrinsic_image_deref_atomic_xor
:
312 case nir_intrinsic_image_deref_atomic_exchange
:
313 case nir_intrinsic_image_deref_atomic_comp_swap
:
314 case nir_intrinsic_image_deref_store
:
315 case nir_intrinsic_image_deref_size
:
316 idx
= nir_intrinsic_get_var(intr
, 0)->data
.driver_location
;
317 if (layout
->image_dims
.mask
& (1 << idx
))
319 layout
->image_dims
.mask
|= (1 << idx
);
320 layout
->image_dims
.off
[idx
] =
321 layout
->image_dims
.count
;
322 layout
->image_dims
.count
+= 3; /* three const per */