src/freedreno/vulkan/tu_image.c

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  *
   5  * based in part on anv driver which is:
   6  * Copyright © 2015 Intel Corporation
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  24  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  */
  27
  28 #include "tu_private.h"
  29
  30 #include "util/debug.h"
  31 #include "util/u_atomic.h"
  32 #include "util/format/u_format.h"
  33 #include "vk_format.h"
  34 #include "vk_util.h"
  35 #include "drm-uapi/drm_fourcc.h"
  36
  37 #include "tu_cs.h"
  38
  39 static uint32_t
  40 tu6_plane_count(VkFormat format)
  41 {
  42    switch (format) {
  43    default:
  44       return 1;
  45    case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
  46       return 2;
  47    case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
  48       return 3;
  49    }
  50 }
  51
  52 static VkFormat
  53 tu6_plane_format(VkFormat format, uint32_t plane)
  54 {
  55    switch (format) {
  56    case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
  57       /* note: with UBWC, and Y plane UBWC is different from R8_UNORM */
  58       return plane ? VK_FORMAT_R8G8_UNORM : VK_FORMAT_R8_UNORM;
  59    case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
  60       return VK_FORMAT_R8_UNORM;
  61    default:
  62       return format;
  63    }
  64 }
  65
  66 static uint32_t
  67 tu6_plane_index(VkImageAspectFlags aspect_mask)
  68 {
  69    switch (aspect_mask) {
  70    default:
  71       return 0;
  72    case VK_IMAGE_ASPECT_PLANE_1_BIT:
  73       return 1;
  74    case VK_IMAGE_ASPECT_PLANE_2_BIT:
  75       return 2;
  76    }
  77 }
  78
  79 VkResult
  80 tu_image_create(VkDevice _device,
  81                 const VkImageCreateInfo *pCreateInfo,
  82                 const VkAllocationCallbacks *alloc,
  83                 VkImage *pImage,
  84                 uint64_t modifier,
  85                 const VkSubresourceLayout *plane_layouts)
  86 {
  87    TU_FROM_HANDLE(tu_device, device, _device);
  88    struct tu_image *image = NULL;
  89    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
  90
  91    assert(pCreateInfo->mipLevels > 0);
  92    assert(pCreateInfo->arrayLayers > 0);
  93    assert(pCreateInfo->samples > 0);
  94    assert(pCreateInfo->extent.width > 0);
  95    assert(pCreateInfo->extent.height > 0);
  96    assert(pCreateInfo->extent.depth > 0);
  97
  98    image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
  99                       VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 100    if (!image)
 101       return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
 102
 103    image->type = pCreateInfo->imageType;
 104
 105    image->vk_format = pCreateInfo->format;
 106    image->tiling = pCreateInfo->tiling;
 107    image->usage = pCreateInfo->usage;
 108    image->flags = pCreateInfo->flags;
 109    image->extent = pCreateInfo->extent;
 110    image->level_count = pCreateInfo->mipLevels;
 111    image->layer_count = pCreateInfo->arrayLayers;
 112    image->samples = pCreateInfo->samples;
 113
 114    image->exclusive = pCreateInfo->sharingMode == VK_SHARING_MODE_EXCLUSIVE;
 115    if (pCreateInfo->sharingMode == VK_SHARING_MODE_CONCURRENT) {
 116       for (uint32_t i = 0; i < pCreateInfo->queueFamilyIndexCount; ++i)
 117          if (pCreateInfo->pQueueFamilyIndices[i] ==
 118              VK_QUEUE_FAMILY_EXTERNAL)
 119             image->queue_family_mask |= (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
 120          else
 121             image->queue_family_mask |=
 122                1u << pCreateInfo->pQueueFamilyIndices[i];
 123    }
 124
 125    image->shareable =
 126       vk_find_struct_const(pCreateInfo->pNext,
 127                            EXTERNAL_MEMORY_IMAGE_CREATE_INFO) != NULL;
 128
 129    enum a6xx_tile_mode tile_mode = TILE6_3;
 130    bool ubwc_enabled =
 131       !(device->physical_device->instance->debug_flags & TU_DEBUG_NOUBWC);
 132
 133    /* disable tiling when linear is requested, for YUYV/UYVY, and for mutable
 134     * images. Mutable images can be reinterpreted as any other compatible
 135     * format, including swapped formats which aren't supported with tiling.
 136     * This means that we have to fall back to linear almost always. However
 137     * depth and stencil formats cannot be reintepreted as another format, and
 138     * cannot be linear with sysmem rendering, so don't fall back for those.
 139     *
 140     * TODO: Be smarter and use usage bits and VK_KHR_image_format_list to
 141     * enable tiling and/or UBWC when possible.
 142     */
 143    if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR ||
 144        modifier == DRM_FORMAT_MOD_LINEAR ||
 145        vk_format_description(image->vk_format)->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED ||
 146        (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT &&
 147         !vk_format_is_depth_or_stencil(image->vk_format))) {
 148       tile_mode = TILE6_LINEAR;
 149       ubwc_enabled = false;
 150    }
 151
 152    /* UBWC is supported for these formats, but NV12 has a special UBWC
 153     * format for accessing the Y plane aspect, which isn't implemented
 154     * For IYUV, the blob doesn't use UBWC, but it seems to work, but
 155     * disable it since we don't know if a special UBWC format is needed
 156     * like NV12
 157     */
 158    if (image->vk_format == VK_FORMAT_G8_B8R8_2PLANE_420_UNORM ||
 159        image->vk_format == VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM)
 160       ubwc_enabled = false;
 161
 162    /* don't use UBWC with compressed formats */
 163    if (vk_format_is_compressed(image->vk_format))
 164       ubwc_enabled = false;
 165
 166    /* UBWC can't be used with E5B9G9R9 */
 167    if (image->vk_format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32)
 168       ubwc_enabled = false;
 169
 170    /* separate stencil doesn't have a UBWC enable bit */
 171    if (image->vk_format == VK_FORMAT_S8_UINT)
 172       ubwc_enabled = false;
 173
 174    if (image->extent.depth > 1) {
 175       tu_finishme("UBWC with 3D textures");
 176       ubwc_enabled = false;
 177    }
 178
 179    /* Disable UBWC for storage images.
 180     *
 181     * The closed GL driver skips UBWC for storage images (and additionally
 182     * uses linear for writeonly images).  We seem to have image tiling working
 183     * in freedreno in general, so turnip matches that.  freedreno also enables
 184     * UBWC on images, but it's not really tested due to the lack of
 185     * UBWC-enabled mipmaps in freedreno currently.  Just match the closed GL
 186     * behavior of no UBWC.
 187    */
 188    if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT)
 189       ubwc_enabled = false;
 190
 191    /* expect UBWC enabled if we asked for it */
 192    assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);
 193
 194    for (uint32_t i = 0; i < tu6_plane_count(image->vk_format); i++) {
 195       struct fdl_layout *layout = &image->layout[i];
 196       VkFormat format = tu6_plane_format(image->vk_format, i);
 197       uint32_t width0 = pCreateInfo->extent.width;
 198       uint32_t height0 = pCreateInfo->extent.height;
 199
 200       if (i > 0) {
 201          switch (image->vk_format) {
 202          case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
 203          case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
 204             /* half width/height on chroma planes */
 205             width0 = (width0 + 1) >> 1;
 206             height0 = (height0 + 1) >> 1;
 207             break;
 208          default:
 209             break;
 210          }
 211       }
 212
 213       struct fdl_slice plane_layout;
 214
 215       if (plane_layouts) {
 216          /* only expect simple 2D images for now */
 217          if (pCreateInfo->mipLevels != 1 ||
 218             pCreateInfo->arrayLayers != 1 ||
 219             image->extent.depth != 1)
 220             goto invalid_layout;
 221
 222          plane_layout.offset = plane_layouts[i].offset;
 223          plane_layout.pitch = plane_layouts[i].rowPitch;
 224          /* note: use plane_layouts[0].arrayPitch to support array formats */
 225       }
 226
 227       layout->tile_mode = tile_mode;
 228       layout->ubwc = ubwc_enabled;
 229
 230       if (!fdl6_layout(layout, vk_format_to_pipe_format(format),
 231                        image->samples,
 232                        width0, height0,
 233                        pCreateInfo->extent.depth,
 234                        pCreateInfo->mipLevels,
 235                        pCreateInfo->arrayLayers,
 236                        pCreateInfo->imageType == VK_IMAGE_TYPE_3D,
 237                        plane_layouts ? &plane_layout : NULL)) {
 238          assert(plane_layouts); /* can only fail with explicit layout */
 239          goto invalid_layout;
 240       }
 241
 242       /* fdl6_layout can't take explicit offset without explicit pitch
 243        * add offset manually for extra layouts for planes
 244        */
 245       if (!plane_layouts && i > 0) {
 246          uint32_t offset = ALIGN_POT(image->total_size, 4096);
 247          for (int i = 0; i < pCreateInfo->mipLevels; i++) {
 248             layout->slices[i].offset += offset;
 249             layout->ubwc_slices[i].offset += offset;
 250          }
 251          layout->size += offset;
 252       }
 253
 254       image->total_size = MAX2(image->total_size, layout->size);
 255    }
 256
 257    *pImage = tu_image_to_handle(image);
 258
 259    return VK_SUCCESS;
 260
 261 invalid_layout:
 262    vk_free2(&device->alloc, alloc, image);
 263    return vk_error(device->instance, VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT);
 264 }
 265
 266 static void
 267 compose_swizzle(unsigned char *swiz, const VkComponentMapping *mapping)
 268 {
 269    unsigned char src_swiz[4] = { swiz[0], swiz[1], swiz[2], swiz[3] };
 270    VkComponentSwizzle vk_swiz[4] = {
 271       mapping->r, mapping->g, mapping->b, mapping->a
 272    };
 273    for (int i = 0; i < 4; i++) {
 274       switch (vk_swiz[i]) {
 275       case VK_COMPONENT_SWIZZLE_IDENTITY:
 276          swiz[i] = src_swiz[i];
 277          break;
 278       case VK_COMPONENT_SWIZZLE_R...VK_COMPONENT_SWIZZLE_A:
 279          swiz[i] = src_swiz[vk_swiz[i] - VK_COMPONENT_SWIZZLE_R];
 280          break;
 281       case VK_COMPONENT_SWIZZLE_ZERO:
 282          swiz[i] = A6XX_TEX_ZERO;
 283          break;
 284       case VK_COMPONENT_SWIZZLE_ONE:
 285          swiz[i] = A6XX_TEX_ONE;
 286          break;
 287       default:
 288          unreachable("unexpected swizzle");
 289       }
 290    }
 291 }
 292
 293 static uint32_t
 294 tu6_texswiz(const VkComponentMapping *comps,
 295             const struct tu_sampler_ycbcr_conversion *conversion,
 296             VkFormat format,
 297             VkImageAspectFlagBits aspect_mask)
 298 {
 299    unsigned char swiz[4] = {
 300       A6XX_TEX_X, A6XX_TEX_Y, A6XX_TEX_Z, A6XX_TEX_W,
 301    };
 302
 303    switch (format) {
 304    case VK_FORMAT_G8B8G8R8_422_UNORM:
 305    case VK_FORMAT_B8G8R8G8_422_UNORM:
 306    case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
 307    case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
 308       swiz[0] = A6XX_TEX_Z;
 309       swiz[1] = A6XX_TEX_X;
 310       swiz[2] = A6XX_TEX_Y;
 311       break;
 312    case VK_FORMAT_BC1_RGB_UNORM_BLOCK:
 313    case VK_FORMAT_BC1_RGB_SRGB_BLOCK:
 314       /* same hardware format is used for BC1_RGB / BC1_RGBA */
 315       swiz[3] = A6XX_TEX_ONE;
 316       break;
 317    case VK_FORMAT_D24_UNORM_S8_UINT:
 318       /* for D24S8, stencil is in the 2nd channel of the hardware format */
 319       if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
 320          swiz[0] = A6XX_TEX_Y;
 321          swiz[1] = A6XX_TEX_ZERO;
 322       }
 323    default:
 324       break;
 325    }
 326
 327    compose_swizzle(swiz, comps);
 328    if (conversion)
 329       compose_swizzle(swiz, &conversion->components);
 330
 331    return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |
 332           A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |
 333           A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |
 334           A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);
 335 }
 336
 337 void
 338 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
 339 {
 340    tu_cs_emit(cs, iview->PITCH);
 341    tu_cs_emit(cs, iview->layer_size >> 6);
 342    tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
 343 }
 344
 345 void
 346 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)
 347 {
 348    tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
 349    /* SP_PS_2D_SRC_PITCH has shifted pitch field */
 350    tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));
 351 }
 352
 353 void
 354 tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
 355 {
 356    tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);
 357    tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);
 358 }
 359
 360 void
 361 tu_image_view_init(struct tu_image_view *iview,
 362                    const VkImageViewCreateInfo *pCreateInfo)
 363 {
 364    TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);
 365    const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
 366    VkFormat format = pCreateInfo->format;
 367    VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;
 368
 369    const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion =
 370       vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
 371    const struct tu_sampler_ycbcr_conversion *conversion = ycbcr_conversion ?
 372       tu_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion) : NULL;
 373
 374    switch (image->type) {
 375    case VK_IMAGE_TYPE_1D:
 376    case VK_IMAGE_TYPE_2D:
 377       assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
 378              image->layer_count);
 379       break;
 380    case VK_IMAGE_TYPE_3D:
 381       assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
 382              tu_minify(image->extent.depth, range->baseMipLevel));
 383       break;
 384    default:
 385       unreachable("bad VkImageType");
 386    }
 387
 388    iview->image = image;
 389
 390    memset(iview->descriptor, 0, sizeof(iview->descriptor));
 391
 392    struct fdl_layout *layout = &image->layout[tu6_plane_index(aspect_mask)];
 393
 394    uint32_t width = u_minify(layout->width0, range->baseMipLevel);
 395    uint32_t height = u_minify(layout->height0, range->baseMipLevel);
 396    uint32_t storage_depth = tu_get_layerCount(image, range);
 397    if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
 398       storage_depth = u_minify(image->extent.depth, range->baseMipLevel);
 399    }
 400
 401    uint32_t depth = storage_depth;
 402    if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
 403        pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
 404       /* Cubes are treated as 2D arrays for storage images, so only divide the
 405        * depth by 6 for the texture descriptor.
 406        */
 407       depth /= 6;
 408    }
 409
 410    uint64_t base_addr = image->bo->iova + image->bo_offset +
 411       fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
 412    uint64_t ubwc_addr = image->bo->iova + image->bo_offset +
 413       fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);
 414
 415    uint32_t pitch = layout->slices[range->baseMipLevel].pitch;
 416    uint32_t ubwc_pitch = layout->ubwc_slices[range->baseMipLevel].pitch;
 417    uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);
 418
 419    struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);
 420    /* note: freedreno layout assumes no TILE_ALL bit for non-UBWC
 421     * this means smaller mipmap levels have a linear tile mode
 422     */
 423    fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);
 424
 425    bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);
 426
 427    unsigned fmt_tex = fmt.fmt;
 428    if (fmt_tex == FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8) {
 429       if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
 430          fmt_tex = FMT6_Z24_UNORM_S8_UINT;
 431       if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
 432          fmt_tex = FMT6_S8Z24_UINT;
 433       /* TODO: also use this format with storage descriptor ? */
 434    }
 435
 436    iview->descriptor[0] =
 437       A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |
 438       COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |
 439       A6XX_TEX_CONST_0_FMT(fmt_tex) |
 440       A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(image->samples)) |
 441       A6XX_TEX_CONST_0_SWAP(fmt.swap) |
 442       tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask) |
 443       A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);
 444    iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);
 445    iview->descriptor[2] =
 446       A6XX_TEX_CONST_2_PITCHALIGN(layout->pitchalign) |
 447       A6XX_TEX_CONST_2_PITCH(pitch) |
 448       A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false));
 449    iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);
 450    iview->descriptor[4] = base_addr;
 451    iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);
 452
 453    if (format == VK_FORMAT_G8_B8R8_2PLANE_420_UNORM ||
 454        format == VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM) {
 455       /* chroma offset re-uses MIPLVLS bits */
 456       assert(tu_get_levelCount(image, range) == 1);
 457       if (conversion) {
 458          if (conversion->chroma_offsets[0] == VK_CHROMA_LOCATION_MIDPOINT)
 459             iview->descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_X;
 460          if (conversion->chroma_offsets[1] == VK_CHROMA_LOCATION_MIDPOINT)
 461             iview->descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_Y;
 462       }
 463
 464       uint64_t base_addr[3];
 465
 466       iview->descriptor[3] |= A6XX_TEX_CONST_3_TILE_ALL;
 467       if (ubwc_enabled) {
 468          iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG;
 469          /* no separate ubwc base, image must have the expected layout */
 470          for (uint32_t i = 0; i < 3; i++) {
 471             base_addr[i] = image->bo->iova + image->bo_offset +
 472                fdl_ubwc_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer);
 473          }
 474       } else {
 475          for (uint32_t i = 0; i < 3; i++) {
 476             base_addr[i] = image->bo->iova + image->bo_offset +
 477                fdl_surface_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer);
 478          }
 479       }
 480
 481       iview->descriptor[4] = base_addr[0];
 482       iview->descriptor[5] |= base_addr[0] >> 32;
 483       iview->descriptor[6] =
 484          A6XX_TEX_CONST_6_PLANE_PITCH(image->layout[1].slices[range->baseMipLevel].pitch);
 485       iview->descriptor[7] = base_addr[1];
 486       iview->descriptor[8] = base_addr[1] >> 32;
 487       iview->descriptor[9] = base_addr[2];
 488       iview->descriptor[10] = base_addr[2] >> 32;
 489
 490       assert(pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_3D);
 491       assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
 492       return;
 493    }
 494
 495    if (ubwc_enabled) {
 496       uint32_t block_width, block_height;
 497       fdl6_get_ubwc_blockwidth(layout, &block_width, &block_height);
 498
 499       iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
 500       iview->descriptor[7] = ubwc_addr;
 501       iview->descriptor[8] = ubwc_addr >> 32;
 502       iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
 503       iview->descriptor[10] |=
 504          A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |
 505          A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |
 506          A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));
 507    }
 508
 509    if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
 510       iview->descriptor[3] |=
 511          A6XX_TEX_CONST_3_MIN_LAYERSZ(layout->slices[image->level_count - 1].size0);
 512    }
 513
 514    iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(
 515       .color_format = fmt.fmt,
 516       .tile_mode = fmt.tile_mode,
 517       .color_swap = fmt.swap,
 518       .flags = ubwc_enabled,
 519       .srgb = vk_format_is_srgb(format),
 520       .samples = tu_msaa_samples(image->samples),
 521       .samples_average = image->samples > 1 &&
 522                            !vk_format_is_int(format) &&
 523                            !vk_format_is_depth_or_stencil(format),
 524       .unk20 = 1,
 525       .unk22 = 1).value;
 526    iview->SP_PS_2D_SRC_SIZE =
 527       A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;
 528
 529    /* note: these have same encoding for MRT and 2D (except 2D PITCH src) */
 530    iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;
 531    iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(
 532       .pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;
 533
 534    iview->base_addr = base_addr;
 535    iview->ubwc_addr = ubwc_addr;
 536    iview->layer_size = layer_size;
 537    iview->ubwc_layer_size = layout->ubwc_layer_size;
 538
 539    /* Don't set fields that are only used for attachments/blit dest if COLOR
 540     * is unsupported.
 541     */
 542    if (!(fmt.supported & FMT_COLOR))
 543       return;
 544
 545    struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);
 546    cfmt.tile_mode = fmt.tile_mode;
 547
 548    if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
 549       memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));
 550
 551       iview->storage_descriptor[0] =
 552          A6XX_IBO_0_FMT(fmt.fmt) |
 553          A6XX_IBO_0_TILE_MODE(fmt.tile_mode);
 554       iview->storage_descriptor[1] =
 555          A6XX_IBO_1_WIDTH(width) |
 556          A6XX_IBO_1_HEIGHT(height);
 557       iview->storage_descriptor[2] =
 558          A6XX_IBO_2_PITCH(pitch) |
 559          A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true));
 560       iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);
 561
 562       iview->storage_descriptor[4] = base_addr;
 563       iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth);
 564
 565       if (ubwc_enabled) {
 566          iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;
 567          iview->storage_descriptor[7] |= ubwc_addr;
 568          iview->storage_descriptor[8] |= ubwc_addr >> 32;
 569          iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
 570          iview->storage_descriptor[10] =
 571             A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);
 572       }
 573    }
 574
 575    iview->extent.width = width;
 576    iview->extent.height = height;
 577    iview->need_y2_align =
 578       (fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);
 579
 580    iview->ubwc_enabled = ubwc_enabled;
 581
 582    iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,
 583                               .color_tile_mode = cfmt.tile_mode,
 584                               .color_format = cfmt.fmt,
 585                               .color_swap = cfmt.swap).value;
 586    iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,
 587                               .color_format = cfmt.fmt,
 588                               .color_sint = vk_format_is_sint(format),
 589                               .color_uint = vk_format_is_uint(format)).value;
 590
 591    iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(
 592       .color_format = cfmt.fmt,
 593       .tile_mode = cfmt.tile_mode,
 594       .color_swap = cfmt.swap,
 595       .flags = ubwc_enabled,
 596       .srgb = vk_format_is_srgb(format)).value;
 597
 598    iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(
 599       .tile_mode = cfmt.tile_mode,
 600       .samples = tu_msaa_samples(iview->image->samples),
 601       .color_format = cfmt.fmt,
 602       .color_swap = cfmt.swap,
 603       .flags = ubwc_enabled).value;
 604 }
 605
 606 VkResult
 607 tu_CreateImage(VkDevice device,
 608                const VkImageCreateInfo *pCreateInfo,
 609                const VkAllocationCallbacks *pAllocator,
 610                VkImage *pImage)
 611 {
 612 #ifdef ANDROID
 613    const VkNativeBufferANDROID *gralloc_info =
 614       vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
 615
 616    if (gralloc_info)
 617       return tu_image_from_gralloc(device, pCreateInfo, gralloc_info,
 618                                    pAllocator, pImage);
 619 #endif
 620
 621    uint64_t modifier = DRM_FORMAT_MOD_INVALID;
 622    const VkSubresourceLayout *plane_layouts = NULL;
 623
 624    if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
 625       const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
 626          vk_find_struct_const(pCreateInfo->pNext,
 627                               IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
 628       const VkImageDrmFormatModifierExplicitCreateInfoEXT *drm_explicit_info =
 629          vk_find_struct_const(pCreateInfo->pNext,
 630                               IMAGE_DRM_FORMAT_MODIFIER_EXPLICIT_CREATE_INFO_EXT);
 631
 632       assert(mod_info || drm_explicit_info);
 633
 634       if (mod_info) {
 635          modifier = DRM_FORMAT_MOD_LINEAR;
 636          for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {
 637             if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)
 638                modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
 639          }
 640       } else {
 641          modifier = drm_explicit_info->drmFormatModifier;
 642          assert(modifier == DRM_FORMAT_MOD_LINEAR ||
 643                 modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED);
 644          plane_layouts = drm_explicit_info->pPlaneLayouts;
 645       }
 646    } else {
 647       const struct wsi_image_create_info *wsi_info =
 648          vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
 649       if (wsi_info && wsi_info->scanout)
 650          modifier = DRM_FORMAT_MOD_LINEAR;
 651    }
 652
 653    return tu_image_create(device, pCreateInfo, pAllocator, pImage, modifier, plane_layouts);
 654 }
 655
 656 void
 657 tu_DestroyImage(VkDevice _device,
 658                 VkImage _image,
 659                 const VkAllocationCallbacks *pAllocator)
 660 {
 661    TU_FROM_HANDLE(tu_device, device, _device);
 662    TU_FROM_HANDLE(tu_image, image, _image);
 663
 664    if (!image)
 665       return;
 666
 667    if (image->owned_memory != VK_NULL_HANDLE)
 668       tu_FreeMemory(_device, image->owned_memory, pAllocator);
 669
 670    vk_free2(&device->alloc, pAllocator, image);
 671 }
 672
 673 void
 674 tu_GetImageSubresourceLayout(VkDevice _device,
 675                              VkImage _image,
 676                              const VkImageSubresource *pSubresource,
 677                              VkSubresourceLayout *pLayout)
 678 {
 679    TU_FROM_HANDLE(tu_image, image, _image);
 680
 681    struct fdl_layout *layout =
 682       &image->layout[tu6_plane_index(pSubresource->aspectMask)];
 683    const struct fdl_slice *slice = layout->slices + pSubresource->mipLevel;
 684
 685    pLayout->offset =
 686       fdl_surface_offset(layout, pSubresource->mipLevel, pSubresource->arrayLayer);
 687    pLayout->size = slice->size0;
 688    pLayout->rowPitch = slice->pitch;
 689    pLayout->arrayPitch = fdl_layer_stride(layout, pSubresource->mipLevel);
 690    pLayout->depthPitch = slice->size0;
 691
 692    if (fdl_ubwc_enabled(layout, pSubresource->mipLevel)) {
 693       /* UBWC starts at offset 0 */
 694       pLayout->offset = 0;
 695       /* UBWC scanout won't match what the kernel wants if we have levels/layers */
 696       assert(image->level_count == 1 && image->layer_count == 1);
 697    }
 698 }
 699
 700 VkResult tu_GetImageDrmFormatModifierPropertiesEXT(
 701     VkDevice                                    device,
 702     VkImage                                     _image,
 703     VkImageDrmFormatModifierPropertiesEXT*      pProperties)
 704 {
 705    TU_FROM_HANDLE(tu_image, image, _image);
 706
 707    assert(pProperties->sType ==
 708           VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
 709
 710    /* TODO invent a modifier for tiled but not UBWC buffers */
 711
 712    if (!image->layout[0].tile_mode)
 713       pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
 714    else if (image->layout[0].ubwc_layer_size)
 715       pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
 716    else
 717       pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;
 718
 719    return VK_SUCCESS;
 720 }
 721
 722
 723 VkResult
 724 tu_CreateImageView(VkDevice _device,
 725                    const VkImageViewCreateInfo *pCreateInfo,
 726                    const VkAllocationCallbacks *pAllocator,
 727                    VkImageView *pView)
 728 {
 729    TU_FROM_HANDLE(tu_device, device, _device);
 730    struct tu_image_view *view;
 731
 732    view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
 733                     VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 734    if (view == NULL)
 735       return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
 736
 737    tu_image_view_init(view, pCreateInfo);
 738
 739    *pView = tu_image_view_to_handle(view);
 740
 741    return VK_SUCCESS;
 742 }
 743
 744 void
 745 tu_DestroyImageView(VkDevice _device,
 746                     VkImageView _iview,
 747                     const VkAllocationCallbacks *pAllocator)
 748 {
 749    TU_FROM_HANDLE(tu_device, device, _device);
 750    TU_FROM_HANDLE(tu_image_view, iview, _iview);
 751
 752    if (!iview)
 753       return;
 754    vk_free2(&device->alloc, pAllocator, iview);
 755 }
 756
 757 void
 758 tu_buffer_view_init(struct tu_buffer_view *view,
 759                     struct tu_device *device,
 760                     const VkBufferViewCreateInfo *pCreateInfo)
 761 {
 762    TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);
 763
 764    view->buffer = buffer;
 765
 766    enum VkFormat vfmt = pCreateInfo->format;
 767    enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);
 768    const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);
 769
 770    uint32_t range;
 771    if (pCreateInfo->range == VK_WHOLE_SIZE)
 772       range = buffer->size - pCreateInfo->offset;
 773    else
 774       range = pCreateInfo->range;
 775    uint32_t elements = range / util_format_get_blocksize(pfmt);
 776
 777    static const VkComponentMapping components = {
 778       .r = VK_COMPONENT_SWIZZLE_R,
 779       .g = VK_COMPONENT_SWIZZLE_G,
 780       .b = VK_COMPONENT_SWIZZLE_B,
 781       .a = VK_COMPONENT_SWIZZLE_A,
 782    };
 783
 784    uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;
 785
 786    memset(&view->descriptor, 0, sizeof(view->descriptor));
 787
 788    view->descriptor[0] =
 789       A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |
 790       A6XX_TEX_CONST_0_SWAP(fmt.swap) |
 791       A6XX_TEX_CONST_0_FMT(fmt.fmt) |
 792       A6XX_TEX_CONST_0_MIPLVLS(0) |
 793       tu6_texswiz(&components, NULL, vfmt, VK_IMAGE_ASPECT_COLOR_BIT);
 794       COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);
 795    view->descriptor[1] =
 796       A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
 797       A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
 798    view->descriptor[2] =
 799       A6XX_TEX_CONST_2_UNK4 |
 800       A6XX_TEX_CONST_2_UNK31;
 801    view->descriptor[4] = iova;
 802    view->descriptor[5] = iova >> 32;
 803 }
 804
 805 VkResult
 806 tu_CreateBufferView(VkDevice _device,
 807                     const VkBufferViewCreateInfo *pCreateInfo,
 808                     const VkAllocationCallbacks *pAllocator,
 809                     VkBufferView *pView)
 810 {
 811    TU_FROM_HANDLE(tu_device, device, _device);
 812    struct tu_buffer_view *view;
 813
 814    view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
 815                     VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 816    if (!view)
 817       return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
 818
 819    tu_buffer_view_init(view, device, pCreateInfo);
 820
 821    *pView = tu_buffer_view_to_handle(view);
 822
 823    return VK_SUCCESS;
 824 }
 825
 826 void
 827 tu_DestroyBufferView(VkDevice _device,
 828                      VkBufferView bufferView,
 829                      const VkAllocationCallbacks *pAllocator)
 830 {
 831    TU_FROM_HANDLE(tu_device, device, _device);
 832    TU_FROM_HANDLE(tu_buffer_view, view, bufferView);
 833
 834    if (!view)
 835       return;
 836
 837    vk_free2(&device->alloc, pAllocator, view);
 838 }