de8b6dc3f0d146a11606a64e385da700d5aacf58
[mesa.git] / src / freedreno / vulkan / tu_image.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #include "tu_private.h"
29
30 #include "util/debug.h"
31 #include "util/u_atomic.h"
32 #include "util/format/u_format.h"
33 #include "vk_format.h"
34 #include "vk_util.h"
35 #include "drm-uapi/drm_fourcc.h"
36
37 #include "tu_cs.h"
38
39 VkResult
40 tu_image_create(VkDevice _device,
41 const VkImageCreateInfo *pCreateInfo,
42 const VkAllocationCallbacks *alloc,
43 VkImage *pImage,
44 uint64_t modifier)
45 {
46 TU_FROM_HANDLE(tu_device, device, _device);
47 struct tu_image *image = NULL;
48 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
49
50 tu_assert(pCreateInfo->mipLevels > 0);
51 tu_assert(pCreateInfo->arrayLayers > 0);
52 tu_assert(pCreateInfo->samples > 0);
53 tu_assert(pCreateInfo->extent.width > 0);
54 tu_assert(pCreateInfo->extent.height > 0);
55 tu_assert(pCreateInfo->extent.depth > 0);
56
57 image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
58 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
59 if (!image)
60 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
61
62 image->type = pCreateInfo->imageType;
63
64 image->vk_format = pCreateInfo->format;
65 image->tiling = pCreateInfo->tiling;
66 image->usage = pCreateInfo->usage;
67 image->flags = pCreateInfo->flags;
68 image->extent = pCreateInfo->extent;
69 image->level_count = pCreateInfo->mipLevels;
70 image->layer_count = pCreateInfo->arrayLayers;
71 image->samples = pCreateInfo->samples;
72
73 image->exclusive = pCreateInfo->sharingMode == VK_SHARING_MODE_EXCLUSIVE;
74 if (pCreateInfo->sharingMode == VK_SHARING_MODE_CONCURRENT) {
75 for (uint32_t i = 0; i < pCreateInfo->queueFamilyIndexCount; ++i)
76 if (pCreateInfo->pQueueFamilyIndices[i] ==
77 VK_QUEUE_FAMILY_EXTERNAL)
78 image->queue_family_mask |= (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
79 else
80 image->queue_family_mask |=
81 1u << pCreateInfo->pQueueFamilyIndices[i];
82 }
83
84 image->shareable =
85 vk_find_struct_const(pCreateInfo->pNext,
86 EXTERNAL_MEMORY_IMAGE_CREATE_INFO) != NULL;
87
88 image->layout.tile_mode = TILE6_3;
89 bool ubwc_enabled =
90 !(device->physical_device->instance->debug_flags & TU_DEBUG_NOUBWC);
91
92 /* disable tiling when linear is requested, for YUYV/UYVY, and for mutable
93 * images. Mutable images can be reinterpreted as any other compatible
94 * format, including swapped formats which aren't supported with tiling.
95 * This means that we have to fall back to linear almost always. However
96 * depth and stencil formats cannot be reintepreted as another format, and
97 * cannot be linear with sysmem rendering, so don't fall back for those.
98 *
99 * TODO: Be smarter and use usage bits and VK_KHR_image_format_list to
100 * enable tiling and/or UBWC when possible.
101 */
102 if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR ||
103 modifier == DRM_FORMAT_MOD_LINEAR ||
104 vk_format_description(image->vk_format)->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED ||
105 (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT &&
106 !vk_format_is_depth_or_stencil(image->vk_format))) {
107 image->layout.tile_mode = TILE6_LINEAR;
108 ubwc_enabled = false;
109 }
110
111 /* don't use UBWC with compressed formats */
112 if (vk_format_is_compressed(image->vk_format))
113 ubwc_enabled = false;
114
115 /* UBWC can't be used with E5B9G9R9 */
116 if (image->vk_format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32)
117 ubwc_enabled = false;
118
119 /* separate stencil doesn't have a UBWC enable bit */
120 if (image->vk_format == VK_FORMAT_S8_UINT)
121 ubwc_enabled = false;
122
123 if (image->extent.depth > 1) {
124 tu_finishme("UBWC with 3D textures");
125 ubwc_enabled = false;
126 }
127
128 /* Disable UBWC for storage images.
129 *
130 * The closed GL driver skips UBWC for storage images (and additionally
131 * uses linear for writeonly images). We seem to have image tiling working
132 * in freedreno in general, so turnip matches that. freedreno also enables
133 * UBWC on images, but it's not really tested due to the lack of
134 * UBWC-enabled mipmaps in freedreno currently. Just match the closed GL
135 * behavior of no UBWC.
136 */
137 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT)
138 ubwc_enabled = false;
139
140 uint32_t ubwc_blockwidth, ubwc_blockheight;
141 fdl6_get_ubwc_blockwidth(&image->layout,
142 &ubwc_blockwidth, &ubwc_blockheight);
143 if (!ubwc_blockwidth) {
144 tu_finishme("UBWC for cpp=%d", image->layout.cpp);
145 ubwc_enabled = false;
146 }
147
148 /* expect UBWC enabled if we asked for it */
149 assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);
150
151 image->layout.ubwc = ubwc_enabled;
152
153 fdl6_layout(&image->layout, vk_format_to_pipe_format(image->vk_format),
154 image->samples,
155 pCreateInfo->extent.width,
156 pCreateInfo->extent.height,
157 pCreateInfo->extent.depth,
158 pCreateInfo->mipLevels,
159 pCreateInfo->arrayLayers,
160 pCreateInfo->imageType == VK_IMAGE_TYPE_3D);
161
162 *pImage = tu_image_to_handle(image);
163
164 return VK_SUCCESS;
165 }
166
167 enum a6xx_tex_fetchsize
168 tu6_fetchsize(VkFormat format)
169 {
170 switch (vk_format_get_blocksize(format)) {
171 case 1: return TFETCH6_1_BYTE;
172 case 2: return TFETCH6_2_BYTE;
173 case 4: return TFETCH6_4_BYTE;
174 case 8: return TFETCH6_8_BYTE;
175 case 16: return TFETCH6_16_BYTE;
176 default:
177 unreachable("bad block size");
178 }
179 }
180
181 static void
182 compose_swizzle(unsigned char *swiz, const VkComponentMapping *mapping)
183 {
184 unsigned char src_swiz[4] = { swiz[0], swiz[1], swiz[2], swiz[3] };
185 VkComponentSwizzle vk_swiz[4] = {
186 mapping->r, mapping->g, mapping->b, mapping->a
187 };
188 for (int i = 0; i < 4; i++) {
189 switch (vk_swiz[i]) {
190 case VK_COMPONENT_SWIZZLE_IDENTITY:
191 swiz[i] = src_swiz[i];
192 break;
193 case VK_COMPONENT_SWIZZLE_R...VK_COMPONENT_SWIZZLE_A:
194 swiz[i] = src_swiz[vk_swiz[i] - VK_COMPONENT_SWIZZLE_R];
195 break;
196 case VK_COMPONENT_SWIZZLE_ZERO:
197 swiz[i] = A6XX_TEX_ZERO;
198 break;
199 case VK_COMPONENT_SWIZZLE_ONE:
200 swiz[i] = A6XX_TEX_ONE;
201 break;
202 default:
203 unreachable("unexpected swizzle");
204 }
205 }
206 }
207
208 static uint32_t
209 tu6_texswiz(const VkComponentMapping *comps,
210 const struct tu_sampler_ycbcr_conversion *conversion,
211 VkFormat format,
212 VkImageAspectFlagBits aspect_mask)
213 {
214 unsigned char swiz[4] = {
215 A6XX_TEX_X, A6XX_TEX_Y, A6XX_TEX_Z, A6XX_TEX_W,
216 };
217
218 switch (format) {
219 case VK_FORMAT_G8B8G8R8_422_UNORM:
220 case VK_FORMAT_B8G8R8G8_422_UNORM:
221 swiz[0] = A6XX_TEX_Z;
222 swiz[1] = A6XX_TEX_X;
223 swiz[2] = A6XX_TEX_Y;
224 break;
225 case VK_FORMAT_BC1_RGB_UNORM_BLOCK:
226 case VK_FORMAT_BC1_RGB_SRGB_BLOCK:
227 /* same hardware format is used for BC1_RGB / BC1_RGBA */
228 swiz[3] = A6XX_TEX_ONE;
229 break;
230 case VK_FORMAT_D24_UNORM_S8_UINT:
231 /* for D24S8, stencil is in the 2nd channel of the hardware format */
232 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
233 swiz[0] = A6XX_TEX_Y;
234 swiz[1] = A6XX_TEX_ZERO;
235 }
236 default:
237 break;
238 }
239
240 compose_swizzle(swiz, comps);
241 if (conversion)
242 compose_swizzle(swiz, &conversion->components);
243
244 return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |
245 A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |
246 A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |
247 A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);
248 }
249
250 static enum a6xx_tex_type
251 tu6_tex_type(VkImageViewType type, bool storage)
252 {
253 switch (type) {
254 default:
255 case VK_IMAGE_VIEW_TYPE_1D:
256 case VK_IMAGE_VIEW_TYPE_1D_ARRAY:
257 return A6XX_TEX_1D;
258 case VK_IMAGE_VIEW_TYPE_2D:
259 case VK_IMAGE_VIEW_TYPE_2D_ARRAY:
260 return A6XX_TEX_2D;
261 case VK_IMAGE_VIEW_TYPE_3D:
262 return A6XX_TEX_3D;
263 case VK_IMAGE_VIEW_TYPE_CUBE:
264 case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
265 return storage ? A6XX_TEX_2D : A6XX_TEX_CUBE;
266 }
267 }
268
269 void
270 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
271 {
272 tu_cs_emit(cs, iview->PITCH);
273 tu_cs_emit(cs, iview->layer_size >> 6);
274 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
275 }
276
277 void
278 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)
279 {
280 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
281 /* SP_PS_2D_SRC_PITCH has shifted pitch field */
282 tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));
283 }
284
285 void
286 tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
287 {
288 tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);
289 tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);
290 }
291
292 void
293 tu_image_view_init(struct tu_image_view *iview,
294 const VkImageViewCreateInfo *pCreateInfo)
295 {
296 TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);
297 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
298 VkFormat format = pCreateInfo->format;
299 VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;
300
301 const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion =
302 vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
303 const struct tu_sampler_ycbcr_conversion *conversion = ycbcr_conversion ?
304 tu_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion) : NULL;
305
306 switch (image->type) {
307 case VK_IMAGE_TYPE_1D:
308 case VK_IMAGE_TYPE_2D:
309 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
310 image->layer_count);
311 break;
312 case VK_IMAGE_TYPE_3D:
313 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
314 tu_minify(image->extent.depth, range->baseMipLevel));
315 break;
316 default:
317 unreachable("bad VkImageType");
318 }
319
320 iview->image = image;
321
322 memset(iview->descriptor, 0, sizeof(iview->descriptor));
323
324 struct fdl_layout *layout = &image->layout;
325
326 uint32_t width = u_minify(image->extent.width, range->baseMipLevel);
327 uint32_t height = u_minify(image->extent.height, range->baseMipLevel);
328 uint32_t storage_depth = tu_get_layerCount(image, range);
329 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
330 storage_depth = u_minify(image->extent.depth, range->baseMipLevel);
331 }
332
333 uint32_t depth = storage_depth;
334 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
335 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
336 /* Cubes are treated as 2D arrays for storage images, so only divide the
337 * depth by 6 for the texture descriptor.
338 */
339 depth /= 6;
340 }
341
342 uint64_t base_addr = image->bo->iova + image->bo_offset +
343 fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
344 uint64_t ubwc_addr = image->bo->iova + image->bo_offset +
345 fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);
346
347 uint32_t pitch = layout->slices[range->baseMipLevel].pitch;
348 uint32_t ubwc_pitch = layout->ubwc_slices[range->baseMipLevel].pitch;
349 uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);
350
351 struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);
352 /* note: freedreno layout assumes no TILE_ALL bit for non-UBWC
353 * this means smaller mipmap levels have a linear tile mode
354 */
355 fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);
356
357 bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);
358
359 unsigned fmt_tex = fmt.fmt;
360 if (fmt_tex == FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8) {
361 if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
362 fmt_tex = FMT6_Z24_UNORM_S8_UINT;
363 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
364 fmt_tex = FMT6_S8Z24_UINT;
365 /* TODO: also use this format with storage descriptor ? */
366 }
367
368 iview->descriptor[0] =
369 A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |
370 COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |
371 A6XX_TEX_CONST_0_FMT(fmt_tex) |
372 A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(image->samples)) |
373 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
374 tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask) |
375 A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);
376 iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);
377 iview->descriptor[2] =
378 A6XX_TEX_CONST_2_FETCHSIZE(tu6_fetchsize(format)) |
379 A6XX_TEX_CONST_2_PITCH(pitch) |
380 A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false));
381 iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);
382 iview->descriptor[4] = base_addr;
383 iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);
384
385 if (ubwc_enabled) {
386 uint32_t block_width, block_height;
387 fdl6_get_ubwc_blockwidth(&image->layout,
388 &block_width, &block_height);
389
390 iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
391 iview->descriptor[7] = ubwc_addr;
392 iview->descriptor[8] = ubwc_addr >> 32;
393 iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
394 iview->descriptor[10] |=
395 A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |
396 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |
397 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));
398 }
399
400 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
401 iview->descriptor[3] |=
402 A6XX_TEX_CONST_3_MIN_LAYERSZ(image->layout.slices[image->level_count - 1].size0);
403 }
404
405 iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(
406 .color_format = fmt.fmt,
407 .tile_mode = fmt.tile_mode,
408 .color_swap = fmt.swap,
409 .flags = ubwc_enabled,
410 .srgb = vk_format_is_srgb(format),
411 .samples = tu_msaa_samples(image->samples),
412 .samples_average = image->samples > 1 &&
413 !vk_format_is_int(format) &&
414 !vk_format_is_depth_or_stencil(format),
415 .unk20 = 1,
416 .unk22 = 1).value;
417 iview->SP_PS_2D_SRC_SIZE =
418 A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;
419
420 /* note: these have same encoding for MRT and 2D (except 2D PITCH src) */
421 iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;
422 iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(
423 .pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;
424
425 iview->base_addr = base_addr;
426 iview->ubwc_addr = ubwc_addr;
427 iview->layer_size = layer_size;
428 iview->ubwc_layer_size = layout->ubwc_layer_size;
429
430 /* Don't set fields that are only used for attachments/blit dest if COLOR
431 * is unsupported.
432 */
433 if (!(fmt.supported & FMT_COLOR))
434 return;
435
436 struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);
437 cfmt.tile_mode = fmt.tile_mode;
438
439 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
440 memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));
441
442 iview->storage_descriptor[0] =
443 A6XX_IBO_0_FMT(fmt.fmt) |
444 A6XX_IBO_0_TILE_MODE(fmt.tile_mode);
445 iview->storage_descriptor[1] =
446 A6XX_IBO_1_WIDTH(width) |
447 A6XX_IBO_1_HEIGHT(height);
448 iview->storage_descriptor[2] =
449 A6XX_IBO_2_PITCH(pitch) |
450 A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true));
451 iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);
452
453 iview->storage_descriptor[4] = base_addr;
454 iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth);
455
456 if (ubwc_enabled) {
457 iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;
458 iview->storage_descriptor[7] |= ubwc_addr;
459 iview->storage_descriptor[8] |= ubwc_addr >> 32;
460 iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
461 iview->storage_descriptor[10] =
462 A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);
463 }
464 }
465
466 iview->extent.width = width;
467 iview->extent.height = height;
468 iview->need_y2_align =
469 (fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);
470
471 iview->ubwc_enabled = ubwc_enabled;
472
473 iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,
474 .color_tile_mode = cfmt.tile_mode,
475 .color_format = cfmt.fmt,
476 .color_swap = cfmt.swap).value;
477 iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,
478 .color_format = cfmt.fmt,
479 .color_sint = vk_format_is_sint(format),
480 .color_uint = vk_format_is_uint(format)).value;
481
482 iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(
483 .color_format = cfmt.fmt,
484 .tile_mode = cfmt.tile_mode,
485 .color_swap = cfmt.swap,
486 .flags = ubwc_enabled,
487 .srgb = vk_format_is_srgb(format)).value;
488
489 iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(
490 .tile_mode = cfmt.tile_mode,
491 .samples = tu_msaa_samples(iview->image->samples),
492 .color_format = cfmt.fmt,
493 .color_swap = cfmt.swap,
494 .flags = ubwc_enabled).value;
495 }
496
497 unsigned
498 tu_image_queue_family_mask(const struct tu_image *image,
499 uint32_t family,
500 uint32_t queue_family)
501 {
502 if (!image->exclusive)
503 return image->queue_family_mask;
504 if (family == VK_QUEUE_FAMILY_EXTERNAL)
505 return (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
506 if (family == VK_QUEUE_FAMILY_IGNORED)
507 return 1u << queue_family;
508 return 1u << family;
509 }
510
511 VkResult
512 tu_CreateImage(VkDevice device,
513 const VkImageCreateInfo *pCreateInfo,
514 const VkAllocationCallbacks *pAllocator,
515 VkImage *pImage)
516 {
517 #ifdef ANDROID
518 const VkNativeBufferANDROID *gralloc_info =
519 vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
520
521 if (gralloc_info)
522 return tu_image_from_gralloc(device, pCreateInfo, gralloc_info,
523 pAllocator, pImage);
524 #endif
525
526 uint64_t modifier = DRM_FORMAT_MOD_INVALID;
527 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
528 const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
529 vk_find_struct_const(pCreateInfo->pNext,
530 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
531
532 modifier = DRM_FORMAT_MOD_LINEAR;
533 for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {
534 if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)
535 modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
536 }
537 } else {
538 const struct wsi_image_create_info *wsi_info =
539 vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
540 if (wsi_info && wsi_info->scanout)
541 modifier = DRM_FORMAT_MOD_LINEAR;
542 }
543
544 return tu_image_create(device, pCreateInfo, pAllocator, pImage, modifier);
545 }
546
547 void
548 tu_DestroyImage(VkDevice _device,
549 VkImage _image,
550 const VkAllocationCallbacks *pAllocator)
551 {
552 TU_FROM_HANDLE(tu_device, device, _device);
553 TU_FROM_HANDLE(tu_image, image, _image);
554
555 if (!image)
556 return;
557
558 if (image->owned_memory != VK_NULL_HANDLE)
559 tu_FreeMemory(_device, image->owned_memory, pAllocator);
560
561 vk_free2(&device->alloc, pAllocator, image);
562 }
563
564 void
565 tu_GetImageSubresourceLayout(VkDevice _device,
566 VkImage _image,
567 const VkImageSubresource *pSubresource,
568 VkSubresourceLayout *pLayout)
569 {
570 TU_FROM_HANDLE(tu_image, image, _image);
571
572 const struct fdl_slice *slice = image->layout.slices + pSubresource->mipLevel;
573
574 pLayout->offset = fdl_surface_offset(&image->layout,
575 pSubresource->mipLevel,
576 pSubresource->arrayLayer);
577 pLayout->size = slice->size0;
578 pLayout->rowPitch = slice->pitch;
579 pLayout->arrayPitch = image->layout.layer_size;
580 pLayout->depthPitch = slice->size0;
581
582 if (image->layout.ubwc_layer_size) {
583 /* UBWC starts at offset 0 */
584 pLayout->offset = 0;
585 /* UBWC scanout won't match what the kernel wants if we have levels/layers */
586 assert(image->level_count == 1 && image->layer_count == 1);
587 }
588 }
589
590 VkResult tu_GetImageDrmFormatModifierPropertiesEXT(
591 VkDevice device,
592 VkImage _image,
593 VkImageDrmFormatModifierPropertiesEXT* pProperties)
594 {
595 TU_FROM_HANDLE(tu_image, image, _image);
596
597 assert(pProperties->sType ==
598 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
599
600 /* TODO invent a modifier for tiled but not UBWC buffers */
601
602 if (!image->layout.tile_mode)
603 pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
604 else if (image->layout.ubwc_layer_size)
605 pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
606 else
607 pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;
608
609 return VK_SUCCESS;
610 }
611
612
613 VkResult
614 tu_CreateImageView(VkDevice _device,
615 const VkImageViewCreateInfo *pCreateInfo,
616 const VkAllocationCallbacks *pAllocator,
617 VkImageView *pView)
618 {
619 TU_FROM_HANDLE(tu_device, device, _device);
620 struct tu_image_view *view;
621
622 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
623 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
624 if (view == NULL)
625 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
626
627 tu_image_view_init(view, pCreateInfo);
628
629 *pView = tu_image_view_to_handle(view);
630
631 return VK_SUCCESS;
632 }
633
634 void
635 tu_DestroyImageView(VkDevice _device,
636 VkImageView _iview,
637 const VkAllocationCallbacks *pAllocator)
638 {
639 TU_FROM_HANDLE(tu_device, device, _device);
640 TU_FROM_HANDLE(tu_image_view, iview, _iview);
641
642 if (!iview)
643 return;
644 vk_free2(&device->alloc, pAllocator, iview);
645 }
646
647 void
648 tu_buffer_view_init(struct tu_buffer_view *view,
649 struct tu_device *device,
650 const VkBufferViewCreateInfo *pCreateInfo)
651 {
652 TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);
653
654 view->buffer = buffer;
655
656 enum VkFormat vfmt = pCreateInfo->format;
657 enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);
658 const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);
659
660 uint32_t range;
661 if (pCreateInfo->range == VK_WHOLE_SIZE)
662 range = buffer->size - pCreateInfo->offset;
663 else
664 range = pCreateInfo->range;
665 uint32_t elements = range / util_format_get_blocksize(pfmt);
666
667 static const VkComponentMapping components = {
668 .r = VK_COMPONENT_SWIZZLE_R,
669 .g = VK_COMPONENT_SWIZZLE_G,
670 .b = VK_COMPONENT_SWIZZLE_B,
671 .a = VK_COMPONENT_SWIZZLE_A,
672 };
673
674 uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;
675
676 memset(&view->descriptor, 0, sizeof(view->descriptor));
677
678 view->descriptor[0] =
679 A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |
680 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
681 A6XX_TEX_CONST_0_FMT(fmt.fmt) |
682 A6XX_TEX_CONST_0_MIPLVLS(0) |
683 tu6_texswiz(&components, NULL, vfmt, VK_IMAGE_ASPECT_COLOR_BIT);
684 COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);
685 view->descriptor[1] =
686 A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
687 A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
688 view->descriptor[2] =
689 A6XX_TEX_CONST_2_UNK4 |
690 A6XX_TEX_CONST_2_UNK31;
691 view->descriptor[4] = iova;
692 view->descriptor[5] = iova >> 32;
693 }
694
695 VkResult
696 tu_CreateBufferView(VkDevice _device,
697 const VkBufferViewCreateInfo *pCreateInfo,
698 const VkAllocationCallbacks *pAllocator,
699 VkBufferView *pView)
700 {
701 TU_FROM_HANDLE(tu_device, device, _device);
702 struct tu_buffer_view *view;
703
704 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
705 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
706 if (!view)
707 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
708
709 tu_buffer_view_init(view, device, pCreateInfo);
710
711 *pView = tu_buffer_view_to_handle(view);
712
713 return VK_SUCCESS;
714 }
715
716 void
717 tu_DestroyBufferView(VkDevice _device,
718 VkBufferView bufferView,
719 const VkAllocationCallbacks *pAllocator)
720 {
721 TU_FROM_HANDLE(tu_device, device, _device);
722 TU_FROM_HANDLE(tu_buffer_view, view, bufferView);
723
724 if (!view)
725 return;
726
727 vk_free2(&device->alloc, pAllocator, view);
728 }