2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
43 #define VG(x) ((void)0)
46 #include "c11/threads.h"
47 #include "main/macros.h"
48 #include "util/list.h"
49 #include "util/macros.h"
51 #include "vk_debug_report.h"
52 #include "wsi_common.h"
54 #include "drm-uapi/msm_drm.h"
55 #include "ir3/ir3_compiler.h"
56 #include "ir3/ir3_shader.h"
58 #include "adreno_common.xml.h"
59 #include "adreno_pm4.xml.h"
61 #include "fdl/freedreno_layout.h"
63 #include "tu_descriptor_set.h"
64 #include "tu_extensions.h"
66 /* Pre-declarations needed for WSI entrypoints */
69 typedef struct xcb_connection_t xcb_connection_t
;
70 typedef uint32_t xcb_visualid_t
;
71 typedef uint32_t xcb_window_t
;
73 #include <vulkan/vk_android_native_buffer.h>
74 #include <vulkan/vk_icd.h>
75 #include <vulkan/vulkan.h>
76 #include <vulkan/vulkan_intel.h>
78 #include "tu_entrypoints.h"
81 #define MAX_VERTEX_ATTRIBS 32
83 #define MAX_VSC_PIPES 32
84 #define MAX_VIEWPORTS 1
85 #define MAX_SCISSORS 16
86 #define MAX_DISCARD_RECTANGLES 4
87 #define MAX_PUSH_CONSTANTS_SIZE 128
88 #define MAX_PUSH_DESCRIPTORS 32
89 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
90 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
91 #define MAX_DYNAMIC_BUFFERS \
92 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
93 #define MAX_SAMPLES_LOG2 4
94 #define NUM_META_FS_KEYS 13
95 #define TU_MAX_DRM_DEVICES 8
97 /* The Qualcomm driver exposes 0x20000058 */
98 #define MAX_STORAGE_BUFFER_RANGE 0x20000000
100 #define NUM_DEPTH_CLEAR_PIPELINES 3
103 * This is the point we switch from using CP to compute shader
104 * for certain buffer operations.
106 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
108 #define A6XX_TEX_CONST_DWORDS 16
109 #define A6XX_TEX_SAMP_DWORDS 4
114 TU_MEM_HEAP_VRAM_CPU_ACCESS
,
122 TU_MEM_TYPE_GTT_WRITE_COMBINE
,
123 TU_MEM_TYPE_VRAM_CPU_ACCESS
,
124 TU_MEM_TYPE_GTT_CACHED
,
128 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
130 static inline uint32_t
131 align_u32(uint32_t v
, uint32_t a
)
133 assert(a
!= 0 && a
== (a
& -a
));
134 return (v
+ a
- 1) & ~(a
- 1);
137 static inline uint32_t
138 align_u32_npot(uint32_t v
, uint32_t a
)
140 return (v
+ a
- 1) / a
* a
;
143 static inline uint64_t
144 align_u64(uint64_t v
, uint64_t a
)
146 assert(a
!= 0 && a
== (a
& -a
));
147 return (v
+ a
- 1) & ~(a
- 1);
150 static inline int32_t
151 align_i32(int32_t v
, int32_t a
)
153 assert(a
!= 0 && a
== (a
& -a
));
154 return (v
+ a
- 1) & ~(a
- 1);
157 /** Alignment must be a power of 2. */
159 tu_is_aligned(uintmax_t n
, uintmax_t a
)
161 assert(a
== (a
& -a
));
162 return (n
& (a
- 1)) == 0;
165 static inline uint32_t
166 round_up_u32(uint32_t v
, uint32_t a
)
168 return (v
+ a
- 1) / a
;
171 static inline uint64_t
172 round_up_u64(uint64_t v
, uint64_t a
)
174 return (v
+ a
- 1) / a
;
177 static inline uint32_t
178 tu_minify(uint32_t n
, uint32_t levels
)
180 if (unlikely(n
== 0))
183 return MAX2(n
>> levels
, 1);
186 tu_clamp_f(float f
, float min
, float max
)
199 tu_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
201 if (*inout_mask
& clear_mask
) {
202 *inout_mask
&= ~clear_mask
;
209 #define for_each_bit(b, dword) \
210 for (uint32_t __dword = (dword); \
211 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
213 #define typed_memcpy(dest, src, count) \
215 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
216 memcpy((dest), (src), (count) * sizeof(*(src))); \
219 #define COND(bool, val) ((bool) ? (val) : 0)
221 /* Whenever we generate an error, pass it through this function. Useful for
222 * debugging, where we can break on it. Only call at error site, not when
223 * propagating errors. Might be useful to plug in a stack trace here.
229 __vk_errorf(struct tu_instance
*instance
,
236 #define vk_error(instance, error) \
237 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
238 #define vk_errorf(instance, error, format, ...) \
239 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
242 __tu_finishme(const char *file
, int line
, const char *format
, ...)
245 tu_loge(const char *format
, ...) tu_printflike(1, 2);
247 tu_loge_v(const char *format
, va_list va
);
249 tu_logi(const char *format
, ...) tu_printflike(1, 2);
251 tu_logi_v(const char *format
, va_list va
);
254 * Print a FINISHME message, including its source location.
256 #define tu_finishme(format, ...) \
258 static bool reported = false; \
260 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
265 /* A non-fatal assert. Useful for debugging. */
267 #define tu_assert(x) \
269 if (unlikely(!(x))) \
270 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
276 /* Suppress -Wunused in stub functions */
277 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
279 __tu_use_args(int ignore
, ...)
285 tu_finishme("stub %s", __func__); \
289 tu_lookup_entrypoint_unchecked(const char *name
);
291 tu_lookup_entrypoint_checked(
293 uint32_t core_version
,
294 const struct tu_instance_extension_table
*instance
,
295 const struct tu_device_extension_table
*device
);
297 struct tu_physical_device
299 VK_LOADER_DATA _loader_data
;
301 struct tu_instance
*instance
;
304 char name
[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE
];
305 uint8_t driver_uuid
[VK_UUID_SIZE
];
306 uint8_t device_uuid
[VK_UUID_SIZE
];
307 uint8_t cache_uuid
[VK_UUID_SIZE
];
309 struct wsi_device wsi_device
;
316 uint32_t tile_align_w
;
317 uint32_t tile_align_h
;
320 uint32_t RB_UNKNOWN_8E04_blit
; /* for CP_BLIT's */
321 uint32_t RB_CCU_CNTL_gmem
; /* for GMEM */
322 uint32_t PC_UNKNOWN_9805
;
323 uint32_t SP_UNKNOWN_A0F8
;
326 /* This is the drivers on-disk cache used as a fallback as opposed to
327 * the pipeline cache defined by apps.
329 struct disk_cache
*disk_cache
;
331 struct tu_device_extension_table supported_extensions
;
336 TU_DEBUG_STARTUP
= 1 << 0,
337 TU_DEBUG_NIR
= 1 << 1,
338 TU_DEBUG_IR3
= 1 << 2,
339 TU_DEBUG_NOBIN
= 1 << 3,
340 TU_DEBUG_SYSMEM
= 1 << 4,
341 TU_DEBUG_FORCEBIN
= 1 << 5,
346 VK_LOADER_DATA _loader_data
;
348 VkAllocationCallbacks alloc
;
350 uint32_t api_version
;
351 int physical_device_count
;
352 struct tu_physical_device physical_devices
[TU_MAX_DRM_DEVICES
];
354 enum tu_debug_flags debug_flags
;
356 struct vk_debug_report_instance debug_report_callbacks
;
358 struct tu_instance_extension_table enabled_extensions
;
362 tu_wsi_init(struct tu_physical_device
*physical_device
);
364 tu_wsi_finish(struct tu_physical_device
*physical_device
);
367 tu_instance_extension_supported(const char *name
);
369 tu_physical_device_api_version(struct tu_physical_device
*dev
);
371 tu_physical_device_extension_supported(struct tu_physical_device
*dev
,
376 struct tu_pipeline_cache
378 struct tu_device
*device
;
379 pthread_mutex_t mutex
;
383 uint32_t kernel_count
;
384 struct cache_entry
**hash_table
;
387 VkAllocationCallbacks alloc
;
390 struct tu_pipeline_key
395 tu_pipeline_cache_init(struct tu_pipeline_cache
*cache
,
396 struct tu_device
*device
);
398 tu_pipeline_cache_finish(struct tu_pipeline_cache
*cache
);
400 tu_pipeline_cache_load(struct tu_pipeline_cache
*cache
,
404 struct tu_shader_variant
;
407 tu_create_shader_variants_from_pipeline_cache(
408 struct tu_device
*device
,
409 struct tu_pipeline_cache
*cache
,
410 const unsigned char *sha1
,
411 struct tu_shader_variant
**variants
);
414 tu_pipeline_cache_insert_shaders(struct tu_device
*device
,
415 struct tu_pipeline_cache
*cache
,
416 const unsigned char *sha1
,
417 struct tu_shader_variant
**variants
,
418 const void *const *codes
,
419 const unsigned *code_sizes
);
423 VkAllocationCallbacks alloc
;
425 struct tu_pipeline_cache cache
;
429 #define TU_QUEUE_GENERAL 0
431 #define TU_MAX_QUEUE_FAMILIES 1
435 struct wsi_fence
*fence_wsi
;
441 tu_fence_init(struct tu_fence
*fence
, bool signaled
);
443 tu_fence_finish(struct tu_fence
*fence
);
445 tu_fence_update_fd(struct tu_fence
*fence
, int fd
);
447 tu_fence_copy(struct tu_fence
*fence
, const struct tu_fence
*src
);
449 tu_fence_signal(struct tu_fence
*fence
);
451 tu_fence_wait_idle(struct tu_fence
*fence
);
455 VK_LOADER_DATA _loader_data
;
456 struct tu_device
*device
;
457 uint32_t queue_family_index
;
459 VkDeviceQueueCreateFlags flags
;
461 uint32_t msm_queue_id
;
462 struct tu_fence submit_fence
;
475 VK_LOADER_DATA _loader_data
;
477 VkAllocationCallbacks alloc
;
479 struct tu_instance
*instance
;
481 struct tu_meta_state meta_state
;
483 struct tu_queue
*queues
[TU_MAX_QUEUE_FAMILIES
];
484 int queue_count
[TU_MAX_QUEUE_FAMILIES
];
486 struct tu_physical_device
*physical_device
;
488 struct ir3_compiler
*compiler
;
490 /* Backup in-memory cache to be used if the app doesn't provide one */
491 struct tu_pipeline_cache
*mem_cache
;
493 struct tu_bo vsc_data
;
494 struct tu_bo vsc_data2
;
495 uint32_t vsc_data_pitch
;
496 uint32_t vsc_data2_pitch
;
498 struct list_head shader_slabs
;
499 mtx_t shader_slab_mutex
;
501 struct tu_device_extension_table enabled_extensions
;
505 tu_bo_init_new(struct tu_device
*dev
, struct tu_bo
*bo
, uint64_t size
);
507 tu_bo_init_dmabuf(struct tu_device
*dev
,
512 tu_bo_export_dmabuf(struct tu_device
*dev
, struct tu_bo
*bo
);
514 tu_bo_finish(struct tu_device
*dev
, struct tu_bo
*bo
);
516 tu_bo_map(struct tu_device
*dev
, struct tu_bo
*bo
);
521 const struct tu_bo
*bo
;
527 struct ts_cs_memory
{
536 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
537 * is full. tu_cs_begin must be called before command packet emission and
538 * tu_cs_end must be called after.
540 * This mode may create multiple entries internally. The entries must be
541 * submitted together.
546 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
547 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
550 * This mode does not create any entry or any BO.
555 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
556 * command packet emission. tu_cs_begin_sub_stream must be called to get a
557 * sub-stream to emit comamnd packets to. When done with the sub-stream,
558 * tu_cs_end_sub_stream must be called.
560 * This mode does not create any entry internally.
562 TU_CS_MODE_SUB_STREAM
,
569 uint32_t *reserved_end
;
572 struct tu_device
*device
;
573 enum tu_cs_mode mode
;
574 uint32_t next_bo_size
;
576 struct tu_cs_entry
*entries
;
577 uint32_t entry_count
;
578 uint32_t entry_capacity
;
582 uint32_t bo_capacity
;
584 /* state for cond_exec_start/cond_exec_end */
586 uint32_t *cond_dwords
;
589 struct tu_device_memory
594 /* for dedicated allocations */
595 struct tu_image
*image
;
596 struct tu_buffer
*buffer
;
603 struct tu_descriptor_range
609 struct tu_descriptor_set
611 const struct tu_descriptor_set_layout
*layout
;
615 uint32_t *mapped_ptr
;
616 struct tu_descriptor_range
*dynamic_descriptors
;
618 struct tu_bo
*descriptors
[0];
621 struct tu_push_descriptor_set
623 struct tu_descriptor_set set
;
627 struct tu_descriptor_pool_entry
631 struct tu_descriptor_set
*set
;
634 struct tu_descriptor_pool
637 uint64_t current_offset
;
640 uint8_t *host_memory_base
;
641 uint8_t *host_memory_ptr
;
642 uint8_t *host_memory_end
;
644 uint32_t entry_count
;
645 uint32_t max_entry_count
;
646 struct tu_descriptor_pool_entry entries
[0];
649 struct tu_descriptor_update_template_entry
651 VkDescriptorType descriptor_type
;
653 /* The number of descriptors to update */
654 uint32_t descriptor_count
;
656 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
660 /* In dwords. Not valid/used for dynamic descriptors */
663 uint32_t buffer_offset
;
665 /* Only valid for combined image samplers and samplers */
666 uint16_t has_sampler
;
672 /* For push descriptors */
673 const uint32_t *immutable_samplers
;
676 struct tu_descriptor_update_template
678 uint32_t entry_count
;
679 VkPipelineBindPoint bind_point
;
680 struct tu_descriptor_update_template_entry entry
[0];
687 VkBufferUsageFlags usage
;
688 VkBufferCreateFlags flags
;
691 VkDeviceSize bo_offset
;
694 static inline uint64_t
695 tu_buffer_iova(struct tu_buffer
*buffer
)
697 return buffer
->bo
->iova
+ buffer
->bo_offset
;
700 enum tu_dynamic_state_bits
702 TU_DYNAMIC_VIEWPORT
= 1 << 0,
703 TU_DYNAMIC_SCISSOR
= 1 << 1,
704 TU_DYNAMIC_LINE_WIDTH
= 1 << 2,
705 TU_DYNAMIC_DEPTH_BIAS
= 1 << 3,
706 TU_DYNAMIC_BLEND_CONSTANTS
= 1 << 4,
707 TU_DYNAMIC_DEPTH_BOUNDS
= 1 << 5,
708 TU_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6,
709 TU_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7,
710 TU_DYNAMIC_STENCIL_REFERENCE
= 1 << 8,
711 TU_DYNAMIC_DISCARD_RECTANGLE
= 1 << 9,
712 TU_DYNAMIC_ALL
= (1 << 10) - 1,
715 struct tu_vertex_binding
717 struct tu_buffer
*buffer
;
721 struct tu_viewport_state
724 VkViewport viewports
[MAX_VIEWPORTS
];
727 struct tu_scissor_state
730 VkRect2D scissors
[MAX_SCISSORS
];
733 struct tu_discard_rectangle_state
736 VkRect2D rectangles
[MAX_DISCARD_RECTANGLES
];
739 struct tu_dynamic_state
742 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
743 * Defines the set of saved dynamic state.
747 struct tu_viewport_state viewport
;
749 struct tu_scissor_state scissor
;
760 float blend_constants
[4];
772 } stencil_compare_mask
;
778 } stencil_write_mask
;
786 struct tu_discard_rectangle_state discard_rectangle
;
789 extern const struct tu_dynamic_state default_dynamic_state
;
792 tu_get_debug_option_name(int id
);
795 tu_get_perftest_option_name(int id
);
797 struct tu_descriptor_state
799 struct tu_descriptor_set
*sets
[MAX_SETS
];
801 struct tu_push_descriptor_set push_set
;
803 uint64_t dynamic_buffers
[MAX_DYNAMIC_BUFFERS
];
814 struct tu_tiling_config
816 VkRect2D render_area
;
818 /* position and size of the first tile */
820 /* number of tiles */
821 VkExtent2D tile_count
;
823 /* size of the first VSC pipe */
825 /* number of VSC pipes */
826 VkExtent2D pipe_count
;
828 /* pipe register values */
829 uint32_t pipe_config
[MAX_VSC_PIPES
];
830 uint32_t pipe_sizes
[MAX_VSC_PIPES
];
832 /* Whether sysmem rendering must be used */
836 enum tu_cmd_dirty_bits
838 TU_CMD_DIRTY_PIPELINE
= 1 << 0,
839 TU_CMD_DIRTY_COMPUTE_PIPELINE
= 1 << 1,
840 TU_CMD_DIRTY_VERTEX_BUFFERS
= 1 << 2,
841 TU_CMD_DIRTY_DESCRIPTOR_SETS
= 1 << 3,
842 TU_CMD_DIRTY_PUSH_CONSTANTS
= 1 << 4,
844 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 16,
845 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 17,
846 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 18,
847 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 19,
854 struct tu_pipeline
*pipeline
;
855 struct tu_pipeline
*compute_pipeline
;
860 struct tu_buffer
*buffers
[MAX_VBS
];
861 VkDeviceSize offsets
[MAX_VBS
];
864 struct tu_dynamic_state dynamic
;
867 struct tu_buffer
*index_buffer
;
868 uint64_t index_offset
;
870 uint32_t max_index_count
;
873 const struct tu_render_pass
*pass
;
874 const struct tu_subpass
*subpass
;
875 const struct tu_framebuffer
*framebuffer
;
877 struct tu_tiling_config tiling_config
;
879 struct tu_cs_entry tile_store_ib
;
884 VkAllocationCallbacks alloc
;
885 struct list_head cmd_buffers
;
886 struct list_head free_cmd_buffers
;
887 uint32_t queue_family_index
;
890 struct tu_cmd_buffer_upload
895 struct list_head list
;
898 enum tu_cmd_buffer_status
900 TU_CMD_BUFFER_STATUS_INVALID
,
901 TU_CMD_BUFFER_STATUS_INITIAL
,
902 TU_CMD_BUFFER_STATUS_RECORDING
,
903 TU_CMD_BUFFER_STATUS_EXECUTABLE
,
904 TU_CMD_BUFFER_STATUS_PENDING
,
911 struct drm_msm_gem_submit_bo
*bo_infos
;
914 #define TU_BO_LIST_FAILED (~0)
917 tu_bo_list_init(struct tu_bo_list
*list
);
919 tu_bo_list_destroy(struct tu_bo_list
*list
);
921 tu_bo_list_reset(struct tu_bo_list
*list
);
923 tu_bo_list_add(struct tu_bo_list
*list
,
924 const struct tu_bo
*bo
,
927 tu_bo_list_merge(struct tu_bo_list
*list
, const struct tu_bo_list
*other
);
931 VK_LOADER_DATA _loader_data
;
933 struct tu_device
*device
;
935 struct tu_cmd_pool
*pool
;
936 struct list_head pool_link
;
938 VkCommandBufferUsageFlags usage_flags
;
939 VkCommandBufferLevel level
;
940 enum tu_cmd_buffer_status status
;
942 struct tu_cmd_state state
;
943 struct tu_vertex_binding vertex_bindings
[MAX_VBS
];
944 uint32_t queue_family_index
;
946 uint32_t push_constants
[MAX_PUSH_CONSTANTS_SIZE
/ 4];
947 VkShaderStageFlags push_constant_stages
;
948 struct tu_descriptor_set meta_push_descriptors
;
950 struct tu_descriptor_state descriptors
[VK_PIPELINE_BIND_POINT_RANGE_SIZE
];
952 struct tu_cmd_buffer_upload upload
;
954 VkResult record_result
;
956 struct tu_bo_list bo_list
;
958 struct tu_cs draw_cs
;
959 struct tu_cs draw_epilogue_cs
;
962 struct tu_bo scratch_bo
;
963 uint32_t scratch_seqno
;
964 #define VSC_OVERFLOW 0x8
965 #define VSC_SCRATCH 0x10
967 struct tu_bo vsc_data
;
968 struct tu_bo vsc_data2
;
969 uint32_t vsc_data_pitch
;
970 uint32_t vsc_data2_pitch
;
976 /* Temporary struct for tracking a register state to be written, used by
977 * a6xx-pack.h and tu_cs_emit_regs()
979 struct tu_reg_value
{
990 tu6_emit_event_write(struct tu_cmd_buffer
*cmd
,
992 enum vgt_event_type event
,
996 tu_get_memory_fd(struct tu_device
*device
,
997 struct tu_device_memory
*memory
,
1000 static inline struct tu_descriptor_state
*
1001 tu_get_descriptors_state(struct tu_cmd_buffer
*cmd_buffer
,
1002 VkPipelineBindPoint bind_point
)
1004 return &cmd_buffer
->descriptors
[bind_point
];
1008 * Takes x,y,z as exact numbers of invocations, instead of blocks.
1010 * Limitations: Can't call normal dispatch functions without binding or
1012 * the compute pipeline.
1015 tu_unaligned_dispatch(struct tu_cmd_buffer
*cmd_buffer
,
1025 struct tu_shader_module
;
1027 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
1028 #define TU_HASH_SHADER_SISCHED (1 << 1)
1029 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
1031 tu_hash_shaders(unsigned char *hash
,
1032 const VkPipelineShaderStageCreateInfo
**stages
,
1033 const struct tu_pipeline_layout
*layout
,
1034 const struct tu_pipeline_key
*key
,
1037 static inline gl_shader_stage
1038 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1040 assert(__builtin_popcount(vk_stage
) == 1);
1041 return ffs(vk_stage
) - 1;
1044 static inline VkShaderStageFlagBits
1045 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1047 return (1 << mesa_stage
);
1050 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1052 #define tu_foreach_stage(stage, stage_bits) \
1053 for (gl_shader_stage stage, \
1054 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1055 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1057 struct tu_shader_module
1059 unsigned char sha1
[20];
1062 const uint32_t *code
[0];
1065 struct tu_shader_compile_options
1067 struct ir3_shader_key key
;
1070 bool include_binning_pass
;
1073 struct tu_descriptor_map
1075 /* TODO: avoid fixed size array/justify the size */
1076 unsigned num
; /* number of array entries */
1077 unsigned num_desc
; /* Number of descriptors (sum of array_size[]) */
1086 struct ir3_shader ir3_shader
;
1088 struct tu_descriptor_map texture_map
;
1089 struct tu_descriptor_map sampler_map
;
1090 struct tu_descriptor_map ubo_map
;
1091 struct tu_descriptor_map ssbo_map
;
1092 struct tu_descriptor_map image_map
;
1094 /* This may be true for vertex shaders. When true, variants[1] is the
1095 * binning variant and binning_binary is non-NULL.
1097 bool has_binning_pass
;
1100 void *binning_binary
;
1102 struct ir3_shader_variant variants
[0];
1106 tu_shader_create(struct tu_device
*dev
,
1107 gl_shader_stage stage
,
1108 const VkPipelineShaderStageCreateInfo
*stage_info
,
1109 struct tu_pipeline_layout
*layout
,
1110 const VkAllocationCallbacks
*alloc
);
1113 tu_shader_destroy(struct tu_device
*dev
,
1114 struct tu_shader
*shader
,
1115 const VkAllocationCallbacks
*alloc
);
1118 tu_shader_compile_options_init(
1119 struct tu_shader_compile_options
*options
,
1120 const VkGraphicsPipelineCreateInfo
*pipeline_info
);
1123 tu_shader_compile(struct tu_device
*dev
,
1124 struct tu_shader
*shader
,
1125 const struct tu_shader
*next_stage
,
1126 const struct tu_shader_compile_options
*options
,
1127 const VkAllocationCallbacks
*alloc
);
1129 struct tu_program_descriptor_linkage
1131 struct ir3_ubo_analysis_state ubo_state
;
1132 struct ir3_const_state const_state
;
1136 struct tu_descriptor_map texture_map
;
1137 struct tu_descriptor_map sampler_map
;
1138 struct tu_descriptor_map ubo_map
;
1139 struct tu_descriptor_map ssbo_map
;
1140 struct tu_descriptor_map image_map
;
1147 struct tu_dynamic_state dynamic_state
;
1149 struct tu_pipeline_layout
*layout
;
1151 bool need_indirect_descriptor_sets
;
1152 VkShaderStageFlags active_stages
;
1156 struct tu_bo binary_bo
;
1157 struct tu_cs_entry state_ib
;
1158 struct tu_cs_entry binning_state_ib
;
1160 struct tu_program_descriptor_linkage link
[MESA_SHADER_STAGES
];
1165 uint8_t bindings
[MAX_VERTEX_ATTRIBS
];
1166 uint16_t strides
[MAX_VERTEX_ATTRIBS
];
1167 uint16_t offsets
[MAX_VERTEX_ATTRIBS
];
1170 uint8_t binning_bindings
[MAX_VERTEX_ATTRIBS
];
1171 uint16_t binning_strides
[MAX_VERTEX_ATTRIBS
];
1172 uint16_t binning_offsets
[MAX_VERTEX_ATTRIBS
];
1173 uint32_t binning_count
;
1175 struct tu_cs_entry state_ib
;
1176 struct tu_cs_entry binning_state_ib
;
1181 enum pc_di_primtype primtype
;
1182 bool primitive_restart
;
1187 struct tu_cs_entry state_ib
;
1192 uint32_t gras_su_cntl
;
1193 struct tu_cs_entry state_ib
;
1198 struct tu_cs_entry state_ib
;
1203 struct tu_cs_entry state_ib
;
1208 uint32_t local_size
[3];
1213 tu6_emit_viewport(struct tu_cs
*cs
, const VkViewport
*viewport
);
1216 tu6_emit_scissor(struct tu_cs
*cs
, const VkRect2D
*scissor
);
1219 tu6_emit_gras_su_cntl(struct tu_cs
*cs
,
1220 uint32_t gras_su_cntl
,
1224 tu6_emit_depth_bias(struct tu_cs
*cs
,
1225 float constant_factor
,
1227 float slope_factor
);
1230 tu6_emit_stencil_compare_mask(struct tu_cs
*cs
,
1235 tu6_emit_stencil_write_mask(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1238 tu6_emit_stencil_reference(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1241 tu6_emit_blend_constants(struct tu_cs
*cs
, const float constants
[4]);
1243 struct tu_userdata_info
*
1244 tu_lookup_user_sgpr(struct tu_pipeline
*pipeline
,
1245 gl_shader_stage stage
,
1248 struct tu_shader_variant
*
1249 tu_get_shader(struct tu_pipeline
*pipeline
, gl_shader_stage stage
);
1251 struct tu_graphics_pipeline_create_info
1254 bool db_depth_clear
;
1255 bool db_stencil_clear
;
1256 bool db_depth_disable_expclear
;
1257 bool db_stencil_disable_expclear
;
1258 bool db_flush_depth_inplace
;
1259 bool db_flush_stencil_inplace
;
1260 bool db_resummarize
;
1261 uint32_t custom_blend_mode
;
1264 struct tu_native_format
1266 int vtx
; /* VFMTn_xxx or -1 */
1267 int tex
; /* TFMTn_xxx or -1 */
1268 int rb
; /* RBn_xxx or -1 */
1269 int swap
; /* enum a3xx_color_swap */
1270 bool present
; /* internal only; always true to external users */
1273 const struct tu_native_format
*
1274 tu6_get_native_format(VkFormat format
);
1277 tu_pack_clear_value(const VkClearValue
*val
,
1282 tu_2d_clear_color(const VkClearColorValue
*val
, VkFormat format
, uint32_t buf
[4]);
1285 tu_2d_clear_zs(const VkClearDepthStencilValue
*val
, VkFormat format
, uint32_t buf
[4]);
1287 enum a6xx_2d_ifmt
tu6_fmt_to_ifmt(enum a6xx_format fmt
);
1288 enum a6xx_depth_format
tu6_pipe2depth(VkFormat format
);
1290 struct tu_image_level
1292 VkDeviceSize offset
;
1300 /* The original VkFormat provided by the client. This may not match any
1301 * of the actual surface formats.
1304 VkImageAspectFlags aspects
;
1305 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1306 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1307 VkImageCreateFlags flags
; /** VkImageCreateInfo::flags */
1309 uint32_t level_count
;
1310 uint32_t layer_count
;
1311 VkSampleCountFlagBits samples
;
1316 struct fdl_layout layout
;
1318 unsigned queue_family_mask
;
1322 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1323 VkDeviceMemory owned_memory
;
1325 /* Set when bound */
1327 VkDeviceSize bo_offset
;
1331 tu_image_queue_family_mask(const struct tu_image
*image
,
1333 uint32_t queue_family
);
1335 static inline uint32_t
1336 tu_get_layerCount(const struct tu_image
*image
,
1337 const VkImageSubresourceRange
*range
)
1339 return range
->layerCount
== VK_REMAINING_ARRAY_LAYERS
1340 ? image
->layer_count
- range
->baseArrayLayer
1341 : range
->layerCount
;
1344 static inline uint32_t
1345 tu_get_levelCount(const struct tu_image
*image
,
1346 const VkImageSubresourceRange
*range
)
1348 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
1349 ? image
->level_count
- range
->baseMipLevel
1350 : range
->levelCount
;
1353 static inline VkDeviceSize
1354 tu_layer_size(struct tu_image
*image
, int level
)
1356 return fdl_layer_stride(&image
->layout
, level
);
1359 static inline uint32_t
1360 tu_image_stride(struct tu_image
*image
, int level
)
1362 return image
->layout
.slices
[level
].pitch
* image
->layout
.cpp
;
1365 static inline uint64_t
1366 tu_image_base(struct tu_image
*image
, int level
, int layer
)
1368 return image
->bo
->iova
+ image
->bo_offset
+
1369 fdl_surface_offset(&image
->layout
, level
, layer
);
1372 #define tu_image_base_ref(image, level, layer) \
1374 .bo_offset = (image->bo_offset + fdl_surface_offset(&image->layout, \
1377 #define tu_image_view_base_ref(iview) \
1378 tu_image_base_ref(iview->image, iview->base_mip, iview->base_layer)
1380 static inline VkDeviceSize
1381 tu_image_ubwc_size(struct tu_image
*image
, int level
)
1383 return image
->layout
.ubwc_layer_size
;
1386 static inline uint32_t
1387 tu_image_ubwc_pitch(struct tu_image
*image
, int level
)
1389 return image
->layout
.ubwc_slices
[level
].pitch
;
1392 static inline uint64_t
1393 tu_image_ubwc_surface_offset(struct tu_image
*image
, int level
, int layer
)
1395 return image
->layout
.ubwc_slices
[level
].offset
+
1396 layer
* tu_image_ubwc_size(image
, level
);
1399 static inline uint64_t
1400 tu_image_ubwc_base(struct tu_image
*image
, int level
, int layer
)
1402 return image
->bo
->iova
+ image
->bo_offset
+
1403 tu_image_ubwc_surface_offset(image
, level
, layer
);
1406 #define tu_image_ubwc_base_ref(image, level, layer) \
1408 .bo_offset = (image->bo_offset + tu_image_ubwc_surface_offset(image, \
1411 #define tu_image_view_ubwc_base_ref(iview) \
1412 tu_image_ubwc_base_ref(iview->image, iview->base_mip, iview->base_layer)
1415 tu6_get_image_tile_mode(struct tu_image
*image
, int level
);
1416 enum a3xx_msaa_samples
1417 tu_msaa_samples(uint32_t samples
);
1419 struct tu_image_view
1421 struct tu_image
*image
; /**< VkImageViewCreateInfo::image */
1423 VkImageViewType type
;
1424 VkImageAspectFlags aspect_mask
;
1426 uint32_t base_layer
;
1427 uint32_t layer_count
;
1429 uint32_t level_count
;
1430 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1432 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1434 /* Descriptor for use as a storage image as opposed to a sampled image.
1435 * This has a few differences for cube maps (e.g. type).
1437 uint32_t storage_descriptor
[A6XX_TEX_CONST_DWORDS
];
1442 uint32_t state
[A6XX_TEX_SAMP_DWORDS
];
1445 VkBorderColor border
;
1449 tu_image_create(VkDevice _device
,
1450 const VkImageCreateInfo
*pCreateInfo
,
1451 const VkAllocationCallbacks
*alloc
,
1456 tu_image_from_gralloc(VkDevice device_h
,
1457 const VkImageCreateInfo
*base_info
,
1458 const VkNativeBufferANDROID
*gralloc_info
,
1459 const VkAllocationCallbacks
*alloc
,
1460 VkImage
*out_image_h
);
1463 tu_image_view_init(struct tu_image_view
*view
,
1464 struct tu_device
*device
,
1465 const VkImageViewCreateInfo
*pCreateInfo
);
1467 struct tu_buffer_view
1469 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1471 struct tu_buffer
*buffer
;
1474 tu_buffer_view_init(struct tu_buffer_view
*view
,
1475 struct tu_device
*device
,
1476 const VkBufferViewCreateInfo
*pCreateInfo
);
1478 static inline struct VkExtent3D
1479 tu_sanitize_image_extent(const VkImageType imageType
,
1480 const struct VkExtent3D imageExtent
)
1482 switch (imageType
) {
1483 case VK_IMAGE_TYPE_1D
:
1484 return (VkExtent3D
) { imageExtent
.width
, 1, 1 };
1485 case VK_IMAGE_TYPE_2D
:
1486 return (VkExtent3D
) { imageExtent
.width
, imageExtent
.height
, 1 };
1487 case VK_IMAGE_TYPE_3D
:
1490 unreachable("invalid image type");
1494 static inline struct VkOffset3D
1495 tu_sanitize_image_offset(const VkImageType imageType
,
1496 const struct VkOffset3D imageOffset
)
1498 switch (imageType
) {
1499 case VK_IMAGE_TYPE_1D
:
1500 return (VkOffset3D
) { imageOffset
.x
, 0, 0 };
1501 case VK_IMAGE_TYPE_2D
:
1502 return (VkOffset3D
) { imageOffset
.x
, imageOffset
.y
, 0 };
1503 case VK_IMAGE_TYPE_3D
:
1506 unreachable("invalid image type");
1510 struct tu_attachment_info
1512 struct tu_image_view
*attachment
;
1515 struct tu_framebuffer
1521 uint32_t attachment_count
;
1522 struct tu_attachment_info attachments
[0];
1525 struct tu_subpass_attachment
1527 uint32_t attachment
;
1532 uint32_t input_count
;
1533 uint32_t color_count
;
1534 struct tu_subpass_attachment
*input_attachments
;
1535 struct tu_subpass_attachment
*color_attachments
;
1536 struct tu_subpass_attachment
*resolve_attachments
;
1537 struct tu_subpass_attachment depth_stencil_attachment
;
1539 VkSampleCountFlagBits samples
;
1542 struct tu_render_pass_attachment
1546 VkAttachmentLoadOp load_op
;
1547 VkAttachmentLoadOp stencil_load_op
;
1548 VkAttachmentStoreOp store_op
;
1549 VkAttachmentStoreOp stencil_store_op
;
1550 int32_t gmem_offset
;
1553 struct tu_render_pass
1555 uint32_t attachment_count
;
1556 uint32_t subpass_count
;
1557 uint32_t gmem_pixels
;
1558 struct tu_subpass_attachment
*subpass_attachments
;
1559 struct tu_render_pass_attachment
*attachments
;
1560 struct tu_subpass subpasses
[0];
1564 tu_device_init_meta(struct tu_device
*device
);
1566 tu_device_finish_meta(struct tu_device
*device
);
1568 struct tu_query_pool
1573 uint32_t pipeline_statistics
;
1580 uint32_t temp_syncobj
;
1584 tu_set_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1585 VkPipelineBindPoint bind_point
,
1586 struct tu_descriptor_set
*set
,
1590 tu_update_descriptor_sets(struct tu_device
*device
,
1591 struct tu_cmd_buffer
*cmd_buffer
,
1592 VkDescriptorSet overrideSet
,
1593 uint32_t descriptorWriteCount
,
1594 const VkWriteDescriptorSet
*pDescriptorWrites
,
1595 uint32_t descriptorCopyCount
,
1596 const VkCopyDescriptorSet
*pDescriptorCopies
);
1599 tu_update_descriptor_set_with_template(
1600 struct tu_device
*device
,
1601 struct tu_cmd_buffer
*cmd_buffer
,
1602 struct tu_descriptor_set
*set
,
1603 VkDescriptorUpdateTemplate descriptorUpdateTemplate
,
1607 tu_meta_push_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1608 VkPipelineBindPoint pipelineBindPoint
,
1609 VkPipelineLayout _layout
,
1611 uint32_t descriptorWriteCount
,
1612 const VkWriteDescriptorSet
*pDescriptorWrites
);
1615 tu_drm_get_gpu_id(const struct tu_physical_device
*dev
, uint32_t *id
);
1618 tu_drm_get_gmem_size(const struct tu_physical_device
*dev
, uint32_t *size
);
1621 tu_drm_submitqueue_new(const struct tu_device
*dev
,
1623 uint32_t *queue_id
);
1626 tu_drm_submitqueue_close(const struct tu_device
*dev
, uint32_t queue_id
);
1629 tu_gem_new(const struct tu_device
*dev
, uint64_t size
, uint32_t flags
);
1631 tu_gem_import_dmabuf(const struct tu_device
*dev
,
1635 tu_gem_export_dmabuf(const struct tu_device
*dev
, uint32_t gem_handle
);
1637 tu_gem_close(const struct tu_device
*dev
, uint32_t gem_handle
);
1639 tu_gem_info_offset(const struct tu_device
*dev
, uint32_t gem_handle
);
1641 tu_gem_info_iova(const struct tu_device
*dev
, uint32_t gem_handle
);
1645 tu_clear_sysmem_attachment(struct tu_cmd_buffer
*cmd
,
1647 uint32_t attachment
,
1648 const VkClearValue
*value
,
1649 const VkClearRect
*rect
);
1652 tu_clear_gmem_attachment(struct tu_cmd_buffer
*cmd
,
1654 uint32_t attachment
,
1655 uint8_t component_mask
,
1656 const VkClearValue
*value
);
1658 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1660 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1662 return (struct __tu_type *) _handle; \
1665 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1667 return (__VkType) _obj; \
1670 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1672 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1674 return (struct __tu_type *) (uintptr_t) _handle; \
1677 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1679 return (__VkType)(uintptr_t) _obj; \
1682 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1683 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1685 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer
, VkCommandBuffer
)
1686 TU_DEFINE_HANDLE_CASTS(tu_device
, VkDevice
)
1687 TU_DEFINE_HANDLE_CASTS(tu_instance
, VkInstance
)
1688 TU_DEFINE_HANDLE_CASTS(tu_physical_device
, VkPhysicalDevice
)
1689 TU_DEFINE_HANDLE_CASTS(tu_queue
, VkQueue
)
1691 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool
, VkCommandPool
)
1692 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer
, VkBuffer
)
1693 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view
, VkBufferView
)
1694 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool
, VkDescriptorPool
)
1695 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set
, VkDescriptorSet
)
1696 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout
,
1697 VkDescriptorSetLayout
)
1698 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template
,
1699 VkDescriptorUpdateTemplate
)
1700 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory
, VkDeviceMemory
)
1701 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence
, VkFence
)
1702 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event
, VkEvent
)
1703 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer
, VkFramebuffer
)
1704 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image
, VkImage
)
1705 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view
, VkImageView
);
1706 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache
, VkPipelineCache
)
1707 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline
, VkPipeline
)
1708 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout
, VkPipelineLayout
)
1709 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool
, VkQueryPool
)
1710 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass
, VkRenderPass
)
1711 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler
, VkSampler
)
1712 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module
, VkShaderModule
)
1713 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore
, VkSemaphore
)
1715 #endif /* TU_PRIVATE_H */